Actel半导体FPGA封装和选型

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如何解决Actel FPGA烧写两大难题？

如何解决Actel FPGA烧写两大难题？摘要Actel FPGA烧写的两大难题：Actel Flash构架特点、难点；批量烧写的稳定性，如何拆解？为什么Actel的FPGA烧写难?Actel的FPGA为全球独创的Flash构架的FPGA，独创就在于他不同于普通RAM构架，不需要外部的EPROM、PROM存储器来保存内部逻辑状态的配置信息。

Actel的FPGA配置信息都存放在内部的Flash里面，直接忽略外部存储器，从而保证他的高安全性。

这个Flash构架的特性就决定了，Actel的 FPGA的编程具有一定的难度。

拆解Actel FPGA烧写的两大难题难题一：Actel Flash构架特点、难点Actel FPGA内部Flash有个特点，配置数据不能读回，这样来保证芯片的高安全性。

对于编程者来讲，如何保证你写入的配置数据、加密密码是成功了呢？编程者的通常做法是，读出写入芯片的数据然后与缓冲区的数据进行对比，如果一致，就校验成功；如果不一致，就校验失败。

Actel FPGA是不允许读回的，通常的做法是无法校验的。

怎么办？难题二：批量烧写的稳定性任何批量烧写工具，裸片烧写或在线烧写，最关键的指标就是稳定性。

稳定性就需要对编程口线进行严格的电气控制，经常有客户反馈在线烧写时某I/O口被击穿了，其实就是由于在直接与PCB进行连接的过程中，线材可能会串扰进来一些其他电路的尖峰电压、瞬态大电流等，形成对电路板上IC的冲击，导致了损坏芯片的情况。

一旦烧写批量大起来，生产良率如何保证？一个工具解决两大难题AK100Pro-4P是一款一拖四的量产型在线编程器，可以支持四个通道同时烧写，只需连接 FPGA芯片的JTAG接口，即可完成在线烧写操作。

图1 AK100Pro-4P在线编程器AK100Pro-4P在Flash烧写上的一些巧办法上一节提到无法用通常的做法来校验Actel FPGA，AK100Pro-4P是如何实现的呢？AK100Pro-4P的做法是再发一次相同的数据给芯片，让Actel FPGA自己进行比对校验，并返回校验的结果，充分利用Actel FPGA本身的特性，既保证了代码的安全，又保证编程的可靠。

Actel FPGA介绍

Actel ProASIC3/E系列特性
先进的I/O
用户最多可用616个单端I/O或300个差分I/O，支持多种I/O电平标准和Bank电压。
单端I/O最快速度可达 250MHZ，差分可达 350MHZ，DDR可达到 700MHZ
Actel ProASIC3/E系列特性
先进的I/O
用户最多可用616个单端I/O或300个差分I/O，支持多种I/O电平标准和Bank电压。
四种布线资源
以最小的延时跨越整个器件，垂直方向可以跨越正负12个VersaTile，
超快速的局部连线资源
四种布线资源
有效长线资源
高速的超长线资源
高新能全局网络
Actel FPGA的布线结构
为片上全局网络和象限全局网络。
四种布线资源
应用于需要低偏斜、低延时、低抖动、高扇出的网点。全局网络分
ProASIC3L
具有独特的
Flash*Freeze 技术，功耗低
Fusion
具有分辨率为
12位，转换速率为600KSPS的 ADC
IGLOO
静态功耗低至
5UW，并保存 RAM数据
IGLOO+
应用于低功耗，
高性能I/O的场合
Nano
成本低至1$
商业级温度范
围更广（-200c～ 700c）
应用于低功耗，
JTAG Port
Actel Fusion系列
GPIO
嵌入式Flash内存
Flash memory区块(2M)
MOSFET Outputs Analog Inputs
A/D
A3P FPGA Fabric (incl. SRAM, CCC/PLL, IO)

Actel单芯片FPGA解决方案

Solid State System公司 Spansion Telecom Technology Instrument Research Institute Telit Wireless Solutions That Corporation The Dini Group TLG集团
TranSwitch公司
N/A
GSM/GPRS、UMTS/HSDPA及CDMA/EVDO模块音频前置放大器、高性能Dual-Balanced Line接收器芯片、dbx-TV音频授权、代工服务等 DN9000K10 ASIC原型引擎以及USB、PCI、PCIe主机板等产品代理无线通信产品、高端的消费类电子产品、电脑周边产品、多媒体与工业类等产品提供SONET成帧器、SONET上的TDM和数据映射器、高速互连、TDM over IP和运营商级以太网控制器/汇聚器等产品产品主要用于无线通信、基站、宽带通信、军队等，并提供芯片代工服务包括电阻、电容、电感、传感器、应变测量仪(无源)、二极管、整流器、晶体管、 MOSFET、功率集成电路、模拟开关、多路复用器(有源)、红外数据通信仪(IRDC)、LED、 IR发射器、检波器和光电接收模块等针对家庭影院、家庭立体扬声器、环绕立体声等应用的平台电源管理与转换IC 半导体、无源、机电及连接器等电子零件产品分销商面向无线通信、消费电子、生物医学、汽车和军用市场的吸波、屏蔽及特种电介质材料，产品包括ECCOSORB、ECCOSHIELD、ECCOPAD等示波器、频谱分析仪、网络分析仪、逻辑分析仪、信号发生器和测试系统移动多媒体应用处理器 MR感应IC、晶振、VCXO、TCXO等产品高性能电源解决方案供应商 AC/DC电源管理芯片系列和DC/AC CCFL控制芯片系列电源管理、音频、传感器和传感器接口、接口、射频产品、数据转换器等主要代理高端LCD、TFT液晶显示屏、工控、高清及触摸屏等产品以跨嵌入式操作系统和硬件平台的图形中间件 MiniGUI 为核心的产品，包括嵌入式浏览器 mDolphin、PMP解决方案mMedia、智能手机方案mMobile等提供EPS/ECHPS/EHPS/TCU/BCM等ECU硬件、符合AUTOSAR的CAN/LIN通信协议、 UDS/ISO15765/KWP2000诊断协议等ECU软件，并代理德国Softing公司和Janz公司的 CAN卡、德国Janz公司的嵌入式工控机、德国Janz公司的工业计算机多功能32位信息安全CPU芯片HT32A256、多用途32位通用CPU芯片HT32T256 SmartRF产品线包括RF Modem、GSM/GPRS Modem、Active RFID等，EasyRF产品线包括无线影音产品、无线POS、无线餐饮系统解决方案等

四大FPGA供应商专家谈FPGA设计诀窍

电子圣土 of AdamiteAnalog and Digital ：人生没有逃避，只有穿过。

博客园社区首页新随笔联系管理订阅随笔- 134 文章- 0 评论- 86四大FPGA 供应商专家谈FPGA 设计诀窍：Actel 、Altera 、Lattice Semiconductor 和Xilinx 是目前业界最主要的四大FPGA 供应商，为了帮助中国的应用开发工程师更深入地了解FPGA 的具体设计诀窍，我们特别邀请到了Altera 系统应用工程部总监Gre g Steinke 、Xilinx 综合方法经理Frederic Rivoallon 、Xilinx 高级技术市场工程师Philippe Garrault 、Xil inx 产品应用工程部高级经理Chris Stinson 、Xilinx IP 解决方案工程部总监Mike Frasier 、Lattice Semi conductor 应用工程部总监Bertrand Leigh 和软件产品规划经理Mike Kendrick 、Actel 公司硅产品市场总监Martin Mason 和应用高级经理Jonathan Alexander 为大家传经授道。

他们将就一系列大家非常关心的关键设计问题发表他们的独到见解，包括：什么是目前FPGA 应用工程师面对的最主要设计问题？如何解决？当开始一个新的FPGA 设计时，你们会推荐客户采用什么样的流程？对于I/O 信号分布的处理，你们有什么建议可以提供给客户？如果你的客户准备移植到另外一个FPGA 、ASIC 和结构化ASIC 之间进行抉择？结构化ASIC 或ASIC ，你会建议你的客户如何做？问：目前FPGA 应用工程师面对的最主要设计问题是什么？如何解决？Actel ：当用户通过TAP 接口进行JTA G 测试或者编程时我们发现了许多问题。

与目前最先进应用的逻辑复杂度和速度相比，TAP 接口和指令集是非常简单和慢速的。

在电子设计竞赛中需要准备几种微控制器

在电子设计竞赛中，单片机、FPGA、嵌入式处理器、DSP都可以使用，但对于每个参赛队，如果要求单片机、FPGA、嵌入式处理器、DSP全部都掌握，而且能够在竞赛中熟练的使用是存在一定困难的。

分析历届获奖作品，大多数的作品采用“单片机+FPGA”都可以完成。

嵌入式处理器（俗称的ARM）多是作为一款性能更好的单片机使用，没有使用操作系统。

DSP在获奖作品中也有使用。

1. 单片机的最小系统选型单片机是大学生电子设计竞赛中应用最多的微控制器，从往届获奖作品中来看，有各种不同型号的单片机在作品中被使用，如：AT89C52、AT89S51、AT89S52、MSP430F1611、MSP430F2274、Atmega128、PIC16F628A、ADuC841、C8051F022、W78E51B等等。

根据竞赛要求，单片机（包括FPGA、ARM、DSP）最小系统是可以采用成品板的，通常在赛题要求中会对其提出一些限制性的要求，如“最小系统”主要包含单片机、ADC、DAC、存储器等。

随着新技术新器件的出现，2009年全国大学生电子设计竞赛全国专家组讨论认为竞赛涉及的“最小系统”内涵应随着技术发展而变化，对于这个问题要本着与时俱进的原则，可以通过竞赛命题具体的约束条件予以调控。

责任专家们建议不宜统一给出明确的“最小系统”定义，这样可能会限制学生、束缚命题，但也必须以合适的方式及早向社会表明专家组的基本态度，如竞赛命题对今年的竞赛作品将增加“性价比”与“系统功耗”指标要求，以此方式间接调控参赛学校对准备“万能化”竞赛装置的攀比追逐。

在命题要求中引入“性价比”指标要求，这项建议对于调控“最小系统”使用具有积极作用。

本着节能原则，专家提出设计作品应有“系统功耗”的指标要求。

“系统功耗”是“性价比”的某一量化评测指标，增加这两项指标要求，得到了专家们的普遍首肯。

（/news.asp）根据增加的“性价比”与“系统功耗”这两个指标的要求，设计时应根据赛题需要选择合适的单片机（包括FPGA、ARM、DSP）最小系统，采用不同的最小系统满足设计要求。

Actel推出首款使用简便的混合信号FPGA器件

业界领先的第＝方工具供应商合三作的用户界面上完全生成可编程系统已与为ｃｌｅ芯片；至于低成本的Ａｔ融合启动套作，Ａｔ融合可编程系统芯片提供ｃｌｅ
ｇａＤｓｕｇ件则保证设计能迅速和有效地从构想工具支持。其中，ＭａｍｅｉｎＡ — 以至完全实施。Ａｔｌｃｅ公司宣布推出全面的设计
的Ｆ１ｉｎ可编程系统芯片与Ａｔ１的图型环境具高度灵活性和容易使用Ｉｏｓｅｃ
功能丰富的ＡｔｌｕｉｎｃｅＦｓ启动套ｏ
让设计人员通过 “ 选与点” 操件备有多种内置功能，以发挥Ａｔ融ｃｌｅＬｂｒ７集成设计环境ＯＥ结合，可的特点，ｉｅ０ｏ．Ｄ）
内部和外部温度管理、模拟信号转例如，州户可使用这个ＬＤ来监控及指导文档。Ｅ
换和电平检测、功率监控、电流感温度感测的应用，而无需添加成本
Ａ｜ｉｅｏ．ＩＥ现有运行于ｔｌｂｒ０ＤｅＬ７
测及控制应用等。Ａｔｌｕｉ启动高昂的外接监控设备如示波器或Ｊ扇ｃｅＦｓｎｏｘＷｉｏｓＵ பைடு நூலகம்平台的Ｐｔｕ（Ｌｎｗ和ｎｄｘｌｉｍ￣金）ａｎ
维普资讯
ＮｅＰｒｄｃｓＷｏｕｔ
ｃｌｓｎｅＦｏ数辑、模拟功能、嵌入式Ｆａｈ内存和设。由于意识到Ａｔｕｉ模拟／ｌｓＦＧＰＡ架构的集成。Ａｔｌｃ广泛的工具字功能与嵌入式处理器结合所具备的ｅ
或电压感测事件的外部唤醒和事件触更新的使用权证。Ａｔｕｉ启动套件还包括一套发状态存储模式。ｃｌｓｎｅＦｏ

actel产品选型手册

Product CatalogMay 2010Now, more than ever, power matters.Whether you’re designing at the board or system level, Actel’s low power FPGAs and mixed signal FPGAs are your best choice.The unique, flash-based technology of Actel FPGAs, coupled with their history of reliability, sets them apart from traditional FPGAs.Design for today’s rapidly growing markets of consumer and portable medical devices, or tomorrow’s environmentally-friendly data centers and industrial controls. Take your designs to 30,000 feet or even millions of miles into space. Only Actel can meet the power, size, cost and reliability targets that reduce time-to-market and enable long-term profitability.Table of ContentsPlease refer to and appropriate product datasheets for the latest device information and valid ordering codes. More information regardingprevious generations of flash and antifuse FPGAs is also available on Actel’s website.3•Ultra low power FPGAs•Flash*Freeze technology forlowest power consumption • 1.2 V core and I/O voltage • 5 µW Flash*Freeze mode •Reprogrammable •Live at power-up •Secure in-system programming (ISP)•User nonvolatile FlashROM IGLOO/eIGLOO/e DevicesNotes:1.The M1AGL250 device does not support QN132 or CS196 packages. 2.Each used differential pair reduces the number of single-ended I/Os available by two. 3.Device/package support TBD.The ultra low power programmable solutionThe Actel IGLOO family of reprogrammable, full-featured flash FPGAs is designed to meet the demanding power, area and cost requirements of today’s portable electronics. Based on Actel’s nonvolatile flash technology, the 1.2 V to 1.5 V operating voltage family offers the industry’s lowest power consumption—as low as 5 µW. The IGLOO family supports up to 3,000,000 system gates with up to 504 Kbits of true dual-port SRAM, up to 6 embedded PLLs and up to 620 user I/Os. Low power applications that require 32-bit processing can use the ARM ®Cortex ™-M1 processor without license fee or royalties in M1 IGLOO devices.Developed specifically for implementation in FPGAs, Cortex-M1 offers an optimal balance between performance and size to minimize power consumption.45IGLOO •Ultra-low power in Flash*Freezemode, as low as 2 µW•Variety of small footprintpackages as small as 3x3 mm •Zero lead-time on selected devices •Known good die supported •Enhanced commercial temperature•Reprogrammable flash technology • 1.2 V to 1.5 V single voltage operation •Enhanced I/O features •Clock conditioning circuits (CCCs)and PLLs •Embedded SRAM and nonvolatile memory (NVM) •ISP and securityIGLOO nano DevicesI/Os Per PackageThe industry’s lowest-power, smallest-size solutionActel’s IGLOO nano products offer groundbreaking possibilities in power, size, lead-times, operating temperature and cost. Available in logic densities from 10,000 to 250,000 gates, the 1.2 V to 1.5 V IGLOO nano devices have been designed for high-volume applications where power and size are key decision criteria. IGLOO nano devices are perfect ASIC or ASSP replacements, yet retain the historical FPGA advantages of flexibility and quick time-to-market in low power and small footprint profiles.Notes:1.AGLN030 is available in the Z feature grade only.2.AGLN030 and smaller devices do not support this feature.3.AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs.4.For higher densities and support of additional features, refer to the IGLOO and IGLOOe handbooks.6IGLOO PLUS DevicesI/Os Per PackageThe low power FPGA with enhanced I/O capabilitiesActel’s IGLOO PLUS products deliver unrivaled low power and I/O features in a feature-rich programmable device, offering up to 64 percent more I/Os than the award-winning IGLOO products and supporting independent Schmitt trigger inputs, hot-swapping and Flash*Freeze bus hold. Ranging from 30,000 to 125,000 gates,the 1.2 V to 1.5 V IGLOO PLUS devices have been optimized to meet the needs of I/O-intensive, power-conscious applications that require exceptional features.•I/O-optimized FPGA•Ultra low power in Flash*Freezemode, as low as 5 µW•Low power active capability •Small footprint and low-cost packages •Reprogrammable flash technology • 1.2 V to 1.5 V single voltage operation •Enhanced I/O features •CCCs and PLLs •Embedded SRAM NVM •ISP and securityNotes:1.AGLP060 in CS201 does not support the PLL.2.Six chip (main) and twelve quadrant global networks are available for AGLP060 and AGLP125.Notes:* When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not used as a regular I/O, the number of single-ended user I/Os available is reduced by one.7ProASIC3ProASIC3/EI/Os Per PackageThe low power, low-cost FPGA solutionThe ProASIC3 series of flash FPGAs offers a breakthrough in power, price, performance, density and features for today's most demanding high-volume applications.ProASIC3 devices support the ARM Cortex-M1 processor, offering the benefits of programmability and time-to-market at low cost. ProASIC3 devices are based on nonvolatile flash technology and support 15,000 to 3,000,000 gates and up to 620 high-performance I/Os. For automotive applications, selected ProASIC3devices are qualified to the AEC-Q100 specification and are available with AEC T1 screening and PPAP documentation.Notes:1.AES is not available for Cortex-M1 ProASIC3 devices.2.Available as automotive “T” grade3.The M1A3P250 device does not support this package.Note:* M1A3P250 does not support the FG256 and QN132 packages.•Low power•Single chip, single voltage•Nonvolatile, reprogrammable •Low cost •Live at power-up •Maximum design security •Firm-error immune •Clock management •Advanced I/O standards •User nonvolatile FlashROM •Secure ISP •High performanceProASIC3/E DevicesProASIC3nanoThe lowest-cost solution with enhanced I/O capabilitiesActel’s innovative ProASIC3nano devices bring a new level of value and flexibility to high-volume markets. When measured against the typical project metrics of performance, cost, flexibility and time-to-market, ProASIC3nano devices provide an attractive alternative to ASICs and ASSPs in fast moving or highly competitive markets. Customer-driven total system cost reduction was a key design criteria for the ProASIC3nano program. Reduced device cost, availability of known good die,a single-chip implementation and a broad selection of small footprint packages all contribute to lower total system costs.83• 1.5 V core for low power•Known good die supported•350 MHz system performance •Embedded SRAM NVM •Firm-error immune •Enhanced commercial temperature •Enhanced I/O features •ISP and security •Reprogrammable flash technology •Zero lead-time on selected devices •CCCs and PLLsI/Os Per PackageProASIC3 nano DevicesNotes:1.A3PN030 is available in the Z feature grade only.2.A3PN030 and smaller devices do not support this feature.3.For higher densities and support of additional features, refer to the ProASIC3 and ProASIC3E handbooks.9ProASIC3Note:* AES is not available for Cortex-M1 ProASIC3L devices.ProASIC3LBalancing low power, performance and low costProASIC3L FPGAs feature 40 percent lower dynamic power and 90 percent lower static power than the previous generation ProASIC3 FPGAs and orders of magnitude lower power than SRAM competitors, combining dramatically reduced power consumption with up to 350 MHz operation. The ProASIC3L family also supports the free implementation of an FPGA-optimized 32-bit ARM Cortex-M1 processor, enabling system designers to select the Actel flash FPGA solution that best meets their speed and power design requirements, regardless of application or volume. Optimized software tools using power-driven layout (PDL) provide instant power reduction capabilities.I/Os Per PackageProASIC3L Low Power Devices•Low power 1.2 V to 1.5 Vcore operation•700 Mbps DDR, LVDScapable I/Os •Up to 350 MHz system performance •Enhanced I/O features •Embedded SRAM and NVM •Firm-error immune •ISP and security •Flash*Freeze technology for lowest power •Reprogrammable flash technology •CCCs and PLLs10SmartFusionThe intelligent mixed signal FPGASmartFusion intelligent mixed signal FPGAs are the only devices that integrate an FPGA, an ARM Cortex-M3 processor and programmable analog, offering full customization, IP protection and ease-of-use. Based on Actel’s proprietary flash process, SmartFusion FPGAs are ideal for hardware and embedded designers who need a true system-on-chip (SoC) that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.•Hard 100 MHz 32-bit ARMCortex-M3 CPU•Multi-layer AHB communicationsmatrix with up to 16 Gbpsthroughput•10/100 Ethernet MAC •Two peripherals of each type: SPI, I 2C and UART •Two cascadable 32-bit timers •Up to 512 KB flash and 64 KB SRAM •External memory controller (EMC)•8-channel DMA controller •Integrated analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) with 1 percent accuracy •On-chip voltage, current andtemperature monitors •Up to ten 15 ns high-speed comparators •Analog compute engine (ACE)offloads CPU from analog processing •Up to 35 analog I/Os and 169 digital GPIOs SmartFusion DevicesNote:1.Under definition. Subject to change.2.These functions share I/O pins and may not all be available at the same time.Notes:1.Under definition. Subject to change.2.16 MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for the MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5,3.3 V) standards.3.9 MSS I/Os are primarily for 10/00 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5 / 1.8 / 2.5, 3.3 V) standards.Package I/Os:MSS +FPGA I/Os11Fusion•Integrated A/D converter (ADC)with 8-, 10- and 12-bit resolution and 30 scalable analog input channels •ADC accuracy better than 1 percent •On-chip voltage, current and temperature monitors•In-system configurable analog supports a wide variety of applications•Up to 1 MB of user flash memory •Extensive clocking resources •Analog PLLs• 1 percent RC oscillator•Crystal oscillator circuit •Real-time counter (RTC)•Flash FPGA fabric •Reprogrammable •Live at power-up•Maximum design security•Ultra-low power •Firm-error immune •Clock management •Advanced I/O standards •User nonvolatile FlashROMNotes:1.Refer to the Cortex-M1 product brief for more information.2.Pigeon Point devices only offered in FG484 and FG256 packages.3.MicroBlade devices only offered in FG256 package.Notes:1.Pigeon Point devices only offered in FG484 and FG256 packages.2.MicroBlade devices only offered in FG256 package.3.These packages are available only as RoHS-compliant (QNG package specifier).4.AFS250 and AFS600 PQ208 devices are not pin-compatible.5.Available in RoHS-compliant and standard leaded packages.FusionPackage I/Os: Single-/Double-Ended (Analog)Fusion DevicesThe world’s first mixed signal FPGAActel Fusion integrates configurable analog, large flash memory blocks, comprehensive clock generation and management circuitry and high-performance,flash-based programmable logic in a monolithic device. Actel’s innovative Fusion architecture can be used with soft microcontroller cores, such the performance-optimized ARM Cortex-M1, 8051s or Actel’s own CoreABC, the smallest soft microcontroller for FPGAs.13123x3 UC36 0.404x4 UC81 0.405x5 CS81 0.506x6 CS121 0.506x6 QN48 0.408x8 CS196 0.508x8 QN68 0.408x8 QN132 0.508x8 CS201 0.5010x10 CS281 0.5013x13 FG144 1.0014x14 CS289 0.8014x14 VQ100 0.5014x14 VQ128 0.4017x17 FG256 1.0019x19 FG324 1.0020x20 TQ144 0.5020x20 VQ176 0.4023x23 FG484 1.0027x27 FG676 1.0028x28 PQ208 0.5031x31 FG896 1.002334495252496666344981120120771016096801579615771911376013384212972127110013360143/3587/1997/2468/13157/38151/34143/3597/25178/38194/38151/34215/5397/25177/43235/60154/35215/5397/25177/44300/74154/35165/79270/135147/65280/139444/222147/65221/110341/168147/65620/310Size (mm)NamePitch (mm)IGLOO/e IGLOO nano IGLOO PLUS ProASIC3/E ProASIC3 nano ProASIC3LAGLN010A3PN010AGL015AGLN015A3P015A3PN015AGLN020A3PN020AGL030AGLN030AGLP030A3P030A3PN030AGL060AGLN060AGLP060A3P060A3PN060AGL125AGLN125AGLP125A3P125A3PN125AGL250AGLN250A3P250A3PN250A3P250LAGL400A3P400AGL600A3P600A3P600L AGL1000A3P1000A3P1000L AGLE600A3PE600A3PE1500AGLE3000A3PE3000A3PE3000LIGLOO and ProASIC3 I/O TableNotes:# / # structure shows single-ended/double-ended I/Os.Please refer to the Actel website and appropriate product datasheets for the latest device information and valid ordering codes.I/O TableRefer to for information regarding previous generations of flash and antifuse FPGAs.FPGA PackagesThe bs dimension is the package body dimension exclusive of leads. The ps dimension is the overall package dimension inclusive of leads. Refer to the Actel Package Mechanical Drawings document located at /documents/PckgMechDrwngs.pdf for more information concerning package dimensions.FG896f IGLOOe1ProASIC3E1ProASIC3L1p s31x31 mmh 2.23 mmp 1.00 mmFG144f IGLOO1ProASIC31ProASIC3L1p s13x13 mmh 1.45 mmp 1.00 mmFG256f IGLOO1IGLOOeProASIC31, 2ProASIC3E2ProASIC3L1SmartFusionFusion1, 3, 4p s17x17 mmh 1.60 mmp 1.00 mmFG676f ProASIC3E1Fusion1p s27x27 mmh 2.23 mmp 1.00 mmFG484f IGLOO1IGLOOe1ProASIC31, 2ProASIC3E1, 2ProASIC3L1SmartFusionFusion1, 3p s23x23 mmh 2.23 mmp 1.00 mmFG324f ProASIC3E1ProASIC3L1p s19x19 mmh 1.63 mmp 1.00 mm1Includes Cortex-M1 devices.2FG256 and FG484 are footprint-compatible for ProASIC3 and ProASIC3E.3Pigeon Point devices are only offered in FG484 and FG256.4MicroBlade devices are only offered in FG256.Key:f–family bs–package body size excluding leads p s–overall package dimensions including package leads h–package thickness p–pin pitch/ball pitch14FlashPro4, ULINK, J-LINKHardware InterfacesMSS Configuration – Analog ConfigurationMSS Configurator*Design Entry and IP Libraries Simulation and Synthesis Compile and Layout Timing and Power AnalysisHardware DebugSoftware IDE(SoftConsole, Keil, IAR)Drivers and Sample Projects Application DevelopmentBuild Project Simulation Software Debug15* MSS configurator is specific to the SmartFusion design flow.Platinum Platinum EvaluationStandalone All devices All devices All devices RTL Obfuscatedx x16•Supports basic IGLOO PLUSlow power FPGA design, including Flash*Freeze mode •Free one-year Libero IDE software and Gold License •Low-cost programming stick (LCPS)• 5 V power supply and international adapters •Two USB cables•Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM•Board features -96x16 OLED display -All I/Os available for external connection -Full current measurement capability of independent I/O banks -LEDs and switches for simple inputs and outputs -USB connection for USB-to-serial (RS232) interface for HyperTerminal or power -20 MHz clock oscillator -LEDs and switches for simple inputs and outputs -Ability to switch V CORE from 1.2 V to 1.5 V -RoHS compliantJumpers for Battery OptionLCPS Connector USB Interface5 V Wall Jack FET SwitchesFET LEDsPush-Button Reset SwitchPotentiometerIGLOO PLUS FPGAI/O Test Pins Interface ConnectorOLED4 Push-Button Switches 8 User LEDs 8 DIP Switches Flash*Freeze SwitchJumpers toIsolate User LEDs, DIP Switches, and Push-Button Switches from I/O Test PinsAvailable Board Space for Surface Mount Optional 10-Pin Connector for Use with FlashPro3 ProgrammerJumpers for Voltage Selection and Current Management IGLOO Icicle Evaluation Kit•Supports IGLOO low power FPGA demonstration and evaluation,including Flash*Freeze mode•Free one-year Libero IDE software and Gold license •Low-cost programming stick (LCPS)•Battery powered via included lithium-ion battery with built-in charger from USB cable •Two USB cables•Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM •Board features -96x16 OLED display -On-board current sensor to demonstrate low power -Full current measurement capability of independent I/O banks and V CC -20 MHz resistor-set oscillator -Reset, LEDs and switches for simple inputs and outputs -Ability to switch V CC from 1.2 V to 1.5 V -RoHS compliantBlue OLED 96x16 DisplayIGLOO FPGAFlash*Freeze Indicator LEDSquare VQ100FootprintUSB ConnectorLCPS Connector3 User LEDsReset Momentary Push SwitchUser Input Momentary Push SwitchUser Input Momentary Push SwitchFlash*Freeze SwitchInterface Connector20 MHz Clock Oscillator IGLOO nano FPGAI/O Test PinHeadersUSB Interface 5 V Wall JackJumpers for Voltage OptionsJumper for BatteryOption4 Push-Button SwitchesLCPSConnectorPush-Button Reset SwitchFlash*Freeze SwitchCurrent MeasurementHeaders8 User LEDs8 DIP SwitchesJumpers toIsolate User LEDs, Push-Button Switches, DIP Switches for I/O Test Pins IGLOO PLUS Starter KitIGLOO nano Starter Kit17Development Kits•Supports royalty-free, industry-standard ARM Cortex-M1development •Free one-year Libero IDE software and Gold license with SoftConsole for program and debug •FlashPro3-compatible built-in programming • 5 V power supply and international adapters •Two USB cables•Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM •Board features- 1 MB of SRAM and 16 MB of flash memory provided on board -USB connection used for program and debug -USB connection for USB-to-serial (RS232) interface for HyperTerminal or power -Full current measurement capability of independent I/O banks and V CC-Socketed 48 MHz system clock -LEDs and switches for simple inputs and outputs -RoHS compliant40-Pin GPIO ConnectorsUSB Connection for Programming and DebugAbility to Measure FPGA Current on V AGL600-FGG256Device Fitted in 17x17 ArrayWall-Mount Power (optional)40-Pin GPIO Connectors8 LEDs8 Switches USB Connection for Serial RS232Interface and MainBoard PowerAbility to Measure FPGA Current on I/O Bank 3 and I/O Bank 2Ability to Measure FPGA Current on I/O Bank 1 and I/O Bank 0Jumper for V 1.2 V / 1.5 V Manual and Automatic SwitchingARM Cortex-M1 IGLOO Development KitWall Mount PowerInterboard ISP ConnectorLCD Display ModuleCAT5E RJ45Connectors for LVDSCommunications SMA for Optional External OscillatorRemovable Shunts toIsolate All I/Os for Prototyping Removable Shunts to Isolate All I/Os for Prototyping Oscillator forSystem Clock Manual Clock OptionFlashPro3 ISP ConnectorProASIC3/E in PQ208 Package 4 SwitchesEvery PQ208 Pin Accessible for Prototyping8 LEDsRemovable Shunts to Isolate All I/Os for PrototypingProASIC3 Starter Kit•Supports royalty-free, industry-standard ARM Cortex-M1development •Free one-year Libero IDE software and Gold license •SoftConsole for program and debug •FlashPro3 compatible built-in programming • 5 V power supply and international adapters •Two USB cables•Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM •Board features- 1 MB of SRAM and 16 MB of flash memory provided on board -USB connection used for program and debug -USB connection for USB-to-serial (RS232) interface for HyperTerminal or power -Full current measurement capability of independent I/O banks and V CC -Socketed 48 MHz system clock -LEDs and switches for simple inputs and outputs -RoHS compliantUSB Connection for Programming and DebugAbility to Measure FPGA Current on V M1A3P1000L-FGG484 Device Fitted in 23x23 ArrayWall-Mount Power (optional)40-Pin GPIO Connectors8 LEDs8 Switches USB Connection for Serial RS232Interface and MainBoard PowerAbility to Measure FPGA Current on I/O Bank 3 and I/O Bank 2Ability to Measure FPGA Current on I/O Bank 1 and I/O Bank 0Jumper for V 1.2 V / 1.5 V Manual and Automatic Switching40-Pin GPIO ConnectorsARM Cortex-M1 ProASIC3L Development KitNote:* Replaces AGL-DEV-KIT-SCS and M1AGL-DEV-KIT-SCS Development Kits.•Supports SmartFusion evaluation,including ARM Cortex-M3, FPGA and programmable analog •Free one-year Libero Integrated Design Environment (IDE) software and Gold license with SoftConsole for program and debug •Two USB cables•User’s guide, tutorial and design examples •Printed circuit board (PCB)schematics, layout files and bill-of-materials (BOM)•Board features -Ethernet interface -USB port for power and HyperTerminal -USB port for programming and debug -J-Link header for debug -Mixed signal header -SPI flash – off-chip memory -Reset and 2 user switches, 8 LEDs -POT for voltage / current monitor -Temperature monitor-Organic light-emitting diode (OLED)18•Supports power management design with the SmartFusion Evaluation Kit and SmartFusion Development Kit•MPM design example implements configurable power management in SmartFusion •Graphical configuration dialog•In-system reconfigurable •9 V power supply •Board features- 4 power supply regulators - 4 potentiometers to control regulators - 4 power supply regulator interrupt switches - 4 power supply regulator status LEDs -Mixed signal header connector connects to SmartFusion boardMPM 9 V JackMPM Power SwitchPower Supply Regulator REG1 - REG4 Interrupt Switches (SW8, SW11, SW16, SW15)Mixed Signal HeaderPower Supply Regulator REG1 - REG4 PotentiometersPower Supply Regulators R1 - R4 LEDsMPM Daughter Card10/100Ethernet Interface Regulators USB Program and Debug InterfaceSmartFusion DeviceUser SW2USB Power and USB-UART InterfacePotentiometerReset Switch 5 Debug I/Os 8 User LEDs Debug SelectJTAG Select OLED DisplayRVI - HeaderSPI-Flash MemoryPUB Switch VRPSMVoltage Option20 MHz Crystal 32.768 KHz CrystalUser SW1Mixed Signal Header SmartFusion Evaluation KitDirectC Header Board ResetSwitchPower Jack Memory Device ConfigurationHeadersAGLP DIP Switch AGLP125V5-CSG289IGLOO PLUSHeader 10/100 EthernetPHYRJ45 Connector for 10/100 Ethernet Power Switch DACOUT/ADC Headers RJ45 Connectorsfor EtherCATPorts SmartFusionDeviceDB9Connectorfor CAN0SRAM (3.3 V)CAN TransceiversDB9 Connector for CAN1A2F500 ConnectorPSRAM (1.8 V)LCPS Connector DIP Switch JTAG_SEL Switch JTAG ChainConfiguration Header 1.5 V Header PUB Switch RS485 Transceiver DB9 Connector for RS485 (UART1)50 MHz Oscillator SPI Headers I 2C Headers USB Connector for UART0OLEDPush-ButtonSwitches RealView Header JTAG MUXEtherCAT PHYs DAC0 and DAC1Callibration POTs for ±15 V Bipolar OutputsPOT for Current Monitor Mixed Signal HeaderEtherCAT ASIC19Development Kits•Supports basic Fusion FPGA design and LVDS I/O usage •Free one-year Libero IDE software and Gold license•FlashPro3 or FlashPro4programmer •9 V power supply and international adapters •Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM•Board features-Independent variable I/O bank settings -On-chip 1 percent RC oscillator, a crystal oscillator circuit and PLLs support system clock generation -LEDs and switches for simple inputs and outputs -LCD display module-Multi-color LED illustrates temperature changes andpulse width modulation (PWM) fan control -RoHS compliantWall Mount PowerPotentiometer for Variable Analog InputInterboard ISP ConnectorLCD Display Module40-Pin HeaderReset PulseSingle ClockPulse Removable Shunts toIsolate All I/Os for Prototyping Removable Shunts to Isolate All I/Os for PrototypingFlashPro3 ISP ConnectorFusion inFG256 Package 4 Input SwitchesPUB SwitchInputEvery FG256 Pin Accessible for Prototyping8 LEDsUserLEDs LCPS ConnectorOLEDMixed Signal Test PinsMixed Signal Header Push-Button Switch Fusion FPGA SPI FlashEthernet InterfaceRealView Header Push-Button Switch Interface ConnectorUSB InterfacePush-Button PUB Two I 2C Interfaces PotentiometerPush-Button Reset SRAM 5 V Wall Jack Ethernet LEDsJumpers for Internal or External RegulatorFusion Embedded Development KitFusion Starter Kit•Supports royalty-free, industry-standard ARM Cortex-M1 or 8051s development •Free one-year Libero IDE software and Gold license with SoftConsole for program and debug •Low-cost programming stick (LCPS)•Kit user’s guide, Libero IDE tutorial and design examples •PCB schematics, layout files and BOM•Board features-16 MB SRAM, 2 MB SPI flash,128-Mbit parallel flash -10/100 Ethernet, USB-to-UART and I 2C interfaces -Built-in voltage, current and temperature monitor -Mixed signal interface-Blue OLED 96x16 pixel display -Dynamic reconfigurable analog and flash memory -FlashPro3 and RealView debug interface -RoHS compliantOLED DisplayLegacy ConnectorSPI Flash MemoryRealView Header SRAM/Flash MemoryNavigation-Style Push SwitchesUSB/UART Battery Area Main 9 V Jack Main PowerSwitch User LEDs DirectC HeaderPotentiometer Ethernet Connector DIP SwitchesI 2C Header 50 MHz Oscillator 32 KHz OscillatorM1AFS1500-FGG484Push-Button Reset Power LCPSConnectorTemperature Diode Mixed Signal HeaderInterface ConnectorMPM 9 VJack MPM AreaPush-ButtonPUBMPM PowerSwitchCurrent Sensor Gate DriverInternal Voltage RegulatorFusion Advanced Development KitNote:* Includes two 9 V power supplies20•Allows users to evaluate the functionality of Actel’sCore1553BRM without having to create a complete MIL-STD-1553B compliant system •Fusion Advanced Development Kit with two 9 V power supplies •Core1553 daughter card •User’s guide, tutorial and design example •PCB schematics, layout files and BOM •Purchasing the kit gives the owner the right to the programming file of the demo, but not an evaluation of the IP . The IP evaluation or purchase is quoted separately.•Board features-MIL-STD-1553B transceiver, two transformers and two concentric twinax connectors included on the Core1553 daughter board ~MIL-STD-1553B concentric twinax connectors are center pin signal high and cylindrical contact signal low ~Connectivity isMIL-C-49142 compliant~Evaluate and develop medium speed on-board datacommunications bus solutions for MIL-STD-1553B /UK DEF-STAN 00-18 (Pt.2) /NATO STANAG 3838 AVS /Avionic Standards Coordinating Committee Air-Std 50/2-CAN bus interface support -Connector to ARINC 429Daughter Board (CORE429-SA)Fusion Advanced Development KitCore1553-SAFusion Advanced Development KitIP Daughter CardCore429 Daughter CardCore429 Development KitCore1553 Development Kit•Allows avionics designers toevaluate the functionality of Actel’s Core429 with a full development kit that includes ARINC 429example software, Core429programming files, ARINC 429physical connections and full user documentation •Fusion Advanced Development Kit with two 9 V power supplies •Core429 daughter card •IP daughter card •Core429 loopback cable •User’s guide, tutorial and design example •PCB schematics, layout files and BOM •Purchasing the kit gives the owner the right to the programming file of the demo, but not an evaluation of the IP . The IP evaluation or purchase is quoted separately.•Core429 daughter card-Line drivers and receivers needed to transmit and receive ARINC 429data on an ARINC 429 data bus -Four male DB9 connectors; one for each channel in the Core429demonstration design -Connector to the IP Daughter Card board using the 90-pin C429interface connector •IP daughter card- Buffer between the FusionAdvanced Development Kit board and the Core429 Daughter Card ~Controller–area network (CAN)bus interface support. The DB9connector and connectivitysupports CAN bus development。

Microsemi 宣布收购Actel

新闻稿Microsemi宣布收购Actel-- 增强Microsemi在各终端市场的混合信号产品线-- 扩展 Microsemi的系统级解决方案与可编程 SoC能力-- 扩展航天、军事和工业领域的产品门槛-- 提供即时 EPS增长与协同优势领先的高性能模拟和混合信号集成电路与高可靠性半导体和射频子系统制造商美高森美公司(Microsemi Corporation) 宣布，已与爱特公司(Actel Corporation)达成最终协议，将以每股20.88美元的现金邀约收购爱特公司。

这次收购的最终总交易金额为爱特的预计现金结余净值，约为4.3亿美元。

爱特公司总部位于美国加利福尼亚州Mountain View，是低功耗、耐辐射混合信号现场可编程门阵列(FPGA)的领先供应商，其产品广泛用于军事/航天、工业、通信以及消费者产品市场。

该公司凭着在太空级耐辐射认证技术的深厚专业知识，成为卫星与太空FPGA市场的领导厂商，并以卓越的服务质量长期享誉业内。

美高森美公司总裁兼首席执行官James J. Peterson 表示：“我们相信爱特的加盟会给美高森美带来引人注目的协同优势。

爱特将为现今航天与军事市场提供最广泛运用的混合信号耐辐射FPGA产品，而且该公司的产品将有助于美高森美拓展自己不断增长的系统级专业能力。

随着美高森美不断提升价值链，为客户提供更好、更快、更具成本效益的系统解决方案，爱特的高集成度解决方案将成为实现这种增长不可或缺的一部分。

”爱特公司总裁兼全球首席执行官John C. East 表示：“美高森美对爱特的建议收购将催生出一个强大的整合。

我认为没有任何其它公司能与爱特有更佳的互补，而且更能爱特的解决方案推向新的高峰。

”美高森美期望这次即时提升价值的交易将带来显著协同优势。

从目前的情况推测，美高森美预计该次收购将使其截至2011年12月底的首个全财政年度的每股利润增加0.22到0.28美元。

在9月份结束的财政季度内，美高森美的净销售额预计在1.46到1.5亿美元之间。

芯片封装选型指南!

芯片封装选型指南！简介半导体芯片封装技术经过多年的发展，今天已有数百种封装类型。

大多数应用需要更通用的单个元件封装，用于封装集成电路和其他元件，如电阻器，电容器，天线等。

然而，随着半导体行业开发出更小、更强大的器件，“系统封装”（SiP）类型的解决方案正在成为首选，即所有元件都放在一个单独的封装或模组中。

虽然封装类型可以很容易地分为引线框架封装、基板封装或晶圆级封装，但选择适合你所有需求的封装则要复杂一些，需要评估和平衡应用需求。

要做出正确的选择，你必须了解多个参数的影响，比如热需求、功率、连接性、环境条件、PCB组装能力，当然还有成本。

本文介绍了需要评估的七个不同的关键要求，以便选择合适的封装技术。

常用封装技术多年来，封装技术不断发展，今天，通过使用不同的连接和组装方法，有多种封装类型可供选用。

本文主要讨论目前最常用的四种封装：BGA、QFN、WLCSP和eWLB。

BGA（球栅阵列）是一种封装选择，适用于需要大量I/O连接的IC。

BGA的优点包括低电感和良好的散热选择。

缺点是，检测和故障检测比较困难，与QFN等其它封装相比，成本可能更高。

QFN（方形扁平无引脚封装）是目前最受欢迎的半导体封装之一，它成本低，外形小巧，电气性能和热性能良好。

QFN的缺点包括引脚数量少、潜在的氧化问题，以及在长寿命、恶劣环境下的可靠性。

WLCSP（扇入式晶圆级CSP）本质上是一个凸起的裸片，因此可以提供尽可能小的封装尺寸，因为它与芯片尺寸相同。

WLCSP具有合理的低成本、小尺寸和良好的电气性能，但可能不太适合高引脚数量的应用。

eWLB（嵌入式晶圆级球栅阵列）在原始晶圆下使用内插晶圆，以实现扇出和更多的互连布线空间。

这样就产生了更大的裸片面积，解决了WLCSP的互连问题。

eWLB正在成为消费ASIC和无线ASIC的首选。

应用类别：成本vs性能你的目标应用是决定封装选择的主要驱动力。

你的应用环境如何？你是在芯片上开发一个系统，还是将ASIC作为系统中的一个关键组件？这些问题将会帮助你决定封装的类型——你是否可以使用晶圆级或芯片大小的封装，还是使用标准的、更容易获得的BGA或QFN类型的封装更合适？应用性能要求和相应的封装选项大致可分为三类：高端应用要求通常与具有大量连接（大量引脚输出）的高速、高功率芯片有关。

ACTEL半导体FPGA选型指南

M3硬核和FPGA逻辑的结合是一种突破，但其极其灵活的通信方式却是其无可比拟的优势，AHB、APB、GPIO、总线、中断等多种方式实现Cortex-M3和FPGA内核之间的通信，让您的设计更加随心所欲。
CoreABC
CoreABC主要特性 ◎ 极快的I/O响应速度(＜100ns)； ◎ 高可配置性并且可轻易裁剪以满足用户
销售服务电话： (020) 38730619 38732221 技术支持电话： (020) 28872345 28267809 技术支持邮箱：zlgactel@ Actel.marketing@
Actel提供业界标准的处理器

Actel强大Leabharlann 理器平台:Cortex-M1在FPGA中的应用权衡了面积和速度的利益，提供了一个折中的方案，采用三级流水线模式和ARMv6-M指令集，支持指令和数据的TCM（Tightly Coupled Memories）模式，带有可配置的中断控制器；可选择带有调试模块或不带有调试模块的内核；基于 CoreConsole的IP系统平台软件进行开发，可以将Cortex-M1内核无缝连接到AHB总线上，并且非常容易的让用户裁减外设的部件。
SFR接口添加了高级外设总线（APB）接口。这样，设计人员便可以搭建根据自己需要的8051系统，在APB总线上任意挂接外设，并对其进行配置，以满足它们特殊的应用要求。 Core8051s的速率还非常快，且可以运行现有的8051代码和使用现有的8051开发工具。
Core8051与Core8051s特性:
● 硬件支持使用 Actel公司提供的 FlashPro3 USB下载器，通过
CoreConsole和 Libero软件对器件下载编程以及使用基于 SoftConsole软件在系统调试，同样也支持第三方厂商标准的调试工具。

M1A3P400-FFGG144中文资料(Actel)中文数据手册「EasyDatasheet - 矽搜」

* 为-F速度等级目标DC和开关特性只是基于模拟. 规定-F速度等级特点是主题建立FPGA规格后更改.一些限制可能会增加,并会反映在该文档后续版本.该-F速度等级只在商用温度范围内支持.
v1.0
III
芯片中文手册,看全文,戳
温度等级奉献
包裹
A3P015 A3P030
ARM7设备
在零件号"G". 6. M1A3P250设备不支持FG256或QN132包.
表 1-1•
ProASIC3 FPGA包装规格尺寸
包裹
QN68
长 ×宽
8×8
（毫米 \毫米）
标称面产品
64
(mm 2)
间距（ mm）
0.4
高度（ mm）
0.90
QN132 8×8
64
0.5 0.75
VQ100 14 × 14
• 单芯片解决方案
• 防护留编程设计时已关闭
高性能
•350 MHz系统性能
•3.3 V,66 MHz64位PCI
†
在系统编程（ ISP）和安全性
•安全ISP使用片上128位高级加密
标准（AES）解密（除ARM功能ProASIC
通过JTAG器件）（IEEE 1532兼容）
†
• FlashLock ® 以安全FPGA内容
A3P600 = 60万系统门 A3P1000 = 1,000,000个系统门
ProASIC3器件与 ARM7
M7A3P1000 = 1,000,000个系统门
ProASIC3器件具有 Cortex-M1
M1A3P250 = 250000系统门
M1A3P400 = 400000系统门 M1A3P600 = 600000个系统门 M1A3P1000 = 百万个系统门

Identify使用教程

(1) 采样时钟
采样时钟是必须需要而且必须设置的。一般是把一个系统的输入时钟作为采样时钟，如在本例程中把输入时钟 clk 作为采样时钟。在 clk 附近点击鼠标左键，选中 Sample Clock，再点击鼠标左键。会在 Sample Clock 前面打对勾。说明设置成功。
(2) 设置最少一个触发条件产品应用笔记
设置完成后，在点击图 1.8 工具栏所示的蓝色框中的按钮。打开图 1.11Identify Instrumentor 所示。
产品应用笔记
©2008 Guangzhou ZHIYUAN Electronics CO., LTD. vi
广州致远电子有限公司
Identify 使用教程
Actel FPGA 使用教程
使用技巧：最好把一个工程中要观测的信号都设置为“Sample and Trigger”，不要单选为“Sample only”或“Trigger only”。原因是当改变一个信号的触发属性的时候，要从综合，布局布线，下载等重新跑一遍，这样就很浪费时间。
(3) JTAG 设置
在 Identify Instrumentor 界面中点击蓝色框中的按钮，如图 1.13 切换界面所示的按钮，切换到如图 1.14JTAG 设置所示的界面。
1.2 软硬件要求
安装 Actel Libero IDE v8.2 开发环境；安装 Synplify Pro Actel Edition 9.0.2A 综合工具；有一个有效的 License 供 Libero，Synplify 和 Identify 使用； Flash Pro3 下载器一个。 Actel FPGA 开发板。
图 1.12 触发条件
Sample and trigger:选中的信号即使当作触发信号，也是采样记录的信号。 Sample only：选中的信号只能进行采样。 Trigger only：选中的信号只能进行触发。 Not instrumented：不触发也不采样，所有信号的默认选择。 Sample Clock：用于设置采样时钟，采样时钟是必须设置的

ACTEL公司及产品介绍

Xilinx
90nm
1,936
405
XC2V1000
SRAM
Altera
0.13µm
Not
453
EP1C20
SRAM Measured
Equivalent Functional Failure FIT Rates per Device
Ground-Level Applications
Commercial Military Aviation Aviation
30
ACTEL公司产品的主要特点和优势
静态电流比较表
31
ACTEL公司产品的主要特点和优势
动态功耗
• 是指FPGA在工作时，内部逻辑和I/O状态翻转引起的功耗。
• SramFPGA中，一个开关由6个晶体管组成，导致动态功耗较高。FlashFPGA动态功耗低。
32
ACTEL公司产品的主要特点和优势
39
ACTEL公司产品的主要特点和优势
7．真正的单芯片解决方案
• Flash架构的FPGA不需要外加一个配置芯片，而且功耗更低。
• 为用户提供丰富的IP核资源。 • ACTEL的FUSION系列内部带模/数转换功能，有电
流监控，电压监控等。 • SmartFusion系列产品内部集成了Cortem-M3硬核，
28
ACTEL公司产品的主要特点和优势
Spartan系列FPGA的配置电流
29
静态功耗
ACTEL公司产品的主要特点和优势
• 又称待机功耗，是指在电源打开的情况下，I/O状态没有翻转时器件的功耗。
• SramFPGA中，一个开关由6个晶体管组成，导致静态功耗较高。FlashFPGA静态功耗低。

全球十大FPGA厂商及其代理商(附其代理商与兼并史)

全球十大FPGA厂商及其代理商（附其代理商与兼并史）1Altera（阿尔特拉）总部：美国官网：https://是世界上“可编程芯片系统”（SOPC）解决方案倡导者。

结合带有软件工具的可编程逻辑技术、知识产权(IP)和技术服务，在世界范围内为14,000多个客户提供高质量的可编程解决方案。

新产品系列将可编程逻辑的内在优势——灵活性、产品及时面市——和更高级性能以及集成化结合在一起，专为满足当今大范围的系统需求而开发设计。

全面的产品组合不但有器件，而且还包括全集成软件开发工具、通用嵌入式处理器、经过优化的知识产权(IP)内核、参考设计实例和各种开发套件等。

Altera 近年收购兼并史：2013.5.15，收购Enpirion(电源芯片制造商)，金额：未透露，目的：提供突破性FPGA电源方案2013.4.16，收购TPACK(Applied Micro Circuits Corporation 全资子公司)，金额：未透露，目的：加快实施和拓展其光传输网络解决方案路线图2015.5.29，Intel收购Altera ，金额：150亿美元Altera 代理商：(1)(骏龙科技有限公司官网：/地址：中国广东省深圳市南山区华侨城汉唐大厦25层(2)Arrow(艾睿) 艾睿电子中国有限公司，总部位于美国科罗拉多州，是全球第二大的元器件分销商，提供元器件产品，服务与解决方案。

官网：(3)北京天涯泰盟科技有限公司官网：/(4)深圳广盛电子有限公司官网：/(5)深圳市汇佳成电子有限公司官网：http://www.hjc-/(6)北京卓越飞讯科技有限公司官网：/(7)深圳正沃电子有限公司官网：/(8)阳城电子国际有限公司官网：http://www.yc-/2Xilinx（赛灵思）总部：美国官网：Xilinx(赛灵思)是全球领先的可编程逻辑完整解决方案的供应商。

研发、制造并销售范围广泛的高级集成电路、软件设计工具以及作为预定义系统级功能的IP(Intellectual Property)核。