SN74ALVCH373PWR,SN74ALVCH373PWR,SN74ALVCH373PWR,SN74ALVCH373DGVR, 规格书,Datasheet 资料

FEATURESDGV, DW, OR PW PACKAGE(TOP VIEW)CC DESCRIPTION/ORDERING INFORMATIONSN74ALVCH373OCTAL TRANSPARENT D-TYPE LATCHWITH3-STATE OUTPUTSSCES116H–JULY1997–REVISED OCTOBER2004•Operates From1.65V to3.6V•Max t pd of3.3ns at3.3V•±24-mA Output Drive at3.3V•Bus Hold on Data Inputs Eliminates the Needfor External Pullup/Pulldown Resistors•Latch-Up Performance Exceeds100mA PerJESD78,Class II•ESD Protection Exceeds JESD22–2000-V Human-Body Model(A114-A)–200-V Machine Model(A115-A)–1000-V Charged-Device Model(C101)This octal transparent D-type latch is designed for1.65-V to3.6-V V CC operation.The SN74ALVCH373is particularly suitable for implementing buffer registers,I/O ports,bidirectional bus drivers, and working registers.While the latch-enable(LE)input is high,the Q outputs follow the data(D)inputs.When LE is taken low,the Q outputs are latched at the logic levels set up at the D inputs.A buffered output-enable(OE)input can be used to place the eight outputs in either a normal logic state(high or low logic levels)or the high-impedance state.In the high-impedance state,the outputs neither load nor drive the bus lines significantly.The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.OE does not affect the internal operations of the latches.Old data can be retained or new data can be entered while the outputs are in the high-impedance state.To ensure the high-impedance state during power up or power down,OE should be tied to V CC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.Active bus-hold circuitry holds unused or undriven inputs at a valid logic e of pullup or pulldown resistors with the bus-hold circuitry is not recommended.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKINGTube SN74ALVCH373DWSOIC-DW ALVCH373Tape and reel SN74ALVCH373DWRTSSOP-PW Tape and reel SN74ALVCH373PWR VB373 -40°C to85°CTVSOP-DGV Tape and reel SN74ALVCH373DGVR VB373VFBGA-GQN SN74ALVCH373GQNRTape and reel VB373VFBGA-ZQN(Pb-free)SN74ALVCH373ZQNR(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Copyright©1997–2004,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.GQN OR ZQN PACKAGE(TOP VIEW)ED C B A 2134OETo Seven Other ChannelsLE1D1QPin numbers shown are for the DGV, DW, and PW packages.SN74ALVCH373OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTSSCES116H–JULY 1997–REVISED OCTOBER 2004TERMINAL ASSIGNMENTS1234A 1Q OE V CC 8Q B 2D 7D 1D 8D C 3Q 2Q 6Q 7Q D 4D 5D 3D 6D EGND4QLE5QFUNCTION TABLE(each latch)INPUTSOUTPUTQOE LE D L H H H L H L L L L X Q 0HXXZLOGIC DIAGRAM (POSITIVE LOGIC)2ABSOLUTE MAXIMUM RATINGS(1) RECOMMENDED OPERATING CONDITIONS(1)SN74ALVCH373 OCTAL TRANSPARENT D-TYPE LATCHWITH3-STATE OUTPUTS SCES116H–JULY1997–REVISED OCTOBER2004over operating free-air temperature range(unless otherwise noted)MIN MAX UNITV CC Supply voltage range-0.5 4.6VV I Input voltage range(2)-0.5 4.6VV O Output voltage range(2)(3)-0.5V CC+0.5VI IK Input clamp current V I<0-50mAI OK Output clamp current V O<0-50mAI O Continuous output current±50mAContinuous current through V CC or GND±100mADGV package92DW package58θJA Package thermal impedance(4)°C/WGQN/ZQN package78PW package83T stg Storage temperature range-65150°C (1)Stresses beyond those listed under"absolute maximum ratings"may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated under"recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.(3)This value is limited to4.6V maximum.(4)The package thermal impedance is calculated in accordance with JESD51-7.MIN MAX UNITV CC Supply voltage 1.65 3.6VV CC=1.65V to1.95V0.65×V CCV IH High-level input voltage V CC=2.3V to2.7V 1.7VV CC=2.7V to3.6V2V CC=1.65V to1.95V0.35×V CCV IL Low-level input voltage V CC=2.3V to2.7V0.7VV CC=2.7V to3.6V0.8V I Input voltage0V CC VV O Output voltage0V CC VV CC=1.65V-4V CC=2.3V-12I OH High-level output current mAV CC=2.7V-12V CC=3V-24V CC=1.65V4V CC=2.3V12I OL Low-level output current mAV CC=2.7V12V CC=3V24∆t/∆v Input transition rise or fall rate5ns/VT A Operating free-air temperature-4085°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs,literature number SCBA004.3ELECTRICAL CHARACTERISTICSTIMING REQUIREMENTSSN74ALVCH373OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTSSCES116H–JULY 1997–REVISED OCTOBER 2004over recommended operating free-air temperature range (unless otherwise noted)PARAMETERTEST CONDITIONSV CCMIN TYP (1)MAXUNITI OH =-100µA 1.65V to 3.6VV CC -0.2I OH =-4mA 1.65V 1.2I OH =-6mA2.3V 2V OH2.3V 1.7VI OH =-12mA 2.7V 2.23V 2.4I OH =-24mA 3V 2I OL =100µA 1.65V to 3.6V0.2I OL =4mA1.65V 0.45I OL =6mA2.3V 0.4V OLV 2.3V 0.7I OL =12mA 2.7V 0.4I OL =24mA3V 0.55I IV I =V CC or GND 3.6V ±5µA V I =0.58V 1.65V 25V I =1.07V 1.65V -25V I =0.7V2.3V 45I I(hold)V I =1.7V 2.3V -45µAV I =0.8V 3V 75V I =2V 3V -75V I =0to 3.6V (2)3.6V ±500I OZ V O =V CC or GND 3.6V ±10µA I CC V I =V CC or GND,I O =03.6V 20µA ∆I CC One input at V CC -0.6V,Other inputs at V CC or GND3V to 3.6V 750µA Control inputs 4.5C i V I =V CC or GND 3.3V pF Data inputs 5C o OutputsV O =V CC or GND3.3V7.5pF (1)All typical values are at V CC =3.3V,T A =25°C.(2)This is the bus-hold maximum dynamic current.It is the minimum overdrive current required to switch the input from one state to another.over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)V CC =2.5V V CC =3.3V V CC =1.8V V CC =2.7V ±0.2V ±0.3V UNITMINMAXMIN MAXMIN MAXMIN MAXt w Pulse duration,LE high 3.8 3.3 3.3 3.3ns t su Setup time,data before LE ↓ 1.30.50.50.5ns t hHold time,data after LE ↓0.51.31.71.2ns 4SWITCHING CHARACTERISTICS OPERATING CHARACTERISTICSSN74ALVCH373 OCTAL TRANSPARENT D-TYPE LATCHWITH3-STATE OUTPUTS SCES116H–JULY1997–REVISED OCTOBER2004over recommended operating free-air temperature range(unless otherwise noted)(see Figure1)V CC=1.8V V CC=2.5V V CC=3.3VV CC=2.7VFROM TO±0.15V±0.2V±0.3V PARAMETER UNIT (INPUT)(OUTPUT)MIN MAX MIN MAX MIN MAX MIN MAXD 1.7 6.31441 3.6t pd Q nsLE2 6.11 3.8 3.71 3.3 t en OE Q 3.48.3 1.9 5.4 5.4 1.6 4.8nst dis OE Q 1.671 4.4 4.41 4.4nsTA=25°CV CC=1.8V V CC=2.5V V CC=3.3VTESTPARAMETER UNITCONDITIONS TYP TYP TYPOutputs enabled313337 Power dissipationC pd C L=0,f=10MHz pFcapacitance per latch Outputs disabled7795PARAMETER MEASUREMENT INFORMATIONV OH V OLFrom Output Under TestLOAD CIRCUITOpen Output Control (low-level enabling)Output Waveform 1S1 at V LOAD (see Note B)Output Waveform 2S1 at GND (see Note B)0 V0 VV I 0 V0 VV IV IVOLTAGE WAVEFORMS SETUP AND HOLD TIMESVOLTAGE WAVEFORMS PULSE DURATIONVOLTAGE WAVEFORMS ENABLE AND DISABLE TIMESTiming InputData InputInputt pd t PLZ /t PZL t PHZ /t PZHOpen V LOAD GNDTEST S1NOTES: A.C L includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z O = 50 Ω.D.The outputs are measured one at a time, with one transition per measurement.E.t PLZ and t PHZ are the same as t dis .F.t PZL and t PZH are the same as t en .G.t PLH and t PHL are the same as t pd .H.All parameters and waveforms are not applicable to all devices.0 VV IInputOutputVOLTAGE WAVEFORMS PROPAGATION DELAY TIMESV LOAD /21.8 V ± 0.15 V2.5 V ± 0.2 V2.7 V3.3 V ± 0.3 V1 k Ω500 Ω500 Ω500 ΩV CC R L 2 × V CC 2 × V CC 6 V 6 VV LOAD C L 30 pF 30 pF 50 pF 50 pF0.15 V 0.15 V 0.3 V 0.3 VV ∆V CC V CC 2.7 V 2.7 VV I V CC /2V CC /21.5 V 1.5 VV M t r /t f ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 nsINPUT SN74ALVCH373OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTSSCES116H–JULY 1997–REVISED OCTOBER 2004Figure 1.Load Circuit and Voltage Waveforms6Addendum-Page 1PACKAGING INFORMATIONOrderable Device Status(1)Package Type PackageDrawingPins Package QtyEco Plan(2)Lead/Ball FinishMSL Peak Temp(3)Samples (Requires Login)74ALVCH373DGVRE4ACTIVE TVSOP DGV 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74ALVCH373DGVRG4ACTIVE TVSOP DGV 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DGVR ACTIVE TVSOP DGV 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DW ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DWE4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DWG4ACTIVE SOIC DW 2025Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DWR ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DWRE4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373DWRG4ACTIVE SOIC DW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373PWR ACTIVE TSSOP PW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373PWRE4ACTIVE TSSOP PW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373PWRG4ACTIVE TSSOP PW 202000Green (RoHS & no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74ALVCH373ZQNRACTIVEBGA MICROSTAR JUNIORZQN201000Green (RoHS & no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.芯天下--/(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.Addendum-Page 2芯天下--/TAPE AND REELINFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74ALVCH373DGVR TVSOP DGV 202000330.012.4 6.9 5.6 1.68.012.0Q1SN74ALVCH373DWR SOIC DW 202000330.024.410.813.0 2.712.024.0Q1SN74ALVCH373PWR TSSOP PW 202000330.016.4 6.957.1 1.68.016.0Q1SN74ALVCH373ZQNRBGA MI CROSTA R JUNI ORZQN201000330.012.43.34.31.68.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) SN74ALVCH373DGVR TVSOP DGV202000367.0367.035.0 SN74ALVCH373DWR SOIC DW202000367.0367.045.0 SN74ALVCH373PWR TSSOP PW202000367.0367.038.0SN74ALVCH373ZQNR BGA MICROSTARJUNIOR ZQN201000340.5338.120.6IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components which meet ISO/TS16949requirements,mainly for automotive ponents which have not been so designated are neither designed nor intended for automotive use;and TI will not be responsible for any failure of such components to meet such requirements.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Mobile Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2012,Texas Instruments Incorporated。