MC-4216LFF72中文资料

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MC4046应用

3.1 锁相环CD4046原理及应用3.1.1锁相环路的构成锁相的意义是相位同步的自动控制，能够完成两个电信号相位同步的自动控制闭环系统叫做锁相环，简称PLL。

它广泛应用于广播通信、频率合成、自动控制及时钟同步等技术领域。

锁相环主要由相位比较器（PD）、压控振荡器（VCO）、低通滤波器三部分组成，如图1所示图1 锁相环路的基本组成框图压控振荡器的输出Uo接至相位比较器的一个输入端，其输出频率的高低由低通滤波器上建立起来的平均电压Uc大小决定。

施加于相位比较器另一个输入端的外部输入信号Ui与来自压控振荡器的输出信号Uo相比较，比较结果产生的误差输出电压Ud正比于Ui和Uo 两个信号的相位差，经过低通滤波器滤除高频分量后，得到一个平均值电压Uc。

这个平均值电压Uc朝着减小VCO输出频率和输入频率之差的方向变化，直至VCO输出频率和输入信号频率获得一致。

这时两个信号的频率相同，两相位差保持恒定（即同步）称作相位锁定。

当锁相环入锁时，它还具有“捕捉”信号的能力，VCO可在某一范围内自动跟踪输入信号的变化，如果输入信号频率在锁相环的捕捉范围内发生变化，锁相环能捕捉到输人信号频率，并强迫VCO锁定在这个频率上。

锁相环应用非常灵活，如果输入信号频率f1不等于VCO 输出信号频率f2，而要求两者保持一定的关系，例如比例关系或差值关系，则可以在外部加入一个运算器，以满足不同工作的需要。

过去的锁相环多采用分立元件和模拟电路构成，现在常使用集成电路的锁相环，CD4046是通用的CMOS锁相环集成电路，其特点是电源电压范围宽（为3V－18V），输入阻抗高(约100MΩ)，动态功耗小，在中心频率f0为10kHz下功耗仅为600μW，属微功耗器件。

3.1.2CD4046的引脚排列，采用 16 脚双列直插式，各引脚功能如下：图1脚相位输出端，环路人锁时为高电平，环路失锁时为低电平。

2脚相位比较器Ⅰ的输出端。

3脚比较信号输入端。

MC-428LFF721中文资料

©1996MOS INTEGRATED CIRCUITMC-428LFF7213.3 V OPERATION 8M-WORD BY 72-BIT DYNAMIC RAM MODULEUNBUFFERED TYPE, EDODATA SHEETThe mark Z shows major revised points.Document No. M11912EJ3V0DS00 (3rd edition)Date Published October 1997 NS Printed in JapanThe information in this document is subject to change without notice.DescriptionThe MC-428LFF721 is a 8,388,608 words by 72 bits dynamic RAM module on which 9 pieces of 64M DRAM :µPD4264805 are assembled.This module provides high density and large quantities of memory in a small space without utilizing the surface-mounting technology on the printed circuit board.Decoupling capacitors are mounted on power supply line for noise reduction.Features• Unbuffered type • EDO (Hyper page mode)• 8,388,608 words by 72 bits organization • Fast access and cycle timeFamilyAccess time R/W cycle timeEDO (Hyper page mode)Power consumption (MAX.)(MAX.)(MIN.)cycle time (MIN.)Active Standby MC-428LFF721-A5050 ns 84 ns 20 ns 3.40 W 16.2 mW MC-428LFF721-A6060 ns104 ns25 ns3.08 W(CMOS level input)• Refresh cycleFamilyRefresh cycleRefreshMC-428LFF721-A508,192 cycles / 64 ms /RAS only refresh, Normal read / write MC-428LFF721-A604,096 cycles / 64 ms/CAS before /RAS refresh, Hidden refresh• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)• Single +3.3 V ± 0.3 V power supply • Serial PD2Ordering InformationPart numberAccess time (MAX.)PackageMounted devicesMC-428LFF721FH-A5050 ns 168-pin Dual In-line Memory Module (Socket Type)9 pieces of µPD4264805G5(400 mil TSOP(II))MC-428LFF721FH-A6060 ns Edge connector : Gold plated[Single side]MC-428LFF721FB-A5050 ns 9 pieces of µPD4264805LE(400 mil SOJ)MC-428LFF721FB-A6060 ns[Single side]3Pin Configuration168-pin Dual In-line Memory Module Socket Type (Edge connector: Gold plated)[ MC-428LFF721FH, 428LFF721FB ]858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168GND DQ 32DQ 33DQ 34DQ 35Vcc DQ 36DQ 37DQ 38DQ 39DQ 40GND DQ 41DQ 42DQ 43DQ 44DQ 45Vcc DQ 46DQ 47CB4CB5GND NC NC Vcc NC /CAS4/CAS5NC NC GND A1A3A5A7A9A11NC Vcc NC NC GND NC NC /CAS6/CAS7NC Vcc NC NC CB6CB7GND DQ 48DQ 49DQ 50DQ 51Vcc DQ 52NC NC NC GND DQ 53DQ 54DQ 55GND DQ 56DQ 57DQ 58DQ 59Vcc DQ 60DQ 61DQ 62DQ 63GND NC NC SA0SA1SA2Vcc123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384GND DQ 0DQ 1DQ 2DQ 3Vcc DQ 4DQ 5DQ 6DQ 7DQ 8GND DQ 9DQ 10DQ 11DQ 12DQ 13Vcc DQ 14DQ 15CB0CB1GND NC NC Vcc /WE0/CAS0/CAS1/RAS0/OE0GND A0A2A4A6A8A10A12Vcc Vcc NC GND /OE2/RAS2/CAS2/CAS3/WE2Vcc NC NC CB2CB3GND DQ 16DQ 17DQ 18DQ 19Vcc DQ 20NC NC NC GND DQ 21DQ 22DQ 23GND DQ 24DQ 25DQ 26DQ 27Vcc DQ 28DQ 29DQ 30DQ 31GND NC NC NC SDA SCL VccA0 - A12: Address Inputs [ Row : A0 - A12, Column : A0 - A9 ]DQ0 - DQ63: Data Inputs / Outputs/RAS0, /RAS2: Row Address Strobe /CAS0 - /CAS7: Column Address Strobe /WE0, /WE2: Write Enable /OE0, /OE2: Output Enable SDA : Serial Data I/O for PD SCL : Clock Input for PD SA0 - SA2: Address Input for EEPROM CB0 - CB7: Check Bits V CC : Power Supply GND : Ground NC: No Connection/XXX indicates active low signal.4Block DiagramRemark D0 - D8 : µPD4264805 (8M words by 8 bits organization)/CAS0/WE0/OE0/RAS0/CAS4/WE2/OE2/RAS2/CAS D0/RAS/WE /OE DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 8D1DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7D2DQ 16DQ 17DQ 18DQ 19DQ 20DQ 21DQ 22DQ 23D3DQ 24DQ 25DQ 26DQ 27DQ 28DQ 29DQ 30DQ 31D4D7DQ 56DQ 57DQ 58DQ 59DQ 60DQ 61DQ 62DQ 63D8D6DQ 48DQ 49DQ 50DQ 51DQ 52DQ 53DQ 54DQ 55D5DQ 40DQ 41DQ 42DQ 43DQ 44DQ 45DQ 46DQ 47CB 0CB 1CB 2CB 3CB 4CB 5CB 6CB 7DQ 32DQ 33DQ 34DQ 35DQ 36DQ 37DQ 38DQ 39A0 - A12A0 - A12 : D0 - D8V CC D0 - D8GNDD0 - D8SERIAL PDSCLSDAA0A1A2SA0SA1SA2/CAS1/CAS2/CAS3/CAS7/CAS6/CAS5DQ 8DQ 9DQ 10DQ 11DQ 12DQ 13DQ 14DQ 15DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7DQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7/CAS/RAS/WE /OE /CAS/RAS/WE /OE /CAS/RAS/WE /OE /CAS/RAS/WE /OE/CAS/RAS/WE /OE /CAS/RAS/WE /OE /CAS/RAS/WE /OE/CAS/RAS/WE /OEDQ 0DQ 1DQ 2DQ 3DQ 4DQ 5DQ 6DQ 7Electrical Specifications• All voltages are referenced to GND.• After power up (V CC≥ V CC (MIN.)), wait more than 100 µs (/RAS, /CAS inactive) and then, execute eight /CAS before /RAS or /RAS only refresh cycles as dummy cycles to initialize internal circuit.Absolute Maximum RatingsParameter Symbol Condition Rating Unit Voltage on any pin relative to GND V T−0.5 to +4.6V Supply voltage V CC−0.5 to +4.6V Output current I O50mA Power dissipation P D9W Operating ambient temperature T A0 to +70°C Storage temperature T stg−55 to +125°C Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.Recommended Operating ConditionsParameter Symbol Condition MIN.TYP.MAX.Unit Supply voltage V CC 3.0 3.3 3.6V High level input voltage V IH 2.0V CC + 0.3VLow level input voltage V IL−0.3+0.8V Operating ambient temperature T A070°CCapacitance (T A = 25 °C, f = 1 MHz)Parameter Symbol Test condition MIN.TYP.MAX.Unit Input capacitance C I1A0 - A1290pFC I2/RAS0, /RAS250C I3/CAS0 - /CAS735C I4/WE0, /WE250C I5/OE0, /OE250Data input / output capacitance C I/O DQ0 - DQ63, CB0 - CB730pF5DC Characteristics (Recommended Operating Conditions unless otherwise noted)Parameter Symbol Test condition MIN.MAX.Unit Notes Operating current I CC1/RAS, /CAS cycling t RAC = 50 ns945mA1, 2, 3t RC = t RC (MIN.), I O = 0 mA t RAC = 60 ns855Standby current I CC2/RAS, /CAS ≥ V IH (MIN.), I O = 0 mA9.0mA/RAS, /CAS ≥ V CC−0.2 V, I O = 0 mA 4.5/RAS only refresh current I CC3/RAS cycling, /CAS ≥ V IH (MIN.)t RAC = 50 ns945mA1, 2, 3 ,4t RC = t RC (MIN.), I O = 0 mA t RAC = 60 ns855Operating current I CC4/RAS ≤ V IL (MAX.), /CAS cycling t RAC = 50 ns945mA1, 2, 5 (Hyper page mode (EDO))t HPC = t HPC (MIN.), I O = 0 mA t RAC = 60 ns855/CAS before /RAS I CC5/RAS cycling t RAC = 50 ns1,215mA1, 2 refresh current t RC = t RC (MIN.), I O = 0 mA t RAC = 60 ns1,035Input leakage current I I (L)V I = 0 to 3.6 V−5+5µAAll other pins not under test = 0 VOutput leakage current I O (L)V O = 0 to 3.6 V−5+5µAOutput is disabled (Hi−Z)High level output voltage V OH I O = −2.0 mA 2.4VLow level output voltage V OL I O = +2.0 mA0.4VNotes1. I CC1, I CC3, I CC4 and I CC5 depend on cycle rates (t RC and t HPC).2. Specified values are obtained with outputs unloaded.3. I CC1 and I CC3 are measured assuming that address can be changed once or less during /RAS≤V IL (MAX.) and/CAS ≥V IH (MIN.).4. I CC3 is measured assuming that all column address inputs are held at either high or low.5. I CC4 is measured assuming that all column address inputs are switched only once during each hyper page(EDO) cycle.67AC Characteristics (Recommended Operating Conditions unless otherwise noted)AC Characteristics Test Conditions(1) Input timing specification(2) Output timing specification(3) Output load conditionV IL (MAX.) = 0.8 VV IH (MIN.) = 2.0 V V OH (MIN.) = 2.0 V V OL (MAX.) = 0.8 Vt T = 2 ns t T = 2 nsI/O870100 pF 1,180V CC C LCommon to Read, Write, Read Modify Write CycleParameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NotesMIN.MAX.MIN.MAX.Read / Write cycle time t RC84−104−ns/RAS precharge time t RP30−40−ns/CAS precharge time t CPN7−10−ns/RAS pulse width t RAS5010,0006010,000ns/CAS pulse width t CAS810,0001010,000ns/RAS hold time t RSH13−15−ns/CAS hold time t CSH38−40−ns/RAS to /CAS delay time t RCD11371445ns1/RAS to column address delay time t RAD9251230ns1/CAS to /RAS precharge time t CRP5−5−ns2 Row address setup time t ASR0−0−nsRow address hold time t RAH7−10−nsColumn address setup time t ASC0−0−nsColumn address hold time t CAH7−10−ns/OE lead time referenced to /RAS t OES0−0−ns/CAS to data setup time t CLZ0−0−ns/OE to data setup time t OLZ0−0−ns/OE to data delay time t OED10−13−nsTransition time (rise and fall)t T150150nsRefresh time t REF−64−64msNotes1.For read cycles, access time is defined as follows:Input conditions Access time Access time from /RASt RAD≤ t RAD (MAX.) and t RCD≤ t RCD (MAX.)t RAC (MAX.)t RAC (MAX.)t RAD > t RAD (MAX.) and t RCD≤ t RCD (MAX.)t AA (MAX.)t RAD + t AA (MAX.)t RCD > t RCD (MAX.)t CAC (MAX.)t RCD + t CAC (MAX.)t RAD (MAX.) and t RCD (MAX.) are specified as reference points only; they are not restrictive operating parameters.They are used to determine which access time (t RAC, t AA or t CAC) is to be used for finding out when output data will be available. Therefore, the input conditions t RAD≥t RAD (MAX.) and t RCD≥t RCD (MAX.) will not cause any operation problems.2.t CRP(MIN.) requirement is applied to /RAS, /CAS cycles.8Parameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NotesMIN.MAX.MIN.MAX.Access time from /RAS t RAC−50−60ns 1 Access time from /CAS t CAC−13−15ns1 Access time from column address t AA−25−30ns1 Access time from /OE t OEA−13−15nsColumn address lead time referenced to /RAS t RAL25−30−nsRead command setup time t RCS0−0−nsRead command hold time referenced to /RAS t RRH0−0−ns2 Read command hold time referenced to /CAS t RCH0−0−ns2 Output buffer turn-off delay time from /OE t OEZ010013ns3/CAS hold time to /OE t CHO5−5−ns4 Notes1.For read cycles, access time is defined as follows:Input conditions Access time Access time from /RASt RAD≤ t RAD (MAX.) and t RCD≤ t RCD (MAX.)t RAC (MAX.)t RAC (MAX.)t RAD > t RAD (MAX.) and t RCD≤ t RCD (MAX.)t AA (MAX.)t RAD + t AA (MAX.)t RCD > t RCD (MAX.)t CAC (MAX.)t RCD + t CAC (MAX.)t RAD (MAX.) and t RCD (MAX.) are specified as reference points only; they are not restrictive operating parameters.They are used to determine which access time (t RAC, t AA or t CAC) is to be used for finding out when output data will be available. Therefore, the input conditions t RAD≥t RAD (MAX.) and t RCD≥t RCD (MAX.) will not cause any operation problems.2.Either t RCH (MIN.) or t RRH (MIN.) should be met in read cycles.3.t OEZ (MAX.) defines the time when the output achieves the condition of Hi-Z and is not referenced to V OH or V OL.4./WE : inactive (in read cycle)/CAS : inactive, /OE : active ...... t CHO is effective./RAS, /OE : active ...... t OCH is effective.9Parameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NotesMIN.MAX.MIN.MAX./WE hold time referenced to /CAS t WCH7−10−ns1/WE pulse width t WP7−10−ns1/WE lead time referenced to /RAS t RWL13−15−ns/WE lead time referenced to /CAS t CWL7−10−ns/WE setup time t WCS0−0−ns2/OE hold time t OEH0−0−nsData-in setup time t DS0−0−ns3 Data-in hold time t DH7−10−ns3 Notes1.t WP(MIN.) is applied to late write cycles or read modify write cycles. In early write cycles, t WCH(MIN.) should be met.2.If t WCS≥t WCS(MIN.), the cycle is an early write cycle and the data out will remain Hi-Z through the entire cycle.3.t DS(MIN.) and t DH(MIN.) are referenced to the /CAS falling edge in early write cycles. In late write cycles andread modify write cycles, they are referenced to the /WE falling edge.Read Modify Write CycleParameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NoteMIN.MAX.MIN.MAX.Read modify write cycle time t RWC107−133−ns/RAS to /WE delay time t RWD64−77−ns1/CAS to /WE delay time t CWD27−32−ns1 Column address to /WE delay time t AWD39−47−ns1 Note 1. If t WCS≥t WCS (MIN.), the cycle is an early write cycle and the data out will remain Hi-Z through the entire cycle.If t RWD≥t RWD(MIN.), t CWD≥t CWD(MIN.), t AWD≥t AWD(MIN.) and t CPWD≥t CPWD (MIN.), the cycle is a read modify write cycle and the data out will contain data read from the selected cell. If neither of the above conditions is met, the state of the data out is indeterminate.10Hyper Page Mode (EDO)Parameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NotesMIN.MAX.MIN.MAX.Read / Write cycle time t HPC20−25−ns1/RAS pulse width t RASP50125,00060125,000ns/CAS pulse width t HCAS810,0001010,000ns/CAS precharge time t CP7−10−nsAccess time from /CAS precharge t ACP−30−35ns/CAS precharge to /WE delay time t CPWD41−52−ns2/RAS hold time from /CAS precharge t RHCP30−35−nsRead modify write cycle time t HPRWC52−66−nsData output hold time t DHC5−5−ns/OE to /CAS hold time t OCH5−5−ns3/OE precharge time t OEP5−5−nsOutput buffer turn-off delay from /WE t WEZ010013ns4,5/WE pulse width t WPZ7−10−ns5 Output buffer turn-off delay from /RAS t OFR010013ns4,5 Output buffer turn-off delay from /CAS t OFC010013ns4,5 Notes1.t HPC (MIN.) is applied to /CAS access.2.If t WCS≥t WCS (MIN.), the cycle is an early write cycle and the data out will remain Hi-Z through the entirecycle. If t RWD≥t RWD (MIN.), t CWD≥t CWD (MIN.), t AWD≥t AWD (MIN.) and t CPWD≥t CPWD (MIN.), the cycle is a read modify write cycle and the data out will contain data read from the selected cell. If neither of the above conditions is met, the state of the data out is indeterminate.3./WE : inactive (in read cycle)/CAS : inactive, /OE : active ...... t CHO is effective./CAS, /OE : active ...... t OCH is effective.4.t OFC (MAX.), t OFR (MAX.) and t WEZ (MAX.) define the time when the output achieves the conditions of Hi-Z and isnot referenced to V OH or V OL.5.To make DQs to Hi-Z in read cycle, it is necessary to control /RAS, /CAS, /WE, /OE as follows. The effectivespecification depends on state of each signal.(1)Both /RAS and /CAS are inactive (at the end of the read cycle)/WE : inactive, /OE : activet OFC is effective when /RAS is inactivated before /CAS is inactivated.t OFR is effective when /CAS is inactivated before /RAS is inactivated.The slower of t OFC and t OFR becomes effective.(2)Both /RAS and /CAS are active or either /RAS or /CAS is active (in read cycle)/WE, /OE : inactive ...... t OEZ is effective.Both /RAS and /CAS are inactive or /RAS is active and /CAS is inactive (at the end of read cycle)/WE, /OE : active and either t RRH or t RCH must be met ...... t WEZ and t WPZ are effective.The faster of t OEZ and t WEZ becomes effective.The faster of (1) and (2) becomes effective.11Refresh CycleParameter Symbol t RAC = 50 ns t RAC = 60 ns Unit NoteMIN.MAX.MIN.MAX./CAS setup time t CSR5−5−ns/CAS hold time (/CAS before /RAS refresh)t CHR10−10−ns/RAS precharge /CAS hold time t RPC5−5−ns/WE setup time t WSR10−10−ns/WE hold time t WHR15−15−ns12Byte No.Function Described Hex Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Notes 0Number of serial PD bytes5DH010******* bytes 1Serial memory08H00001000256 bytes 2Fundamental memory type02H00000010EDO3Number of rows0DH0000110113 rows 4Number of columns0AH0000101010 columns 5Number of banks01H00000001 1 bank 6Data width48H010******* bits 7Data width (continued)00H0000000008Voltage interface01H00000001LVTTL 9/RAS access time-A5032H0011001050 ns-A603CH0011110060 ns 10/CAS access time-A500DH0000110113 ns-A600FH0000111115 ns 11Error detection/correction02H00000010ECC12Refresh period00H00000000Normal 13DRAM width08H00001000×814Error checking DRAM width08H00001000×815 - 6100H00000000None62SPD revision01H00000001163Checksum for bytes 0 - 62-A501AH00011010-A6026H00100110 64Manufacture’s JEDEC ID code per10H00010000 JEP-106E65-7100H0000000072Manufacturing location73Part name34H0011010074Part name32H0011001075Part name38H0011100076Part name4CH0100110077Part name46H0100011078Part name46H0100011079Part name37H0011011180Part name32H0011001081Part name31H0011000182Part name46H0100011083Part name MC-428LFF721FB42H01000010MC-428LFF721FH48H01001000 84Part name2DH0010110185Part name41H0100000186Part name-A5035H00110101-A6036H00110110 87Part name30H0011000088Part name20H0010000089Part name20H0010000090Part name20H0010000091PCB revision code31H0011000192Blank20H00100000Remark 1 : High level (Serial data), 0 : Low level (Serial data)1314Data outHi - ZV IH V IL/CASV IH V IL/RASV IH V ILAddressV IH V IL/WEV OH V OLDQV IH V IL/OECRPt RCDt CSHt RASt RCt RSH t CASt RALt CAHt ASCt Col.RCSt OCH t OES t OEAt CLZt OLZt CACt AA t RAC t RPt CPNt RCHt RRHt WPZt CHOt WEZ t OFC t OEZ t OFRt Hi - ZASRt RAH t RADt Row15DSt CRPt RCDt WCHt WCSt ASRt RAH t RADt ASCt CAHt CASt RSH t CSHt RASt RPt RCt V IH V ILV IH V ILV IH V ILV IH V ILV IH V IL/RASAddress/WERowCol.Data inDHt CPNt /CASDQRemark /OE : Don’t care16/RASAddress/WERowCol.Data in/OEHi - ZRCt RPt RASt CRPt RCDt CASt RSH t CSHt CPNt ASRt RAH t RADt ASCt CAHt WPt RWLt CWL t RCSt OEHt OEDt DSt DHt V IH V ILV IH V ILV IH V ILV IH V ILV IH V ILV IH V IL/CASDQ17Read Modify Write Cycle/RAS/CASAddress/WEDQ/OEDQRowCol.Data inHi - ZData out Hi - ZV OH V OLV IH V ILV IH V ILV IH V ILV IH V ILV IH V ILV IH V ILRWCt RASt RPt CPN t RSH t CASt CSHt RCDt CRPt ASRt RAH t RADt CAHt ASCt RCSt OEAt OEHt DSt DHt OEDt AA t RAC t CACt CLZt OLZ t OEZ t CWL t RWL t WPt RWD t AWD t CWDt18Hyper Page Mode (EDO) Read Cycle/RAS/CASAddress/WE/OEDQt RASPt RPt CRPt RCDt HCASt CSHt CPt RHCPt RSH t HCASt CPNt HCASt HPCt CPt ASRt RAHt RADt CAH t ASCt CAH t ASCt CAH t RAL t RCSt RCH t RRHt WPZt WEZt OEZt ACP t AA t CACt ACP t AA t CACt DHC t DHC t OEA t OLZt RAC t AA t CAC t CLZRowCol.Col.Col.Data out Data out Data outHi - Zt OFR t OFCt OCHV IH V ILV OH V OLV IH V ILV IH V ILV IH V ILV IH V ILCHOt t ASCRemark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of theconsecutive /CAS cycles within the same /RAS cycle./RAS/CAS Address/WE/OEt RASP t RPt CRP t RCD t HCASt CSHt RHCPt RSHt HCAS t CPNt HCASt ASR t RAHt RADt CAH t ASC t CAH t ASC t CAHt RALt RRHt WPZt OFRt OFCt OEZt AA t AAt CLZt CAC t CACt CLZt WEZ t WEZt OEAt OLZt RACt AAt CACt CLZRow Col.Col.Col.Data out Data out Data out Hi - ZDQt RCHt WPZt RCSt RCHt WPZt RCSt RCHHi - Z Hi - Zt WEZt OCHV IHV ILV OHV OLV IHV ILV IHV ILV IHV ILV IHV ILCHOtt ASCt RCSRemark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of the consecutive /CAS cycles within the same /RAS cycle.1920Hi - ZHi - ZRowCol.ACol.B Col.C/RAS/CASAddress/OEDQData out AData out C/WEV IH V ILV OH V OLV IH V ILV IH V ILV IH V ILV IH V ILRASPt RPt RHCPt CPN t RSH t HCASt CPt HPC t HCASt CPt HCASt CSHt RCDt CRPt RADt RAHt ASRt ASCt CAHt CAH t ASCt CAH t RAL t OFRt OFC t RRH t RCHt OES t AA t CACt CACt AA t RAC t RCSt OEPt OCHt OEAt CHOt ACPt OCH t OEPt CHOt OEPt AAt CAC t ACP t OCHt CHOt OEZt OEA t OLZt OEZt OEA t OLZt OEZt CLZt OEZt CLZt OLZ t Data out BData out BASCt Remark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of theconsecutive /CAS cycles within the same /RAS cycle.21Data in V IHV ILV IHV IL/WE V IHV ILAddress V IH V ILV IHV IL/RAS CRPt RADt ASRt RAHt ASCt CAHt ASCt CAH t WCH t WCSt WCH t DH t DS t DSt DH t Data in Data inDS t DHt WCHt RowCol.Col.Col.ASCt CAH t CPNt RPt RALt HCASt CPt HCASt HPCt RSH t RHCPt RASPt CPt HCASt RCDt CSHt WCS t WCSt /CASDQ Remarks 1./OE : Don’t care2.In the hyper page mode (EDO), read, write and read modify write cycles are available for each of theconsecutive /CAS cycles within the same /RAS cycle./RASAddress/WECol.Col.Col.RowHi-Z Hi-Z Hi-ZData inData in Data in/OERASPtRHCPtRPtCPNtRSHtHCAStHCAStHPCtCPtCPtCSHtHCAStRCDtCRPtASRt RAHtRADtCAHt CAHtASCtRALtCAHtWPtRWLtCWLtRCStWPtCWLtWPt RCStCWLtRCStOEHtOEHt OEHtOEDt DSt DHtOEDt DSt DHtOEDt DSt DHtV IHV ILV IHV ILV IHV ILV IHV ILV IHV ILV IHV ILASCtASCt/CASDQRemark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of the consecutive /CAS cycles within the same /RAS cycle.2223t RCS/CASt CPNt CP t HCAS t HCAS t CP t HPRWCt HCAS t RCD /RASt RASPt RPt CRPAddresst ASRt RAHt RADt ASCt CAHt ASCt CAH t CAH t ASCRowCol.Col.Col.t RAL/WEt RWD t OLZt DH t DSt AWD t CWDt WP t RCSt CWLt ACPt CPWD t AWD t CWDt WPt CWLt ACPt CPWD t AWD t CWD t RCSt CWL t RWL t WP/OEDQoutt CLZ t OED t OEAt CACt AAt RAC int OEAt OEHt CAC t AAt OLZ t DH t DS outt OEZ t OED int OLZt DH t DS outt OEZ t CLZ t OED int OEHt AAt CAC t OEAt OEHHi-ZHi-ZHi-ZHi-ZDQV IH V ILV OH V OLV IH V ILV IH V ILV IH V ILV IH V ILV IH V ILt OEZ t CLZ Remark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of theconsecutive /CAS cycles within the same /RAS cycle.24t RASPt RPt CRPt RCDt HCASt CSHt CPt RHCPt RSHt HCASt CPNt HCAS t HPCt CPt ASRt RAHt RADt CAH t ASCt CAH t ASCt CAHt RAL t RCSt RCHt ACP t AA t CACt WEZt DHCt OEA t RAC t AA t CAC t CLZRowCol.Col.Col.Data outData outHi - Zt WCS t WCHHi - Zt DH t DSData int OCH t OLZ CHOt /RASV IH V ILV IH V ILAddressV IH V IL/WEV IH V IL/OEV IH V ILV OH V OLV IH V ILt ASCt OEZ/CASDQDQRemark In the hyper page mode (EDO), read, write and read modify write cycles are available for each of theconsecutive /CAS cycles within the same /RAS cycle.25/CAS Before /RAS Refresh Cyclet t t t t t t t t t t t t t t t CSRCHRWSRWHR RCRPRPCCSRCHRRASRASRPRCRPCCPNCRPV IH V ILV IH V IL/WEV IH V ILt t WSR WHR/CAS/RASRemark Address, /OE : Don't care DQ : Hi-Z/RAS Only Refresh CycleRowRowt RCt RCt RASt RASt RPt RPt CRPt RPCt CPNt ASRt ASR t RAH t RAH t CRPV IH V IL/RASV IH V ILV IH V ILAddress/CASRemark /WE, /OE : Don't care DQ : Hi-Z26t t t t t t RowCol.Data outHi - ZHi - Zt t t t t t t t t t t t t t t t t t t t t t RC RC RASRASRPCRPt RCD RSH CHR CPNt ASRRADRAH RALCAHASCRCHWHRWPZWEZCHOOFC OFROEZRCSt OES t OEARAC AA CAC OLZ CLZ/RASV IH V ILV IH V ILAddress V IHVIL/WE V IHVIL/OEV IH V ILV OH V OLRPt /CASDQ27t t t t t t t t t t RowCol.t t t t t t t t Data inRC RASRPRCRASRCD RSH CHR CPNCAHASCRADRAHASRCRPWCSt WCHDSDH/RASV IH V ILV IH V ILAddressV IH V IL/WEV IH V ILV IH V ILRPt /CASDQt WHRt WSR Remark /OE : Don’t care28Package Drawings[ MC-428LFF721FH ]168 PIN DUAL IN-LINE MODULE (SOKET TYPE)ITEM MILLIMETERS INCHES A1A C 36.83 1.450U 4.00 MIN.0.157 MIN.B 11.430.450S T 1.27±0.10.050±0.004D1 6.350.250D2 2.00.079X 2.54±0.100.100±0.004133.355.250133.35±0.13 5.250±0.006G 6.350.250E 54.61 2.150H 1.27 (T.P.)0.050 (T.P.)I 8.890.3503.1250.123J L 17.780.700K 42.18 1.661M 31.75±0.13 1.250±0.006M111.970.47124.4950.964R 4.00±0.100.157+0.005–0.004Y 3.0 MIN.0.118 MIN.φM168S-50A57Z3.0 MIN.0.118 MIN.M219.780.779N 3.0 MAX.0.119 MAX.V 0.25 MAX.0.010 MAX.W 1.0±0.050.039+0.003–0.002D 3.00.118φP 1.00.039Q R2.0R0.079YRJHDQUTdetail of A partD2P XV A(OPTIONAL HOLES)SWNZBIGdetail of B partD1M1 (AREA B)M2 (AREA A)LEA (AREA B)CB KA1 (AREA A)M529[ MC-428LFF721FB ]NTUM168 PIN DUAL IN-LINE MODULE (SOCKET TYPE)P DITEM MILLIMETERS INCHES U 4.0 MIN.0.157 MIN.S T 1.27±0.10.05±0.004A B 11.43133.35±0.13 5.250±0.0060.450C D 6.3536.83 1.4500.250E G6.3554.61 2.1500.250H1.27 (T.P.)0.050 (T.P.)I 8.890.350J 24.4950.964K 42.18 1.661L 17.780.700M N R 4.0±0.10.157Q V 0.25 MAX.0.010 MAX.R2.0R0.079+0.005–0.0045.08 MAX.0.200 MAX.3.00.118P1.00.039Y 3.0 MIN.0.118 MIN.W X2.54 MIN.1.0±0.050.100±0.004Z3.0 MIN.0.118 MIN.0.039+0.003–0.002WGVXYRSLQ ZJH CBK GIBD EA(OPTIONAL HOLES)Adetail of partdetail ofpart 31.751.250UB3JS[MEMO] 30NOTES FOR CMOS DEVICES1PRECAUTION AGAINST ESD FOR SEMICONDUCTORSNote:Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps mustbe taken to stop generation of static electricity as much as possible, andquickly dissipate it once, when it has occurred. Environmental control mustbe adequate. When it is dry, humidifier should be used. It is recommendedto avoid using insulators that easily build static electricity. Semiconductordevices must be stored and transported in an anti-static container, staticshielding bag or conductive material. All test and measurement toolsincluding work bench and floor should be grounded. The operator shouldbe grounded using wrist strap. Semiconductor devices must not be touchedwith bare hands. Similar precautions need to be taken for PW boards withsemiconductor devices on it.2HANDLING OF UNUSED INPUT PINS FOR CMOSNote:No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal inputlevel may be generated due to noise, etc., hence causing malfunction. CMOSdevice behave differently than Bipolar or NMOS devices. Input levels ofCMOS devices must be fixed high or low by using a pull-up or pull-downcircuitry. Each unused pin should be connected to V DD or GND with aresistor, if it is considered to have a possibility of being an output pin. Allhandling related to the unused pins must be judged device by device andrelated specifications governing the devices.3STATUS BEFORE INITIALIZATION OF MOS DEVICESNote:Power-on does not necessarily define initial status of MOS device. Produc-tion process of MOS does not define the initial operation status of thedevice. Immediately after the power source is turned ON, the devices withreset function have not yet been initialized. Hence, power-on does notguarantee out-pin levels, I/O settings or contents of registers. Device is notinitialized until the reset signal is received. Reset operation must beexecuted imme-diately after power-on for devices having reset function.31。

4-72风机参数表

1124
7650
1099
8578
1059
9551
999
10476
919
11452
836
12379
724
13353
4-72型风机
№机号
传动方式
r/min
Pa
m3/h
电机型号
Kw
地脚螺钉
6
960
498
4420
Y100L-6
1.5
M10×220
492
5065
481
5679
463
6324
437
6938
402
Kw
传动
8
1600
2478
17463
Y180M-2
22
三角带B
5×2240
2445
20010
2390
22435
2303
24982
Y200L1-2
30
2171
27408
1996
29954
1816
31000
4-72型风机
№机号
传动方式
r/min
Pa
m3/h
电机型号
Kw
传动
8
1250
1507
13648
Y160M-4
传动方式
r/min
Pa
m3/h
电机型号
Kw
传动
8
1800
3143
19648
Y200L1-2
30
三角带B
6×2800
3101
22511
3032
25240
2920
28105
Y200L2-2

MC74ACT352D中文资料

The MC74AC352/74ACT352 is a dual 4-input multiplexer. It selects two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced HIGH. The logic equations for the outputs are shown below: Za = Ea•(I0a•S1•S0+I1a•S1•S0+ I2a•S1•S0+I3a•S1•S0) Zb = Eb•(I0b•S1•S0+I1b•S1•S0+ I2b•S1•S0+I3b•S1•S0) The MC74AC352/74ACT352 can be used to move data from a group of registers to a common output bus. The particular register from which the date came would be determined by the state of the Select inputs. A less obvious application is as a function generator. The MC74AC352/ 74ACT352 can generate two functions of three variables. This is useful for implementing highly irregular random logic.

4-72离心风机性能与选用件表(中文)

用途4-72型离心通风机主要用途是为一般工厂及大型建筑物的室内通风换气或输送空气及其它不自燃、不易爆、不挥发、对人体无害、对钢材无腐蚀性之气体。

但输送的气体不得含粘性物质，所含尘土及硬质颗粒物不大于150mg/m3，气体温度不得超过80℃。

4-72型离心通风机在我国是使用最早的风机，然而也是使用最普通的风机，从高层建筑到地下铁道，从锅炉鼓风到厂房换气，从北部边疆到南海之滨，从西部高原到东部边垂，随处可见。

型式从电机一端正视，凡叶轮按顺时针方向旋转者均称“右旋风机”，以“右”表示，反之则均称之为“左旋风机”，以左表示。

风机的出风口位置以机壳的出风口角度表示，4-72型风机No2.8~6在出厂时均做成一种型式，使用单位根据要求再安装成所需要的位置，订货时无须注明。

其中：No2.8出风口位置调整范围是0°~225°，间隔是45°；No3.2~6出风口调整范围是0°~225°，间隔是22.5°；No8~12出风口调整范围是0°~225°，间隔是45°；No16、20出风口角度制成固定的0°、90°、180°三种，不能调整，订货时需注明。

风机的传动方式有A、B、C、D四种：No2.8~5采用A式传动，No6既有A式传动又有C式传动，No8~12采用C、D式两种传动方式，No16~20采用B式传动。

如上述机号、传动方式、出口角度不能适应您的生产需要，我厂有能力为您改造或设计，直至您满意为止。

结构本风机No2.8A~6A主要由叶轮、机壳、进风口、电机等部分组成，No6C和No8~20除具有上述结构外，还有传动部分。

叶轮－由10个后倾机翼型叶片、曲线型轮盖和平板后盘组成，经动静平衡校正和超速运转实验，效率高，运转平稳可靠，空气性能良好。

机壳－用普通钢板焊接成蜗壳形整体。

进风口－制成整体结构，装于风机一侧，与轴向平行的截面为曲线形状，作用是能使气流顺畅进入叶轮，且损失较小。

MC-4R512FKE6D-840资料

GND LDQA8 GND LDQA6 GND LDQA4 GND LDQA2 GND LDQA0 GND LCTMN GND LCTM GND NC GND LROW1 GND LCOL4 GND LCOL2 GND LCOL0 GND LDQB1 GND LDQB3 GND LDQB5 GND LDQB7 GND LSCK VCMOS SOUT VCMOS NC GND NC VDD VDD NC NC NC NC
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 A41 A42 A43 A44 A45 A46
NC NC NC NC VREF GND SA0 VDD SA1 SVDD SA2 VDD RCMD GND RDQB8 GND RDQB6 GND RDQB4 GND RDQB2 GND RDQB0 GND RCOL1 GND RCOL3 GND RROW0 GND RROW2 GND NC GND RCFMN GND RCFM GND RDQA1 GND RDQA3 GND RDQA5 GND RDQA7 GND
NC NC NC NC VREF GND SCL VDD SDA SVDD SWP VDD RSCK GND RDQB7 GND RDQB5 GND RDQB3 GND RDQB1 GND RCOL0 GND RCOL2 GND RCOL4 GND RROW1 GND NC GND RCTM GND RCTMN GND RDQA0 GND RDQA2 GND RDQA4 GND RDQA6 GND RDQA8 GND

mc2中文说明书

安全性
MC2 可以经受工业环境的考验，具有很好的防震功能。它十分精密灵
武汉联合约克仪器有限公司编译
7
York instrument LTD
巧，对使用者的技术要求比较高。而且必须对操作手册有个好的理解。尽量避开电磁信号源，以免影响到测量精度。可充电电池在充电的过程中会发出少许气体，这种气体是易爆的，虽
要有超过 60V 直流、30V 交流和 100mA 的电信号。 MC2 最大输出电压低于 30V，所以输入、输出的时候千万小心。
废弃电池与材料的处理贝美克斯很注重对环境的保护，他设计的产品很容易回收利用而不污
染环境。欧盟和其他国家联合建立了一个体系——WEEE。WEEE/EC 要求所有生产电器电表的厂家对产品的回收和循环利用负责。这一政策在 2005 年 8 月在欧洲市场实施。旨在保护环境、保护人类身体和维持自然资
源。标签上引有
符号的，表示可再回收利用。
建议不要随便打开 MC2 外壳。只有具备资格的专业技术人员才能维修。充电器不能维修，请依据环保法规妥善处理废弃的充电器。若重新设置 MC2，同时按下回车键和开关键 5 秒钟。然后再次按下开
关键即可。重设后 MC2 的时钟回到 1970 年 1 月 1 日 0 点。记得输入正确的时间。不建议重设。详细可咨询武汉约克仪器公司。若清洁 MC2，用软布沾些清洁油擦拭。过几分钟，再用湿布擦干。
武汉联合约克仪器有限公司编译
10
内部压力模块（ＩＰＭ）
York instrument LTD
压力模块类型：
·ＩＰＭ２００ｍＣ量程：±２００ｍｂａｒ（±２０ｋＰａ）
·ＩＰＭ２Ｃ量程：－１￣＋２ｂａｒ（－１００￣＋２００ｋＰａ）

CS4216中文资料

Features•CMOS Stereo Audio Input/Output SystemDelta-Sigma A/D Converters Delta-Sigma D/A Converters Input Anti-Aliasing and Output Smoothing FiltersProgrammable Input Gain and Output Attenuation•Sample Frequencies of 4 kHz to 50 kHz •CD Quality Noise and Distortion< 0.01 %THD•Internal 64X Oversampling •Low Power Dissipation: 80 mA1 mA Power-Down ModeGeneral DescriptionThe CS4216 Stereo Audio Codec is a monolithic CMOS device for computer multimedia, automotive,and portable audio applications. It performs A/D and D/A conversion, filtering, and level setting, creating 4audio inputs and 2 audio outputs for a digital computer system. The digital interfaces of left and right channels are multiplexed into a single serial data bus with word rates up to 50 kHz per channel. Up to 4 CS4216 de-vices can be attached to a single hardware bus.Both the ADCs and the DACs use delta-sigma modula-tion with 64X oversampling. The ADCs include a digital decimation filter which eliminates the need for external anti-aliasing filters. The DACs include output smoothing filters on-chip.Ordering Information:CS4216-KL 0° to 70°C 44-pin PLCCCS4216-KQ 0° to 70°C 44-pin TQFPCDB4216Evaluation Board16-Bit Stereo Audio CodecCS4216SS Y N CLO U TR O U TC LK INM F 7:S F S 1/F 2M F 8:S F S 2/F 3S D IN S D O U T S C LK S M O D E 1R E SE TR E FG N D R EFBYP R E FB U F LIN 1LIN 2R IN 1R IN 2V D VA D G N D A G N DD O 1M F5:D O 2/IN TM F2:D O 3/F2/C D IN M F1:D O 4/F1/C D O U T D I1M F6:D I2/F 1M F 3:D I3/F3/C C LK S M O D E 2S M O D E 3M F 4:D I4/M A/C C S Oct ’93Crystal Semiconductor Corporation The CS4216 is an Mwave TMaudio codec.RECOMMENDED OPERATING CONDITIONS (AGND, DGND = 0V, all voltages with re-spect to 0V.)ANALOG CHARACTERISTICS( T A = 25°C; VA, VD = +5V; Input Levels: Logic 0 = 0V,Logic 1 = VD; 1 kHz Input Sine Wave; CLKIN = 24.576 MHz; SM1; Conversion Rate = 48 kHz; SCLK =12.288 MHz; Measurement Bandwidth is 10 Hz to 20 kHz; Unless otherwise specified.)Notes: 1.This specification is guaranteed by characterization, not production testing.2.Input resistance is for the input selected. Non-selected inputs have a very high (>1MΩ) input resistance. * Parameter definitions are given at the end of this data sheet.Mwave TM is a trademark of the IBM Corporation.Specifications are subject to change without notice.(Continued)Notes: 3.Tested in SM3, Slave sub-mode, 128 BPF.4.10 kΩ, 100 pF load.5.REFBUF load current must be DC. To drive dynamic loads, REFBUF must be buffered.AC variations in REFBUF current may degrade ADC and DAC performance.6.Typically current: VA = 30mA, VD = 50mA. Power supply current does not include output loading. * Parameter definitions are given at the end of this data sheet.SWITCHING CHARACTERISTICS (T A = 25°C; VA, VD = +5V, outputs loaded with 30 pF; Input Levels: Logic 0 = 0V, Logic 1 = VD)Notes:7.When the CS4216 is in master mode (SSYNC and SCLK outputs), the SCLK duty cycle is 50%.The equation is based on the selected sample frequency (Fs) and the number of bits per frame (bpf).* OptionalSSYNC [SM1, SM2\SCLK [SM1,SM2\SCLK [SM3,SM4\SSYNC [SM3,SM4\SDINSDOUT*Word Sync*Word SyncSerial Audio Port TimingM F3:C C LKM F1:C D O U TM F 2:C D INM F4:C C S t 1235894671011M F3:C C LKM F1:C D O U TM F2:C D INM F4:C C S2428293231302726252322R G ain 2RG ain1RG ain000000000Serial Mode 4. Control Data Serial Port Timing(T = 25°C; VA, VD = 5V)SCLK*DIxDOx* SCLK is inverted for SM1 and SM2DI/DO TimingCLKINSCLKSCLK & SSYNC Output Timing SSYNC(Master Mode) (Master Mode)(AGND, DGND = 0V, all voltages with respect to 0V.)Warning:Operation beyond these limits may result in permanent damage to the device.Normal operation is not guaranteed at these extremes.LeftRLeftFigure 1. Typical Connection DiagramOVERVIEWThe CS4216 contains two analog-to-digital con-verters, two digital-to-analog converters, adjustable input gain, and adjustable output level control. Since the converters contain all the re-quired filters in digital or sampled analog form, the filters’ frequency responses track the sample rate of the CS4216. Only a single-pole RC filter is required on the analog inputs and outputs. The RC filter acts as a charge reserve for the switched-capacitor input and buffers op-amps from a switched-capacitor load. Communication with the CS4216 is via a serial port, with sepa-rate pins for data into the device, and data from the device. The filters and converters operate over a sample rate range of 4 kHz to 50 kHz. FUNCTIONAL SPECIFICATIONSAnalog Inputs and OutputsFigure 1 illustrates the suggested connection dia-gram to obtain full performance from the CS4216. The line level inputs, LIN1 or LIN2 and RIN1 or RIN2, are selected by an internal input multiplexer. This multiplexer is a source selector and is not designed for switching be-tween inputs at the sample rate.Unused analog inputs that are not selected have a very high input impedance, so they may be tied to AGND directly. Unused analog inputsthat are selected should be tied to AGND through a 0.1 µF capacitor. This prevents any DC current flow.The analog inputs are single-ended and inter-nally biased to the REFBUF voltage (nominally 2.2 V). The REFBUF output pin can be used to level shift an input signal centered around 0 V olts as shown in Figure 2. The input buffers shown have a gain of 0.5, yielding a full scale input sensitivity of 2 V rms with the CS4216 pro-grammable gain set to 0. If the source imped-ance is very low, then the inputs can be AC coupled with a series 0.47 µF capacitor, elimi-nating the need for external op-amps (see Figure 3). However, the use of AC coupling capacitors will increase DC offset at 0dB gain (see Analog Characteristics Table).The analog outputs are also single-ended and centered around the REFBUF pin. AC coupling capacitors of >1 µF are recommended.Line InRightExampleareorLT1013Line InLeftRINx(PLCC pin 25 or 26)REFBUFLINx(PLCC pin 27 or 28)Figure 2. DC Coupled Input.Line InRightLine InLeft0.47 uFRINx(PLCC pin 25 or 26)LINx(PLCC pin 27 or 28)Figure 3. AC Coupled InputOffset CalibrationBoth input and output offset voltages are mini-mized by internal calibration. Offset calibration occurs after exiting a reset or power down condi-tion. During calibration, which takes 194 frames, output data from the ADCs will be all zeros, andwill be flagged as invalid. Also, the DAC outputs will be muted. After power down mode or power up, RESET should be held low for a minimum of 50 ms to allow the voltage reference to settle.Input Gain and Output Level SettingInput gain is adjustable from 0 dB to +22.5 dB in 1.5 dB steps. In serial modes SM1 and SM2, the output level attenuation is adjustable from 0 dB to -22.5 dB. In serial modes SM3 and SM4, the output level attenuation is adjustable from 0 dB to -46.5 dB. Both input and output gain adjustments are internally made on zero-crossings of the analog signal, to minimize "zipper" noise. The gain change automatically takes effect if a zero crossing does not occur within 512 frames.Muting and the ADC Valid CounterThe mute function allows the output channels to be silenced. It is the controlling processor’s re-sponsibility to reduce the signal level to a low value before muting, to avoid an audible click. The outputs should be muted before changing the sample frequency.The serial data stream contains a "V alid Data" indicator for the A/D converters which is false until enough clocks have passed since reset, or low-power (power down mode) operation to have valid A/D data from the filters, i.e., until calibra-tion time plus the full latency of the digital filters has passed.Parallel Digital Input/Output PinsParallel digital inputs are general purpose pins whose value is reflected in the serial data output stream to the processor. Parallel digital outputs provide a way to control external devices using bits in the serial data input stream. All parallel digital pins, with the exception of DI1 and DO1, are multifunction and are defined by the serial mode selected. Serial modes 1 and 2 define all multifunction pins as general purpose digital in-puts and outputs. In Serial mode 3 only two digital inputs and two digital outputs are avail-able. In serial mode 4 only one digital input and digital output exists. Figure 4 shows when the DI pins are latched, and when the DO pins are up-dated in SM3 and SM4.Reset and Power Down ModesReset places the CS4216 into a known state and must be held low for at least 50 ms after power-up or a hard power down. Reset must also occur when the codec is in master mode and a change in sample frequency is desired. In reset, the digi-tal outputs are driven low. Reset sets all control data register bits to zero.Hard power down mode may be initiated by will be driven to the REFBUF voltage which will then decay to zero. All digital outputs will be driven low and then will go to a high imped-ance state. Minimum power consumption will occur if CLKIN is held low. After leaving the power down state, RESET should be held low for 50 ms to allow the analog voltage reference to settle before calibration is started.SSYNCSCLKDI pinslatchedDO pinsupdateFrame(SM3)Figure 4. Digital Input/Output TimingAlternatively, soft power down may be initiated, in slave mode, by reducing the SCLK frequency below the minimum CLKIN/12. In soft power down the analog outputs are muted and the serial data from the codec will indicate invalid data and the appropriate error code. The parallel bit I/O is still functional in soft power down mode. This is, in effect, a low power mode with only the parallel bit I/O unit functioning.Audio Serial InterfaceIn serial modes 1, 2, and 3, the audio serial port uses 4 pins: SDOUT, SDIN, SCLK and SSYNC. SDIN carries the D/A converters’ input data and control bits. Input data is ignored for frames not allocated to the selected CS4216. SDOUT car-ries the A/D converters’ output data and status bits. SDOUT goes to a high-impedance state during frames not allocated to the selected CS4216. SCLK clocks data in to and out of the CS4216. The rising edge of SCLK clocks data out on SDOUT. The falling edge latches data on SDIN into the port (SCLK polarity is inverted in Serial Modes 1&2). SSYNC indicates the start of a frame and/or sub-frame. SCLK and SSYNC must be synchronous to the master clock.Serial mode 4 is similar to serial mode 3 with the exception of the control information. In serial mode 4 the control information is entered through a separate asynchronous control port. Therefore, the audio serial port only contains audio data which reduces the number of bits on the audio port from 64 to 32 per codec.The serial port protocol is based on frames con-sisting of 1, 2, or 4 sub-frames. The frame rate is the system sample rate. Each sub-frame is used by one CS4216 device. Up to 4 CS4216s may be attached to the same serial control lines. SFS1 and SFS2 are tied low or high to indicate to each CS4216 which sub-frame is allocated for it to use.Serial Data FormatIn serial modes 1, 2, and 3, a sub-frame is 64 bits in length and consists of two 16-bit audio values and two 16-bit control fields. In serial mode 4 a sub-frame is 32 bits in length and only contains the two 16-bit audio values; the control data is loaded through a separate port. The audio data is MSB first, 2’s complement format. The sub-frame bit assignments for serial modes 1, 2, and 3, are numbered 1 through 64 and are shown in Figures 5 and 6. Control data bits all reset to zero.CS4216 SERIAL INTERFACE MODESThe CS4216 has 4 serial port modes, selected by the SMODE1, SMODE2 and SMODE3 pins. In all modes, CLKIN, SCLK and SSYNC must be derived from the same clock source. SM1 is an easy interface to ASICs that use a change in the SCLK-to-CLKIN ratio to determine the sampleContains audio data only. Control information is entered through a separate serial port.Table 1. Serial Port ModesSub-frame Bits 17 to 24EXPExpand bitReserved. Must be set to zero.MUTEMute D/A Outputs0 - Normal Outputs1 - Mute OutputsISL Select Left Input Mux0 - Select LIN11 - Select LIN2ISRSelect Right Input Mux0 - Select RIN11 - Select RIN2INPUT DATA BIT DEFINITIONSSub-frame bits 1 to 16Left DAC Audio Data, MSB first, 2’s comple-ment coded.Sub-frame Bits 25 to 32LG3-LG0Sets left input gain.LG3 is the MSB. LG0 represents 1.5 dB.0000 = no gain.1111 = +22.5 dB gainRG3-RG0Sets right input gain.RG3 is the MSB. RGO represents 1.5 dB.0000 = no gainSub-frame Bits 51 to 60LA4-LA0Sets left output attenuationSub-frame Bits 61 to 64DO1-DO4Set the logic level on the 4 digital outputpins. In SM3 DO3 and DO4 are notavailable. In SM4 DO2, DO3, & DO4are not available.Sub-frame Bits 33 to 48Right DAC audio data MSB first, 2’s comple-ment coded.SM3Figure 5. Serial Data Input Format - SM1, SM2, and SM3.Sub-frame Bits 49 to 50Must be zero.Sub-frame Bits 17 to 24ADVADC Valid data bit.0-Invalid ADC data 1-Valid ADC dataIndicates ADC has completed initialization after power-up, low power mode,or mute.LCLLeft ADC clipping indicator 0-Normal 1-ClippingRCL Right ADC clipping indicator-Normal 1-ClippingRESERVED bits can be 0 or 1Sub-frame Bits 25 to 32ER3-ER0Error Word0000 -Normal – No errors.0001 -Input Sub-frame Bit 21 is set.Control data will not be loaded0010 -Sync Pulse is incorrect.Causes the analog output to mute.0011 -SCLK is outside the allowablerange. Analog output mutes.Ver3-Ver0CS4216 Version Number0000 = "A" (see Appendix A)0001 = "B", "C", . . . (This data sheet)Sub-frame Bits 33 to 48Right ADC Audio Data, MSB first, 2’s comple-ment coded.Sub-frame Bits 1 to 16Left ADC Audio Data, MSB first, 2’s comple-ment coded.OUTPUT DATA BIT DEFINITIONSSM3Figure 6. Serial Data Output Format - SM1, SM2, and SM3.Sub-frame Bits 49 to 60These bits are reserved, and can be 0 or 1.Sub-frame Bits 61 to 64DI1-DI4These bits follow the state of the Digital Input pins. In SM3 DI3 and DI4 are used and unavailable. In SM4 DI2, DI3, & DI4are not available as input bits.frequency. SM2 is similar to SM1 except that CLKIN is not used and SCLK becomes the mas-ter clock and is fixed at 256×Fs. SM3 was designed as an easy interface to general purpose DSPs and provides extra features such as one more bit of attenuation, a master mode, and vari-able frame sizes. SM4 is similar to SM3 but splits the audio data from the control data thereby reducing the audio serial bus bandwidth by half. The control data is transmitted through a control serial port in SM4.Table 1 lists the serial port modes available, along with some of the differences between modes. The first three columns in Table 1 select the serial mode. The "SCLK Bit Center" column indicates whether SCLK is rising or falling in the center of a bit period. The "Sub-frame Width" column indicates how many bits are in an individual codec’s sub-frame. SM4 differs from all other modes by separating the control data from the audio data. In both SM1 and SM2, there are 256 bits per frame which allows up to four codecs to occupy the same bus. In SM3 and SM4, the number of bits per frame is program-mable. In SM1 and SM2, SCLK and SSYNC must be generated externally; whereas, in SM3 and SM4 the CS4216 can optionally generate those signals. In all modes, SCLK and SSYNC must be synchronous to the master clock. The last column in Table 1 lists the master frequency used by the codec. In SM1, the master fre-quency, input on CLKIN, is 512 times the highest sample frequency available. In SM2, the master frequency is fixed at 256 times the sam-ple frequency and, in this mode, SCLK is the master clock. In SM3, the master frequency is 256 times the highest frequency available and is input on CLKIN or SCLK, based on the sub-mode used. In SM4, the master frequency is also 256 times the highest frequency available and is input on CLKIN.SERIAL MODE 1, SM1Serial Mode 1 is a slave mode selected by set-ting SMODE3 = SMODE2 = SMODE1 = 0. SCLK and SYNC must be synchronous the mas-ter clock. SM1 uses a two bit wide (minimum) frame sync with an optional word sync. In this mode, SSYNC low for one SCLK period fol-lowed by SSYNC high for a minimum of two SCLK periods indicates the beginning of a frame. The first bit of the frame starts with the rising edge of SSYNC. An optional word sync, being one SCLK period high, may be used to indicate the start of a new 32-bit word. Figures 5 and 6 contain the serial data format for SM1. In this serial mode, the ratio of two clocks are used to select sample frequency. These are the master clock CLKIN and the serial clock SCLK. CLKIN should be set to 512×Fs max, where Fs max is the maximum required sample rate. SCLK must be externally set to a value of CLKIN/N, such that SCLK equals 256 times the desired sample rate. The codec uses the ratio be-tween CLKIN and SCLK to set the internal sample frequency and causes the CS4216 to go into soft power down mode if the SCLK fre-quency drops to <CLKIN/12. Even if only 1 CS4216 is used, the timing for 4 devices must be maintained. Table 2 shows some example sample rates for SM1.Table 2. SM1 - Example Clock FrequenciesSERIAL MODE 2, SM2Serial Mode 2 is enabled by setting SMODE3 =SMODE2 = 0, and SMODE1 = 1. SM2 is simi-lar to SM1 except that SCLK is fixed at 256 ×Fs and is the master clock instead of CLKIN.The CLKIN pin is ignored in this mode and should be tied low. In SM2, the sample fre-quency will scale linearly with the frequency of SCLK. Up to four codecs may occupy the serial bus since each codec requires only 64 bit periods and a frame is fixed at 256 bit periods. The se-rial data format is the same as SM1 and is illustrated in Figures 5 and 6.The multifunction pins in SM2 are defined iden-tically to SM1. See Serial Mode 1, SM1 section for more details.SERIAL MODE 3, SM3Serial Mode 3 is enabled by setting SMODE3 = 0, SMODE2 = 1 and SMODE1 = 0.This mode is designed to interface easily to DSPs and has the added versatility of a program-mable number of bits per frame, a master mode,and one extra bit of D/A attenuation. In SM3,two of the parallel digital input bits and two of the parallel digital output bits are available.Master Clock FrequencyIn SM3, the master clock, CLKIN, must be 256 × Fs max . For example, given a 48 kHz maxi-mum sample frequency, the master clock frequency must be 12.288 MHz. SCLK and SSYNC must be synchronous to CLKIN.D/A AttenuationSM3 has one more bit per channel allocated for D/A attenuation which doubles the attenuation range. Figure 5 illustrates the serial data in,SDIN, sub-frame for all SM3 sub-modes. The upper portion of this figure shows modes SM1and SM2 where the D/A attenuation is located in Word B, bits 53 through 60. Four bits allow at-tenuation on each channel from 0 dB down to -22.5 dB using 1.5 dB steps. In SM3 the attenu-ation bits are still located in Word B, but start at bit 51 of the sub-frame. This allows five bits of attenuation per channel instead of four, produc-ing an attenuation range for each channel from 0 dB down to -46.5 dB.In SM3 MF5:DO2 is a general purpose output and MF6:DI2 is a general purpose input. The other six multifunction pins are used to select sub-modes under SM3.SM3 is divided into two sub-modes, Master and Slave. In Master sub-mode, the CS4216 gener-ates SSYNC and SCLK, while in Slave sub-mode SSYNC and SCLK must be generatedSFS2SFS1frame 001101011234SSYNC DATA FSFSFS =Frame SyncLow followed by Two High BitsWS =One High Optional Not Neededor SSYNCMF8:MF7:Sub-Figure 7. SM1, SM2 - 256 Bits per Frame.externally. In Master sub-mode, the serial port signal transitions are controlled with respect to the internal analog sampling clock to minimize the amount of digital noise coupled into the ana-log section. Since SSYNC and SCLK are externally derived in Slave sub-mode, optimum noise management cannot be obtained; therefore, Master sub-modes should be used whenever pos-sible.Master Sub-Mode (SM3)Master sub-mode is selected by setting MF4:MA = 1, which configures SSYNC and SCLK as outputs from the CS4216. During power down, SSYNC and SCLK are driven high impedance, and during reset they both are driven low. In Master sub-mode the number of bits per frame determines how many codecs can occupy the serial bus and is illustrated in Figure 8.Bits Per Frame (Master Sub-Mode)MF8:SFS2 selects the number of bits per frame. The two options are MF8:SFS2 = 1 which se-lects 128 bits per frame, and MF8:SFS2 = 0 which selects 64 bits per frame.Selecting 128 bits per frame (MF8:SFS2 = 1) al-lows two CS4216s to operate from the same serial bus since each codec requires 64 bit peri-ods. The sub-frame used by an individual codec is selected using MF7:SFS1. MF7:SFS1 = 0 se-lects sub-frame 1 which is the first 64 bits following the SSYNC pulse. MF7:SFS1 = 1 se-lects sub-frame 2 which is the last 64 bits of the frame.Selecting 64 bits per frame (MF8:SFS2 = 0) al-lows only one CS4216 to occupy the serial port. Since there is only one sub-frame (which is equal to one frame), MF7:SFS1 is defined differ-ently in this mode. MF7:SFS1 selects the format of SSYNC. MF7:SFS1 = 0 selects an SSYNC pulse one SCLK period high, directly preceding the data as shown in the center portion of Fig-ure 8. This format is used for all other Master and Slave sub-modes in SM3. If MF7:SFS1 = 1, an alternate SSYNC format is chosen in which SSYNC is high during the entire Word A (32 bits), which includes the left sample, and low for the entire Word B (32 bits), which in-cludes the right sample. This alternate format for SSYNC is illustrated in the bottom portion of Figure 8 and is only available in Master sub-mode with 64 bits per frame. A more detailed timing diagram for the 64 bits-per-frame Master sub-mode is shown in Figure 9.Sample Frequency Selection (Master Sub-Mode) In SM3, Master sub-mode, the multifunction pins MF1:F1, MF2:F2, and MF3:F3 are used to select the sample frequency divider. Table 3 lists the decoding for the sample frequency select pins where the sample frequency selected is CLKIN/N. Also shown are the sample frequen-cies obtained by using one of two example master clocks: either 12.288 MHz or 11.2896 MHz. The codec must be reset when changing sample frequencies to allow the codec to calibrate to the new sample frequency.Slave Sub-Mode (SM3)In SM3, Slave sub-mode is selected by setting MF4:MA = 0 which configures SSYNC and SCLK as inputs to the CS4216. These two sig-nals must be externally derived from CLKIN. In Slave sub-mode, the phase relationship between SCLK/SSYNC and CLKIN cannot be controlled since SCLK and SSYNC are externally derived. Therefore, the noise performance may be slightly worse than when using the master sub-mode. The number of sub-frames on the serial port is selected using MF1:F1 and MF2:F2. In Slave sub-mode MF3:F3 works as a general purpose input. Figures 10 through 12 illustrate the Slave sub-mode formats.DATA SSYNCDATA SSYNCDATA SFS2SFS1frame 1101MF8:MF7:Sub-12SFS2SFS1frame 0MF8:MF7:Sub-1SFS2SFS1frame 01MF8:MF7:Sub-1Figure 8. SM3, Master Sub-Mode.SCLKSSYNC (MF7:SFS1=0)SSYNC (MF7:SFS1=1)SDIN SDOUTFigure 9. Detailed Master Sub-Mode, 64 BPF.Bits per Frame (Slave Sub-Mode)In Slave sub-mode, MF1:F1 and MF2:F2 select the number of bits per frame which determines how many CS4216’s can occupy one serial port.Table 4 lists the decoding for MF1:F1 and MF2:F2.When set for 64 SCLKs per frame, one device occupies the entire frame; therefore, a sub-frame is equivalent to a frame. MF7:SFS1 and MF8:SFS2 must be set to zero. See Figure 10. When set for 128 SCLKs per frame, two devices can occupy the serial port, with MF7:SFS1 se-lecting the particular sub-frame. MF8:SFS2 must be set to zero. See Figure 11.When set for 256 SCLKs per frame (MF1:F1,MF2:F2 = 10), four devices can occupy the se-rial port. In this format both MF8:SFS2 and MF7:SFS1 are used to select the particular sub-frame. See Figure 12.In all three of the above Slave sub-mode for-mats, the frequency of the incoming SCLK signal, in relation to the master clock provided on the CLKIN pin, determines the sample fre-quency. The CS4216 determines the ratio of SCLK to CLKIN and sets the internal operatingfrequency accordingly. Table 5 lists the SCLK to CLKIN frequency ratio used to determine the codec’s sample frequency. To obtain a given sample frequency, SCLK must equal CLKIN di-vided by the number in the table, based on the number of bits per frame. As an example, assum-ing 64 BPF (bits per frame) and CLKIN = 12.288 MHz, if a sample frequency of 24 kHz is desired, SCLK must equal CLKIN di-vided by 8 or 1.536 MHz.When MF1:F1 = MF2:F2 = 1, SCLK is used as the master clock and is assumed to be 256 times the sample frequency. In this mode, CLKIN is ignored and the sample frequency is linearly scaled with SCLK. (The CLKIN pin must be tied low.) This mode also fixes SCLK at 256 bits per frame with MF7:SFS1 and MF8:SFS2 select-ing the particular sub-frame.Table 3. SM3-Master, Fs SelectSCLK is master clock. CLKIN is not used.Table 4. SM3-Slave, Bits per Frame.Table 5. SM3-Slave, Fs Select.SERIAL MODE 4, SM4Serial mode 4 is enabled by setting SMODE3 = 1. Both Master and Slave sub-modes are available and are selected by setting the SMODE2 and SMODE1 pins as shown in Table 6. In Master sub-mode, the phase relation-ship between SCLK/SSYNC and CLKIN is controlled to minimize digital noise coupling into the analog section. Therefore, Master sub-mode may yield slightly better noise performance than Slave sub-mode. In Slave sub-mode, SCLK and SSYNC must be synchronous to the master clock.In serial mode 4, SM4, the CLKIN frequency must be 256 times the highest sample frequency needed. Also, SM4 has five attenuation bits foreach D/A output channel. SM4 differs from SM3in that SM4 splits the audio data from the con-trol data with the control data input on an independent serial port. This reduces the audio serial bus bandwidth in half, providing an easier interface to low-cost DSPs. The audio serial port sub-frame is illustrated in Figure 13 for SM4.Interrupt Pin - MF5:INTSerial Mode 4 also defines the multifunction pin SM4, this pin requires a pullup resistor and will go low when the ADV bit or DI1 pin change, or a rising edge on the LCL or RCL bits, or by exiting an SCLK out of range condition (Er-ror = 3). The interrupt may be masked by setting the MSK bit in the control serial data port.SSYNCDATA SFS2SFS1frame 01MF8:MF7:Sub-Figure 10. SM3-Slave - 64 BPF; MF1:F1, MF2:F2 = 00SSYNCDATA SFS2SFS1frame 000112MF8:MF7:Sub-Figure 11. SM3-Slave - 128 BPF; MF1:F1, MF2:F2 = 01SSYN D ATASFS2SFS1fram e 001101011234M F8:M F7:Sub-Figure 12. SM3-Slave - 256 BPF; MF1:F1, MF2:F2 = 10MF5:INT is reset by reading the control serial port.Master Sub-Mode (SM4)Master sub-mode configures SSYNC and SCLK as outputs from the CS4216. During power down, SSYNC and SCLK are driven high im-pedance, and during reset they both are driven low. There are two SM4 Master sub-modes. One allows 32 bits per frame and the other allows 64bits per frame. As shown in Table 6, the SMODE1 and SMODE2 pins select the particu-lar Master sub-mode (as well as the Slave sub-mode). When SMODE1 is set to zero,SMODE2 selects either Master sub-mode with 32-bit frames, or Slave sub-mode.SMODE1,SMODE2 = 00 selects Master sub-mode where a frame = sub-frame = 32 bits. This sub-mode allows only one codec on the audio serial bus, with the first 16 bits being the left channel and the second 16 bits being the rightchannel. The Applications of SM4 section con-tains more information on low-cost implementations of this sub-mode.SMODE1 = 1 selects Master sub-mode with a frame width of 64 bits. This sub-mode allows up to two codecs to occupy the same bus. SMODE2is now used to select the particular time slot. If SMODE2 = 0 the codec selects time slot 1,which is the first 32 bits. If SMODE2 = 1 the codec selects time slot 2, which is the second 32 bits.In Master sub-mode, multifunction pins MF6:F1,MF7:F2, and MF8:F3 select the sample fre-quency as shown in Table 7. This table indicates how to obtain standard audio sample frequencies given one of two CLKIN frequencies:12.288 MHz or 11.2896 MHz. Other CLKIN frequencies may be used with the corresponding sample frequencies being CLKIN/N. The codec must be reset when changing sample frequencies to allow a new calibration to occur.Slave Sub-Mode (SM4)In SM4, Slave sub-mode is selected by setting SMODE1,SMODE2 = 01. This mode configures SSYNC and SCLK as inputs to the CS4216.These two signals must be externally derived from CLKIN. Since the CS4216 has no control over the phase relationship of SSYNC andTable 6. SM4 Sub-Modes.SSYNC SCLKSDINSDOUT(slave)(m aster)Figure 13. SM4-Audio Serial Port, 32 BPF。

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24 风冷冷水机组
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模块式空气源热泵热水机组MHA
42 末端空调机组
组合式空气处理机组 MDM 洁净室用空气调节机组 MDX 单壁柜式空气处理机组 MSW 双壁柜式空气处理机组 MDW 超薄吊顶式空气处理机组 MHW 卧式暗装风机盘管 MCW 立式暗装风机盘管 MFCW 立式明装风机盘管 MFMW 天花嵌入式风机盘管 MCKW 卧式明装风机盘管 MCMW 吊顶式全热热回收新风机组 HRB
轮的工作效率。 ■独特的可移动式排气散流滑块设计，避免喘振的发生。 ■独有的热力膨胀阀作导阀的流量调节装置，调节精度更佳，节约能源和运行费用。 ■每台压缩机均设有后备油缸装置，保证突然停电时机组供油润滑，确保压缩机安全停机。 ■独有的喷液注射降噪装置，有效降低高速气体冲击蜗壳所产生的噪声，同时降低排气温度，提高冷凝器

PIC16F72T-IML;中文规格书,Datasheet资料

SSP MODULEThe PIC® microcontrollers you have received all exhibit anomalous behavior in their Synchronous Serial Port (SSP) modules, as described in this document. They otherwise conform functionally to the descriptions pro-vided in their respective Device Data Sheets and Ref-erence Manuals, as amended by silicon release errata for particular devices.Users are encouraged to review the latest device data sheets and errata available for additional information concerning an individual device. These documents may be obtained directly from the Microchip corporate web site, at .Silicon ErrataThese issues are expected to be resolved in future silicon revisions of the designated parts.The silicon issues identified in this “Silicon Errata” section affect all silicon revisions of the following devices:1.Module:I2C™ (Slave Mode)In its current implementation, the module may fail to correctly recognize certain Repeated Start conditions. For this discussion, a Repeated Start is defined as a Start condition presented to the bus after an initial valid Start condition has been recog-nized and the Start status bit (SSPSTAT<3>) has been set and before a valid Stop condition is received.I f a Repeated Start is not recognized, a loss ofsynchronization between the Master and Slave may occur; the condition may continue until the module is reset. A NACK condition, generated by the Slave for any reason, will not reset the module.This failure has been observed only under two circumstances:• A Repeated Start occurs within the frame of adata or address byte. The unexpected Startcondition may be erroneously interpreted as adata bit, provided that the required conditionsfor setup and hold times are met.• A Repeated Start condition occurs between twoback-to-back slave address matches in the1)in both cases. (This circumstance is regardedas being unlikely in normal operation.)Work aroundA time-out routine should be used to monitor themodule’s operation. The timer is enabled upon the receipt of a valid Start condition; if a time-out occurs, the module is reset. The length of the time-out period will vary from application to application and will need to be determined by the user.Two methods are suggested to reset the module:1.Change the mode of the module to somethingother than the desired mode by changing the set-tings of bits, SSPM3:SSPM0 (SSPCON<3:0>);then, change the bits back to the desiredconfiguration.2.Disable the module by clearing the SSPEN bit(SSPCON<5>); then, re-enable the module bysetting the bit.Other methods may be available.•PIC14000•PIC16C923•PIC16C62•PIC16C924•PIC16C62A•PIC16C925•PIC16C62B•PIC16C926•PIC16C63•PIC16CR62•PIC16C63A•PIC16CR63•PIC16C64•PIC16CR64•PIC16C64A•PIC16CR65•PIC16C65•PIC16CR72•PIC16C65A•PIC16CR72A•PIC16C65B•PIC16F72•PIC16C66•PIC16F73•PIC16C67•PIC16F74•PIC16C717•PIC16F76•PIC16C72•PIC16F77•PIC16C72A•PIC16F87•PIC16C73•PIC16F88•PIC16C73A•PIC16F818•PIC16C73B•PIC16F819•PIC16C74•PIC18F2331•PIC16C74A•PIC18F2431•PIC16C74B•PIC18F4331•PIC16C76•PIC18F4431•PIC16C77SSP Module Silicon/Data Sheet Errata© 2007 Microchip Technology Inc.DS80132F-page 1SSP MODULEDS80132F-page 2© 2007 Microchip Technology Inc.Clarifications/Corrections to the Data Sheets1.Module:SSP (SPI Mode)The description of the operation of the CKE bit (SSPSTAT<6>) is clarified. Please substitute the description in Register 1, below, for all occurrences of the existing text for the SSPSTAT register, bit 6 (new text in bold ). 2.Module:SSP (SPI Slave Mode)The description of the operation of SPI Slave mode is clarified as follows:Before enabling the module in SPI Slave mode, the state of the clock line (SCK) must match the polarity selected for the dle state. The clock line can be observed by reading the SCK pin. The polarity of the Idle state is determined by the CKP bit (SSPCON<4>).This foregoing text should be added to the appropriate subsections of the “SSP Module” chapter, entitled “SPI Mode” and read in context with any discussions of SPI Slave mode.n the case of DS30234D, the text applies to both implementations of SP I mode, as described in Sections 11.2 and 11.3.REGISTER 1:SSPSTAT: SSP STATUS REGISTER (EXCERPT)Note:This correction applies to the Data Sheets for the following devices:•PIC16C62B/72A (DS35008B)•PIC16C63A/65B/73B/74B (DS30605C)•PIC16C923/924 (DS30444E)•PIC16C925/926 (DS39544A)•PIC16F72 (DS39597B)•PIC16F73/74/76/77 (DS30325B)•PIC18F2331/2431/4331/4431 (DS39616B)In addition, this clarification applies only to the following devices in the P C16C6X Data Sheet (DS30234D):•PIC16C66•PIC16C67In addition, this clarification applies only to the following devices in the P C16C7X Data Sheet (DS30390E):•PIC16C76•PIC16C77Any devices not explicitly listed in this section do not implement SPI mode and are not affected by this clarification.Note:This text refers only to the operation of the CKE bit in SPI mode; its operation in I 2C mode is unchanged.Note:This correction applies to the Data Sheets for the following devices:•PIC16C6X (DS30234D), except PIC16C61 (does not implement the SSP module)•PIC16C62B/72A (DS35008B)•PIC16C63A/65B/73B/74B (DS30605C)•PIC16C72/73/73A/74/74A/76/77 (DS30390E)•PIC16C923/924 (DS30444E)•PIC16C925/926 (DS39544A)•PIC16F72 (DS39597B)•PIC16F73/74/76/77 (DS30325B)•PIC18F2331/2431/4331/4431 (DS39616B)Any other devices not explicitly listed in this section do not implement SPI mode and are not affected by this clarification.bit 6CKE: SPI Clock Edge Select bit1 =Transmit occurs on transition from active to Idle clock state 0 =Transmit occurs on transition from Idle to active clock state Note:Polarity of clock state is set by the CKP bit (SSPCON<4>).© 2007 Microchip Technology Inc.DS80132F-page 3SSP MODULE3.Module:SSP (I 2C Mode)The description of the I 2C pins related to the TRIS bits is clarified. To ensure proper communication of the I 2C Slave mode, the TRIS bits (TRISx [SDA,SCL]) corresponding to the I 2C pins must be set to ‘1’. If any TRIS bits (TRISx<7:0>) of the port con-taining the 2C pins (PORTx [SDA, SCL]) are changed in software during I 2C communication using a Read-Modify-Write instruction (BSF , BCF ),then the I 2C mode may stop functioning properly and 2C communication may suspend. Do not change any of the TRISx bits (TRIS bits of the port containing the I 2C pins) using the instruction BSF or BCF during I 2C communication. If it is absolutely necessary to change the TR I Sx bits during communication, the following method can be used:Note:This correction applies to the Data Sheets for the following devices:•PIC14000 (DS40122B)•PIC16C6X (DS30234D) exceptPIC16C61 (does not implement SSP module)•PIC16C62B/72A (DS35008B)•PIC16C63A/65B/73B/74B (DS30605C)•PIC16C72/73/73A/74/74A/76/77 (DS30390E)•PIC16C923/924 (DS30444E)•PIC16C925/926 (DS39544A)•PIC16F72 (DS39597B)•PIC16F73/74/76/77 (DS30325B)MOVF TRISC, W ; Example for a 40-pin part such as the PIC16F73IORLW 0x18; Ensures <4:3> bits are ‘11’ANDLW B’11111001’; Sets <2:1> as output, but will not alter other bits; User can use their own logic here, such as IORLW, XORLW and ANDLWMOVWFTRISCSSP MODULEREVISION HISTORYRevision A Document (7/2002):Original version (I2C Slave Issue).Revision B Document (1/2003):Clarification of original issue to include Restartconditions. Addition of data sheet clarification 1 (SPIMode, CKE bit).Revision C Document (3/2003):Addition of data sheet clarification 2 (SPI Slave Mode,operation).Revision D Document (9/2004):Updated list of affected devices for silicon issue 1 (I2C– Slave Mode) and 2 (SSP – SP, Slave Mode),removed silicon issue 3 (I2C – Slave Mode). Updatedlist of affected devices for data sheet clarification 1(SSP – SPI Mode) and 2 (SSP – SPI Slave Mode).Added data sheet clarification 3 (SSP – I2C Mode).Revision E Document (7/2006):Removed silicon issue 2 (SSP – SPI Slave Mode).Revision F Document (2/2007):Added four devices to list of devices affected by thesilicon errata and clarified the related language.DS80132F-page 4© 2007 Microchip Technology Inc.© 2007 Microchip Technology Inc.DS80132F-page 5I nformation contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications.M I CROCH I P MAKES NO REPRESENTAT I ONS OR WARRANT ES OF ANY K ND WHETHER EXPRESS OR I MPL I ED, WR I TTEN OR ORAL, STATUTORY OR OTHERW I SE, RELATED TO THE I NFORMAT I ON,I NCLUD I NG BUT NOT L I M I TED TO I TS COND I T I ON,QUAL I TY , PERFORMANCE, MERCHANTAB I L I TY OR F TNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.TrademarksThe Microchip name and logo, the Microchip logo, Accuron,dsPIC, K EE L OQ , K EE L OQ logo, micro ID , MPLAB, PIC,PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of MicrochipTechnology Incorporated in the U.S.A. and other countries.AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company areregistered trademarks of Microchip Technology Incorporated in the U.S.A.Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, , dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,In-Circuit Serial Programming, ICSP , ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, , PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, TotalEndurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.All other trademarks mentioned herein are property of their respective companies.© 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.Printed on recycled paper.Note the following details of the code protection feature on Microchip devices:•Microchip products meet the specification contained in their particular Microchip Data Sheet.•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to ourknowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.•Microchip is willing to work with the customer who is concerned about the integrity of their code.•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC ® DSCs, K EE L OQ ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analogproducts. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.AMERICASCorporate Office2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200Fax: 480-792-7277 Technical Support: Web Address: AtlantaDuluth, GATel: 678-957-9614Fax: 678-957-1455BostonWestborough, MATel: 774-760-0087Fax: 774-760-0088 ChicagoItasca, ILTel: 630-285-0071Fax: 630-285-0075DallasAddison, TXTel: 972-818-7423Fax: 972-818-2924DetroitFarmington Hills, MITel: 248-538-2250Fax: 248-538-2260 KokomoKokomo, INTel: 765-864-8360Fax: 765-864-8387Los AngelesMission Viejo, CATel: 949-462-9523Fax: 949-462-9608Santa ClaraSanta Clara, CATel: 408-961-6444Fax: 408-961-6445 TorontoMississauga, Ontario, CanadaTel: 905-673-0699Fax: 905-673-6509ASIA/PACIFICAsia Pacific OfficeSuites 3707-14, 37th FloorTower 6, The GatewayHabour City, KowloonHong KongTel: 852-2401-1200Fax: 852-2401-3431Australia - SydneyTel: 61-2-9868-6733Fax: 61-2-9868-6755China - BeijingTel: 86-10-8528-2100Fax: 86-10-8528-2104China - ChengduTel: 86-28-8665-5511Fax: 86-28-8665-7889China - FuzhouTel: 86-591-8750-3506Fax: 86-591-8750-3521China - Hong Kong SARTel: 852-2401-1200Fax: 852-2401-3431China - QingdaoTel: 86-532-8502-7355Fax: 86-532-8502-7205China - ShanghaiTel: 86-21-5407-5533Fax: 86-21-5407-5066China - ShenyangTel: 86-24-2334-2829Fax: 86-24-2334-2393China - ShenzhenTel: 86-755-8203-2660Fax: 86-755-8203-1760China - ShundeTel: 86-757-2839-5507Fax: 86-757-2839-5571China - WuhanTel: 86-27-5980-5300Fax: 86-27-5980-5118China - XianTel: 86-29-8833-7250Fax: 86-29-8833-7256ASIA/PACIFICIndia - BangaloreTel: 91-80-4182-8400Fax: 91-80-4182-8422India - New DelhiTel: 91-11-4160-8631Fax: 91-11-4160-8632India - PuneTel: 91-20-2566-1512Fax: 91-20-2566-1513Japan - YokohamaTel: 81-45-471- 6166Fax: 81-45-471-6122Korea - GumiTel: 82-54-473-4301Fax: 82-54-473-4302Korea - SeoulTel: 82-2-554-7200Fax: 82-2-558-5932 or82-2-558-5934Malaysia - PenangTel: 60-4-646-8870Fax: 60-4-646-5086Philippines - ManilaTel: 63-2-634-9065Fax: 63-2-634-9069SingaporeTel: 65-6334-8870Fax: 65-6334-8850Taiwan - Hsin ChuTel: 886-3-572-9526Fax: 886-3-572-6459Taiwan - KaohsiungTel: 886-7-536-4818Fax: 886-7-536-4803Taiwan - TaipeiTel: 886-2-2500-6610Fax: 886-2-2508-0102Thailand - BangkokTel: 66-2-694-1351Fax: 66-2-694-1350EUROPEAustria - WelsTel: 43-7242-2244-39Fax: 43-7242-2244-393Denmark - CopenhagenTel: 45-4450-2828Fax: 45-4485-2829France - ParisTel: 33-1-69-53-63-20Fax: 33-1-69-30-90-79Germany - MunichTel: 49-89-627-144-0Fax: 49-89-627-144-44Italy - MilanTel: 39-0331-742611Fax: 39-0331-466781Netherlands - DrunenTel: 31-416-690399Fax: 31-416-690340Spain - MadridTel: 34-91-708-08-90Fax: 34-91-708-08-91UK - WokinghamTel: 44-118-921-5869Fax: 44-118-921-5820 W ORLDWIDE S ALES AND S ERVICE12/08/06DS80132F-page 6© 2007 Microchip Technology Inc.分销商库存信息: MICROCHIPPIC16F72T-I/ML。

M57962CL-01;中文规格书,Datasheet资料

1Gate DriverM57962CL-01Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272Hybrid Integrated Circuit For Driving IGBT ModulesDescription:M57962CL-01 is a hybridintegrated circuit designed for driving n-channel IGBT modules in any gate amplifier application. This device operates as an isolation amplifier for these modules and provides the required electrical isolation between the input and output with an opto-coupler. Short circuit protection is provided by a built in desaturation detector. A fault signal is provided if the short circuit protection is activated.Features:□Electrical Isolation betweeninput and output with opto-couplers.(V iso = 2500V RMS for 1 min.)□Two supply drive topology □Built in short circuit protectioncircuit with a pin for fault output □Variable fall time on activity ofshort circuit protection□TTL compatible input interface Application:To drive IGBT modules for inverter,AC Servo systems, UPS, CVCF inverter, and welding applications.Recommended Modules:V CES = 600V Series(up to 800A Class)V CES = 1200V Series(up to 400A Class)/Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272M57962CL-01Hybrid IC for IGBT Gate DriverAbsolute Maximum Ratings, T a =25°C unless otherwise specifiedItem Symbol Test Conditions Limit Units Supply Voltage V CC DC 18VoltsV EE DC-15Volts Input Voltage V I Applied between: 13 – 14-1 ~ 7Volts Output Voltage V O Output Voltage “H”V CC Volts Output Current I OHP Pulse Width 2µs, f ≤ 20kHz -5AmperesI OLP Pulse Width 2µs, f ≤ 20kHz5Amperes Isolation Voltage V RMS Sinewave Voltage 60Hz, 1 min.2500Volts Case T emperature T c85°C Operating Temperature T opg-20 ~ 60°C Storage Temperature t stg-25 ~ 100°C Fault Output Current I FO Applied 8 pin20mA Input Voltage V R1Applied 1 pin50Volts2/Powerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272M57962CL-01Hybrid IC for IGBT Gate DriverElectrical Characteristics, T a = 25°C, V CC = 15V, V EE = -10V unless otherwise specifiedCharacteristics Symbol Test Conditions Min.Typ.Max.UnitsSupply Voltage V CC Recommended Range14 15—VoltsV EE Recommended Range -7—-10Volts Pull-up Voltage on Input Side V IN Recommended Range 4.75 5.00 5.25Volts“H” Input Current I IH Recommended Range15.21619mASwitching Frequency f Recommended Range——20kHzGate Resistor R G Recommended Range2——Ω“H” Input Current I IH V IN = 5V—16—mA“H” Output Voltage V OH1314—Volts“L” Output Voltage V OL-8-9—Volts“L-H” Propagation Time t PLH I IH = 16mA—0.5 1.0µs“L-H” Rise Time t r I IH = 16mA—0.6 1.0µs“H-L” Propagation Time t PHL I IH = 16mA—0.8 1.3µs“H-L” Fall Time t f I IH = 16mA—0.4 1.0µsTimer t timer Between start and cancel 1.0— 2.0ms(under input sign “L”)Fault Output Current I FO Applied 8 pin, R = 4.7kΩ— 5.0—mAControlled Time Detect Short Circuit 1t trip1Pin1: 15V and more, Pin 2 : Open— 2.6—µsControlled Time Detect Short Circuit 2*t trip2Pin1: 15V and more,— 3.0—µsPin 2 – 4 : 1000pF (Connective Capacitance)SC Voltage V SC SC Detect Voltage15——Volts*Length of wiring of condenser controlled time detect short circuit is within 5cm from 2 and 4 pin coming and going.3/4M57962CL-01Hybrid IC for IGBT Gate DriverPowerex, Inc., 200 Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272AMBIENT TEMPERATURE, T a , (°C) P R O P A G A T I O N D E L A Y T I M E "L -H ", t P L H , (µs ) P R O P A G A T I O N D E L A Y T I M E "H -L ", t P H L , (µs )PROPAGATION DELAY TIME VS. AMBIENT TEMPERATURE CHARACTERISTICS (TYPICAL)1.62040601.21.41.00.60.80.20.4080INPUT SIGNAL VOLTAGE, V I , (VOLTS) P R O P A G A T I O N D E L A Y T I M E "L -H ", t P L H , (µs ) P R O P A G A T I O N D E L A Y T I M E "H -L ", t P H L , (µs )PROPAGATION DELAY TIME VS. SIGNAL VOLTAGE CHARACTERISTICS (TYPICAL)1.634561.21.41.00.60.80.20.407AMBIENT TEMPERATURE, T a , (°C)C O N T R O L L ED T I ME D E T E C T S H O R T C I R C U I T , t t r i p 1, t t r i p 2, (µs )CONTROLLED TIME DETECT VS. AMBIENT TEMPERATURE CHARACTERISTICS (TYPICAL)802040606753412080CONNECTIVE CAPACITANCE, C trip , (pF)PIN: 2 4C O N T R O L L ED T I ME D E T E C T S H O R T C I R C U I T , t t r i p , (µs )CONTROLLED TIME DETECT VS. CONNECTIVE CAPACITANCECHARACTERISTICS (TYPICAL)80200040006000675341208000AMBIENT TEMPERATURE, T a , (°C)P O W E R D I S S I P A T I O N , P D , (W A T T S )POWER DISSIPATION VS. AMBIENT TEMPERATURE(MAXIMUM RATING)020*******3412010000.020.040.080.06503040102000.1SUPPLY VOLTAGE, V CC , (VOLTS)APPLIED BETWEEN: 4 6D I S S I P A T IO N C U R R E N T , (m A )DISSIPATION CURRENT VS. SUPPLY VOLTAGE INPUT SIGNAL "L" (TYPICAL)FA L L T I M E O F S H O R T C I R C U I T , t 1, t 2, (µs )SLOW SHUTDOWN SPEED (t 1, t2) VS. C S01020C S (µF)304025205101550V pin 1V GE/分销商库存信息: POWEREXM57962CL-01。

MC74ACT139中文资料

MC74AC139, MC74ACT139 Dual 1−of−4Decoder/DemultiplexerThe MC74AC139/74ACT139 is a high−speed, dual 1−of−4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually−exclusive active−LOW outputs. Each decoder has an active−LOW Enable input which can be used as a data input for a 4−output demultiplexer. Each half of the MC74AC139/74ACT139 can be used as a function generator providing four minterms of two variables.•Multifunctional Capability•Two Completely Independent 1−of−4 Decoders•Active LOW Mutually Exclusive Outputs•Outputs Source/Sink 24 mA•′ACT139 Has TTL Compatible Inputsw These devices are available in Pb−free package(s). Specifications herein apply to both standard and Pb−free devices. Please see our website at for specific Pb−free orderable part numbers, or contact your local ON Semiconductor sales office or representative.E O O O OFigure 1. Pinout: 16−Lead Packages Conductors(Top View)PIN ASSIGNMENTPIN FUNCTIONA0, A1Address InputsE Enable InputsO0−O3OutputsTRUTH TABLEInputsOutputsE A0A1O0O1O2O3 H X X H H HH L L L L H H H L H L H L H H L L H H H L H L H H H HH L H = HIGH Voltage LevelL = LOW Voltage LevelX = ImmaterialDIP−16N SUFFIXCASE 6481SO−16D SUFFIXCASE 751BDevice Package ShippingORDERING INFORMATIONMC74AC139N PDIP−1625 Units/Rail MC74AC139D SOIC−1648 Units/Rail MC74AC139DR22500 Tape & ReelTSSOP−16DT SUFFIXCASE 948FMC74AC139DT TSSOP−1696 Units/Rail MC74AC139DTR2TSSOP−16SOIC−162500 Tape & Reel MC74ACT139N PDIP−1625 Units/Rail MC74ACT139D SOIC−1648 Units/Rail MC74ACT139DR22500 Tape & Reel MC74ACT139DT TSSOP−1696 Units/RailSOIC−16See general marking information in the device marking section on page 6 of this data sheet.DEVICE MARKING INFORMATIONEIAJ−16M SUFFIXCASE 966MC74AC139M EIAJ−16MC74AC139MEL EIAJ−162000 Tape & Reel MC74ACT139M EIAJ−16MC74ACT139MEL EIAJ−162000 Tape & Reel50 Units/Rail50 Units/Rail00a 01a 02a 03a 00b 01b 02b 03bNOTE:This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.Figure 3. Logic DiagramFUNCTIONAL DESCRIPTIONThe MC74AC139/74ACT139 is a high −speed dual 1−of −4 decoder/demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A 0−A 1) and provides four mutually exclusive active −LOW outputs (O 0−O 3). Each decoder has an active −LOW enable (E). When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4−output demultiplexer application. Each half of the MC74AC139/74ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 4, and thereby reducing the number of packages required in a logic network.E A 0A 1E A 0A 1E A 0A 1E A 0A 1O 0O 1O 2O 3Figure 4. Gate Functions (Each Half)MAXIMUM RATINGS*Symbol Parameter Value UnitV CC DC Supply Voltage (Referenced to GND)−0.5 to +7.0VV IN DC Input Voltage (Referenced to GND)−0.5 to V CC +0.5VV OUT DC Output Voltage (Referenced to GND)−0.5 to V CC +0.5VI IN DC Input Current, per Pin±20mAI OUT DC Output Sink/Source Current, per Pin±50mAI CC DC V CC or GND Current per Output Pin±50mAT stg Storage Temperature−65 to +150°C*Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recom-mended Operating Conditions.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage′AC 2.0 5.0 6.0V ′ACT 4.5 5.0 5.5V IN, V OUT DC Input Voltage, Output Voltage (Ref. to GND)0−V CC Vt r, t f Input Rise and Fall Time (Note 1)′AC Devices except Schmitt Inputs V CC @ 3.0 V−150−V CC @ 4.5 V−40−ns/V V CC @ 5.5 V−25−t r, t f Input Rise and Fall Time (Note 2)′ACT Devices except Schmitt Inputs V CC @ 4.5 V−10−ns/V V CC @ 5.5 V−8.0−T J Junction Temperature (PDIP)−−140°C T A Operating Ambient Temperature Range−402585°C I OH Output Current − High−−−24mAI OL Output Current − Low−−24mA1.V IN from 30% to 70% V CC; see individual Data Sheets for devices that differ from the typical input rise and fall times.2.V IN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.DC CHARACTERISTICSSymbol Parameter V CC(V)74AC74ACUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 3.0 1.5 2.1 2.1V OUT = 0.1 V4.5 2.25 3.15 3.15V or V CC− 0.1 V5.5 2.75 3.85 3.85V IL Maximum Low LevelInput Voltage 3.0 1.50.90.9V OUT = 0.1 V4.5 2.25 1.35 1.35V or V CC− 0.1 V5.5 2.75 1.65 1.65V OH Minimum High LevelOutput Voltage 3.0 2.99 2.9 2.9I OUT = −50 m A4.5 4.49 4.4 4.4V5.5 5.49 5.4 5.4V*V IN = V IL or V IH3.0− 2.56 2.46−12 mA4.5− 3.86 3.76I OH−24 mA5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 3.00.0020.10.1I OUT = 50 m A4.50.0010.10.1V5.50.0010.10.1V*V IN = V IL or V IH3.0−0.360.4412 mA4.5−0.360.44I OL24 mA5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V Min I CC Maximum QuiescentSupply Current5.5−8.080m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.NOTE:I IN and I CC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V CC.AC CHARACTERISTICS(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)Symbol Parameter V CC*(V)74AC74ACUnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation DelayA n to O n3.34.08.011.5 3.513ns3−65.0 3.06.58.5 2.59.5t PHL Propagation DelayA n to O n3.3 3.07.010 2.511ns3−65.0 2.5 5.57.5 2.08.5t PLH Propagation DelayE n to O n3.34.59.512 3.513ns3−65.0 3.57.08.5 3.010t PHL Propagation DelayE n to O n3.34.08.010 3.011ns3−65.0 2.56.07.5 2.58.5*Voltage Range 3.3 V is 3.3 V ±0.3 V. *Voltage Range 5.0 V is 5.0 V ±0.5 V.DC CHARACTERISTICSSymbol Parameter V CC(V)74ACT74ACTUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 4.5 1.5 2.0 2.0VV OUT = 0.1 V 5.5 1.5 2.0 2.0or V CC− 0.1 VV IL Maximum Low LevelInput Voltage 4.5 1.50.80.8VV OUT = 0.1 V 5.5 1.50.80.8or V CC− 0.1 VV OH Minimum High LevelOutput Voltage 4.5 4.49 4.4 4.4VI OUT = −50 m A5.5 5.49 5.4 5.4*V IN = V IL or V IH4.5− 3.86 3.76VI OH−24 mA 5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 4.50.0010.10.1VI OUT = 50 m A5.50.0010.10.1*V IN = V IL or V IH4.5−0.360.44VI OL24 mA 5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDD I CCT Additional Max. I CC/Input 5.50.6− 1.5mA V I = V CC−2.1 VI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V Min I CC Maximum QuiescentSupply Current5.5−8.080m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.AC CHARACTERISTICS(For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)Symbol Parameter V CC*(V)74ACT74ACTUnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation DelayA n to O n5.0 1.56.08.5 1.59.5ns3−6t PHL Propagation DelayA n to O n5.0 1.56.09.5 1.510.5ns3−6t PLH Propagation DelayE n to O n5.0 2.57.010.0 2.011.0ns3−6t PHL Propagation DelayE n to O n5.0 2.07.09.5 1.510.5ns3−6*Voltage Range 5.0 V is 5.0 V ±0.5 V.CAPACITANCESymbol Parameter ValueTyp Unit Test ConditionsC IN Input Capacitance 4.5pF V CC = 5.0 V C PD Power Dissipation Capacitance40pF V CC = 5.0 VMARKING DIAGRAMSA = Assembly Location WL, L = Wafer Lot YY , Y = YearWW, W = Work WeekAC139AWLYWWMC74AC139N AWLYYWWAC 139ALYWACT139AWLYWWACT 139ALYWMC74ACT139N AWLYYWW DIP −16SO −16TSSOP −16EIAJ −1674AC139ALYW74ACT139ALYWPACKAGE DIMENSIONSNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.4.DIMENSION B DOES NOT INCLUDE MOLD FLASH.5.ROUNDED CORNERS OPTIONAL.MDIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.7400.77018.8019.55B 0.2500.270 6.35 6.85C 0.1450.175 3.69 4.44D 0.0150.0210.390.53F 0.0400.70 1.02 1.77G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.0080.0150.210.38K 0.1100.130 2.80 3.30L 0.2950.3057.507.74M 0 10 0 10 S0.0200.0400.51 1.01____PDIP −16N SUFFIX16 PIN PLASTIC DIP PACKAGECASE 648−08NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.SBM0.25 (0.010)AST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.8010.000.3860.393B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2290.244R0.250.500.0100.019____SO −16D SUFFIX16 PIN PLASTIC SOIC PACKAGECASE 751B −05ISSUE JPACKAGE DIMENSIONSTSSOP −16DT SUFFIX16 PIN PLASTIC TSSOP PACKAGECASE948F −01ISSUE ODIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.180.280.0070.011J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH.PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15(0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.____EIAJ −16M SUFFIX16 PIN PLASTIC EIAJ PACKAGECASE966−01ISSUE ONOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.NotesNotesMC74AC139, MC74ACT139NotesON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION元器件交易网。

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Leaderway CNC Technologies V42iW 垂直机器中心产品清单说明书

VERTICAL MACHININGCENTERPARTS LISTV42iWLEADERWAY CNC TECHNOLOGIES CO., LTD.NO. 36, Ln. 211, Taiming Rd.,Wuri Dist, TAICHUNG 41468, TAIWANTEL: +886-4-2335-0711FAX: +886-4-2335-0986台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F11051主軸頭+立柱單元SPINDLE HEAD + COLUMN UNITV42iW00103500010B0調整檔塊ADJUSTABLE STOPPER3140\SS41200203500012B0滑座壓塊SLIDING BLOCK,ADJUSTABLE BRA3210\SS41400303582170A0主軸頭SPINDLE HEAD1010\3582170A2\FC30100403582171A0立柱COLUMN 1020\3582171A2\FC-30100503582196A0Z軸下摺動罩LOWER TELESCOPIC COVER, Z 9400\SPCCZ100603582197A0Z軸防屑擋板PLATE FOR CHIP 7210\200703582198A0碰塊座支撐架RIGHT DOG BRACKET SUPPORTER SS41100803582199A0微動開關座(Z)MICRO SWITCH BRACKET, Z AXIS 3160\SS41100904800143204微動開關MICRO SWITCH BNS819-B02-D12-61-12-10BALLU1010********B0碰塊座DOG BRACKET 4140\AL(125m/m*3軌)201103500081A0碰塊DOG 3140\SS41(42m/m)201203540007A0碰塊DOG 4140\AL 外購65L101303985075A0線性滑軌-Z軸LINEAR GUIDE9840\#35滾柱型101404080106015直銷(軸承鋼針)PINφ6x15L5801503582201A0主軸頭右側蓋板RIGHT COVER, SPINDLE HEAD7510\SPCC101603582202A0主軸頭左側蓋板LEFT COVER, SPINDLE HEAD7510\SPCC101703582203A0主軸頭前蓋板FRONT COVER,SPINDLE HEAD7510\SPCC101803582204A0主軸聯動管支架CONDUIT BRACKET7210\SPCC101903582205A0主軸頭側壓克力板ACRYLIC PLATE, SIDE OF SPIND4360\ACRY1020********A0主軸頭右側架RIGHT BRACKET, SPINDLE HEAD7510\SPCC1021********A0主軸頭外側蓋板SIDE COVER,SPINDLE HEADSTOCK7510\SPCC102204640065133方型聯動管WIRE CONDUITK Y-CE(CBS65.2)-65x133-(22目)102304210550003總流量控制組COOLANT NOZZLE MANIFOLD J TM-01控制組\5/8"插心1024********B0近接開關座PROXIMITY SWITCH BRACKET 7160\SPCC1025********A0刀具釋放指示牌NAME PLATE4350\AL1<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F16015配重單元COUNTER BALANCE UNITV42iW00103582190A0配重COUNTER BALANCE3070\SS41100203500006C0鏈輪軸固定座SPROCKET SHAFT BRACKET1210\FC-25\3500006A2200303500021A0鏈條滾輪ROLLER3260\S45C400403500022C0鏈輪軸SHAFT SPROCKET 3260\S45C400504060700025C型扣環(軸用)C TYPE RETAINER RING S-25800604400206205深槽滾珠軸承BEARING 6205ZZ800703500416A0配重滑塊SLIDING BLOCK,COUNTER BALANC 4370\MC200803582191A0配重導桿GUIDING ROD, COUNTER BALANCE 4290\圓棒100904062006025軸心固定座SHAFT BRACKET SHF25-M61010********C0滑軌下固定板LOWER FIXED PLATE, GUIDING R 7180\SPCC101103582192A0滑軌上固定板UPPER FIXED PLATE, GUIDING R 7180\SPCC101203582193A0滑軌上固定板支架BRACKET FOR UPPER FIXED PLAT 7180\SPCC101303582194A0鏈條保護蓋(左)PROTECTING COVER FOR CHAIN7510\SPCC101403582195A0鏈條保護蓋(右)PROTECTING COVER FOR CHAIN7510\SPCC101503500023A0鏈條連結螺絲CHAIN CONNECTING BOLT4310\SCM4401604610050073鏈條CHAIN50x73P (含2鏈目)2<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁規格用量主件品號序號元件品號品名英文品名2F27004打刀單元V450/V33i/V42iBOSSTING CYLINDER UNIT3180\SS411 00113500008B0增壓缸固定座TOOL RELEASE CYLINDER BRACKE00213500009B0浮動打刀拉座3250\S45C1TOOL RELEASE CYLINDER SEAT00313500019B0固定軸套3290\S45C4FIXED ROD00403980001A0增壓缸(3Tx13L)98801TOOL RELEASE CYLINDER<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F28046主軸皮帶輪單元SPINDLE BELT UNITV42iW/SJ-V15-01ZT-S02(F)00103500011B0主軸馬達固定板FIXED PLATE FOR MOTOR3170\SS41100203971061A0齒型皮帶輪PULLEY3270\S45C染黑\5GT-72T\ψ66100303600135A0軸壓蓋(∮48)SHAFT END COVER3240\S45C100404061248055迫緊環PACKING RING TLK300 48x55200504601035920齒型皮帶(剖溝)PULLEY BELT5GT*35*9201<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F28047主軸皮帶輪單元SPINDLE BELT UNITV42iW/β8i*8000rpm00103500011B0主軸馬達固定板FIXED PLATE FOR MOTOR3170\SS41100203971008A0齒型皮帶輪(5GT-75T)PULLEY3270\S45C100303580161A0馬達軸端蓋SHAFT END COVER3170\S45C100404061232036迫緊環PACKING RING TLK300 32x36200504601035935齒型皮帶(剖溝)PULLEY BELT5GT*35*935mm1<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F13026底座+鞍座+工作台單元BASE + SADDLE + TABLE UNITV42iW00103582172A0底座BASE1030\3582172A2\FC-30100203580410A0地基螺絲(M36*2P)FOUNDATION BOLT3310\S45C600303580411A0地基螺帽(M36*2P)FOUNDATION BOLT3310\S45C600403600047B0墊塊 (地基螺絲)FOUNDATION PAD 3230\S45C600503582001A0噴水座NOZZLE TUBE BRACKET 3150\SS41200603582184A0大護罩前支架FRONT BRACKET, GUARD 7210\SPCC200703582212A0導油槽OIL TROUGH 7520\SPCC100803582173A0鞍座SADDLE 1040\FC-30100903985073A0線性滑軌-Y主LINEAR GUIDE 9840\市購品1010********A0線性滑軌-Y副LINEAR GUIDE 9840\市購品101103582006A0壓塊SLIDING BLOCK 412010601203582183A0螺絲襯套BUSHING 4230\不鏽綱801303582185A0Y軸前摺動罩Y AXIS TELESCOPIC COVER UNIT7400\SPCCZ101403582186A0Y軸後摺動罩Y AXIS TELESCOPIC COVER UNIT7400\SPCCZ101503582187A0Y軸摺動罩支架(上)TELESCOPIC COVER BRACKET7210\SPCC201603582188A0Y軸摺動罩支架(下)TELESCOPIC COVER BRACKET7210\SPCC201703582189A0鞍座下擋屑板BAFFLE PLATE7510\SPCC201803582245A0聯動管連結座CONDUIT BRACKET7210\SPCC101904640015090方型聯動管WIRE CONDUITCECBO02-26x58-222(15P)/R901020********A0碰塊DOG3140\SS41(42m/m)4021********B0碰塊座DOG BRACKET4140\AL(125m/m*3軌)1022********A0碰塊座DOG BRACKET4140\AL(90m/m*3軌)1023********A0碰塊DOG 4140\AL 外購65L2024********B0碰塊座DOG BRACKET 4140\AL(300m/m*2軌)202504800143204微動開關MICRO SWITCH BNS819-B02-D12-61-12-10BALLU202603582168B0微動開關固定座-Y上SWITCH BRACKET 7160\SPCC1027********B0微動開關固定座-Y下SWITCH BRACKET 7160\SPCC1028********A0工作台TABLE 1050\3582174A2\FC-301029********D0螺帽座BALLSCREW HOUSING 1080\FC-25\3581025A2103003560121B0塞頭(工作台)TABLE SEALED CORK3310\SS4116<續下頁>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第2頁主件品號序號元件品號品名英文品名規格用量2F1302603103985050A0X軸線性滑軌LINEAR GUIDEBRH35AL2-P-ZZ-L1800 II103203582179A0X軸摺動罩X AXIS TELESCOPIC COVER UNIT7400\SPCCZ203303582180A0X軸摺動罩上支架TELESCOPIC COVER BRACKET7180\SPCC403403582181A0X軸摺動罩支架(左)TELESCOPIC COVER BRACKET7180\SPCC20350*******A0X軸摺動罩支架(右)TELESCOPIC COVER BRACKET 7180\SPCC203603582175A0碰塊座連結塊(X)CONDUIT FOR DOG(X)3180\SS4120370*******A0微動開關座(X)MICRO SWITCH BRACKET, X AXIS 7160\SPCC103803582178A0工作台後飾板REAR PLATE,TABLE 7510\SPCC103903582177A0工作台前飾板FRONT PLATE, TABLE 7510\SPCC104003582065C0X軸分油座OIL DISTRIBUTOR BRACKET 7210\SPCC10410*******B0油分配器座(Y軸)DISTRIBUTOR BRACKET 7210\SPCC104204640028849塑鋼製鏈條式聯動管ELECTRICAL CONDUIT UNIT1台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F21028X軸傳動單元X AXIS TRANSMISSION UNITV42iW00103170053B0軸承隔環BEARING SPACER3230\SCM4100203170054B0前迷宮環座LAMINAL RING BRACKET3250\SCM4200303170057B0軸承隔環BEARING SPACER3230\SCM4100403170067A0預拉彈簧檔片PRELOAD SPRING STOPPER 3230\S45C100503170070A0Z軸尾端軸承座REAR BEARING HOUSING 1080\S45C100603560016B0軸承壓蓋BEARING CAP 3240\SCM4100703560017B0防撞膠塊RUBBER CUSHION 4370\請改下3560017C0200803560018G0防撞膠塊固定座RUBBER CUSHION BRACKET 3240\SCM4100903560019B0防撞膠固定座RUBBER CUSHION BRACKET 3230\S45C1010********F0Z軸尾端軸承座壓板PUSHING PLATE,BEARING HOUSI 3120\SCM4101103560132B0尾端座蓋板REAR BEARING HOUSING COVER 3180\SPCC101203581022B0尾端座(X軸)REAR BEARING HOUSING 1080\FC-25\3581022B2101303581027B0傳動座TRANSMISSION HOUSING1080\FC-25\3581027B2101403984063A0滾珠導螺桿(X軸)BALL SCREW9860\V42iW101504020401030鎖緊螺帽LOCK NUTMK30101604020403035鎖緊螺帽LOCK NUTMF35(M35xP1.5)101704050175012壓縮彈簧COMPRESSIVE SPRINGφ1.25Xφ7.5X12L801804061306828迷宮環LAMINAL RINGFK3-AS 62/2.8/0.82601904402030062螺桿軸承BALL SCREW BEARINGBS30M62/15-P4A.DUM102004402435072螺桿軸承BALL SCREW BEARINGBS35/72/15TUM1021********A0傳動座蓋板TRANSMISSION HOUSING COVER7180\SPCC1022********D0迷宮環座LAMINAL RING BRACKET3250\SCM4102304061300001迷宮環LAMINAL RING FK3-AS 68/2.8/0.82302404080508050斜梢SLIDE PIN#8x50L(附內牙)4台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F22024Y軸傳動單元Y AXIS TRANSMISSION UNITV42iW00103170053B0軸承隔環BEARING SPACER3230\SCM4100203170054B0前迷宮環座LAMINAL RING BRACKET3250\SCM4200303170057B0軸承隔環BEARING SPACER3230\SCM4100403170067A0預拉彈簧檔片PRELOAD SPRING STOPPER 3230\S45C100503170070A0Z軸尾端軸承座REAR BEARING HOUSING 1080\S45C100603560016B0軸承壓蓋BEARING CAP 3240\SCM4100703560018G0防撞膠塊固定座RUBBER CUSHION BRACKET 3240\SCM4100803560019B0防撞膠固定座RUBBER CUSHION BRACKET 3230\S45C100903560023F0Z軸尾端軸承座壓板PUSHING PLATE,BEARING HOUSI 3120\SCM41010********B0尾端座蓋板REAR BEARING HOUSING COVER 3180\SPCC101103560374A0防撞膠塊RUBBER CUSHION 4370\PU201203581022B0尾端座(X軸)REAR BEARING HOUSING 1080\FC-25\3581022B2101303581027B0傳動座TRANSMISSION HOUSING1080\FC-25\3581027B2101403984062A0滾珠導螺桿BALL SCREW9860\市購品4150H\Y軸101504020401030鎖緊螺帽LOCK NUTMK30101604020403035鎖緊螺帽LOCK NUTMF35(M35xP1.5)101704050175012壓縮彈簧COMPRESSIVE SPRINGφ1.25Xφ7.5X12L801804061306828迷宮環LAMINAL RINGFK3-AS 62/2.8/0.82601904402030062螺桿軸承BALL SCREW BEARINGBS30M62/15-P4A.DUM102004402435072螺桿軸承BALL SCREW BEARINGBS35/72/15TUM1021********A0傳動座蓋板TRANSMISSION HOUSING COVER7180\SPCC1022********D0迷宮環座LAMINAL RING BRACKET3250\SCM4102304061300001迷宮環LAMINAL RING FK3-AS 68/2.8/0.82302404080508050斜梢SLIDE PIN#8x50L(附內牙)4台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F23020Z軸傳動單元Z AXIS TRANSMISSION UNITV42iW00103170053B0軸承隔環BEARING SPACER3230\SCM4100203170054B0前迷宮環座LAMINAL RING BRACKET3250\SCM4200303170057B0軸承隔環BEARING SPACER3230\SCM4100403560022A0預拉彈簧擋片PRELOAD SPRING STOPPER 3230\S45C100503170070A0Z軸尾端軸承座REAR BEARING HOUSING 1080\S45C100603560016B0軸承壓蓋BEARING CAP 3240\SCM4100703560019B0防撞膠固定座RUBBER CUSHION BRACKET 3230\S45C200803560023F0Z軸尾端軸承座壓板PUSHING PLATE,BEARING HOUSI 3120\SCM4100903560132B0尾端座蓋板REAR BEARING HOUSING COVER 3180\SPCC1010********A0防撞膠塊RUBBER CUSHION 4370\PU201103581022B0尾端座(X軸)REAR BEARING HOUSING 1080\FC-25\3581022B2101203581027B0傳動座TRANSMISSION HOUSING 1080\FC-25\3581027B2101313984064A0滾珠螺桿(Z)Z AXIS BALL SCREW9860\市購品101404020401030鎖緊螺帽LOCK NUTMK30101504020403035鎖緊螺帽LOCK NUTMF35(M35xP1.5)101604050175012壓縮彈簧COMPRESSIVE SPRINGφ1.25Xφ7.5X12L801704061306828迷宮環LAMINAL RINGFK3-AS 62/2.8/0.82601804402030062螺桿軸承BALL SCREW BEARINGBS30M62/15-P4A.DUM101904402435072螺桿軸承BALL SCREW BEARINGBS35/72/15TUM1020********A0傳動座蓋板TRANSMISSION HOUSING COVER7180\SPCC1021********B0軸承隔環BEARING SPACER3230\SCM4102204020402035鎖緊螺帽LOCK NUTMR35(M35xP1.5)1 02304080508050斜梢SLIDE PIN#8x50L(附內牙)4英文品名2F50038外型護罩單元LOWER ENCLOSURE GUARD UNITV42iW00103582231A0大護罩LARGE COVER7500\SPCC100203582229A0左後護罩(L) REAR GUARD7500\SPCC100303582230A0右後護罩(R) REAR GUARD7500\SPCC100403582232A0左前門(L) FRONT DOOR 7480\SPCC100503582233A0右前門(R) FRONT DOOR 7480\SPCC100603582234A0前門側擋水板FRONT DOOR PLATE 7210\SPCC200703581295A0前門定位板ORIENTATION PLATE 7210\SPCC200803582236A0護罩前飾條RUBBER RIBBON, TELESCOPIC BA 4510\SUS 303100903582235A0下門軌LOWER DOOR GUIDE 7130\SPCC1010********A0前門下門輪支架LOWER DOOR WHEEL BRACKET 7110\SPCC401103520054C0門輪DOOR WHEEL 3260\S45C401203520055A0門輪DOOR WHEEL 3260\S45C401304060600028C型扣環(孔用)C TYPE RETAINER RINGR-28401404060700012C型扣環(軸用)C TYPE RETAINER RINGS-12401504400206001深槽滾珠軸承BEARING6001ZZ 12x28x8401604300460100管型把手(加高)HAHDLEU1-600L-100H201703560146B0前門壓克力ACRYLIC PLATE, FRONT DOOR4360\ACRY201803560169B0壓克力壓板LOCKING PLATE, DOOR ACRYLIC7120\SPCC201903582049A0上門輪座DOOR WHEEL BRACKET7110\SPCC202004402000628軸承BEARING628ZZ 8*24*8 日本12021********D0護罩壓克力SIDE DOOR ACRYLIC PLATE4360\ACRY2022********A0側門飾條RUBBER RIBBON4510\SUS303光面2023********B0側門把手座SIDE DOOR HANDLE BRACKET 7180\SPCC402404300401421把手 (染黑)HAHDLE A-42-A402504090500403鎖頭LOCK C-403(長型)七星小S402604720700081工作燈WORKING LIGHT HT-S81/24V 70W1027********A0工作燈座WORKING LIGHT BRACKET 7210\SPCC1028********A0右上蓋板RINGHT SIDE COVER 7510\SPCC1029********A0伸臂蓋板OUTSTRETCHED ARM COVER 7180\SPCC103003582238A0左後飾板REAR PLATE7510\SPCC1英文品名2F5003803103582239A0左後飾板支撐座BRACKET, REAR PLATE7180\SPCC103203582240A0右後飾板後蓋板BRACKET, REAR PLATE7180\SPCC103303582241A0油冷機門DOOR OF OIL COOLER7510\2t SPCC103404300421602門扣把手DOOR LOCKB-010長軸(六角型)+B-1602(取手103504300401024門扣把手檔板DOOR LOCK PLATE B-01024103603582242A0電器箱下飾板REAR BRACKET POWER CABINET 7450\10370*******A0右下飾板(R) LOWER PLATE 7510\SPCC103803582244A0前下飾板LOWER PLATE 7510\SPCC103903560696A0水槍座WATER GUN SEAT 7210\SPCC104003560697A0風槍座AIR GUN SEAT7210\SPCC1台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F51038水箱單元(螺旋式排屑)COOLANT TANK UNIT(COIL TYPEV42iW00103582228A0導屑槽(螺旋式)CHIP TRAUGH7520\SPCC100203582068B0螺旋捲屑器CHIP CONVEYOR9570100304440800015排屑器馬達CONVEYOR MOTOR1/4HP 1:100 FME22100403582069B0排屑炮管(附蓋及防漏膠墊)CHIP THROUGH TUBE 7570\SPCC100503582072E0水箱COOLANT TANK 7580\SPCC100603582073E0水箱蓋COOLANT TANK COVER 7510\SPCC100703582125A0過濾擋水板WATER BAFFLE 7210\SPCC100803582102B0蓄屑盤CHIP PLATE 7520\SPCC100903582103C0蓄屑槽FILTER NET 7590\SPCC1010********B0水箱遮水板DASH BOARD 7180\SPCC101103500428A0管接頭座CONNECTOR BRACKET 3150\S45C101204300401421把手 (染黑)HAHDLE A-42-A201304430040303切削液泵浦(直立式)COOLANT PUMPTPHK4T3-2S101404510100001油表COOLANT LEVEL GAUGE3''101504530012424水用電磁閥KSDSOLENOID VALVEJB4K-24V(1/2")2<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F52025電氣箱單元POWER CABINET UNITV42iW00103582207A0電氣箱POWER CABINET7450\SPCC100203582208A0電氣箱左門(L) DOOR, POWER CABINET7450\SPCC100303582209A0電氣箱右門(R) DOOR, POWER CABINET7450\SPCC100403582210A0電氣箱門調整組ADJUSTING SET FOR POWER CAB 7450\SPCC400503582211A0電氣箱支架BRACKET FOR POWER CABINET 7450\SPCC100603582220A0I/O基板(上)I/O BOARD(UPPER)7560\3t SPCCZ100703582221A0I/O基板(下)I/O BOARD(LOWER)7560\SPCCZ100803500149B0主電源開關座MAIN POWER SWITCH BRACKET 7160\SPCC100903500150C0左右調整座ADJUSTABLE BRACKET 7160\SPCC1010********A0電器箱聯動管支架CONDUIT BRACKET 7210\SPCC101103582219A0聯動管支架蓋板COVER FOR CONDUIT BRACKET 7210\SPCC101203582215A0電磁閥配置板VALVE BRACKET 7210\SPCC101304090500403鎖頭LOCKC-403(長型)七星小S301404560300010熱交換器HEAT EXCHANGERHPW-10AR/EA-2A1<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F53054操作箱單元三菱-70MOPERATION CABINET UNITV42iW00103582222A0伸臂OUTSTRETCHED ARM7470\SPCC100203582223A0伸臂上蓋板(A)OUTSTRETCHED ARM COVER7180\SPCC100303582224A0伸臂上蓋板(B)OUTSTRETCHED ARM COVER7180\SPCC100403582225A0伸臂出線連結座OUTSTRETCHED ARM CONNECTING 7210\SPCC100503582226A0伸臂連結蓋板OUTSTRETCHED ARM CONNECTING 7180\SPCC100603582227A0伸臂側蓋板OUTSTRETCHED ARM COVER 7180\SPCC100703500129A0旋轉座ROTATION BRACKET 3240\S45C100803580264B0操作箱OPERATION CABINET 7460\SPCC100903560523B0操作箱後蓋CABINET REAR COVER 7460\SPCC1010********C0洩放電阻座(大)BLEEDER RESISTANCE BRACKET 7210\SPCC101103581310E0洩放電阻座蓋COVER,BLEEDER RESISTANCE BRA 7210\SPCC101204300400400管型把手(自然色)HAHDLE U1-400L101304720632243警示燈(三層)WARNING LIGHTGSL-24V-3-B1<結束>台灣力得衛宇龍科技股份有限公司*單階材料用量清單製表日期: 101-03-30第1頁主件品號序號元件品號品名英文品名規格用量2F53055操作箱單元 Fanuc-0iMDOPERATION CABINET UNITV42iW00103582222A0伸臂OUTSTRETCHED ARM7470\SPCC100203582223A0伸臂上蓋板(A)OUTSTRETCHED ARM COVER7180\SPCC100303582224A0伸臂上蓋板(B)OUTSTRETCHED ARM COVER7180\SPCC100403582225A0伸臂出線連結座OUTSTRETCHED ARM CONNECTING 7210\SPCC100503582226A0伸臂連結蓋板OUTSTRETCHED ARM CONNECTING 7180\SPCC100603582227A0伸臂側蓋板OUTSTRETCHED ARM COVER 7180\SPCC100703500129A0旋轉座ROTATION BRACKET 3240\S45C100803500432E0操作箱(FANUC Oi MC)OPERATION CABINET 7460\SPCC100903500433C0操作箱後蓋CABINET REAR COVER 7460\SPCC101004300400400管型把手(自然色)HAHDLE U1-400L101104720632243警示燈(三層)WARNING LIGHTGSL-24V-3-B1<結束>。

LF-72线路传输器操作手册说明书

Operator’s ManualSave for future referenceDate PurchasedCode: (ex: 10859)Serial:(ex: U1060512345)For use with machines having Code Numbers:11075, 11076, 11077, 11209, 11210, 11211, 11227, 11290, 11291, 11292, 11293, 11606, 11607, 11608, 11609, 11708, 11709, 11710, 11711Register your machine: /registerAuthorized Service and Distributor Locator: /locatorRefer to /safety for additional safety information.Mar.‘93for selecting a QUALITY product by Lincoln Electric. We want you to take pride in operating this Lincoln Electric Company product ••• as much pride as we have in bringing this product to you!Read this Operators Manual completely before attempting to use this equipment. Save this manual and keep it handy for quick reference. Pay particular attention to the safety instructions we have provided for your protection.The level of seriousness to be applied to each is explained below:Page Installation............................................................................................................Section A Technical Specifications...............................................................................................A-1 Safety Precautions........................................................................................................A-2 Location...................................................................................................................A-2 Mounting...................................................................................................................A-2 Bench Mount............................................................................................................A-3 Swivel Mount............................................................................................................A-3 Boom Mount.............................................................................................................A-3 Suspended...............................................................................................................A-3 Weld Cable Sizes.....................................................................................................A-4 Coaxial Weld Cables................................................................................................A-5 Weld Cable Connections..........................................................................................A-5 Analog Control Cable Connections...............................................................................A-6 Analog Miller Control Cable Adapter............................................................................A-7 Welding Gun/Wire Feeder Trigger Connector.........................................................A-8High Frequency Protection......................................................................................A-8Remote Sense Lead Specifications.........................................................................A-8 Wire Drive Systems......................................................................................................A-8 Welding Guns, Torches and Accessories.....................................................................A-9 Procedure for Changing Drive and Idle Roll Sets.......................................................A-10 Wire Drive Configuration..............................................................................A-10, A-11Pressure Arm Adjustment......................................................................................A-11Wire Reel Loading.................................................................................................A-12Weld Wire Routing.................................................................................................A-13 Shielding Gas Connections........................................................................................A-14 Installing Electrode Conduit Kits.................................................................................A-15 Aluminum Wire Preparations......................................................................................A-16 Base Model, Bench Model Standard Duty and Bench Model Heavy Duty.................A-17 Typical System Configurations...................................................................................A-18 __________________________________________________________________________ Operation..............................................................................................................Section B Safety Precautions........................................................................................................B-1 Graphic Symbols...........................................................................................................B-1 Common Welding Abbreviations...................................................................................B-2 Product Description.......................................................................................................B-2 Recommended Processes and Required Equipment...................................................B-2 Front Panel Controls and Connections.........................................................................B-31. Remote Voltage Control Kit (Optional).................................................................B-42. Burnback and Postflow Timer Kit (Optional)........................................................B-43. Thermal LED, Motor Overload.............................................................................B-44. Cold Feed/Gas Purge Switch...............................................................................B-45. 2 Step - Trigger Interlock Switch..................................................................B-4, B-56. Wire Feed Speed Knob........................................................................................B-57. Gun Receiver Bushing.........................................................................................B-58. Trigger Connector 5-Pin Amphenol.....................................................................B-5 __________________________________________________________________________ Accessories..........................................................................................................Section C General Options and Accessories..................................................................C-1 Thru C4 ___________________________________________________________________________________Page Maintenance....................................................................................................Section D Safety Precautions................................................................................................D-1 Routine Maintenance.............................................................................................D-1 Periodic Maintenance............................................................................................D-1 Calibration Specification........................................................................................D-1 Major Component Locations..................................................................................D-2 ________________________________________________________________________Troubleshooting..............................................................................................Section E Safety Precautions.................................................................................................E-1 How To Use Troubleshooting Guide......................................................................E-1 Troubleshooting Guides.................................................................................E-2, E-3 ________________________________________________________________________ Wiring Diagram and Dimension Prints..........................................................Section F ________________________________________________________________________Parts Lists.............................................................................................P-501 and P-622 ________________________________________________________________________TECHNICAL SPECIFICATIONS: LF-72 Wire Feeder∅ Dimensions do not include wire reel.SAFETY PRECAUTIONLOCATIONThe LF-72 may be placed on a bench or mounted ontop of a welding power source.Place the LF-72 in a clean and dry location.Do not stack the LF-72.ELECTRIC SHOCK can kill.• Only qualified personnel shouldperform this installation.• Turn off the input power to the power source at the disconnect switch or fuse box before working on this equipment. Turn off the input power to any other equipment connected to the welding system at the disconnect switch or fuse box before working on this equipment.• Do not touch electrically hot parts.----------------------------------------------------------------------------------------FIGURE A.1FIGURE A.2MOUNTINGFor location and size, LF-72 Bench Model Rear Mounting H oles (See Figure A.1) and for Bottom Mounting Holes (See Figure A.2).SWIVEL MOUNTBoth the standard duty bench model and heavy duty bench model may be mounted onto a swivel when a top a welding power source.SUSPENDEDBench MountSwivel Kit and Bench Model, Standard DutySAFETY PRECAUTIONELECTRIC SH OCK can kill.• Only qualified personnel should perform this installation.• Turn off the input power to the power source at the disconnect switch or fuse box before work-ing on this equipment. Turn off the input power to any other equipment connected to the weld-ing system at the disconnect switch or fuse box before working on this equipment. • Do not touch electrically hot parts.----------------------------------------------------------------------WELD CABLE SIZESTable A.1 has the copper cable sizes recommended for different currents and duty cycles. Lengths stipu-lated are the distance from the welder to work and back to the welder again. Cable sizes are increased for greater lengths primarily for the purpose of mini-mizing voltage in the welding circuit.COAXIAL WELD CABLESCoaxial welding cables are specially designed welding cables for pulse welding or STT welding. Coaxial weld cables feature low inductance, allowing fast changes in the weld current. Regular cables have a higher inductance which may distort the pulse or STT wave shape. Inductance becomes more severe as the weld cables become longer.Coaxial weld cables are recommended for all pulse and STT welding, especially when the total weld cable length (electrode cable + work cable) exceeds 50 feet (7.6m)A coaxial weld cable is constructed by 8 small leads wrapped around one large lead. The large inner lead connects to the electrode stud on the power source and the electrode connection on the wire feeder. The small leads combine together to form the work lead, one end attached to the power source and the other end to the work piece.(See Coaxial weld Cable below.) WELD CABLE CONNECTIONConnect a work lead of sufficient size between the proper output stud on the power source and the work. Be sure the connection to the work makes tight metal to metal electrical contact. Poor work lead connec-tions can result in poor welding performance.ANALOG MILLER CONTROL CABLEADAPTER K2335-1This Lincoln Electric wire feeder may be mounted to a limit-ed number of Miller Electric power sources. The Millerpower source must have the amphenol pin definition shownin the table below for proper operation of the wire feeder.Operation of Lincoln wire feeders on Miller power sourcesmay result in lack of high speeds or reduce pull force onhigh wire feed speeds. Maximum wire feed speed for theLF-72 operating on a Miller power source is approximately720ipm. Be sure the Miller power source provides 24 VACto the wire feeder and has overcurrent protection of no morethan 15 amps. The power source must not exceed 113VDCpeak.Miller is a registered trademark not owned or licensed by The Lincoln Electric Company.DRIVE ROLLS INNER WIREGUIDELF-72 LF-725. Remove the inner wire guide. Array Insert the new inner wire guide, groove side out,over the two locating pins in the feed plate.Spindle PlacementFIGURE A.9WELD WIRE ROUTINGThe electrode supply may be either from reels, Readi-Reels, spools, or bulk packaged drums or reels. Observe the following precautions:a) The electrode must be routed to the wire driveunit so that the bends in the wire are at a mini-mum, and also that the force required to pull thewire from the reel into the wire drive unit is kept ata minimum.b) The electrode is “hot” when the gun trigger ispressed and must be insulated from the boomand structure.c) If more than one wire feed unit shares the sameboom and are not sharing the some power sourceoutput stud, their wire and reels must be insulatedfrom each other as well as insulated from theirmounting structure.5. Attach one end of the inlet hose to the outlet fittingof the flow regulator. Attach the other end to the welding system shielding gas inlet. Tighten the union nuts with a wrench.6. Before opening the cylinder valve, turn the regulatoradjusting knob counterclockwise until the adjusting spring pressure is released.7. Standing to one side, open the cylinder valve slowlya fraction of a turn. When the cylinder pressuregage stops moving, open the valve fully.8. The flow regulator is adjustable. Adjust it to the flowrate recommended for the procedure and process being used before making a weld.(For Codes 11209, 11210, 11211 and above)To install Lincoln conduit: (See Figure A.10b)1. Turn off power at the welding power source.2. Remove the “O” ring holding the ball bushing assembly to the back of the wire feeder. Remove the ball bushing assembly.FIGURE A.10b3. Place a K1546-xx conduit connector into the back of the wire drive. Rotate the conduit connector to a position where the thumb screw does not interfere with the idle arm or door.4. Tighten the set screw to secure the conduit connec-tor in the wire drive.5. Insert conduit through the sheet metal of the LF-72and into the conduit connector. Secure with the thumb screw.FIGURE A.11"O" RING(For Codes 11209, 11210, 11211 and above)Tools required: (See Figure A.12b)• 9/64" Hex key wrench 1. Turn off power at the welding power source.2. Remove the snap ring holding the ball bushing assembly to the back of the wire feeder. Remove the ball bushing assembly.FIGURE A.12b3. Remove the three socket head cap screws from the ball bushing assembly. Caution: as the screws are being loosened, the balls may fall free from the assembly.Remove the balls and the steel washer.FIGURE A.134. Place the ball bushing housing into the wire feeder case and secure with the snap ring or “O” ring depending on which code your machine uses."O" RINGTYPICAL SYSTEM CONFIGURATIONSThe LF-72 is capable of welding with many different welding processes. These processes may require reconfigur-ing the LF-72 with other products that may or may not be included with the model you purchased. Use the Table 1 and 2 below to identify the basic items which are included in the LF-72 to utilize the various Welding Processes that the machine is capable of controlling.TABLE 1TABLE 2COLD FEED POSITIVE OUTPUT NEGATIVE OUTPUT PROTECTIVE GROUND WARNING OR CAUTION DANGEROUSVOLTAGE SHOCK HAZARD WELDING FUMESEXPLOSIONGAS INPUT WORKCONNECTIONRea d this entire section of opera ting instructions before operating the machine.ELECTRIC SHOCK can kill.• Unless using cold feed fea ture,when feeding with the gun trigger,the electrode a nd drive mecha nism a re a lwa ys electrica lly energized a nd could rema in energized severa l seconds after welding ceases.• Do not touch electrically live parts or electrodes with your skin or wet clothing.• Insulate yourself from the work and ground.• Always wear dry insulating gloves.-------------------------------------------------------------ONLY QUALIFIED PERSONS SHOULD INSTALL,USE OR SERVICE THIS EQUIPMENT. READ AND FOLLOW THE MANUFACTURER’S INSTRUC-TIONS, EMPLOYER’S SAFETY PRACTICES AND MATERIAL SAFETY DATA SHEETS (MSDS) FOR CONSUMABLES.-----------------------------------------------------------READ THIS WARNING, PROTECT YOURSELF &OTHERS.FUMES AND GASES can be dangerous.tion or exha ust at the a rc, or both,to keep fumes a nd gases from your breathing zone and general area.WELDING SPARKS can cause fire orexplosion.• Do not weld near flammable material.• Do not weld on containers which have held flammable material.ARC RAYS can burn.• Wear eye, ear, and body protection.-----------------------------------------------------------Observe a dditiona l guidelines deta iled in thebeginning of this manual.GRAPHIC SYMBOLS THAT APPEAR ON THIS MACHINE OR IN THIS MANUALFRONT PANEL CONTROLS AND CONNECTIONSCASE FRONT CONTROLSFIGURE B.1To activate Cold Feeding, hold theswitch in the UP position. The wire drivewill feed electrode but neither the powersource nor the gas solenoid will be ener-gized. Adjust the speed of cold feedingby rotating the WFS knob. Cold feeding,or "cold inching" the electrode is usefulfor threading the electrode through the gun.2 STEP - TRIGGER INTERLOCK SWITCH The 2 Step - Trigger Interlock switchchanges the function of the gun trigger. 2Step trigger operation turns welding onand off in direct response to the trigger.Trigger Interlock operation allows weld-ing to continue when the trigger isOWN position for 2OPTIONAL KITS:OPTIONAL KITS:6. Adjust the WFS knob to 300 ipm. Center the knobThis Troubleshooting Guide is provided to help you locate and repair possible machine malfunctions.Simply follow the three-step procedure listed below.Step 1.LOCATE PROBLEM (SYMPTOM).Look under the column labeled “PROBLEM (SYMP-TOMS)”. This column describes possible symptoms that the machine may exhibit. Find the listing that best describes the symptom that the machine is exhibiting.Step 2.POSSIBLE CAUSE.The second column labeled “POSSIBLE CAUSE” lists the obvious external possibilities that may contribute to the machine symptom.Step 3.RECOMMENDED COURSE OF ACTIONThis column provides a course of action for the Possible Cause, generally it states to contact your local Lincoln Authorized Field Service Facility.If you do not understand or are unable to perform the Recommended Course of Action safely, contact your local Lincoln Authorized Field Service Facility.HOW TO USE TROUBLESHOOTING GUIDEService and Repair should only be performed by Lincoln Electric Factory Trained Personnel.Unauthorized repairs performed on this equipment may result in danger to the technician and machine operator and will invalidate your factory warranty. For your safety and to avoid Electrical Shock, please observe all safety notes and precautions detailed throughout this manual.__________________________________________________________________________Observe all additional Safety Guidelines detailed throughout this manual.L F -72 F E E D E R (F O R C O D E S 11209, 11210, 11211 11227)E : T h i s d i a g r a m i s f o r r e f e r e n c e o n l y . I t m a y n o t b e a c c u r a t e f o r a l l m a c h i n e s c o v e r e d b y t h i s m a n u a l . T h e s p e c i f i c d i a g r a m f o r a p a r t i c u l a r c o d e i s p a s t e d i n s i d e a c h i n e o n o n e o f t h e e n c l o s u r e p a n e l s . I f t h e d i a g r a m i s i l l e g i b l e , w r i t e t o t h e S e r v i c e D e p a r t m e n t f o r a r e p l a c e m e n t . G i v e t h e e q u i p m e n t c o d e n u m b e r .BENCH MODELBENCH MODEL STANDARD DUTYBENCH MODEL HEAVY DUTYJapaneseChineseKoreanArabicREAD AND UNDERSTAND THE MANUFACTURER’S INSTRUCTION FOR THIS EQUIPMENT AND THE CONSUMABLES TO BE USED AND FOLLOW YOUR EMPLOYER’S SAFETY PRACTICES.SE RECOMIENDA LEER Y ENTENDER LAS INSTRUCCIONES DEL FABRICANTE PARA EL USO DE ESTE EQUIPO Y LOS CONSUMIBLES QUE VA A UTILIZAR, SIGA LAS MEDIDAS DE SEGURIDAD DE SU SUPERVISOR.LISEZ ET COMPRENEZ LES INSTRUCTIONS DU FABRICANT EN CE QUI REGARDE CET EQUIPMENT ET LES PRODUITS A ETRE EMPLOYES ET SUIVEZ LES PROCEDURES DE SECURITE DE VOTRE EMPLOYEUR.LESEN SIE UND BEFOLGEN SIE DIE BETRIEBSANLEITUNG DER ANLAGE UND DEN ELEKTRODENEINSATZ DES HER-STELLERS. DIE UNFALLVERHÜTUNGSVORSCHRIFTEN DES ARBEITGEBERS SIND EBENFALLS ZU BEACHTEN.JapaneseChineseKoreanArabicLEIA E COMPREENDA AS INSTRUÇÕES DO FABRICANTE PARA ESTE EQUIPAMENTO E AS PARTES DE USO, E SIGA AS PRÁTICAS DE SEGURANÇA DO EMPREGADOR.。

数字摆动计72-7601用户手册说明书

Circuit
Power consumption Operating temp. Operating humidity Dimension Weight Housing case
Calibration
Accessories included Optional Accessory Flash Tube Specification Flash tube Flash Duration Flash colour Flash energy Beam Angle Flash tube replacement
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4. Measuring Procedures:

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1. Features:
• The instrument is a microprocessor circuit design, high accuracy, digital readout Stroboscope. Adjusting the “Flash Rate “ by push button keyboard, unique design in the world, easy operating & intelligent function. That is ideal for inspecting and measuring the speed of moving gears, fans, centrifuges, pumps, motors and other equipment used in general industrial maintenance, production, quality control, laboratories and as well as for schools and colleges for demonstrating strobe action.

4-72型离心通风机-产品资料

４-7２型离心通风机一、风机的分类风机按压力和作用分为通风机、鼓风机和压缩机。

通风机的排气压力较小,不超过0．０15ＭＰa；鼓风机的排气压力稍大不超过0.2MPa;压缩机的排气压力最高从1~1０0MPa 以上。

风机按其工作原理可分为以下几种：1、离心风机,是气流轴向进入风机的叶轮后主要沿径向流动。

这类风机根据离心作用的原理制成,产品包括离心通风机、离心鼓风机和离心压缩机。

2、轴流风机，是与风叶的轴同方向的气流（即风的流向和轴平行），如电风扇，空调外机风扇就是轴流方式运行风机。

轴流式风机通常用在流量要求较高而压力要求较低的场合。

这类风机包括轴流通风机、轴流鼓风机和轴流压缩机。

3、回转风机回转风机是利用转子旋转改变气室容积而进行工作的。

常见的品种有罗茨鼓风机、回转压缩机。

4、斜流(混流）风机ﻩ斜流(混流）风机风压系数比轴流风机高，流量系数比离心风机大。

填补了轴流风机和离心风机之间的空白。

同时具备安装简单方便的特点。

ﻩ二、产品概述ﻫﻩ4－7２型离心通风机在我国是使用最早的风机,然而也是使用最普遍的风机。

４-72型离心风机是一款常见的抽风机产品，由于其使用效率高,广泛用于工矿厂房和民用建筑、大型公共建筑、发电厂等场所，还可以作为空气处理设施、热风循环设施的配套设备。

目前市场上常用的有4-72－A式和4-72-C式两类别离心式风机。

4－7２型离心风机为钢制离心风机，F4－72型离心风机为玻璃钢离心风机,B4-72型离心风机为防爆离心风机。

三、使用条件1、输送的介质要求:输送的介质应为空气或气体无腐蚀性、不易燃易爆、不含粘性物质的气体,气体内所含尘土及硬物颗粒含量不大于15０mg／m3。

2、输送的介质温度:标准风机输送的介质温度不大于8０℃，增加散热轮时风机可长期输送2０0℃以下的介质。

3、不能在完全封闭没有空气流动的空间作抽风使用，会形成负压增加电机负载。

四、使用范围ﻩ一般工厂及大型建筑物的室内通风换气或输送空气及其它不自燃、不易爆、不挥发、对人体无害、对钢材无腐蚀性之气体。

MC1496技术参数中文版(可编辑修改word版)

5
测试电路
6
典型的特征
典型特征得到电路如图 5 所示,fC = 500 千赫(正弦波),VC = 60 mVrms,fS = 1.0 kHz,VS = 300 mVrms,TA = 25°C,除非另有注明。
7
8
操作信息
操作信息 MC1496 的集成调制电路如图 23 所示。集成电路内部含有由双电流源驱动的上部差分放大器，输出集电极连至一起以平衡乘
信号等级上部的嵌入式差分放大器可工作与线性区和饱和区，下部的差分放大器在大多数情况
下都工作于线性区。当输入信号都为较低等级的时候，输出将包括输入信号的共频和差频部分，输出信号
的幅度是输入信号幅度绩的函数。当输入的载波信号是较高等级并且调制信号输入端工作与线性区时，输出信号将包括
调制信号的差频、共频信号和载波的基波与其奇数倍的谐波信号。输出信号幅度是输入信号的常数倍，载波信号的幅度变动一般不会在输出信号中体现出来。
B．静态共模输出电压
V6 = V12 = V+ − I5 RL
偏置 MC1496 需要外加直流偏置电压。建立这三种等级的方案是三极管的集电极和基极电压
不小于 2.0V，并且不能超出以下范围
前述所有的前提是基本满足：
4
进入引脚 1，4，8，10 的偏置电流是三极管的基极电流在外部偏置被设计为不小于 1.0mA 时可以忽略。
载波抑制载波抑制是指每个边带的载波输出与信号电压的比值。载波抑制与输入的载波等级有很大关系（如图 22 所示），低等级的载波不能够使上部
开关器件完全导通，致使信号增益降低，由此减少载波抑制。较最优载波等级较高的载波信号会引起不必要的器件与电流的载波馈通，并导致载波抑制降低。MC1496 的最优载波输入信号是 60mV 有效值的正弦波，频率在 500KHz 附近，在调制中推荐使用此载波信号。