MOS Basicknowledge
MOS晶体管基本特性表征
0.00025 0.0002
Vgs=0.3V Vgs=0.6V Vgs=0.9V Vgs=1.2V Vgs=1.5V
0.00015
线性区
0.8 1 1.2 Vg(V)
Ion
饱和区
Ids (A)
0.0001
• MOSFET最主要的特性曲线为Id-Vg, Id-Vd曲线. 特别是Id-Vg;
0.00005
Ids (A)
5.00E-03 4.00E-03 3.00E-03 2.00E-03
1.00E-12 -0.2 0 0.2 0.4 0.6 0.8 1 1.2 Vgs (V)
1.00E-03
0.00E+00 0
Id (A)
Id (A)
Vt2@1E-7*W/L
Vd=-0.1V Vd=-1.2V
5.00E-03
1. 沟道越短，DIBL越大；
2. DIBL有时会表现为亚阈摆幅增大, 即 增加Ioff;
1.00E-05 1.00E-06
3. DIBL会降低输出电阻, 使器件用于模 拟电路特性变差, 用于数字电路速度下 降.
1.00E-07 1.00E-08 1.00E-09
1.00E-02
0
0.15um LV,
4.00E-03 3.00E-03
Vd=-0.1V Vd=-1.2V
2.00E-03
1.00E-03
0.00E+00
0.2
0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 1.2
MOSFET Basic Characterization
(MOS晶体管基本特性表征)
Wenyu Gao 2020/04/18
mos场效应管简介及原理(英文)
MOS场效应管简介及原理（英文）【简介】MOS场效应晶体管（Metal-Oxide-Semiconductor Field-Effect Transistor）是一种常用于电子电路的晶体管。
它是一种小型、高度集成的设备，能够控制通过它的电流流动。
MOSFET被广泛应用于数字和模拟电子学、通信系统和电力电子等领域。
【原理】MOSFET的基本工作原理是通过在栅极电极施加电压来控制通过源极和漏极的电导。
通过栅极施加的电压决定了通过MOSFET的电流量。
MOSFET有两种类型：N型（负型）和P型（正型）。
N 型MOSFET的基板材料为n型半导体材料（含电子），而P 型MOSFET的基板材料为p型半导体材料（含空穴）。
这些材料的选择取决于应用，因为它们具有不同的电气特性。
MOSFET在电子电路中广泛应用，因为它们具有小型化、高速度和低功耗等优点。
它们还可以使用现代半导体制造技术轻松制造，使其成本效益高，并且广泛可用。
【英文】MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a type of transistor commonly used in electronic circuits. It is a small, highly integrated device that can control the flow of electrical current through it. MOSFETs are used in awide range of applications, including digital and analog electronics, communication systems, and power electronics.The basic principle of operation of a MOSFET is that it controls the flow of electrical current through the gate electrode, which is insulated from the source and drain by a thin oxide layer. When a voltage is applied to the gate electrode, a current flows through the channel between the source and drain, causing the MOSFET to conduct electricity. The voltage applied to the gate electrode determines the amount of current that flows through the MOSFET.There are two main types of MOSFETs: N-type (for negative) and P-type (for positive). N-type MOSFETs have an n-type semiconductor material (containing electrons) as the substrate, while P-type MOSFETs have a p-type semiconductor material (containing holes) as the substrate. These types of materials are chosen based on the application, as they have different electrical properties.MOSFETs are widely used in electronic circuits because of their small size, high speed, and low power consumption. They are also easy to fabricate using modern semiconductor manufacturing techniques, making them cost-effective and widely available.。
英语作文-集成电路设计行业：从初学者到专家的必备技能
英语作文-集成电路设计行业：从初学者到专家的必备技能Integrated Circuit Design Industry: Essential Skills from Beginner to Expert。
Introduction:The integrated circuit (IC) design industry plays a crucial role in the development of modern technology. From smartphones to self-driving cars, ICs are the backbone of electronic devices. To excel in this industry, individuals need to acquire a set of essential skills that will take them from being a beginner to an expert. This article aims to provide an overview of these skills and their importance in the IC design industry.1. Solid Foundation in Electronics:A strong understanding of electronics is the foundation of IC design. Beginners should start by learning basic concepts such as Ohm's Law, Kirchhoff's Laws, and semiconductor physics. This knowledge will help them comprehend the behavior of electronic components and their interactions within an IC.2. Proficiency in Programming:Programming skills are becoming increasingly important in IC design. Beginners should focus on learning languages such as Verilog or VHDL, which are widely used in designing digital circuits. These languages allow designers to describe the behavior of their circuits and simulate their functionality before fabrication.3. Knowledge of IC Design Tools:Proficiency in using IC design tools is essential for both beginners and experts. Tools like Cadence or Synopsys provide a platform to design, simulate, and verify ICs. Beginners should familiarize themselves with these tools and learn how to navigate through their various features.4. Understanding of Digital and Analog Design:IC design encompasses both digital and analog circuits. Beginners should acquire a solid understanding of both domains. Digital design involves logic gates, flip-flops, and sequential circuits, while analog design deals with continuous signals and amplifiers. A comprehensive understanding of these concepts is crucial for successful IC design.5. Familiarity with Design Verification:Design verification is the process of ensuring that an IC design meets its specifications. Beginners should learn techniques such as functional simulation, timing analysis, and formal verification. These methods help identify and rectify design flaws, ensuring the reliability and functionality of the final product.6. Knowledge of Low Power Design:In today's world, power efficiency is a critical consideration in IC design. Beginners should be aware of low power design techniques such as clock gating, power gating, and voltage scaling. These techniques help reduce power consumption without compromising the performance of the IC.7. Awareness of Design for Testability:Design for Testability (DFT) is an essential aspect of IC design. It involves incorporating features that facilitate testing and fault diagnosis. Beginners should familiarize themselves with DFT techniques like scan chains, built-in self-test (BIST), and boundary scan. These techniques simplify the testing process, ensuring the quality and reliability of the manufactured IC.8. Continuous Learning and Adaptability:The field of IC design is ever-evolving, with new technologies and methodologies emerging regularly. To stay ahead, individuals must have a thirst for continuous learning and adaptability. Beginners should actively engage in professional development, attend conferences, and keep up with industry trends to enhance their skills and expertise.Conclusion:Becoming an expert in the IC design industry requires a combination of foundational knowledge, technical skills, and adaptability. By acquiring a solid understanding of electronics, programming, IC design tools, digital, and analog design, as well as verification and low power techniques, individuals can progress from being beginners to experts. Furthermore, a commitment to continuous learning and staying updated with industry advancements is crucial for long-term success in this dynamic field. With the right skills and dedication, one can thrive in the exciting world of integrated circuit design.。
你所熟悉和陌生的BASIC—BASIC万花筒
你所熟悉和陌生的BASIC——BASIC万花筒by from你明白吗？BASIC四十岁了。
常常有网友问：要学编程，应该从哪一种语言入手？作为一个酷爱了BASIC 20年的人，我会毫不犹豫的告知你：固然是BASIC。
不管你过去对BASIC有何成见和误解，你此刻将对它有一个从头凝视的机遇。
BASIC的诞生——一个传奇的开始1964年，美国达特茅斯大学的Thomas E. Kurtz(1928–)和John G. Kemeny原籍匈牙利)在Fortran II和ALGOL 60的基础上设计了一种新的运算机语言，命名为“Beginner's All-purpose Symbolic Instruction Code”，意为初学者通用符号指令代码，简称BASIC。
那个简单易学的运算机程序设计语言那时只有17条语句，12个函数和3个命令，这确实是BASIC始祖——Dartmouth BASIC。
第一个BASIC程序(实际是一个编译器)于本地时刻1964年5月1日凌晨4点在一台GE-265 () 主机中成功运行，操作者是Mike Busch和John McGeachie。
从此Kurtz和Kemeny作为BASIC语言之父被永久载入史册。
Thomas E. Kurtz John G. Kemeny语言自诞生起就显示出了壮大的生命力，各类版本层出不穷。
从APPLE-Ⅱ机上用的APPLE SOFT BASIC，到LASER-310上用的MSBASIC，到IBM-PC及其兼容机上用的BASICA和GW-BASIC，再到MS-DOS上的MS BASIC、QuickBASIC 和VisualBasic ，直至Windows下的Visual Basic和Linux下的XBasic、YaBASIC 等等，BASIC无处不在，乃至许多电子游戏机(例如小霸王学习机)和微型电子词典(例如文曲星)中都实现了BASIC。
从诞生之初，BASIC语言就以其简单、易学和对硬件要求低等特点受到了广大程序设计人员，专门是电脑初学者的青睐，历经四十载，显示了其顽强的生命力。
MOS晶体管基本特性表征
短沟MOSFET— I-V 特性曲线
DIBL (drain induced barrier low)：
σ = |Vt1 – Vt2| / |Vdd-0.1| 1. 2. 3. 沟道越短，DIBL越大； DIBL有时会表现为亚阈摆幅增大, 即 增加Ioff; DIBL会降低输出电阻, 使器件用于模 拟电路特性变差, 用于数字电路速度下 降.
Ids (A)
5.00E-03 4.00E-03 3.00E-03 2.00E-03 1.00E-03
0
0.2
0.4 0.6 Vgs (V)
0.8
1
1.2
0.00E+00 0 0.3 0.6 0.9 1.2 1.5 上海宏力半导体制造有限公司 Vds(V)
9 Confidential
Grace Semiconductor Manufacturing Corporation
上海宏力半导体制造有限公司 Grace Semiconductor Manufacturing Corporation
5 Confidential
I-V 特性曲线 线性区(萨氏方程)：
L C W s ox L V Rch ds (V gs Vth ) I ds I ds
Ioff 1.00E-10
1.00E-11 1.00E-12 0 0.2 0.4
C Cit C Cit S 2.3Vt (1 d ) 60m V(1 d ) Cox Cox
Vth V fb 2 f 2 f Vsb
1. 2.
0.6
0.8
0.15um LV, W/L=10/10
Vgs Vth
Id (A)
5.00E-05 4.00E-05 3.00E-05 2.00E-05 1.00E-05
技术面试题目集锦
每当有机会面试或者谈论技术的时候, 总要遇到各种笔试或面谈问题. 这里收集整理一下,简单的, 复杂的都有. 逐条列举出来, 以备参考.1.请写出下列英文缩写的全称. DRC, LVS, ERC, EM, P&R.(源自某日资公司的笔试题目)DRC: Design Rule CheckLVS: Layout Versus SchematicERC: Electrical Rule CheckEM: Electro migrationP&R: Placing & Routing2.请描述什么是天线效应及怎样防止?原理: 芯片生产中,连接到gate的金属或多晶硅像天线一样, 会收集电荷, 大量电荷形成的高电压会击穿gate oxide. 从而导致器件永久失效.防止方法:1.通过向上跳线的方法减小单层金属的长度. 顶层金属则不适用.2.加反偏二极管. 通过给直接连接到栅的存在天线效应的金属层接上反偏二极管，形成一个电荷泄放回路，累积电荷就对栅氧构不成威胁，从而消除了天线效应。
当金属层位置有足够空间时，可直接加上二极管，若遇到布线阻碍或金属层位于禁止区域时，就需要通过通孔将金属线延伸到附近有足够空间的地方，插入二极管。
3.对于上述方法都不能消除的长走线上的PAE，可通过插入缓冲器，切断长线来消除天线效应。
3. 请描述什么是EM, 及怎样防止?EM, 当器件工作时, 金属线上有电流通过,金属离子在电场作用下会沿导体产生质量运输, 从而导致金属线某些部位产生空洞或小丘, 这就是电迁移现象. 工艺尺寸越来越小,EM 成为失效因素变得很重要了.防止方法: 1.加宽金属线. 2. 做bus routing, 分散电流. 3. 避免相邻导体之间直流电位差过高. 因为电位差过高, 会产生较大的电场,从而使得带电粒子分布过于集中.4. 请描述什么是latch-up, 及怎样防止. Latch –up 原理及cross section.有两种方式可以触发CMOS闩锁. 如果NMOS晶体管M1 的源极被拉到低于地电位, 它将向衬底注入少子(电子), 开启寄生管Q N, 然后该晶体管将开启Q P. 或者, PMOS管M2的源极可能被拉到高于N阱电位, 它将向阱注入少子(空穴)并开启寄生管Q P, 该晶体管然后开启Q N.(个人理解: 衬底电流和寄生的衬底电阻很关键. 由于P阱或N阱寄生出电阻, 衬底上一定的电流导致基极与发射极出现电势差V be, 这样一个寄生管开启, 并很快导致另一个寄生管开启, 电流在VDD到VSS之间的正反馈回路中不断放大,最终完全short VDD and VSS)某些作者通过把涉及到的4个区(PMOS源区,PMOS的N阱区, NMOS P阱区, NMOS源区)比作称为可控硅整流器(SCT) 的四层PNPN器件来解释CMOS闩锁效应. 在电学方面, SCR与图4.22(B) 所示的耦合双极型晶体管等效. 因此, CMOS闩锁效应的SCR模型与这里介绍的双极型在本质上是相同的.●怎样从layout的角度来防止Latch-up呢?通过原理图可以看出, 我们只要使寄生出的SCR结构性能越弱越好.a. 多增加衬底欧姆接触, 从而减小衬底电阻, latch-up则不容易触发.b. 加double guard ring, guard ring 可以复合掉注入衬底的大部分少子, 寄生管不容易开启. 原则上guard ring 越宽越好, 若是仅仅minimum ring, 少子可能还来不及被复合就注入到衬底去了.c. IO, Power MOS 或有大电流的MOS, 要距离其他有源器件足够的距离.比如ESD NMOS的pwell到内部pmos的P+ 30um以上. Power PMOS的N well到内部NMOS的N+ 30um以上.5. 请画出高压MOS的剖面图, LDMOS的剖面图, Power MOS的版图草图.首先看看耐高压的LDMOS, MagnaChip 0.18um 6v/8v/12v/…/80v BCD technology.N-LDMOS, 不同电压,会用相应的mark layer, 同一个chip只能一个高压值.DTI DTIN-LDMOSFull isolation nLDMOSP-LDMOS,6. 版图中的匹配方法有哪些? MOS 的匹配, 电阻的匹配, bjt 的匹配.7. 请计算下图中A 到B 的电阻值.8. Bandgap 的原理, Bandgap reference 的注意事项. 大概需要多久时间画完?9. 请描绘你最近一个项目的顶层布局图. 有哪些特别之处.P-LDMOS10. 请描绘一下一个项目从开始到结束的过程. 大约花多少人力和时间.11. 常用的ESD结构, 对ESD有什么认识?12. ESD方面, layout 需要注意哪些方面?Position overviewIn this position, you will be responsible for supporting product design and development through the development and preparation of multidimensional mixed-signal layouts of semiconductor ICs from schematics and related instructions provided by design engineering. The primary products will be completed using the Cadence software suite. IC blocks are analog/digital mixed-signal but contain significant analog and power content. The position will require knowledge of the entire design flow including front-end design and back-end verification including back-annotation. It requires active participation in project planning including schedule development and progress tracking. Lastly, the majority of your workday will be in front of a computer, though reasonable ergonomic needs will be accommodated.Job requirementsMinimum requirements are:? Major in Microelectronics or equivalent with 5-10 years of direct experience. BSEE is a plus.? Demonstrated ability to interpret mixed-signal IC schematics, specifications, guidelines, or manuals. Basic knowledge of fundamental analog circuitry such as bandgap regulators, current mirrors, op amps, and comparators is required.? Working knowledge of Cadence Virtuoso XL, Assura, and Skill scripting. You will be involved with front-end (design) and back-end (verification, back-annotation) activities.? Extensive experience with analog, mixed-signal, and digital logic design flows including auto place and route.? Knowledge of top-level floor planning techniques and appropriate placement of power, analog, and digital circuitry as well as metal power busses and ESD structures.? Ability to independently lead mask design projects and support project management efforts.? Ability to communicate with peers or engineers, in English, to resolve layout related problems including tool issues.? Desire to support and contribute to continual design flow improvement.。
IE basic knowledge
目的
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发现操作人员的无效动作或浪费现象 ，简化操作方法 ，减少工作疲劳 ，降低劳动强度 。 并在此基础上制定标准的操作方法 ， 确定动作标准 时间
动作分析的方法
• • •
目视动作分析 ： 目视观测寻求动作改进 。 动素分析 ： 人完成工作的动作可由17 个基本动作构成 ，将工作中所用 的各个动素逐项分析 以谋求改进 。 影片分析 ： 通过摄像机 ，分析动作 。
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5 应有适当的照明设备 ，工作台及座椅试样 ，高度应使工作者保持良好 的姿势
6 尽量解除手的工作 ，而以夹具或工具代替 。
•
•
•
7 可能时 ，应将两种或两种以上工具合并为一种
8 工具及物料应尽可能放在工作位置 。
时间研究及作业的标准时间 ：
• •
标准时间的制定 时间研究步骤
标准时间的制定
•
定义 ： 标准时间是指在适宜的操作条件下 ，用最合适的方法 ，以普通 熟练工人正常速度完成标准作业所需的劳动时间 。
•
17 故延： 可避免的停顿
– 改善点 ： 改善管理方法 ，规章 ，制度 ， 使操作者无抱怨改善工作 环境 ，提供一个合适，健康 ，愉快而有效的生产现场 改善工作方 法 , 降低劳动强度
人作业基本动素的简介 ：( 17 种动素 )
• •
按对操作的影响 , 以上动素可分为有效动素和无效动素 ： 1 有效动素 ：指对操作有直接贡献者 ：装配 拆卸 使用 伸手 握取 移 动及放手
手指
最快 ，最低
手指 ，手腕动作 手指 ，手腕 及小臂 动作 手指 ，手腕 ，小臂及大臂 动作 手指 ，手腕 ，小臂 ，大臂及身体 动作
最耗体能 ，最慢
在作业设计及研究中 的动作经济原则
关于半导体器件原理与仿真课程“线上+线下”混合教学的思考
mos 内阻 温度
MOS内阻与温度引言金属氧化物半导体场效应管（MOSFET）是现代电子器件中最重要的元件之一。
它具有高速、低功耗和高集成度等优点，被广泛应用于数字电路、模拟电路和功率电子等领域。
在MOSFET的工作过程中，内阻和温度是两个重要的参数。
本文将深入探讨MOSFET的内阻与温度之间的关系。
MOSFET简介MOSFET是一种基于金属-氧化物-半导体结构的场效应管。
它由源极、漏极和栅极组成，栅极与源极之间通过氧化层隔离。
当栅极施加一定电压时，形成了栅电场。
栅电场控制了漏极和源极之间的电流，从而实现了MOSFET的放大和开关功能。
MOSFET内阻MOSFET的内阻是指漏极和源极之间的电阻。
它是MOSFET的一个重要参数，影响着其工作性能和功耗。
内阻越小，MOSFET的导通能力越强，功耗越低。
内阻的大小与多个因素有关，其中之一是温度。
在MOSFET工作时，由于电流通过导体会产生焦耳热，导致温度升高。
温度升高会导致导体的电阻增加，从而使得MOSFET的内阻增加。
温度对内阻的影响温度对MOSFET内阻的影响是一个复杂的过程。
一方面，温度升高会导致导体的电阻率增加，从而使得内阻增加。
另一方面，温度升高也会改变MOSFET的材料特性，如迁移率和载流子浓度等，进而影响内阻。
具体来说，温度升高会导致晶体管材料中的载流子浓度增加，这会减小内阻。
因为载流子浓度增加会增加电流的通道，从而减小电阻。
另外，温度升高还会导致晶体管材料中的迁移率下降，这会增大内阻。
因为迁移率下降会导致载流子在晶体管中移动的速度减慢，从而增大电阻。
综上所述，温度对MOSFET内阻的影响是一个综合考虑多个因素的过程。
在一定范围内，随着温度的升高，内阻可能会先减小后增大，达到一个最小值，然后随着温度的继续升高而增大。
MOSFET的温度特性为了更好地理解MOSFET的温度特性，我们可以通过实验来研究。
在实验中，我们可以测量MOSFET在不同温度下的内阻，并观察其变化趋势。
工程专业缩写含义对照
在看图工作中，至少要接触不少的英文缩写，这些有的是标准的，用金山、GOOGLE 等是可以查到的，有些是专业上通用的，还有一些是根据项目“自定义”的，不管是哪种，大家都有必要了解一些。
我把我手头现有的一些提供给大家，希翼大家也把自己知道的贴出来，大家共同学习。
声明一点，我基本上保留了原文特色，也没有进行什么分类编排，如果有错误也是难免，大家有选择性的看看。
仅用来抛砖引玉LT 液位变送器LI 就地显示液位计PT 压力变送器PI 就地压力表PS 压力开关LS 液位开关AE 分析仪表一次元件AT 分析仪表变送器FE 流量孔板FT 流量变送器图书馆有相关术语中英文对照表编号缩写中文名称英文名称1.1 P 管子Pipe1.2 EL 弯头Elbow1.2.1 ELL 长半径弯头Long radius elbow1.2.2 ELS 短半径弯头Short radius elbow1.2.3 MEL 斜接弯头(虾米腰弯头) Mitre elbow1.2.4 REL 异径弯头Reducing elbow1.3 T 三通Tee1.3.1 LT 斜三通Lateral tee1.3.2 RT 异径三通Reducing tee1.4 R 异径管接头(大小头) Reducer1.4.1 CR 同心异径管接头(同心大小头) Concentric reducer1.4.2 ER 偏心异径管接头(偏心大小头) Eccentric reducer1.5 CPL 管箍Coupling1.5.1 FCPL 双头管箍Full coupling1.5.2 HCPL 单头管箍Half coupling1.5.3 RCPL 异径管箍Reducing coupling1.6 BU 内外罗纹接头Bushing1.7 UN 活接头Union1.8 HC 软管接头Hose coupler1.9 SE 翻边短节Stub end1.10 NIP 短节Pipe nipple or straight nipple 1.10.1 SNIP 异径短节Swaged nipple1.11 CP 管帽(封头) Cap1.12 PL 管堵(丝堵) Plug1.13 BLK 盲板Blank1.13.1 SB 8 字盲板Spectacle blind (blank)1.14 RP 补强板Reinforcing pad2 法兰编号缩写中文名称英文名称2.1 PLG 法兰Flange2.1.1 WNF 对焊法兰Welding neck flange 2.1.2 SOF 平焊法兰Slip-on flange2.1.3 SWF 承插焊法兰Socket-welding flange 2.1.4 T 罗纹法兰Threaded flange2.1.5 LJ 松套法兰Lapped joint flange2.1.6 REDF 异径法兰Reducing flange2.1.7 BF 法兰盖(日法兰) Blind flange2.2 FSF 法兰密封面Flange scaling face2.2.1 FF 全平面Flat face2.2.2 RF 凸台面Raised face2.2.3 MFF 凹凸面Male and female face2.2.4 LF 凹面Female face2.2.5 LM 凸面Male face2.2.6 RJ 环连接面Ring joint face2.2.7 TG 榫槽面Tongue and groove face 2.2.8 TF 榫面Tongue face2.2.9 GF 槽面Groove face3 垫片编号缩写中文名称英文名称3.1 G 垫片Gasket3.1.1 NMG 非金属垫片Non-metallic gasket 3.1.1.1 AG 石棉垫片Asbestos gasket3.1.1.2 RG 橡胶垫片Rubber gasket3.1.1.3 TEG 聚四氟乙烯包复垫片PTFE envelope gasket 3.1.2 SMG 半金属垫片Semimetallic gasket3.1.2.1 MJG 金属包垫片Meta-jacket gasket3.1.2.2 SWG 缠绕式垫片Spiral wound gasket3.1.3 MG 金属垫片Metallic gasket3.1.3.1 FMG 金属平垫片Flat metallic gasket3.1.3.2 SMSG 齿形金属垫片Solid metal serrated gasket 3.1.3.3 LER 透镜式金属环垫Lens ring gasket3.1.3.4 OCR 八角形金属环垫Octagonal ring gasket3.1.3.5 OVR 椭圆形金属环垫Oval ring gakset3.1.3.6 IR/OR 内外定位环Inner ring and outer ring3.1.3.7 IR 内定位环Inner ring3.1.3.8 OR 外定位环Outer ring4 坚固件编号缩写中文名称英文名称4.1 B 螺栓Bolt4.1.1 SB 螺柱Stud bolt4.2 NU 螺母Nut4.3 TB 花蓝螺母Turnbuckle4.4 WSR 垫圈Washer4.4.1 SWSR 弹簧垫圈Spring washer5 阀门编号缩写中文名称英文名称5.1 GV 闸阀Gate valve5.2 GLV 截止阀Globe valve5.3 CHV 止回阀Check valve5.4 BUV 蝶阀Butterfly valve5.5 BAV 球阀Ball valve5.6 PV 旋塞阀Plug valve (cock)5.7 CV 调节阀Control valve5.8 SV 安全阀Safety valve5.9 RV 减压阀Pressure reducing valve5.10 ST 蒸汽疏水阀Steam trap5.11 PRV 泄压阀Pressur relief valve5.12 BV 呼吸阀Breather valve5.13 NV 针形阀Needle valve5.14 AV 角阀5.15 DV 隔膜阀5.16 TWV 三通阀5.17 SGV 插板阀6 管道上用的小型设备编号缩写中文名称英文名称6.1 SPR 气液分离器Separator6.2 FA 阻火器Flame arrester6.3 SR 过滤器Strainer6.3.1 SRY Y 型过滤器Y-type strainer6.3.2 SRT T 型过滤器T-type strainer6.3.3 SRB 桶式过滤器Bucket type strainer6.3.4 TSR 暂时过滤器Temporary strainer6.4 SIL 消声器Silencer6.5 SG 视镜Slight glass6.6 SC 取样冷却器Sample cooler6.7 DF 排液漏斗Drain funnel6.8 LM 管道混合器Line mixer6.9 RO 限流孔板Restriction orifice6.9.1 MO 混合孔板Mixing orifice6.1 RD 爆破片(爆破膜) Rupture disk6.11 EJ 补偿器Expansion joint7 隔热、伴热编号缩写中文名称英文名称7.1 INS 隔热Thermal insulation7.1.1 H 保温Hot insulation7.1.2 C 保冷Cold insulation7.1.3 P 防烫伤隔热Personnel protection insulation 7.2 T&I 伴热Tracing and insulation7.3 T 管道伴热(冷) Tracing7.3.1 EST 蒸汽外伴热External steam tracing7.3.2 IST 蒸汽内伴热Internal steam tracing7.3.3 SJT 蒸汽夹套伴热Steam-jacket tracing7.3.4 ET 电伴热Electric tracing8 配管材料和等级编号缩写中文名称英文名称8.1 M 金属材料Metallic material8.1.1 CS 碳钢Carbon steel8.1.2 CAS 铸钢Cast steel8.1.3 FS 锻钢Forged steel8.1.4 AS 合金钢Alloy steel8.1.5 SS 不锈钢Stainless steel8.1.6 AUSTSS 奥氏体不锈钢Austenitic stainless-steel 8.1.7 CI 铸铁Cast iron8.1.8 MI 可锻铸铁Malleable iron8.1.9 DI 球墨铸铁Ductile iron8.1.10 AL 铝Aluminum8.1.11 BRS 黄铜Brass8.1.12 BRZ 青铜Bronze8.1.13 CU 紫铜Copper8.1.14 LAS 低合金钢Low alloy steel8.1.15 FLAS 低合金锻钢Forged low alloy steel8.1.16 CLAS 低合金铸钢Cast low alloy steel8.2 THK 壁厚Thickness8.2.1 SCH 表号Schedule number8.2.2 STD 标准Standard8.2.3 XS 加强Extra strong8.2.4 XXS 特强Double extra strong9 装置布置编号缩写中文名称英文名称9.1 CN 建北Construction north9.2 E 东East9.3 W 西West9.4 S 南South9.5 N 北North9.6 H 水平Horizontal9.7 V 竖直、铅直、直立Vertical9.8 GRD 地坪Ground9.9 UG 地下Underground9.10 BL 装置边界线Battery limit line9.11 ESEW 事故沐浴洗眼器Emergency shower and eye washer 9.12 HS 软管站Hose station9.13 ML 接续分界线Match line9.14 PS 管道支架(管架) Piping support9.15 PR 管桥Pipe rack9.16 STRU 构架(构筑物) Structure9.17 BLDG 建造物Building9.18 PD 清扫设施Purge device9.19 PT 池Pit9.20 SHLT 棚Shelter9.21 COFF 围堰Cofferdam9.22 FL 楼板Floor9.23 PF 平台Plateform10 尺寸标注编号缩写中文名称英文名称10.1 EL 标高Elevation10.2 BOP 管底Bottom of pipe10.3 COP 管中心Center of pipe10.4 TOP 管顶Top of pipe10.5 FOB 底平Flat on bottom10.6 FOT 顶平Flat on top10.7 CL(屯) 中心线Center line10.8 TL 切线Tangent line10.9 SYM 对称的Symmetrical10.10 BOS 支架底Bottom of support10.11 TOS 支架顶Top of support10.12 CL 净距(净空) Clearance10.13 CTC 中心至中心Center to center10.14 CTF 中心至面Center to face10.15 CTE 中心至端部Center to end10.16 ETE 端到端End to end10.17 FEF 法兰端面Flange and face10.18 FTF 面到面Face to face10.19 D 直径Diameter10.20 DN 公称直径Nominal diameter10.21 ID 内径Inside diameter10.22 OD 外径Outside diameter10.23 DIM 尺寸Dimension10.24 MAX 最大Maximum10.25 MIN 最小Minimum10.26 AVG 平均Average10.27 APP 约、近似Approximate10.28 PT.EL 点标高Point elevation11 图表编号缩写中文名称英文名称11.1 PFD 工艺流程图Process flow diagram11.2 PID 管道和仪表流程图Piping & instrument diagram11.3 COD 接续图Continued on drawing11.4 DTL 详图Datail11.5 SPDWG(ISODWG) 管段图Spool drawing (each line isometric drawing) 11.6 DWGNO 图号Drawing number11.7 DWGI 所在图号Drawing identification11.8 LOW 材料表List of material11.9 MTO 汇料Material take-off11.10 APPX 附录Appendix11.11 JOB. No. 工号Job Number11.12 BEDD 基础工程设计数据Basic engineering design data 11.13 DEDD 详细工程设计数据Detail engineering design data 11.14 REV. No. 修改号Recision number11.15 REFDWG 参考图Reference drawing11.16 SC 采样接口Sample connection12 操作方式及工作参数编号缩写中文名称英文名称12.1 AUT 自动Automatic12.2 ML 手动Manual control12.3 CHOP 链条操作Chain operated12.4 CSC 铅封关Car seal close12.5 CSO 铅封开Car seal open12.6 LC 锁闭Lock closed12.7 LO 锁开Lock open12.8 NC 正常关Normally close12.9 NO 正常开Normally open12.10 ATM 大气压Atmosphere12.11 PN 公称压力Nominal pressure12.12 A 绝压12.13 G 表压12.14 (T) 温度Temperature12.15 (P) 压力Pressure13 施工编号缩写中文名称英文名称13.1 W 焊接Welding13.1.1 AW 电弧焊Arc welding13.1.2 GSAW 气体保护电弧焊Gas shielded-acr welding13.1.3 EFW 电熔焊Elecric fusion welding13.1.4 ERW 电阻焊Electric Resistance welding13.1.5 GW 气焊Gas welding13.1.6 LW 搭接焊Lap welding13.1.7 BW 对焊Butt welding13.4.8 TW 定位焊Tack welding13.1.9 SW 承插焊Socket welding13.1.10 CW 连续焊Continuous welding13.1.11 SEW 密封焊Seal welding13.1.12 SFG 堆焊Surfacing13.1.13 FW 现场焊接Field welding13.2 HT 热处理Heat treatment13.2.1 PH 预热Preheating13.2.2 SR 应力消除Stress relief13.2.3 PWHT 焊后热处理Post weld heat treatment13.3 EIT 检查、探伤和实验Examination, inspection & testing 13.3.1 VE 外观检查Visual examination13.3.2 UI (UT) 超声探伤Ultrasonic inspection (test)13.3.3 RI (RT) 射线探伤Radiographic inspection (test)13.3.4 MPI (MT) 磁粉探伤Magnetic particle inspection (test) 13.3.5 LPI (PT) 液体渗透检验Liquid penterant inspection (test) 13.3.6 HADT 硬度实验Hardness testing13.3.7 HYDT 水压实验Hydraulic testing13.3.8 PNET 气压实验Pneumatic testing 13.3.9 CE 焊条Covered electrode13.3.10 WW 焊丝Welding wire13.3.11 ASSY 装配、组合Assembly13.3.12 F 现场Field13.3.13 F/F 现场创造Field faricated13.3.14 SF 现场决定Suit in field13.3.15 CSP 冷紧Cold spring13.3.16 BCT 螺栓冷紧Bolt cold tightening 13.3.17 BHY 螺栓热紧Bolt hot tightening 13.3.18 CO 清洗口Clean out13.3.19 ANNY 退火Annealed13.4 PE 平端面Plain end13.5 BE 坡口端Belelled end13.6 THR 罗纹Thread13.7 HB 布氏硬度Brinnel hardness13.8 RC 洛氏硬度14 其他编号缩写中文名称英文名称14.1 FDN 基础Foundation14.2 INF 信息(资料) Information14.3 REF 参考Reference14.4 REV 修改Revision14.5 SEQ 序号(顺序) Sequence14.6 W/E 设备带来With equipment14.7 W/I 仪表带来With instrument14.8 CM 色标Colour mark14.9 CA 腐蚀裕度Corrosion allowance 14.10 UTL 公用系统Utility14.11 UC 公用工程接头Utility connection 14.12 QTY 数量Quantity14.13 WT 分量Weight14.14 MHR 工时Man hour14.15 BC 螺栓分布圆Bolt circle14.16 HP 高点High point14.17 LP 低点Low point14.18 SUC 吸入(口) Suction14.19 DIS 排出(口) Discharge14.20 SO 蒸气吹扫(口) Steam out14.21 NPT 美国标准锥管罗纹National standard taper pipe thread 14.22 NPS 美国标准直管罗纹National standard straight pipe thread 14.23 DR 排液Drain14.24 VT 放气Vent14.25 RTG (压力)等级Rating14.26 CL 等级Class14.27 SMLS 无缝Seamless14.28 螺旋缝BMS:Burner Management System 燃烧管理系统CCR:Center control room 中控室ER:Engineering room 工程师室FRR:Field Rack Room 现场仪表机柜室(控制室分站)DCS:Distributed control system 集散控制系统ESD:Emergency shut-down system 紧急停车系统FAT:Factory Acceptance Test 工厂验收测试HMIHuman Machine Interface (operator station)人机接口(操作员站)I/O:Input/Output 输入/输出MCCMotor Control Center 马达控制中心MMS:Machinery Monitoring System 机械监测系统MOV:Motor Operated Valve 电动阀P&ID:Piping and Instrument Diagrams管道仪表流程图PFD:Process Flow Diagram 工艺流程图PLC:Programmable Logic Controller 可编程逻辑控制器PU:Package Unit 成套设备SAT:Site Acceptance Test 现场认可测试SOE:Sequence Of Events 事件序列记录SIL:Safety Integrity Level 安全完整性等级SIS:Safety Instrumented System 安全仪表系统TMR:Triple Modular Redundant 三重模块冗余QMR:Quadruple Modular Redundant (dual redundant system)四重模块冗余(双重冗余系统)UPSUninterruptible Power Supply 不间断电源1oo2One out of two, likewise: 2oo32 选1，同样地3 选2________________________________________ AMS Alarm Management System 报警管理系统APC Advanced Process Control 高级过程控制BEM Battery Extension Module 电源扩展模块BOG Boil Off Gas 气体蒸发C&E Cause and Effect 起因和影响CAS Cascade 级联CAT5 Category 5 type cable 5 类线CCB Central Control Building 中心控制大楼CCR Central Control Room 中心控制室CCTV Closed Circuit Television 闭路电视CP Control Panel 控制面板CPM DCS Controller (C200)DCS 控制器(C200)CPU Central Processing Unit 中央处理器CSMA/CD Carrier Sense Multiple Access with Collision Detection载波监听多路访问/冲突检测CV Control Valve 控制阀DCS Distributed Control System 集散控制系统DIN Deutsche Industries Norm (German Industrial Standard) Deutsche 工业标准(德国工业标准)DP Differential Pressure 微分压力EEMUA Engineering Equipment and Material Users Association工程设备和材料用户协会EMC Electromagnetic Compatibility 电磁兼容性ESD Emergency Shutdown 紧急停车EWS Engineering WorkStation 工程工作站F&G Fire And Gas 火气FAT Factory Acceptance Test 工厂验收测试FB Functional Block 功能模块FGS Fire And Gas System 火气系统FIM Field Information Management 现场信息管理FIR Field Instrument Room 现场设备室FSC Shielded twisted pair 故障安全控制器FTA Field Terminal Assembly 现场集线端子FTB Field Terminal Block 现场模块端子FTE Fault Tolerant Ethernet 容错以太网FTEB FTE Bridge Module FTE 网桥模块GPS Global Positioning System 全球定位系统GRP Glass Reinforced Plastic 玻璃钢HART Highway Addressable Remote Transducer 高速可编址远程传感器HEC Honk Kong Electric 香港电气HKCG Hong Kong China Gas 中国香港燃气HMI Human Machine Interface 人机界面HVAC Heating Ventilation And Air Conditioning 暖通和空调I/O Input /Output 输入/输出IEC International Electro-technical Commission 国际电工委员会IOLIM IO Link Interface Module IO 接口模块IOLIM IOs –IO link Interface Module IOs –IO 接口模块IP Ingress Protection 入口保护IR Infra-red 红外IRP Interposing Relay Panel 插入式继电器盘IS Intrinsically Safe 本质安全JCR Jetty Control Room 码头控制室LAN Local Area Network 本地网络LFAP Local Fire Alarm Panel 本地火警面版LNG Liquefied Natural Gas 液化天然气LTD Level, Temperature, Density combined measurement of LNG tanks LNG 罐的液位，温度，密度综合测量MAC Manual Alarm Call point 手动报警点MAN Manual 手动MC Marshalling Cabinet 集线柜MCB Miniature Circuit Breaker 小型回路断路器MCC Motor Control Centre 机电控制中心MFAP Main Fire Alarm Panel 主火警面版MIS Management Information System 信息管理系统MMS Maintenance Management System 维护管理系统MOS Maintenance Override Switch 维护超控开关MOV Motor Operated Valve 机电操作阀MTBF Mean Time Between Failures 平均故障间隔时间MTO Material Take Off 材料提取MTTR Mean Time To Repair 平均修复时间MV Measured Value 测量值NG Natural Gas 天然气NIS Non Intrinsically Safe 非本质安全NPS Nominal Pipe Size 标定管道尺寸NTP Net Time Protocol 网络时间协议OOS Operational Override Switch 可操超控开关OP Output 输出OPC Object Linking And Embedding For Process Control 基于过程控制的嵌入式对象连接ORV Open Rack Vaporizer 开架蒸馏器OTS Operator Training Simulator 操作员培训摹拟器P&ID Process And Instrument Diagram 过程和仪表图PCN Plant Control Network 工厂控制网络PIN Plant Information Network 工厂信息网络PKS Process knowledge system (Honeywell control system)过程知识系统(Honeywell 控制系统)PLC Programmable Logic Controller 可编程逻辑控制器PRT Printer 打印机PSU Power Supply Unit 电源单元PTFE Polytetrafluoroethane 聚四氟乙烯PV Process Value 过程阀RM Redundancy Module 冗余模块RM Redundancy Module 冗余模块RPS Rack Power Supply 机架电源RTD Resistance Temperature Detector 电阻温度探测器RTIS Real Time Information System 实时信息系统RTU Remote Transmission Unit 远程传送单元SAT Site Acceptance Test 现场验收测试SCADA System of Control And Data Acquisition 监视控制与数据采集系统SCV Submerged Combustion Vaporiser 水下燃烧蒸馏器SER Sequence Of Event Recorder 事件记录序列SIGTTO Society Of International Gas Tanker And Terminal Operators 国际液化气船及码头经营人协会SIL Safety Integrity Level 安全整合等级SIS Safety Instrumented System 安全仪表化系统SP Set Point 设置点SS Stainless Steel 不锈钢STP Shielded Twisted Pair 屏蔽双绞线TC Thermocouple 热电偶TCP/IP Transmission Control Protocol/Internet Protocol传输控制协议/网际协议TDAS Tank Data Acquisition System 罐数据采集系统TFT Thin Film Technology 薄膜技术UCP Unit Control Panel (Packaged Equipment) 单元控制面板(打包设备) UPS Uninterruptable Power Supply 不间断电源VAC Volts Alternating Current 交流电压VCB Vaccum Control Breaker 真空控制断路器VDC Volts –Direct Current 直流电压VDU Visual Display Unit 视频显示装置VESDA Very Early Smoke Detection Apparatus 烟尘预报侦测仪VFC Volt Free Contact 电压自由触点VSD Variable Speed Drive 变速驱动器WAN Wide Area Network 广域网DCS 分散控制系统中英文对照DCS-----------------------------分散控制系统BTG----------------------------- 常规摸拟仪表RUNBACK------------------------- 自动快速减负荷RUNRP--------------------------- 强增负荷RUNDOWN------------------------- 强减负荷FCB-----------------------------快速甩负荷MFT-----------------------------锅炉主燃料跳闸TSI-----------------------------汽轮机监测系统ETS-----------------------------汽轮机紧急跳机系统TAS-----------------------------汽轮机自启动系统AGC----------------------------- 自动发电控制ADS-----------------------------调度自动化系统CCS-----------------------------单元机组协调控制系统FSSS----------------------------锅炉炉膛安全监控系统BMS-----------------------------燃烧管理系统SCS-----------------------------顺序控制系统MCC-----------------------------调节控制系统DAS-----------------------------数椐采集系统DEH-----------------------------数字电液调节系统MEH-----------------------------给水泵汽轮机数字电液调节系统BPS----------------------------- 旁路控制系统DIS-----------------------------数字显示站MCS----------------------------- 管理指令系统BM------------------------------锅炉主控TM------------------------------汽轮机主控DEB-----------------------------协调控制原理ULD-----------------------------机组负荷指令ABTC----------------------------CCS 的主控系统MLS-----------------------------手动负荷设定器BCS-----------------------------燃烧器控制系统PLC-----------------------------可编程控制器UAM----------------------------- 自动管理系统MTBF----------------------------平均故障间隔时间MTTR----------------------------平均故障修复时间SPC----------------------------- 定值控制系统OPC-----------------------------超数保护控制系统ATC----------------------------- 自动汽轮机控制ETS-----------------------------汽轮机危（wei）险遮断系统AST----------------------------- 自动危（wei）险遮断控制IMP------------------------------调节级压力VP------------------------------ 阀位指令FA------------------------------全周进汽PA------------------------------部份进汽LVDT----------------------------线性位移差动转换器UMS-----------------------------机组主控顺序TMS-----------------------------机主控顺序BMS----------------------------- 炉主控顺序BFPT----------------------------给水泵汽轮机PID----------------------------- 比例积分微分调节器BATCHDATA----------------------- 批数椐节STEPSUBOUTINE------------------- 步子程序节FUNCTIONSUBOUTINE—-------------功能子程序节MONITORSUBOUTINE---------------- 监视子程序节MCR-----------------------------最大连续出力ASP----------------------------- 自动停导阀LOB-----------------------------润滑油压低LP------------------------------调速油压低LV------------------------------真空低OS------------------------------超速PU------------------------------ 发送器RP------------------------------转子位置TB------------------------------轴向位移DPU-----------------------------分散控制单元MIS----------------------------- 自动化管理信息系统DEL-----------------------------数据换码符DTE-----------------------------数据终端设备DCE-----------------------------数据通信设备RTU-----------------------------远程终端TXD-----------------------------发送数据RXD-----------------------------接收数据RTS-----------------------------请求发送CTS----------------------------- 结束发送DSR-----------------------------数据装置准备好DTR-----------------------------数据终端准备好WORKSTATION--------------------- 工作站DATAHIGHWAYS-------------------- 数据高速公路DATANETWORK--------------------- 数据网络OIS-----------------------------操作员站EWS----------------------------- 工程师站MMI-----------------------------人机接口DHC-----------------------------数据高速公路控制器FP------------------------------ 功能处理器MFC----------------------------- 多功能处理器NMRR---------------------------- 差模抑制比CMRR----------------------------共模抑制比OIU-----------------------------操作员接口MMU----------------------------- 端子安装单元CIU-----------------------------计算机接口单元COM-----------------------------控制器模件LIM----------------------------- 回路接口模件LMM-----------------------------逻辑主模件BIM----------------------------- 总线接口模件AMM-----------------------------摹拟主模件DSM----------------------------- 数字子模件DLS-----------------------------数字逻辑站ASM-----------------------------摹拟子模件DIS-----------------------------数字指示站CTS-----------------------------控制I/O 子模件TPL-----------------------------通信回路端子单元TDI/IDO------------------------- 数字输入/输出端子单元TAI/TAO-------------------------摹拟输入/输出端子单元TLS-----------------------------逻辑站端子单元TCS-----------------------------控制器站端子单元CTM-----------------------------组态调整单元MBD-----------------------------控制板LOG-----------------------------记录器站ENG-----------------------------工程师控制站HSR----------------------------- 历史数据存储及检索站OPE-----------------------------操作员/报警控制台CALC----------------------------记算机站TV------------------------------ 高压主汽阀GV------------------------------ 高压调节阀RV------------------------------ 中压主汽阀IV------------------------------ 中压调节阀PPS-----------------------------汽轮机防进水保护系统AS------------------------------ 自动同步BOP-----------------------------轴承润滑油泵EOP----------------------------- 紧急事故油泵SOB----------------------------- 高压备用密封油泵CCBF----------------------------协调控制锅炉尾随方式CCTF----------------------------协调控制汽轮机尾随方式CRT----------------------------- 阴极射线管GC------------------------------ 高压调节阀控制IC------------------------------ 中压调节阀控制TC------------------------------ 高压主汽阀控制LDC----------------------------- 负荷指令计算机OA------------------------------操作员自动控制PCV-----------------------------压力控制阀门RD------------------------------快速降负荷RSV----------------------------- 中压主汽阀TSI-----------------------------汽轮机监控仪表TPC-----------------------------汽轮机压力控制UPS-----------------------------不间断电源HONEYWELL PKS 术语缩写AI Analog Input 摹拟量输入AO Analog Output 摹拟量输出ACS Automation Control System 自动控制系统CM Control Module 控制模块CNI ControlNet Interface ControlNet 接口CPM Control Processor Module 控制处理器模块CR Control Room Area 控制室DI Digital Input 数字量输入DO Digital Output 数字量输出ES Experion Server Experion 服务器ESD Emergency Shutdown System 紧急停车系统FB Function Block 功能块FGS-ENG Fire & Gas System Engineering Station 消防和燃气系统工程站FTE Fault Tolerant Ethernet 容错以太网HAI HART Analog Input 带HART 协议的摹拟量输入IO Input Output 输入输出LAN Local Area Network 局域网MAC Media Access Control 媒体访问控制NIC Network Interface Card 网络接口卡OI Override Interlock 覆写联锁OP Output 输出PCS Process Control System 过程控制系统P-LAN Process LAN 过程局域网P-LAN-A P-LAN A 过程局域网AP-LAN-B P-LAN B 过程局域网BPRN Printer 打印机PRSV Printer Server 打印服务器RCP Redundant Chassis Pair 冗余机架对RM Redundancy Module 冗余模块RTU Remote Terminal Unit 远程终端单元SCM Sequence Control Module 顺控模块SDS Shutdown System 停车系统SI Safety Interlock 安全连锁SP Set Point 设定值STN Experion Station Exrerion 站UPS Un-interruptible Power Supply 不间断电源TS Terminal Server 终端服务器。
mosfet
Power MOSFET BasicsVrej Barkhordarian, International Rectifier, El Segundo, Ca.Discrete power MOSFETs employ semiconductorprocessing techniques that are similar to those of today's VLSI circuits, although the device geometry, voltage and current levels are significantly different from the design used in VLSI devices. The metal oxide semiconductor field effect transistor (MOSFET) is based on the original field-effect transistor introduced in the 70s. Figure 1 shows the device schematic, transfer characteristics and device symbol for a MOSFET. The invention of the powerMOSFET was partly driven by the limitations of bipolar power junction transistors (BJTs)which, until recently, was the device of choice in power electronics applications. Although it is not possible to define absolutely the operating boundaries of a power device,we will loosely refer to the power device as any device that can switch at least 1A.The bipolar power transistor is a current controlled device. A large base drive current as high as one-fifth of thecollector current is required to keep the device in the ON state.Also, higher reverse base drive currents are required to obtainfast turn-off. Despite the very advanced state of manufacturability and lower costs of BJTs, theselimitations have made the base drive circuit design more complicated and hence more expensive than the power MOSFET.Figure 1. Power MOSFET (a) Schematic, (b) Transfer Characteristics, (c)Device Symbol.contribute to conduction. Presence of holes with their highercarrier lifetime causes the switching speed to be several orders ofmagnitude slower than for a power MOSFET of similar size andvoltage rating. Also, BJTs suffer from thermal runaway. Theirforward voltage drop decreases with increasing temperaturecausing diversion of current to a single device when severaldevices are paralleled. Power MOSFETs, on the other hand, aremajority carrier devices with no minority carrier injection. Theyare superior to the BJTs in high frequency applications whereswitching power losses are important. Plus, they can withstandsimultaneous application of high current and voltage withoutundergoing destructive failure due to second breakdown. PowerLimitations of MOSFETs and BJTs. MOSFETs can also be paralleled easily because the forwardvoltage drop increases with increasing temperature, ensuring an even distribution of current among all components.However, at high breakdown voltages (>200V) the on-state voltage drop of the power MOSFET becomes higher than that of a similar size bipolar device with similar voltage rating. This makes it more attractiveto use the bipolar power transistor at the expense of worse high frequency performance. Figure 2 showsthe present current-voltage limitations of power MOSFETs and BJTs. Over time, new materials,structures and processing techniques are expected to raise these limits.Figure 3 shows schematic diagram and Figure 4 shows the physical origin of the parasitic components in an n-channel power MOSFET. The parasitic JFET appearing between the two body implants restricts current flow when the depletion widths of the two adjacent body diodes extend into the drift region with increasing drain voltage. The parasitic BJT can make the device susceptible to unwanted device turn-on and premature breakdown. The base resistance RB must be minimized through careful design of the doping and distance under the source region. There are several parasitic capacitances associated with the power MOSFET as shown in Figure 3.C GS is the capacitance due to the overlap of the source and the channel regions by the polysilicon gate and is independent of applied voltage. C GD consists of two parts, the first is the capacitance associated with the overlap of the polysilicon gate and the silicon underneath in the JFET region. The second part is the capacitance associated with the depletion region immediately under the gate. C GD is a nonlinear function of voltage. Finally, C DS, the capacitance associated with the body-drift diode, varies inversely with the square root of the drain-source bias. There are currently two designs of power MOSFETs, usually referred to as the planar and the trench designs. The planar design has already been introduced in the schematic of Figure 3. Two variations of the trench power MOSFET are shown Figure 5. The trench technology has the advantage of higher cell density but is more difficult to manufacture than the planar device.Figure 4. Power MOSFET Parasitic Components.BREAKDOWN VOLTAGEBreakdown voltage,BV DSS , is the voltage at which the reverse-biased body-drift diode breaks down and significant current starts to flow between the source and drain by the avalanche multiplication process,while the gate and source are shortedtogether. Current-voltage characteristics of a power MOSFET are shown in Figure 6.BVDSS is normallymeasured at 250µA drain current. For drain voltages below BV DSS and with no bias on thegate, no channel isformed under the gate atthe surface and the drainvoltage is entirelysupported by thereverse-biased body-drift p-n junction. Two relatedphenomena can occur inpoorly designed and processed devices:punch-through and reach-through. Punch-through is observed when the depletionregion on the source side of the body-drift p-n junction reaches thesource region at drainvoltages below the rated avalanche voltage of the device. This provides a current path betweensource and drain andcauses a soft breakdowncharacteristics as shownin Figure 7. The leakagecurrent flowing betweensource and drain is denoted by I DSS . There are tradeoffs to be made between R DS(on) that requires shorter channel lengths and punch-through avoidance that requires longer channel lengths.The reach-through phenomenon occurs when the depletion region on the drift side of the body-drift p-n junction reaches the epilayer-substrate interface before avalanching takes place in the epi. Once the depletion edge enters the high carrier concentration substrate, a further increase in drain voltage will cause the electric field to quickly reach the critical value of 2x105 V/cm where avalanching begins.(b) Truncated V-Groove MOSFETON-RESISTANCEThe on-state resistance of a power MOSFET is made up of several components as shown in Figure 8:(1)where:R source = Source diffusion resistance R ch = Channel resistanceR A = Accumulation resistanceR J = "JFET" component-resistance of the region between the two body regions R D = Drift region resistance R sub = Substrate resistanceWafers with substrate resistivities of up to 20m Ω-cm are used for high voltage devices and less than 5m Ω-cm for low voltage devices.R wcml = Sum of Bond Wire resistance, the Contact resistance between the source and drain Metallization and the silicon,metallization and Leadframecontributions. These are normallynegligible in high voltage devices but can become significant in low voltage devices.Figure 9 shows the relative importance of each of the components to R DS(on) over the voltage spectrum. As can be seen, at high voltages the R DS(on) is dominated by epi resistance and JFET component. This component is higher in high voltagedevices due to the higher resistivity orlower background carrier concentration in the epi. At lower voltages, the R DS(on) isdominated by the channel resistance andthe contributions from the metal tosemiconductor contact, metallization,bond wires and leadframe. The substrate contribution becomes more significant for lower breakdown voltage devices.TRANSCONDUCTANCETransconductance, gfs, is a measure of the sensitivity of drain current to changes in gate-source bias.This parameter is normally quoted for a V gs that gives a drain current equal to about one half of the maximum current rating value and for a VDS that ensures operation in the constant current region.Transconductance is influenced by gate width, which increases in proportion to the active area as cell density increases. Cell density has increased over the years from around half a million per square inch in 1980 to around eight million for planar MOSFETs and around 12 million for the trench technology. The limiting factor for even higher cell densities is the photolithography process control and resolution that allows contacts to be made to the source metallization in the center of the cells.R R R R R R R R DS(on source ch A J D sub wcml)=++++++Figure 6. Current-Voltage Characteristics of Power MOSFETChannel length also affects transconductance. Reduced channel length is beneficial to both gfs and on-resistance,with punch-through as a tradeoff. The lower limit of this length is set by the ability to control the double-diffusion process and is around 1-2mm today. Finally the lower the gate oxide thickness the higher gfs.THRESHOLD VOLTAGEThreshold voltage, V th , is defined as the minimum gate electrode bias required to strongly invert the surface under the poly and form a conducting channel between the source and the drain regions. V th is usually measured at a drain-source current of 250µA. Common values are 2-4V for high voltage devices with thicker gate oxides, and 1-2V for lower voltage, logic-compatible devices withthinner gate oxides. With power MOSFETs finding increasing use in portable electronics and wireless communications where battery power is at a premium, the trend is toward lower values of RDS(on) and Vth.DIODE FORWARD VOLTAGEThe diode forward voltage, VF, is the guaranteed maximum forward drop of the body-drain diode at a specified value of source current. Figure 10shows a typical I-V characteristics for this diode at two temperatures. P-channel devices have a higher VF due to the higher contact resistance between metal and p-silicon compared with n-type silicon.Maximum values of 1.6V for high voltage devices (>100V) and 1.0V for low voltage devices (<100V) are common.POWER DISSIPATIONThe maximum allowable power dissipation that will raise the die temperature to the maximumallowable when the case temperature is held at 250C is important. It is give by Pd where:T jmax = Maximum allowable temperature of the p-n junction in the device (normally 1500C or 1750C) R thJC = Junction-to-case thermal impedance of the device.DYNAMIC CHARACTERISTICSCharacteristicsFigure 8. Origin of Internal Resistance in a Power MOSFET.P d T j R thJC=-m ax 25(2)When the MOSFET is used as a switch, its basic function is to control the drain current by the gate voltage. Figure 11(a) shows the transfer characteristics and Figure 11(b) is an equivalent circuit model often used for the analysis of MOSFET switching performance.Figure 9. Relative Contributions to R DS(on) With Different Voltage Ratings.The switching performance of a device is determined by the time required to establish voltage changes across capacitances. R G is the distributed resistance of the gate and is approximately inversely proportional to active area. L S and L D are source and drain lead inductances and are around a few tens of nH. Typical values of input (C iss), output (C oss) and reverse transfer (C rss) capacitances given in the data sheets are used by circuit designers as a starting point in determining circuit component values. The data sheet capacitances are defined in terms of the equivalent circuit capacitances as:C iss = C GS + C GD, C DS shorted Array C rss = C GDC oss = C DS + C GDGate-to-drain capacitance, C GD, is anonlinear function of voltage and is the mostimportant parameter because it provides afeedback loop between the output and theinput of the circuit. C GD is also called theMiller capacitance because it causes the totaldynamic input capacitance to become greaterthan the sum of the static capacitances.Figure 12 shows a typical switching time testcircuit. Also shown are the components ofthe rise and fall times with reference to theV GS and V DS waveforms.Turn-on delay, t d(on), is the time taken tocharge the input capacitance of the devicebefore drain current conduction can start.Voltage Characteristics.Similarly, turn-off delay, t d(off), is the timetaken to discharge the capacitance after the after is switched off.Have Greatest Effect on SwitchingGATE CHARGEAlthough input capacitance values are useful, they do not provide accurate results whencomparing the switchingperformances of two devices from different manufacturers.Effects of device size and transconductance make such comparisons more difficult. A more useful parameter from the circuit design point of view isthe gate charge rather thancapacitance. Most manufacturers include bothparameters on their data sheets.Figure 13 shows a typical gate charge waveform and the test circuit. When the gate isconnected to the supply voltage,V GS starts to increase until it reaches V th , at which point the drain current starts to flow and the C GS starts to charge. During the period t 1 to t 2, C GScontinues to charge, the gate voltage continues to rise and drain current risesproportionally. At time t 2, C GS is completely charged and thedrain current reaches thepredetermined current I D andstays constant while the drain voltage starts to fall. With reference to the equivalentcircuit model of the MOSFET shown in Figure 13, it can be seen that with C GS fully charged at t 2, V GS becomes constant and the drive current starts to charge the Miller capacitance, C DG . This continues until time t 3.Figure 12. Switching Time Test (a) Circuit, (b) VGS and VDS WaveformsCharge time for the Miller capacitance is larger than that for the gate to sourcecapacitance C GS due to the rapidly changing drain voltage between t 2 and t 3 (current = C dv/dt). Once both of the capacitances C GS and C GD are fully charged, gate voltage (V GS )starts increasing again until it reaches the supply voltage at time t 4. The gate charge (Q GS + Q GD ) corresponding to time t 3 is the bare minimum charge required to switch the device on. Good circuit design practice dictates the use of a higher gate voltage than the bare minimum required for switching and therefore the gate charge used in the calculations is Q G corresponding to t 4.The advantage of using gate charge is that the designer can easily calculate theamount of current required from the drive circuit to switch the device on in a desired length of time because Q = CV and I = C dv/dt, the Q = Time x current. Forexample, a device with a gate charge of 20nC can be turned on in 20µsec if 1ma is supplied to the gate or it can turn on in 20nsec if the gate current is increased to 1A. These simple calculations would not have been possible with input capacitance values.dv/dt CAPABILITYPeak diode recovery is defined as the maximum rate of rise of drain-sourcevoltage allowed, i.e., dv/dt capability. If thisrate is exceeded then the voltage across thegate-source terminals may become higherthan the threshold voltage of the device,forcing the device into current conductionmode, and under certain conditions acatastrophic failure may occur. There are two possible mechanisms by which a dv/dt induced turn-on may take place. Figure 14 shows the equivalent circuit model of a power MOSFET, including theparasitic BJT. The first mechanism of dv/dt induced turn-on becomes active through the feedback action of the gate-drain capacitance, CGD. When a voltage ramp appears across the drain and source terminal of the device a current I 1 flows through the gate resistance, R G , by means of the gate-drain capacitance,C GD . R G is the total gate resistance in the circuit and the voltage drop across it is given by:(3)When the gate voltage V GS exceeds the threshold voltage of the device V th , the device is forced into conduction. The dv/dt capability for this mechanism is thus set by:and Drain Waveforms.V I R R C dvdtGS G G GD==1(4)It is clear that low V thdevices are more prone todv/dt turn-on. Thenegative temperaturecoefficient of V th is of special importance in applications where high temperature environments are present. Also gate circuit impedance has to be chooses carefully to avoid this effect.The second mechanism for the dv/dt turn-on in MOSFETs is through theparasitic BJT as shown inFigure 15. The capacitanceassociated with the depletion region of the body diode extending into the drift region is denoted asC DB and appears betweenthe base of the BJT and the drain of the MOSFET. This capacitance gives rise to a current I 2 to flow through the base resistance R B when a voltage ramp appears across the drain-source terminals. With analogy to the first mechanism, the dv/dt capability of this mechanism is:(5)If the voltage that develops across R B is greater than about 0.7V, then the base-emitter junction is forward-biased and the parasitic BJT is turned on. Under the conditions of high (dv/dt)and large values of R B , the breakdown voltage ofthe MOSFET will be limited to that of the open-base breakdown voltage of the BJT. If theapplied drain voltage is greater than the open-base breakdown voltage, then the MOSFET willenter avalanche and may be destroyed if thecurrent is not limited externally.Increasing (dv/dt) capability therefore requiresreducing the base resistance R B by increasingthe body region doping and reducing thedistance current I 2 has to flow laterally before itis collected by the source metallization. As inthe first mode, the BJT related dv/dt capabilitybecomes worse at higher temperatures becauseR B increases and V BE decreases with increasing temperature.dv dt V R C th G GD =Mechanisms for dv/dt Induced Turn-on.Components That May Cause dv/dt Induced Turn-ondv dt V R C BE B DB =References:"HEXFET Power MOSFET Designer's Manual - Application Notes and Reliability Data," International Rectifier"Modern Power Devices," B. Jayant Baliga"Physics of Semiconductor Devices," S. M. Sze"Power FETs and Their Applications," Edwin S. Oxner"Power MOSFETs - Theory and Applications," Duncan A. Grant and John Gower。
英语作文-集成电路设计师需要了解的基础知识与技术要点
英语作文-集成电路设计师需要了解的基础知识与技术要点Integrated Circuit Designer Needs to Understand Basic Knowledge and Technical Points。
As an integrated circuit designer, it is essential to have a strong understanding of the basic knowledge and technical points related to this field. Integrated circuits, also known as microchips, are at the heart of all modern electronic devices, and the role of a designer is crucial in ensuring the functionality and performance of these circuits. In this article, we will explore the fundamental concepts and technical aspects that an integrated circuit designer needs to be familiar with.First and foremost, a comprehensive understanding of semiconductor physics is indispensable for an integrated circuit designer. Semiconductors are the foundation of integrated circuits, and a designer must have a deep knowledge of their properties and behaviors. This includes an understanding of concepts such as band theory, electron mobility, doping, and the operation of semiconductor devices such as diodes and transistors. Without a solid grasp of semiconductor physics, it would be impossible to design efficient and reliable integrated circuits.In addition to semiconductor physics, a designer must also be well-versed in circuit theory and design. This includes a thorough understanding of analog and digital circuits, as well as the various components and building blocks that are commonly used in integrated circuit design. Knowledge of circuit analysis, signal processing, and power management is also crucial for designing circuits that meet the performance and power requirements of modern electronic devices.Furthermore, a designer needs to have a strong grasp of computer-aided design (CAD) tools and simulation techniques. CAD tools are essential for creating and testing circuit designs, and a designer must be proficient in using software such as SPICE(Simulation Program with Integrated Circuit Emphasis) and layout tools to simulate and optimize circuit performance. Additionally, a designer should be familiar with hardware description languages (HDL) such as Verilog and VHDL, which are commonly used for designing and testing digital circuits.Moreover, an integrated circuit designer needs to stay updated with the latest advancements in semiconductor technology and manufacturing processes. This includes knowledge of advanced materials, such as FinFET transistors and silicon-on-insulator (SOI) technology, as well as an understanding of the challenges and opportunities presented by nanoscale device fabrication. Keeping abreast of these developments is essential for designing cutting-edge integrated circuits that push the boundaries of performance and efficiency.In conclusion, the role of an integrated circuit designer is complex and multifaceted, requiring a deep understanding of semiconductor physics, circuit theory, CAD tools, and the latest advancements in semiconductor technology. By mastering these fundamental knowledge and technical points, a designer can create innovative and reliable integrated circuits that drive the advancement of modern electronic devices.。
当兵入伍流程分配
当兵入伍流程分配Joining the military is a significant decision that requires careful consideration and preparation. 当兵入伍是一个重要的决定，需要慎重考虑和准备。
The process of enlisting in the military involves several steps, starting with the initial application and culminating in boot camp or basic training. 入伍的流程包括几个步骤，从最初的申请到最后的新兵训练或基本训练。
One of the first steps in the enlistment process is to meet with a recruiter to discuss the various options available and determine eligibility. 在入伍流程中的第一步是与招募人员会面，讨论各种可用选项并确定资格。
After meeting with the recruiter, potential recruits will have to take the Armed Services Vocational Aptitude Battery (ASVAB) test to assess their abilities and strengths in various areas. 与招募人员会面之后，潜在的新兵将必须参加武装部队职业能力评估测试（ASVAB）以评估他们在各个领域的能力和优势。
Once the ASVAB test is completed and the potential recruit meetsthe necessary qualifications, they will select a job or military occupational specialty (MOS) that best aligns with their skills and interests. 一旦完成了ASVAB测试，并且潜在新兵符合必要的资格要求，他们将选择最符合自己技能和兴趣的工作或军事职业特长（MOS）。
MOS -最详细的介绍
U-MOSFET Structure
3.沟槽垂直导电型MOSFET管
V型沟槽：不容易生产，V尖角容易形成高的电场. U型沟槽： U-MOSFET结构90年代商业化应用，平面型的演变，切开翻转90度。 Silicon表 面刻沟槽，The N-type channel is formed on the side-wall of the trench at the surface of the P-base region. The channel length is determined by the difference in vertical extension of the P-base and N+ source regions as controlled by the ion-implant energies and drive times。栅 结构不与裸片表面平行而是构建在沟道之中垂直于表面，因此占用空间较少且使电流流 动真正垂直，最小化基本单元面积(cell pitch小)，在相同的占位空间中可以集成更多的 单元从而降低RDSON . U-MOSFET structure reduce the on-state resistance by elimination of the JFET component .
Double-diffused？？
D-MOSFET Structure
2. 平面垂直导电型功率MOSFET管
D-MOSFET Structure
2. 平面垂直导电型功率MOSFET管
The channel length of this device could be reduced to sub-micron dimensions by controlling the diffusion depths of the P-base and N+ source regions without resorting to expensive lithography tools. The device fabrication process relied up on the available planar gate technology used to manufacture CMOS integrated circuits.
basicCMOSanalogicdesignLecture2CMOStechnology
tox <1000 angstrom tox >1000 angstrom
dry oxidation wet oxidation
Micro-electronics Department EIS Soochow University
3) The temperature for oxidation is commonly 700—1000oC; 4） tox determines the reliability and current
CMOS Analog IC Design
Classification of Si-technology
Note: iCMOS technology from ADI
Micro-electronics Department EIS Soochow University
CMOS Analog IC Design
second bake
etching
getting rid of the resist
Micro-electronics Department EIS Soochow University
CMOS Analog IC Design
major CMOS process steps (N-well example)
第五章 MOS场效应管的特性讲诉
MOS管的电容
MOS电容—耗尽层电容特性
3） 随着Vgs的增大，耗尽层厚度Xp增大，耗尽层上的电压降 就增大，因而耗尽层电容 CSi 就减小。 耗尽层上的电压降 的增大，意味着Si表面能级的下降。一旦Si表面能级下降到 P 型衬底的费米能级，这时在 Si 表面，电子浓度与空穴浓度 相等，成为本征半导体，半导体呈中性。 若Vgs 再增大，排斥掉更多的空穴，吸引了更多的电子， 这时，Si表面的电子浓度超过了空穴的浓度，形成 N 反型层， 耗尽层厚度的增加就减慢了，CSi的减小也减慢了。
栅极与栅极下面区域形成一个电容器，
是MOS管的核心。
MOS管特性
MOSFET的三个基本几何参数
poly-Si G D W S diffusion L t ox
p+/n+ p+/n+
栅长:L; 栅宽: W; 氧化层厚度: tox Lmin： MOS工艺的特征尺寸(feature size) L影响MOSFET的速度， W决定电路驱动能力和功耗 L和W由设计者选定,通常选取L= Lmin，
Ei E F k 0T
p0 EF Ei kT ln ni 2 bp 2kT N a US ln q q n i
掺杂浓度Na越大，VT就越大
25 VT 阈值电压
Vox的计算
Vox 根据从金属到氧化物到 Si 衬底 Xm 处的电场分布曲 线导出: ≈Q/C 已知Qox=Qsi， 且φ=2KT ln(Na/ni)
由此，设计者只需选取W
MOS管特性
n(p)
MOSFET的伏安特性:电容结构
当VGS<=0，
当漏源电极之间加上电压时，除了PN结的漏电流之外，不 会有更多电流形成。
MB Basic Knowledge
參考資料………………………...90
2
PC MB
绪 言
计算机种类繁多，一般可分为大型计算机、小型计算机以 及微型计算机。我们一般所见的多为微型计算机，如桌上型电 脑(Desktop)、笔记本电脑(Notebook)等。这些微型计算机广泛用 于日常的生活和工作中，其硬件设计和软件支持都是针对个人 使用，我们称之为个人计算机(PC，Personal Computer)。在不特 别说明的情况下，本文所讲的计算机都是指微型计算机。 一台计算机(Computer)的主要部件集合在一起就是计算机的 主机，这些主要部件一般组装在一块PCB(Printed Circuit Board， 印刷电路板)上。所以我们称这块组装了计算机主要部件的PCB 为主机板，简称主板(MB，Main Board)或母板(MB，Mother Board)。 本文从计算机原理入手，主要讲述当前主流主板的基本知 识，对主板的發展前沿稍有涉及。其內容主要介绍计算机主板 的组成、架构、芯片组(Chipset)和总线(Bus)。
總線控制器 CPU與存儲器和各種外設之間通過總線傳遞信息 的方式是各不相同的，每組總線都由它的接口的電路來控制其工作 方式，故我們也把接口電路也叫總線控制器。總線控制器其內部主 要組成有兩部分－控制部分和寄存器部分。控制部分接收和發出各 種控制信號，控制總線中數據的正常傳遞。寄存器部分主要用來寄 存和緩沖總線中傳遞的數據。
BUS請求
1
DMA請求
CPU
3
BUS允許
DMA
4
DMA允許
IO
Memory
14
PC MB
計算機基礎
如上圖，外設在需要DMA傳輸的時候會發出一個DMA請求信號， DMA控制器接到該信號後向CPU發出總線控制請求信號，在得到允許 後CPU會發出允許總線使用信號，將總線的控制權交給DMA控制器， DMA控制器控制總線後再發出DMA允許傳輸信號給外設，開始DMA 傳輸。DMA傳輸一般用來傳輸大批量的數據，如多媒體的播放，數據 的拷貝等。 中斷(INTERRUPT)，簡單地說中斷是一個過程。這個過程可以由 處理器內外部硬件或軟件中斷指令引起，即由它們發生中斷請求(IRQ， Interrupt Request)，CPU接到中斷請求後可以暫時中止現行程序的執行， 轉去執行請求中斷的那個外設或軟件的中斷處理程序，待處理完畢後 又返回到被中止了的程序。 實現中斷有三個好處：一、同步操作。 CPU與低速外設交換數據 時會浪費很多時間去等待外設處理數據，引入中斷後CPU可以同時命 令多個外設同時工作；二、實時處理。對隨機事件能及時地響應並妥 善處理。三、故障處理。能隨時發現系統中的各種錯誤並自行處理。
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如果继续增大栅源间的电压Ugs，则当Ugs超过某一
临界值时，所产生的电容电场强度将吸收足够多的 电子，在耗尽层与绝缘层之间形成了以电子占多数 的可移动表面电荷层，叫反型层。在漏极与源极之 间，提供了N型导电沟道，因此得名N沟道MOS场 效应管。从耗尽层到开始形成反型层所需要提供的 栅源间最小电压Ugs称为开启电压。 由于导电沟道有一定的长度，在加上Uds之后，沿 着漏源方向的沟道内会产生电压降，形成电位梯度， 靠近源极处电位低，电子浓度高，沟道也宽，而在 漏极处电位高，电子浓度低，沟道较窄。
BVDSS：是指在特定的温度和栅源短接情况下，
流过漏极电流达到一个特定值时的漏源电压。 这种情况下的漏源电压为雪崩击 穿电压。当漏 一源电压VDS超过BVDSS时，漏一源极之间雪崩 效应电流激增。 BVDSS为正愠度系数，结温每 升高10℃，BVDSS约增大1％ 。 RDS（on）: 是指MOS在完全导通状态时，漏源 间的总电阻。他是 影响最大额定电流和功耗的 主要参数。
降低Qg有三种方法：增加氧化层厚度；降低沟道 区的掺杂浓 度；减少栅极面积. IDSS：零栅压漏极电流，是指栅源电压为零时， 在特定的漏源电压下漏源之间泄露电流，泄漏 电流随着温度的增加而增大，IDSS在室温和高 温下都有规定。漏电流造成的功耗可以用IDSS 乘以漏源之间的电压计算，通常这部分功耗可 以忽略不计.
当Ugs=0时，在Uds=0，Ugs=0的条件下，PN结为零
偏置状态，此时PN结的耗尽层很窄，导电沟道很 宽，如果逐渐增大漏源电压Uds，在Uds较小的时候， 三极管内部沿着沟道各点的PN结反向电压值仍很 小，耗尽层的宽度几乎没有改变。因此漏极电流Id 随Uds增加几乎呈直线增长。但事实上由于沟道呈 长形结构，在Uds大于零的范围内，沿着沟道各点 的电位是不同的，这使得沟道各点上PN结的反向 电压不同，靠近漏极一端的反向电压高一些，所以 耗尽层要宽一些，而靠近源极的电压低一些，耗尽 层就窄一些，这样有效的导电沟道呈不等宽度燕尾 形。
N沟道结型场效应管的工作原理
导电沟道的可控特性
将栅极g悬空，在漏极与源极之间加正向电压Uds，
N型沟道中的多数载流子就在电场的作用下，由源 极向漏极移动，形成漏极电流Id。当Uds一定的时 候，Id就取决于沟道的电阻，而电阻和半导体材料 的电阻率，沟道长度，沟道的截面积有关。所以我 们改变导电沟道的截面积，就可以控制Id的大小。 栅源电压改变沟道大小 从上面可以知道改变两个PN结耗尽层的大小就可 以控制Id。所以如果在栅源之间加上负电压，就可 以改变沟道的导电能力。
MOS的工作原理 MOS场效应管是利用Ugs来控制感应电荷的多少，以改
变形成感应电荷的导电沟道，从而控制Id。当Ugs=0时， 漏源之间不存在导电沟道，就是增强型MOS；反之， Ugs=0，有导电沟道，就是耗尽型MOS。 当栅源电压Ugs大于0.且数值很小，同时Uds等于0时 由于源极与P型存底相连，因此栅极金属铝极与P型存 底之间构成以氧化物绝缘层为介质的电容电场，电场 的方向从金属栅极指向P型半导体。这一电场使P型半 导体表面的空穴离开表面，而电子则受电场吸引移向P 型半导体表面。当Ugs的值较小时，只有少量的电子移 到表面与P型半导体中的空穴复合，结果在P型半导体 表面形成新的耗尽层。
当Uds继续增加时，沟道中靠近漏极端的PN结的反向电
压明显增大，耗尽层显著加宽，导电沟道更窄。 由于沟道变窄，沟道电阻增大，所以Id随Uds增加而增 大的趋势变缓。 当Uds在继续增加到较大时，在靠近漏极一端的两个耗 尽层在沟道中首先开始合拢，沟道处于预夹断状态。 沟道预夹断时的漏源电压称为漏源饱和电压Udss，对应 的漏极电流称为饱和电流，用Idss表示。当沟道处于预 夹断状态后，如果在增加Uds，只能使耗尽层继续扩大， 合拢处向源极方向延伸。此时Uds的增加值几乎全降落 在夹断后的耗尽层上，用来克服夹断去读Id的阻力。因 此漏源电压Uds继续增大，漏极电流Id也不会有明显的 变化，从而进入恒流区。
由图可知，当Uds=0时，Id达到最大，此时的漏极
电流称为沟道饱和电流，用Id=Idss表示，当Ugs越负 的时候，PN结耗尽层的宽度越宽，Id越小，当Id近 视为0时，栅源之间的电压为夹断电压，用Ugs=Up 来表示。 输出特性曲线 输出特性曲线是表示Ugs为定值时，Id与Uds之间的 关系曲线。
MOSFET分为两种类型：耗尽型和增强型。
a、耗尽型：这种MOS是即使gate与source间的电 压为0，只要 在drain与source间加上电压，就会 有Id形成。
b、增强型：如下图，这种MOS没有原始导电道， 必须通过在 gate与source加电压才形成Id随着 Vg的增加而增加。当gate 端不加电压时， Ids为 0。
RN+：是指source与N+间的电阻,与组成RDS(on)的 其他电 阻相比很小,所以在高压MOS时可以忽略。 RCH：是指通道电阻,在低压MOS时,是RDS（on） 的主要组 成部分。受通道宽度和长度、gate oxide厚度、gate驱动电压的影响.可以通过降低 原胞面积来大幅度降低其阻值。 RA：当在gate端加驱动电压时，电荷在N-的上表 面积累，在通道与JFET区之间形成电流。这个 积累区的电阻就是RA。RA受积累区的电荷和表 面自由电子的转移速率影响。随栅极电 压增加 而增加，可以增加其掺杂浓度以降低阻值.
根据Ugd=Ugs-Uds>Ut推出Uds<Ugs-Ut，所以Id随着
Uds的增加而线性上升，沟道呈可变电阻特性。 当Uds增大到一定程度时，靠近漏极处的沟道继续 减小，知道沟道为零，这时候Ugd=Ugs-Uds=Ut即 Uds=Ugs-Ut，这个状态为预夹断。 这时候继续增加Uds，Id几乎没什么变化，Uds>UgsUt，这个叫恒流区。 特性曲线
当Uds增加很大时，栅漏间反向电压将很大，使PN结反
向击穿，Id急剧变大。 下面分析下Ugs<0时的输出特性曲线 Ugs<0时，只是在栅源之间加上负电压，即使Uds=0时， 耗尽层因两个PN结点反向偏置而变宽，所以在Ugs<0时， 对于相同的Uds，导电沟道比Ugs=0更窄，沟道电阻更大。 第一，漏极电流Id比Ugs=0时要减小。且Ugs负的越多， Id就越小；第二，饱和漏电流Idss也比Ugs=0时要减小； 第三，当Ugs负电压增加到夹断电压Up，耗尽层加宽到 使沟道被夹断，Id几乎为零；第四，Ugs为负时，预夹 断所需的Uds也降低。
此时两个PN结均为反向偏置，加大这个反偏电压，
耗尽层就不断变宽，导电沟道的截面积减小，沟道 电阻变大，Id就减小。所以只要改变Ugs的电压，就 可以控制Id的大小，所以被称为电压控制型器件。 N沟道结型场效应管的特性曲线 转移特性曲线 特性转移曲线是表示Ugs对Id的控制作用，Uds是一 定的。
MOS的基本参数
VGS（th）：又称为阈值电压，是指加的栅源
电压能使漏极开始有 电流或者关断MOSFET时 停止流过电流时的电压，栅一源电压超过此值 时，漏极电流由小到大显著增加。VGS(th)是负 温度系数，这就意味着当温度上升时MOSFET 将会在比较低的栅源电压下开启。 VGS(th)与gate oxide的厚度成正比，与P-body掺杂浓度的平方 成正比。
寄生三极管：
MOS内部N+区，P-body区，N-区构成寄生三极管, 当BJT开启时击穿电压由BVCBO变成BVCEO（只有 BVCBO的50%到60% ），这种情况下，当漏极电 压超过BVCEO时，MOS雪崩击穿，如果没有外部 的漏极电流限制，MOS将被二次击穿破坏，所 以，要镀一层金属来短接N+区和P-body区，以 防止寄生BJT的开启。
绝缘栅型场效应管
绝缘栅型场效应管由金属氧化物组成，所以又称为
金属—氧化物——半导体场效应管，简称MOSFET， 与结型场效应管相比，其输入电阻更高，可达10的 10次方欧以上。 N沟道增强型MOS NMOS以一块掺杂浓度较低的P型半导体材料为存底， 在其上利用扩散工艺制作出两个掺杂的N型区，分 别引出两个电极，作为源极S和漏极d，再在整个半 导体表面上覆盖一层SIO2绝缘层，并在两个N区之 间绝缘层外蒸发一层金属铝做栅极g，因为栅极g与 P型半导体存底d及源极s之间都是绝缘的，所以叫 绝缘栅型场效应管。
MOSFET INTRODUCE
Power Tiny 2012/6/5
场效应三极管
1， 场效应三极管是一种较新型的半导体器件，它是 利用输入端的电场效应来控制其电流，所以叫场效应管。 因为参与导电的载流子是只有一种极性的多数载流子， 所以又叫作单极性三极管。它具有输入电阻高（10的7 次方到12次方）特点。 Q：为什么输入电阻高？输入电阻高有什么好处？ A：Rgs是栅源之间所加大电压与产生的栅极电流之比。 由于场效应管的栅极几乎没有电流（MOS：G端类似个 电容阻抗很大，不能通过电流;JFET是栅极与沟道间的 PN结是反偏的所以Ig=0，输入电阻高），因此其输入电 阻很高。假如给G端加个电压，因为加的电压源本身有 内阻，与Rgs的电阻串联进行分压，所以如果Rgs 的电阻 高那么分担电压就大，损失在内阻上的电压就小，就能 达到我们想要的结果。
RJ：N-区域和两个P-body区域构成JFET，JFET沟 道即中间N-区域的电阻就称为RJ. RD：漂移层电阻，JFET区域下方N-区域的电阻。 在高压MOS时,是构成 RDS（on）的主要因素。 RD也是限制MOS在高压领域使用的主要因素. RS：指的是整个底层的电阻。在高压MOS时可以 忽略，但是在低压MOS时，当击穿电压小于 50V时，它就是构成RDS（on）的一个主要因素。 Qg：是指特定栅极电压下MOS完全导通时输入 电容的总电量。直接影响着MOS的开关速度， 开关损耗在频率提高时占据了主要位置，降低 Qg，可有效降低开关损耗.
如图所示为M0SFET的开启过程，可分为四个阶