74HCT157DR2G,74HCT157DTR2G,规格书,Datasheet 资料
MC74ACT157DG资料
MC74AC157, MC74ACT157Quad 2−Input MultiplexerThe MC74AC157/74ACT157 is a high−speed quad 2−input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form.The MC74AC157/74ACT157 can also be used as a function generator.Features•Outputs Source/Sink 24 mA•′ACT157 Has TTL Compatible Inputs •Pb−Free Packages are Available*151614131211102134567V CC 98E I 0c I 1c Z c I 0d I 1d Z d SI 0aI 1aZ aI 0bI 1bZ bGNDFigure 1. Pinout: 16−Lead Packages Conductors(Top View)TRUTH TABLEH = HIGH Voltage Level L = LOW Voltage Level X = Immaterial*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.See general marking information in the device marking section on page 3 of this data sheet.DEVICE MARKING INFORMATIONSee detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.ORDERING INFORMATIONFigure 2. Logic SymbolFUNCTIONAL DESCRIPTIONThe MC74AC157/74ACT157 is a quad 2−input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active−LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The MC74AC157/74ACT157 is the logic implementation of a 4−pole, 2−position switch where the position of the switch is determined by the logic levels supplied to the Select input.The logic equations for the outputs are shown below:Z a = E •(I 1a •S+I 0a •S)Z b = E •(I 1b •S+I 0b •S)Z c = E •(I 1c •S+I 0c •S)Z d = E •(I 1d •S+I 0d •S)A common use of the MC74AC157/74ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The MC74AC157/74ACT157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.Figure 3. Logic DiagramI 0a I 1a I 0b I 1b I 0c I 1c I 0d I 1dE SZ aNOTE:This diagram is provided only for the understanding of logicoperations and should not be used to estimate propagation delays.Z b Z c ZdMARKING DIAGRAMSA = Assembly Location WL, L = Wafer Lot YY , Y = YearWW, W = Work WeekAC157AWLYWWMC74AC157N AWLYYWWAC 157ALYWACT157AWLYWWACT 157ALYWMC74ACT157N AWLYYWW PDIP−16SOIC−16TSSOP−16EIAJ−1674AC157ALYW74ACT157ALYWvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.1.V IN from 30% to 70% V CC ; see individual Data Sheets for devices that differ from the typical input rise and fall times.2.V IN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.†Maximum test duration 2.0 ms, one output loaded at a time.NOTE:I IN and I CC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V CC. *Voltage Range 5.0 V is 5.0 V ±0.5 V.†Maximum test duration 2.0 ms, one output loaded at a time.ORDERING INFORMATIONSpecifications Brochure, BRD8011/D. *This package is inherently Pb−Free.PACKAGE DIMENSIONSPDIP−16N SUFFIX CASE 648−08ISSUE TNOTES:1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEADSWHEN FORMED PARALLEL.4.DIMENSION B DOES NOT INCLUDEMOLD FLASH.5.ROUNDED CORNERS OPTIONAL.MDIM MIN MAX MIN MAX MILLIMETERS INCHES A 0.7400.77018.8019.55B 0.2500.270 6.35 6.85C 0.1450.175 3.69 4.44D 0.0150.0210.390.53F 0.0400.70 1.02 1.77G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.0080.0150.210.38K 0.1100.130 2.80 3.30L 0.2950.3057.507.74M 0 10 0 10 S0.0200.0400.51 1.01____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.SBM0.25 (0.010)AST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.8010.000.3860.393B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2290.244R0.250.500.0100.019____SOIC−16D SUFFIX CASE 751B−05ISSUE JPACKAGE DIMENSIONSTSSOP−16DT SUFFIX CASE 948F−01ISSUE ODIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.180.280.0070.011J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH.PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15(0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.____16X REF KPACKAGE DIMENSIONSEIAJ−16M SUFFIXCASE 966−01ISSUE OON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
74HC595中文资料_数据手册_参数
onsemicom7功能表手术输入结果函数重启串行输入一个转移时钟闩时钟产量启用转移寄存器内容闩寄存器内容串行产量sqh平行输出大号大号大号将数据移入换档寄存器lh大号dsrsrn锁存寄存器保持不变不变sr移位寄存器内容数据lh逻辑电平低到高取决于复位和移位时钟输入lr保持不变从高到低取决于锁存时钟74hc595输入引脚说明inputsa引脚1474hc595串行数据输入
图 SERIAL数据 INPUT 14 11 10 12 13转移时钟重启 LATCH时钟 OUTPUT ENABLE转 移寄存器 LATCH 15 1 2 3 4五 6 7 9 Q A Q B Q C Q D Q E Q F Q G Q H SQ H一个 V CC = PIN 16 GND = PIN 8平行数据产出 SERIAL数据 OUTPUT引脚分配 13 14 15 16 9 10 11 12五 4 3 2 1 8 7 6锁定时钟输出启用一CK Q E Q D Q C Q B GND Q H Q G Q F订购信息设备包 运输 ? 74HC595DR2G SOIC-16 （无铅） 2500磁带和卷轴 74HC595DTR2G TSSOP-16 * 2500磁带和卷轴 ?有关磁带和 卷轴规格的信息，包括零件方向和磁带尺寸，请参阅我们的74hc595磁带和卷轴包 74hc595装规格手册，BRD8011 / D. *该封装本身具有无铅功能.74HC595中文资料第3 页精选内容： 74HC595 3最大额定值符号参数值单元 V CC 直流电源电压（参考GND） - 0.5至+ 7.0 V V IN直流输入电压（参考GND） - 0.5至 V CC + 0.5 V V OUT直流输出电压（参考GND） - 0.5至V CC + 0.5 V 我 在直流输入 电流，每个引脚 ±20嘛 我 出去了直流输出电流，每个引脚 ±35嘛 我 CC DC电源 电流，V CC 和GND引脚 ±75嘛 P D.静止空气中的功率耗散， SOIC封装? TSSOP封 装? 500 450毫瓦 T STG储存温度 - 65至+ 150 _C T L引线温度，距壳体1毫米，持续10 秒 （SOIC或TSSOP封装） 260 _C74hc595强调超过最大额定值74hc595可能会损坏设 备.最大额定值是压力仅限评级.不建议在推荐操作条件之上进行功能操作.长时间暴 露在高于推荐操作条件的应力下可能会影响设备74hc595可靠性. ?降额 - SOIC封 装： - 从65到125°C时为7 MW / _C TSSOP封装： - 从65_到125_C的6.1 MW / _C有 关高频或高负载考虑事项，请参阅安森美半导体高速CMOS数据手册（DL129 / D） 的第2章.推荐工作条件符号参数敏马克斯单元 V CC直流电源电压（参考GND） 2.0 6 V V IN ，V OUT 直流输入电压，输出电压 （参考GND） 0 V CC V T A.工作温 度，所有封装类型 - 55 + 125 _C T R ，T F输入上升和下降时间 V CC = 2.0 V （图1） V CC = 4.5V V CC = 6.0 V 0 0 0 1000 500 400 NS此设备包含保护防止损坏的电路由于高静态电压或电领域.但是，必 须采取预防措施被采取以避免任何应用程序电压高于最大额定值这个高阻抗电路 的电压 - CUIT. 为了正确的操作，V IN 和 V OUT 应该受到限制 范围GND V（V IN 或V OUT ）V V CC .未使用的输入必须始终为绑定到适当的逻辑电压 电平（例 如，GND或V CC ）.未使用的输出必须保持打开状态.74HC595中文资料第1页精选 内容：74HC595中文资料第7页精选内容： 74HC595 7功能表 手术输入结果函数重启串行输入一个转移时钟闩时钟产量启用转移寄存器内容闩 寄存器内容串行产量 SQ H平行输出 Q A - Q H复位移位寄存器大号 X X L，H， ↓ 大→号SR大N号+ 1üü大S号R Gü→将S数R 据H 移ü入移换74h档c5寄95存位器寄H存D器↑保持L，不H变，H↓X大L号，DH→，S↓R LA，; SHR，N↓ 大号 ü ü ü ü转移移位寄存器内容锁定寄存器 H X L，H，↓ ↑大号 ü SR N →LR N ü SR N锁存寄存器保持不变不变 X X X L，H，↓大号 * ü * ü启用并行输 出 X X X X大号 * ** *启用强制输出为高阻抗状态 X X X X H * ** * ? SR =移位寄存器 内容 D =数据（L，H）逻辑电平 ↑=低到高 * =取决于复位和移位时钟输入 LR =锁 存寄存器内容 U =保持不变 ↓=从高到低 ** =取决于锁存时钟74hc595输入引脚说明 I1N4）PU7T4ShcA5（95串引行脚数据输入.该引脚上的数据被移入 8位串行移位寄存器.控制输入移 位时钟（引脚11）移位寄存器时钟输入.从低到高的过渡该输74hc595入会导致串行
74HC2G125DP-G资料
1.General descriptionThe 74HC2G125; 74HCT2G125 is a high-speed, Si-gate CMOS device.The 74HC2G125;74HCT2G125provides two non-inverting buffer/line drivers with 3-state output.The 3-state output is controlled by the output enable input (pin nOE).A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state.The bus driver output currents are equal compared to the 74HC125 and 74HCT125.2.FeaturesI Wide supply voltage range from 2.0 V to 6.0V I Symmetrical output impedance I High noise immunity I Low power consumptionI Balanced propagation delays IESD protection:N HBM JESD22-A114E exceeds 2000V N MM JESD22-A115-A exceeds 200V I Multiple package optionsI Specified from −40°C to +85°C and −40°C to +125°C3.Ordering information74HC2G125; 74HCT2G125Dual buffer/line driver; 3-stateRev. 04 — 4 July 2008Product data sheetTable 1.Ordering informationType numberPackageTemperature range NameDescriptionVersion 74HC2G125DP −40°C to +125°CTSSOP8plastic thin shrink small outline package; 8 leads;body width 3 mm; lead length 0.5 mmSOT505-274HCT2G125DP 74HC2G125DC −40°C to +125°CVSSOP8plastic very thin shrink small outline package;8leads;body width 2.3 mmSOT765-174HCT2G125DC 74HC2G125GD −40°C to +125°CXSON8Uplastic extremely thin small outline package;no leads;8terminals; UTLP based; body 3× 2× 0.5 mmSOT996-274HCT2G125GD4.Marking5.Functional diagram6.Pinning information6.1PinningTable 2.MarkingType number Marking code 74HC2G125DP H2574HCT2G125DP T2574HC2G125DC H2574HCT2G125DC T2574HC2G125GD H2574HCT2G125GDT25Fig 1.Logic symbol Fig 2.IEC logic symbol Fig 3.Logic diagram (one driver)mce1851A 1Y 2161OE 2A 2Y 5732OEmce18611262EN1735EN2mna120AYOEFig 4.Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)Fig 5.Pin configuration SOT996-2 (XSON8U)1OE V CC 1A 2OE 2Y 1Y GND2A001aae0741234658774HC2G12574HCT2G125001aai33374HC2G12574HCT2G125Transparent top view876512341OE 1A2YGND V CC 2OE 1Y 2A6.2Pin descriptionTable 3.Pin descriptionSymbol Pin Description1OE, 2OE1, 7output enable input (active LOW)1A, 2A2, 5data inputGND4ground (0 V)1Y, 2Y6, 3data outputV CC8supply voltage7.Functional descriptionTable 4.Function table[1]Control Input OutputnOE nA nYL L LL H HH X Z[1]H=HIGH voltage level; L=LOW voltage level; X=don’t care; Z=high-impedance OFF-state.8.Limiting valuesTable 5.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage−0.5+7.0VI IK input clamping current V I<−0.5V or V I>V CC+0.5V[1]-±20mA I OK output clamping current V O<−0.5V or V O>V CC+0.5V[1]-±20mA I O output current V O=−0.5V to(V CC+0.5V)[1]-35mA I CC supply current-70mA I GND ground current−70-mA T stg storage temperature−65+150°C P tot total power dissipation T amb=−40°C to +125°C[2]-300mW[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]For TSSOP8 package: above 55°C the value of P tot derates linearly with 2.5 mW/K.For VSSOP8 package: above 110°C the value of P tot derates linearly with 8 mW/K.For XSON8U package: above 45°C the value of P tot derates linearly with 2.4 mW/K.9.Recommended operating conditions10.Static characteristicsTable 6.Recommended operating conditions Voltages are referenced to GND (ground = 0 V).Symbol Parameter Conditions74HC2G12574HCT2G125UnitMin Typ Max Min Typ Max V CC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5V V I input voltage 0-V CC 0-V CC V V O output voltage 0-V CC 0-V CC V T amb ambient temperature−40+25+125−40+25+125°C ∆t/∆Vinput transition rise and fall rate V CC = 2.0 V--625---ns/V V CC = 4.5 V - 1.67139- 1.67139ns/V V CC = 6.0 V --83---ns/V Table 7.Static characteristicsVoltages are referenced to GND (ground = 0 V). All typical values are measured at T amb =25°C.SymbolParameterConditionsT amb =−40°C to +85°C T amb =−40°C to +125°C Unit MinTypMaxMinMax74HC2G125V IHHIGH-level input voltageV CC = 2.0 V 1.5 1.2- 1.5-V V CC = 4.5 V 3.15 2.4- 3.15-V V CC = 6.0 V4.2 3.2- 4.2-V V ILLOW-level input voltageV CC = 2.0 V -0.80.5-0.5V V CC = 4.5 V - 2.1 1.35- 1.35V V CC = 6.0 V- 2.81.8- 1.8VV OHHIGH-level output voltageV I = V IH or V ILI O =−20µA; V CC = 2.0 V 1.9 2.0- 1.9-V I O =−20µA; V CC = 4.5 V 4.4 4.5- 4.4-V I O =−20µA; V CC = 6.0 V 5.9 6.0- 5.9-V I O =−6.0 mA; V CC = 4.5 V 3.84 4.32- 3.7-V I O =−7.8 mA; V CC = 6.0 V5.34 5.81- 5.2-V V OLLOW-level output voltage V I = V IH or V IL I O = 20µA; V CC = 2.0 V-00.1-0.1V I O = 20µA; V CC = 4.5 V -00.1-0.1V I O = 20µA; V CC = 6.0 V -00.1-0.1V I O = 6.0 mA; V CC = 4.5 V -0.150.33-0.4V I O = 7.8 mA; V CC = 6.0 V-0.160.33-0.4V I I input leakage currentV I =V CC or GND; V CC =6.0V--±1.0-±1.0µA I OZOFF-state output current V I = V IH or V IL ;V O =V CC or GND; V CC = 6.0 V--±5.0-±10µA11.Dynamic characteristicsI CC supply current V I =V CC or GND; I O =0A;V CC =6.0V--10-20µA C I input capacitance - 1.0---pF C Ooutputcapacitance - 1.5---pF74HCT2G125V IH HIGH-level input voltage V CC = 4.5 V to 5.5 V 2.0 1.6- 2.0-V V IL LOW-level input voltage V CC = 4.5 V to 5.5 V - 1.20.8-0.8VV OHHIGH-level output voltageV I = V IH or V IL ; V CC = 4.5 V I O =−20µA 4.4 4.5- 4.4-V I O =−6.0 mA3.844.32- 3.7-V V OLLOW-level output voltage V I = V IH or V IL ; V CC = 4.5 V I O = 20µA-00.1-0.1V I O = 6.0 mA-0.160.33-0.4V I I input leakage currentV I =V CC or GND; V CC =5.5V--±1.0-± 1.0µAI OZ OFF-state output current V I = V IH or V IL ; V O =V CC or GND; V CC = 5.5 V --±5.0-±10I CC supply current V I =V CC or GND; I O =0A;V CC =5.5V--10-20µA ∆I CC additional supply currentper input;V CC =4.5V to 5.5V;V I =V CC −2.1V; I O =0A--375-410µA C I input capacitance - 1.0---pF C Ooutputcapacitance- 1.5---pF Table 7.Static characteristics …continuedVoltages are referenced to GND (ground = 0 V). All typical values are measured at T amb =25°C.Symbol Parameter ConditionsT amb =−40°C to +85°C T amb =−40°C to +125°C Unit Min Typ Max Min Max Table 8.Dynamic characteristicsVoltages are referenced to GND (ground = 0 V); C L =50pF unless otherwise specified; for test circuit see Figure 8.Symbol Parameter ConditionsT amb =−40°C to +85°C T amb =−40°C to +125°C Unit MinTyp [1]MaxMinMax74HC2G125t pdpropagation delaynA to nY; see Figure 6[2]V CC = 2.0 V -35115-135ns V CC = 4.5 V-1123-27ns V CC = 5.0 V; C L =15pF -10---ns V CC = 6.0 V-820-23ns[1]All typical values are measured at T amb = 25°C.[2]t pd is the same as t PLH and t PHL .t en is the same as t PZL and t PZH .t dis is the same as t PLZ and t PHZ .t t is the same as t THL and t TLH .[3]C PD is used to determine the dynamic power dissipation (P D in µW).P D =C PD ×V CC 2×f i ×N +Σ(C L ×V CC 2×f o )where:f i =input frequency in MHz;f o =output frequency in MHz;C L =output load capacitance in pF;V CC =supply voltage in V;N =number of inputs switching;Σ(C L ×V CC 2×f o )=sum of outputs.t enenable timenOE to nY; see Figure 7[2]V CC = 2.0 V -40115-135ns V CC = 4.5 V -1123-27ns V CC = 6.0 V-820-23ns t disdisable timenOE to nY; see Figure 7[2]V CC = 2.0 V -24125-150ns V CC = 4.5 V -1225-30ns V CC = 6.0 V-1021-26ns t ttransition timesee Figure 6[2]V CC = 2.0 V -1875-90ns V CC = 4.5 V -615-18ns V CC = 6.0 V-513-15ns C PDpowerdissipation capacitanceper buffer; V I =GND to V CC [3]output enabled -11---pF output disabled -1---pF74HCT2G125t pdpropagation delaynA to nY; see Figure 6[2]V CC = 4.5 V-1531-38ns V CC = 5.0 V; C L =15pF-12---ns t en enable time nOE to nY; see Figure 7;V CC =4.5V[2]-1535-42ns t dis disable time nOE to nY; see Figure 7;V CC =4.5V[2]-1531-38ns t t transition time see Figure 6; V CC = 4.5 V [2]-615-18nsC PDpowerdissipation capacitanceper buffer;V I =GND to V CC −1.5V [3]output enabled -11---pF output disabled-1---pFTable 8.Dynamic characteristics …continuedVoltages are referenced to GND (ground = 0 V); C L =50pF unless otherwise specified; for test circuit see Figure 8.Symbol Parameter ConditionsT amb =−40°C to +85°C T amb =−40°C to +125°C Unit MinTyp [1]Max Min Max12.WaveformsMeasurement points are given in Table 9.Logic levels: V OL and V OH are typical output voltage levels that occur with the output load.Fig 6.Propagation delays data input (nA) to output (nY)001aad982t PLH t PHLV M V M90 %10 %V M V MoutputnYinput nAV IGNDV OHV OLt TLHt THLMeasurement points are given in Table 9.Logic levels: V OL and V OH are typical output voltage levels that occur with the output load.Fig 7.Enable and disable times mna362t PLZt PHZoutputs disabledoutputs enabledV YV Xoutputs enabledoutput LOW-to-OFF OFF-to-LOWoutput HIGH-to-OFF OFF-to-HIGHnOE inputV IV OLV OHV CCV MGNDGNDt PZLt PZH V MV M Table 9.Measurement pointsTypeInput Output V M V M V XV Y74HC2G1250.5V CC 0.5V CC V OL +0.3V V OH −0.3V 74HCT2G1251.3 V1.3 VV OL +0.3VV OH −0.3VTest data is given in T able 10.Definitions test circuit:R T = Termination resistance should be equal to output impedance Z o of the pulse generator.C L = Load capacitance including jig and probe capacitance.R L = Load resistance.S1 = Test selection switch.Fig 8.Load circuitry for measuring switching times V M V Mt Wt W10 %90 %0 VV IV I negative pulsepositive pulse0 VV MV M 90 %10 %t ft r t rt f 001aad983DUTV CCV CCV IV OR TR LS1C LopenGTable 10.Test dataTypeInput Load S1 position V It r , t f C LR L t PHL , t PLH t PZH , t PHZ t PZL , t PLZ 74HC2G125V CC ≤ 6ns 15 pF , 50 pF 1 k Ωopen GND V CC 74HCT2G1253V≤ 6ns15 pF , 50 pF1 k ΩopenGNDV CC13.Package outlineFig 9.Package outline SOT505-2 (TSSOP8)UNIT A 1A max.A 2A 3b p L H E L p w y v c e D (1)E (1)Z (1)θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.150.000.950.750.380.220.180.083.12.93.12.90.654.13.90.700.358°0°0.130.10.20.5DIMENSIONS (mm are the original dimensions)Note1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.0.470.33SOT505-2- - -02-01-16w Mb pD Ze0.251485θA 2A 1L p (A 3)detail XALH EE cv M AXAy2.5 5 mm0scaleTSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mmSOT505-21.1pin 1 indexFig 10.Package outline SOT765-1 (VSSOP8)UNIT A 1A max.A 2A 3b p L H E L p w y v c e D (1)E (2)Z (1)θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.150.000.850.600.270.170.230.082.11.92.42.20.53.23.00.40.18°0°0.130.10.20.4DIMENSIONS (mm are the original dimensions)Notes1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.0.400.15Q 0.210.19SOT765-1MO-18702-06-07w Mb pD Ze0.121485θA 2A 1QL p(A 3)detail XALH EE cv M AXAy2.5 5 mm0scaleVSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-11pin 1 indexFig 11.Package outline SOT996-2 (XSON8U)REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IEC JEDECJEITA SOT996-2- - -- - -SOT996-207-12-1807-12-21UNIT A max mm0.50.050.000.350.153.12.90.51.50.50.30.60.40.10.05A 1DIMENSIONS (mm are the original dimensions)XSON8U: plastic extremely thin small outline package; no leads;8 terminals; UTLP based; body 3 x 2 x 0.5 mm01 2 mmscaleb D 2.11.9E e e 1L L 10.150.05L 2v w 0.05y y 10.1CyCy 1Xb1485e 1e A C B v M CwM L 2L 1Lterminal 1index areaB AD E detail XAA 114.Abbreviations15.Revision historyTable 11.AbbreviationsAcronym DescriptionCMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MMMachine ModelTable 12.Revision historyDocument ID Release date Data sheet status Change notice Supersedes 74HC_HCT2G125_420080704Product data sheet-74HC_HCT2G125_3Modifications:•The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors.•Legal texts have been adapted to the new company name where appropriate.•Section 8: derating factor for TSSOP8, VSSOP8 and XSON8U package added •Added type numbers 74HC2G125GD and 74HCT2G125GD (XSON8U package)74HC_HCT2G125_320060102Product data sheet -74HC_HCT2G125_274HC_HCT2G125_220030303Product specification -74HC_HCT2G125_174HC_HCT2G125_120030131Product specification--16.Legal information16.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s)described in this document may have changed since this document was published and may differ in case of multiple devices.The latest product status information is available on the Internet at URL .16.2DefinitionsDraft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s)and title.A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.16.3DisclaimersGeneral —Information in this document is believed to be accurate andreliable.However,NXP Semiconductors does not give any representations or warranties,expressed or implied,as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and without notice.This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use —NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134)may cause permanent damage to the device.Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.Terms and conditions of sale —NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale,as published at /profile/terms , including those pertaining to warranty,intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant,conveyance or implication of any license under any copyrights,patents or other industrial or intellectual property rights.16.4TrademarksNotice:All referenced brands,product names,service names and trademarks are the property of their respective owners.17.Contact informationFor more information, please visit:For sales office addresses, please send an email to:salesaddresses@Document status [1][2]Product status [3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development.Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheetProductionThis document contains the product specification.18.Contents1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Ordering information. . . . . . . . . . . . . . . . . . . . . 14Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Functional diagram . . . . . . . . . . . . . . . . . . . . . . 26Pinning information. . . . . . . . . . . . . . . . . . . . . . 26.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 37Functional description . . . . . . . . . . . . . . . . . . . 38Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 39Recommended operating conditions. . . . . . . . 410Static characteristics. . . . . . . . . . . . . . . . . . . . . 411Dynamic characteristics . . . . . . . . . . . . . . . . . . 512Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 713Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 914Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 1215Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1216Legal information. . . . . . . . . . . . . . . . . . . . . . . 1316.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1316.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1316.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1316.4T rademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1317Contact information. . . . . . . . . . . . . . . . . . . . . 1318Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2008.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@Date of release: 4 July 2008。
74HC154中文资料_数据手册_参数
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
HHXXXXHHHHHHHHHH H H H H H H HL XXXXHHHHHHHHHH H H H H H H LHXXXXHHHHHHHHHH H H H H H H L L L L L L LHHHHHHHHH H H H H H H
HL L LHLHHHHHHHH H H H H H H LHL LHHLHHHHHHH H H H H H H HHL LHHHLHHHHHH H H H H H H L LHLHHHHLHHHHH H H H H H H HLHLHHHHHLHHHH H H H H H H LHHLHHHHHHLHHH H H H H H H HHHLHHHHHHHLHH H H H H H H L L LHHHHHHHHHLH H H H H H H HL LHHHHHHHHHHL H H H H H H LHLHHHHHHHHHHH L H H H H H HHLHHHHHHHHHHH H L H H H H L LHHHHHHHHHHHH H H L H H H HLHHHHHHHHHHHH H H H L H H LHHHHHHHHHHHHH H H H H L H HHHHHHHHHHHHHH H H H H H L
notes 1 and 2
TYPICAL
74HC154 74HCT154
11
13
3.5
3.5
74HC系列芯片资料
74HC00四2输入与非门 国际通用符号 54/7400 , 54/74H00, 54L 00 , 54/74S00 , 54/74LS0074LV00 , 74LVC0074HC02四2输入或非门 国际通用符号54/7402 , 54L 02 , 54/74S02 , 54/74LS02 , 54/74AS02 , 54/74ALS02 , 54/ 74F 02 , 54/74HC02 , 74AC 02 , 54/74HCT02 , 54/74ACT02 , 54/74AHC02 , 54/AHCT02 , 74LV02 , 74LVC0254/74HC00 , 54/ 74AC 00 , 54/74HCT00 54/74ACT00 , 54/74AHC0054/74AHCT00 ,54/74ALS00 , 54/ 74F 00 ,]Y 1A IB 2Y 2A 2B GND74HC04六反相器国际通用符号54/7404 , 54L 04 , 54/74H04 , 54/74S04 , 54/74LS04 , 54/74AS04 , 54/74ALS04 , 54/ 74F 04 , 54/74HCU04 , 54/74HC04 , 54/ 74AC 04 , 54/74HCT04 , 54/74ACT04 , 54/74AHC04 , 54/74AHCT04 , 74LV04 , 74LVC04 , 54/74AHCU04 , 74LVU04 , 74LVCU0474HC08四2输入与门国际通用符号54/7408 , 54/74S08 , 54/74LS08 , 54/74AS08 , 54/74ALS08 , 54/ 74F 08 , 54/74HC08 , 54/74HCT08 , 54/ 74AC08 , 54/74ACT08 , 54/74AHC08 , 54/74AHCT08 , 74LV08 , 74LVC08Y = AB74HC10三3输入与非门国际通用符号54/7410 , 54L 10 , 54/74H10 , 54/74S10 ,54/74LS10 54/74AS10 54/ 74F 10 , 54/74HC10 , 54/ 74AC 10 54/74HCT10 , 54/74ACT10 54/74ALS10 74LV101C 1Y 1C 3 日3A 3¥cP1A IB 2A 2B 2C 2Y GND 74HC20双4输入与非门国际通用符号54/7420 , 54L 20 , 54/74H20 , 54/74S20 54/ 74F 20 , 54/74HC20 , 54/ 74AC 20 ,,54/74LS20 , 54/74AS2054/74HCT20 , 54/74ACT2054/74ALS20¥ = ABCDO2YalrTHliTLir 4ID 1Y GNDV c< 2D 2C \C 2B 2A74HC30 8输入与非门国际通用符号54/7430 , 54L 30 , 54/74H30 , 54/74S30 ,54/74LS30 54/74AS30 54/74ALS30/ = ABCDEFGH.V<x NC H G NC MC Y7—L 1A B C D E F GND74HC32四2输入或门国际通用符号54/7432 , 54/74S32 , 54/74LS32 , 54/74AS32 , 54/74ALS32 , 54/ 74F 32 , 54/74HC32 ,54/ 74AC32 , 54/74HCT32, 54/74ACT32 , 54/74AHC32 , 54/74AHCT32 , 74LV32 , 74LVC32Y = A+BO74HC42 BCD —十进制译码器国际通用符号 54/ 7442A , 54L 42, 54/74LS42, 54/74HC42, 54/74HCT42十选一，在所有无效输入状态下，输出维持高电平。
74HC157中文资料
AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
SYMBOL PARAMETER
74HC
+25
−40 to +85
tPHL/ tPLH tPHL/ tPLH
propagation delay nI0 to nY; nI1 to nY
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard ICC category: MSI
Product specification
74HC/HCT157
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”. Output capability: standard ICC category: MSI
Fig.4 Functional diagram.
December 1990
Fig.5 Logic diagram. 4
元器件交易网
Philips Semiconductors
Quad 2-input multiplexer
Product specification
74HC/HCT157
Product specification
74HC/HCT157
TC74HC157AP_07资料
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC157AP,TC74HC157AF,TC74HC157AFNTC74HC158AP,TC74HC158AF,TC74HC158AFN TC74HC157AP/AF/AFN Quad 2-Channel MultiplexerTC74HC158AP/AF/AFN Quad 2-ChannelMultiplexer (inverting)The TC74HC157A and TC74HC158A are high speed CMOS2-CHANNEL MULTIPLEXERs fabricated with silicon gateC2MOS technology.They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.The TC74HC158A is an inverting multiplexer while theTC74HC157A is a non-inverting.When STROBE is held high, selection of data is inhibited and all the outputs become low in the case of HC157A or high in the case of HC158A.The SELECT decoding determines whether the A or B inputs get transferred to their corresponding Y (Y)outputs.All inputs are equipped with protection circuits against static discharge or transient excess voltage.Features•High speed: t pd = 10 ns (typ.) at V CC = 5 V•Low power dissipation: I CC = 4 μA (max) at Ta = 25°C •High noise immunity: V NIH = V NIL = 28% V CC (min) •Output drive capability: 10 LSTTL loads•Symmetrical output impedance: |I OH| = I OL = 4 mA (min)•Balanced propagation delays: tpLH∼ −t pHL•Wide operating voltage range: V CC (opr) = 2 to 6 V •Pin and function compatible with 74LS157/158 Note: xxxFN (JEDEC SOP) is not available in Japan.TC74HC157AP, TC74HC158APTC74HC157AF, TC74HC158AFTC74HC157AFN, TC74HC158AFNWeightDIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.)Pin AssignmentTC74HC157A TC74HC158AIEC Logic SymbolTC74HC157A TC74HC158ATruth TableX: Don’t careAbsolute Maximum Ratings (Note 1)Characteristics Symbol Rating Unit Supply voltage range V CC−0.5 to 7 VDC input voltage V IN−0.5 to V CC+ 0.5 VDC output voltage V OUT−0.5 to V CC+ 0.5 VInput diode current I IK±20 mA Output diode current I OK±20 mA DC output current I OUT±25 mA DC V CC/ground current I CC±50 mA Power dissipation P D500 (DIP) (Note 2)/180 (SOP) mWStorage temperature T stg−65 to 150 °CNote 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and thesignificant change in temperature, etc.) may cause this product to decrease in the reliability significantlyeven if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolutemaximum ratings and the operating ranges.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability testreport and estimated failure rate, etc).Note 2: 500 mW in the range of Ta =−40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C shall be applied until 300 mW.Operating Ranges (Note)Characteristics Symbol Rating Unit Supply voltage V CC 2 to 6 VInput voltage V IN0 to V CC VOutput voltage V OUT0 to V CC VOperating temperature T opr−40 to 85 °CInput rise and fall time t r, t f 0 to 1000 (V CC= 2.0 V)0 to 500 (V CC= 4.5 V)0 to 400 (V CC= 6.0 V)nsNote: The operating ranges must be maintained to ensure the normal operation of the device.Unused inputs must be tied to either VCC or GND.Electrical CharacteristicsDC CharacteristicsTest Condition Ta = 25°C Ta =−40 to 85°CCharacteristics SymbolV CC (V)Min Typ.Max Min Max UnitHigh-level input voltageV IH⎯2.04.5 6.0 1.503.154.20⎯ ⎯ ⎯ ⎯ ⎯ ⎯1.50 3.15 4.20 ⎯ ⎯ ⎯VLow-level input voltageV IL⎯ 2.04.5 6.0 ⎯ ⎯ ⎯⎯ ⎯ ⎯0.50 1.35 1.80 ⎯ ⎯ ⎯0.501.351.80VI OH = −20 μA2.04.5 6.0 1.9 4.45.9 2.0 4.56.0 ⎯ ⎯ ⎯1.9 4.4 5.9 ⎯ ⎯ ⎯ High-level output voltageV OHV IN= V IH or V ILI OH = −4 mA I OH = −5.2 mA4.5 6.0 4.185.68 4.315.80⎯ ⎯4.135.63 ⎯ ⎯VI OL = 20 μA2.04.5 6.0 ⎯ ⎯ ⎯ 0.0 0.0 0.0 0.1 0.1 0.1 ⎯ ⎯ ⎯ 0.1 0.1 0.1 Low-level output voltageV OLV IN= V IH or V ILI OL = 4 mA I OL = 5.2 mA4.5 6.0 ⎯ ⎯ 0.170.180.26 0.26 ⎯ ⎯ 0.330.33VInput leakage currentI IN V IN = V CC or GND 6.0 ⎯ ⎯±0.1⎯±1.0μA Quiescent supply currentI CCV IN = V CC or GND6.0⎯⎯ 4.0 ⎯ 40.0μAAC Characteristics (C L = 15 pF, V CC = 5 V, Ta = 25°C, input: t r = t f = 6 ns)AC Characteristics (C L= 50 pF, input: t r= t f= 6 ns)Note: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation:I CC (opr) = C PD･V CC･f IN+ I CC/4 (per bit)Weight: 1.00 g (typ.)Weight: 0.18 g (typ.)Package Dimensions (Note)Note: This package is not available in Japan. Weight: 0.13 g (typ.)RESTRICTIONS ON PRODUCT USE20070701-EN GENERAL •The information contained herein is subject to change without notice.•TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property.In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his document shall be made at the customer’s own risk.•The products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations.• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties.• Please contact your sales representative for product-by-product details in this document regarding RoHS compatibility. Please use these products in this document in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations.。
SN74LVC2G157_07中文资料
FEATURESDCT PACKAGE(TOP VIEW)YZP PACKAGE(BOTTOM VIEW)DCU PACKAGE(TOP VIEW)ABGNDBGNDV CCYYSee mechanical drawings for dimensions.YAA/BG DESCRIPTION/ORDERING INFORMATIONSN74LVC2G157SINGLE2-LINE TO1-LINE DATA SELECTOR/MULTIPLEXERSCES207K–APRIL1999–REVISED JANUARY2007•Available in the Texas Instruments•Typical V OHV(Output V OH Undershoot)NanoFree™Package>2V at VCC=3.3V,TA=25°C•Supports5-V V CC Operation•I off Supports Partial-Power-Down ModeOperation•Inputs Accept Voltages to5.5V•Latch-Up Performance Exceeds100mA Per •Max t pd of6ns at3.3VJESD78,Class II•Low Power Consumption,10-µA Max I CC•ESD Protection Exceeds JESD22•±24-mA Output Drive at3.3V–2000-V Human-Body Model(A114-A)•Typical V OLP(Output Ground Bounce)–1000-V Charged-Device Model(C101)<0.8V at VCC=3.3V,TA=25°CThis single2-line to1-line data selector/multiplexer is designed for1.65-V to5.5-V V CC operation.The SN74LVC2G157features a common strobe(G)input.When the strobe is high,Y is low and Y is high. When the strobe is low,a single bit is selected from one of two sources and is routed to the outputs.The device provides true and complementary data.NanoFree™package technology is a major breakthrough in IC packaging concepts,using the die as the package.This device is fully specified for partial-power-down applications using I off.The I off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.ORDERING INFORMATIONT A PACKAGE(1)ORDERABLE PART NUMBER TOP-SIDE MARKING(2)NanoFree™–WCSP(DSBGA)Reel of3000SN74LVC2G157YZPR___C3_0.23-mm Large Bump–YZP(Pb-free)SSOP–DCT Reel of3000SN74LVC2G157DCTR C57___–40°C to85°CReel of3000SN74LVC2G157DCURVSSOP–DCU C57_Reel of250SN74LVC2G157DCUT(1)Package drawings,standard packing quantities,thermal data,symbolization,and PCB design guidelines are available at/sc/package.(2)DCT:The actual top-side marking has three additional characters that designate the year,month,and assembly/test site.DCU:The actual top-side marking has one additional character that designates the assembly/test site.YZP:The actual top-side marking has three preceding characters to denote year,month,and sequence code,and one following character to designate the assembly/test site.Pin1identifier indicates solder-bump composition(1=SnPb,•=Pb-free).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.G A/BBAY YAbsolute Maximum Ratings (1)SN74LVC2G157SINGLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXERSCES207K–APRIL 1999–REVISED JANUARY 2007FUNCTION TABLEINPUTSOUTPUTSG A/B A B Y Y H X X X L H L L L X L H L L H X H L L H X L L H LHXHHLLOGIC DIAGRAM (POSITIVE LOGIC)over operating free-air temperature range (unless otherwise noted)MINMAX UNIT V CC Supply voltage range –0.5 6.5V V I Input voltage range (2)–0.5 6.5V V O Voltage range applied to any output in the high-impedance or power-off state (2)–0.5 6.5V V O Voltage range applied to any output in the high or low state (2)(3)–0.5V CC +0.5V I IK Input clamp current V I <0–50mA I OK Output clamp current V O <0–50mA I OContinuous output current±50mA Continuous current through V CC or GND±100mADCT package220θJA Package thermal impedance (4)DCU package 227°C/W YZP package102T stg Storage temperature range–65150°C (1)Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions"is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2)The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(3)The value of V CC is provided in the recommended operating conditions table.(4)The package thermal impedance is calculated in accordance with JESD 51-7.Recommended Operating Conditions(1)SN74LVC2G157SINGLE2-LINE TO1-LINE DATA SELECTOR/MULTIPLEXERSCES207K–APRIL1999–REVISED JANUARY2007MIN MAX UNITOperating 1.65 5.5V CC Supply voltage VData retention only 1.5V CC=1.65V to1.95V0.65×V CCV CC=2.3V to2.7V 1.7V IH High-level input voltage VV CC=3V to3.6V2V CC=4.5V to5.5V0.7×V CCV CC=1.65V to1.95V0.35×V CCV CC=2.3V to2.7V0.7V IL Low-level input voltage VV CC=3V to3.6V0.8V CC=4.5V to5.5V0.3×V CCV I Input voltage0 5.5VV O Output voltage0V CC VV CC=1.65V–4V CC=2.3V–8I OH High-level output current–16mAV CC=3V–24V CC=4.5V–32V CC=1.65V4V CC=2.3V8I OL Low-level output current16mAV CC=3V24V CC=4.5V32V CC=1.8V±0.15V,2.5V±0.2V20∆t/∆v Input transition rise or fall rate V CC=3.3V±0.3V10ns/VV CC=5V±0.5V5T A Operating free-air temperature–4085°C (1)All unused inputs of the device must be held at V CC or GND to ensure proper device operation.Refer to the TI application report,Implications of Slow or Floating CMOS Inputs,literature number SCBA004.Electrical CharacteristicsSwitching CharacteristicsOperating CharacteristicsSN74LVC2G157SINGLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXERSCES207K–APRIL 1999–REVISED JANUARY 2007over recommended operating free-air temperature range (unless otherwise noted)PARAMETERTEST CONDITIONSV CCMIN TYP (1)MAXUNITI OH =–100µA 1.65V to 5.5VV CC –0.1I OH =–4mA1.65V 1.2I OH =–8mA2.3V 1.9V OHVI OH =–16mA 2.43V I OH =–24mA 2.3I OH =–32mA 4.5V 3.8I OL =100µA 1.65V to 5.5V0.1I OL =4mA1.65V 0.45I OL =8mA2.3V 0.3V OLV I OL =16mA 0.43V I OL =24mA 0.55I OL =32mA4.5V 0.55A,B,orI I V I =5.5V or GND 0to 5.5V±5µA control inputsI off V I or V O =5.5V 0±10µA I CC V I =5.5V or GND,I O =01.65V to 5.5V 10µA ∆I CC One input at V CC –0.6V,Other inputs at V CC or GND3V to 5.5V 500µA C i V I =V CC or GND3.3V5pF (1)All typical values are at V CC =3.3V,T A =25°C.over recommended operating free-air temperature range (unless otherwise noted)(see Figure 1)V CC =1.8V V CC =2.5V V CC =3.3V V CC =5V FROM TO ±0.15V ±0.2V ±0.3V ±0.5V PARAMETERUNIT(INPUT)(OUTPUT)MIN MAX MIN MAXMIN MAXMIN MAXA or B4.414 2.1826 1.44t pdA/B Y or Y 4.916 2.59 2.16 1.64ns G4.214281.661.34T A =25°CV CC =1.8VV CC =2.5VV CC =3.3VV CC =5V PARAMETERTEST CONDITIONSUNIT TYP TYP TYP TYP C pdPower dissipation capacitancef =10MHz35353740pFPARAMETER MEASUREMENT INFORMATIONFrom OutputUnder Test(see NoteLOAD CIRCUITOpenData InputTiming Input0 V0 V0 VInput0 VInputOutputWaveform 1S1 at V(see Note B)LOADOutputWaveform 2S1 at GND(see Note B)VOLVOH0 V»0 V OutputOutputTEST S1t/tPLH PHLOpenOutputControl1.8 V0.15 V±2.5 V0.2 V±3.3 V0.3 V±5 V0.5 V±1 k W500W500W500WVCCRL2 ×VCC2 ×VCC6 V2 ×VCCVLOADCL30 pF30 pF50 pF50 pF0.15 V0.15 V0.3 V0.3 VVD3 VVIVCC/2VCC/21.5 VVCC/2VM£2 ns£2 ns£2.5 ns£2.5 nsINPUTSt/tr fVCCVCCVCCVLOADt/tPLZ PZLGNDt/tPHZ PZHVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESLOW-AND HIGH-LEVEL ENABLING VOLTAGE WAVEFORMSPROPAGATION DELAY TIMESINVERTING AND NONINVERTING OUTPUTSNOTES: A.C includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR10 MHz, Z= 50.D.The outputs are measured one at a time, with one transition per measurement.E.t and t are the same as t.F.t and t are the same as t.G.t and t are the same as t.H.All parameters and waveforms are not applicable to all devices.LOPLZ PHZ disPZL PZH enPLH PHL pd£WVOLTAGE WAVEFORMSPULSE DURATIONVOLTAGE WAVEFORMSSETUP AND HOLD TIMESVIVIVIV/2LOADVOLVOHVIVIVOHVOLSN74LVC2G157SINGLE2-LINE TO1-LINE DATA SELECTOR/MULTIPLEXERSCES207K–APRIL1999–REVISED JANUARY2007Figure1.Load Circuit and Voltage WaveformsPACKAGING INFORMATIONOrderable Device Status (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)74LVC2G157DCTRE4ACTIVE SM8DCT 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVC2G157DCURE4ACTIVE US8DCU 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVC2G157DCURG4ACTIVE US8DCU 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVC2G157DCUTE4ACTIVE US8DCU 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM 74LVC2G157DCUTG4ACTIVE US8DCU 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC2G157DCTR ACTIVE SM8DCT 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC2G157DCTRG4ACTIVE SM8DCT 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC2G157DCUR ACTIVE US8DCU 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC2G157DCUT ACTIVE US8DCU 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM SN74LVC2G157YZPRACTIVEWCSPYZP83000Green (RoHS &no Sb/Br)SNAGCULevel-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS),Pb-Free (RoHS Exempt),or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free productsare suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1)lead-based flip-chip solder bumps used between the die and package,or 2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free (RoHS compatible)as defined above.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.PACKAGE OPTION ADDENDUM6-Dec-2007TAPE AND REEL BOX INFORMATIONDevice Package Pins SiteReel Diameter (mm)Reel Width (mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74LVC2G157DCUR DCU 8SITE 351809 2.25 3.35 1.0548Q3SN74LVC2G157YZPRYZP8SITE 1218081.12.10.5648Q1Device Package Pins Site Length(mm)Width(mm)Height(mm) SN74LVC2G157DCUR DCU8SITE35202.0201.028.0SN74LVC2G157YZPR YZP8SITE12220.0220.00.0元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements, improvements,and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right,or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use anynon-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers AudioData Converters AutomotiveDSP BroadbandInterface Digital ControlLogic MilitaryPower Mgmt Optical NetworkingMicrocontrollers SecurityRFID TelephonyLow Power Video&ImagingWirelessWirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2007,Texas Instruments Incorporated。
NCP1579DR2G,NCP1579DR2G,NCP1579DR2G, 规格书,Datasheet 资料
NCP1579Low Voltage Synchronous Buck ControllerThe NCP1579 is a low cost PWM controller designed to operate from a 5 V or 12 V supply. This device is capable of producing an output voltage as low as 0.8 V. This 8−pin device provides an optimal level of integration to reduce size and cost of the power supply. The NCP1579 provides a 1 A gate driver design and an internally set 275 kHz oscillator. In addition to the 1 A gate drive capability, other efficiency enhancing features of the gate driver include adaptivenon−overlap circuitry. The device also incorporates an externally compensated error amplifier and a capacitor programmable soft−start function. Protection features include programmable short circuit protection and undervoltage lockout (UVLO). The NCP1579 comes in an 8−pin SOIC package.Features•Input V oltage Range from 4.5 to 13.2 V•275 kHz Internal Oscillator•Boost Pin Operates to 30 V•V oltage Mode PWM Control•0.8 V ±2.0 % Internal Reference V oltage•Adjustable Output V oltage•Capacitor Programmable Soft−Start•Internal 1 A Gate Drivers•80% Max Duty Cycle•Input Under V oltage Lockout•Programmable Current Limit•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS CompliantApplications•STB•Blue−Ray DVD•LCD_TV•DSP & FPGA Power Supply•DC−DC Regulator ModulesSOIC−8D SUFFIXCASE 751MARKING DIAGRAMPIN CONNECTIONS1579= Specific Device CodeA= Assembly LocationL= Wafer LotY= YearW= Work WeekG= Pb−Free DeviceBST PHASETGGNDBGCOMP/DISFBVCC(Top View)Device Package Shipping†ORDERING INFORMATIONNCP1579DR2G SOIC−8(Pb−Free)2500/T ape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.Figure 1. Typical Application DiagramsFigure 2. Detailed Block DiagramCCR setPIN FUNCTION DESCRIPTIONPin No.Symbol Description1BST Supply rail for the floating top gate driver. To form a boost circuit, use an external diode to bring thedesired input voltage to this pin (cathode connected to BST pin). Connect a capacitor (C BST) between this pinand the PHASE pin. Typical values for C BST range from 0.1 m F to 1 m F. Ensure that C BST is placed near the IC.2TG Top gate MOSFET driver pin. Connect this pin to the gate of the top N−Channel MOSFET.3GND IC ground reference. All control circuits are referenced to this pin.4BG Bottom gate MOSFET driver pin. Connect this pin to the gate of the bottom N−Channel MOSFET.5V CC Supply rail for the internal circuitry. Operating supply range is 4.5 V to 13.2 V. Decouple with a 1 m Fcapacitor to GND. Ensure that this decoupling capacitor is placed near the IC.6FB This pin is the inverting input to the error amplifier. Use this pin in conjunction with the COMP pin tocompensate the voltage−control feedback loop. Connect this pin to the output resistor divider (if used) or dir-ectly to V out.7COMP/DIS Compensation Pin. This is the output of the error amplifier (EA) and the non−inverting input of the PWM com-parator. Use this pin in conjunction with the FB pin to compensate the voltage−control feedback loop. The com-pensation capacitor also acts as a soft−start capacitor. Pull this pin low for disable.8PHASE Switch node pin. This is the reference for the floating top gate driver. Connect this pin to the source of the top MOSFET.ABSOLUTE MAXIMUM RATINGSPin Name Symbol V MAX V MINMain Supply Voltage Input V CC15 V−0.3 V Bootstrap Supply Voltage Input BST30 V wrt/GND15 V wrt/PHASE35 V wrt/GND for < 50ns−0.3 VSwitching Node (Bootstrap Supply Return)PHASE26 V−0.7 V−5.0 V for < 50 nsHigh−Side Driver Output (Top Gate)TG30 V wrt/GND15 V wrt/PHASE−0.3 V wrt/PHASELow−Side Driver Output (Bottom Gate)BG15 V−0.3 V−2.0 V for < 200 ns Feedback FB 5.5 V−0.3 VCOMP/DISABLE COMP/DIS 5.5 V−0.3 VMAXIMUM RATINGSRating Symbol Value Unit Thermal Resistance, Junction−to−Ambient R q JA165°C/W Thermal Resistance, Junction−to−Case R q JC45°C/W Operating Junction Temperature Range T J0 to 125°C Operating Ambient Temperature Range T A0 to 70°C Storage Temperature Range T stg−55 to +150°C Lead Temperature Soldering (10 sec): Reflow (SMD styles only) Pb−Free260°C Moisture Sensitivity Level MSL3−Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.ELECTRICAL CHARACTERISTICS (0_C < T A< 70_C; 4.5 V < V CC< 13.2 V, 4.5 V < [BST−PHASE]< 13.2 V, 4.5 V < BST < 30 V, 0 V < PHASE < 21 V, C TG= C BG= 1.0 nF, for min/max values unless otherwise noted.)Characteristic Conditions Min Typ Max Unit Input Voltage Range− 4.5−13.2V Boost Voltage Range− 4.5−26.5V Supply CurrentQuiescent Supply Current V FB = 1.0 V, No Switching, V CC= 13.2 V 1.0−8.0mA Boost Quiescent Current V FB = 1.0 V, No Switching, V CC = 13.2 V0.1− 1.0mA Under Voltage LockoutUVLO Threshold V CC Rising Edge 3.8− 4.2V UVLO Hysteresis−300370440mV Switching RegulatorVFB Feedback Voltage,Control Loop in RegulationT A = 0 to 70°C784800816mV Oscillator Frequency T A = 0 to 70°C233275317kHz Ramp−Amplitude Voltage0.8 1.1 1.4V Minimum Duty Cycle0−−% Maximum Duty Cycle707580% Error Amplifier (GM)Transconductance 3.0− 4.4mmho Open Loop DC Gain5570−DBOutput Source Current Output Sink Current V FB < 0.8 VV FB > 0.8 V8080120120−−m AInput Bias Current−0.1 1.0m A Soft−StartSS Source Current V FB < 0.8 V7.0−14m A Switch Over Threshold V FB = 0.8 V−100−% of Vref Gate DriversUpper Gate SourceV CC = 12 V, VTG = VBG = 2.0 V − 1.0−AUpper Gate Sink− 1.0−A Lower Gate Source− 1.0−A Lower Gate Sink− 2.0−A TG Falling to BG Rising Delay V CC = 12 V, TG < 2.0 V, BG > 2.0 V−4090ns BG Falling to TG Rising Delay V CC = 12 V, BG < 2.0 V, TG > 2.0 V−3590ns Enable Threshold0.30.40.5V Over−Current ProtectionOCSET Current Source Sourced from BG pin, before SS−10−m A OC Switch−Over Threshold−700−mV Fixed OC Threshold−−375−mVTYPICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)Figure 3. I CC vs. TemperatureFigure 4. Oscillator Frequency (F SW ) vs.TemperatureT J , JUNCTION TEMPERATURE (°C)T J , JUNCTION TEMPERATURE (°C)7060504030201003.53.84.14.44.75.0Figure 5. Soft Start Sourcing Current vs.TemperatureFigure 6. SCP Threshold vs. TemperatureT J , JUNCTION TEMPERATURE (°C)T J , JUNCTION TEMPERATURE (°C)706050403020100891011121314706050403020100325335345355365375Figure 7. Reference Voltage (V ref ) vs.TemperatureT J , JUNCTION TEMPERATURE (°C)70605040302010792794796800802804806808I C C (m A )F S W , F R E Q U E N C Y (K h z )S O F T S T A R T S O U R C I N G C U R R E N T (m A )S C P T H R E S H O L D (m V )V r e f , R E F E R E N C E (m V )798DETAILED OPERATING DESCRIPTIONGeneralThe NCP1579 is a PWM controller intended for DC −DC conversion from 5.0 V & 12 V buses. The devices have a 1A internal gate driver circuit designed to drive N −channel MOSFETs in a synchronous −rectifier buck topology. The output voltage of the converter can be precisely regulated down to 800 mV ±2.0% when the V FB pin is tied to V OUT .The switching frequency, is internally set to 275 kHz. A high gain operational transconductance error amplifier (OTA) is used.Duty Cycle and Maximum Pulse Width LimitsIn steady state DC operation, the duty cycle will stabilize at an operating point defined by the ratio of the input to the output voltage. The devices can achieve an 80% duty cycle.There is a built in off −time which ensures that the bootstrap supply is charged every cycle. Both parts can allow a 12 V to 0.8 V conversion at 275 kHz.Input Voltage Range (V CC and BST)The input voltage range for both V CC and BST is 4.5 V to 13.2V with respect to GND and PHASE, respectively.Although BST is rated at 13.2 V with respect to PHASE, it can also tolerate 26.4 V with respect to GND.External Enable/DisableWhen the Comp pin voltage falls or is pulled externally below the 400 mV threshold, it disables the PWM Logic and the gate drive outputs. In this disabled mode, the operational transconductance amplifier (EOTA) output source current is reduced and limited to the Soft −Start mode of 10 m A.Normal Shutdown BehaviorNormal shutdown occurs when the IC stops switching because the input supply reaches UVLO threshold. In this case, switching stops, the internal SS is discharged, and all GATE pins go low. The switch node enters a high impedance state and the output capacitors discharge through the load with no ringing on the output voltage.External Soft −StartThe NCP1579 features an external soft −start function,which reduces inrush current and overshoot of the output voltage. Soft −start is achieved by using the internal current source of 10 m A (typ), which charges the external integrator capacitor of the transconductance amplifier. Figure 8 is a typical soft −start sequence. This sequence begins once V CC surpasses its UVLO threshold and OCP programming is complete. During soft −start, as the Comp Pin rises through 400 mV , the PWM Logic and gate drives are enabled. When the feedback voltage crosses 800 mV , the EOTA will be given control to switch to its higher regulation mode output current of 120 m A.Figure 8. Soft −Start ImplementationV V VUVLOUndervoltage Lockout (UVLO) is provided to ensure that unexpected behavior does not occur when V CC is too low to support the internal rails and power the converter. For the NCP1579, the UVLO is set to permit operation when converting from a 5.0 input voltage.Overcurrent Threshold SettingNCP1579 can easily program an Overcurrent Threshold ranging from 50 mV to 550 mV, simply by adding a resistor (RSET) between BG and GND. During a short period of time following V CC rising over UVLO threshold, an internal 10 m A current (I OCSET) is sourced from BG pin, determining a voltage drop across R OCSET. This voltage drop will be sampled and internally held by the device as Overcurrent Threshold. The OC setting procedure overall time length is about 6 ms. Connecting a R OCSET resistor between BG and GND, the programmed threshold will be:I OCth+I OCSET@R OCSETR DS(on)(eq. 1)RSET values range from 5 k W to 55 k W. In case R OCSET is not connected, the device switches the OCP threshold to a fixed 375 mV value: an internal safety clamp on BG is triggered as soon as BG voltage reaches 700 mV, enabling the 375 mV fixed threshold and ending OC setting phase. The current trip threshold tolerance is ±25 mV. The accuracy of the set point is best at the highest set point (550 mV). The accuracy will decrease as the set point decreases. Current Limit ProtectionIn case of a short circuit or overload, the low−side (LS) FET will conduct large currents. The controller will shut down the regulator in this situation for protection against overcurrent. The low−side R DS(on) sense is implemented at the end of each of the LS−FET turn−on duration to sense the over current trip point. While the LS driver is on, the Phase voltage is compared to the internally generated OCP trip voltage. If the phase voltage is lower than OCP trip voltage, an overcurrent condition occurs and a counter is initiated. When the counter completes, the PWM logic and both HS−FET and LS−FET are turned off. The controller has to go through a Power On Reset (POR) cycle to reset the OCP fault.DriversThe NCP1579 includes gate drivers to switch external N−channel MOSFETs. This allows the devices to address high−power as well as low−power conversion requirements. The gate drivers also include adaptive non−overlap circuitry. The non−overlap circuitry increase efficiency, which minimizes power dissipation, by minimizing the body diode conduction time.A detailed block diagram of the non−overlap and gate drive circuitry used in the chip is shown in Figure 9.Figure 9. Block DiagramR set Careful selection and layout of external components is required, to realize the full benefit of the onboard drivers. The capacitors between V CC and GND and between BST and SWN must be placed as close as possible to the IC. The current paths for the TG and BG connections must be optimized. A ground plane should be placed on the closest layer for return currents to GND in order to reduce loop area and inductance in the gate drive circuit.APPLICATION SECTION Input Capacitor SelectionThe input capacitor has to sustain the ripple currentproduced during the on time of the upper MOSFET, so itmust have a low ESR to minimize the losses. The RMS valueof this ripple is:Iin RMS+I OUTǸ,where D is the duty cycle, Iin RMS is the input RMS current,& I OUT is the load current. The equation reaches itsmaximum value with D = 0.5. Loss in the input capacitorscan be calculated with the following equation:P CIN+ESR CIN Iin RMS2,where P CIN is the power loss in the input capacitors &ESR CIN is the effective series resistance of the input capacitance. Due to large dI/dt through the input capacitors,electrolytic or ceramics should be used. If a tantalum mustbe used, it must by surge protected. Otherwise, capacitorfailure could occur.Calculating Input Start-up CurrentTo calculate the input start up current, the followingequation can be used.I inrush+C OUT V OUTt SS,where I inrush is the input current during start-up, C OUT is the total output capacitance, V OUT is the desired output voltage, and t SS is the soft start interval.If the inrush current is higher than the steady state input current during max load, then the input fuse should be rated accordingly, if one is used.Calculating Soft Start TimeTo calculate the soft start time, the following equation can be used.t ss+(C p)C c)*D VI ssWhere C c is the compensation as well as the soft start capacitor,C p is the additional capacitor that forms the second pole.I ss is the soft start currentD V is the comp voltage from zero to until it reaches regulationVcompVoutThe above calculation includes the delay from comp rising to when output voltage starts becomes valid.To calculate the time of output voltage rising to when it reaches regulation; D V is the difference between the comp voltage reaching regulation and 0.88 V.Output Capacitor SelectionThe output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The controller immediately recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value.During a load step transient the output voltage initial drops due to the current variation inside the capacitor and the ESR. ((neglecting the effect of the effective series inductance (ESL)):D V OUT−ESR+D I OUT ESR COUTwhere V OUT-ESR is the voltage deviation of V OUT due to the effects of ESR and the ESR COUT is the total effective series resistance of the output capacitors.A minimum capacitor value is required to sustain the current during the load transient without discharging it. The voltage drop due to output capacitor discharge is given by the following equation:D V OUT−DISCHARGE+D I OUT2L OUT2C OUT(V IN D*V OUT), where V OUT-DISCHARGE is the voltage deviation of V OUT due to the effects of discharge, L OUT is the output inductor value & V IN is the input voltage.It should be noted that ΔV OUT-DISCHARGE and ΔV OUT-ESR are out of phase with each other, and the larger of these two voltages will determine the maximum deviation of the output voltage (neglecting the effect of the ESL). Inductor SelectionBoth mechanical and electrical considerations influence the selection of an output inductor. From a mechanical perspective, smaller inductor values generally correspond to smaller physical size. Since the inductor is often one of the largest components in the regulation system, a minimum inductor value is particularly important in space-constrained applications. From an electrical perspective, the maximum current slew rate through the output inductor for a buck regulator is given by:SlewRate LOUT+V IN*V OUTL OUTThis equation implies that larger inductor values limit the regulator’s ability to slew current through the output inductor in response to output load transients. Consequently, output capacitors must supply the load current until the inductor current reaches the output load current level. This results in larger values of output capacitance to maintaintight output voltage regulation. In contrast, smaller values of inductance increase the regulator’s maximum achievable slew rate and decrease the necessary capacitance, at the expense of higher ripple current. The peak-to-peak ripple current for NCP1579 is given by the following equation:Ipk *pk LOUT +V OUT (1*D)L OUT 275kHz,where Ipk-pk LOUT is the peak to peak current of the output.From this equation it is clear that the ripple current increases as L OUT decreases, emphasizing the trade-off between dynamic response and ripple current.Feedback and CompensationThe NCP1579 allows the output of the DC-DC converter to be adjusted from 0.8 V to 5.0 V via an external resistor divider network. The controller will try to maintain 0.8 V at the feedback pin. Thus, if a resistor divider circuit was placed across the feedback pin to V OUT , the controller will regulate the output voltage proportional to the resistordivider network in order to maintain 0.8 V at the FB pin.The relationship between the resistor divider network above and the output voltage is shown in the following equation:R 2+R 1ǒV REFV OUT *V REFǓResistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network, However the trade off is output voltage accuracy due to the bias current in the error amplifier. The output voltage error of this bias current can be estimated using the following equation (neglecting resistor tolerance):Error%+0.1m A R 1V REF100%Once R1 has been determined, R2 can be calculated.Figure 10. Type II Transconductance ErrorAmplifierC R Figure 10 shows a typical Type II transconductance error amplifier (EOTA). The compensation network consists of the internal error amplifier and the impedance networks ZIN (R 1, R 2) and external Z FB (R c , C c and C p ). The compensation network has to provide a closed loop transfer function with the highest 0 dB crossing frequency to have fast response (but always lower than F SW /8) and the highest gain in DC conditions to minimize the load regulation. A stable control loop has a gain crossing with -20 dB/decade slope and a phase margin greater than 45°. Include worst-case component variations when determining phase margin. Loop stability is defined by the compensation network around the EOTA, the output capacitor, output inductor and the output divider. Figure 11 shows the open loop and closed loop gain plots.Compensation Network Frequency:The inductor and capacitor form a double pole at the frequencyF LC +12p o oǸThe ESR of the output capacitor creates a “zero” at the frequency,F ESR +12p ESR C o The zero of the compensation network is formed as,F Z +12p R c C cThe pole of the compensation network is calculated as,F p +12p R c C pFigure 11. Gain Plot of the Error AmplifierThermal ConsiderationsThe power dissipation of the NCP1579 varies with the MOSFETs used, V CC , and the boost voltage (V BST ). The average MOSFET gate current typically dominates the control IC power dissipation. The IC power dissipation is determined by the formula:P IC +(I CC V CC ))P TG )P BGWhere:P IC = control IC power dissipation,I CC = IC measured supply current,V CC = IC supply voltage,P TG = top gate driver losses,P BG = bottom gate driver losses.The upper (switching) MOSFET gate driver losses are:P TG+Q TG f SW V BSTWhere:Q TG = total upper MOSFET gate charge at VBST,f SW = the switching frequency,V BST = the BST pin voltage.The lower (synchronous) MOSFET gate driver losses are:P BG+Q BG f SW V CCWhere:Q BG = total lower MOSFET gate charge at V CC.The junction temperature of the control IC can then be calculated as:T J+T A)P IC q JAWhere:T J = the junction temperature of the IC,T A = the ambient temperature,θJA = the junction−to−ambient thermal resistance of the IC package.The package thermal resistance can be obtained from the specifications section of this data sheet and a calculation can be made to determine the IC junction temperature. However, it should be noted that the physical layout of the board, the proximity of other heat sources such as MOSFETs and inductors, and the amount of metal connected to the IC, impact the temperature of the device. Use these calculations as a guide, but measurements should be taken in the actual application.Layout ConsiderationsAs in any high frequency switching converter, layout is very important. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. The critical components should be located as close together as possible using ground plane construction or single point grounding. The figure below shows the critical power components of the converter. To minimize the voltage overshoot the interconnecting wires indicated by heavy lines should be part of ground or power plane in a printed circuit board. The components shown in the figure below should be located as close together as possible. Please note that the capacitors C IN and C OUT each represent numerous physical capacitors. It is desirable to locate the NCP1579 within 1 inch of the MOSFETs, Q1 and Q2. The circuit traces for the MOSFETs’ gate and source connections from the NCP1579 must be sized to handle up to 2 A peak current.Figure 12. Components to be Considered forLayout SpecificationsNCP1579NCP1579PACKAGE DIMENSIONSSOIC −8D SUFFIX CASE 751−07ISSUE AJNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.6.751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.DIM A MIN MAX MIN MAX INCHES4.805.000.1890.197MILLIMETERS B 3.80 4.000.1500.157C 1.35 1.750.0530.069D 0.330.510.0130.020G 1.27 BSC 0.050 BSC H 0.100.250.0040.010J 0.190.250.0070.010K 0.40 1.270.0160.050M 0 8 0 8 N 0.250.500.0100.020S5.806.200.2280.244MYM0.25 (0.010)YM0.25 (0.010)Z SXS____0.6ǒmm inchesǓSCALE 6:1*For additional information on our Pb −Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
74HC138DR2G;74HC138DTR2G;中文规格书,Datasheet资料
16 1
16 1
MARKING DIAGRAMS
16
SOIC−16 D SUFFIX CASE 751B
HC138G AWLYWW
1
TSSOP−16 DT SUFFIX CASE 948F
16
HC 138 ALYW G
G
1
HC138 = Device Code
A
= Assembly Location
Standard No. 7A
• ESD Performance: HBM > 2000 V; Machine Model > 200 V • Chip Complexity: 100 FETs or 29 Equivalent Gates • These are Pb−Free Devices
Features
• Output Drive Capability: 10 LSTTL Loads • Outputs Directly Interface to CMOS, NMOS and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 mA • High Noise Immunity Characteristic of CMOS Devices • In Compliance with the Requirements Defined by JEDEC
level (e.g., either GND or VCC). Unused outputs must be left open.
TL Lead Temperature, 1 mm from Case for 10 SecSSOP Package)
MC74HC4851ADTR2G和MC74HC4852ADR2G 分析器 多路分析器说明书
MC74HC4851ADTR2G MC74HC4852ADR2GMC74HC4851A,MC74HC4852AAnalog Multiplexers/ Demultiplexers withInjection Current Effect ControlAutomotive CustomizedThese devices are pin compatible to standard HC405x and MC1405xB analog mux/demux devices, but feature injection current effect control. This makes them especially suited for usage in automotive applications where voltages in excess of normal logic voltage are common.The injection current effect control allows signals at disabled analog input channels to exceed the supply voltage range without affecting the signal of the enabled analog channel. This eliminates the need for external diode/resistor networks typically used to keep the analog channel signals within the supply voltage range.The devices utilize low power silicon gate CMOS technology. The Channel Select and Enable inputs are compatible with standard CMOS outputs.Features•Injection Current Cross−Coupling Less than 1mV/mA (See Figure 9)•Pin Compatible to HC405X and MC1405XB Devices •Power Supply Range (V CC − GND) = 2.0 to 6.0 V•In Compliance With the Requirements of JEDEC Standard No. 7A •Chip Complexity: 154 FETs or 36 Equivalent Gates•NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable•These Devices are Pb−Free, Halogen Free and are RoHS CompliantMARKING DIAGRAMSSOIC−16TSSOP−16116HC485xAGAWLYWWHC485xAALYW GG116x= 1 or 2A=Assembly LocationWL, L=Wafer LotYY, Y=YearWW, W=Work WeekG or G= Pb−Free PackageSOIC−16 WIDESee detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.ORDERING INFORMATIONSOIC−16D SUFFIXCASE 751BTSSOP−16DT SUFFIXCASE 948FSOIC−16 WIDEDW SUFFIXCASE 751G(Note: Microdot may be in either location)Figure 1. MC74HC4851A Logic Diagram Single−Pole, 8−Position Plus Common OffXANALOG INPUTS/CHANNEL INPUTS PIN 16 = V CC PIN 8 = GNDCOMMON OUTPUT/INPUT151614131211102134567V CC 98X2X1X0X3A B C X4X6XX7X5Enable NCGNDFigure 2. MC74HC4851A 16−Lead Pinout (Top View)OUTPUTS SELECTL L L L H H H H X L L H H L L H H X L H L H L H L H X FUNCTION TABLE − MC74HC4851AControl InputsON ChannelsEnable Select C B A X0X1X2X3X4X5X6X7NONE L L L L L L L L H Figure 3. MC74HC4852A Logic Diagram Double−Pole, 4−Position Plus Common OffXANALOGINPUTS/OUTPUTSCHANNEL‐SELECTINPUTSCC COMMONOUTPUTS/INPUTSL L H H XL H L H XFUNCTION TABLE − MC74HC4852AControl InputsON Channels EnableSelectB A X0X1X2X3L L L L H X = Don’t CareFigure 4. MC74HC4852A 16−Lead Pinout (Top View)151614131211102134567V CC98X2X1X X0X3A B Y0Y2YY3Y1Enable NCGNDYY0Y1Y2Y3NONEMAXIMUM RATINGSSymbol Parameter Value Unit V CC Positive DC Supply Voltage(Referenced to GND)–0.5 to +7.0V V in DC Input Voltage (Any Pin) (Referenced to GND)–0.5 to V CC + 0.5VI DC Current, Into or Out of Any Pin±25mAP D Power Dissipation in Still Air,SOIC Package†TSSOP Package†500450mWT stg Storage Temperature Range–65 to +150°CT L Lead Temperature, 1 mm from Case for 10 SecondsSOIC or TSSOP Package260°CStresses exceeding those listed in the Maximum Ratings table may damage the device. If any ofthese limits are exceeded, device functionality should not be assumed, damage may occur andreliability may be affected.†Derating:SOIC Package: –7 mW/°C from 65° to 125°CTSSOP Package: −6.1 mW/°C from 65° to 125°CRECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC Positive DC Supply Voltage(Referenced to GND) 2.0 6.0V V in DC Input Voltage (Any Pin)(Referenced to GND)GND V CC V V IO*Static or Dynamic Voltage Across Switch0.0 1.2V T A Operating Temperature Range, All Package Types–55+125°Ct r, t f Input Rise/Fall Time V CC = 2.0 V (Channel Select or Enable Inputs)V CC = 4.5 VV CC = 6.0 V 01000500400nsFunctional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.*For voltage drops across switch greater than 1.2 V (switch on), excessive V CC current may be drawn; i.e., the current out of the switch may contain both V CC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. DC CHARACTERISTICS—Digital Section (Voltages Referenced to GND) V EE = GND, Except Where NotedSymbol Parameter Condition V CCVGuaranteed LimitUnit −55 to 25°C≤85°C≤125°CV IH Minimum High−Level Input Voltage, Channel−Select or Enable Inputs R on = Per Spec 2.03.04.56.01.502.103.154.201.502.103.154.201.502.103.154.20VV IL Maximum Low−Level Input Voltage, Channel−Select or Enable Inputs R on = Per Spec 2.03.04.56.00.500.901.351.800.500.901.351.800.500.901.351.80VI in Maximum Input Leakage Current on Digital Pins(Enable/A/B/C)V in = V CC or GND 6.0±0.1±1.0±1.0m AI CC Maximum Quiescent Supply Current(per Package)V in(digital) = V CC or GNDV in(analog) = GND6.022040m AThis device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this high−impedance cir-cuit. For proper operation, V in andV out should be constrained to therange GND v (V in or V out) v V CC.Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or V CC).Unused outputs must be left open.DC CHARACTERISTICS— Analog SectionSymbol Parameter Condition V CCGuaranteed LimitUnit −55 to 25°C≤85°C≤125°CR on Maximum “ON” Resistance V in = V IL or V IH;V IS = V CC toGND; I S≤ 2.0 mA 2.03.04.56.0170011005504001750120065050018001300750600WD R on Delta “ON” Resistance V in = V IL or V IH; V IS = V CC/2I S≤ 2.0 mA 2.03.04.56.0300160806040020010080500240120100WI off Maximum Off−Channel Leakage Current,Any One ChannelCommon Channel V in = V CC or GND6.0±0.1±0.1±0.1±0.1±0.1±0.1m AI on Maximum On−Channel LeakageChannel−to−Channel V in = V CC or GND6.0±0.1±0.1±0.1m AAC CHARACTERISTICS(C L = 50 pF, Input t r = t f = 6 ns)Symbol Parameter V CC−55 to 25°C≤85°C≤125°C Unitt PHL, t PLH Maximum Propagation Delay, Analog Input to Analog Output 2.03.04.56.01608040301809045352001005040nst PHL, t PHZ,PZH t PLH, t PLZ,PZL Maximum Propagation Delay, Enable or Channel−Select to Analog Output 2.03.04.56.02601608078280180908030020010080nsC in Maximum Input Capacitance Digital Pins(All Switches Off)Any Single Analog Pin(All Switches Off)Common Analog Pin 103540103540103540pFC PD Power Dissipation Capacitance Typical 5.020pFINJECTION CURRENT COUPLING SPECIFICATIONS(V CC = 5V, T A = −55°C to +125°C)Symbol Parameter Condition Typ Max UnitV D out Maximum Shift of Output Voltage of Enabled Analog Channel I in* ≤ 1 mA, R S≤ 3,9 k WI in* ≤ 10 mA, R S≤ 3,9 k WI in* ≤ 1 mA, R S≤ 20 k WI in* ≤ 10 mA, R S≤ 20 k W 0.11.00.55.01.05.02.020mV* I in = Total current injected into all disabled channels.Figure 5. Typical On Resistance V CC = 2V Figure 6. Typical On Resistance V CC = 3VFigure 7. Typical On Resistance V CC = 4.5V Figure 8. Typical On Resistance V CC = 6VV in , INPUT VOLTAGE (VOLTS), REFERENCED TO GNDR o n , O N R E S I S T A N C E (O H M S)-55°C +25°C +125°CV in , INPUT VOLTAGE (VOLTS), REFERENCED TO GNDR o n , O N R E S I S T A N C E (O H M S )-55°C +25°C +125°CV in , INPUT VOLTAGE (VOLTS), REFERENCED TO GND R o n , O N R E S I S T A N C E (O H M S )-55°C +25°C +125°CV in , INPUT VOLTAGE (VOLTS), REFERENCED TO GNDR o n , O N R E S I S T A N C E (O H M S )-55°C +25°C +125°C110010009008007006005004003002001000110010009008007006005004003002001000660600540480420360300240180120600440400360320280240200160120804000.00.91.82.73.64.50.01.22.43.64.86.00.00.40.81.21.62.00.00.61.21.82.43.0GND or V SSW. External DC P.S.V CC = 5 VFigure 9. Injection Current Coupling SpecificationFigure 10. Actual TechnologyRequires 32 passive components and one extra 6V regulator to suppress injection current into a standard HC4051 multiplexerFigure 11. MC74HC4851A SolutionSolution by applying the HC4851A multiplexerFigure 12. On Resistance TestSet−UpFigure 13. Maximum Off Channel Leakage Current,Any One Channel, Test Set−UpV V V Figure 14. Maximum Off Channel Leakage Current,Common Channel, Test Set−UpV V V Figure 15. Maximum On Channel Leakage Current,Channel to Channel, Test Set−UpV V V N/CFigure 16. Propagation Delays, Channel Selectto Analog Out Figure 17. Propagation Delay, Test Set−Up ChannelSelect to Analog OutV CCGND t*Includes all probe and jig capacitanceTEST POINTFigure 18. Propagation Delays, Analog Into Analog Out Figure 19. Propagation Delay, Test Set−Up Analog In to Analog OutFigure 20. Propagation Delays, Enable toAnalog OutFigure 21. Propagation Delay, Test Set−UpEnable to Analog OutV CCGND*Includes all probe and jig capacitanceTESTPOINTVV CCGNDHIGHIMPEDANCEV OLV OHHIGHIMPEDANCETESTPOINTFigure 22. Power Dissipation Capacitance,Test Set−UpNCX0X1X2X3X4X5X6X7XABCENABLEFigure 23. Diagram of Bipolar Coupling MechanismAppears if V in exceeds V CC , driving injection current into the substrateFigure 24. Function Diagram, HC4851AGate = V CC V inAB ENABLE X0 X1 X2 X3Y0 Y1 Y2 Y3 X YORDERING INFORMATIONDevice Package Shipping†MC74HC4851ADGSOIC−16(Pb−Free)48 Units / RailMC74HC4851ADR2G2500 Units / Tape & Reel NLVHC4851ADR2G*2500 Units / Tape & ReelMC74HC4851ADTR2G TSSOP−16(Pb−Free)2500 Units / Tape & ReelNLVHC4851ADTR2G*2500 Units / Tape & Reel MC74HC4851ADWR2G SOIC−16 WIDE(Pb−Free)1000 Units / Tape & ReelMC74HC4852ADGSOIC−16(Pb−Free)48 Units / RailMC74HC4852ADR2G2500 Units / Tape & Reel NLV74HC4852ADR2G*2500 Units / Tape & ReelMC74HC4852ADTR2G TSSOP−16(Pb−Free)2500 Units / Tape & ReelNLVHC4852ADTR2G*2500 Units / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.TSSOP−16DT SUFFIX CASE 948F ISSUE BDIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.180.280.0070.011J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES: 1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982. 2.CONTROLLING DIMENSION: MILLIMETER. 3.DIMENSION A DOES NOT INCLUDE MOLD FLASH.PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4.DIMENSION B DOES NOT INCLUDE INTERLEADFLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5.DIMENSION K DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY. 7.DIMENSION A AND B ARE TO BE DETERMINED ATDATUM PLANE -W-.____16X REF 16X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOIC−16 WB DW SUFFIX CASE 751G−03ISSUE DPLANEqNOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL INEXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION.DIM MIN MAX MILLIMETERS A 2.35 2.65A10.100.25B 0.350.49C 0.230.32D 10.1510.45E 7.407.60e 1.27 BSC H 10.0510.55h 0.250.75L 0.500.90q 0 7 __DIMENSIONS: MILLIMETERSSOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOIC−16D SUFFIX NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.SBM0.25 (0.010)AST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.8010.000.3860.393B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2290.244R0.250.500.0100.019____*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*16X0.58DIMENSIONS: MILLIMETERSPUBLICATION ORDERING INFORMATIONON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.MC74HC4851ADTR2G MC74HC4852ADR2G。
74HC157中文资料
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL tPHL/ tPLH
CI CPD
PARAMETER
CONDITIONS
propagation delay nI0, nI1 to nY E to nY
CL = 15 pF; VCC = 5 V
The “157” is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S.
74HC/HCT157 Quad 2-input multiplexer
Product specification File under Integrated Circuits, IC06
December 1990
元器件交易网
Philips Semiconductors
Quad 2-input multiplexer
PIN DESCRIPTION
PIN NO. 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 8 15 16
SYMBOL
S 1I0 to 4I0 1I1 to 4I1 1Y to 4Y GND E VCC
NAME AND FUNCTION common data select input data inputs from source 0 data inputs from source 1 multiplexer outputs ground (0 V) enable input (active LOW) positive supply voltage
74HC2G04中文资料
Il
input leakage current
ICC
supply current
CI
input capacitance
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VI = VIH or VIL
IO = −20 µA; VCC = 2.0 V IO = −20 µA; VCC = 4.5 V IO = −20 µA; VCC = 6.0 V IO = −4.0 mA; VCC = 4.5 V IO = −5.2 mA; VCC = 6.0 V VI = VIH or VIL IO = 20 µA; VCC = 2.0 V IO = 20 µA; VCC = 4.5 V IO = 20 µA; VCC = 6.0 V IO = 4.0 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V VI = GND or VCC; VCC = 6.0 V VI = GND or VCC; IO = 0 A; VCC = 6.0 V
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74HC2G04GW
−40 °C to +125 °C SC-88
74HC2G04GV
−40 °C to +125 °C SC-74
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SC-88 and SC-74 packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
74LVC1G157单片2输入多路选择器产品数据手册说明书
74LVC1G157Single 2-input multiplexerRev. 9 — 8 October 2019Product data sheet1. General descriptionThe 74LVC1G157 is a single 2-input multiplexer which select data from two data inputs (I0 and I1)under control of a common data select input (S). The state of the common data select inputdetermines the particular register from which the data comes. The output (Y) presents the selecteddata in the true (non-inverted) form.Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devicesas translators in mixed 3.3 V and 5 V applications.This device is fully specified for partial power-down applications using I OFF. The I OFF circuitrydisables the output, preventing the damaging backflow current through the device when it ispowered down.Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise andfall times.2. Features and benefits•Wide supply voltage range from 1.65 V to 5.5 V•High noise immunity•Complies with JEDEC standard:•JESD8-7 (1.65 V to 1.95 V)•JESD8-5 (2.3 V to 2.7 V)•JESD8B/JESD36 (2.7 V to 3.6 V)•±24 mA output drive (V CC = 3.0 V)•CMOS low power consumption•Latch-up performance exceeds 250 mA•Direct interface with TTL levels•Inputs accept voltages up to 5 V•ESD protection:•HBM JESD22-A114F exceeds 2000 V•MM JESD22-A115-A exceeds 200 V•Multiple package options•Specified from -40 °C to +85 °C and -40 °C to +125 °C3. Ordering information4. Marking[1]The pin 1 indicator is located on the lower left corner of the device, below the marking code.5. Functional diagram6. Pinning information6.1. Pinning74LVC1G157I1SGND I0Y001aac6561236V CC54Fig. 5.Pin configuration SOT363 (SC-88) and SOT457 (SC-74)74LVC1G157GND 001aac657I1I0V CCSYT ransparent top view231546Fig. 6.Pin configuration SOT886 (XSON6)74LVC1G157GND 001aaf545I1I0V CC S YT ransparent top view231546Fig. 7.Pin configurationSOT891, SOT1115 and SOT1202 (XSON6)6.2. Pin description7. Functional descriptionTable 4. Function tableH = HIGH voltage level; L = LOW voltage level; X = don’t care.8. Limiting valuesTable 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).[1]The input and output voltage ratings may be exceeded if the input and output current ratings are observed.[2]For SOT363 (TSSOP6) packages: P tot derates linearly with 3.7 mW/K above 83 °C.For SOT457 (TSOP6) packages: P tot derates linearly with 4.1 mW/K above 89 °C.For SOT886 (XSON6) packages: P tot derates linearly with 3.3 mW/K above 74 °C.For SOT891 (XSON6) packages: P tot derates linearly with 3.3 mW/K above 74 °C.For SOT1115 (XSON6) packages: P tot derates linearly with 3.2 mW/K above 71 °C.For SOT1202 (XSON6) packages: P tot derates linearly with 3.3 mW/K above 74 °C.9. Recommended operating conditions10. Static characteristicsTable 7. Static characteristicsAt recommended operating conditions. Voltages are referenced to GND (ground = 0 V).[1]All typical values are measured at T amb = 25 °C.11. Dynamic characteristicsTable 8. Dynamic characteristicsVoltages are referenced to GND (ground = 0 V); for test circuit see Fig. 9.[1]Typical values are measured at T amb = 25 °C and V CC = 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.[2]t pd is the same as t PLH and t PHL.[3]C PD is used to determine the dynamic power dissipation (P D in μW).P D = C PD x V CC2 x f i x N + Σ(C L x V CC2 x f o) where:f i = input frequency in MHz;f o = output frequency in MHz;C L = output load capacitance in pF;V CC = supply voltage in Volts;N = number of inputs switching;Σ(C L x V CC2 x f o) = sum of the outputs.11.1. Waveforms and test circuit12. Package outline13. Abbreviations14. Revision history15. Legal informationData sheet status[1]Please consult the most recently issued document before initiating orcompleting a design.[2]The term 'short data sheet' is explained in section "Definitions".[3]The product status of device(s) described in this document may havechanged since this document was published and may differ in case ofmultiple devices. The latest product status information is available onthe internet at https://.DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet.DisclaimersLimited warranty and liability — Information in this document is believedto be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracyor completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia.In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia.Right to make changes — Nexperia reserves the right to make changesto information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunctionof an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitableand fit for the customer’s applications and products planned, as well asfor the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale — Nexperia products aresold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications.Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.Contents1. General description (1)2. Features and benefits (1)3. Ordering information (2)4. Marking (2)5. Functional diagram (2)6. Pinning information (3)6.1. Pinning (3)6.2. Pin description (3)7. Functional description (3)8. Limiting values (4)9. Recommended operating conditions (4)10. Static characteristics (5)11. Dynamic characteristics (6)11.1. Waveforms and test circuit (7)12. Package outline (8)13. Abbreviations (14)14. Revision history (14)15. Legal information (15)© Nexperia B.V. 2019. All rights reservedFor more information, please visit: Forsalesofficeaddresses,pleasesendanemailto:*************************** Date of release: 8 October 2019Mouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:N experia:74LVC1G157GS,13274LVC1G157GN,13274LVC1G157GF,13274LVC1G157GM,11574LVC1G157GM,132 74LVC1G157GV,12574LVC1G157GW,125。
[整理]74lsxxx系列芯片功能
![[整理]74lsxxx系列芯片功能](https://img.taocdn.com/s3/m/fa39d5c17c1cfad6185fa70c.png)
常见74系列逻辑电路7400 TTL 2输入端四与非门7401 TTL 集电极开路2输入端四与非门7402 TTL 2输入端四或非门7403 TTL 集电极开路2输入端四与非门7404 TTL 六反相器7405 TTL 集电极开路六反相器7406 TTL 集电极开路六反相高压驱动器7407 TTL 集电极开路六正相高压驱动器7408 TTL 2输入端四与门7409 TTL 集电极开路2输入端四与门7410 TTL 3输入端3与非门74107 TTL 带清除主从双J-K触发器74109 TTL 带预置清除正触发双J-K触发器7411 TTL 3输入端3与门74112 TTL 带预置清除负触发双J-K触发器7412 TTL 开路输出3输入端三与非门74121 TTL 单稳态多谐振荡器74122 TTL 可再触发单稳态多谐振荡器74123 TTL 双可再触发单稳态多谐振荡器74125 TTL 三态输出高有效四总线缓冲门74126 TTL 三态输出低有效四总线缓冲门7413 TTL 4输入端双与非施密特触发器74132 TTL 2输入端四与非施密特触发器74133 TTL 13输入端与非门74136 TTL 四异或门74138 TTL 3-8线译码器/复工器74139 TTL 双2-4线译码器/复工器7414 TTL 六反相施密特触发器74145 TTL BCD—十进制译码/驱动器7415 TTL 开路输出3输入端三与门74150 TTL 16选1数据选择/多路开关74151 TTL 8选1数据选择器74153 TTL 双4选1数据选择器74154 TTL 4线—16线译码器74155 TTL 图腾柱输出译码器/分配器74156 TTL 开路输出译码器/分配器74157 TTL 同相输出四2选1数据选择器74158 TTL 反相输出四2选1数据选择器7416 TTL 开路输出六反相缓冲/驱动器74160 TTL 可预置BCD异步清除计数器74161 TTL 可予制四位二进制异步清除计数器74162 TTL 可预置BCD同步清除计数器74163 TTL 可予制四位二进制同步清除计数器74164 TTL 八位串行入/并行输出移位寄存器74165 TTL 八位并行入/串行输出移位寄存器74166 TTL 八位并入/串出移位寄存器74169 TTL 二进制四位加/减同步计数器7417 TTL 开路输出六同相缓冲/驱动器74170 TTL 开路输出4×4寄存器堆74173 TTL 三态输出四位D型寄存器74174 TTL 带公共时钟和复位六D触发器74175 TTL 带公共时钟和复位四D触发器74180 TTL 9位奇数/偶数发生器/校验器74181 TTL 算术逻辑单元/函数发生器74185 TTL 二进制—BCD代码转换器74190 TTL BCD同步加/减计数器74191 TTL 二进制同步可逆计数器74192 TTL 可预置BCD双时钟可逆计数器74193 TTL 可预置四位二进制双时钟可逆计数器74194 TTL 四位双向通用移位寄存器74195 TTL 四位并行通道移位寄存器74196 TTL 十进制/二-十进制可预置计数锁存器74197 TTL 二进制可预置锁存器/计数器7420 TTL 4输入端双与非门7421 TTL 4输入端双与门7422 TTL 开路输出4输入端双与非门74221 TTL 双/单稳态多谐振荡器74240 TTL 八反相三态缓冲器/线驱动器74241 TTL 八同相三态缓冲器/线驱动器74243 TTL 四同相三态总线收发器74244 TTL 八同相三态缓冲器/线驱动器74245 TTL 八同相三态总线收发器74247 TTL BCD—7段15V输出译码/驱动器74248 TTL BCD—7段译码/升压输出驱动器74249 TTL BCD—7段译码/开路输出驱动器74251 TTL 三态输出8选1数据选择器/复工器74253 TTL 三态输出双4选1数据选择器/复工器74256 TTL 双四位可寻址锁存器74257 TTL 三态原码四2选1数据选择器/复工器74258 TTL 三态反码四2选1数据选择器/复工器74259 TTL 八位可寻址锁存器/3-8线译码器7426 TTL 2输入端高压接口四与非门74260 TTL 5输入端双或非门74266 TTL 2输入端四异或非门7427 TTL 3输入端三或非门74273 TTL 带公共时钟复位八D触发器74279 TTL 四图腾柱输出S-R锁存器7428 TTL 2输入端四或非门缓冲器74283 TTL 4位二进制全加器74290 TTL 二/五分频十进制计数器74293 TTL 二/八分频四位二进制计数器74295 TTL 四位双向通用移位寄存器74298 TTL 四2输入多路带存贮开关74299 TTL 三态输出八位通用移位寄存器7430 TTL 8输入端与非门7432 TTL 2输入端四或门74322 TTL 带符号扩展端八位移位寄存器74323 TTL 三态输出八位双向移位/存贮寄存器7433 TTL 开路输出2输入端四或非缓冲器74347 TTL BCD—7段译码器/驱动器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74352 TTL 双4选1数据选择器/复工器74353 TTL 三态输出双4选1数据选择器/复工器74365 TTL 门使能输入三态输出六同相线驱动器74366 TTL 门使能输入三态输出六反相线驱动器74367 TTL 4/2线使能输入三态六同相线驱动器74368 TTL 4/2线使能输入三态六反相线驱动器7437 TTL 开路输出2输入端四与非缓冲器74373 TTL 三态同相八D锁存器74374 TTL 三态反相八D锁存器74375 TTL 4位双稳态锁存器74377 TTL 单边输出公共使能八D锁存器74378 TTL 单边输出公共使能六D锁存器74379 TTL 双边输出公共使能四D锁存器7438 TTL 开路输出2输入端四与非缓冲器74380 TTL 多功能八进制寄存器7439 TTL 开路输出2输入端四与非缓冲器74390 TTL 双十进制计数器74393 TTL 双四位二进制计数器7440 TTL 4输入端双与非缓冲器7442 TTL BCD—十进制代码转换器74447 TTL BCD—7段译码器/驱动器7445 TTL BCD—十进制代码转换/驱动器74450 TTL 16:1多路转接复用器多工器74451 TTL 双8:1多路转接复用器多工器74453 TTL 四4:1多路转接复用器多工器7446 TTL BCD—7段低有效译码/驱动器74460 TTL 十位比较器74461 TTL 八进制计数器74465 TTL 三态同相2与使能端八总线缓冲器74466 TTL 三态反相2与使能八总线缓冲器74467 TTL 三态同相2使能端八总线缓冲器74468 TTL 三态反相2使能端八总线缓冲器74469 TTL 八位双向计数器7447 TTL BCD—7段高有效译码/驱动7448 TTL BCD—7段译码器/内部上拉输出驱动7449 TTL BCD—7段译码器/OC输出74490 TTL 双十进制计数器74491 TTL 十位计数器74498 TTL 八进制移位寄存器7450 TTL 2-3/2-2输入端双与或非门74502 TTL 八位逐次逼近寄存器74503 TTL 八位逐次逼近寄存器7451 TTL 2-3/2-2输入端双与或非门74533 TTL 三态反相八D锁存器74534 TTL 三态反相八D锁存器7454 TTL 四路输入与或非门74540 TTL 八位三态反相输出总线缓冲器7455 TTL 4输入端二路输入与或非门74563 TTL 八位三态反相输出触发器74564 TTL 八位三态反相输出D触发器74573 TTL 八位三态输出触发器74574 TTL 八位三态输出D触发器74645 TTL 三态输出八同相总线传送接收器74670 TTL 三态输出4×4寄存器堆7473 TTL 带清除负触发双J-K触发器7474 TTL 带置位复位正触发双D触发器7476 TTL 带预置清除双J-K触发器7483 TTL 四位二进制快速进位全加器7485 TTL 四位数字比较器7486 TTL 2输入端四异或门7490 TTL 可二/五分频十进制计数器7493 TTL 可二/八分频二进制计数器7495 TTL 四位并行输入\输出移位寄存器7497 TTL 6位同步二进制乘法器通用器件选购指南SN74S-X:高速逻辑门系列( TTL兼容)SN74S-X:高速逻辑门系列( TTL兼容)(续)SN74HCT-X:高速COMS逻辑门系列( TTL兼容)SN74LS-X:低功耗逻辑门系列( TTL兼容)/。
74HC1G00GW-R中文资料
VI < −0.5 V or VI > VCC + 0.5 V VO < −0.5 V or VO > VCC + 0.5 V −0.5 V < VO < VCC + 0.5 V
Tamb = −40 °C to +125 °C
−0.5 −25 −65 [2] -
+7.0
V
±20
mA
±20
mA
±12.5 mA
5.2
-
VOL
LOW-level output
VI = VIH or VIL
voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
-
0 0.1
-
0.1
-
0 0.1
-
0.1
-
0 0.1
-
0.1
IO = 2.0 mA; VCC = 4.5 V
Symbol Parameter
Conditions
Min
Max
Unit
VCC IIK IOK IO ICC IGND Tstg Ptot
supply voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation
-
1.0
ICC
supply current
VI = VCC or GND; IO = 0 A;
CY74FCT157ATDRE4,CY74FCT157CTDR,CY74FCT157CTDRE4,CY74FCT157ATDRG4, 规格书,Datasheet 资料
PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-9220803M2A ACTIVE LCCC FK201TBD POST-PLATE N/A for Pkg Type CY74FCT157ATD ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATDE4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATDG4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATDR ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATDRE4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATDRG4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATQCT ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157ATQCTE4ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157ATQCTG4ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157ATSOC ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATSOCE4ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157ATSOCG4ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTD ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTDE4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTDG4ACTIVE SOIC D1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTDR ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTDRE4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTDRG4ACTIVE SOIC D162500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTQCT ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157CTQCTE4ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157CTQCTG4ACTIVE SSOP/QSOP DBQ162500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARCY74FCT157CTSOC ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTSOCE4ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTSOCG4ACTIVE SOIC DW1640Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)CY74FCT157CTSOCT ACTIVE SOIC DW162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTSOCTE4ACTIVE SOIC DW162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMCY74FCT157CTSOCTG4ACTIVE SOIC DW162000Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.TAPE AND REEL INFORMATION*All dimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant CY74FCT157ATDR SOIC D 162500330.016.4 6.510.3 2.18.016.0Q1CY74FCT157CTDR SOIC D 162500330.016.4 6.510.3 2.18.016.0Q1CY74FCT157CTSOCTSOICDW162000330.016.410.7510.72.712.016.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) CY74FCT157ATDR SOIC D162500333.2345.928.6 CY74FCT157CTDR SOIC D162500333.2345.928.6CY74FCT157CTSOCT SOIC DW162000346.0346.033.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use any non-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAmplifiers AudioData Converters AutomotiveDLP®Products BroadbandDSP Digital ControlClocks and Timers MedicalInterface MilitaryLogic Optical NetworkingPower Mgmt SecurityMicrocontrollers TelephonyRFID Video&ImagingRF/IF and ZigBee®Solutions WirelessMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2009,Texas Instruments Incorporated芯天下--/。
SL74HCT157中文资料
SLS
System Logic Semiconductor
元器件交易网
SL74HCT157
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC Symbol Parameter Test Conditions V Guaranteed Limit 25 °C to -55°C 2.0 2.0 0.8 0.8 4.4 5.4 3.98 0.1 0.1 0.26 ±0.1 4.0 ≤85 °C 2.0 2.0 0.8 0.8 4.4 5.4 3.84 0.1 0.1 0.33 ±1.0 40 ≤125 °C 2.0 2.0 0.8 0.8 4.4 5.4 3.7 0.1 0.1 0.4 ±1.0 160 µA µA V Unit
X=don’t care A0-A3,B0-B3=the levels of the respective Data-Word Inputs
SLS
System Logபைடு நூலகம்c Semiconductor
元器件交易网
SL74HCT157
MAXIMUM RATINGS *
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±25 ±50 750 500 -65 to +150 260
Unit V V V mA mA mA mW °C °C
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C
74VHC157TTR资料
1/12November 2004s HIGH SPEED: t PD = 4.1 ns (TYP.) at V CC = 5V sLOW POWER DISSIPATION:I CC = 4 µA (MAX.) at T A =25°C sHIGH NOISE IMMUNITY:V NIH = V NIL = 28% V CC (MIN.)s POWER DOWN PROTECTION ON INPUTS sSYMMETRICAL OUTPUT IMPEDANCE:|I OH | = I OL = 8 mA (MIN)sBALANCED PROPAGATION DELAYS:t PLH ≅ t PHLsOPERATING VOLTAGE RANGE:V CC (OPR) = 2V to 5.5VsPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157s IMPROVED LATCH-UP IMMUNITY sLOW NOISE: V OLP = 0.8V (MAX.)DESCRIPTIONThe 74VHC157 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology.It consists of four 2-input digital multiplexer with common select and strobe inputs. It is a non-inverting multiplexer. When the STROBEinput is held high selection of data is inhibited and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs.Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.74VHC157QUAD 2 CHANNEL MULTIPLEXERFigure 1: Pin Connection And IEC Logic SymbolsTable 1: Order CodesPACKAGE T & R SOP 74VHC157MTR TSSOP74VHC157TTR74VHC1572/12Figure 2: Input Equivalent CircuitTable 2: Pin DescriptionTable 3: Truth TableX : Don’t careFigure 3: Logic DiagramPIN N°SYMBOL NAME AND FUNCTION 1SELECT Common Data Select Inputs2, 5, 11, 141A to 4A Data Inputs From Source A3, 6, 10, 131B to 4B Data Inputs From Source B4, 7, 9, 121Y to 4Y Multiplexer Outputs 15STROBE Strobe Input 8GND Ground (0V)16V CCPositive Supply VoltageINPUTSOUTPUTSTROBESELECTA B Y H X X X L L L L X L L L H X H L H X L L LHXHH74VHC1573/12Table 4: Absolute Maximum RatingsAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not impliedTable 5: Recommended Operating Conditions1) V IN from 30% to 70% of V CCSymbol ParameterValue Unit V CC Supply Voltage -0.5 to +7.0V V I DC Input Voltage -0.5 to +7.0V V O DC Output Voltage -0.5 to V CC + 0.5V I IK DC Input Diode Current - 20mA I OK DC Output Diode Current ± 20mA I O DC Output Current ± 25mA I CC or I GND DC V CC or Ground Current± 50mA T stg Storage Temperature -65 to +150°C T LLead Temperature (10 sec)300°CSymbol ParameterValue Unit V CC Supply Voltage 2 to 5.5V V I Input Voltage 0 to 5.5V V O Output Voltage 0 to V CC V T op Operating Temperature-55 to 125°C dt/dvInput Rise and Fall Time (note 1) (V CC = 3.3 ± 0.3V) (V CC = 5.0 ± 0.5V)0 to 1000 to 20ns/V74VHC1574/12Table 6: DC SpecificationsTable 7: AC Electrical Characteristics (Input t r = t f = 3ns)(*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5VSymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V IHHigh Level Input Voltage2.0 1.5 1.5 1.5V3.0 to 5.50.7V CC0.7V CC0.7V CCV ILLow Level Input Voltage2.00.50.50.5V3.0 to 5.50.3V CC0.3V CC0.3V CCV OHHigh Level Output Voltage2.0I O =-50 µA 1.9 2.0 1.9 1.9V3.0I O =-50 µA 2.9 3.0 2.9 2.94.5I O =-50 µA 4.4 4.54.4 4.43.0I O =-4 mA 2.58 2.48 2.44.5I O =-8 mA 3.943.83.7V OLLow Level Output Voltage2.0I O =50 µA 0.00.10.10.1V3.0I O =50 µA 0.00.10.10.14.5I O =50 µA 0.00.10.10.13.0I O =4 mA 0.360.440.554.5I O =8 mA 0.360.440.55I I Input Leakage Current0 to 5.5V I = 5.5V or GND ± 0.1± 1± 1µA I CCQuiescent Supply Current5.5V I = V CC or GND44040µA SymbolParameterTest ConditionValue UnitV CC (V)C L (pF)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.t PLH t PHLPropagation Delay TimeA, B to Y3.3(*)15 6.29.7 1.011.5 1.011.5ns 3.3(*)508.713.2 1.015.0 1.015.05.0(**)15 4.1 6.4 1.07.5 1.07.55.0(**)50 5.68.4 1.09.5 1.09.5t PLH t PHLPropagation Delay Time SELECT to Y3.3(*)158.413.2 1.015.5 1.015.5ns 3.3(*)5010.916.7 1.019.0 1.019.05.0(**)15 5.38.1 1.09.5 1.09.55.0(**)50 6.810.1 1.011.5 1.011.5t PLH t PHLPropagation Delay Time STROBE to Y3.3(*)158.713.6 1.016.0 1.016.0ns 3.3(*)5011.217.1 1.019.5 1.019.55.0(**)15 5.68.6 1.010.0 1.010.05.0(**)507.110.61.012.01.012.074VHC1575/12Table 8: Capacitive Characteristics1) C PD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I CC(opr) = C PD x V CC x f IN + I CC /4 (per channel)Table 9: Dynamic Switching Characteristics1) Worst case package.2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V ILD ), 0V to threshold (V IHD ), f=1MHz.Figure 4: Test CircuitC L =15/50pF or equivalent (includes jig and probe capacitance)R T = Z OUT of pulse generator (typically 50Ω)SymbolParameterTest ConditionValue UnitT A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.C IN Input Capacitance 6101010pF C PDPower Dissipation Capacitance (note 1)18pF SymbolParameterTest ConditionValue UnitV CC (V)T A = 25°C -40 to 85°C -55 to 125°C Min.Typ.Max.Min.Max.Min.Max.V OLP Dynamic Low Voltage Quiet Output (note 1, 2) 5.0C L = 50 pF0.30.8V V OLV -0.8-0.3V IHDDynamic High Voltage Input (note 1, 3) 5.0 3.5VV ILDDynamic Low Voltage Input (note 1, 3)5.0 1.5V74VHC157Figure 5: Waveform - Propagation Delays For Inverting ConditionsFigure 6: Waveform - Propagation Delays For Non-inverting Conditions6/1274VHC1577/12DIM.mm.inch MIN.TYPMAX.MIN.TYP.MAX.A 1.750.068a10.10.250.0040.010a2 1.640.063b 0.350.460.0130.018b10.190.250.0070.010C 0.50.019c145° (typ.)D 9.8100.3850.393E 5.86.20.2280.244e 1.270.050e38.890.350F 3.8 4.00.1490.157G 4.6 5.30.1810.208L 0.5 1.270.0190.050M 0.620.024S8° (max.)SO-16 MECHANICAL DATA0016020D74VHC1578/12DIM.mm.inchMIN.TYPMAX.MIN.TYP.MAX.A 1.20.047A10.050.150.0020.0040.006A20.81 1.050.0310.0390.041b 0.190.300.0070.012c 0.090.200.0040.0079D 4.95 5.10.1930.1970.201E 6.2 6.4 6.60.2440.2520.260E1 4.34.4 4.480.1690.1730.176e 0.65 BSC0.0256 BSCK 0˚8˚0˚8˚L0.450.600.750.0180.0240.030TSSOP16 MECHANICAL DATAcEbA2A E1D1PIN 1 IDENTIFICATIONA1LKe0080338D74VHC157 Tape & Reel SO-16 MECHANICAL DATAmm.inchDIM.MIN.TYP MAX.MIN.TYP.MAX.A33012.992C12.813.20.5040.519D20.20.795N60 2.362T22.40.882Ao 6.45 6.650.2540.262Bo10.310.50.4060.414Ko 2.1 2.30.0820.090Po 3.9 4.10.1530.161P7.98.10.3110.3199/1274VHC157Tape & Reel TSSOP16 MECHANICAL DATAmm.inch DIM.MIN.TYP MAX.MIN.TYP.MAX.A33012.992 C12.813.20.5040.519 D20.20.795N60 2.362T22.40.882 Ao 6.7 6.90.2640.272 Bo 5.3 5.50.2090.217 Ko 1.6 1.80.0630.071 Po 3.9 4.10.1530.161 P7.98.10.3110.31910/1274VHC157 Table 10: Revision HistoryDate Revision Description of Changes 12-Nov-20044Order Codes Revision - pag. 1.11/1274VHC157Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronicsAll other names are the property of their respective owners© 2004 STMicroelectronics - All Rights ReservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America12/12。
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
74HCT157Quad 2−Input Data Selectors / MultiplexersHigh−Performance Silicon−Gate CMOSThe 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninverted form. A high level on the Output Enable input sets all four Y outputs to a low level.Features•Output Drive Capability: 10 LSTTL Loads•TTL/NMOS−Compatible Input Levels•Outputs Directly Interface to CMOS, NMOS, and TTL •Operating V oltage Range: 4.5 to 5.5 V•Low Input Current: 1.0 m A•High Noise Immunity Characteristic of CMOS Devices•In Compliance with the Requirements Defined by JEDEC Standard No. 7A•ESD Performance: HBM > 2000 V; Machine Model > 200 V •Chip Complexity: 82 FETs or 20.5 Equivalent Gates•These are Pb−Free DevicesMARKINGDIAGRAMSSOIC−16D SUFFIXCASE 751BTSSOP−16DT SUFFIXCASE 948F116HCT157GAWLYWWHCT157ALYW GG11674HCT157= Device CodeA= Assembly LocationL, WL= Wafer LotY= YearW, WW= Work WeekG or G= Pb−Free PackageSee detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATION(Note: Microdot may be in either location)DATAOUTPUTSNIBBLEA INPUTSNIBBLEPIN 16 = V CCPIN 8 = GNDFUNCTION TABLEInputsOutput OutputsEnable Select Y0 − Y3X = don’t careA0 − A3, B0 − B3 = the levels of therespective Data−Word Inputs.HLLXLHLA0−A3B0−B3Figure 1. Pin AssignmentSELECTY0B0A0Y1B1A1GNDY3B3A3OUTPUTENABLEV CCB2A2Y2Figure 2. Logic DiagramORDERING INFORMATIONDevice Package Shipping†74HCT157DR2G SOIC−16(Pb−Free)2500 Units / Reel 74HCT157DTR2G TSSOP−16*2500 Units / Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.MAXIMUM RATINGSSymbol ParameterValue Unit V CC DC Supply Voltage (Referenced to GND)– 0.5 to + 7.0V V in DC Input Voltage (Referenced to GND)– 0.5 to V CC + 0.5V V out DC Output Voltage (Referenced to GND)– 0.5 to V CC + 0.5V I in DC Input Current, per Pin ±20mA I out DC Output Current, per Pin±25mA I CC DC Supply Current, V CC and GND Pins ±50mA P D Power Dissipation in Still Air,SOIC Package†TSSOP Package†500450mW T stg Storage Temperature– 65 to + 150_C T LLead Temperature, 1 mm from Case for 10 Seconds(SOIC or TSSOP Package)260_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied.Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.†Derating —SOIC Package: – 7 mW/_C from 65_ to 125_CTSSOP Package: − 6.1 mW/_C from 65_ to 125_CFor high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High −Speed CMOS Data Book (DL129/D).RECOMMENDED OPERATING CONDITIONSSymbol ParameterMin Max Unit V CC DC Supply Voltage (Referenced to GND) 4.5 5.5V V in , V outDC Input Voltage, Output Voltage (Referenced to GND)0V CC V T A Operating Temperature, All Package Types – 55+ 125_C t r , t fInput Rise and Fall Time V CC = 2.0 V (Figure 1)V CC = 4.5 V V CC = 6.0 V0001000500400nsDC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)V CC (V)Guaranteed LimitSymbol ParameterCondition−55 to 25°C≤85°C ≤125°C Unit V IH Minimum High −Level Input Voltage V out = 0.1V |I out | ≤ 20m A 4.55.5 2.02.0 2.02.0 2.02.0V V IL Maximum Low −Level Input Voltage V out = V CC − 0.1V |I out | ≤ 20m A 4.55.50.80.80.80.80.80.8V V OHMinimum High −Level Output VoltageV in = V IL |I out | ≤ 20m A 4.55.5 4.45.4 4.45.4 4.45.4VV in = V IL|I out | ≤ 4.0mA4.5 3.98 3.84 3.70V OLMaximum Low −Level Output VoltageV in = V IH |I out | ≤ 20m A 4.55.50.10.10.10.10.10.1V V in = V IH|I out | ≤ 4.0mA 4.50.260.330.40I in Maximum Input Leakage Current V in = V CC or GND 5.5±0.1±1.0±1.0m A I CCMaximum Quiescent Supply Current (per Package)V in = V CC or GND I out = 0m A5.54.04040m A D I CCAdditional Quiescent Supply CurrentV in = 2.4V, Any One InputV in = V CC or GND, Other Inputs I out = 0m A5.5≥ −55°C25 to 125°CmA2.92.4rmation on typical parametric values can be found in Chapter 2 of the ON Semiconductor High −Speed CMOS Data Book (DL129/D).2.Total Supply Current = I CC + ΣD I CC .This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high −impedance cir-cuit. For proper operation, V in and V out should be constrained to the range GND v (V in or V out ) v V CC .Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ).Unused outputs must be left open.AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6.0 ns)Symbol Parameter V CC(V)Guaranteed LimitUnit – 55 to25_C v85_C v 125_Ct PLH, t PHL Maximum Propagation Delay, Input A or B to Output Y(Figures 1 and 4)4.5212632nst PLH, t PHL Maximum Propagation Delay, Select to Output Y(Figures 2 and 4)4.5222833nst PLH, t PHL Maximum Propagation Delay, Output Enable to Output Y(Figures 3 and 4)4.5202530nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 4)4.5151922nsC in Maximum Input Capacitance−101010pF NOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).C PD Power Dissipation Capacitance (Per Package)*Typical @ 25°C, V CC = 5.0 VpF33*Used to determine the no−load dynamic power consumption: P D = C PD V CC2f + I CC V CC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).PIN DESCRIPTIONSINPUTSA0, A1, A2, A3 (Pins 2, 5, 11, 14)Nibble A inputs. The data present on these pins is transferred to the outputs when the Select input is at a low level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.B0, B1, B2, B3 (Pins 3, 6, 10, 13)Nibble B inputs. The data present on these pins is transferred to the outputs when the Select input is at a high level and the Output Enable input is at a low level. The data is presented to the outputs in noninverted form.OUTPUTSY0, Y1, Y2, Y3 (Pins 4, 7, 9, 12)Data outputs. The selected input Nibble is presented at these outputs when the Output Enable input is at a low level.The data present on these pins is in its noninverted form. For the Output Enable input at a high level, the outputs are at a low level.CONTROL INPUTS Select (Pin 1)Nibble select. This input determines the data word to be transferred to the outputs. A low level on this input selects the A inputs and a high level selects the B inputs.Output Enable (Pin 15)Output Enable input. A low level on this input allows the selected input data to be presented at the outputs. A high level on this input sets all outputs to a low level.SWITCHING WAVEFORMS*Includes all probe and jig capacitanceC L *V CCGNDFigure 5. HCT157Figure 6. Test CircuitEXPANDED LOGIC DIAGRAMA0B0A1B1A2B2A3B3Y0Y1Y2Y3OUTPUT ENABLESELECTDATA OUTPUTSNIBBLE OUTPUTSSOIC −16CASE 751B −05ISSUE KNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.SBM0.25 (0.010)AST DIM MIN MAX MIN MAX INCHESMILLIMETERS A 9.8010.000.3860.393B 3.80 4.000.1500.157C 1.35 1.750.0540.068D 0.350.490.0140.019F 0.40 1.250.0160.049G 1.27 BSC 0.050 BSC J 0.190.250.0080.009K 0.100.250.0040.009M 0 7 0 7 P 5.80 6.200.2290.244R0.250.500.0100.019____16X0.58SOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.TSSOP −16CASE 948F −01ISSUE BDIM MIN MAX MIN MAX INCHESMILLIMETERS A 4.90 5.100.1930.200B 4.30 4.500.1690.177C −−− 1.20−−−0.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.180.280.0070.011J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M0 8 0 8 NOTES:DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.CONTROLLING DIMENSION: MILLIMETER.DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS.MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.____*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。