格雷：模拟集成电路课件2-3

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《模拟集成电路》课件

，以便对设计的电路进行全面的测试和评估。
PART 05
模拟集成电路的制造工艺
REPORTING
半导体材料
硅材料
硅是最常用的半导体材料，具有稳定的物理和化学性质，成熟的制造工艺以及低成本等优点。
化合物半导体
如砷化镓、磷化铟等化合物半导体材料，具有高电子迁移率、宽禁带等特点，常用于高速、高频和高温电子器件。
《模拟集成电路》课件
REPORTING
• 模拟集成电路概述 • 模拟集成电路的基本元件 • 模拟集成电路的分析方法 • 模拟集成电路的设计流程 • 模拟集成电路的制造工艺 • 模拟集成电路的优化与改进
目录
PART 01
模拟集成电路概述
REPORTING
定义与特点
定义
模拟集成电路是指由电阻、电容、电感、晶体管等电子元件按一定电路拓扑连接在一起，实现模拟信号处理功能的集成电路。
围和失真。
信号分析方法
01
02
03
04
频域分析
将时域信号转换为频域信号，分析信号的频率成分和频谱特
性。
时域分析
研究信号的幅度、相位、频率和时间变化特性，分析信号的
波形和特征参数。
调制解调分析
研究信号的调制与解调过程，分析信号的调制特性、解调失
真等。
非线性分析
研究电路的非线性效应，分析信号的非线性失真和互调失真
音频领域
模拟集成电路在音频领域中主要用于音频信号的放大、滤波、音效处理等功能，如音响设备、耳机等产品中的模拟集成电路。
模拟集成电路的发展趋势
集成度不断提高
随着半导体工艺的不断发展，模拟集成电路的集成度不断提高，能够实现更加复杂的模拟信号处

格雷：模拟集成电路课件3-1

Chapter3Single-Transistor and Multiple-Transistor Amplifiers---Single-Transistor Amplifiers---Two-Transistor BJT Amplifier---Two-Transistor MOSFET Amplifier---Differential AmplifiersQuestions--Why we need to learn amplifiers?--What is amplifiers?--What will we learn about amplifiers? --How to learn?mv ，µvAmplifier is a key circuitWe need amplifiers*Microphone*Communications-Wireless -Optical-fiber *Disk Drive Electronics *Processing of Natural *Signals-SensorsWhat is amplifiers?What will we learn about amplifiers?*Basic configurations of amp.*The main characteristics of amp. we care*How to analyze & design amp.--Signal:Large Signal, Small Signal(*)--Model:LSM, SSM(*), Two-Port Model--Parameter:Device parameter:β, g m, rπ, r o(r ds), Cµ, CπCircuit parameter: R in, R out, A V,Frequency characteristics:ωL,ωH,ωT; f L, f H, f TGain, speed, power dissipation, noise,…22212122121111i g v g v i g v g i +=+=22212122121111v h i h i v h i h v +=+=22212122121111v y v y i v y v y i +=+=22212122121111i z i z v i z i z v +=+=g-parameter------voltage amplifier;h -parameter------current amplifier (hybrid);y-parameter------feedback amplifier (admittance); z-parameter------feedback amplifier (impedance).How to learn?--Distinguishdifferentcharacteristics ofdifferent amp.--Different design thought betweenIC circuits designand discreteelements circuitsdesign--Notice operation conditionsActive LoadtWLR ρ=19500001.00001.09500=Ω⋅==cm cm Rt WL ρ52.31=⎟⎠⎞⎜⎝⎛L L W 03.91 =⎟⎠⎞⎜⎝⎛L L WAnalog design octagonNoisePowerDissipationInput/Output ImpedanceSpeedVoltage SwingSupply VoltageGainLinearityIntuitionExperienceBasic Single-Transistor Amplifiers Outline---Characterizing an amplifier---BJT Single transistor amplifiers---MOS Single transistor amplifiers---Amplifiers with emitter/source degenerationCharacterization of AmplifiersAmplifiers will be characterized by the following properties•Large-signal voltage transfer characteristics (.DC)•Large-signal voltage swing limitations (.DC and .TRAN)•Small-signal, frequency independent performance (.TF)•Gain (.TF)•Input resistance (.TF)•Output resistance (.TF)•Small-signal, frequency response (.AC)•Noise (.NOISE)•Power dissipation (.OP)•Slew rate (.TRAN)Types of Single Transistor AmplifiersTypes of Single Transistor Amplifiers⎥⎦⎤⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛==T BE FO S F CB V v I i i exp ββ⎥⎦⎤⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛=T BE F S E V v I i exp α⎥⎦⎤⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛=TBES C Vv I i exp Signal Flow in TransistorsBo C I I β=CC CC CE R I V V ⋅−=Large-Signal:),(CE C V I Q Common Emitter AmplifierTCm V I g =CAo I V r =moin g r R βπ==Co out R r R //=)//(C o m inoutV R r g v v A −==Co oo C C o m in C out in out I R r r R r R r g r v R v i i A +====.).//(//βππmOg r βπ=Small-Signal:Large-Signal:2')(2tn GS nDSV V LW K I −=DDS DD DS R I V V ⋅−=),(DS DS V I Q Common Source Amplifier∞=in R Dds out R r R //=)//(D ds m inoutV R r g v v A −==∞≈=inoutI i i A Do Dnm I r r LWI k g λπ12'=∞==Small-Signal:Common Base Amplifier Large-Signal:Neglecting r o ,mo m m in g r g g g r R 111)1//(≈+=+==βπππCout R R ≈Cm inoutV R g v v A ≈=OO in outI i i A ββ+−≈=1Small-Signal:Common Gate Amplifier Large-Signal:Small-Signal:Neglecting rds,min g R 1≈Dout R R ≈Dm inoutV R g v v A ≈=1−==inoutI i i ALarge-Signal:BEIN OUT V V V −=Common Collector Amplifier (Emitter Follower)Large-Signal:GSIN OUT V V V −=Common Drain Amplifier (Source Follower)Neglecting r o ,Eo in R r R )1(βπ++=mo outg r R 11=+=βπEm Em in out V R g R g v v A +==1)1(o inoutI i i A β+−==Small-Signal:Neglecting rds,∞=in R Sm Sm S outRg R g R R +==1)1//(11<+==Sm Sm in out V R g R g v v A ∞==inoutI i i A Small-Signal:Solution:mSmVmA V I g T C m 5.38261===Ω===k mSg r m o62.25.38100βπΩ===k mAV I V r C A o 1001100Example 1-CE BJT circuitFind the small-signal R in , R out , v out /v in , and i out /i in for the circuit shown. Assume that βo =100, V A = 100V.Small-signal model is:Ω=+=k r R R S in 62.12πΩ==k R R r R L C o out 96.1////VV R r R g v v v v v v A inout m in out in out V /66.15)62.12/62.2)(96.15.38())(())((−=⋅−=−===πππAA k mS r R r R R r g i v v i i i A Co L C o m in out in out I /78.19)62.2)(549.7(].//)//([))((=Ω=+===πππExample 1-CE BJT circuitSolution:SLWI K g D Nm µ6632001011022'=×××==Ω=×==k I r D N ds 12520004.01016λFind the small-signal R in , R out and v out/v in of the common gate amplifier including r ds . Assume that K N ’=0.11mA/V^2, V t =0.7V, I D = 0.2mA and R D =20k.Example 2-CG MOSFET CircuitSolution:First find the small-signal model parameters.Ω=+Ω=++==k k r g R r i v R ds m D ds in in in 728.19.8211451Din ds in m in in R i r v g i v +−=)(V V G g g g v v v G v v g v g D ds ds m in out outD out in ds in m /57.115088663)(=++=++=→=−+Ω==k R r R D ds out 24.17//Solution:Example 2-CG MOSFET Circuit Using the small-signal model we get,A nodal equation at the output is given by:BJT Single Transistor Amplifiersπr om r g r βππ+=1/1//Eo R r )1(βπ++Co R r //Co R r //OS R r βπ+1//)//(L o m R r g −)//(L o m R r g Oβα−)1(O β+−Current Gain1Voltage Gain(Low)(High)(High)Output Resistance(High)(Low)(Medium)Input ResistanceCommon CollectorCommon BaseCommon EmitterSmall-Signal Performance SUMMARYMOSFET Single Transistor Amplifiers∞mg /1≈∞Dds R r //Dds R r //0 if /1or1=+S m S m SR g R g R )//(D ds m R r g −)//(D ds m R r g srm sr m R g R g +1∞∞-1Current GainVoltage Gain (Low)(High)(High)Output Resistance(Low)Input ResistanceCommon DrainCommon GateCommon Source Small-Signal Performancemoin g r R βπ==Eo B in R r R R )1(βπ+++=oo B E E B Eo out r r R R r R R R r R )1()//(]1[0ββππ+≈+++++=Co out R r R //=Common Emitter with Emitter DegenerationoV Cinin in C out in out I A R R R v R v i i A β≈−=−==//ECE B C m in C m in out V R R R r R R r g v R v g v v A −≤+++−=−≈=)1(0βπππ)//(C o m V R r g A −=Co oo I R r r A +=.βCommon Emitter with Emitter DegenerationMaximum gain!∞=in R Sm ds S S m ds out R g r R R g r R ≈++=]1[SDS m D m in out V R R R g R g v v A −≤+−==1Maximum gain!Common Source with Source DegenerationExample 3Ω===Ω======≥=⋅==Ω=Ω===K mAVI V r and mS mS mA mA V I Now Note mAI I uAK VFor C A o T C B F C 168.798.650 6.27926875g r ,2692698.6g ,r ,r ,g ,parameters signal small the of value the find .)2 )region active forward in is BJT so v v ( 98.6 931003.9100K (on)V -10V I I of value dc for the solve 1.)First, :Solution 50V V and 75 if /v v gain, voltage the and R ,resistance output ,R ,resistance input signal small the find shown,amplifier BJT pnp the m 0m 0m (sat)CE CE B B C AP F in out out in βββππVV R R r R g K r in B out m B /33.27)1279279()3.125()//)((v v as,found is gain voltage the Finally, 6.)467/1)K (7.168//1///R //R r R gives, resistance output for the Solving .)51297100//2781000//r R R gives,resistance input for the Solving 4.)as,writen be can amplifier the of mode signal -small The .)3inout L C o out s in −=×−=⋅−=Ω=Ω==Ω=+=+=ππOP Amp in Analog Circuit。

格雷：模拟集成电路课件3-4

Chapter3Single-Transistor and Multiple-Transistor Amplifiers---Single-Transistor Amplifiers---Two-Transistor BJT Amplifier---Two-Transistor MOSFET Amplifier---Differential Amplifiers (Mismatch)DEVICE MISMATCH IN DIFEERENTIALAMPLIFIERSOutline---The general approach to analyzing mismatches ---Input voltage and current offset of BJTdifferential amplifiers---Input voltage offsets of MOS differential amplifiers---Small-Signal Characteristics of Unbalanced Diff.Amp.General MethodSuppose performance parameters p 1and p 2can be written as),,,(),,,(22221111L L z y x f p andz y x f p ==Ideally, x 1=x 2, y 1=y 2, z 1=z 2…,→p 1=p 2. But, in practice, they are not and an error exists:),,,,,,,(),(22211121L L z y x z y x f p p e Error ==where x1,y1,z1,…and x2,y2,z2,…can be expressed in terms of their difference and average values, For example,22121x x x andx x x +=−=∆MISMATCH ANALYSIS METHODS22121x x x andx x x +=−=∆xx x andxx x ∆−=∆+=⇒5.05.021thus,);5.0,5.0;5.0,5.0(),(21L y y y y x x x x f p p e ∆−∆+∆−∆+=Generally:x x <<∆, the following approximations canεεεε−≈++≈−111111orneglecting high power values of ).,.(2εεe i be concluded:INPUT VOLTAGE AND CURRENT OFFSET OF THE BJT DIFF. AMPLIFIERModel for Input Offset Voltage and CurrentBase width, base & collector doping level, effective emitter area, collector load resistance.•V OS :If v in =0)()(OS C TCOS C m C V R V I V R g v ∆=∆=∆If an offset exists in:21&C C R R )/(/)/()(_C C T m C C R OS C C C R R V g R v V R i v C ∆=∆=→∆=∆→If an offset exists in area or doping level, in I S)/(/)/(_/S S T m C I OS S C S V V S C I I V g i V I I I eI i S TBE ∆=∆=→∆=∆=∆→mOS C C C g V i i i =−=∆21•I OS :If an offset exists in i C ,→β/C OS i I ∆=)/)(/(/)()/)(/(/)/(__ββββββββC B OS C C C C C C R OS i i I i R R R R i I C ∆=∆=∆=∆=⇒RMS-sum (polarity of error is not important):2_2_2_2_&βOS R OS OS I OS R OS OS III VVV CSC+=+=DC performance:⎟⎟⎠⎞⎜⎜⎝⎛=⎟⎟⎠⎞⎜⎜⎝⎛−⎟⎟⎠⎞⎜⎜⎝⎛=⇒12212211ln ln ln S S C C T S C T S C T IDI I I I V I I V I I V V 22222221121121)()()()(A V Q D qn A V W N D qn I A V Q D qn A V W N D qn I CB B n i CB B A n i S CB B niCB B A n iS ====where W B (V CB )is the base width as a function of V CB , N A is theacceptor density in the base and A is the emitter area.122122110C C C C C C C C OD R R I I R I R I V =⇒=⇐=⎥⎦⎤⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛⎟⎟⎠⎞⎜⎜⎝⎛⎟⎟⎠⎞⎜⎜⎝⎛=⇒)()(ln 211212CB B CB B C C T OSV Q V Q A A R R V V 021=+−BE BE ID V V VNow, define:222&212121CC C C C C C C C C C C R R R and R R R R R R R R R ∆−=∆+=⇒+=−=∆222&212121AA A and A A A A A A A A A ∆−=∆+=⇒+=−=∆222&212121BB B B B B B B B B B B Q Q Q and Q Q Q Q Q Q Q Q Q ∆−=∆+=⇒+=−=∆Substituting these values into the expression for V OS gives⎥⎦⎤⎢⎣⎡⎟⎟⎠⎞⎜⎜⎝⎛∆−⎟⎠⎞⎜⎝⎛∆−⎟⎟⎠⎞⎜⎜⎝⎛∆−≈⎥⎥⎥⎥⎦⎤⎢⎢⎢⎢⎣⎡⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛∆+∆−⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛∆+∆−⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛∆+∆−=B B C C T BB BB C C C C T OSQ Q A A R R V Q Q Q Q A A A A R R R R V V 111ln 222222ln BB C C Q Q and A A R R <<∆<<∆<<∆,Expanding the logarithm and neglecting higher order terms gives⎟⎟⎠⎞⎜⎜⎝⎛∆−∆−=⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−∆−≈S S C C T B B C C T OSI I R R V Q Q A A R R V V whereBBS S Q Q A A I I ∆−∆=∆Example:05.0&01.0//==∆∆SSI IR R σσmV mV I I R R V V S S C C T OS 5.1)05.001.0)(26(−=+=⎟⎟⎠⎞⎜⎜⎝⎛∆−∆−≈mVmV V V SS CC I I R R T OS 3.1)05.0()01.0()26(22/2/2=+=+=∆∆σσCalculation of dV OS /dT:Assuming V OS (270C)=2mV,K V KmVT T V T V or I I R R T V T V OS OS S S C C T OS /67.63002)(µ=≈=∂∂⎟⎟⎠⎞⎜⎜⎝⎛∆+∆=∂∂Offset voltage can be cancelled using external circuitrybut to cancel the temperature drift, the external circuitry must have the temperature dependence.Temperature Dependence of the Input Offset VoltageThe input offset current of the BJT Differential Amplifier can be written as :112212215.0&5.0F C F C B B OS OS B B OS B B I I I I I I I I I I I ββ−=−=⇒−=+=Define:222&222&212112212112FF F F F F F F F F F F CC C C C C C C C C C C and I I I and I I I I I I I I I ββββββββββββ∆+=∆−=⇒+=−=∆∆+=∆−=⇒+=−=∆Input Offset Current of the BJT Differential AmplifierqCombining the previous expressions into the function for I OS gives:FF C C F F CC F C F FC C F F C C OS I I when I I I I I I I I βββββββββ<<∆<<∆⎟⎟⎠⎞⎜⎜⎝⎛∆−∆≈⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛∆−∆−−∆+∆+=,2222, then,CCC C CC CCC C C C R R I I R R R R I I I I ∆=∆−⇒∆+∆−=∆+∆−21212121122122110C C C C C C C C OD R R I I R I R I V =⇒=⇐=Therefore,⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−=FFC C F C OSR R I I βββINPUT VOLTAGE OFFSET OF THE MOSFETDIFF. AMPLIFIERModel for Input Offset Voltage•V OS : If v in =0mOS D D D g V i i i =−=∆21If an offset exists in:2/))(/(2/)/(_t GS D D D D D R OS V V R R I R v V D −∆=∆=→β21&D D R R LW k '=βDD D D D D R v i orR i v /)(∆=∆∆=∆→If),,('k L W or ∆∆∆∆β2/))(/(2/)/(2/)/(/_t GS D D D m D OS V V I I I g i V −∆=∆=∆=∆=βββββββββ),()(/)]}(2[2{/22_t tt tt GS t GS t t m D V OS V Vt small is V if V V V V V V V g i V t ∆<<∆∆∆≈−−∆+∆=∆=ββIf exists:•I OS =0tV ∆2'21'1212'221'1121)/(2)/(2)/(2)/(20L W k I L W k I V V L W k I V L W k I V V V V V D D t t D t D t ID GS GS ID −+−=−−+=⇒=+−122122110D D D D D D D D OD R R I I R I R I V =⇒=⇐=DC performance:Define:222&212121DD D D D D D D D D D D R R R and R R R R R R R R R ∆−=∆+=⇒+=−=∆222&212121ββββββββββββ∆−=∆+=⇒+=−=∆and 222&212121DD D D D D D D D D D D I I I and I I I I I I I I I ∆−=∆+=⇒+=−=∆222&212121tt t t t t t t t t t t V V V and V V V V V V V V V ∆−=∆+=⇒+=−=∆Substituting these values into the expression for V OS givestD D D t D D D D D t D D D D D tt t t D D D D OSV I I I V I I I I I V I I I I I V V V V I I I I V ∆+⎥⎦⎤⎢⎣⎡∆−∆=∆+⎥⎦⎤⎢⎣⎡∆+∆−−∆−∆+=∆+⎥⎦⎤⎢⎣⎡∆+∆−−∆−∆+=∆−−∆++⎟⎟⎠⎞⎜⎜⎝⎛∆−∆−−⎟⎟⎠⎞⎜⎜⎝⎛∆+∆+=βββββββββββββββββ222)221()221(2)21)(21()21)(21(2)2()2(5.05.025.05.02where,tt D D D D V V and I I R R <<∆<<∆<<∆<<∆,,,ββWhen the variation in 3 parameters are uncorrelated:mV V V R R V V V V t GS D D t GS t OS1072)(2)(22222=⎟⎟⎠⎞⎜⎜⎝⎛∆−+⎟⎟⎠⎞⎜⎜⎝⎛∆−+∆=ββVV V mV V R R t GS t D D 5.1&100%,5/%,1/=−=∆=∆=∆ββFor the correlated case:mV R R V V V V D D t GS t OS5522)(=⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−−∆=ββ⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−∆≈⇒∆−=∆βββ222D D D t OS D D D D R R I V V R R I I tGS DV V I −=β2⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−−∆=⇒ββ22)(D D t GS t OSR R V V V VTemperature Dependence of the MOS InputOffset Voltage⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−∆=βββ222D D D t OS R R I V V TT T T T T dT d T T T L WT k T )(5.1)/)((5.1)()()(5.1005.100'βββββ−=−=⇒⎟⎟⎠⎞⎜⎜⎝⎛==−−⎟⎟⎠⎞⎜⎜⎝⎛+∂∂⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−=⎟⎟⎠⎞⎜⎜⎝⎛∂∂−∂∂⎟⎟⎠⎞⎜⎜⎝⎛∆+∆−=2/12/342322122 22122122βββββββββT I T I I R R T I T I I R R dT dV DD D D D D D D D D OSepredictabl T V T ∝epredictabl so not T T I D ∂∂∂∂β&R D , ,V tR C , (A, Q B ) →I SV OSV OS , I OS MOSFETBJT ↓⇒↑OS dm V A SUMMARYβ22221121221121R i R i v v v R i R i v v v c d +=+=−=−=2/)(,&,2/)(,21212121R R R R R R i i i i i i c d +=−=∆+=−=21R R ≠if:Definite:4)(2)2)(2()2)(2()()2)(2()2)(2(R i R i R R i i RR i i v R i R i RR i i RR i i v d cd c dc c cd d c dc d ∆+=∆−−+∆++=∆+=∆−−−∆++=Half circuitSMALL-SIGNAL CHARACTERISTICS ofUNBALANCED DIFF. AMP.2/)(,&,2/)(,21212121m m m m m m c d g g g g g g v v v v v v +=−=∆+=−=42)2)(2()2)(2( 22 )2)(2()2)(2( 221121221121d m c m d c mm d c m m m m c cm d m dc m md c m m m m d v g v g v v g g v v g g v g v g i i i v g v g v v g g v v g g v g v g i i i ∆+=−∆−++∆+=+=+=∆+=−∆−−+∆+=−=−=⇒21m m g g ≠Definite:if:22&0222=+∆+=∆++Rc idm m mid m Rd i v g v g v g v g i tail Rc ic tail ic r i v v v v 2+=−=)212()212(22tailm m tail m m ic tail m mtailm m id Rd r g g r g g v r g g r g g v i +∆+∆−++∆∆+−=tailm idm ic m Rc r g v g v g i 2122+∆+−=⇒⎟⎟⎠⎞⎜⎜⎝⎛+∆+∆−==+∆−∆∆+−====tail m m m v icoddmcm tailm m m tailm m v idod dmr g R g R g v v A r g Rg R g r g R g v v A id ic 21212220_0R i R i v RdRc od 222+∆=icdm cm id dm od v A v A v _+=Ri R i v Rc Rd oc +∆=22iccm id cm dm oc v A v A v +=_⎟⎟⎟⎟⎠⎞⎜⎜⎜⎜⎝⎛+∆∆+−==⎥⎥⎥⎥⎥⎥⎦⎤⎢⎢⎢⎢⎢⎢⎣⎡+⎟⎟⎠⎞⎜⎜⎝⎛⎟⎟⎠⎞⎜⎜⎝⎛∆∆−∆+∆−====tail m m m v ic oc cm tail m m m tail m m m m v id oc cm dm r g R g R g v v A r g g g r g R g R g R g v v A id ic2122212241020_SUMMARY•Differential Mode and Common Mode •Characteristics of Differential Amplifier •CMRR•ICMR•Offset Voltage•Mismatch。

模拟集成电路-课件

2021/6/20
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NMOS沟道电势示意图(0<VDS< VGS-VT )
dq(x) = -CoxWdx[vGS - v(x) - VTH ] 边界条件:V(x)|x=0=0, V(x)|x=L=VDS
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I/V特性的推导（1）
沟道单位长度电荷(C/m)
电荷移动速度
I = Qd .v (m/s)
组合二进制数据 DAC 多电平信号 ADC 确定所传送电平
传送端
接收端
磁盘驱动电子学
存储数据恢复数据
硬盘存储和读出后的数据
无线接收机
无线接收天线接收到的信号(幅度只有几微伏)和噪声频谱
接收机放大低电平信号时必须具有极小噪声、工作在高频并能抑制大的有害成分。
光接收机
转换为一个小电流高速电流处理器
假定 “1”电平为3V， “0”电平为0V，VTP ＝-0.5V，试确定C1、C2的终值电压。
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MOS管的开启电压VT及体效应
VTH = ΦMS + 2ΦF + Qdep , where Cox
ΦMS = Φgate - Φsilicon
ΦF = kT q ln
Nsub ni
模拟集成电路的特点是什么？
从模拟集成电路的工作机理和功能要求来考虑，与数字集成电路相比，概括起来，有以下5个特点：
1) 电路所要处理的是连续变化的模拟信号（模拟量）；
2) 除了需要功率输出的输出级外，电路中信号的电平值是比较小的，即模拟集成电路一般多工作于小信号状态，不象逻辑集成电路那样只工作于大信号开关状态；
ID
= 2ID VGS - VTH

集成电路模拟版图设计基础ppt课件

4.2 LVS工具不仅能检查器件和布线，而且还能确认器件的值和类型是否正确。
4. LVS文件
4.3 Environment
setting：
1) 将决定你用几层的金属，选择一些你所需要的验证检查。
2) 选择用命令界面运行LVS，定义查看 LVS报告文件及LVS 报错个数。
定义金属层数
关闭ERC 检查
2.2互连
2.2.1金属（第一层金属，第二层金属……） 2.2.2通孔
ppt课件
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2.1 器件
2.1.1 MOS管
NMOS
PMOS
MOS管剖面图
2.1 器件
2.1.1 MOS管
NMOS工艺层立体图
ppt课件
NMOS版图
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2.1 器件
2.1.1 MOS管 1) NMOS管
以TSMC，CMOS，N单阱工艺为例
ppt课件
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3. 版图编辑器 6) virtuoso编辑器 --版图编辑菜单
ppt课件
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3. 版图编辑器 7) virtuoso编辑器 --显示窗口
ppt课件
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3. 版图编辑器 8) virtuoso编辑器 --版图显示
ppt课件
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3. 版图编辑器 9) virtuoso编辑器--数据流格式版图输出
ppt课件
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1. 必要文件
PDK
*.tf display.drf
DRC LVS cds.lib .cdsenv .cdsinit
ppt课件
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2. 设计规则
2.1 版图设计规则——工艺技术要求 2.2 0.35um，0.25um，0.18um，0.13um，不同的

模拟集成电路(课件)

16
−3
Φ B = Φ F (p ) − Φ F (n ) = 0.53 − (− 0.35) = 0.88V
P-N结耗尽区
耗尽区宽度：
⎤ ⎡ 2ε 0ε si Φ B NA xn = ⎢ ⎥ q N D (N A + N D )⎦ ⎣
1 2
⎤ ⎡ 2ε 0ε si Φ B ND xp = ⎢ ⎥ q N A (N A + N D )⎦ ⎣
– CAD
• 难以利用自动设计工具
模拟集成电路设计步骤
模拟集成电路设计步骤
电路设计
物理版图设计
根据工艺版图设计规则设计器件、器件之间的互联、电源和时钟线的分布、与外部的连接。
电路测试
电路制备后对电路功能和性能参数的测试验证。
层次设计
描述格式设计电路层次系统系统说明/仿真 Matlab、ADMS… 电路性能 netlist /simulation 版图布局 layout 参数化模块/单元 layout 行为模型物理模型
P-N结
• 讨论P-N结反偏和耗尽区电容对了解寄生电容是十分重要的
– 假定P是重掺杂，N是轻掺杂。
E
P+
Xp Xn
N−
耗尽区
– 空穴从P扩散到N区，留下固定的负电荷。在N区同样会留下固定的正电荷，在界面处建立了电场。扩散电流 = 漂移电流
P-N结耗尽区
PN结内建势
kT N A N D Φ B = Φ F (p ) − Φ F (n ) = ln q n i2
半导体器件和模型
• 半导体PN结 • MOS器件
– 基本概念 – 阈值电压 – I/V特性 – 二级效应 – 器件模型
本征半导体

模拟集成电路ppt课件

T1、T2、T3的基极并联。
电路用一个基准电流IREF获得了多个电流输出。
IC1IE1IRREe1RFe
IC2IE最2新版整I理RRpEpet 2RFe
IC3IE3IRREe3RFe
10
6.1.1.4 电流源作用
镜像电流源
提供直流偏置作为有源负载例电流源作为有源负载：例P315 6.6.1
最新版整理ppt
阻Rid是基本放大电路的两倍。
Rid 2 rbe
单端输出时， Ro Rc
双端输出时， Ro 2Rc
(5)共模抑制比
最新版整理ppt
36
讨论：
双端输出： KCMR 共模抑制能力最强；
单端输出：
R C /R / L
K CM =R A A V VD C R C /R / L rb e2 1 rb e2 ro
双端输出时：
Avd
(Rc
//
RL 2
Rb rbe
)
(2)单共端模输电出压时放：大倍数Avd2R Rbc //rRbLe
与单端输入还是双端输入无关，只与输出方式有关：
双端输出时：
Avc 0
单端输出时：
Avc
R'L 2Re
最新版整理ppt
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6.2.1 基本差分式放大电路
(3)差模输入电阻不论是单端输入还是双端输入，差模输入电
C1
双端输入、单端输出；
单端输入、单端输出；
单端输入、双端输出；
恒流源的作用相当于阻值很大的电阻。
最新版整理ppt
C2
20
6.2.1 基本差分式放大电路
1. 电路组成差模信号：vi d=vi 1vi 2
共模信号：vic

《模拟集成电路基础》PPT课件_OK

规率↑。
U
PN结的理想特性
•当加反向电压时： I=Is ，基本不变。
25
I
(三).实测伏安特性：
•与理想的伏安特性的差别：
Is
1.正向起始部分有门限电压：
0
Ur
U 硅：Ur=0.5-0.6v;
锗：
硅管的伏安特性
Ur=0.1-0.2v
I
2.加反向电压时，相同温度下：
Is硅(nA,10-9)<Is锗(A,10-6) 硅管
定。最大工作电流 IZmax，取决于最大
耗散功率。 U 2.特点：
(1).工作在反向工作区。 (2).工作电压要超过反向击穿电压。
32
六.晶体二极管的电容和变容二极管：
(一).势垒电容CT:
把PN结看成平板电容
器，加正向电压或反向电压时像电容的充放电。（此电容效
应为势垒电容）
(二).扩散电容CD:
•当加正向电压时： I IseU /UT ;(U UT )
•当加正向电压时： I-Is
24
三.二极管的结构与伏安特性：
结构
(一) . 二极管的结构：如图所示。
P
N
符号
(二).理想伏安特性：
二极管两端电压与流过电流之间关系：
I
I I s (eU /UT 1)
Is
• 当加正向电压时：I随U↑，呈指数
20
P
N
+++ +++ +++
V
PN结的接触电位
(二)PN结的接触电位：
(1).内电场的建立，使PN结中产生电位差。从而形成接触电位V(又称为位垒)。 (2).接触电位 V决定于材料

格雷：模拟集成电路课件1-2

Analysis and Design of Analog Integrated CircuitsChapter1Models for Integrated-Circuit Active Devices-- PN Junction -- Large-Signal and Small-Signal Models of Bipolar Transistors -- Large-Signal and Small-Signal Models of MOS TransistorsUESTC Luo Ping 1 2006-9-16Analysis and Design of Analog Integrated CircuitsLarge-Signal and Small-Signal Models of Bipolar TransistorsObjective* Understand how the bipolar junction transistor works * Develop large signal models for analysis & simulation * The Simple small signal model for the BJTOutline* * * * * Large-signal models in the forward-active region Saturation and inverse active regions Transconductance small signal model Input resistance, output resistance of the CE model Frequency dependent small-signal BJT modelLuo Ping 2 2006-9-16UESTCAnalysis and Design of Analog Integrated CircuitsBipolar Transistor Sign ConventioniC __ total collector current consisting of both ac and dc IC __ dc collector current ic __ ac collector currentUESTC Luo Ping 3 2006-9-16Analysis and Design of Analog Integrated CircuitsHow the BJT worksPhysical Aspects of a NPN BJT The emitter-base depletion region is generally smaller in width because the doping level is higher and baseemitter junction is generally forwardbiasedUESTCLuo Ping42006-9-16Analysis and Design of Analog Integrated CircuitsCarrier Concentrations of the npn BJT + n ( x) = p ( x) NA p pv n p ( 0 ) = n p 0 exp( BE ) VTn p (W B ) = n p 0 exp(p p ( x) − n p ( x) = N Av BC )≈0 VTiC = − i nC = − ( i nE − i nr ) = − ( i E − i pE − i pr )Assume the base-emitter junction is forward biased and the base-collector junction is reverse biased.UESTC Luo Ping 5 2006-9-16Analysis and Design of Analog Integrated CircuitsLarge Signal Model of BJTLarge-signal models in the forward-active regioniC = − i nC = − ( i nE − i nr ) = − ( i E − i pE − i pr )n p (0) = n p 0 v BE exp( ) VTn p (W B ) = n p 0 exp(v BC )≈0 VTN A + n p ( x) = p p ( x)p p ( x) − n p ( x) = N AJ n = −qDn (v exp( BE ) VTJ n = qD n (iC = qAD n (dn p ( x ) dx)=)qAD n n p 0 WB2n p ( 0) WB)n p (0) WBiC = I S exp(2vBE ) VT2IS =UESTCqADn n p 0 WBni = n p 0 N A6qADn ni qADn ni = IS = WB N A QBLuo Ping2006-9-16Analysis and Design of Analog Integrated CircuitsLarge-signal models in the forward-active regioniB = i pr + i pEvBE 1 n p 0WB qA iB1 = exp( ) VT 2 τbiB 2qADp ni2 vBE exp( ) = Lp N D VTτ b − − minority - carrier lifetime in the base.Lp - - - - the diffusion length for holes in the emitter.UESTCLuo Ping72006-9-16Analysis and Design of Analog Integrated CircuitsLarge-signal models in the forward-active region1 n p 0WB qA vBE iB1 = exp( ) 2 τb VTiB 2qADp ni2 vBE exp( ) = Lp N D VTiB = iB1 + iB 2n p 0WB qA qADp ni vBE ) exp( ) =( + Lp N D VT 2τ b2qADp n p 0 / WB iC 1 = βF = = 2 D pWB N A iB 1 n p 0WB qA qADp ni 2 WB + + 2τ b Dn Dn L p N D 2 τb Lp N DUESTC Luo Ping 8 2006-9-16Analysis and Design of Analog Integrated CircuitsLarge-signal models in the forward-active regioniC α F = ≈ αT γ iEiE = −(iC + iB )inC 1 αT = ≈ →1 2 inE W Where is base Transport factor 1+ B 2τ b DnγAndis Emitter injection efficiency =inE ≈ iE1+1 →1 D pW B N A Dn L p N DUESTCLuo Ping92006-9-16Analysis and Design of Analog Integrated CircuitsLarge-signal models in the forward-active regionUESTCLuo Ping102006-9-16Effects of Collector Voltage on LS CharacteristicsCBB p V W x n I ∆∝∆∝∂∂∆∝∆1)(The Early Voltage of BJT)exp(2TBEB i nC V v Q n qAD i =CE B B C CE BT BE Bi n CE C v Q Q I v Q V V Q n qAD v i ∂∂−=∂∂−=∂∂)(exp 22A B B N W Q =BCEBA A C CEB BC CE C W v W V V I v W W I v i ∂∂−=⇒−≡∂∂−=∂∂ AV For a uniform base transistor, so that the derivativebecomesWhere, is called the Early voltageIllustration of the Early Voltage)exp()1(TBEA CE S C V v V v I i +=Modified large signal model becomes:Typical Output Characteristics for an npn BJTSaturation and inverse active regions Regions of Operation of the BJTSaturation RegionLarge Signal Model in SaturationSimplified model:Where, and V to on V BE 7.06.0)(≈Vsat V CE 2.0)(≈The Ebers-Moll Large Signal ModelThese equationsare valid for all four regions of operation of the BJT.⎟⎟⎠⎞⎜⎜⎝⎛−−=1)exp(T BE ES EFV V I I 1)exp(⎟⎟⎠⎞⎜⎜⎝⎛−−=T BC CS CR V V I I1)exp(1)exp(⎟⎟⎠⎞⎜⎜⎝⎛−−⎟⎟⎠⎞⎜⎜⎝⎛−=T BCCST BE ES F C V V I V V I i α⎟⎟⎠⎞⎜⎜⎝⎛−+⎟⎟⎠⎞⎜⎜⎝⎛−−=1)exp(1)exp(T BCCSR T BEESE V V I V V I i αExample of Saturation OperationCEC B F V ,I I and find ,100 If =βSolution:Assume that:Von V BE 7.0)(=uAK R on V I B BE B 931007.010)(10=Ω−=−=mAuA I I B F C 3.993100=×=⋅=βVK mA V V CE 6.823.910−=Ω⋅−=Therefore, the transistor must be saturated, ifThis gives,V sat V CE 2.0)(=mAK R sat V I C CE C 9.422.010)(10=Ω−=−=Transistor Breakdown VoltagesCB Transistor Breakdown CharacteristicsnCBOCB E F C BV v M where Mi i )(11:−=⋅⋅−=αCE Transistor Breakdown CharacteristicsnCBOCB B F F C BV v M where i MMi )(11:1−=−=αα1=M F αCBCE v v ≈Breakdown occurs when:Assuming: nF CBO nF CBO CEO n CBOCEO F BV BV BV BV BV 11)1( 1)(1βαα≈−=⇒=−Dependence of βF on Operation ConditionsRegion Ⅰ: Low current region whereβF increase as i c increase.Region Ⅱ: Mid current region whereβF is approximately const.Region Ⅲ: High current region whereβF decrease as i c increase.The temperature coefficient of is (ppm=parts per million)F βC ppm TTC oF F F 70001+≈∂∂=ββVariation of Forward Beta with Collector Current)exp(& )exp(:I Region T BESX BX T BE S C F mV v I i V v I i ===↓β)exp( & )exp(:II Region T BE FM S B T BES C F V v I i V v I i constββ≈==)exp( & )2exp(:III Region T BE FM S B TBE SHC F V v I i V v I i ββ≈==↓1exp 1exp ⎟⎟⎠⎞⎜⎜⎝⎛−−⎟⎟⎠⎞⎜⎜⎝⎛−=T BC R S T BES C V V I V V I I α 1exp 1exp ⎟⎟⎠⎞⎜⎜⎝⎛−+⎟⎟⎠⎞⎜⎜⎝⎛−−=T BC S T BEF S E V V I V V I I αSummary---BJT four regions of operation* Forward active region * Saturation region * Inverse active region * Cutoff---Ebers-Moll model for all 4 regions of operation---CB & CE breakdown voltages---Beta is dependent on collector current & has 3 regions* Low current region: beta decrease as I c decreases * Mid current region: beta is independent of I c* High current region: beta decrease as I c decreasesSmall Signal Model of BJT What is a Small Signal Model?* A small signal model is a linear model which is independent of amplitude. It may or may not have time dependence (i.e. capacitors).* The small signal model for a nonlinear component such as a BJT is a linear model about some nominal operating point. The deviations from the operating point are small enough that it approximates the nonlinear component over a limited range of amplitudes.BJT, CE, Forward-Active Regioncb i i i v ⇒⇒Transconductance of the Small Signal BJT ModelThe small signal trans conductance is defined as:i m c ic be c BE C QBECm v g i v i v i v i dv di g =⇒==∆∆=≡The large signal model for isC i TBES C V v I i exp=TCm T CT BE T S Q T BE S BE m V I g V I V V V I V v I dv d g =∴===exp )exp(Transconductance of the Small Signal BJT ModelAnother way to develop the small signal trans-conductance:)exp()exp()exp()exp(Ti C T i T BES T i BE S C V v I V v V V I V v V I i ==+=...])(61)(211[32++++≈Ti T i T i C V v V v V v I cC C i I i But +=:im i TCT i C T i C T i C c v g v V I V v I V v I V v I i =≈+++≈∴...)(6)(232Input Resistance of the Small Signal BJT ModelIn the forward active region, FCB i i β=CFCC B i i di d i ∆=∆)(βb c FC C B C i i i di d i i ==∆∆)(10ββ＝Define the small signal input resistance as:mc i b i g i v i v r 00ββπ==≡Output Resistance of the Small Signal BJT ModelIn the forward active region, the small signal output conductance is:ce o c cec CE CQCECo v g i v i v i dv di g =⇒=∆∆=≡TBEA CE S C V v V v I i exp)1(+=ACT BE A S QCECo V I V V V I dv di g ≈=≡exp )1(CAo I V r =∴Simple Small Signal BJT Modelbi ce c i m c i r v and v g i v g i π=== , ,0Frequency Dependent Small-Signal BJT Model Parasitic Elements of the BJT Small Signal ModelCje= base-emitter depletion capacitance (forward biased) Cµ= collector-base depletion capacitance (reverse biased) Ccs= collector-substrate capacitance (reverse biased)Frequency Dependent Small-Signal BJT Model Complete Small Signal BJT Modelc s n CB n sCS cs cs V C C V C C )1()1(0000ψψµµ−=+=base emitter depletion capacitance (forward biased).The capacitance, consists of the sum of and ,(usually, )=je C πC je C b C b je C C <<mF b b je g C C C C τπ≈≈+=+-Summary---The small signal model is a linear model independent of amplitude---BJT small mode*Simple mode* Complete mode---Analysis steps for the BJT* Solve for the dc collector current* Evaluate the small model parameters* Insert the SSM in the schematic with batteries shorted & current sources opened* Algebraically solve for the desired small signal performance。

模拟集成电路教学课件PPT

放大倍数减小，从而增加共模抑制比，理想的恒流源相当于阻值为无穷的电阻，所以共模抑制比是无穷。
26
例 T1、T2、T3均为硅管，
β1 β2 50，β3 80，求: 当ui 0时，uO 0V。
(1)I C3、I C2、I E、U CE3、U CE2 及Re2的值;
(2)Au Aud2 Au2 ; (3)当ui 5mV时，uO ? (4)当输出接一个12k负载
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输入有差别，放大器才有输出 ——差分式放大器
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17
18
温度变化和电源电压波动
651实际集成运放的主要参数大信号动态特性放大电路在闭环状态下输入为大信号例如阶跃信号时输出电压对时间的最大变化速率即maximsin2ftom651实际集成运放的主要参数大信号动态特性不要求指运放输出最大峰值电压时允许的最高频率即3500vsom电源电压抑制比ksvr不要求衡量电源电压波动对输出电压的影响不要求651实际集成运放的主要参数参看p291表651典型集成运算放大器参数集成运放的选用根据技术要求应首选通用型运放当通用型运放难以满足要求时才考虑专用型运放这是因为通用型器件的各项参数比较均衡做到技术性与经济性的统一
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Av Avd2 Av2 195
(3) 差分电路的共模增益
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