IRG4PC30UD中文资料

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Eaton PDF34G0400P3DL 电源防御型号的产品说明说明书

Eaton PDF34G0400P3DLPower Defense Globally Rated 100% UL, Frame 3, Four Pole, 400A, 35kA/480V, PXR25 LSIG w/ Modbus RTU, CAM Link and Relays, Std Term Load Only (PDG3X4TA400)Eaton Power Defense molded case circuit breakerPDF34G0400P3DL 786679987773109.1 mm 257.1 mm 182.9 mm 7.68 kg Eaton Selling Policy 25-000, one (1) year from the date of installation of theProduct or eighteen (18) months from thedate of shipment of the Product,whichever occurs first.RoHS Compliant IEC 60947-2CCC MarkedProduct NameCatalog Number UPCProduct Length/Depth Product Height Product Width Product Weight WarrantyCompliancesCertifications400 AComplete breaker 3Four-pole (100% N)PD3 Global (100% UL) Class APXR 25 LSIGModbus RTU and CAM Link600 Vac600 V100% neutral protectionStandard Terminals Load Only35 kAIC at 480 Vac65 kAIC @240V (UL) 10 kAIC Icu @250 Vdc Eaton Power Defense PDF34G0400P3DL 3D drawingPower Xpert Protection Manager x32Consulting application guide - molded case circuit breakersPower Xpert Protection Manager x64StrandAble terminals product aidPower Defense technical selling bookletPower Defense brochurePower Defense molded case circuit breaker selection posterPower Xpert Release trip units for Power Defense molded case circuitAmperage RatingCircuit breaker frame type FrameNumber of poles Circuit breaker type ClassTrip Type CommunicationVoltage ratingVoltage rating - maxProtectionTerminalsInterrupt rating Interrupt rating range 3D CAD drawing package Application notesBrochuresCatalogsbreakersMolded case circuit breakers catalogCertification reportsPDG3 UL authorization 250-600a TMTUPDG3 UL authorization 100-400aInstallation instructionsPower Defense Frame 3 Breaker Instructions (IL012107EN).pdfMultimediaPower Defense Frame 5 Trip Unit How-To VideoEaton Power Defense for superior arc flash safetyPower Defense BreakersPower Defense Frame 6 Trip Unit How-To VideoPower Defense Frame 3 Variable Depth Rotary Handle Mechanism Installation How-To VideoPower Defense molded case circuit breakersPower Defense Frame 2 Variable Depth Rotary Handle Mechanism Installation How-To VideoSpecifications and datasheetsEaton Specification Sheet - PDF34G0400P3DLTime/current curvesPower Defense time current curve Frame 3 - PD3Warranty guidesSelling Policy 25-000 - Distribution and Control Products and ServicesWhite papersImplementation of arc flash mitigating solutions at industrial manufacturing facilitiesMolded case and low-voltage power circuit breaker healthIntelligent circuit protection yields space savingsIntelligent power starts with accurate, actionable dataMaking a better machineSafer by design: arc energy reduction techniquesMolded case and low-voltage breaker healthEaton Corporation plc Eaton House30 Pembroke Road Dublin 4, Ireland © 2023 Eaton. All Rights Reserved. Eaton is a registered trademark.All other trademarks areproperty of their respectiveowners./socialmedia。

日置模拟兆欧表IR4000系列和35

日置模拟兆欧表IR4000系列和34
日置模拟兆欧表IR4000系列和3490的使用指南
日置HIOKI去年新推出了模拟兆欧表IR4000系列（单量程）和3490（3档量程）。

对于使用方面，现在我们向大家介绍一些小窍门，让您的实际测量变得更加方便和简单。

(1)你知道吗？　IR4000系列以及3490的「自动放电功能」
关于绝缘电阻计的主机上面“闪电”的标记。

这个闪电标识是指绝缘电阻计试验电压被发生时会有亮灯。

这个设置为了探头前端发生高电压时，提醒使用者注意安全。

但是，闪电标识并不只在电压发生时才亮。

实际上，在“自动放电”进行的时候也是亮的。

当然，这点在说明书里面也并没有说明，因为不需要特别在主机上面设定，可能一不小心就会忽略这个重要的功能。

那幺，所谓“自动放电功能”到底是个什幺样的功能呢？。

Panduit WGR4PK30 Fiber Optic Cabling Accessories说明

ONE (1) WYR-GRID CENTER SUPPORT BRACKET
B
TWO (2) FIBERRUNNER/WYR-GRID QUIKLOCK CLIP ASSEMBLY
B
ONE (1) TOP OF RACK STRUT ASSEMBLY
STRUT
41
TWO (2) M10 THREADED RODS TWO (2) RACK MOUNTING CLIPS
14.3 .56
25.2 .99
6.60 .26
A
02A 12-15-14 TWV DWR
SEE SHT ONE FOR REVISIONS
REV DATE BY CHK APR
DESCRIPTION
2
DETAIL A SCALE 1:2
11.1 .44
V09000DE ECN
TITLE
WYR-GRID 4 POST RACK MOUNT BRACKET
CHK
SCALE
DWR
NONE
DRAWING NUMBER:
14D421AA-DC
SIZE
SHT 2 OF 2
A
1
40 1.6
47 1.8
WYR-GRID CENTER SUPPORT BRACKET
A
02A 12-15-14 TWV DWR
RELEASED TO PRODUCTION
REV DATE BY CHK APR
DESCRIPTION
2
STRUT
WYR-GRID CENTER SUPPORT BRACKET
1.6
INCLUDES REQUIRED MOUNTING HARDWARE. 3. ALL DIMENSIONS IN PARENTHESES ARE INCHES.

Aristo Origo Feed 3004, Feed 4804 维修手册说明书

Aristo®,Origo™Feed 3004,Feed 4804维修手册0740800181CN20210316Valid for:serial no.745-,910-,236-,540-,628-xxx-xxxx目录请先阅读 (3)引言 (4)布线图 (5)部件说明 (5)Feed3004，Feed4804 (6)技术参数 (8)操作说明 (9)1MMC面板 (9)13AP1控制板(Control board) (10)13AP1:1电源 (11)13AP1:2启动/停止 (12)13AP1:3气阀 (12)13AP1:4马达驱动/制动 (13)13AP1:5脉冲生成器输入 (14)13AP1:6监测冷却水连接 (14)13AP1:7监测焊丝和气体 (15)13AP1:8CAN总线 (15)13AP1:9电弧电压感应 (16)13AP1:10推拉和I/O (16)13AP1部件位置 (17)CAN适配器选项 (19)MiggyTrac，RailTrac (19)带牵引电机的焊枪 (20)电路板布局、CAN适配器和过滤板(filter board) (20)连接说明 (21)遥控 (22)故障代码 (23)故障日志 (23)故障代码摘要 (23)故障代码描述 (24)维修说明 (26)什么是ESD？ (26)维修援助 (26)备件 (28)保留变更技术规范的权利，恕不另行通知。

请先阅读请先阅读保养和维修工作必须由有经验的人完成，而电气工作只能由经过培训的电工进行。

只有使用推荐的更换零件。

此维修手册适用于经过电气/电子培训的技术人员，对故障跟踪和维修相关工作很有帮助。

使用布线图作为操作描述的索引方式。

电路板被分成带有编号的方块，操作描述中将分别对各部分进行详细介绍。

部件描述中列出了布线图中的部件名称。

请以备件清单为向导，查找部件在设备中的位置。

备件清单在单独的文件中公布，请参阅本手册中的“备件清单”章节。

FPGA可编程逻辑器件芯片EP4SGX230KF40C3中文规格书

231–1 PRBS pattern This PRBS pattern (13)is based on the generator polynomial x 31+x 28 + 1For more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217•PMA Attribute Codes on page 2223.1.2. Receiver PMAThe receiver recovers the clock information from the received serial data, deserializes the high-speed serial data and creates a parallel data stream for either the receiver EHIP_LANE, EHIP_CORE, RS-FEC, or the FPGA core.The receiver portion of the PMA consists of the receiver buffer , the clock data recovery (CDR) unit, and the deserializer .3.1.2.1. Receiver BufferThe receiver buffer receives serial data from the input pins and feeds it to the clock data recovery (CDR) unit and deserializer .The receiver buffer supports the following features:•Programmable termination mode •Receiver equalizationFor more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217•PMA Attribute Codes on page 2223.1.2.1.1. Programmable Termination ModesTermination modes are programmable. However , the differential impedance values are fixed (as per the Ethernet standard specifications).The transceiver RX is AC-coupled on-chip. This on-chip AC-coupling capacitor cannot be bypassed, and DC-coupling protocols are not supported. For AC coupling requirement details, refer the Device Family Pin Connection Guidelines "E-Tile Pins"table.For more details on Register Read/Write support and programming, refer to PMA Register Map and PMA Attribute Codes to configure these parameters.Related Information•PMA Register Map on page 217(13)This polynomial generates data patterns whose run lengths are up to 31 1s or 30 0s in a row.The pattern repeats every 231–1 bits (approximately 2.15 Gbits).3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send Feedback•PMA Attribute Codes on page 222•Intel Stratix 10 Device Family Pin Connection Guidelines •Intel Agilex Device Family Pin Connection Guidelines3.1.2.1.2. RX Adaptation ModesThe E-tile supports the initial and continuous adaptation modes.Table 41.E-Tile Receiver PMA RX Adaptation Modes ModeDescription Initial adaptation During initial adaptation, the adaptation engine adapts all of the RX analog front end (AFE) parameters to optimize the receiver eye opening and adjusts the vertical and horizontal sampling location accordingly.•This mode calibrates the PMA to known good settings.•It is disruptive tuning and impacts the data traffic.Run initial adaptation under either of the following conditions:•On device configuration. Refer to PMA Bring Up Flow for more detail.•When there is change in the physical channel between TX and RX.•During debug, when you switch back and forth between internal serial loopback and mission mode and the BER readout is exceptionally high, Intel recommends that you issue a PMA reset followed by loopback mode and initial adaptation.Continuous adaptationThe goal of this adaptation is to maintain the signal quality at the sampler close to the initial adaptation over time and temperature.•This mode is run only after running initial adaptation during PMA bring up.•This mode tracks the temperature over time by continuously adapting new values of the RX AFE parameters.•This mode is a continuous and non-disruptive process, that is, it does not impact the data traffic.•During a link debug process with the hard PRBS generator and verifier , you cannot read out accumulated errors from the error counter unless you stop continuous adaptation. Details on PMA code and value to stop continuous adaptation are available in the PMA Register Map .For more details on Register Read/Write support and programming, refer to PMA Receiver Equalization Adaptation Usage Model and 0x000A: Receiver Tuning Controls to configure these parameters.3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send FeedbackTable 42.PMA Parameter Description and RangeThis table lists all PMA parameters that can be optimized either manually or by the adaptation tuning engine.Some of these parameters are tuned by the adaptation tuning engine during initial adaptation and continuous adaptation as shown below. You can also manually specify some of these parameters. To avoid getting your manually optimized parameter overwritten by the adaptation tuning engine, you must fix the parameter . Refer to PMA Avalon Memory-Mapped Interface Registers and PMA Receiver Equalization Adaptation Usage Model to understand how the parameter can be fixed such that it is not overwritten by the adaptation engine.ParameterMin Max Initial Adaptation Continuous Adaptation Manual Optimization Possible Firmware Default GainLF015Yes Yes Yes 8CTLE LF Min015N/AN/A Yes 0CTLE LF Max015N/A N/A Yes 15GainHF015Yes Yes Yes 0CTLE HF min015N/A N/A Yes 0CTLE HF max015N/A N/A Yes 15GS103No No Yes 0GS203No No Yes 0RF_P2-10(14)10Yes No No 0RF_P2_MIN-10(14)10N/A N/A Yes -10RF_P2_MAX-10(14)10N/A N/A Yes 10RF_P1015Yes Yes No 0RF_P1_MIN015N/A N/A Yes 0RF_P1_MAX015N/A N/A Yes 15RF_P0-15(14)15Yes Yes No 0RF_B108Yes Yes Yes 0RF_B005Yes Yes Yes 0RF_B0T050No No Yes 0RF_A - NRZ100160No No Yes 160RF_A - PAM4100160No No Yes 130PMA Initial Adaptation Effort Status•0 = Low Effort (00_effort) is for NRZ Ethernet AN/LT and CPRI protocols only and is the quickest to complete. This meets the 500 ms compliance time for Ethernet and 100 ms compliance time for CPRI.• 1 = Medium Effort (05_effort) is for the PAM4 Ethernet AN/LT protocol only, to meet the IEEE link-up time of 3 seconds.•2 = Full Effort (10_effort) is for general usage (NRZ and PAM4), to provide the best performance and stability, but takes the most time to complete compared to other initial adaptation efforts. This is the recommended adaptation mode.See the "Loading PMA Configuration Register START_ADAPTATION" figure.(14)Two’s complement, 16-bits3.E-Tile Transceiver PHY ArchitectureUG-20056 | 2021.02.10Send Feedback。

REF3033AIDBZRG4中文资料

PRODUCT REF3012
PACKAGE-LEAD SO T23-3
"
REF3020
"
SOT23-3
"
DBZ
"
–40°C to +125°C
"
R30B
"
REF3025
"
SOT23-3
"
DBZ
"
–40°C to +125°C
"
R30C
"
REF3030
"
SOT23-3
"to +125°C
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
FEATURES
q MicroSIZE PACKAGE: SOT23-3 q LOW DROPOUT: 1mV q HIGH OUTPUT CURRENT: 25mA q HIGH ACCURACY: 0.2% q LOW IQ: 50µA max q EXCELLENT SPECIFIED DRIFT PERFORMANCE: 50ppm/°C (max) from 0°C to +70°C 75ppm/°C (max) from –40°C to +125°C

g4pf50w场效应管引脚定义

g4pf50w场效应管引脚定义
1）NPN型三极管，适合射极接GND集电极接负载到VCC的情况。

只要基极电压高于射极电压（此处为GND）0.7V，即发射结正偏（VBE为正），NPN型三极管即可开始导通。

基极用高电平驱动NPN型三极管导通（低电平时不导通）；基极除限流电阻外，更优的设计是，接下拉电阻10-20k到GND；优点是，①使基极控制电平由高变低时，基极能够更快被拉低，NPN型三极管能够更快更可靠地截止；②系统刚上电时，基极是确定的低电平。

（2）PNP型三极管，适合射极接VCC集电极接负载到GND的情况。

只要基极电压低于射极电压（此处为VCC）0.7V，即发射结反偏（VBE为负），PNP型三极管即可开始导通。

基极用低电平驱动PNP型三极管导通（高电平时不导通）；基极除限流电阻外，更优的设计是，接上拉电阻10-20k到VCC；优点是，①使基极控制电平由低变高时，基极能够更快被拉高，PNP型三极管能够更快更可靠地截止；②系统刚上电时，基极是确定的高电平。

对NPN三极管来说，最优的设计是，负载R12接在集电极和VCC之间。

不够周到的设计是，负载R12接在射极和GND之间。

对PNP三极管来说，最优的设计是，负载R14接在集电极和GND之间。

不够周到的设计是，负载R14接在集电极和VCC之间。

这样，就可以避免负载的变化被耦合到控制端。

从电流的方向
可以明显看出。

4054 中文说明书(2)

４０５４产品规格书拟稿审核批准TP4054 线性锂离子电池充电器描述TP4054是一款完整的单节锂离子电池采用恒定电流/恒定电压线性充电器。

其SOT 封装与较少的外部元件数目使得4054成为便携式应用的理想选择。

4054可以适合USB 电源和适配器电源工作。

由于采用了内部PMOSFET 架构，加上防倒充电路，所以不需要外部检测电阻器和隔离二极管。

热反馈可对充电电流进行调节，以便在大功率操作或高环境温度条件下对芯片温度加以限制。

充电电压固定于4.2V ，而充电电流可通过一个电阻器进行外部设置。

当充电电流在达到最终浮充电压之后降至设定值1/10时，4054将自动终止充电循环。

当输入电压（交流适配器或USB 电源）被拿掉时，4054自动进入一个低电流状态，将电池漏电流降至2uA 以下。

也可将4054置于停机模式，以而将供电电流降至45uA 。

4054的其他特点包括充电电流监控器、欠压闭锁、自动再充电和一个用于指示充电结束和输入电压接入的状态引脚。

特点 ·高达800mA 的可编程充电电流； ·无需MOSFET、检测电阻器或隔离二极管；·用于单节锂离子电池、采用SOT23-5封装的完整线性充电器；·恒定电流/恒定电压操作，并具有可在无过热危险的情况下实现充电速率最大化的热调节功能；·直接从USB 端口给单节锂离子电池充电； ·精度达到±1%的4.2V 预设充电电压； ·用于电池电量检测的充电电流监控器输出； ·自动再充电；·充电状态输出引脚； ·C/10充电终止；·待机模式下的供电电流为45uA； ·2.9V涓流充电器件版本； ·软启动限制了浪涌电流； ·采用5引脚SOT-23封装。

应用 ·蜂窝电话、PDA、MP3播放器； ·充电座； ·蓝牙应用。

数字调功器减少能源损耗

使用Spang 853型数字式可功硅功率控制器有效减少制造过程中的电能消耗在美国，数字式可控硅调功器的广泛使用，为工业加热领域的用户节省了大量电能费用，这些对数字化设备的投资所增加的费用可以在一到两个月的运行中所节省的电费中收回。

这里的例子是，数字式可控硅功率控制技术成功地在玻璃镀膜这类深加工项目中得到使用。

在一个由两台新电炉组成的镀膜玻璃设备的扩建项目中使用了数字化技术，直接导致每月电费成本节省超过2000美元。

数字式可控硅功率控制器使用过零控制模式带变压器从而驱动加热元件。

传统设计中为了避免因为变压器的磁饱和损坏变压器，只能使用移相控制模式为加热元件供电。

背景说明Signature 真空系统公司得到的一个合同中，要为用户的扩建工程项目建造两台真空电炉。

为了最大限度地节约电能，Signature 真空系统公司决定采用过零触发的功率控制器来控制电炉的热量输入。

控制器选择了世邦电力电子公司制造的853型三相数字式交流功率控制器 (见Fig.1).选择Spang 公司的853型数字式功率控制器的原因之一是它能够任意选择使用移相点火或过零点火模式以及自动组合峰值功率优化。

这样的选择可以保证在开始时使用（传统的）移相点火方式，以后再改为过零点火方式工作。

这种灵活性让我们很容易对不同的控制模式产生的系统电气参数和最终的电费进行对比。

用户已经习惯了过去的移相控制的系统。

采用多模式的853型数字式功率控制器，电炉控制系统允许操作人员使用习惯的移相控制模式，也可以任意切换到过零点火控制模式。

这种转换可以通过Modbus 串行接口的本地控制器或在控制室中通过总线连接的软件实现。

这中灵活性让电炉操作人员能够读取移相控制模式下的电流，电压值，然后再切换到过零控制模式，看到减小了的电流，电压值，充分理解节能的效果。

电炉加热区的额定规格如下:• 输入电压: 480 V AC• 输出电压: 45 V AC• 输出电流: 2,566 A AC• 额定功率: 200kW 使用镍鉻合金加热元件三套加热系统的交流动力中心图1. Spang 853系列数字式可控硅调功器每台电炉包括两套200KW 的加热回路，两台电炉共4套加热系统合计总功率800 kW. 电炉运行时，大多数运行时间的实际功率消耗约为额定功率的50%. 这种电炉每个加热区使用一个独立的动力系统。

GNDRDBSDBSDARDAF...

目录第一章产品概述.........................................................................................................................1 1.1 功能 ...............................................................................................................................1 1.2 一般规格 ........................................................................................................................1 1.3 各部分名称.....................................................................................................................2 1.4 外型尺寸及安装方法 ......................................................................................................4第二章编辑软件 MD20...............................................................................................................5 2.1 MD20基本概述 ..............................................................................................................5 2.2 编辑用户画面 .................................................................................................................5 2.3 保存工程 ......................................................................................................................29 2.4 下载画面 ......................................................................................................................30 2.5 导入旧工程..................................................................................................................30第三章操作方法.......................................................................................................................32 3.1 联机通讯 ......................................................................................................................32 3.2 切换画面 ......................................................................................................................32 3.3 系统口令 ......................................................................................................................32 3.4 修改数据 ......................................................................................................................33 3.5 开关量控制...................................................................................................................34第四章与 PLC 的连接方法 .......................................................................................................35 4.1 三菱 FX 系列 ................................................................................................................35 4.2 西门子 S7-200 系列 .....................................................................................................36 4.3 欧姆龙 C 系列 ..............................................................................................................36 4.4 OMRON CP1H 系列 ............................................................................................................... 37 4.5 施耐德 NEZA/TWIDO 系列 ..........................................................................................39 4.6 台达 DVP 系列 ............................................................................................................40 4.7 松下 FP 系列 ................................................................................................................40 4.8 LG Master-K CNet 系列 ...............................................................................................41 4.9 LG 系列 Modbus 协议 ................................................................................................42 4.10 LG Master-K 120S 编程口通讯 .................................................................................43 4.11 FACON 永宏系列 .......................................................................................................43 4. 12 光洋 S 系列 ..............................................................................................................44 4.13 ECOSTEP 系列 ........................................................................................................45 4.14 AB Micrologix 系列.....................................................................................................46 4.15 MODBUS RTU/ASCII/EMERSON/RTU EXTEND .....................................................47 4.16 MODBUS SERVER ...................................................................................................48 4.17 自由协议 ........................................................................................................49 4.18 SAIA PCD S-BUS 协议 ..............................................................................................50 4.19 VIGOR PLC...............................................................................................................51 4.20 EMERSON EC20 系列 PLC ......................................................................................51Created with novaPDF Printer (). Please register to remove this message.文本显示器MD204L V4 用户手册4.21 KEYENCE KV 系列 PLC............................................................................................52 4.22 KEYENCE KV 系列 PLC...................................................................... 错误！未定义书签。

英吉尔兰公司T30模型2340两阶段工业空气压缩机零件清单说明书

©Ingersoll-Rand Company Printed in U.S.A.Form SCD-749August1998 PARTS LISTT30MODEL2340TWO STAGEINDUSTRIALAIR COMPRESSOR4 PRESSOR FRAME ASSEMBLY.NOTE:ITEMS30,31,32&33PROVIDED IF LOW OIL LEVEL SWITCH IS SUPPLIED.FIGURE2.HIGH PRESSURE VALVE PLATE ASSEMBLY.FIGURE3.LOW PRESSURE VALVE PLATE ASSEMBLY.FIGURE4.MODEL2340BARE COMPRESSOR.FIGURE5.INTERCOOLER ASSEMBLY&TUBING.(CLOCKWISE ROTATING UNIT SHOWN BELOW.)11R E F .N O .P A R T N U M B E R (Q T Y .)D E S C R I P T I O N Q T Y .2340D 22340N 22340D 3H 2340D 32340N 32340L 57-1324987683249649932498768322518373249649932498933A S S E M B L Y ,R E C E I V E R 17-2320271203202712032027120320271203202712032027120V A L V E ,M A N U A L D R A I N 17-3322235963222359632223596322235963222359632223596V A L V E ,B A L L —S E R V I C E V A L V E 17-4971628129716281297162812971628129716281297333165V A L V E ,C H E C K 17-5313856933138569331385693321747993138569331385693V A L V E ,S A F E T Y /R E L I E F —R E C E I V E R 17-6321742863217428632174286321742863217428632174286V A L V E ,S A F E T Y /R E L I E F —D I S C H A R G E 17-7320138723201387232013872320138723201387232499816G A U G E ,P R E S S U R E —300P S I G17-832037566**32037566**32036592**32036592**32036592**32295529**M O T O R ,E L E C T R I C —230/460-3-60O D P17-932110660**32110660**32281768**32281768**32281768**32184350**P U L L E Y ,M O T O R17-1032190019**32190019**32190076**32190076**32190076**32496903**S T A R T E R (I F S U P P L I E D )—N E M A 4230-3-6017-1195099503**95099503**95099503**95099503**95099503**95099503**B E L T ,D R I V E17-123700590737005907370059073700590737005907++S W I T C H ,P R E S S U R E —N E M A 117-13R E F .R E F .R E F .R E F .R E F .R E F .B E L T G U A R D —S H E E T M E T A L T Y P E (S E E F I G .10,P G .16)17-13R E F .R E F .R E F .R E F .R E F .R E F .B E L T G U A R D —W I R E T Y P E (S E E F I G .9,P G .14)17-14R E F .R E F .R E F .R E F .R E F .R E F .A F T E R C O O L E R ,A I R C O O L E D (S E E F I G .10,P G .16)+++17-15R E F .R E F .R E F .R E F .R E F .R E F .V A L V E ,A U T O M A T I C D R A I N (I F S U P P L I E D .S E E F I G .11,P G .18)17-16323122663231227432312266323122663231227432498180A S S E M B L Y ,T U B E -C O M P R E S S O R T O R E C E I V E R1**=P A R T N U M B E R V A R I E S .S U P P L Y M O D E L N U M B E R ,S E R I A L N U M B E R A N D C O M P L E T E M O T O R N A M E P L A T E D A T A W H E N O R D E R I N G .R E F .=R E F E R E N C E P A G E N U M B E R (S )G I V E N I N D E S C R I P T I O N C O L U M N .A C A C =A I R C O O L E D A F T E R C O O L E R++=U S E 32498891F O R S I N G L E P H A S E M O T O R ;U S E 32147738F O R T H R E E -P H A S E M O T O R+++=A C A C C A N N O T B E M O U N T E D O N W I R E B E L T G U A R D .13R E F .N O .P A R T N U M B E R (Q T Y .)D E S C R I P T I O N Q T Y .2-2340D 22-2340D 38-13225189432251894A S S E MB L Y ,R EC E I V E R18-23202712032027120V A L V E ,M A N U A L D R A I N18-33222359632223596V A L V E ,B A L L —S E R V I C E V A L V E18-49716281297162812V A L V E ,C H E C K18-53138569331385693V A L V E ,S A F E T Y /R E L I E F —R E C E I V E R (200P S I G )18-63217428632174286V A L V E ,S A F E T Y /R E L I E F —D I S C H A R G E (325P S I G )28-73249981632499816G A U G E ,P R E S S U R E —300P S I G28-832037566**32036592**M O T O R ,E L E C T R I C —230/460-3-60O D P28-932110660**32281768**P U L L E Y ,M O T O R28-1032237133**32237141**A L T E R N A T O R (I F S U P P L I E D )—230-3-6018-1195099503**95099503**B E L T ,D R I V E28-123700590737005907S W I T C H ,P R E S S U R E —N E M A 1(175P S I G )28-13R E F .R E F .B E L T G U A R D —S H E E T M E T A L T Y P E (S E E F I G .10,P G .16)28-13R E F .R E F .B E L T G U A R D —W I R E T Y P E (S E E F I G .9,P G .14)28-14R E F .R E F .A F T E R C O O L E R ,A I R C O O L E D (S E E F I G .10,P G .16)+++28-15R E F .R E F .V A L V E ,A U T O M A T I C D R A I N (I F S U P P L I E D .S E E F I G .11,P G .18)18-163231228232312282A S S E MB L Y ,T U B E —C O M P R E S S O R T O R E C E I V E R2**=P A R T N U M B E R V A R I E S .S U P P L Y M O D E L N U M B E R ,S E R I A L N U M B E R A N D C O M P L E T E M O T O R N A M E P L A T E D A T A W H E N O R D E R I N G .A C A C =A I R C O O L E D A F T E R C O O L E RR E F .=R E F E R E N C E P A G E N U M B E R (S )G I V E N I N D E S C R I P T I O N C O L U M N .++=U S E 32498891F O R S I N G L E P H A S E M O T O R ;U S E 32147738F O R T H R E E -P H A S E M O T O R+++=A I R C O O L E D A F T E R C O O L E R C A N N O T B E M O U N T E D O N W I R E B E L T G U A R D .14F IG U R E 9.T Y P I C A L W I R E B E L T G U A R D .R E F .N O .P A R T N U M B E R (Q T Y .)D E S C R I P T I O N2340X 2H 2340X 22340X 3H 2340X 32340D 22340D 3H 2340D 32340L 52340N 22340N 32-2340D 22-2340D 39-132310872(1)32310872(1)32499162(1)32310872(1)32310872(2)B AC K ,B E L T G U A RD —W I RE T Y P E B E L T G U A R D9-232310880(1)32310880(1)32499170(1)32310880(1)32310880(2)C O V E R ,B E L T G U A RD —W I RE T Y P E B E L T G U A R D9-332496093(4)32496093(4)32496093(4)32496093(4)32496093(4)C L I P ,P L A S T I C —W I R E T Y P E B E L T G U A R D9-432295321(1)32295321(1)32295321(1)32295321(1)32295321(1)B R AC E ,B E L T G U A RD —W I RE T Y P E B E L T G U A R D9-532164634(5)32164634(5)97331458(4)32164634(5)32164634(5)C A P S C R E W9-695294278(5)95294278(5)95294278(1)95294278(5)95294278(5)W A S H E R9-739128558(5)39128558(5)39128558(1)39128558(5)39128558(5)N U T ,W H I Z -L O C K9-8——32164634(1)——C A P S C R E W15(T h i s p a g e i n t e n t i o n a l l y l e f t b l a n k )16F IG U R E 10.B E L T G U A R D &A I R C O O L E D A F T E R C O O L E R .17B E L T G U A R D &A I RC O O L ED A F TE R C O O L E RR E F .N O .P A R T N U M B E R (Q T Y .)D E S C R I P T I O N2340X 2H 2340X 22340X 3H 2340X 32340D 22340D 3H 2340D 32340N 22340N 32-2340D 22-2340D 310-132281040(1)32281040(1)32281040(1)32281040(2)B A C K ,B E L T G U A R D —S H E E T M E T A L B E L T G U A R D10-232000705(4)32000705(4)32000705(4)32000705(8)S C R E W ,T A P P I N G —1/4X 3/4"10-332281073(1)32281073(1)32281073(1)32281073(2)C O V E R ,A C A C 10-432187056(14)32187056(14)32187056(14)32187056(28)S C R E W ,S E L F -D R I L L I N G 10-532498149(1)32498149(1)32498149(1)32498149(2)C O I L ,A C A C 10-632295321(2)32295321(2)32295321(2)32295321(4)B R A C E ,B E L T G U A R D —S H E E T M E T A L B E L T G U A R D 10-7——95083226(1)95083226(2)C O N N E C T O R —5/8X 1/2"10-895031795(1)95031795(2)95031795(1)95031795(2)E L B O W ,T U B E —5/8X 1/2"10-9—97162812(1)97162812(1)97162812(1)V A L V E ,C H E C K —3/4X 1/2"10-1032498206(1)32498206(1)32498206(1)32498206(2)T U B E ,C O M P R E S S O R T O A F T E R C O O L E R 10-11—32498214(1)32498222(1)32498230(2)T U B E ,A F T E R C O O L E R T O R E C E I V E R 10-1232174286(1)32174286(1)32174286(1)32174286(2)V A L V E ,S A F E T Y /R E L I E F N I —95006540(1)——T E E ,P I P E —1/2"N I —95033593(1)95033593(1)95033593(2)P L U G ,P I P E —1/4"N I ———32186421(2)B U S H I N G ,R E D U C I N G —1X 3/4"N I ———95006565(1)T E E ,P I P E —1"N I ———95408787(1)N I P P L E ,L O N G —1X 3-1/2"N I ———32131724(2)C O U P L I N G ,P I P E —1"18T h e a u t o m a t i c d r a i n v a l v e r e m o v e s c o n d e n s e d w a t e r a n d o i l f r o m c o m p r e s s e d a i r s y s t e m s w i t h o u t r e s t r i c t i n g a i r f l o w ,c r e a t i n g p r e s s u r e d r o p s o r o p e n i n g t h e s y s t e m t o t h e a t m o s p h e r e .I t s u n i q u e d e s i g n m a i n t a i n s s y s t e m s p r e s s u r e a n d v o l u m e d u r i n g o p e r a t i o n ,a n d i n c r e a s e s p r o d u c t i v i t y .*T h e h i g h c a p a c i t y r e s e r v o i r g i v e s t h e a u t o m a t i c d r a i n v a l v e t w i c e a s m u c h c o n d e n s a t e s t o r a g e c a p a c i t y d u r i n g t h e p u m p i n g c y c l e .T h i s l a r g e r r e s e r v o i r i s a v a i l a b l e a s a n u p g r a d e .A l a r g e r r e s e r v o i r i s r e c o m m e n d e d f o r u s e o n h e a v i l y -l o a d e d s i m p l e x c o m p r e s s o r s w i t h l o n g p u m p i n g c y c l e s a n d /o r o p e r a t i n g i n e x t r e m e l y h u m i d e n v i r o n m e n t s .I f t h e p u m p i n g c y c l e e x c e e d s o n e h o u r ,t h e n a n e l e c t r i c t i m e r k i t s h o u l d b e u s e d.F IG U R E 11.A U T O M A T I C D R A I N V A L V E R E P L A C E M E N T P A R T S .A U T O M A T I C D R A I N V A L V E T I M E R K I T SA n a u t o m a t i c d r a i n v a l v e t i m e r k i t r e s o l v e s a p p l i c a t i o n p r o b l e m s i n w h i c h a n e x i s t i n g a u t o m a t i c d r a i n v a l v e c y c l e s t o o i n f r e q u e n t l y .A t i m e r g e n e r a t e s t h e p n e u m a t i c s i g n a l s f o r a c t u a t i n g t h e a u t o m a t i c d r a i n v a l v e .W i t h a t i m e r ,t h e a u t o m a t i c d r a i n v a l v e o p e r a t e s i n d e p e n d e n t l y o f t h e c o m p r e s s o r u n l o a d c y c l e s .19M A I N T E N A N C E P A K SM a i n t e n a n c e p a k s c o n t a i n a l l t h e p a r t s n e c e s s a r y f o r o n e c o m p l e t e r o u t i n e m a i n t e n a n c e s e r v i c e o f y o u r c o m p r e s s o r .A l l -S e a s o n T 30S e l e c t l u b r i c a n t ,a i r f i l t e r e l e m e n t s ,g a s k e t s ,d r i v e b e l t s ,a n d i n s t r u c t i o n s a r e s t a n d a r d w i t h a l l m a i n t e n a n c e p a k s .V I B R A T I O N I S O L A T O R P A D SV i b r a t i o n i s o l a t o r p a d s a r e d e s i g n e d t o a b s o r b 40%-60%o f t h e s o u n d a n d v i b r a t i o n o f y o u r c o m p r e s s o r .S P -N R :S t e e l p l a t e b o n d e d b e t w e e n a N R p a d a n d a n o n -s k i d o i l -r e s i s t a n t r i b b e d n e o p r e n e t o p p a d .N R C :T w o r i b b e d n e o p r e n e p a d s b o n d e d t o ½”c o r k p a d .C R A N K C A S E H E A T E R K I T SC r a n k c a s e h e a t e r s a re r e c o m m e n d e d w h e n a m b i e n t t e m p e r a t u r e s a r e c o n s i s t e n t l y b e l o w 32°F (0°C ).A n e a s y -t o -i n s t a l l e x t e r n a l c r a n k c a s e h e a t e r k i t i s i n t e n d e df o r a f t e r m a r k e t u s e .T w o k i t s m a y b e r e q u i r e d f o r s o m e a p p l i c a t i o n s .C O M P R E S S O R L U B R I C A N TA l l S e a s o n T 30S e l e c t ®i s a n a l l -t e m p e r a t u re d i e s t e r s y n t h e t i c l u b r i c a n t t h a t i sf o r m u l a t e d f o r e x c e p t i o n a l l u b r i c a t i o n a t l o w ,n o r m a l a n d h igh o p e r a ti n g t e m p e r a t u r e s .S T E P S A V E R K I T SS t e p S a v e r K i t s p r o v i d e a l l o f t h e p a r t s r e q u i r e d t o p e r f o r m c o m m o n r e p a i r o r s c h e d u l e d m a i n t e n a n c e t a s k s ,s u c h a s p i s t o n r i n g r e p l a c e m e n t o r v a l v e r e p l a c e m e n t .S T A R T -U P K I T SE a c h s t a r t -u p k i t c o n t a i n s t h e n e c e s s a r y q u a n t i t i e s o f A l l S e a s o n T 30S e l e c t l u b r i c a n t a n d a i r f i l t e r e l e m e n t (s )t o s t a r t -u p a n d m a i n t a i n y o u r c o m p r e s s o r f o r t h e f i r s t y e a r .S t a r t -U p k i t s f o r g a s o l i n e e n g i n e d r i v e n m o d e l s a l s o i n c l u d e a r e p l a c e m e n t e n g i n e a i r f i l t e r ,e n g i n e o i l f i l t e r ,a n d e n g i n e l u b r i c a n t .S e e t h e e n g i n e m a n u f a c t u r e r ’s i n s t r u c t i o n s f o r m o r e d e t a i l e d e n g i n e c a r e i n f o r m a t i o n .P A R T N U M B E RD E S C R I P T I O N32305880K I T ,S T A R T -U P —234020LOOK WHAT INGERSOLL-RAND CAN DO FOR YOU!Efficient Field ServiceWe maintain a highly trained staff of technicians toservice your equipment for preventivemaintenance,or to assist you should emergenciesever occur.Complete Repair ServiceOur trained technicians will repair or overhaul yourequipment to factory specifications,using onlygenuine I-R parts.Special Engineering ServiceWe can help you identify and solve your problemsby evaluating your needs and recommending theproper equipment to give you maximum efficiency.Spare PartsBy stocking genuine I-R spare parts,we can helpyou avoid costly delays or substituting inferioring genuine I-R parts on you I-Requipment will help to keep even older equipmentrunning in good-as-new condition.Complete Stock of EquipmentWe carry a complete line of I-R equipment andaccessories designed to meet any compressed airapplication.We are backed by I-R’s promptfactory shipment to ensure you on-time delivery.A SUBSTITUTE IS NOT A REPLACEMENT!Ensure you get peak performance and longevity out of your Ingersoll-Rand product by insisting on genuine Ingersoll-Rand replacement parts and maintenance kits.Not only are the replacement parts made to precise dimensions and OEM-specified metallurgy,but each part is backed by the Ingersoll-Rand warranty.Your local Air Center,Distributor,or direct Ingersoll-Rand salesperson will work with you to ensure you get the parts you need to do the job right.Equip your machines with only the best—Ingersoll-Rand genuine parts.NOTE:THE USE OF REPAIR PARTS OTHER THAN THOSE INCLUDED WITHIN THE INGERSOLL-RAND COMPANY APPROVED PARTS LIST MAY CREATE UNSAFE CONDITIONS OR MECHANICAL FAILURES OVER WHICH INGERSOLL-RAND COMPANY HAS NO CONTROL.INGERSOLL-RAND COMPANY SHALL BEAR NO RESPONSIBILITY FOR EQUIPMENT ON WHICH NON-APPROVED REPAIR PARTS ARE INSTALLED.The manufacturer reserves the right to make changes or add improvements without notice and without incurring any obligation to make such changes to products previously sold.。

光敏二极管SGPD30C产品手册说明书

产品说明书平面贴片光敏二极管:SGPD30C⏹特点․快速响应․高感光灵敏度․较小的结电容․无铅环保，符合RoHS标准⏹描述SGPD30C是一款高速高灵敏度光敏二极管，具有较低结电容,小型化贴片(SMT)式结构,用透明环氧材料封装，长时间使用无测量参数衰减,可实用于多种不同用途,如声音传送、视频记录、遥控、测量、控制等。

⏹应用․高速光学传感器․复印机․光学仪器仪表․电梯、升降机正极负极Flat area 0.3 min.注: 1. 所有尺寸单位为毫米(英寸) 2. 未注明误差的尺寸±0.25mm(0.01英寸)⏹封装尺寸⏹极限参数(Ta=25℃)参数符号参数值单位反向电压VR 30V 耗散功率Pd 150mW 焊接温度Tsol 260℃工作温度Topr -25~+85℃存储温度Tstg-40~+85℃Ambient Temperature Ta(°C)P o w e r D i s s i p a t i o n (m W )5020020406080100-20-401001501008060200100Wavelength(nm)R e l a t i v e S p e c t r a l S e n s i t i v i t y (%)Ta=25°4030050070090011001300⏹光电参数(Ta=25℃)参数符号条件最小典型最大单位光谱带宽λ0.5---400---1100nm 感光峰值波长λp ------940---nm 开路电压V OC Ee=5m W/cm 2λp=940nm ---0.35---V短路电流I SC Ee=5m W/cm 2λp=940nm ---95---μA反向亮电流I LEe=5m W/cm 2λp=940nm V R =5V 8095---μA暗电流Id Ee=0m W/cm 2V R =10V------10nA反向击穿电压BV R Ee=0m W/cm 2I R =100μA 30------V 总计电容CtEe=0m W/cm 2V R =3V f=1MHZ ---25---pF 上升/下降时间t r /t fV R =10V R L =1K Ω50/50nS⏹光电特性曲线图.1耗散功率与环境温度图.2相对频谱灵敏度400Ambient Temperature Ta(°C)R e v e r s e D a r k C u r r e n t (n A )608010020101001000V =10V R1Reverse Voltage (V)T e r m i n a l C a p a c i t a n c e C t (p F )101000.120406080f=1MHz V =3V Ee=0mW cmR2/10Load Resistance R L ( )R e s p o n s e T i m e t r ,t f (u s )10310410101101010101010-3V =10V RT =25 Ca °Ω160120804002.55.07.5Ee(mW/cm )R e v e r s e L i g h t C u r r e n t (u A )10.02V =5V Rλ=940nm图.3暗电流与环境温度图.4反向感光电流与辐射强度图.5结电容与反向电压图.6响应时间与负载电阻注: 1. 所有尺寸单位为毫米(英寸)正极负极注: 1. 所有尺寸单位为毫米(英寸) 2. 未注明误差的尺寸为 ± 0.1mm(.004")⏹包装尺寸⏹载带尺寸图（数量：1000个/盘）注意事项:1.我公司保留更改产品材料和以上说明书的权利，更改以上产品说明书恕不另行通知。

计算机控制(1)

电力器件及特点SCR半控型器件GTR全控型器件GTO电流型器件; 双极性器件MOSFET电压驱动型器件; 单极性器件SCR导通条件：Ua >0，Ia>I2，有足够功率的触发脉冲，三个条件同时满足。

SCR关断条件：Ua <0，或Ia<Ih晶闸管导通的条件，维持晶闸管导通的条件及怎样才能使其由导通变为关断？使晶闸管导通的条件：晶闸管承受正向阳极电压，并在门极施加触发电流（脉冲）维持晶闸管导通的条件：使晶闸管的电流大于能保持晶闸管导通的最小电流，即维持电流。

要使晶闸管由导通变为关断：可利用外加电压和外电路的作用使流过晶闸管的电流降到接近于零的某一数值以下，即降到维持电流以下，便可使导通的晶闸管关断。

IGBT、GTR、GTO和电力MOSFET的驱动电路各有什么特点？答：IGBT驱动电路的特点是：驱动电路具有较小的输出电阻，IGBT是电压驱动型器件，IGBT的驱动多采用专用的混合集成驱动器。

GTR驱动电路的特点是：驱动电路提供的驱动电流有足够陡的前沿，并有一定的过冲，这样可加速开通过程，减小开通损耗，关断时，驱动电路能提供幅值足够大的反向基极驱动电流，并加反偏截止电压，以加速关断速度。

GTO驱动电路的特点是：GTO要求其驱动电路提供的驱动电流的前沿应有足够的幅值和陡度，且一般需要在整个导通期间施加正门极电流，关断需施加负门极电流，幅值和陡度要求更高，其驱动电路通常包括开通驱动电路，关断驱动电路和门极反偏电路三部分。

电力MOSFET驱动电路的特点：要求驱动电路具有较小的输入电阻，驱动功率小且电路简单。

3、试说明IGBT、GTR、GTO和电力MOSFET各自的优缺点答：IGBT优点：开关速度高，开关损耗小，具有耐脉冲电流冲击的能力，通态压降较低，输入阻抗高，为电压驱动，驱动功率小。

缺点：开关速度低于电力MOSFET，电压，电流容量不及GTO。

GTR 优点：耐压高，电流大，开关特性好，通流能力强，饱和压降低。

M37920S4CGP中文资料

M37920S4CGPPR E L I M I NAR Y N o t i c e : T h i s i s n o t a f i n a l s p e c i f i c a t i o n.S o me p a r a m e t r i c l i m i t sa r e s ub j ec t t o c h a n g e .16-BIT CMOS MICROCOMPUTERMITSUBISHI MICROCOMPUTERSDESCRIPTIONThe M37920S4CGP is a single-chip microcomputers designed with high-performance CMOS silicon gate technology. These are housed in 100-pin plastic molded QFP. This microcomputer supports the 7900 Series instruction set, which are enhanced and expanded in-struction set and are upper-compatible with the 7700/7751 Series in-struction set.The CPU of this microcomputer is a 16-bit parallel processor that can also be switched to perform 8-bit parallel processing. Also, the bus interface unit of this microcomputer enhance the memory access ef-ficiency to execute instructions fast. This microcomputer include the 4-channel DMA controller and the DRAM controller with enhanced fast page mode. Therefore, this microcomputer are suitable for of-fice, business, and industrial equipment controller that require fast processing of large data.DISTINCTIVE FEATURES<Microcomputer mode>•Number of basic machine instructions ....................................203•MemoryRAM .............................................................................2048 bytes ROM .................................................................................External•Instruction execution time The fastest instruction at 20 MHz frequency ........................50 ns •Single power supply ....................................................5 V ± 0.5 V •Interrupts ...........6 external sources, 17 internal sources, 7 levels •Multi-functional 16-bit timer ...................................................5 + 3•Serial I/O (UART or Clock synchronous).....................................2•10-bit A-D converter ............................................4-channel inputs •DMA controller..............................................................4-channels •DRAM controller •Real-time output....4 bits × 2 channels, or 6 bits × 1 channel + 2 bits × 1 channel •12-bit watchdog timer•Programmable input/output (ports P2–P9, P12) (49)APPLICATIONTelecommunications equipment such as copiers, printers, typewrit-ers, facsimiles, optical disk drives, HDD, mobile radio communica-tion equipment, ISDN terminalsControl devices for office automation equipment such as personal computersOutline 100P6S-AM37920S4CGP PIN CONFIGURATION (TOP VIEW)↔ D 0123456789101112131415161718192021222324252627282930P 66/D M A R E Q 3 ↔P 65/T A 4I N /D M A R E Q 2 ↔P 64/T A 4O U T /D M A A C K 2 ↔P 60/T A 1O U T /D M A A C K 0 ↔P 57/T A 2I N /R T P 13 ↔P 56/T A 2O U T /R T P 12 ↔P 55/R T P 11 ↔P 54/R T P 10 ↔P 53/R T P 03 ↔P 52/R T P 02 ↔P 51/T A 0I N /R T P 01 ↔P 50/T A 0O U T /R T P 00 ↔P 96/W R H /U C A S ↔P 95/W R L /L C A S ↔P 94/C A S /W ↔P 93/C S 3/R A S 3 ↔P 92/C S 2/R A S 2 ↔P 91/C S 1/R A S 1 ↔C S 0 ↔P 44/H L D A ↔P 43/H O L D ↔P 42/T C ↔P 41/φ1 ↔P 40/A L E ↔P 33/B H W ←B L W ←R D ←807978777675747372717069686766656463626160595857565554535251818283848586878889909192939495969798991005049484746454443424140393837363534333231P 63/T A 3I N /D M A R E Q 1 ↔P 62/T A 3O U T /D M A A C K 1 ↔P 61/T A 1I N /D M A R E Q 0 ↔↔ P30/RDY← BYTE ← NMI ← RESET ← MD0 V SS ← X IN → X OUT V CC ↔ P27/D 15↔ P26/D 14↔ P25/D 13↔ P24/D 12↔ P23/D 11↔ P22/D 10↔ P21/D 9↔ P20/D 8↔ D 7↔ D 4↔ D 3↔ D 2↔ D 1← M D 1 V S S→ A 23→ A 22/M A 11→ A 21→ A 20/M A 10→ A 19→ A 18/M A 9→ A 17→ A 16/M A 8→ A 15/M A 7→ A 14/M A 6→ A 13/M A 5→ A 12/M A 4→ A 11/M A 3→ A 10/M A 2→ A 9/M A 1→ A 8/M A 0→ A 7→ A 6→ A 5→ A 4→ A 3→ A 2→ A 1↔ D 6↔ D 5A 0 ←P86/CLK 0 ↔P85/R X D 0 ↔P84/T X D 0 ↔P83/CTS 0/RTS 0 ↔P82/CTS 0/CLK 1 ↔P81/R X D 1 ↔V CC AV CC V REF AV SS V SS P73/AN 3/AD TRG /INT 4 ↔P72/AN 2/INT 3 ↔P71/AN 1 ↔P70/AN 0 ↔P122/INT 2/TB2IN ↔P121/INT 1/TB1IN ↔P120/INT 0/TB0IN ↔P80/T X D 1 ↔M37920S4CGP23ROM RAMP2, P5P3P4P6, P8P7P9P12TA0–TA4TB0–TB2UART0 and UART1Memory expansionOperating temperature range Device structure PackageNumber of basic machine instructions Instruction execution timeExternal clock input frequency f(X IN )Memory sizeProgrammable input/output portsMulti-functional timersSerial I/O A-D converter Watchdog timer DMA controllerDRAM controllerChip-select wait control Real-time output InterruptsClock generating circuit Power supply voltage Power dissipation Ports’ input/output characteristicsFUNCTIONS (Microcomputer mode)FunctionsParameterInput/Output withstand voltage Output current20350 ns (the fastest instruction at f(X IN ) = 20 MHz)20 MHz (Max.)External 2048 bytes 8-bit ! 22-bit ! 15-bit ! 17-bit ! 24-bit ! 16-bit ! 13-bit ! 116-bit ! 516-bit ! 3(UART or Clock synchronous serial I/O) ! 210-bit successive approximation method ! 1 (4 channels)12-bit ! 14 channelsMaximum transfer rate20 Mbytes/sec.(at f(X IN ) = 20 MHz, 0 wait, 1-bus cycle transfer)10 Mbytes/sec.(at f(X IN ) = 20 MHz, 0 wait, 2-bus cycles transfer)1 channelSupports fast page access mode.Incorporates 8-bit refresh timer.Supports CAS before RAS refresh method or self refresh method.Chip select area ! 4 (CS 0–CS 3). A wait number and bus width can be set for each chip select area.4 bits ! 2 channels; or 6 bits ! 1 channel + 2 bits ! 1 channel 6 external types, 17 internal types. Each interrupt except NMI can be set to a priority level within the range of 0–7 by software.Built-in (externally connected to a ceramic resonator or quartz crystal resonator).5 V±10 %135 mW (at f(X IN ) = 20 MHz, typ.)5 V 5 mAUp to 16 Mbytes. Note that bank FF 16 is a reserved area.–20 to 85 °CCMOS high-performance silicon gate process 100-pin plastic molded QFP4Vcc, Vss MD0MD1RESET X IN X OUT BYTEAVcc,AVss V REF A 0–A 7A 8–A 15/MA 0–MA 7A 16–A 23/MA 8–MA 11D 0–D 7P20/D 8–P27/D 15P30/RDY ,RD,BLW,P33/BHWP40/ALE,P41/φ1,P42/TC,P43/HOLD,P44/HLDAP50–P57P60–P66Power supply input MD0MD1Reset input Clock input Clock outputExternal data bus widthselect inputAnalog power supply input Reference voltage input Low-order address Middle-order address/DRAM address High-order address/DRAM address Low-order data I/O port P2/High-order dataMemory control signal I/OI/O port P4I/O port P5I/O port P6—Input Input Input Input Output Input—Input Output Output Output I/O I/OInput Output Output OutputOutput Output I/O Input OutputI/O I/OApply 5 V±10 % to Vcc, and 0 V to Vss.This pin controls the processor mode. Connect this pin to V CC .Connect this pin to Vss.The microcomputer is reset when “L” level is applies to this pin.These are input and output pins of the internal clock generating circuit. Connect a ceramic or quartz- crystal resonator between the X IN and X OUT pins. When an external clock is used, the clock source should be connected to the X IN pin, and the X OUT pin should be left open.This pin determines whether the external data bus has an 8-bit width or 16-bit width for the memory expansion mode or microprocessor mode. The width is 16 bits when “L” signal is input, and 8 bits when “H” signal is input.Power supply input pin for the A-D converter. Connect AVcc to Vcc, and AVss to Vss externally.This is the reference voltage input pin for the A-D converter.The low-order 8 bits of address (A 0–A 7) are output.The middle-order 8 bits of address (A 8–A 15) are input/output. While DRAM space is accessed, multiplexed address (MA 0–MA 7) is output.The high-order 8 bits of address (A 16–A 23) are output. While DRAM space is ac-cessed, multiplexed address (MA 8–MA 11) is output.The low-order 8 bits of data (D 0–D 7) are input/output.s When 8-bit external data bus is used (BYTE = “H” level)Port P2 is an 8-bit I/O port.s When 16-bit external data bus is used (BYTE = “L” level)The high-order 8 bits (D 8–D 15) are input/output.While the input level at pin RDY is “L”, the microcomputer is placed in the ready state. While pin RD is at “L” level, the microcomputer reads out data and instruc-tion codes. Also, pin RDY can function as a programmable I/O port pin (P30) by software.s When 8-bit external data bus is used (BYTE = “H” level)While pin BLW is at “L” level, the microcomputer writes data.s When 16-bit external data bus is used (BYTE = “L” level)While pin BLW is at “L” level, the microcomputer writes data into an even-numbered address.While pin BHW is at “L” level, the microcomputer writes data into an odd-numbered address.Signal ALE is used to latch an address. φ1 has the same period as internal clock φ.Pin P42 functions as a programmable I/O port pin.While the input level at pin HOLD is at “L” level, the microcomputer is placed in the hold state. Signal HLDA is used to inform the external that the microcomputer enters the hold state. By software, pin ALE, clock φ1 output pin, and pins HOLD,HLDA function as programmable I/O port pins (P40, P41, P43, P44). Pin P42 also functions as pin TC.Port P5 is an 8-bit I/O port. These pins also function as I/O pins for timers A0, A2,and pulse output pins for the real-time output.Port P6 is a 7-bit I/O port. These pins also function as I/O pins for timers A1, A3,A4, input pins for DMA requests, and output pins for DMA acknowledge signals.PIN DESCRIPTION (Microcomputer mode)FunctionsInput/Output NamePin5I/OI/O Output I/OI/OInputFunctionsInput/Output NamePin P70–P73P80–P86CS 0P91–P96P120–P122NMI Port P7 is a 4-bit I/O port. P72 and P73 also function as input pins for INT 3 and INT 4. According to the software setting, these pins also function as input pins for the A-D converter.Port P8 is a 7-bit I/O port. These pins also function as I/O pins for UART0, UART1.This is an output pin for CS 0.Port P9 is a 6-bit I/O port. According to the software setting, P91–P93 also funtion as chip select output pins. While DRAM space is selected, P94–P96 function as output pins for DRAM control signals.Port P12 is a 3-bit I/O port. These pins also functions as input pins for INT 0, INT 1,INT 2. According to software setting, these pins also function as input pins for timers B0–B2.This pin is for a non-maskable interrupt.I/O port P7I/O port P8Chip-select output I/O port P9I/O port P12Non-maskable interrupt67Fig. 2 Location of peripheral devices’ control registers (1)0000001600000116000002160000031600000416000005160000061600000716000008160000091600000A 1600000B 1600000C 1600000D 1600000E 1600000F 160000101600001116000012160000131600001416000015160000161600001716000018160000191600001A 1600001B 1600001C 1600001D 1600001E 1600001F 160000201600002116000022160000231600002416000025160000261600002716000028160000291600002A 1600002B 1600002C 1600002D 1600002E 1600002F 160000301600003116000032160000331600003416000035160000361600003716000038160000391600003A 1600003B 1600003C 1600003D 1600003E 1600003F 16Port P2 register Port P3 register[Port P1 direction register] (Note 2)[Port P0 direction register] (Note 2)[Port P1 register] (Note 2)[Port P0 register] (Note 2)Port P2 direction register Port P3 direction register Port P4 register Port P5 registerPort P4 direction register Port P5 direction register Port P6 register Port P7 registerPort P6 direction register Port P7 direction register Port P8 register Port P8 direction register [Port P10 register] (Note 2)[Port P11 register] (Note 2)[Port P10 direction register] (Note 2)[Port P11 direction register] (Note 2)A-D control register 0A-D control register 1A-D register 1A-D register 2A-D register 3UART0 transmit/receive mode register UART0 baud rate register (BRG0)UART0 transmit buffer registerUART0 transmit/receive control register 1UART0 receive buffer registerUART1 transmit/receive mode register UART1 baud rate register (BRG1)UART1 transmit buffer registerUART1 transmit/receive control register 0UART1 transmit/receive control register 1UART1 receive buffer registerAddress (Hexadecimal notation)0000401600004116000042160000431600004416000045160000461600004716000048160000491600004A 1600004B 1600004C 1600004D 1600004E 1600004F 160000501600005116000052160000531600005416000055160000561600005716000058160000591600005A 1600005B 1600005C 1600005D 1600005E 1600005F 160000601600006116000062160000631600006416000065160000661600006716000068160000691600006A 1600006B 1600006C 1600006D 1600006E 1600006F 160000701600007116000072160000731600007416000075160000761600007716000078160000791600007A 1600007B 1600007C 1600007D 1600007E 1600007F 16Address (Hexadecimal notation)Count start register One-shot start registerTimer A clock division select register Timer A0 register Timer A1 register Timer A2 register Timer A3 register Timer A4 register Timer B0 register Timer B1 register Timer B2 registerTimer A1 mode register Timer A0 mode register Timer A2 mode register Timer A3 mode register Timer A4 mode register Timer B0 mode register Timer B1 mode register Timer B2 mode register Processor mode register 1Watchdog timer registerParticular function select register 0Particular function select register 1Debug control register 0INT 3 interrupt control register UART0 transmit interrupt control register UART1 receive interrupt control register Timer A0 interrupt control register Timer A1 interrupt control register Timer A3 interrupt control register Timer A4 interrupt control register Timer B0 interrupt control register Timer B2 interrupt control register INT 1 interrupt control register Watchdog timer frequency select register Debug control register 1INT 4 interrupt control registerUART1 transmit interrupt control register Timer A2 interrupt control register Timer B1 interrupt control register INT 2 interrupt control registerAddress comparison register 0Address comparison register 1Particular function select register 2Reserved area (Note 1)Notes 1: Do not read/write to this address.2: These registers are used in the bus fixation of the power saving function. For details, refer to the section on the power saving function of the M37920F8CGP datasheet.UART0 transmit/receive control register 0Up-down registerProcessor mode register 0A-D conversion interrupt control register UART0 receive interrupt control register INT 0 interrupt control register Port P9 registerPort P9 direction register Port P12 register Port P12 direction register A-D register 0Reserved area (Note 1)Reserved area (Note 1)8Processor modeThe M37920S4CGP operates only in the microprocessor mode ex-clusive for the external ROM. Be sure to fix the level at pin MD0 toVcc and the level at pin MD1 to Vss. Also, be sure to fix bits 1, 0 at address 5E16 (the processor mode register 0) to “1” and “0”, respec-tively.Microprocessor modeWhen the microcomputer starts its operation after reset with the level at pin MD0 = Vcc level (5 V), the microcomputer is placed in the mi-croprocessor mode.V CC level(5 V)Pin MD0After reset, the microcomputerstarts its operation in the mi-croprocessor mode. (Be sureto pin MD0 to Vcc level.)Processor modePin MD1V SS level(5 V)Table 1. Relationship between pins MD0, MD1 and processor mode910Fig. 4 Processor mode register 0’s bit configuration76543210Processor mode register 0Processor mode bits0 0 : Do not select.0 1 : Do not select.1 0 : Microprocessor mode 1 1 : Do not select.Interrupt priority detection time select bits 0 0 : 7 cycles of φ0 1 : 4 cycles of φ1 0 : 2 cycles of φ1 1 : Do not select.Software reset bitBy a write of “1” to this bit, the microcomputer will be reset, and then, restarted.External bus wait number select bits 0 0 : 0 wait 0 1 : 1 wait 1 0 : 2 wait1 1 : ALE expansion wait Clock φ1 output select bit0 : φ1 output is disabled. (P41 functions as a programmable I/O port pin.)1 : φ1 output is enabled. (P41 functions as the clock φ1 output pin.)Address 5E 16Fig. 5 Processor mode register 1’s bit configurationFig. 7 Microcomputer internal registers’ status just after reset (2)Fig. 8 Block diagram for each port pin (1)ABSOLUTE MAXIMUM RATINGSRECOMMENDED OPERATING CONDITIONS (Vcc = 5 V, Ta = –20 to 85 °C, unless otherwise noted)Unit V V VV mW °C °CParameterPower source voltageAnalog power source voltageInput voltage D 0–D 7, D 8/P20–D 15/P27, P30, P33, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122,V REF , X IN , RESET , BYTE, MD0, MD1, NMIOutput voltage A 0–A 23, RD, BLW, BHW/P33, CS 0,D 0–D 7, D 8/P20–D 15/P27, P30, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122, X OUTPower dissipationOperating temperature Storage temeratureSymbol V CCAV CC V IV OP d T opr T stgRatings –0.3 to 6.5–0.3 to 6.5–0.3 to V CC +0.3–0.3 to V CC +0.3300–20 to 85–40 to 150Unit V V V V VV VV mAmAmAmAMHzPower source voltageAnalog power source voltage Power source voltageAnalog power source voltage High-level input voltageHigh-level input voltage Low-level input voltage Low-level input voltageHigh-level peak output currentHigh-level average output current Low-level peak output current Low-level average output current External clock input frequency P20–P27, P30, P33, P40–P44, P50–P57, P60–P66,P70–P73, P80–P86, P91–P96, P120–P122,X IN , RESET , BYTE, MD0, MD1, NMI D 0–D 7, D 8–D 15P20–P27, P30, P33, P40–P44, P50–P57, P60–P66,P70–P73, P80–P86, P91–P96, P120–P122,X IN , RESET , BYTE, MD0, MD1, NMI D 0–D 7, D 8–D 15A 0–A 23, RD, BLW, BHW/P33, CS 0,D 0–D 7, D 8/P20–D 15/P27, P30, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122A 0–A 23, RD, BLW, BHW/P33, CS 0,D 0–D 7, D 8/P20–D 15/P27, P30, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122A 0–A 23, RD, BLW, BHW/P33, CS 0,D 0–D 7, D 8/P20–D 15/P27, P30, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122A 0–A 23, RD, BLW, BHW/P33, CS 0,D 0–D 7, D 8/P20–D 15/P27, P30, P40–P44, P50–P57,P60–P66, P70–P73, P80–P86, P91–P96, P120–P122V CC AV CC V SS AV SS V IHV IH V IL V ILI OH (peak)I OH (avg)I OL (peak)I OL (avg)f(X IN )Notes 1: Average output current is the average value of an interval of 100 ms.2: The sum of I OL(peak) for A 0–A 23, D 0–D 7, D 8/P20–D 15/P27, ports P80–P86 must be 80 mA or less, the sum of I OH(peak) for A 0–A 23,D 0–D 7, D 8/P20–D 15/P27, ports P80–P86 must be 80 mA or less, the sum of I OL(peak) for ports P30, RD, BLW, BHW/P33, CS 0,P40–P44, P50–P57, P60–P66, P70–P73, P91–P96, P120–P122 must be 80 mA or less, the sum of I OH(peak) for P3030, P40–P44, P50–P57, P60–P66, P70–P73, P91–P96, P120–P122 must be 80 mA or less.4.50.8V CC0.5V CC005.5V CC V CC 0.2V CC 0.16V CC –10–510520ParameterSymbol Max.Typ.Min.Limits5V CC 00DC ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to 85 °C, f(X IN) = 20 MHz, unless otherwise noted)ParameterHigh-level output voltage A0–A23, CS0, D0–D7,D8/P20–D15/P27, P30,P40–P44, P50–P57,P60–P66, P70–P73,P80–P86, P91–P93,P120–P122High-level output voltage A0–A23, CS0, D0–D7,D8/P20–D15/P27, P40,P44, P91–P93High-level output voltage RD, BLW, BHW/P33,P94/CAS/W, P95/WRL/LCAS,P96/WRH/UCASLow-level output voltage A0–A23, CS0, D0–D7,D8/P20–D15/P27, P30,P40–P44, P50–P57,P60–P66, P70–P73,P80–P86, P91–P93,P120–P122Low-level output voltage A0–A23, CS0, D0–D7,D8/P20–D15/P27, P40,P44, P91–P93Low-level output voltage RD, BLW, BHW/P33,P94/CAS/W, P95/WRL/LCAS,P96/WRH/UCAS Hysteresis TA0IN–TA4IN, TB0IN–TB2IN,INT0–INT4, DMAREQ0–DMAREQ3,AD TRG, CTS0, CLK0, CLK1,NMI, RDY, HOLD, RxD0, RxD1 Hysteresis RESETHysteresis X INHigh-level input current D0–D7, D8/P20–D15/P27,P30, P33, P40–P44,P50–P57, P60–P66,P70–P73, P80–P86,P91–P96, P120–P122,X IN, RESET, BYTE,MD0, MD1, NMILow-level input current D0–D7, D8/P20–D15/P27,P30, P33, P40–P44,P50–P57, P60–P66,P70–P73, P80–P86,P91–P96, P120–P122,X IN, RESET, BYTE,MD0, MD1, NMIRAM hold voltagePower source currentUnitVVVVVVVVVµAµAVmAµAf(X IN) = 20 MHz.Ta = 25 °C whenclock is stopped.Ta = 80 °C whenclock is stopped.Test conditionsI OH = –10 mAI OH = –400 µAI OH = –10 mAI OH = –400 µAI OL = 10 mAI OL = 2 mAI OL = 10 mAI OL = 2 mAV I = 5.0 VV I = 0 VWhen clock is stoped.Symbol V OHV OHV OHV OLV OLV OLV T+ —VT–V T+ —VT–V T+ —VT–I IHI ILV RAMI CCMin.34.73.44.80.40.50.12LimitsTyp.25Max.20.451.60.411.50.35–550120 At reset in micro-processor mode,output-only pinsare open, and theother pins are con-nected to Vss.Resolution Absolute accuracy Ladder resistance Conversion time Reference voltage Analog input voltage——————————R LADDER t CONV V REFV IAV REF = V CC V REF = V CC V REF = V CC f(X IN ) ≤ 20 MHzMax.A-D CONVERTER CHARACTERISTICS(V CC = AV CC = 5 V ± 10 %, V SS = AV SS = 0 V, T a = –20 to 85 °C, unless otherwise noted)Unit ParameterSymbol Test conditionsLimitsMin.10-bit resolution mode 8-bit resolution mode10-bit resolution mode 8-bit resolution mode 55.92.45 (Note)2.7010± 3± 2V CC V REFBits LSB LSB k ΩµsV VNote: This is applied when A-D conversion freguency (φAD ) = f 1(φ).t c(TA)t w(TAH)t w(TAL)f(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHzPERIPHERAL DEVICE INPUT/OUTPUT TIMING(V CC = 5 V ± 10 %, V SS = 0 V , T a = –20 to 85 °C, f(X IN ) = 20 MHz unless otherwise noted)∗For limits depending on f(X IN ), their calculation formulas are shown below. Also, the values at f(X IN ) = 20 MHz are shown in ( ).Timer A input (Up-down input and Count input in event counter mode)t c(UP)t w(UPH)t w(UPL)t su(UP-T IN )t h(T IN -UP)Symbol TAi OUT input cycle timeTAi OUT input high-level pulse width TAi OUT input low-level pulse width TAi OUT input setup time TAi OUT input hold timeParameterLimits Min.200010001000400400Max.ns ns ns ns nsUnit Timer A input (External trigger input in pulse width modulation mode)t w(TAH)t w(TAL)Symbol TAi IN input high-level pulse width TAi IN input low-level pulse widthParameterMin.8080Limits Max.ns nsUnit LimitsSymbol ParameterMin.Max.Unit 8 × 109f(X IN )(400)TAi IN input cycle timeTAi IN input high-level pulse width TAi IN input low-level pulse widthns ns ns8080Timer A input (External trigger input in one-shot pulse mode)LimitsSymbol ParameterMin.Max.Unit 16 × 109f(X IN )8 × 109f(X IN )8 × 109f(X IN )(800)(400)(400)t c(TA)t w(TAH)t w(TAL)TAi IN input cycle timeTAi IN input high-level pulse width TAi IN input low-level pulse widthns ns nsTimer A input (Gating input in timer mode)Note :The TAi IN input cycle time requires 4 or more cycles of a count source. The TAi IN input high-level pulse width and the TAi IN input low-level pulse widthrespectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f 2 at f(X IN ) ≤ 20 MHz.Timer A input (Count input in event counter mode)t c(TA)t w(TAH)t w(TAL)Symbol TAi IN input cycle timeTAi IN input high-level pulse width TAi IN input low-level pulse widthParameterMin.804040Limits Max.ns ns nsUnit f(X IN ) ≤ 20 MHzt c(TA)t su(TA jIN -TA jOUT )t su(TA jOUT -TA jIN )Symbol ParameterMin.800200200Limits Max.ns ns nsUnit Timer A input (Two-phase pulse input in event counter mode)TAi IN input cycle time TAj IN input setup time TAj OUT input setup timet c(TA)t w(TAH)t w(TAL)t c(UP)t w(UPH)t w(UPL)t h(T IN -UP)t su(UP-T IN )t su(TAj IN -TAj OUT )t su(TAj OUT -TAj IN )t su(TAj IN -TAj OUT )t c(TA)t su(TAj OUT -TAj IN )TAi IN inputTAi OUT input (Up-down input)•Up-down input and Count input in event counter mode•Gating input in timer mode•Count input in event counter mode•External trigger input in one-shot pulse mode•External trigger input in pulse width modulation modeTAi OUT input (Up-down input)TAi IN input(When count at falling)TAi IN input(When count at rising)•Two-phase pulse input in event counter modeTAj IN inputTAj OUT inputTest conditions•Vcc = 5 V ± 10 %, Ta = –20 to 85 °C•Input timing voltage : V IL = 1.0 V, V IH = 4.0 Vf(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHzf(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHz f(X IN ) ≤ 20 MHzt c(TB)t w(TBH)t w(TBL)t c(TB)t w(TBH)t w(TBL)Timer B input (Count input in event counter mode)Symbol TBi IN input cycle time (one edge count)TBi IN input high-level pulse width (one edge count)TBi IN input low-level pulse width (one edge count)TBi IN input cycle time (both edge count)TBi IN input high-level pulse width (both edge count)TBi IN input low-level pulse width (both edge count)ParameterLimits Min.8040401608080Max.ns ns ns ns ns nsUnit LimitsSymbol ParameterMin.Max.Unit 16 × 109f(X IN )8 × 109f(X IN )8 × 109f(X IN )(800)(400)(400)t c(TB)t w(TBH)t w(TBL)TBi IN input cycle timeTBi IN input high-level pulse width TBi IN input low-level pulse widthns ns nsTimer B input (Pulse period measurement mode)Note:The TBi IN input cycle time requires 4 or more cycles of a count source. The TBi IN input high-level pulse width and the TBi IN input low-level pulse widthrespectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f 2 at f(X IN ) ≤ 20 MHz.LimitsSymbol ParameterMin.Max.Unit 16 × 109f(X IN )8 × 109f(X IN )8 × 109f(X IN )(800)(400)(400)t c(TB)t w(TBH)t w(TBL)TBi IN input cycle timeTBi IN input high-level pulse width TBi IN input low-level pulse widthns ns nsTimer B input (Pulse width measurement mode)Note:The TBi IN input cycle time requires 4 or more cycles of a count source. The TBi IN input high-level pulse width and the TBi IN input low-level pulse widthrespectively require 2 or more cycles of a count source. The limits in this table are applied when the count source = f 2 at f(X IN ) ≤ 20 MHz.t c(AD)t w(ADL)Symbol AD TRG input cycle time (minimum allowable trigger)AD TRG input low-level pulse widthParameterMin.1000125Limits Max.ns nsUnit A-D trigger inputt c(CK)t w(CKH)t w(CKL)t d(C-Q)t h(C-Q)t su(D-C)t h(C-D)Serial I/OSymbol CLK i input cycle timeCLK i input high-level pulse width CLK i input low-level pulse width T X D i output delay time T X D i hold timeR X D i input setup time R X D i input hold timeParameterLimits Min.20010010002090Max.80ns ns ns ns ns ns nsUnitt w(INH)t w(INL)Symbol INT i input/NMI input high-level pulse width INT i input/NMI input low-level pulse widthParameterMin.250250Limits Max.ns nsUnit External interrupt (INT i ) input, NMI inputTBi IN inputAD TRG inputINT i input NMI inputCLK i inputTxD i outputRxD i inputTest conditions•Vcc = 5 V ± 10 %, Ta = –20 to 85 °C•Input timing voltage : V IL = 1.0 V, V IH = 4.0 V•Output timing voltage : V OL = 0.8 V, V OH = 2.0 V, C L = 50 pF。

IRG4PH40UD中文资料

7/7/2000IRG4PH40UDINSULATED GATE BIPOLAR TRANSISTOR WITH ULTRAFAST SOFT RECOVERY DIODEFeaturesV CES = 1200VV CE(on) typ. = 2.43V@V GE = 15V, I C = 21AUltraFast CoPack IGBT• UltraFast: Optimized for high operating frequencies up to 40 kHz in hard switching, >200 kHz in resonant mode• New IGBT design provides tighterparameter distribution and higher efficiency than previous generations• IGBT co-packaged with HEXFRED TM ultrafast,ultra-soft-recovery anti-parallel diodes for use in bridge configurations• Industry standard TO-247AC packageBenefits• Higher switching frequency capability than competitive IGBTs• Highest efficiency available• HEXFRED diodes optimized for performance with IGBT's . Minimized recovery characteristics require less/no snubbingPD- 91621BParameterMax.UnitsV CESCollector-to-Emitter Breakdown Voltage 1200VI C @ T C = 25°C Continuous Collector Current 41I C @ T C = 100°C Continuous Collector Current 21I CM Pulsed Collector Current Q82I LMClamped Inductive Load Current R 82 AI F @ T C = 100°C Diode Continuous Forward Current 8.0I FM Diode Maximum Forward Current 130V GEGate-to-Emitter Voltage± 20V P D @ T C = 25°C Maximum Power Dissipation 160P D @ T C = 100°C Maximum Power Dissipation 65T J Operating Junction and-55 to + 150T STGStorage Temperature RangeSoldering Temperature, for 10 seconds 300 (0.063 in. (1.6mm) from case )°CMounting torque, 6-32 or M3 screw.10 lbf •in (1.1N •m)Absolute Maximum RatingsWParameter Min.Typ.Max.UnitsR θJC Junction-to-Case - IGBT ––––––0.77R θJC Junction-to-Case - Diode–––––– 1.7°C/WR θCS Case-to-Sink, flat, greased surface–––0.24–––R θJA Junction-to-Ambient, typical socket mount ––––––40WtWeight–––6 (0.21)–––g (oz)Thermal Resistance 1IRG4PH40UDParameterMin.Typ.Max.Units Conditions Q g Total Gate Charge (turn-on)—86130I C = 21A Qge Gate - Emitter Charge (turn-on)—1320nC V CC = 400V See Fig. 8Q gc Gate - Collector Charge (turn-on)—2944V GE = 15V t d(on)Turn-On Delay Time —46—T J = 25°C t r Rise Time —35—ns I C = 21A, V CC = 800V t d(off)Turn-Off Delay Time —97150V GE = 15V, R G = 10Ωt f Fall Time —240360Energy losses include "tail" and E on Turn-On Switching Loss — 1.80—diode reverse recovery.E off Turn-Off Switching Loss — 1.93—mJ See Fig. 9, 10, 18E ts Total Switching Loss — 3.73 4.6t d(on)Turn-On Delay Time —42—T J = 150°C, See Fig. 11, 18t r Rise Time —32—ns I C = 21A, V CC = 800V t d(off)Turn-Off Delay Time —240—V GE = 15V, R G = 10Ωt f Fall Time —510—Energy losses include "tail" and E ts Total Switching Loss —7.04—mJ diode reverse recovery.L E Internal Emitter Inductance —13—nH Measured 5mm from package C ies Input Capacitance —1800—V GE = 0V C oes Output Capacitance —120—pF V CC = 30V See Fig. 7C res Reverse Transfer Capacitance —18—ƒ = 1.0MHz t rr Diode Reverse Recovery Time —6395ns T J = 25°C See Fig.—106160T J = 125°C 14 I F = 8.0A I rr Diode Peak Reverse Recovery Current — 4.58.0A T J = 25°C See Fig.— 6.211T J = 125°C 15 V R = 200V Q rr Diode Reverse Recovery Charge —140380nC T J = 25°C See Fig.—335880T J = 125°C 16 di/dt = 200A/µs di (rec)M /dtDiode Peak Rate of Fall of Recovery—133—A/µs T J = 25°C See Fig.During t b—85—T J = 125°C 17Switching Characteristics @ T J = 25°C (unless otherwise specified)Parameter Min.Typ.Max.Units ConditionsV (BR)CES Collector-to-Emitter Breakdown Voltage S 1200——V V GE = 0V, I C = 250µA ∆V (BR)CES /∆T J Temperature Coeff. of Breakdown Voltage —0.43—V/°C V GE = 0V, I C = 1.0mA V CE(on)Collector-to-Emitter Saturation Voltage — 2.433.1I C = 21A V GE = 15V — 2.97—V I C = 41A See Fig. 2, 5— 2.47—I C = 21A, T J = 150°C V GE(th)Gate Threshold Voltage 3.0— 6.0V CE = V GE , I C = 250µA ∆V GE(th)/∆T J Temperature Coeff. of Threshold Voltage —-11—mV/°C V CE = V GE , I C = 250µA g feForward Transconductance T 1624—S V CE = 100V, I C = 21A I CES Zero Gate Voltage Collector Current ——250µA V GE = 0V, V CE = 600V ——5000V GE = 0V, V CE = 600V, T J = 150°C V FM Diode Forward Voltage Drop — 2.63.3V I C = 8.0A See Fig. 13— 2.43.1I C = 8.0A, T J = 125°C I GES Gate-to-Emitter Leakage Current ——±100nA V GE = ±20VElectrical Characteristics @ T J = 25°C (unless otherwise specified)IRG4PH40UD 3Fig. 1 - Typical Load Current vs. Frequency(Load Current = I RMS of fundamental)Fig. 2 - Typical Output Characteristics Fig. 3 - Typical Transfer CharacteristicsIRG4PH40UDFig. 6 - Maximum Effective Transient Thermal Impedance, Junction-to-CaseFig. 5 - Typical Collector-to-Emitter Voltagevs. Junction TemperatureFig. 4 - Maximum Collector Current vs. CaseTemperatureIRG4PH40UD 5Fig. 7 - Typical Capacitance vs.Collector-to-Emitter Voltage Fig. 8 - Typical Gate Charge vs.Gate-to-Emitter VoltageResistance Junction TemperatureFig. 13 - Maximum Forward Voltage Drop vs. Instantaneous Forward CurrentCollector-to-Emitter Current110100246810FM F I n s t a n t a n e o u s F o r w a r d C u r r e n t - I (A )Fo rwa rd Voltage Drop - V (V)IRG4PH40UD 7Fig. 14 - Typical Reverse Recovery vs. di f /dtFig. 15 - Typical Recovery Current vs. di f /dtFig. 16 - Typical Stored Charge vs. di f /dt Fig. 17 - Typical di (rec)M /dt vs. di f /dt01002003004005006001001000fdi /dt - (A/µs)R R Q - (n C )1010010001001000fdi /dt - (A/µs)d i (r e c )M /d t - (A /µs )40801201602001001000fdi /dt - (A/µs)t - (n s )r r1101001001000fdi /dt - (A/µs)I - (A )I R R MIRG4PH40UDFig. 18a - Test Circuit for Measurement ofI LM , E on , E off(diode), t rr , Q rr , I rr , t d(on), t r , t d(off), t ft1t2Fig. 18b - Test Waveforms for Circuit of Fig. 18a, DefiningE off , t d(off), t fFig. 18c - Test Waveforms for Circuit of Fig. 18a,Defining E on , t d(on), t rFig. 18d - Test Waveforms for Circuit of Fig. 18a,Defining E rec , t rr , Q rr , I rrIRG4PH40UD 9V g G A T E S IG NA LDEV ICE U NDER T ES TCUR REN T D.U.T.V O LT A G E IN D.U.T.CUR REN T IN D1t0t1t2Figure 19. Clamped Inductive Load Test CircuitFigure 20. Pulsed Collector CurrentTest Circuit=800V4 X I C @25°CFigure 18e. Macro Waveforms for Figure 18a's Test CircuitIRG4PH40UDD im en sion s in M illim eters a nd (Inches)CONFORM S TO JEDEC OUTLINE TO-247AC (TO-3P)- D - 5.30 (.209)4.70 (.185)3.65 (.143)3.55 (.140) 2.50 (.089)1.50 (.059)43X0.80 (.031)0.40 (.016)2.60 (.102)2.20 (.087)3.40 (.133)3.00 (.118)3X0.25 (.010)MC A S4.30 (.170)3.70 (.145)- C -2X5.50 (.217)4.50 (.177)5.50 (.217)0.25 (.010)1.40 (.056)1.00 (.039)D MMB - A -15.90 (.626)15.30 (.602)- B -12320.30 (.800)19.70 (.775)14.80 (.583)14.20 (.559)2.40 (.094)2.00 (.079)2X 2X5.45 (.215)*N O T E S :1 D IM E N S IO N S & T O LE R A N C IN G P E R A N S I Y 14.5M , 1982.2 C O N T R O L L IN G D IM E N S IO N : IN C H.3 D IM E N S IO N S A R E S H O W N M IL LIM E T E R S (IN C H E S ).4 C O N F O R M S T O JE D E C O U T L IN E T O -247A C.L EA D A S S IG N M EN T S 1 - G A T E2 - C O L L E C T O R3 - E M IT T E R4 - C O L L E C T O R*LO N G E R LEA D ED (20m m )V ER S IO N A V A IL A B L E (T O -247AD )T O O R D ER A D D "-E" S U F F IX T O P A R T N U M B ERCase Outline TO-247ACNotes:Q Repetitive rating: V GE =20V; pulse width limited by maximum junction temperature (figure 20)R V CC =80%(V CES ), V GE =20V, L=10µH, R G = 10Ω (figure 19)S Pulse width ≤ 80µs; duty factor ≤ 0.1%.T Pulse width 5.0µs, single shot.IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105IR EUROPEAN REGIONAL CENTRE: 439/445 Godstone Rd, Whyteleafe, Surrey CR3 OBL, UK Tel: ++ 44 (0)20 8645 8000IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 (0) 6172 96590IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 011 451 0111IR JAPAN: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo 171 Tel: 81 (0)3 3983 0086IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 (0)838 4630IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673 Tel: 886-(0)2 2377 9936Data and specifications subject to change without notice. 7/00。