多媒体音频系列I2C软件用户手册

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I2C控制器软件使用指南

I2C控制器软件使用指南

目录1. 软件获取 (3)2. 软件安装 (3)3. 软件使用 (7)4. 软件高级使用 (9)5. 后记 (12)I2C控制器软件使用指南1.软件获取I2C控制器软件可以在这里下载,目前最新版本为V1.2.0版本。

2.软件安装1)双击安装包程序I2C_Ctrl_SetupV1.2.0.exe。

2)选择语言,我们选择中文,点击“下一步”。

3)点击“下一步”4)选择接受许可协议,点击“下一步”。

5)输入相关信息,点击“下一步”。

6)选择安装类型,我们选择全部安装,程序将安装到默认路径,选择定制可以改变程序安装路径,点击“下一步”。

7)点击“安装”,程序将安装到用户计算机中。

8)正在安装程序9)点击“完成”,程序将完成安装,到这来程序就已经安装好了。

3.软件使用1)双击桌面图标,打开软件。

2)如图为软件界面3)确保I2C控制器已经和计算机连接,如果没有连接或驱动没有正常安装则在选择设备栏将出现如下提示。

4)根据I2C设备设置I2C控制器,我们使用AT24C64存储器芯片为测试芯片,根据芯片手册和硬件连接我们作如下设置:设置说明:1.控制方式一般选择硬件控制,除非I2C设备对总线控制时序有非常严格的要求。

2.设备类型选择主机。

3.速率模式根据I2C设备进行设置,我们所测试的芯片支持最大400K的速度,因此我们选择快速模式,目前该控制器最大支持400K速率。

速度的选择应根据实际I2C设备实际支持速率选择。

4.AT24C64的设备地址宽度为7BIT。

5.AT24C64有子地址,且子地址为2字节宽度。

6.数据包长指每次读写数据每包数据的字节数,若发生大量数据则程序会根据最大包长分割数据,注意,最大包长度不能超过55字节。

这里考虑到AT24C64每次写数据最多为16字节,我们在这里设置为8字节。

7.数据传输速率是指I2C控制器向I2C设备读写数据速率,这里我们设置为400K。

8.设备地址设置为0xA0,这是AT24C64的设备地址,数据从0地址开始写。

I2C中文手册

I2C中文手册
-1-
广州周立功单片机发展有限公司 Tel: (020)38730976 38730977 Fax:38730925
14 10 位寻址............................................................................................................ 24
2 I2C 总线使设计人员和厂商都得益 .......................................................................... 3
2.1 设计人员的得益 ................................................................................................................. 4 2.2 厂商的得益......................................................................................................................... 5
14.1 头两个字节位的定义 ...................................................................................................... 24 14.2 10 位寻址的格式 ............................................................................................................ 24 节 ........................................................................... 26

I2C调整手册(1)

I2C调整手册(1)

编号型号参数CPU型号1 日立A3P机芯CMT3398 MENU(菜单)键和EMER(确认)选择picture(图像) 按 MENU键2 三星CS3003ANP Picture off键 Display显示键 p.std(待机) mute picture on(图像开) 按 power off3 东芝F2DP 3429 接通电源,同时按摇控器上的F和AV键,然后顺序按数字1、0、4、8即可进入按摇控关机即可退出4 松下TC-25GF80R 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出5 创维5S01机芯彩电同进按TV/AV键和菜单键,然后接通电视机的电源开关,电视机开机后即可进入按摇控器上的“》。

《”键可退出6 创维4N01/5N机芯彩电创维4N01/5N机芯彩电先关掉电视,然后同时按机板上(VOL-/+)不放,再接通电视,即可进入按摇控关机即可退出7 海信TC2929P 同时按“F”和AV 键然后按1、0、4、 8即可进入同时按F和AV键,然后按POWER OFF即可退出8 海信TC2959DNP 同时按“F”和AV 键然后按1、0、4、 8即可进入同时按F和AV键,然后按POWER OFF即可退出9 海信TC3439 同时按“F”和AV 键然后按1、0、4、 8即可进入同时按F和AV键,然后按POWER OFF即可退出10 TCL-2501/2901机芯开机后将主机和音、量调到最低后,再按三下“0”(注意要在1。

5秒同完成)按摇控器的菜单键右退出11 TCL-3498GH型彩电将摇控器外壳拆开首先确认摇控器是用IC:pca84c122at -073,将IC第5脚与地焊开,再用一只 10K欧电阻接在5、 4脚之间,即可直入按TV键退出,再将原IC复原。

12 康佳T2988P 按摇控器上“F”键与AV/TV键,再依次按1、0、4、8键按POWER ON/OFF键退出13 康佳T2139N 将摇控器上装置铭片撕开,将摇控器对准电视机,用导体接通摇控器左下角键孔(工厂键 FAC),即可进入再次按工厂键FAC即可退出14 康佳T2131F采用三菱机芯CPU为M37220M3,单片电路为M52340 按菜单键、再按 6、4、8、3即可进入关机自动退出15 康佳T2133F康佳T2133F、T2134F按菜单键、再按 6、4、8、3即可进入关机自动退出16 康佳T2135F采用三菱机芯CPU为M37220M3,单片电路为M52340 按菜单键、再按 6、4、8、3即可进入关机自动退出17 长虹G2966 (使用长虹K7A/K7B型号的摇控器)按静音不放、再按 menu,此时屏幕左上角出现“S”,说明已进入了“S模式”关机可以自动退出18 长虹G2966C (使用长虹K7A/K7B型号的摇控器)按静音不放、再按 menu,此时屏幕左上角出现“S”,说明已进入了“S模式”关机可以自动退出19 长虹R2919G (使用长虹K7A/K7B型号的摇控器)按静音不放、再按 menu,此时屏幕左上角出现“S”,说明已进入了“S模式”关机可以自动退出20 松下TC-29GF70R 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出21 松下MX-4机芯彩电同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出22 松下TC-25GF82H 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出23 松下TC-2966RS 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出24 松下CX1/MX-3C机芯有TC-2148 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出25 松下CX1/MX-3C TC-2158R 同时按摇控器上的呼出键“RECALL”和电视机上的“VOL-”,电视机收正常工作进入维修状态,此时屏幕变为白色光栅按摇控器上的“正常”两次即可退出26 飞利浦MD1机芯彩电短路小信号电路板上的IS42和IS43测试(在小信号弹板上印有SERVICE年)即可进入按待机键即可退出27 飞利浦FL1。

I2C基础教程范文

I2C基础教程范文

I2C基础教程范文I2C是一种串行通信协议,用于在芯片间进行通信。

它的全称是Inter-Integrated Circuit,由Philips公司开发,并于1982年首次发布。

I2C协议使用两根线进行通信,一根是用于传输数据的串行数据线(SDA),另一根是用于传输时钟的串行时钟线(SCL)。

I2C通信协议采用主从结构,一个I2C总线上可以同时连接多个从设备,但只能有一个主设备。

主设备负责发起通信并控制总线,从设备则被动地响应主设备的命令。

I2C的通信过程包括起始条件、地址传输、数据传输和停止条件。

起始条件用于指示一个通信过程的开始,由高电平到低电平的跳变来进行,而停止条件则表示一个通信过程的结束,由低电平到高电平的跳变来进行。

在I2C通信中,每个从设备都有一个唯一的地址,主设备通过发送地址来选择要进行通信的从设备。

地址可以是7位或者10位,其中7位地址是最常用的。

一旦主设备发送了一个地址,从设备会检查其地址是否与发送的地址匹配。

如果匹配成功,从设备将发送一个应答信号给主设备,然后主设备就可以开始发送或接收数据了。

数据的传输是通过在时钟信号的边沿上改变数据线上的电平来实现的。

数据传输可以是字节级的,也可以是位级的。

每个字节都会在发送后接收一个应答信号。

在I2C通信中,主设备负责产生时钟信号以及控制总线,从设备则根据主设备的时钟信号进行读写操作。

主设备发送数据时,从设备将数据接收,主设备接收数据时,从设备将数据发送。

I2C通信协议的优势在于可以同时连接多个从设备,同时只需要两根线来传输数据和时钟信号,这样可以节省芯片的引脚资源。

此外,I2C还支持多主设备,可以实现更复杂的通信拓扑。

需要注意的是,由于I2C是一种串行通信协议,因此通信速率相对较低。

通常情况下,I2C的速率可以从几百bps到几百Kbps,并且有一定的距离限制。

总之,I2C是一种常用的串行通信协议,适用于芯片间的通信。

通过掌握I2C的基本原理和通信过程,可以更好地理解和应用I2C协议。

DSP(TMS320C6713)入门之旅五、I2C的理解和使用

DSP(TMS320C6713)入门之旅五、I2C的理解和使用

一般DSP上面都集成了I2C模块,这样在连接外部器件时可以很方便的控制外部的器件。

I2C 基本上都是用于外部控制的,因为是是串行总线。

在我们的实验板上I2C总线连接到了两个从设备上面,一个是我们的eeprom,另一个是我们的音频芯片AIC23。

通过I2C协议我们写入和读取eeprom数据,控制AIC23的声音一些属性!简介一下I2C协议的规则:一. 技术性能:工作速率有100K和400K两种;支持多机通讯;支持多主控模块,但同一时刻只允许有一个主控;由数据线SDA和时钟SCL构成的串行总线;每个电路和模块都有唯一的地址;每个器件可以使用独立电源二. 基本工作原理:以启动信号START来掌管总线,以停止信号STOP来释放总线;每次通讯以START开始,以STOP结束;启动信号START后紧接着发送一个地址字节,其中7位为被控器件的地址码,一位为读/写控制位R/W,R/W位为0表示由主控向被控器件写数据,R/W为1表示由主控向被控器件读数据;当被控器件检测到收到的地址与自己的地址相同时,在第9个时钟期间反馈应答信号;每个数据字节在传送时都是高位(MSB)在前;写通讯过程:1. 主控在检测到总线空闲的状况下,首先发送一个START信号掌管总线;2. 发送一个地址字节(包括7位地址码和一位R/W);3. 当被控器件检测到主控发送的地址与自己的地址相同时发送一个应答信号(ACK);4. 主控收到ACK后开始发送第一个数据字节;5. 被控器收到数据字节后发送一个ACK表示继续传送数据,发送NACK表示传送数据结束;6. 主控发送完全部数据后,发送一个停止位STOP,结束整个通讯并且释放总线;读通讯过程:1. 主控在检测到总线空闲的状况下,首先发送一个START信号掌管总线;2. 发送一个地址字节(包括7位地址码和一位R/W);3. 当被控器件检测到主控发送的地址与自己的地址相同时发送一个应答信号(ACK);4. 主控收到ACK后释放数据总线,开始接收第一个数据字节;5. 主控收到数据后发送ACK表示继续传送数据,发送NACK表示传送数据结束;6. 主控发送完全部数据后,发送一个停止位STOP,结束整个通讯并且释放总线;DSP中IIC模块框图:1. 总线空闲状态SDA和SCL两条信号线都处于高电平,即总线上所有的器件都释放总线,两条信号线各自的上拉电阻把电平拉高;2. 启动信号START时钟信号SCL保持高电平,数据信号SDA的电平被拉低(即负跳变)。

iic 协议手册

iic 协议手册

iic 协议手册
I2C(Inter-Integrated Circuit)是一种内部整合电路的称呼,它是一种串行通讯总线,使用多主从架构。

这种总线由飞利浦公司在1980年开发,用于连接主板、嵌入式系统或手机等设备上的低速周边装置。

在中国,I2C通常被称为“I方C”。

I2C总线由两条线路组成:串行数据(SDA)和串行时钟(SCL)。

这两条线路在连接到总线的设备之间传递信息。

在CPU与被控IC之间、IC与IC之间,这两条线路进行双向传送,高速I2C总线通常可以达到400kbps以上。

I2C总线支持多主和主从两种工作方式。

在主从工作方式中,系统中只有一个主机,其他器件都是具有I2C总线的外围从机。

I2C通信过程的时序包括开始、结束、发送、响应和接收五个部分。

开始信号是SCL为高电平时,SDA由低电平向高电平跳变;结束信号是SCL为高电平时,SDA 由低电平向高电平跳变。

T12使用说明书

T12使用说明书

结实稳固,夹口 360 度任意旋转,两节支杆 180 度任意调节。 ⑩ 配备可控亮度摄像头,逆光清晰可见,配备 8W 高光效夜航灯,夜晚清
晰可见。
2、主要用途及适用范围
用于遥控操作植保无人机,进行视频图像传输、数据传输和操作无人机飞行。
3、品种、规格
产品参数
型号 工作电压
频段 升级 尺寸 续航时间 应用
第三部分:T12 连接手机显示图像
① 正确焊接接收机与摄像头接线,并给设备上电。 ② 安装 FUAV APP。 ③ 如图七所示用 USB 连接遥控器与手机。
图七 ④ 在弹出的 USB 窗口点击确定,即可显示图像。(如图八)
图八 第四部分:T12 如何固件升级 ① 安卓升级 下载设备助手,并用蓝牙连接遥控器。选择蓝牙,参考第一部分。 将遥控关机,按住“A 按键”然后开机,,遥控器 A 灯慢闪进入下载模式。 打开设备助手,点击检查更新,如果有新固件请点击立即升级。
第一部分
第二部分 接收机,摄像头,飞控接线和设置 1 接收机注解(如图六)。
(图六) ② 短接 MODE KEY 和 GND 进入对频模式,绿灯快闪,遥控开机即可完成 对频,对频后绿灯常亮。 ③ 数传引脚如图所示,请根据配线焊接或 DIY 插入飞控。接收机 TX 对应 飞控 RX。 ④ USB 升级口用于升级接收机固件、短接 MODE KEY 和 GND 按键,将 USB 升级的 4 个按键接线插入电脑,接收机灯会自动变为红灯慢闪进入下载模 式。 ⑤ 故障灯: 红灯快闪---接收机自检不通过,需重试不行需要返厂。 红灯绿灯接通电源瞬间交替亮一下,属于自检通过。 自检通过,绿灯不亮----未开控、未对频。 接通电源无任何反应----检查供电是否为 5v,正负极有没有接反。如正确需 返厂。

Banana Pi I2C IO Expand Module 数据手册说明书

Banana Pi I2C IO Expand Module 数据手册说明书

Hardware Manual I2C IO Expand Module:Hardware ManualContact UsSINOVOIP CO.,LIMITEDCompany Add:5/F,Comprehensive Building of Zhongxing industryCity,Chuangye Road,Nanshan District,Shenzhen,Guangdong,China***********************Version:1.0Data:2014.7.25Hardware ManualShenzhen SINOVOIP CO.,LIMITED Copyright StatementThe document only descript the information about product however.It can not be guarantee the product function and performance.If the document content or the product feature and tech spec included document be changed,it will be not further notice.Content in the document might past due.Our cooperation can not promise update these information.Some information in the document might disable in your local area,that include product and service.You can consult with contact and agency in your local area. Copyright to the document belong to Shenzhen SINOVOIP CO.,er only can use these content after he or she get authorization from our company or other obligee.However user can not copy paraphrase or creative similar device or product.The document final right to interpret and document be used final interpret belong Shenzhen SINOVOIP CO.,LIMITED.More information:Get more product and support please contact Shenzhen SINOVOIP CO.,LIMITED ()Attention:Due to technical requirements components,please donot hand directly connectedTouch.Core board and development system containsstatic-sensitive devices.Quiet Electrical charge easilyaccumulate in the human body and the device can notdetect possible Damage to equipment,it isrecommended to take anti-static measures,it isrecommended not to hand.Touch,stored in anti-staticeffect devices.Hardware Manual Banana Pi Expand Module Serial:Infinity cascade IO expand module:This module is designed specifically for the Banana Pi IO expansion modules.The module expand32IO,Multiple modules can cascade,infinity cascade,infinity GPIO. I2C GPIO expand module:This module is designed specifically for the Banana Pi IO expansion modules.The Module use I2C bus to connect to Banana Pi.The module expand8Bidirectional GPIO and wit isolation protection function which can effectively excessive external voltage.There are8I2C address,you can choose one of them through setup the jumper.Multiple modules can cascade and maximum cascade8modules! Prototype development module:The Prototype development module is designed specifically for the Banana Pi.The module suitable enthusiasts and user can weld peripheral to the module;The module expand some amphenol connector and some SMT,so the user can finish prototype test easily.Berryclip expand module:The BerryClip module is designed specifically for learning how to use the GPIO of Banana Pi.There are6multiple color LED,1button and1Buzzer on the module. Berryclip(DIY)expand module:The module is not the end product,you need weld them by yourself.The function of the module is the same as BerryClip module.UNO compatibility module:The module makes Banana Pi compatible with Arduino Uno and many Arduino Shields.The module’s GPIO is the same as Arduino Uno and you can choose the voltage of GPIO between5V or3V through setup jumper.T Electric level convert module:The module expand the GPIO of Banana Pi to breadboard.It convert3.3V electric to 5V electric level,then the Banana Pi can connect many5V electric level peripheral. IO extraction module:The module expand all of GPIO of Banana Pi to breadboard.Hardware Manual Product Specification:Product Overview:This module is designed specifically for expand for the GPIO of the Banana Pi a which can effectively solve the banana send IO port insufficient.It use PCF8574chip to expand8Bidirectional IO.The module connection to the Banana Pi through I2C bus. There are8I2C address in the module and user can choose one of them through setup the“ADDR”er also can choose5V or3.3V electric level.Module with isolation protection,can effectively prevent external high voltage damage to the Banana Pi.Multiple module can cascade.Hardware Manual Product Features:●8Bidirectional IO●8I2C-address●Isolation protection●Use wiringPi API,sample code●100kHz I2C-bus interface(Standard-mode I2C-bus)Port:●Banana Pi insert port●Banana Pi cascade port●EXT0-EXT7expand GPIO●Electric level selection jumper●I2C-address selection jumperProduct Parameters:●Working voltage:2.5V-6V●IO voltage:3.3V or5.5●Expand8Bidirectional IO●I2C bus●100kHz I2C-bus interface(Standard-mode I2C-bus)●−40°C to+85°C operationTypical Application:●LED signs and displays●Key pads●Instrumentation and test measurement●Driver numeric display●Drive the lattice screenHardware Manual How to use:Insert the module that the silk screen says“BPI IN”.Pay attention don’t make the direction reversed!The correct direction of insert module is above the Banana Pi’s PCB;EXT0-EXT7are expand GPIO,user can use DuPont Line to connection peripheral.The header which near silk screen write”EXT”expand GPIO of Banana Pi, user can cascade the other module or the same module.If you want switch the electric level,just setup the jumperMore Information:The PCF8574/74A provides general-purpose remote I/O expansion via the two-wire bidirectional I2C-bus(serial clock(SCL),serial data(SDA)).The devices consist of eight quasi-bidirectional ports,100kHz I2C-bus interface, three hardware address inputs and interrupt output operating between2.5V and6V. The quasi-bidirectional port can be independently assigned as an input to monitor interrupt status or keypads,or as an output to activate indicator devices such as LEDs. System master can read from the input port or write to the output port through a single register.The low current consumption of2.5uA(typical,static)is great for mobile applications and the latched output ports directly drive LEDs.The PCF8574and PCF8574A are identical,except for the different fixed portion of the slave address.The three hardware address pins allow eight of each device to be on the same I2C-bus,so there can be up to16of these I/O expanders PCF8574/74A together on the same I2C-bus,supporting up to128I/Os(for example,128LEDs). The active LOW open-drain interrupt output(INT)can be connected to the interrupt logic of the microcontroller and is activated when any input state differs from its corresponding input port register state.It is used to indicateto the microcontroller that an input state has changed and the device needs to be interrogated without the microcontroller continuously polling the input register via the I2C-bus.The internal Power-On Reset(POR)initializesthe I/Os as inputs with a weak internal pull-up100uA current source.Hardware Manual Address Table:Pin connectivity Address of PCF8574Addressbyte value7-bithexadecimaladdresswithout R/WA2A0A1A6A5A4A3A2A1A0R/W WRITE READVss Vss Vss0100000-40h41h20h Vss Vss V DD0100001-42h43h21h Vss V DD Vss0100010-44h45h22h Vss V DD V DD0100011-46h47h23h V DD Vss Vss0100100-48h49h24h V DD Vss V DD0100101-4Ah4Bh25h V DD V DD Vss0100110-4Ch4Dh26h V DD V DD V DD0100111-4Eh4Fh27h Timing Diagram:Hardware Manual Testbench:●Use:sudo i2cdetect–y–a1check the I2C-address●Use wiringPi API,initialize module●Setup IO to OUTPUT mode,5V high level and check the level of the state with amultimeter●Setup IO to OUTPUT mode,3V high level and check the level of the state with amultimeter●Setup IO to INPUT mode,input5V high level and check the IO status throughwiringPi●Setup IO to INPUT mode,input3V high level and check the IO status throughwiringPi●Finish testSchematic diagram:More information please check:/products/interface_and_connectivity/i2c/i2c_general_purpo se_i_o/PCF8574T.htmlHardware ManualExample and Test Code(wiringPi):#include<wiringPi.h>#include<pcf8574.h>#include<stdio.h>int main(){int i;pcf8574Setup(100,0x27);for(i=0;i<8;i++)pinMode(100+i,OUTPUT);while(1){i=0;for(i=0;i<=8;i++){printf("Current LED=%d\n",100+i);digitalWrite((100+i),HIGH);delay(500);digitalWrite((100+i),0);delay(500);}}}。

LM4935 I2C SPI INTERFACE SOFTWARE MANUAL v1.4说明书

LM4935 I2C SPI INTERFACE SOFTWARE MANUAL v1.4说明书

LM4935 I2C/SPI INTERFACE SOFTWARE MANUAL v1.4National Semiconductor AudioTABLE OF CONTENTS Introduction (3)Installation (3)Overview (4)Default Button (5)BASIC TAB (5)PLL TAB (9)SAR TAB (11)INTERFACES TAB (12)AGC TAB (13)ADVANCED TAB (15)Common Configurations (16)References (19)INTRODUCTION:The LM4935 Software provides easy read/write access to the data registers of the LM4935 audio subsystem through an I2C/SPI control interface. This manual will provide instruction on how to use this software with the LM4935 Demoboard and associating USB interface card. Furthermore, examples will be provided on using the software to program the headphone and high efficiency loudspeaker outputs, setting the PLL, and other features of the LM4935 audio subsystem. INSTALLATION:The LM4935 software is built on a new Microsoft® .NET Framework. It may require thatMicrosoft® .NET Framework Software Development Kit (SDK) version 1.1 be installed in your computer, which is downloadable through the Microsoft®website1. The LM4935 software setup file will automatically install Microsoft® .NET Framework Software Development Kit (SDK) version 1.1 if your PC requires it. An internet connection is not required since Microsoft® .NET Framework Software Development Kit (SDK) version 1.1 is already included in the LM4935 software package. Installation of the SDK may take a few minutes. Once that is completed the rest of the installation process is fast.The following steps should be followed:Step 1: Uninstall any previous version, if any, from Control Panel/Add Remove Program/ LM4935 I2C SPI interface.Step 2: Unzip the LM4935 software.Step 3: Run the Setup.exe file.Step 4: The LM4935.exe file will be installed to your desktop as well as the folder you specified during the installation process.Step 5: Please make sure that the LM4935 Demoboard and USB Interface Card are properly connected to your PC and that proper power is applied to the LM4935 Demoboard. Please refer to the LM4935 Evaluation Package Instructions for details on how to accomplish this.Step 6: Run the LM4935.exe file. The LM4935 software will run properly ONLY if Step 5 is completed.OVERVIEW:The LM4935 Software is divided up into three main sections: Menu Bar, Tabs Control, and Status Register and Bar. (please refer to Figure 1)1) The Menu Bar contains File, Control, Settings and Help Options:File: Exits programControl: Switches between I2C and SPI mode. Switching between I2C and SPI willinitialize all of the data registers back to their default settings of zero.Settings: Sets the USB interface board’s regulated output voltage to 3V or 3.8V. TheDisable Polling option can be activated to disable continuous polling on the I2C/SPIinterface bus. Continuous polling is desirable whenever constant feedback from theStatus Register or the SAR is required. Enabling the Disable Polling option increasesthe efficiency of the LM4935 software program. Note: If Disable Polling is activated theStatus Register can still be read in by clicking the Read button located in the StatusRegister section.Help: Contains the About box, which can be used to check Version number of thesoftware.2) Tabs Controls are further divided up to following:Basic: Contains the main functionality of the LM4935 chip.Interface: Contains I2S and PCM options.AGC: Contains Automatic Gain Control settings.PLL: Contains PLL control settings.SAR: Provides SAR options and triggering capability.Advanced: Provides read/write access to any register using brute force.3) The Status Register and Bar provide feedback on the communication status between the USB interface card/LM4935 Demoboard to the LM4935 software. The Status Bar has useful messages that provide feedback on the communication status of the I2C/SPI control interface.Status Messages (please refer to Figure 1):1) If there is a proper connection between the PC and the LM4935 Demoboard/USB interface card, the message ‘USB Connected’ will appear. If there is no proper connection than ‘USB I/O error’ will appear.2) For I2C mode, an ‘All ACK’ message indicates a successful I2C read/write, an ‘I2C ACK missing’ message indicates. For SPI mode the message ‘SPI Mode’ appears.3) Shows two hex numbers. The first number shows the data register address (0x3h) and the second number shows the data byte (0x00h). (Figure1)Figure 1: A main View of LM4935 Software (BASIC tab).DEFAULT BUTTON:Pressing this button will reset the software back to its default state and will initialize all of the data registers back to their default setting of zero.BASIC TAB:i) BASIC OPERATIONS:12 3 4Figure 2: Basic operationsRegister (BASIC 0x00h)1) The LM4935 can be placed in one of four modes which dictate its basic operation.2) The headphone amplifier can be set to OCL or SE Mode. Please make sure that the position of the OCL/SE switch (Y3) on the demoboard corresponds to the HP setting on the software.3) Enabling the Stereo Mode (bit 6 of register 0x00h) reduces the gain of the Left and Rightsignal by 6dB to allow enough headroom for them to be summed. This may be useful when summing both the Left and Right audio signal to a mono output like the earpiece or loudspeaker. 4) Programs the turn-on time of the LM4935 to accommodate the size of the bypass capacitor,C20.ii) OUTPUT OPERATIONS:1) CP_OUTPUT: (Register 0x12h). The Microphone, Left,and/or Right inputs can be mixed to the Cell Phone Outputby checking the corresponding box(es). Enabling the mutewill mute all the inputs.1 22) HP_OUTPUT: (Register 0x15h). The Sidetone, CellPhone, Left, and/or Right inputs can be mixed to the stereoHeadphone Output by checking the corresponding box(es).3 4Enabling the mute will mute all the inputs.3) AUX_OUTPUT: (Register 0x13h). The Cell Phone, Left,and/or Right inputs can be mixed to the Auxiliary Output by5 6checking the corresponding box(es). Enabling the mute willmute all the inputs.Figure 3: LM4935 outputs4) EP_OUTPUT: (Register 0x16h). The Sidetone, Cell Phone, Left, and/or Right inputs can be mixed to the Earpiece Output by checking the corresponding box(es). Enabling the mute will mute all the inputs.5) LS_OUTPUT: (Register 0x14h). The Cell Phone, Left, and/or Right inputs can be mixed to the Loudspeaker Output by checking the corresponding box(es). Enabling the mute will mute all the inputs.6) ADC_1: (Register 0x06h). The Microphone, Cell Phone, Left, and/or Right inputs can be mixed to the input of the ADC by checking the corresponding box(es). Enabling the mute will mute all the inputs.iii) VOLUME CONTROL AND GAIN OPERATIONS :1) AUX LEFT (0x0Fh). Controls thevolume of the AUX Left analog input. Activating BOOST increases the gainby 12dB. Enabling MUTE will mute theAUX Left analog input.2) AUX RIGHT (0x10h). Controls thevolume of the AUX Right analog input. Activating BOOST increases the gain by 12dB. Enabling MUTE will mute the AUX Right analog input.3) DAC (0x11h). Controls the level of theDAC Output. Activating BOOSTincreases the gain by 12dB. EnablingMUTE will mute the output of the DAC. 4) CP_INPUT (0x0Eh) Controls the volume of the Cell Phone analog input. Enabling MUTE will mute the CellPhone analog input.5) MIC_1 (0x0Bh) Controls the volume of the Cell Phone analog input. EnablingMUTE will mute the Cell Phone input.Figure 4:6) SIDETONE (0x0Dh) Controls the analog sidetone volume.7) Max DC Volume Level (0x21h) This sets the maximum attainable level of the DC Volume Control.8) ENABLE DCVOL (0x21h) This enables the DC Volume control of the LM4935.9) You can select which volume control (AUX/DAC or CPI) is altered by the DC Volume Control. Click on the AUX button once to get CPI, click twice to get DAC.iii) AUX/DAC INPUT SOURCESFigure 5:1) If AUX is selected then AUX input is passed to the mixer, the default is for theDAC output to be passed to the mixer.2) If DAC USE AUX LEVEL is enabled then the gain of the DAC inputs is controlledby the AUX_LEFT and AUX_RIGHT registers, allowing a stereo balance to beapplied.Figure 6:3) ADC_1 HPF_MODE (0x06h). Sets the high pass filter of the ADC.The corner frequencies are computed as followed:Corner 1 = ((sample rate of ADC) * 3 / 80)Corner 2 = (Corner 1) / 2*Please refer to more info on the datasheet ADC_1 (0x06)PLL TAB:This tab programs the settings of the Phase Lock Loop (PLL).51PLL Register Fields42Figure 7: PLL TABi) MCLK Drop Down Menu Mode1)In the drop down combo box of MCLK (which is based on common system clock values) the user can select from a list of pre-programmed MCLK inputs. Based on the value of MCLK that is chosen from thedrop down menu, the LM4935 software will automatically update the M, N, N_MOD and P values according to the MCLK input value and the frequency of the PLL OUTPUT will be calculated in real time. TheLM4935 runs optimally with a PLL OUTPUT of 12 MHz or 11.025 MHz.2)In the PLL_OUTPUT drop down combo box, a 12 MHz (Fs = 48kHz) or 11.0250 MHz (Fs = 44.1kHz) target value can be selected and a the M, N, N_MOD and P values will be calculated based on the value chosen in the PLL OUTPUT and MCLK drop down combo boxes. gain3)The Program PLL Registers button should be clicked after thecorrect PLL register fields have been set.Figure 8: MCLK Dropdown4)The audio DAC and ADC input sources must be set for PLL OUTPUT if the PLL is to be used.5)The PLL must then be enabled.ii) User Defined MCLK or I2S CLK ModeThe user can also choose their own MCLK or I2S CLK value by simply entering that value into the corresponding input field. The M, N, N_MOD and P values are not automatically updated as they were when using the MCLK Drop Down Menu Mode. The M, N, N_MOD and P should be adjusted manually by the user to achieve a PLL OUTPUT calculated value of 12 MHz (Fs =48kHz) or 11.0250 MHz (Fs = 44.1kHz). The only time that the M, N, N_MOD and P values are automatically calculated is when MCLK is chosen from the pre-programmed list of values on the drop down menu for MCLK.SAR TAB:This Tab programs the SAR ADC and its triggers.23145Figure 9: SAR TAB1) The sample rate for each SAR channel can be adjusted through these slider controls.2) The ENABLE buttons activate the corresponding SAR channel.3) The output of the 4 SAR data registers are converted into voltage by the LM4935 software. The maximum voltage that can be displayed is 2.5V since the SAR data resolution is only 8 bits per channel.4) The SAR Trigger option is used for triggering the IRQ pin based specific condition. Users specify their own Trigger 1 and Trigger 2 Voltage. The maximum trigger voltage is 2.5V. Once the trigger condition is met then SARTRIG1 and/or SARTRIG2 is set on the Status Register if Trigger 1 and/or Trigger 2 is enabled.5) DETECT (0x17h) is programmed through the bottom portion of SAR TAB. Please refer to datasheet for more information.INTERFACE TAB:The Interface Tab controls the I2S / PCM interfaces and the GPIO pins. Please refer to GPIO Configuration Register (0x1Ah) and Audio Interface Configuration Register (0x19h) in datasheet for further detail.Figure 10: INTERFACE TAB14321) The I2S/PCM audio data interface can be adjusted through these settings.2) GPIO SELECT can be used to configure the GPIO pins of the LM4935. GPIO1 can be programmed as either READABLE, LS_AMP_ENABLE, GPIO_DATA or ZERO and GPIO2 could programmed as either SPI_SDO or SAR_SDO. Please refer to GPIO configuration register(0x1A) in datasheet for further detail. Both GPIO1 and GPIO2 pull down menus have to be set in order to properly program the GPIOs.3) The Internal On-Chip Oscillator can be enabled or disabled through these settings. The Internal On-Chip Oscillator should be enabled in applications where the LM4935 uses its analog audio inputs only.4) The LEFT and/or RIGHT words of I2S SDO DATA can be configured to read back data from the SAR or ADC.5) The PCM audio data interface can be adjusted through these settings.AGC TAB:The Automatic Gain Control is programmed in this tab.Figure 11: AGC TAB:GATE CP OUT: If enabled and AGC noise is enabled, the MIC to CPO pathwill be gated if the signal is determined to be noise.AGC NOISE GATE: If enabled, signals below the noise gate threshold aremuted; the noise gate is only activated after a set period of signal absence.AGC PEAK TIME AND AGC HOLD TIME options are provided by LM4935 Software.SPEECH SEGMENT is calculated by:(AGC PEAK TIME) x (AGC HOLD TIME) = SPEECH SEGMENTOthers AGC Options are following:1) AGC Enable or Disable2) AGC MAX MIC GAIN3) AGC TARGET with AGC TIGHT button4) ADC SAMPLE RATE5) AGC DECAY6) AGC ATTACKPlease refer to the AGC_1 (0x08h), AGC_2 (0x09h), AGC_3 (0x0Ah) register pages in the datasheet for further detail.ADVANCED TAB:This tab allows the user to directly program a specific data register of their choosing. This tab is useful for system debug.123 41) This drop down menu allows the user to select a specific data register to read/write to.2) This row of 8 buttons sets the bit7 to bit0 data of the specified register. Each button press will trigger an I2C/SPI write.3) This will write the current data field to the specified register.4) Pressing the Read button will read the contents of the specified data register into the text box below the button.COMMON CONFIGURATIONS:The following examples will provide a simple walk through to run LM4935 software. Proper connection between the LM4935 Demoboard/USB Interface Card and PC is required. TheLM4935 Demoboard must be properly powered on.Setting up the Headphone and High Efficiency Loudspeaker Mode (Analog Input): a) A stereo input source should be connected to the AUX_LEFT and AUX_RIGHT inputs of the LM4935 demoboard.b) A Loudspeaker and a headset should be connected the LM4935 demoboard.i) Using Analog AUX inputs and Internal on chip oscillatorHit the default Button on the BASIC Tab.1) From the INTERFACE TAB Enable the Internal Oscillator..2) Bring Part to Active w/o HP Detect on BASIC TAB3) Check RIGHT AND LEFT on LS_OUTPUT and HP_OUTPUT on BASIC TAB4) Since DAC is bypassed in Analog inputs use LEFT AND RIGHT SOURCE TO AUX MODE ON BASIC TAB,5) Turn up the volume level for AUX LEFT AND RIGHT on BASIC TAB, you can hit boost for gain up the volume assuming you have enough headroom.ii) Using the S/PDIF Input and MCLK from the S/PDIF Receivera) S11 of the LM4935 Demoboard should be closed.b) Switch Y2 of the Demoboard should be placed in the ‘int I2S’ position.c) An S/PDIF input signal should be connected to either the Optical or Coax input of the LM4935 Demoboard.d) Switch S12 on the LM4935 Demoboard should correspond to the S/PDIF input being used.e) S18 should be placed in the ‘S/PDIF Receiver Master’ position.f) At this point the S13 ‘S/PDIF Receiver RESET’ button should be pressed.g) Loudspeaker and a headset should be connected the LM4935 Demoboard.Hit the default Button on the BASIC Tab.1) Click on PLL TAB2) If using CD audio source, use 11.2896 MHz for MCLK. If running audio from a DVD then use 12.288 MHz (Default).3) Program the PLL by hit the ‘Program PLL REGISTERS’ button.4) Enable the PLL on PLL TAB.5) DAC CLK set for PLL OUTPUT6) Bring Part to Active w/o HP Detect on BASIC TAB7) Check RIGHT and LEFT on LS_OUTPUT and HP_OUTPUT on BASIC TAB8) Turn up the DAC Volume; you can enable BOOST for increased gain assuming that there is enough headroom.References:1) Microsoft framework .net 1.1 Direct download link/downloads/details.aspx?FamilyId=9B3A2CA6-3647-4070-9F41-A333C6B9181D&displaylang=enIMPORTANT NOTICE AND DISCLAIMERTI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements.These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources.TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.TI objects to and rejects any additional or different terms you may have proposed.Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2022, Texas Instruments Incorporated。

I2C模块使用教程

I2C模块使用教程

前言 (4)第1章 I2C模块规格说明 (5)1.1 综述 (5)1.2 特性 (5)1.3 模块架构 (7)1.4 配套资料说明 (7)1.5 模块原理图 (8)第2章 Arduino 基础 (9)2.1 Arduino硬件 (9)2.2 Arduino软件 (10)2.3 示例程序:LED控制 (12)第3章实时时钟 (17)3.1 DS1307介绍 (17)3.2 接线图 (17)3.3 DS1307的使用 (18)第4章外部存储 (23)4.1 AT24C32介绍 (23)4.2 接线图 (23)4.3 AT24C32的使用 (23)第5章温度侦测 (28)5.1 LM75介绍 (28)5.2 接线图 (28)5.3 LM75的使用 (29)结语 (33)为什么叫I2C模块?和一元硬币差不多大小的一块PCB上放了三个芯片,分管三个功能:时间计算、温度侦测、数据存储。

这三个芯片都是通过I2C总线通信的。

我们知道,I2C理论上可以级联2的7次方即128个设备,该模块级联了三个典型且通用I2C设备(这里为三个独立芯片),并且预留了级联更多I2C设备的接口,所以叫I2C模块。

为什么做这个I2C模块?在淘宝上搜索“I2C模块”,搜索结果中的I2C模块,一般是用一两个芯片实现对应的一两个功能,有的板上还集成非I2C相关的功能,不是纯粹的I2C模块,配套教程则比较杂乱。

于是我们决定做一个纯粹的、功能多一点的I2C模块,和Arduino配套,配上精心书写的“一份”教程。

我们强调教程的“一份”,是因为这份教程针对I2C的使用做了集中且系统的教学,不用再去搜索其他资料。

教程中使用到的Arduino库经过我们的开发,把相关功能都做好了封装,在代码中直接调用即可,无论是用来学习还是做产品开发,都简单和高效。

为了大家更好的学习,模块实行软硬件开源。

By MAKERTIPS2013年7月于广州大学城第1章 I2C模块规格说明1.1 综述I2C模块集成了三个芯片,分别实现三个功能:1、时间计算:DS13072、温度侦测:LM753、数据存储:AT24C32图1.1 I2C模块功能说明3D图1.2 特性1、使用实时时钟芯片DS1307计算时间2、使用温度传感器芯片LM75侦测温度3、使用EEPROM存储芯片AT24C32 存储数据4、通过精简的I2C总线实现以上功能5、使用CR2032锂电池为时钟芯片供电,可使用2年LM75DS1307AT24C326、设计小巧,PCB尺寸28mm*25mm7、引出LM75的OS脚,可作为温度中断输出8、通过排针J1或J2,可以级联其他I2C设备图1.2 小巧的I2C模块1.3 模块架构I2C(Inter-Integrated Circuit)总线是由PHILIPS公司开发的两线式串行总线,用于连接微控制器及其外围设备。

I2S接口说明

I2S接口说明

I2S接口I2C总线说明I2C总线百科名片I2C总线I2C(Inter-Integrated Circuit)总线是一种由PHILIPS公司开发的两线式串行总线,用于连接微控制器及其外围设备。

I2C总线产生于在80年代,最初为音频和视频设备开发,如今主要在服务器管理中使用,其中包括单个组件状态的通信。

例如管理员可对各个组件进行查询,以管理系统的配置或掌握组件的功能状态,如电源和系统风扇。

可随时监控内存、硬盘、网络、系统温度等多个参数,增加了系统的安全性,方便了管理。

目录[隐藏]详细说明1 I2C总线特点I2C总线最主要的优点是其简单性和有效性。

由于接口直接在组件之上,因此I2C总线占用的空间非常小,减少了电路板的空间和芯片管脚的数量,降低了互联成本。

总线的长度可高达25英尺,并且能够以10Kbps的最大传输速率支持40个组件。

I2C总线的另一个优点是,它支持多主控(multimastering),其中任何能够进行发送和接收的设备都可以成为主总线。

一个主控能够控制信号的传输和时钟频率。

当然,在任何时间点上只能有一个主控。

2 I2C总线工作原理2.1 总线的构成及信号类型I2C总线是由数据线SDA和时钟SCL构成的串行总线,可发送和接收数据。

在CPU与被控IC之间、IC与IC之间进行双向传送,最高传送速率100kbps。

各种被控制电路均并联在这条总线上,但就像电话机一样只有拨通各自的号码才能工作,所以每个电路和模块都有唯一的地址,在信息的传输过程中,I2C总线上并接的每一模块电路既是主控器(或被控器),又是发送器(或接收器),这取决于它所要完成的功能。

CPU发出的控制信号分为地址码和控制量两部分,地址码用来选址,即接通需要控制的电路,确定控制的种类;控制量决定该调整的类别(如对比度、亮度等)及需要调整的量。

这样,各控制电路虽然挂在同一条总线上,却彼此独立,互不相关。

I2C总线在传送数据过程中共有三种类型信号,它们分别是:开始信号、结束信号和应答信号。

深圳微雪电子LCD1602I2C模块用户手册说明书

深圳微雪电子LCD1602I2C模块用户手册说明书

LCD1602I2C ModuleLCD MODULE USER MANUAL1.FUNCTIONS&FEATURESFeatures一Characters:16×2Lines一LCD Mode:STN,Yellow–Green/Blue/Grayish;一LCD Controller IC:AiP31068L or Equivalent一Driving Method:1/16Duty;1/5Bias一Viewing Angie:6O’clock direction一I2C MPU Interface一Backlight:White LED一Operating Temperature Range:-20to+70℃;一Storage Temperature Range:-30to+80℃;2.MECHANICAL SPECIFICATIONSITEM SPECIFICATIONS UNITModule Size87.0L×32.0W×13.0(max)H mmView Area64.5×16.0mm Number of Character16×2Lines—Character Size 2.96×5.56mmCharacter Pitch 3.55×5.96mm 3.EXTERNAL DIMENSIONS4.BLOCK DIAGRAM5.POWER SUPPLY6.PIN DESCRIPTIONITEM SYMBOL LEVEL FUNCTION1SDA H/L I2C-Bus Serial Data2SCL H/L I2C-Bus Serial Clock3GND0V Power Ground4VCC+3.3~5.0V Power Supply For LogicNote:1.AIP31068L SLAVE ADDRESS:0X7C.7.MAXIMUM ABSOLUTE LIMIT(Ta=25°C)Items Symbol Min Max Unit ConditionSupply Voltage Vdd0 5.2V Vss=0VInput Voltage Vin0Vdd V Vss=0VOperating Temperature Top-20+70℃No CondensationStorage Temperature Tst-30+80℃No CondensationNote:Voltage greater than above may damage the moduleAll voltages are specified relative to V SS=0V8.ELECTRICAL CHARACTERISTICS8.1DC Characteristics(VDD=+5.0V,VSS=0V,Ta=-0~+50°C)Items Symbol Test Condition Min TYP Max Unit Operating Voltage V DD 3.0V— 5.2VSupply Current I DDUse internalOscillator/externalclock(VDD=5V,fosc=250KHz)—0.550.8mAInput High Voltage1 (Except OSC1)V IH1— 2.5—Vdd V V IL1—-0.3—0.6Input High Voltage2 (Except OSC1)V IH2—Vdd-1.0—Vdd V V IL2—-0.21VOutput High Voltage1 (DB0~DB7)V OH1I OH=-0.205mA 2.4—Vdd V V OL1I OL=1.2mA——0.4VOutput High Voltage2 (Except DB0~DB7)V OH2I O=-40uA0.9Vdd—V V OL2I O=40uA——0.1Vdd VInput Leakage Current I IKG V IN=0V~VDD-1—1uAInput Low Current I IL V IN=0V V DD=5V(pullup)-50-125-250uAInternal clock(external Rf)f OSC1Rf=91KΩ±2%,VDD=5V190270350KHzExternal clock f OSC—125270410KHz duty455055% t R,t F—0.2uSLCD Driving Voltage V LCD V DD-V5(1/5,1/4bias) 3.0—11.0V8.2AC Characteristics (VDD=+5.0V,VSS=0V,Ta=-20~70°)CharacteristicSymbol Test ConditionMin TYP Max Unit SCL Cycle Time f SCLK I 2C ——400KHz SCL Pulse Width t LOW 1.3——uS SCL Rise/Fail Time t HIGH 0.6——uS Address Setup Time t SU:DA T 100——nS Address Hold Time t HD:DA T 0—0.9uS SCL/SDA Rise/Pulse Time t r ,t f 20—300nS START Steup Time t SU:STA 0.6——uS START Hold Time t HD:STA 0.6——uS STOP Steup Time t SU:STO 0.6——uS STOP 、START Spacing Intervalt BUF1.3——uSMPU write timing START STOP:ASK :AiP31068L(LCD)Slave Address:0X7C.PCA9633DP2(RGB)Slave Address:0XC0.9.FUNCTION SPECIFICATIONS9.1.Basic SettingTo drive the LCD module corretly and provide normally display,please use the following setting:一N=1,2-line display一F=0,5×8dots font一D=1,display onNote:一These setting/commands should issue to the LCD module while start up.一See the Display Commands section for details.9.2.Resetting The LCD ModuleWhen turning on the VDD and VSS power supply,LCD module will execute the reset routine automatically.It takes about50ms.After the reset routine,the LCD module status will be as follow:一N=1,2-line display一Display clear一DL=1,8-bit interface一F=0,5×8dot character font一D=0,Display off一C=0,Cursor off一B=0,Blinking off一I/D=1,Increment by1一S=0,No shiftNOTE:一Reset routine could not generate the Basic Setting9.3.Display Memory MapThere are two main memory-areas in the LCD module for display.一Character Generator RAM(CGRAM)一Display Data RAM(DDRAM)9.3.1.Character Generator RAM(CGRAM)Character Generator RAM is for storing the User-defined Characters(5×8dots font).Totally8 User-defined Characters(character code=00h-07h)could be created.The User-defined Character Codes are00h and07h.They could be called into DDRAM as normal character.9.3.2.Character code ROM Please refer to AiP31068L datasheet.9.4.Display CommandsNOTE:一Do not use any other commands not listed,or the system malfunction may result.一For the details of rte display commands,please refer to AiP31068L datasheet.10.DESIGN AND HANDING PRECAUTION10.1.The LCD panel is made by glass.Any mechanical shock(eg.Dropping form highplace)will damage the LCD module.Do not add excessive force on the surface of the display,which may cause the Display color change abnormally.10.2.The polarizer on the LCD is easily get scratched.If possible,do not remove the LCDprotective film until the last step of installation.10.3.Never attempt to disassemble or rework the LCD module.10.4.Only Clean the LCD with Isopropyl Alcohol or Ethyl Alcohol.Other solvents(eg.water)may damage the LCD.10.5.When mounting the LCD module,make sure that it is free form twisting,warping anddistortion.10.6.Ensure to provide enough space(with cushion)between case and LCD panel toprevent external force adding on it,or it may cause damage to the LCD or degrade the display result10.7.Only hold the LCD module by its side.Never hold LCD module by add force on theheat seal or TAB.10.8.Never add force to component of the LCD module.It may cause invisible damage ordegrade of the reliability.10.9.LCD module could be easily damaged by static electricity.Be careful to maintain anoptimum anti-static work environment to protect the LCD module.10.10.When peeling of the protective film form LCD,static charge may cause abnormaldisplay pattern.It is normal and will resume to normal in a short while.10.11.Take care and prevent get hurt by the LCD panel edge.10.12.Never operate the LCD module exceed the absolute maximum ratings.10.13.Keep the signal line as short as possible to prevent noisy signal applying to LCDmodule.10.14.Never apply signal to the LCD module without power supply.10.15.IC chip(eg.TAB or COG)is sensitive to the light.Strong lighting environmentcould possibly cause malfunction.Light sealing structure casing is recommend.10.16.LCD module reliability may be reduced by temperature shock.10.17.When storing the LCD module,avoid exposure to the direct sunlight,highhumidity,high temperature or low temperature.They may damage or degrade the LCD module。

I2C总线规范

I2C总线规范

【简介,I2C通信协议是荷兰的飞利浦公司研发的一套成熟的通信协议,NXP原是飞利浦旗下的公司(10月27日,高通、NXP联合宣布,双方已经达成最终协议,并经董事会一致批准,高通将收购NXP。

高通将以110美元(溢价11.5%)每股的价格,收购NXP已发行的全部股票,总价值约470亿美元,约合人民币3190亿元,全部以现金支付。

)】I2C总线规范一个典型的嵌入式系统包括一个或多个微控制器和外设单元,类似于存储、转换、I/O 扩展器,LCD驱动,传感器,矩阵,转换器等等。

这些所有连接到一起的设备,其复杂度和成本需要压缩到最低。

系统的设计必须能够使慢速设备与系统进行通信,而不会减慢速度。

为了满足这些要求,需要一个串行总线,总线是指定义总线上的规则的连接、协议、格式、地址和过程的规范。

这正是I2C总线规范定义的。

I2C总线使用2根线:串行数据口(SDA)和串行时钟(SCL)。

所有I2C主、从设备通过两根总线连接起来。

每个外设既能够发送数据又能够接收数据。

作为主机他们产生总线的时钟和总线上通信的初始化。

其他的从机设备对主机进行应答。

为了与指定的设备进行通信,每个在总线上的从机设备必须拥有唯一的设备地址。

主设备可以没有主机地址,因为主机不需要其他设备对其发送命令,然后产生应答。

I2C时序发送者这是传输数据到总线的设备接受者这是从总线接收数据的设备主机:这是一个产生时钟信号,开始通信指令,和发送I2C指令,和停止通信的指令。

从机:这是一个监听总线信号,回信息给主机的设备多主机:I2C可以有跟多的主机每个主机都可以发送命令给从机仲裁:当更多的主设备需要占用总线时,一个确定总线上的主机可以使用它同步:在一个或者多个设备上处理同步时钟信号总线信号SCL和SDA信号都是双向的。

他们通过连接正电极的两个电阻进行供电。

这意味着当总线空闲时,两根线都是高电平,总线上的所有设备都必须有开槽或开漏针。

激活这条线意味着把它拉下来(有线和)。

i2UP 软件使用手册说明书

i2UP 软件使用手册说明书

i2UP软件使用手册上海英方软件股份有限公司SHANGHAI INFORMATION2SOFTWARE INC. REV10版权所有©上海英方软件股份有限公司保留一切权利。

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本文档提及的其他所有商标或注册商标,由各自的所有人拥有。

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除非合同另有约定,英方公司对本文档内容不做任何明示或默示的声明或保证。

由于产品版本升级或其他原因,本文档内容会不定期进行更新。

除非另有约定,本文档仅作为使用指导,本文档中的所有陈述、信息和建议不构成任何明示或暗示的担保。

上海英方软件股份有限公司地址:上海市闵行区浦锦路2049弄15幢办公楼网址:/售后服务地址:/welcome/官方服务电话:4000078655前言概述本文档介绍i2UP的安装部署方案及包含的各个产品功能的具体操作过程及注意事项。

读者对象本文档适用于安装及运维工程师。

符号约定本文档可能出现以下标志,他们所代表的含义如下。

符号说明用于警示潜在的危险情形,若不避免,硬件设备可能会导致人员死亡或严重的人身伤害,软件可能会导致系统文件损坏或丢失,无法恢复。

用于警示潜在的危险情形,若不避免,硬件设备可能会导致中度或轻微的人身伤害。

软件可能会导致系统文件损坏或丢失,可恢复。

用于传递设备或环境安全警示信息,若不避免,可能会导致设备损坏、数据丢失、设备性能降低或其它不可预知的结果。

用于突出重要/关键信息、最佳实践和小窍门等。

“说明”不是安全警示信息,不涉及文件丢失或损坏。

名词解释本文档i2UP可能出现以下名词缩写,他们所代表的含义如下。

名词说明RTO RTO(Recovery Time Objective):是指灾难发生后,从I/T系统停机导致业务停顿开始,到IT系统恢复可以支持业务恢复运营之时,所需要的时间。

I2C-FRTC模块用户指南说明书

I2C-FRTC模块用户指南说明书

I2C-FRTC User’s GuideThe I2C-FRTC is an add-on module that provides the Inter-Integrated Circuit – IIC, also commonly known by the acronym I2C or I2C bus, to a Nano-10, a FMD88-10, or a FMD1616-10 PLC. Please refer to the I2C specifications of your device for detailed explanation of the I2C protocol.The PLC only supports the I2C as a master and operates at 100 KHz, which allows it to connect to many off-the-shelve components such as GPS, accelerometers, thermometer, analog and digital I/O chips, etc. The PLC can connect to multiple I2C slaves in a multi-drop I2C bus, which greatly expands its capability. The built-in TBASIC commands also greatly simplify the I2C communication with the slave devices.However, you can only use the I2C communication capability provided your Nano or FMD PLC meets all the following conditions:You have installed the I2C interface module (such as the I2C-FRTC) on the PLC.You have upgraded your I-TRiLOGI software to version 6.40 or later.The PLC firmware is >= r741 INSTALLING THE I2C-FRTC MODULETo install the I2C-FRTC module, first ensure that you have TURNED OFF power to the PLC.The I2C-FRTC module has a row of 2x5 male header pins that is to be inserted into the single mating 2x5 female socket on the PLC. Please ensure that the pins are aligned correctly with the socket. There is a single mounting hole on other end of the I2C-FRTC module, which provides support to the module via a nylon standoff included in the I2C-FRTC package. You should also find a matching hole on the PLC which is aligned with the mounting hole on the I2C-FRTC module. The nylon standoff has two supporting catches that will mate to the mounting holes on both the I2C-FRTC and the PLC and it provides a fairly strong support to the I2C-FRTC module.2 I2C-FRTC HARDWARE OVERVIEWThe I2C-FRTC modules adds the following hardware to the Nano-10 or FMD PLCI2C communication interface chip11K words of FRAM memory, Expand program memory to 16K words, DM[1001] to DM[4000] and a Battery-backed Real Time Clock (RTC) *128K bytes of I2C EEPROM memory (M24M01) – Expandable to 256K bytes by soldering an additional M24M01 chip next to it on the blank solder pad.Additional Analog output channel #3 and #4 (0-5V only)*The FRAM memory and battery-backed RTC on the I2C-FRTC is identical to that found on the FRAM-RTC module. i.e. I2C-FRTC = FRAM-RTC + additional I2C hardware.The I2C interface chip allows the PLC to interface to external I2C devices that are of different logic voltage level from the PLC. You must connect the positive logic voltage of the target device to the “V+” terminal shown in the above diagram and 0V of the target device to the “GND” terminal. Then connect the SCL and SDA signal between the I2C-FRTC module and target device and you are good to go.A 1 M bits I2C EEPROM chip (M24M01) is also included in the I2C-FRTC module. This allows you to use the new I2C_READ and I2C_WRITE command (available only in I-TRiLOGI version 6.40 or later) to store and retrieve up to 128K bytes of non-volatile EEPROM memory to store additional data. This will be described in the next section.3 NEW TBASIC COMMANDS: I2C_READ,I2C_WRITE ANDI2C_STOPThese 3 new TBASIC commands are only available on i-TRiLOGI version 6.40 and above, and they are only enabled on the Nano or FMD PLCs that are installed with I2C-FRTC. If you are still running the older version of i-TRiLOGI, you can get a free update by clicking on the “Help” menu on your production version of I-TRiLOGI software and follow the “Upgrade TRiLOGI” link to download the latest I-TRiLOGI software in order to use these 3 newly added commands.Both I2C_WRITE and I2C_READ commands use a range of data memory DM[ ] to transmit the data to be written into the device or to be read from the device. The parameters comprise the I2C slaveaddress, the starting index of the DM[] memory location to use and the number of bytes to be sent/received from the slave.3.1 I2C_WRITEAn I2C_WRITE command begins with the master (PLC) sending the START bit, followed by a 7-bit slave address, and then a “R/W” bit set to low, which indicates that it is a WRITE command. If the slave device with the targeted slave address is present, it will send the ACK response to the master on the 9th clock cycle. Otherwise the master sends a STOP bit and quits the I2C_WRITE function.If the slave does send the ACK bit, the master will then send out a number of data bytes to be written to the slave and the slave will respond with the ACK bit with the completion of each byte it received. After the last data byte has been written to the slave, and if the master is not expecting to read any data from the slave, the master must then immediately send the STOP bit by executing the I2C_STOP command (to be described later) to indicate the End-of-Write to the slave.The PLC program can determine if the I2C_WRITE is successful by checking it with the STATUS(2) command. The syntax of the I2C_WRITE command is as follow:I2C_WRITE i2cslave, dmstart, count3.2 I2C_READAn I2C_READ command begins with the master (PLC) sending the START bit, followed by a 7-bit slave address, and then a “R/W” bit set to high, which indicates that it is a READ command. If the slave device with the targeted slave address is present, it will send the ACK response to the master. Otherwise the master sends a STOP bit and quit the I2C_WRITE function.If the slave does send the ACK bit, the master will then toggle the SCL (clock) signal and the slave will send the data byte one bit at a time in response to the SCL pulses. After an 8-bit byte has been received, the master will automatically send the ACK bit to the slave and the slave will continue to send the next byte sequentially out to the master.After the last data byte has been read from the slave, the master will not send the ACK bit but will automatically send the STOP bit to the slave. This indicates the End-of-Read to the slave and the communication is complete.I2C_READ i2cslave, dmstart, count3.3 I2C_STOPThis command has no parameter. It sends a STOP bit to the slave and completes the I2C_WRITE command.4 USING THE I2C COMMANDS TO ACCESS M24M01EEPROM4.1 Random Write to M24M01 EEPROMThe first M24M01 EEPROM on the I2C-FRTC (U2) has two binary slave device addresses: 101 0000 b (&H50) and 101 0001b (&H51). Device address &H50 is for accessing the first bank of 64K bytes of EEPROM, and address &H51 is for accessing the second bank of 64K bytes of EEPROM.There is also a blank solder pad on the bottom layer of the I2C-FRTC module, which allows you to solder an additional M24M01 (U3) to the I2C-FRTC PCB. When assembled this second M24M01 chip will assume the binary address of 101 0010b (&H52) and 101 0011b (&H53). Device address &H52 on U3 is for accessing the first bank of 64K bytes while device address &H53 is for accessing the second bank. Please refer to the M24M01 EEPROM data sheet for the detailed description of the addressing scheme for writing a byte of data to a random EEPROM address. The following picture depicts the necessary command:Example. To write a byte of data XX to the EEPROM address 54321 (&HD431) in first 64K bank, you need to do the following:DM[11] = &HD4DM[12] = &H31DM[13] = xx ‘ your data byteI2C_WRITE &H50, 11, 3 ‘ write 3 bytes of data from DM[11] to DM[13]I2C_STOP ‘ necessary to end the byte write.The data XX will be written to the EEPROM address 54321If you want to store the data to second bank of EEPROM address, then replace the I2C_WRITE line with: I2C_WRITE &H51, 11, 34.2 Page Write To M24M01 EEPROMAs you can see, writing a single byte of data to a random location involves 4 bytes of data transfer, which is not very efficient. Fortunately, the EEPROM allows you to write more than one byte to the EEPROM and the EEPROM will write to the subsequent loca tion sequentially. This is known as “Page Write” and you can write up to 256 bytes in the same page. A page is defined as the memory location having the same upper address byte (bit 8 to bit 15). E.g. Address &HA011 and &HA0FF are in the same page. But address &HA0FF and &HA100 are NOT in the same page even though they are adjacent memory location. So you have to keep the page boundary in mind when performing a page write.The following picture depicts the page write command:Example. To write 4 byte of data XX to the EEPROM address 19876 to 19879 (&H4DA4) in first 64K bank, you need to do the following:DM[11] = &H4DDM[12] = &HA4DM[13] = xx ‘ your data byte 1DM[14] = yy ‘ your data byte 2DM[15] = zz ‘ your data byte 3DM[16] = ww ‘ your data byte 4I2C_WRITE &H50, 11, 6 ‘ write 6 bytes of data from DM[11] to DM[16]I2C_STOP ‘ necessary to end the write cycles.The data contained in DM[13] to DM[16] will be written to the EEPROM address &H4DA4 to &H4DA7. 4.3 Random Read from M24M01 EEPROMReading data from a random EEPROM location is slightly more involved than writing. You need to first use the I2C_WRITE command to set the memory pointer inside the M24M01 to point to the memory address location, then immediately followed by I2C_READ command to read one or more data bytes starting from the pointer address. After every byte is read the internal pointer will be incremented automatically and point to the next address byte, this allows you to read a large number of data sequentially from the EEPROM with minimum overhead. This can be very useful for “data dump” to the TLServer to rapidly upload the collected dataExample. To Read 100 bytes from EEPROM address 12345 (&H3039) to 12444 in first 64K bank, you need to do the following:DM[11] = &H30DM[12] = &H39I2C_WRITE &H50, 11, 2 ‘ write 2 bytes of address in DM[11] to DM[12]I2C_READ &H50,21,100 ‘ read 100 bytes data into DM[21] to DM[120]The returned data will be stored in the DM[21] to DM[120].Note: There is no need to execute the I2C_STOP command after the I2C_READ since the I2C_READ command automatically sends a STOP bit after the last byte is read.4.4 Sequential Read from M24M01 EEPROMNote that after a random read, the memory pointer inside the M24M01 will be pointed to the next address following the very last read memory address. This means that you could repeatedly execute only the I2C_READ command to read more data sequentially from the EEPROM memory.Example:DM[11] = &H30DM[12] = &H39I2C_WRITE &H50, 11, 2 ‘ write 2 bytes of address in DM[11] to DM[12]FOR I = 1 to 10I2C_READ &H50,21,100 ‘ read 100 bytes data into DM[21] to DM[120]CALL Datadump ‘ call som e subroutine to upload data to server.NEXTIn the above example, the I2C_READ command was executed 10 times, each time 100 data point is read into DM[21] to DM[120] and the program then calls another custom function to dump these data points to the server. The loop then continue for another 9 times, and hence altogether 1000 data points from address 12345 to 13344 can be uploaded to the server in a simple FOR..NEXT loop.5 EXTENDED FILE SYSTEMA FMD or Nano-10 PLC with r77 or later firmware can access the 128K bytes of extended data file space provided on the I2C-FRTC (or 256Kb on the FRAM-RTC-256).Note: The I2C EEPROM memory on the I2C-FRTC module (default =128K bytes) is user-expandable to 256K to match the FRAM-RTC-256.Without the I2C-FRTC / FRAM-RTC-256, the FMD and Nano-10 PLCs only have 60K bytes of file memory to be used for storing control web pages as described in Chapter 2.9 of the applicable user manual (Note the default file space on FMD and Nano-10 PLC before firmware r77 was 64K bytes, but it has been reduced to 60K to make space for the new r77 firmware).The I2C-FRTC adds an additional 128K bytes of file space to the PLC. You can use the extended file space for storing additional web pages. But more importantly, a PLC with firmware version r77 or later can open a local data file in this file space and write/append data to it. The PLC can therefore log a large amount of data into one or more data files, which can be retrieved for analysis.For more information on how the extended file system works, please refer to chapter 18 of any FMD or Nano-10 user manual:/documents/FMD88-10-UserManual.pdf/documents/FMD1616-10-UserManual.pdf/documents/Nano-10-UserManual.pdf。

i2c协议的使用流程

i2c协议的使用流程

i2c协议的使用流程英文回答:I2C Protocol Usage Procedure.The I2C protocol is a serial communication protocolused to connect low-speed devices to a microcontroller. It uses only two wires for communication, a clock line (SCL) and a data line (SDA).The I2C protocol has a master-slave architecture, where the master device initiates and controls the communication, and the slave devices respond to the master's requests.Each slave device has a unique address, which is used bythe master to select the slave it wants to communicate with.The I2C communication process consists of the following steps:1. Start condition: The master device sends a startcondition by pulling the SDA line low while the SCL line is high.2. Slave address: The master device sends the addressof the slave device it wants to communicate with.3. Read/write bit: The master device sends a read/write bit to indicate whether it wants to read from or write to the slave device.4. Data transfer: The master device and the slavedevice exchange data.5. Stop condition: The master device sends a stop condition by pulling the SDA line high while the SCL lineis high.The I2C protocol is a simple and efficient way to connect multiple devices to a microcontroller. It is widely used in a variety of applications, such as embedded systems, consumer electronics, and industrial automation.中文回答:I2C 协议使用流程。

W24CXX并口I2C读写软件使用说明

W24CXX并口I2C读写软件使用说明

W24CXX 并口编程软件说明程序版本:V1.1.0.20916增加功能:1. 用户可以设置并口地址2. 可以编辑Client区内容 (单击编辑后双击要编辑的字节)3. 修改了Client区界面4. 简体中文,英文双语界面5. 针对铁电EEPROM可以取消页写入延时加快写入速度注:并口地址若设置不正确可能导致计算机死机等发生(软件可以读写任意端口)程序开发:林晓斌 (sonicss)Email:sonicss@ 或 sos_lxb@开发工具:Borland C++ Builder 6.0 Updata 1WinDriver 5.05b开发环境:Windows 2000 Profressional SP3我的机器配置:Celeron 1.2G 128M Ram 笔记本运行环境:Win98/NT/2K/XP编写目的:24系列I2C芯片使用非常广泛,网上也有个用并口读写24CXX的软件- 24CXX.EXE,但他只能在DOS下运行,给使用带来了很多不便,所以写了这个软件,就叫做W24CXX.EXE 吧。

功能:和那个DOS版的程序差不多,能够编写24C01 ~ 256系列的芯片。

可以设置页写和块读的字节大小。

(软件为按页方式读出数据和写入数据的)如果使用时发现不能正常读出或写入,请到器件->设置中改变读写的字节数。

详细内容请查看附录1。

电路图:注:若读写成功率不高,请拿掉发光二极管。

原电路图:注:如使用DOS版的24CXX.EXE请不要接8,9两脚数据对比:24CXX.EXE(我没有测试过,网上找的,带校验编程时间) 芯片型号整片编程时间平均每字节编程时间备注24C321秒244微秒24C642秒244微秒24C2564秒122微秒W24CXX.EXE测试数据测试机器1:Celeron 1.2G 128MRAM (单位:秒)Win2000Profressional SP3 下测试型号 读芯片 写芯片(无校验) 自动(带校验) AT24C02 0.086 0.197 0.292FM24C04 0.174 0.297 0.470FM24C16 0.693 1.178 1.85124C256 11.300 14.625 25.689Windows98Se下测试结果型号 读芯片 写芯片(无校验) 自动(带校验) AT24C02 0.037 0.066 0.163FM24C04 0.074 0.083 0.243FM24C16 0.295 0.340 0.97124C256 4.818 5.637 11.631测试机器2:P41.6G 256MDDR RAM测试结果Win2000Profressional SP2型号 读芯片 写芯片(无校验) 自动(带校验) AT24C02 0.072 0.181 0.229FM24C04 0.145 0.267 0.412FM24C16 0.582 1.072 1.65424C256 9.468 13.111 22.594速度比Boan 的 24CXX.EXE慢了很多,用示波器看了他发出的脉冲,延时竟然只有4us,这在Windows下是不大可能实现的,照资料说,一个PostMessage就要执行4us。

STUSB-I2C转换器用户手册说明书

STUSB-I2C转换器用户手册说明书

IntroductionThe STEVAL-USBI2CFT is a versatile USB-I 2C bridge for communication and programming of ST wireless charging IC, and evaluation boards, with the STSW-WPSTUDIO software.Figure 1.STEVAL-USBI2CFTVersatile USB- I 2C bridge for communication and programming of ST wirelesscharging ICUM3226User manualSoftware installation 1 Software installationThe STEVAL-USBI2CFT is based on the FT260Q, USB HID to I2C bus convertor. The FT260Q does not requireany additional software drivers.The Windows operating system automatically installs the necessary driver after the first USB plug-in.2 Hardware connectionBefore starting the communication with a wireless receiver or transmitter, the dongles shall be correctly connectedto each other. Connect GND of bridge with GND of evaluation board, continue with connecting of SDA, SCL, andINT.The STEVAL-USBI2C board includes an internal level-shifter.The voltage level can be changed soldering one of the soldering bridges.The voltage can be set to 1.8, 2.5 or 3.3 V depending from what solder bridge was soldered.Ensure that the target evaluation kit is connected to the USB-I2C bridge and the bridge is connected to the PCwith the STSW-WPSTUDIO software installed.The STSW-WPSTUDIO can connect a maximum of two USB-I2C converters, allowing PTx and PRx to beevaluated simultaneously.Figure 2. STEVAL-USBI2CFT hardware connection with STEVAL-WLC98RXFigure 3. STEVAL-USBI2CFT hardware connectionTable 1. List of supported WLC evaluation kit3 Interface descriptionThe STSW-WPSTUDIO main interface consists of three main sections: the top menu, the side menu bar, and theoutput window.The side menu bar selects the output in the output window.Figure 4. STSW-WPSTUDIO main interfaceConnect the wireless receiver or transmitter to GUI. Select the correct device on the evaluation board.Figure 5. ConnectionThe evaluation board was correctly connected to GUI.Figure 6. Confirmed connectionThe wireless receiver or transmitter setup is now ready to use. For the detail information about configuration, possibilities and features, follow the User Manual of the selected Wireless receiver or transmitter board.4 Component layoutFigure 7. STEVAL-USBI2CFT PCB layoutFigure 8. STEVAL-USBI2CFT top layoutFigure 9. STEVAL-USBI2CFT bottom layout5 Schematic diagramsFigure 10. STEVAL-USBI2CFT circuit schematicUM3226Schematic diagramsUM3226Bill of materials 6 Bill of materialsTable 2. STEVAL-USBI2CFT bill of materialsBoard versions 7 Board versionsTable 3. STEVAL-USBI2CFT versions1.This code identifies the STEVAL-USBI2CFT expansion board first version. It is printed on the board PCB.Regulatory compliance information 8 Regulatory compliance informationNotice for US Federal Communication Commission (FCC)For evaluation only; not FCC approved for resaleFCC NOTICE - This kit is designed to allow:1.Product developers to evaluate electronic components, circuitry, or software associated with the kit todetermine whether to incorporate such items in a finished product and2.Software developers to write software applications for use with the end product.This kit is not a finished product and when assembled may not be resold or otherwise marketed unless allrequired FCC equipment authorizations are first obtained. Operation is subject to the condition that this productnot cause harmful interference to licensed radio stations and that this product accept harmful interference. Unlessthe assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kitmust operate under the authority of an FCC license holder or must secure an experimental authorization underpart 5 of this chapter 3.1.2.Notice for Innovation, Science and Economic Development Canada (ISED)For evaluation purposes only. This kit generates, uses, and can radiate radio frequency energy and has not beentested for compliance with the limits of computing devices pursuant to Industry Canada (IC) rules.À des fins d'évaluation uniquement. Ce kit génère, utilise et peut émettre de l'énergie radiofréquence et n'a pasété testé pour sa conformité aux limites des appareils informatiques conformément aux règles d'Industrie Canada(IC).Notice for the European UnionThis device is in conformity with the essential requirements of the Directive 2014/30/EU (EMC) and of theDirective 2015/863/EU (RoHS).Notice for the United KingdomThis device is in compliance with the UK Electromagnetic Compatibility Regulations 2016 (UK S.I. 2016 No. 1091)and with the Restriction of the Use of Certain Hazardous Substances in Electrical and Electronic EquipmentRegulations 2012 (UK S.I. 2012 No. 3032).Revision historyTable 4. Document revision historyContents1Software installation (2)2Hardware connection (3)3Interface description (5)4Component layout (7)5Schematic diagrams (9)6Bill of materials (10)7Board versions (11)8Regulatory compliance information (12)Revision history (13)List of tables (15)List of figures (16)List of tablesTable 1. List of supported WLC evaluation kit (4)Table 2. STEVAL-USBI2CFT bill of materials (10)Table 3. STEVAL-USBI2CFT versions (11)Table 4. Document revision history (13)List of figuresFigure 1. STEVAL-USBI2CFT (1)Figure 2. STEVAL-USBI2CFT hardware connection with STEVAL-WLC98RX (3)Figure 3. STEVAL-USBI2CFT hardware connection (4)Figure 4. STSW-WPSTUDIO main interface (5)Figure 5. Connection (5)Figure 6. Confirmed connection (6)Figure 7. STEVAL-USBI2CFT PCB layout (7)Figure 8. STEVAL-USBI2CFT top layout (7)Figure 9. STEVAL-USBI2CFT bottom layout (8)Figure 10. STEVAL-USBI2CFT circuit schematic (9)IMPORTANT NOTICE – READ CAREFULLYSTMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment.Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products.No license, express or implied, to any intellectual property right is granted by ST herein.Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to /trademarks. All other product or service names are the property of their respective owners.Information in this document supersedes and replaces information previously supplied in any prior versions of this document.© 2023 STMicroelectronics – All rights reserved。

实用分享:IIC总线通用手册

实用分享:IIC总线通用手册

实用分享:IIC总线通用手册IIC (也称I2C)即Inter-Integrated Circuit(集成电路总线),这种总线类型是由飞利浦半导体公司在八十年代初设计出来的,主要是用来连接整体电路(ICS) ,IIC是一种多向控制总线,也就是说多个芯片可以连接到同一总线结构下,同时每个芯片都可以作为实时数据传输的控制源。

这种方式简化了信号传输总线接口。

随着规模集成电路技术的发展,把CPU和一个单独工作系统所需的ROM、RAM、I/O端口、A/D、D/A等外围电路集成在一个单片内制作成的单片机或微控制器月俩月方便。

目前,世界上许多公司生产的单片机,品种很多。

其中包括各种字长的CPU,这种容量的ROM、RAM以及功能各异的I/O接口电路等等,但是,单片机的品种规格依旧有限,所以只能选用某种单片机来进行扩展。

扩展的方法有两种:一种是并行总线,另一种是串行总线。

由于串行总线的连线少,结构简单,往往不用专门的母版和插座就可以直接用导线连接各个设备。

因此,采用串行线可大大简化系统的硬件设计。

PHILIPS公司在十几年前推出了I2C串行总线,利用该总线实现多主机系统所需的裁决和高低速设备同步等功能。

因此,这是一种高性能的串行总线。

【I2C总线的特点】I2C总线最主要的优点是其简单性和有效性。

由于接口直接在组件上,因此I2C总线占用的空间非常小,减少了电路板的空间和芯片管脚的数量,降低了互联成本。

总线的长度可高达25英尺,并且能够以10KBPS的最大传输速率支持40个组件,I2C总线的另一个优点是,它支持多主控,其中任何能够进行发射和接受的设备都可以成为主总线,一个主控能够控制信号的传输和时钟频率。

当然,在任何时间点上只能有一个主控。

【I2C总线的双向信号线】I2C总线只有两根双向信号线。

一根是数据线SDA,另一根是时钟线SCL。

连接到相同总线的IC数量,受总线最大电容400PF的限制。

I2C总线通过上拉电阻接正电源。

I2C-Cabling说明书

I2C-Cabling说明书

I2C-Cabling By Brian Hughes, Product EngineerAn inter-integrated circuit (I2C) bus uses two lines, serial data (SDA) andserial clock (SCL), to transfer information between devices connected to the bus. I2C devices have open-drain outputs. When an I2C device drives a low, the output of the devices pulls the bus to ground. When an I2C device switches high, the output of the device goes into a high-Z state where the bus is pulled up to VDDby a pull-up resistor connected betweenthe bus and VDD. The pull-up resistors along with the capacitance of the cabling or bus creates a charging RC time constant. If using off board cabling or very long buses, the total bus capacitance increases, which increases the rise time of the signal and reduces maximum operating frequency. The total bus capacitance also increases with the number of devices connected to the bus. Figure 1 illustrates the connections of two basic I2C devices to an I2C bus.DEVICE 1DEVICE 2Figure 1. Two basic I2C devices connected to an I2C bus.The I2C bus specifications restrict the rise time of a signal for different operating frequencies. The fast-mode plus (1 MHz maximum operating frequency) specification declares a maximum rise time for a data or clock signal to be 120 ns. If 1 MHz operating frequency is not necessary, fast mode (400 kHz maximum operating frequency) can be used, which permits a rise time up to 300 ns. With a fixed value of the pull-up resistor (RP),a linear relationship between rise time (t R) and total bus capacitance (C B)is described by Equation 1. In this case, rise time (t R) is the time it takes asignal to rise from 0.3 × VDDto 0.7 × VDD. This equation is derived by solvingthe voltage of a charging capacitor for VC= 0.3 × VDDand VC= 0.7 × VDD.tRC B (MAX)R0.8473P×=Equation 1.Using the data sheet recommended pull-up resistor values for 5 V operating conditions for side one and side two of an I2C compliant hot swappable digital isolator (ADUM1250), we can calculate that the maximum cable capacitance for side one is 88 pF and for side two is 780 pF. These are theoretical maximum capacitance values; the suggested load capacitance values in the ADUM1250 data sheet are 40 pF for side one and 400 pF for side two. The data sheet values account for design margin, ESD protection, and 400 pF is a standard for an I2C bus. The primary reason for the different load capacitance values of each side of the ADUM1250 is due to their drive strengths. The higher drive strength of side two (30 mA) allows for a lower pull-up resistor value than side one’s 3 mA drive strength permits.Four-way ribbon cable can be used to extend an I2C bus. Normally, this type of ribbon cable is approximately 50 pF per meter. For a cabling application, an ADUM1250 could connect one section of the I2C bus with 40 pF of total bus capacitance to side one. Side two could connect a four way ribbon cable (up to 8 meters in length) that transfers isolated data to additional I2C devices connected to the bus. If a distance larger than 8 meters is neces-sary, or if there is more than 40 pF of total capacitance connected to side one, the maximum operating frequency can be reduced to allow a longer rise time and a larger bus capacitance.ReferencesThe I2C-Bus and How to Use It. Phillips Semiconductor, 1995./fileadmin/ftp/I2C_bus_specification_1995.pdfUM10204. I2C-bus specification and user manual. NXP Semiconductors, 2012./documents/other/UM10204_v5.pdfShare this on:Analog Devices, Inc.Worldwide HeadquartersAnalog Devices, Inc.One Technology WayP.O. Box 9106Norwood, MA 02062-9106U.S.A.Tel: 781.329.4700(800.262.5643,U.S.A. only)Fax: 781.461.3113Analog Devices, Inc.Europe HeadquartersAnalog Devices, Inc.Wilhelm-Wagenfeld-Str. 680807 MunichGermanyTel: 49.89.76903.0Fax: 49.89.76903.157Analog Devices, Inc.Japan HeadquartersAnalog Devices, KKNew Pier TakeshibaSouth Tower Building1-16-1 Kaigan, Minato-ku,Tokyo, 105-6891JapanTel: 813.5402.8200Fax: 813.5402.1064Analog Devices, Inc.Asia Pacific HeadquartersAnalog Devices5F, Sandhill Plaza2290 Zuchongzhi RoadZhangjiang Hi-Tech ParkPudong New DistrictShanghai, China 201203Tel: 86.21.2320.8000Fax: 86.21.2320.8222©2013 Analog Devices, Inc. All rights reserved.Trademarks and registered trademarks are theproperty of their respective owners.T12012-0-12/13。

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地址 0x32 0x33 0x34 0x35 0x38 0x39 0x79 0x7a 0x7b 0x7c 0x7d 0x7e 0x7f 0xc0
功能 喇叭设置 读取数码信号输入格式指示 读取杜比数码或 DTS 输入通道信息 噪声测试选择 中置声道延迟时间调整 环绕声道延迟时间调整 字符串内码转换及参数设置(在 WR_CODE_INPUT 后设置) 输入需要转换的字符串内码,以 0x0000 为结束 读取输出转换后的字符串内码,以 0x0000 为结束 设置显示屏的参数 输入自定义的字符串内码获得显示用的字库,以 0x0000 为结束 生成字库并从已经获取的FONT_BUFF字库指定偏移位置 读取字库的缓冲 带掉电记忆的FLASH记忆空间读写
长度 1 1 1 1 1 1 2 1~64 1~64 8 1~64 2 1~320 1~64
� DSP 从机 I2C 寄存器说明
� 寄存器名称:RD_INTRD 地址:0x00 读写:读 字节长度:2 字节 说明:读取中断寄存器,字节 0 与字节 1 组成 16 位的中断号,字节 0 的 B0 为 0x0001;字节 1 的 B7 为 0x8000;以此类推。中断号与清除中断号寄存器 WR_INTCLR 及中断允许寄存器 WR_INTENA 相 同。 中断号说明: 中断号 INT0 INT1 INT2 INT3 INT4 INT5 INT6 INT7 INT8 INT9 INT10 INT11 INT12 INT13 INT14 INT15 寄存器值 0x0001 0x0002 0x0004 0x0008 0x0010 0x0020 0x0040 0x0080 0x0100 0x0200 0x0400 0x0800 0x1000 0x2000 0x4000 0x8000 中断说明 保留 切换 USB/SD 卡指定文件夹及其信息准备完成中断 保留 DSP 从机初始化中断,可防止用户主机与 DSP 从机不同步上电 当前设备USB/SD卡接口插入/拔出中断,需要读取RD_DISK_DEV寄存器 保留 数码信号输入格式变化中断,需要读取 RD_FORMAT 寄存器 杜比数码或 DTS 输入通道信息中断,需要读取 RD_CHINFO 寄存器 USB/SD 卡内文件结构扫描已完成中断,可读取相关信息 USB/SD卡开始播放中断,文件信息完成,可读取RD_TIME_TOTAL、 RD_FILE_INFO、 RD_FILE_TIME、RD_FILE_NAME寄存器 当前曲目播放时间变化中断 一曲播放结束中断 字符串内码转换完成中断,可读取 RD_CODE_OUTPUT 获得转换后的内码 字库读取完成中断,可读取 RD_FONT_BUFF 寄存器获得显示的字库 字库读取完成,但显示的内容为空白中断,无需读取任何数据 保留
名称 WR_SPEAKER RD_FORMAT RD_CHINFO WR_TEST_TONE WR_CCH_DLT WR_SCH_DLT WR_CODE_SETUP WR_CODE_INPUT RD_CODE_OUTPUT WR_FONT_SETUP WR_SPEC_STRING WR_FONT_CREATE RD_FONT_BUFF WR_RD_MEMORY
2 2 2 2 2
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开始
2
器件地址(读)
读数据 0
读数据 X(多字节时)
结束
先使用写的器件地址写入待读取的寄存器地址,再使用读的器件地址读入相应的数据。 在对 I C 读取每个字节时,需要发送第 9 位 ACK 位,ACK 位由用户主机输出 0。但最后一个字节则需 要发送第 9 位 NAK 位,NAK 位由用户主机输出 1。
地址:0x01 读写:写 字节长度:2 字节 � 寄存器名称:WR_INTCLR 说明:清除中断寄存器,用于清除 DSP 从机的中断,中断号与读取中断寄存器相同,用户主机在该寄 存器写入值 0x0001 即可清除 INT0,写入值 0x0002 即可清除 INT1……其余依此类推。 注意:读取后应清掉相应的中断号,否则将一直中断。 � 寄存器名称:WR_INTENA 地址:0x02 读写:写 字节长度:2 字节 说明:中断允许寄存器。该寄存器用于开/关 INT0~INT15,16 位寄存器,每一位代表一个中断号, 相 应的位为 1 表示允许相应的中断产生,为 0 则表示关闭相应的中断。 注意:只有中断设置为开时,DSP 从机才会在内部状态有变时产生相应的中断。 地址:0x05 读写:读 字节长度:1 字节 � 寄存器名称:RD_MODEL 说明:读取 DSP 从机型号字符串简称。DSP 从机根据不同的硬件设置该寄存器的型号字符串值。 字节 字符串 寄存器值 说明 'C' 0x43 硬件型号为 DA32C 0 'T' 0x44 硬件型号为 OTG13T 'V' 0x47 硬件型号为 OTG13V � 寄存器名称:RD_VERSION 地址:0x06 读写:读 说明:读取 DSP 从机的软件版本号。 字节 说明 0 软件版本号 1 软件发行日期的日 2 软件发行日期的月份 3 软件发行日期的年份 字节长度:4 字节
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多媒体音频 I2C 软件用户手册
hsavd102.pdf
2012 年 07 月 16 日
地址:0x07 读写:读 字节长度:2 字节 � 寄存器名称:RD_DISK_DEV 说明:读取U盘/SD卡端口当前可用设备及当前正在工作中的设备号。 字节 寄存器值 说明 0x00 无设备 0x01 SD 卡 U 盘/SD 卡端口 0 当前可用设备 0x10 U盘 0x11 U 盘 + SD 卡 0x01 U盘 当前正在工作 1 中的设备号 0x10 SD 卡 注意:在输入端口为 USB/SD 时有效。 地址:0x10 � 寄存器名称:RD_DIR_TOTAL 说明:读取 U 盘/SD 卡的目录总数。 注意:在输入端口为 USB/SD 时有效。 � 寄存器名称:RD_DIR_NAME 地址:0x11 说明:读取 U 盘/SD 卡当前播放目录的目录名。 注意:在输入端口为 USB/SD 时有效。 读写:读 字节长度:1~64 字节 读写:读 字节长度:2 字节
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多媒体音频 I2C 软件用户手册
hsavd102.pdf
2012 年 07 月 16 日
� 多媒体音频 I2C 通讯指令简表
名称 RD_INTRD WR_INTCLR WR_INTENA RD_MODEL RD_VERSION RD_DISK_DEV RD_DIR_TOTAL RD_DIR_NAME WR_SET_DIR RD_ALL_FILE RD_DIR_FILE RD_TIME_TOTAL RD_FILE_TIME RD_FILE_NAME RD_FILE_INFO WR_COMMAND WR_PLAY_FILE WR_REPEAT WR_SPEED_FW WR_SPEED_BK WR_VOLUME WR_EQ_MODE WR_INPUT WR_LISTEN 地址 0x00 0x01 0x02 0x05 0x06 0x07 0x10 0x11 0x12 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x20 0x21 0x22 0x23 0x24 0x28 0x29 0x30 0x31 功能 读取中断寄存器 清除中断寄存器 中断允许寄存器 读取DSP从机型号字符串简称 读取DSP从机版本号 读取当前可用设备及当前正在工作中的设备号 读取目录总数 读取当前目录目录名 选择播放的目录 读取所有目录的曲目总数 读取当前目录曲目总数 读取当前曲目总时间 读取当前播放文件已播放时间 读取当前文件名内码 读取当前曲目信息 播放指令集 指定曲目播放 循环播放模式设置 快进(共5种快进模式,操作后播放功能键为停止快进) 快退(共5种快退模式,操作后播放功能键为停止快退) 音量控制 预置均衡EQ音频效果处理 输入端口选择 聆听模式选择 长度 2 2 2 1 4 2 2 1~64 2 2 2 2 2 1~64 9 1 2 1或5 1 1 1 1 1 1
多媒体音频 I2C 软件用户手册
� 简要说明:
� 多媒体音频 DSP 使用 I C 通讯与用户单片机通讯。用户单片机简称用户主机,作为 I C 主机,主 动发起 I C 读及写通讯。多媒体音频 DSP 简称 DSP 从机,作为 I C 从机只能使用 INT 方式通知用 户主机 。对于用户主机只执行写寄存器或读寄存器两种动作。 � � � � � � � � � 寄存器长度一般为 8 位,用户主机只需要一个字节的读写即可。另外标注字节长度的寄存器, 则 需要多个字节的读写,应根据需要进行多字节的读写。 如果是 2 个字节组成 16 位的参数,则第 1 个字节为低位,第 2 个字节为高位。 如果是 4 个字节组成 32 位的参数,则第 1 个字节为低位,第 4 个字节为高位。 0xnn 表示所描述的值不确定, 可能为任意值。 但其值为原先约定的范围, 例如指令长度为 2~137。 B7 表示位于字节的第 7 位,B6 表示位于字节的第 6 位,以此类推。 DSP 从机除了用于 I C 的 SCL 及 SDA 接口之外,额外提供一个 INT 输出引脚,用于在 DSP 从机内 部状态改变后通知用户主机之用。 正常工作时 INT 引脚为高电平,由 DSP 从机之内的上拉电阻拉高,可以被外部电路拉低,但不能 被外部电路拉高,与 8051 单片机的接口相同。 当 DSP 从机内部有中断产生时, 将置低 INT 引脚。 在用户主机消除了相应的中断状态后 DSP 从机 会将 INT 引脚置高。 用户主机可以随时检测 INT 引脚的电平变低,在检测到 INT 引脚为低后读取 RD_INTRD 寄存器。 RD_INTRD 为 16 位的寄存器,每一个位用来表示一种中断,共有 INT0~INT15 种中断。每个中断 可以由 WR_INTENA 寄存器设置或清除。 当有读取到中断后, 可以设置寄存器 WR_INTCLR 相应的中 断号清除产生的中断。 � � DSP 从机的中断机制只是提供一种快速的处理模式,用户主机可以依靠中断号读取相应的寄存 器,这样可以大大提高 I2C 总线的使用时间。 在只读或读写寄存器之后带有“INTx”的寄存器,一般建议是在用户主机读取到相应中断后再读 取, 这样获得的信息是最及时的, 如果在没有发生中断就读取, 一般只是读到上次未更新的信息。
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