Automatic Layout Generation of High Performance Digital-to-Analog Converters

Automatic Layout Generation of High Performance Digital-to-Analog Converters

C.Lin,K.Doris,A.H.M.van Roermund

Mixed-signal Microelectronics Group

Dept.of Electrical Engineering

Eindhoven University of Technology

Eindhoven,5600MB

e-mail:C.Lin@tue.nl

Abstract—This paper presents a novel approach to(semi-)automatic lay-out generation of high-speed digital-to-analog(D/A)converters with im-proved static and dynamic performance.The proposed method is based on placement and routing algorithms in connection with constraints for high-speed high-performance D/A architectures.To our knowledge,no published results are available with respect to physical implementation of general techniques for improving both static and dynamic performance of digital-to-analog converters.Optimal switching sequences improve both static and dynamic performance.Algorithms are proposed that canfind near optimal switching sequences.A CAD tool is proposed that incorpo-rated all steps to generate a high-performance layout of a D/A converter. Preliminary results(on algorithmic level)are shown that demonstrate the viability of our approach with regard to practical implementation issues.

Keywords—digital-to-analog converter,automatic layout generation, placement,routing,floor-planning,thermometer decoding,switching se-quence,optimization

I.I NTRODUCTION

LACEMENT and routing are two very important steps in order to get a fully functional integrated circuit with spec-ified performance.The last few years researchers from both academia and industry have become aware of the importance of proper placement and routing.The impact of these two layout steps is getting greater as technology scales down and operating frequencies become higher.Phenomena such as substrate cou-pling,crosstalk and delay start being serious issues.This does not only hold for mixed-signal designs,but even for digital de-signs.

In this paper we will focus on an important class of mixed-signal circuits,i.e.digital-to-analog(D/A)converters.These circuits are especially sensitive to placement and routing be-cause of their inherent(time and space)matching requirements. There are known techniques for handling,to some extent,the problems that arise when implementing D/A converters.How-ever,either these solutions are too high-level or only solve part of the problem.With“too high-level”we mean that not all of the practical details are taken into account,such as routing com-plexity.A partial solution is one that considers only part of the problem and ignores other related issues.

A novel approach is proposed that takes into account the prob-lems that arise when implementing D/A converters.The perfor-mance issues are split in two parts:static performance,e.g.in-tegral non-linearity(INL),and dynamic performance,e.g.spu-rious free dynamic range(SFDR).

In Section II some common terms in thefield of D/A convert-ers are explained.Furthermore,terminology that is used in the placement and routing domain is also clarified.The architecture for which we generate a layout is described in Section III.Then,

in Section IV the components that our approach consists of are put in a CAD tool framework,handling both static and dynamic

performance issues.The gaps that are still open in the architec-

ture in order to arrive at a high-performance D/A converter are

filled in.Some preliminary results given in Section V show that

in principle it is practically feasible to automatically generate a layout for a high-performance D/A converter.We end with some

conclusions in Section VI.

II.S OME T ERMINOLOGY

In this section the terminology that is used in connection

with D/A converters,placement and routing is defined.Gen-

erally,the performance of a D/A should be measured both in

the static domain and in the dynamic domain in order to get an idea of the(practical)quality of a converter.For D/A con-

verters the differential non-linearity(DNL)and the integral non-

linearity(INL)are two static performance constraints that drive

our design method.Let usfirst define an LSB(Least Signifi-

cant Bit)in the context of the analog output signal as the analog output signal difference between two consecutive digital code

words.Equivalently,it can be defined as the full-scale output

range divided by the number of digital code words.DNL is

defined by the maximum deviation expressed in LSB of the ana-

log output signal from the ideal output.Any deviation from the ideal output signal for a given input code is given by.So

DNL.INL is defined as

(1) where is the number of bits of the digital input word,and

is a one-to-one function that maps a position in the sequence of

consecutive code words to an value.Furthermore,by defini-tion.Note that(1)is a weaker(but sufficient) definition compared to the one used in[1].

One of the terms that is used with regard to dynamic per-

formance is SFDR,which is defined to be the ratio between

the maximum signal component and the largest distortion com-ponent in the frequency domain.Another important dynamic specification is the signal-to-noise plus distortion(SINAD)ra-tio.This is actually the ratio of the signal power over the non-signal power.For high-speed high-performance D/A converters, normally SFDR is sooner a practical issue than SINAD.