An Ultra-Wide-Band 0.4–10-GHz LNA

An Ultra-Wide-Band 0.4–10-GHz LNAin 0.18- m CMOSKe-Hou Chen,Jian-Hao Lu,Bo-Jiun Chen,and Shen-Iuan LiuAbstract—A two-stage ultra-wide-band CMOS low-noise ampli-fier (LNA)is presented.With the common-gate configuration em-ployed as the input stage,the broad-band input matching is ob-tained and the noise does not rise rapidly at higher frequency.By combining the common-gate and common-source stages,the broad-band characteristic and small area are achieved by using two inductors.This LNA has been fabricated in a0.18-m CMOS process.The measured power gain is 11.2–12.4dB and noise figure is 4.4–6.5dB with 3-dB bandwidth of 0.4–10GHz.The measured IIP3is 6dBm at 6GHz.It consumes 12mW from a 1.8-V supply voltage and occupies only 0.42mm 2.Index Terms—Common-gate configuration,ultra-wide-band (UWB)CMOS low-noise amplifier (LNA).I.I NTRODUCTIONIN RECENT years,the demand for high-speed and high data-rate wireless communications is increasing.For IEEE 802.11b and 802.11g standards,the operation frequency is 2.4GHz with data-rate of 11and 54Mbps,respectively.The operation frequency of the 802.11a standard is 5.2/5.7GHz,which avoids the crowded 2.4-GHz band for less interference and higher data rate.Unlike narrow-band systems mentioned above,ultra-wide-band (UWB)systems are an emerging wireless technology capable of transmitting data over a wide frequency band for short ranges with low power and even higher data rate.The allocated band of UWB (IEEE 802.15.3a)is be-tween 3.1–10.6GHz.[1].Even this standard is not completed,a wide-band low-noise amplifier (LNA)for a wireless front-end is crucial in spite of the receiver architectures.The amplifier must meet several stringent requirements,such as broad-band input matching to minimize the return loss,sufficient gain to suppress the noise of a mixer,low noise figure (NF)to enhance receiver sensitivity,low power consumption to increase battery life,and small die area to reduce the cost.Many wide-band CMOS LNAs have been developed in liter-ature [1]–[5].However,there are still some limitations among them.For example,the conventional distributed amplifier suf-fers from high power consumption [2].Resistive feedback is a well-known wide-band technique used in wide-band amplifiers,but it is hard to satisfy gain and noise requirements simultane-ously [4].Another solution is to embed the input network inManuscript received April 10,2006;revised July 11,2006.This work was supported by National Science Council,Taiwan,R.O.C.This paper was recom-mended by Associate Editor W.A.Serdijn.The authors are with the Graduate Institute of Electronics Engineering and Department of Electrical Engineering,National Taiwan University,Taipei,Taiwan 10617,R.O.C.(e-mail:lsi@.tw).Digital Object Identifier10.1109/TCSII.2006.886880Fig.1.Proposed UWB LNA.a multi-section reactive network so that the overall input reac-tance is resonated over a wider bandwidth [1].Although this filter-type topology achieves wide-band matching,low power consumption,and can suppress the high frequency variation de-pending on the technology,the insertion loss of filter adds noise at low frequency.On the other hand,and NF grows rapidly at higher frequency for CMOS technology.For example,the NF boosts from 5to 9dB only in the 7–10-GHz range [1].In order to get the desirable matching condition,inductor modeling in the filter must be accurate enough,otherwise the bandwidth and flatness would be degraded.Moreover,it takes several induc-tors to achieve the wide-band matching,and it occupies a big area.To solve these problems,an UWB LNA is presented with the common-gate and common-source amplifiers cascaded to-gether.It needs only two inductors and the wide-band matching condition is achieved with low power consumption and small area.II.C IRCUIT D ESCRIPTIONThe proposed wide-band LNA is shown in Fig.1.It consists of a common-gate stage,a common-source stage,and an output buffer.The input common-gate stage provides the wide-band noise and power matching.Let us neglect the loading effect of the second stage and the parasitic resistance of inputinductor,.The input impedance is simplifiedas(1)whereand is the transconductance and the gate-to-source capacitance of thetransistor,respectively.Equation (1)reveals that there is a zero near dc.This zero determines the low 3-dB frequency.At lower frequency,the input inductor,1549-7747/$25.00©2007IEEEFig.2.Effect ofL on S.,provides the extremely small impedance to ground;hence,is dominatedby and the value is almost zero.As fre-quency increasesand ,the input impedance is closeto .Although the impedanceof changes thephaseof,the magnitudeof is still dominatedby during gigahertz operation.The valueof determines the input matching range,as shown in Fig.2,in which the induc-tance varies from 3to 11nH.As shown in Fig.2,the frequencybandforsmallerthan dB is about 10GHz.By virtue of the in fluenceof,an optimal matching exists in which the input impedance is close to50.As a result,we can choose the inputinductor of 5.3nH such that the optimal matching fre-quency falls around the middle of the operation frequency range to ensure broad-band input matching condition.The input common-gate stage not only provides wide-band input matching,but also a narrow-band frequency response.The transfer function of the first stage can be expressed as (2),shownat the bottom of the page.The sizeofis designed for proper input matching.The valueofis critical here,because it determines the gain of the first stage and the gate bias of the next stage.The simulated frequency response of the first stageis shown in Fig.3.Here,is chosen320such that the gain of the common-gate stage is 8.5dB with 3-dB bandwidthof 0.4–3.5GHz,andis set for 720mV toensure in saturationregion.Fig.3.Simulated frequency response of the first stage.The second stage is a simple cascode common-source stage,which provides high-frequency gain and determines higher3-dB bandwidth of the LNA.The cascodetransistoris used for better isolation,higher frequency response,and highergain.A series peakinginductoris resonant with the total parasiticcapacitancesat the drainof around 10GHz [6].The transfer function is expressed as (3),shown at the bottom of the page.The simulated frequency response is shown in Fig.4,and it shows a maximum gain of 19dB and 3-dBbandwidth is 8–13GHz.The cascodedeviceis chosen smaller to have less parasitic capacitance.Conventionally,the quality factor(factor)of the inductor for LNAs should be as high as possible to achieve high-gain,narrow-band character-istic;however,the factorofin this design is kept smaller for flat gain of the whole LNA.Hence,an extraresistorof60is added to reduceto factor.In other words,we cansave a lot of area by reducing the inner radiusofor even use stacked inductor to obtain enough inductance,therefore the complexity of designing ahigh-inductor at such high frequency is lessened.The output buffer is a simple source follower,thatis(4)(2)(3)CHEN et al.:UWB 0.4–10-GHZ LNA219Fig.4.Simulated frequency response of the secondstage.Fig.5.Simulation results for S ;S ,and NF.where is the output resistance.In order to reduce the para-sitic capacitance arisen from a large device,the input device of this buffer must be reduced despite the larger loss occurs.Thefixed bias currentforis 5.7mA and the power consumption of the output buffer is 10.2mW from 1.8-V supply.The width and length are set to 54and0.18m,respectively.The loss of the output buffer is 6dB in this design for output matching.Fig.5shows the simulation results of the proposed LNA.For,there is a minimum around 5GHz,which means the input impedance is matched at the frequency.Although input return loss gets higher away from the point,the wide-bandmatching characteristic is well controlledbelowdB from 1.9to 11GHz.As shown in Fig.5,the simulated broad-band power gain of 12.8to 14.8dB is achieved for 0.6–11.2GHz.Only twoinductorsand ,are need in this LNA.On the other hand,the simulated NF is 4.3–5.5dB from 2to 10.6GHz,which exhibits a relatively small variation across entire band.In this LNA,the bias voltage is generated by a current mirror with an ac ground capacitor to avoid the noise contributedbyFig.6.Microphotograph of theLNA.Fig.7.Measured S -parameters.bias isolation resistors.All the transistors are triple-well devices.With the n-well connected to the supply voltage,the substrate coupling noise is also reduced.III.E XPERIMENTAL R ESULTSThe proposed LNA has been fabricated in a0.18-m CMOS process and it occupies an area of only 0.82mm by 0.51mm with testing pads.On-wafer measurement is carried out for power gain,input/output return loss,NF and IIP3.The die microphotograph is shown in Fig.6.Fig.7shows themeasured -parameters of the UWB LNA.The measured power gain is higher than 12dB around 1and 8GHz and the smallest gain occurs at 4GHz of 11.2dB.The reason that the measured bandwidth is lower than simulated one might be due to the inaccuracy of the inductor and tran-sistor modeling which brings extra parasitic effects in the second stage.Fig.8shows the measured,the original and modi fied sim-ulation resultsof.In the modi fied simulation,the extra par-asitic capacitance of 30fF is added onnode ,the mod-i fied valueofand a cable loss of 2dB are taken into account.Themeasuredis close to the modi fied one by con-sidering the above nonlinearities.As the frequency goes higher,220IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS —II:EXPRESS BRIEFS,VOL.54,NO.3,MARCH 2007TABLE IP ERFORMANCE SUMMARYFig.8.Measured and simulatedSFig.9.MeasuredNF.keepsbelow dB up to more than 12GHz.Themeasuredand are lowerthan dB across the entire band.Bymeasured -parameters,the stability factor is computed and its value is larger than 1across the interested frequencies.The measured NF is shown in Fig.9and it is 4.4–6.5dB from 2to 10GHz.Owing to the common-gate characteristic,the measured NF does not rise rapidly at higher frequency com-pared with those filter-type wide-band LNA [1].Two-tone test is performed with 1MHz spacing for third-order intermodulation distortion,which is shown in Fig.10.At 6GHz,themeasuredFig.10.Measured IIP3at 6GHz.IIP3is dBm and the measured 1-dB compression pointisdBm.Performance summary of this LNA is listed in Table I,and compared with previous published0.18-m CMOS-based broad-band LNAs especially for UWB systems.The maximum power gain is higher and power consumption is small.The core consumes 12mW,and total power including output buffer and the remaining circuits is 24mW.Due to only two inductors used in the design,the die area is the smallest one among them.The NF is based on the measurement of 3–10GHz.IV .C ONCLUSIONA UWB CMOS LNA has been implemented in a0.18-m CMOS process.The measured power gain is 11.2–12.4dB and NF is 4.4–6.5dB with 3-dB bandwidth of 0.4–10GHz,while input and output matching are bothbelowdB from 2.2–12GHz.The IIP3isdBm at 6GHz.It consumes 12mW from 1.8V supply and occupies only 0.42mm .Com-pared with other broad-band techniques,the presented LNA takes the advantages:less design complexity,low high-fre-quency noise,low power dissipation,and small size.A CKNOWLEDGMENTThe authors would like to thank National Chip Implementa-tion Center for chip implementation and National Nano Device Laboratory for measurement support.CHEN et al.:UWB0.4–10-GHZ LNA221R EFERENCES[1]A.Bevilacqua and A.M.Niknejad,“An ultra-wide-band CMOS low-noise amplifier for3.1to10.6-GHz wireless receiver,”IEEE J.Solid-State Circuits,vol.39,no.12,pp.2259–2268,Dec.2004.[2]R.Liu,C.Lin,K.Deng,and H.Wang,“A0.5–14-GHz10.6-dB CMOScascode distributed amplifier,”in Dig.Symp.VLSI Circuits,Jun.2003, vol.17,pp.139–140.[3]C.F.Liao and S.I.Liu,“A broadband noise-canceling CMOS LNAfor3.1–10.6-GHz UWB receiver,”in Proc.IEEE2005Custom Integr.Circuits Conf.,Sep.2005,pp.161–164.[4]C.-W.Kim,M.-S.Kang,P.T.Anh,H.-T.Kim,and S.-G.Lee,“An ultrawide-band CMOS low-noise amplifier for3–5-GHz UWB system,”IEEE J.Solid-State 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