AD8667ARMZ-R21中文资料

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AD8476ARMZ,AD8476ACPZ-RL,AD8476ARMZ-RL,AD8476ARMZ-R7,AD8476BRMZ-R7, 规格书,Datasheet 资料

AD8476ARMZ,AD8476ACPZ-RL,AD8476ARMZ-RL,AD8476ARMZ-R7,AD8476BRMZ-R7, 规格书,Datasheet 资料
Data Sheet
FEATURES
Low Power, Unity Gain, Fully Differential Amplifier and ADC Driver AD8476
FUNCTIONAL BLOCK DIAGRAM
7 –VS 8 INP 6 NC 5 –OUT
Very low power 330 μA supply current Extremely low harmonic distortion −126 HD2 at 10 kHz −128 HD3 at 10 kHz Fully differential or single-ended inputs/outputs Differential output designed to drive precision ADCs Drives switched capacitor and Σ-Δ ADCs Rail-to-rail outputs VOCM pin adjusts output common mode Robust overvoltage up to 18 V beyond supplies High performance Suitable for driving 16-bit converter up to 250 kSPS 39 nV/√Hz output noise 1 ppm/°C gain drift maximum 200 μV maximum output offset 10 V/μs slew rate 6 MHz bandwidth Single supply: 3 V to 18 V Dual supplies: ±1.5 V to ±9 V
芯天下--/
10195-002
AD8476 TABLE OF CONTENTS

Armacost Lighting Wi-Fi LED Lighting Controller Mo

Armacost Lighting Wi-Fi LED Lighting Controller Mo

Wi-Fi LED Lighting Controller Model: ALWIFI14R, Item: 714425Download the full instruction manual at /wi-fiCompatible with Android and Apple (iOS) smartphones and tablets. Works with fi ve types or combinations of LED lighting (both 12- and 24-volt): White or single-color LEDlighting – provides 0-100%full range dimmingWhite color adjustable LEDtape lighting – dimmingand CCT controlStandard RGB LED lighting –full function color controland effectsRGB + white four-channelLED enhanced color controland effectsRGB + CCT dual white fi ve-channel enhanced color controland effectsFeaturesUse in conjunction with Armacost Lighting’s Wireless Touchpad(item 523120) for wall-mounted wireless on/off and dimmingcontrol of your lights.Works with or without a wireless network. Use your phone as a simple remote or use any existing wireless network for advanced control features Connect and control up to 50 Wi-Fi controllers with one device*.Control individually or in groups for large area, multi-zoned lightingcontrol (requires router and network connection)Control your lighting remotely from anywhere in the world whenconfi gured through your networkSync lighting to the beat of music stored locally on your device,or use your microphone to sync to ambient musicProgrammable – set the time of day to turn your lighting on or offWhen used with RGB LED lighting, create your own color-changing effects or choose from 20 preprogrammed modes. Bookmark andsave favorite colors and effects. Match colors in your environmentusing your device’s camera, or manually enter RGB values for precise color selections* O nly static colors will synchronize and dim in unison whenusing color-changing LED lighting. Color-changing effectswill not stay synchronized.ConnectingLow-voltage safe, the Wi-Fi controller is direct wired inline between the low voltage output of your power supply and your LED lighting.Typical Wiring DiagramWIRELESSTOUCHPAD(OPTIONAL)ACSTANDARD12-24 VOLT DC OUTPUTPOWER SUPPLY/WI-FI LEDLIGHTINGOutput to 12- or 24-volt DCLED lightingEach Wi-Fi controller requires a separate LED power supply.To prevent interference, never connect multiple Wi-Fi controllersto one power supplyUse only with 12- or 24-volt DC constant voltage power supplies.The voltage output of your power supply must be the same as yourLED lightingAll wiring must be in accordance with national and local electricalcodes, low-voltage Class 2 circuit. If you are unclear as to howto install and wire this product, contact a qualifi ed electricianAlways read and follow the Installation Guidelines provided with yourLED lighting and power supplyfull instruction manual.Note: To enable the maximum length of white LED lighting, connect two legsof LED lighting to the Wi-Fi controller using the W1 and W2 port connectionsas shown below.Each leg can support up to 4 amps of LED lighting4 amps x 12 volts = 48 watts x 2 legs = 96 watts maxwith 12-volt lighting4 amps x 24 volts = 96 watts x 2 legs = 192 watts maxwith 24-volt lighting** F or dual color temperatures, or color temperature adjustable lighting,connect the warmer tape lighting (lower K number)to W1 and the cooler lights (higher K) to W2.App InstallationDownload and connect thefree Armacost Lighting appGo to Apple iTunes Store or Google Play for Androiddevices. Search for Armacost MyLED Pro to downloadand install the app.Make sure the controller is correctly installed and powered on beforeattempting to use the app to connect your device.1. Make sure Wi-Fi is enabled on your mobile device.2. Start the Armacost Lighting app and follow the instructionsto connect to your Wi-Fi controller.Note: After connecting to your wireless network, the link light on thefront of the Wi-Fi controller will illuminate. This indicates that yourconnection is successful and you will be able to access your Wi-Ficontroller through your wireless network.Direct wireless connection versus connectingto your network via your routerIf you do not have a Wi-Fi network, or do not want to connect to yourwireless router, you can directly connect to the controller. With thismethod, you will not have access to your network while connectedto the Wi-Fi controller, and vice versa. Using a direct connection,only one controller may be accessed at a time.Armacost Lighting recommends connecting to your home networkvia your wireless router to enable full app features. By going throughthe router setup, you will link your Wi-Fi controller through yourexisting wireless network. This will allow you to access the Internetand your color controller without switching between Wi-Fi networks.Additionally, you will be able to use the remote access settings, andWi-Fi controllers connected to the same network can be groupedtogether for synchronized control across multiple zones.MyLED ProYou are required to create an Armacost Lighting account upon initial setup. This account registration is used only to protect your devices and to permit remote usage. Next, you will be prompted to select the type of lighting you are connecting. Choose the mode that applies to the type of lighting you are using. For example, if you are using single color or white LED lighting, select “DIM,” and your app will then be confi gured as an LED dimmer.DIM: White/Single Color DimmerCCT: Color Temperature AdjustableRGB: RGB MulticolorRGBW: RGB + Single ColorRGBWW: RGB + Dual ColorNext, you will see a list of all Wi-Fi controllers confi gured on this network. Here, you can access settings and controller properties as well as turn your lighting on/off. Tap the controller name to begin using your lighting, or press and hold to change basic device properties. It is recommendedthat you rename each controller for its location or use.or press and hold to modify controller propertiesTap the powerbutton to toggle the IMPORTANT: If the app displays the error message below, pull downto refresh the controller list.Cannot find any LED controller(s). Please check your device Wi-Fi setting and confirm that the LED controller(s) are plugged inIf the Wi-Fi controller still does not appear, turn your device Wi-Fi connection off and back on and check your network settings.Connect to Smart Speaker/Virtual AssistantBefore beginning use with the following third-party devices, make sure you have setup your Wi-Fi controller through the MyLED Pro app and signed into your Armacost Lighting cloud account. Remote authorization is also required (enabled by default on initial setup).Amazon AlexaIn your Amazon Alexa App, search the skills database for “Magic Home”, then tap enable.Link your Armacost account with the Magic Home Skill. Enter the user name and password that you created in the Armacost MyLED Pro app. Next, discover your Wi-Fi controllers by pressing the Discover Devices button on your app. You can also say, “Alexa, discover devices.” Wi-Fi controllers confi gured on the same wireless network will automatically populate.After your Wi-Fi controller(s) have been discovered, you can rename them in the Alexa app to your preferred names. It is recommended to name them for their location or use, e.g. “Offi ce lights” or “Countertop lights.” Now your lights are ready to control.For a list of additional commands, see the Amazon skill page. Different functions will be available depending on the type of lighting connected to your Wi-Fi controller. Here are some examples:“Alexa, turn on bedroom lights to 20 percent”“Alexa, turn off kitchen counter lights”“Alexa, change accent lights to red”Google HomeIn your Google Home App, navigate to the main menu, then Home control. Press the plus icon to add a device and select “Magic Home Wi-Fi”. All app permissions for Google Home must be granted to complete the setup.Link your Armacost account with the Magic Home Action. Enter the user name and password that you created in the Armacost MyLED Pro app. Google Home will automatically detect compatible devices on the linked home network, and will ask you to assign a room.Press “Done” when you have selected a room and your setup will be complete. You can now assign a nickname to your device. It is recommended to name them for their location or use, e.g. “Offi ce lights” or “Countertop lights.”Now your lights are ready to control. Different functions will be availabledepending on the type of lighting connected to your Wi-Fi controller. Here are some examples:“Hey Google, turn on offi ce lights to 100 percent”“Ok Google, turn bedroom lights to blue”IFTTTIn your IFTTT app or online account, search for the “MagicHue” Service and connect to it.You will then be prompted to link your Armacost Account with the MagicHue Applet. Please enter the user name and password that you created in the Armacost MyLED Pro app.Next, simply enable the applet(s) of your choice. Some applets may require downloading of the IFTTT app to your smartphone. Different functions will be available depending on the type of lighting connected to your Wi-Fi controller.Factory ResetIf you incorrectly entered your network password or have anotherincorrect setting, the link light will not turn on. You will not be able to access the Wi-Fi controller and you will need to do a factory reset. 1. Locate the pinhole on the front of the unit, labeled RESET.2. Using the included straight pin, or a paper clip, insert straight into the pinhole to depress the reset button.3. Continue to press and hold the reset button for ten seconds, then release.The unit will power off and back on and cycle the lighting to indicate the reset has been successful. You can now connect back to your Wi-Fi controller using its default settings. Return to step 1 under “App Installation.”For the full app manual and how-to videos, visit /wifi .mountingTo buy online, or to learn more, visit /dimmers.SPECIFICATIONSInput voltage ................................................................................12-volt or 24-volt DC Output channels .......................................................................................................5Maximum lighting load ....................................................................4 amps per channel Working temperature ..............................................................-5 to 130°F (-20 to 55°C)Wireless working frequency ..............................................................................2.4 GHz FCC ID ..............................................................................................2AIPIALWIFI14R Country of origin .................................................................................................China Limited one-year warranty. This product is for dry location use only. Improper installation,improper powering, abuse, or failure to use this device for its intended purpose will void warranty. Proofofpurchaseisrequiredforallreturns.Questions?*********************************.This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifi cations to this unit not expressly approved by the party responsible for compliance could void the user authority to operate the equipment.Designer-style switch plate and allmounting screws included.© 2018 Armacost Lighting. All rights reserved.180103。

AD7671中文手册

AD7671中文手册

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.

蓝牙手提行李电子秤方案

蓝牙手提行李电子秤方案

蓝牙手提行李电子秤方案∙PCBA∕芯片方案设计外出旅行的时候经常会出现因为没控制住的买买买而导致行李超重,超出免托运行李额的重量,然后不得不另外掏钱托运行李。

所以很多人为了避免这种情况发生就会带一个小巧的蓝牙手提行李电子秤出门,在收拾行李后称量看时候有超过托运额。

蓝牙手提行李电子秤的体积只有手掌宽度大小,是一个长方形的秤体,平时外带出门也不怎么占空间,很是实用。

它可以称重50KG左右的量程,并做到0.1KG的精度,帮助人们精准测量行李重量。

蓝牙手提行李电子秤由传感器、高精度ADC芯片、主控芯片及LED显示屏组合而成。

ADC芯片将传感器中所获取的数据通过模拟转换为数字显示在LED屏上面,让人直观获取数据信息。

而主控芯片操控电路完成电子元器件之间的工作运行,协助蓝牙手提行李电子秤称重精度与数据的实现。

蓝牙手提行李电子秤芯片以CSU1186为主控芯片,它是一个8位RISC架构的高性能单片机,集成了24Bit高精度ADC和LCD显示模块。

内部集成8k*16Bits的OTPROM程序存储器蓝牙手提行李电子秤芯片规格简述1、高性能的RlSCCPU8位单片机MCU内置4KX16位一次性可编程存储器(OTPRoM)256字节数据存储器(SRAM)只有39条单字指令8级存储堆栈振荡器2、内带16MHZ振荡器外部32768Hz晶振(RTC)、4MHz~16MHz晶振3、模拟特性模数转换器(ADC)-1路全差分模拟输入-24位分辨率•内部集成的可编程增益放大器ADC的输出速率30Hz~3.9KHz内带电荷泵(2.6V2∙8V3.0V3.2V)内带稳压器供传感器和调制器内置温度传感器4、专用微控制器的特性上电复位(POR)上电复位延迟定时器(39ms)内带低电压复位(LVR)Timer-8位可编程预分频的8位的定时计数器扩展型看门狗定时器(WDT)•可编程的时间范围5、外设特性14位双向I/O口1路蜂鸣器输出,可选择PT2.7或PT2.3输出,默认PT2.7口输出4X14的LCD驱动-可选择内部晶振或WDT晶振作为时钟源•可选择两种不同的LCD驱动波形-可选择不同的偏置电压产生方式2个外部中断低电压检测(LVD)引脚(内部提供2.4V、2.5V、2.6V、2.7V、2.8V、3.6V电压比较)内置低电压烧录控制电路,最低2.5V可以自烧录6、低功耗特性MCU工作电流•正常模式SOOuA500KHz(工作电压3.3V)■休眠模式下的电流小于2UACMOS技术7、电压工作范围-DVDD2.4V-3.6V-AVDD2.4V~3.6V8、封装38-PINdice9、应用场合电子衡器精密测量及控制系统以上就是本电子秤方案中选用的是CSU1186为主控芯片,是以OTPROM作为存储器的单片机,专为高精度测量仪器等应用设计,包括电子秤、气压表、体重秤等产品,可支持个性化的定制开发。

ADI公司产品电路设计说明书(AD7626 16位ADC)

ADI公司产品电路设计说明书(AD7626 16位ADC)

电路笔记CN-0105连接/参考器件利用ADI公司产品进行电路设计AD762616位、10 MSPS PulSAR差分ADC 放心运用这些配套产品迅速完成设计。

ADA4932-1低功耗差分ADC驱动器欲获得更多信息和技术支持,请拨打4006-100-006或访问/zh/circuits。

2.7 V、800 µA、80 MHz轨到轨输入/输出放大器AD803116位10 MSPS ADC AD7626的单端转差分高速驱动电路电路功能与优势图1所示电路可将高频单端输入信号转换为平衡差分信号,用于驱动16位10 MSPS PulSAR® ADC AD7626。

该电路采用低功耗差分放大器ADA4932-1来驱动ADC,最大限度提升AD7626的高频输入信号音性能。

此器件组合的真正优势在于低功耗、高性能。

ADA4932-1具有低失真(10 MHz时100 dB SFDR)、快速建立时间(9 ns达到0.1%)、高带宽(560 MHz,-3 dB,G = 1)和低电流(9.6 mA)等特性,是驱动AD7626的理想选择。

它还能轻松设定所需的输出共模电压。

该组合提供了业界先进的动态性能并减小了电路板面积:AD7626采用5 mm × 5mm、32引脚LFCSP封装,ADA4932 -1采用3mm× 3mm、16引脚LFCSP封装),AD8031采用5引脚SOT23封装。

AD7626具有突破业界标准的动态性能,在10 MSPS下信噪比为91.5 dB,实现16位INL性能,无延迟,LVDS接口,功耗仅有136 mW。

AD7626使用SAR架构,主要特性是能够以10 MSPS无延迟采样,不会发生流水线式ADC常有的“流水线延迟”,同时具备出色的线性度。

图1. ADA4932-1驱动AD7626(未显示去耦和所有连接)Rev.0“Circuits from the Lab” from Analog Devices have been designed and built by Analog Devicesengineers. Standard engineering practices have been employed in the design and constructionof each circuit, and their function and performance have been tested and verified in a labenvironment at room temperature. However, you are solely responsible for testing the circuitand determining its suitability and applicability for your use and application. Accordingly, inno event shall Analog Devices be liable for direct, indirect, special, incidental, consequential orOne Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: Fax: 781.461.3113©2010 Analog Devices, Inc. All rights reserved.CN-0105电路笔记电路描述ADA4932-1差分驱动器的增益配置约为1(单端输入至差分输出)。

ADI常用集成电路功能.

ADI常用集成电路功能.

ADI常用集成电路功能一览表序号型号产品描述1AD1380JD16位20us高性能模数转换器(民用级2AD1380KD16位20us高性能模数转换器(民用级3AD1671JQ12位1.25MHz采样速率带宽2MHz模数转换器(民用级4AD1672AP12位3MHz采样速率带宽20MHz单电源模数转换器(工业级5AD1674JN12位100KHz采样速率带宽500KHz模数转换器(民用级6AD1674AD12位100KHz采样速率带宽500KHz模数转换器(工业级7AD202JN小型2KHz隔离放大器(民用级卧式8AD202JY小型2KHz隔离放大器(民用级立式9AD204JN小型5KHz隔离放大器(民用级卧式10AD22100KT带信号调理比率输出型温度传感器11AD22105AR可编程温控开关电阻可编程温度控制器SOIC12AD261BND-1数字隔离放大器13AD2S99AP可编程正弦波振荡器(工业级PLCC14AD420AN-3216位单电源4-20mA输出数模转换器(工业级DIP15AD420AR-3216位单电源4-20mA输出数模转换器(工业级SOIC16AD421BN16位环路供电符合HART协议4-20mA输出数模转换器(工业级DIP 17AD421BR16位环路供电符合HART协议4-20mA输出数模转换器(工业级SOIC 18AD515AJH低价格,低偏置电流,高输入阻抗运放(民用级TO-9919AD515ALH低价格,低偏置电流,高输入阻抗运放(民用级TO-9920AD517JH低失调电压,高性能运放(民用级TO-9921AD518JH宽带,低价格运放(民用级TO-9922AD521JD电阻设置增益精密仪表放大器(民用级DIP23AD524AD引脚设置增益高精度仪表放大器(工业级DIP24AD526BD软件编程仪表放大器(工业级DIP25AD526JN软件编程仪表放大器(民用级DIP26AD532JH模拟乘法器(民用级TO-9927AD534JD模拟乘法器(民用级DIP28AD534JH模拟乘法器(民用级TO-9929AD536AJH集成真有效值直流转换器(民用级TO-9930AD536AJD集成真有效值直流转换器(民用级DIP31AD536AJQ集成真有效值直流转换器(民用级DIP32AD537JH150KHZ集成压频转换器(民用级TO-9933AD537SH150KHZ集成压频转换器(军用级TO-9934AD538AD单片实时模拟乘法器(工业级DIP35AD539JN宽带双通道线性乘法器(民用级DIP36AD542JH低价格,低偏置电流,高输入阻抗运放(民用级TO-9937AD545ALH低偏置电流,高输入阻抗运放(民用级TO-9938AD546JN静电计放大器(民用级DIP39AD547JH低价格,低偏置电流,高输入阻抗运放(民用级TO-99 40AD548JN精密BiFET输入运放(民用级DIP41AD549JH低偏置电流,高输入阻抗运放(民用级TO-9942AD549LH低偏置电流,高输入阻抗运放(民用级TO-9943AD5539JN高速运放(民用级DIP44AD557JN微处理器兼容完整7位电压输出数模转换器(民用DIP 45AD558JN 微处理器兼容完整8位电压输出数模转换器(民用DIP 46AD565AJD12位0.25us电流输出数模转换器(民用DIP47AD568JQ12位超高速电流输出数模转换器(民用DIP48AD569JN16位3us电流输出数模转换器(民用DIP49AD570JD/+8位25us模数转换器(民用DIP50AD574AJD12位25us模数转换器(民用DIP51AD574AKD12位25us模数转换器(民用DIP52AD578KN12位3us模数转换器(民用DIP53AD580JH精密 2.5V电压基准源(民用级TO-5254AD580LH精密 2.5V电压基准源(民用级TO-5255AD581JH精密10V电压基准源(民用级TO-556AD582KD0.7us采样保持放大器(民用DIP57AD584JH引脚设置输出电压基准源(民用级TO-99 58AD584JN引脚设置输出电压基准源(民用级DIP59AD585AQ3us采样保持放大器(工业级DIP60AD586JN精密5V电压基准源(民用级DIP61AD586JQ精密5V电压基准源(民用级DIP62AD586KN精密5V电压基准源(民用级DIP63AD586KQ精密5V电压基准源(民用级DIP64AD586KR精密5V电压基准源(民用级SOIC65AD587KN精密10V电压基准源(民用级DIP66AD587KR精密10V电压基准源(民用级SOIC67AD588AQ精密可编程电压基准源(工业级DIP68AD589JH精密 1.235V电压基准源(民用级H-02A 69AD590JH—55℃~150℃测温范围温度传感器TO-52 70AD590KH—55℃~150℃测温范围温度传感器TO-52 71AD592AN低价格,精密单片温度传感器TO-9272AD592BN低价格,精密单片温度传感器TO-9273AD595AD K型(铬-铝热电偶信号调节器(工业级DIP74AD595AQ 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184AD7542JN12位250ns电流输出CMOS数模转换器(民用级DIP 185AD7543KN12位串行输入CMOS数模转换器(民用级DIP186AD7545AKN12位1us电流输出CMOS数模转换器(民用级DIP 187AD7564BN低功耗四路数模转换器(工业级DIP188AD7574JN8位15us电流输出CMOS数模转换器(民用级DIP189AD7590DIKN四单刀单掷CMOS带锁存介质隔离模拟开关9民用级DIP 190AD7660AST16位100KSPS CMOS模数转换器(工业级LQFP191AD7664AST16位570KSPS CMOS模数转换器(工业级LQFP192AD767JN12位高速电压输出数模转换器(民用级DIP193AD768AR16位高速电流输出数模转换器(民用级SOIC194AD7701AN16位∑–△模数转换器(工业级DIP195AD7703AN20位∑–△模数转换器(工业级DIP196AD7703BN20位∑–△模数转换器(工业级DIP197AD7705BN16位∑–△模数转换器(工业级DIP198AD7705BR16位∑–△模数转换器(工业级SOIC199AD7706BN16位∑–△模数转换器(工业级DIP200AD7707BR16位∑–△模数转换器(工业级SOIC201AD7710AN24位∑–△模数转换器(工业级DIP202AD7711AN24位∑–△模数转换器(工业级DIP203AD7712AN24位∑–△模数转换器(工业级DIP204AD7713AN24位∑–△模数转换器(工业级DIP205AD7714AN-324位∑–△模数转换器(工业级DIP3V电源206AD7714AN-524位∑–△模数转换器(工业级DIP5V电源207AD7715AN-516位∑–△模数转换器(工业级DIP5V电源208AD7715AR-516位∑–△模数转换器(工业级SOIC5V电源209AD7731BN24位∑–△模数转换器(工业级DIP210AD7741BN单通道输入6MHz压频转换器(工业级DIP211AD7742BN四通道输入6MHz压频转换器(工业级DIP212AD7750AN两通道乘积/频率转换器电度表专用芯片(工业级DIP 213AD7755AARS IEC521/1036标准电度表专用芯片(工业级DIP214AD7777AR10位多路T/H子系统(工业级SOIC215AD779JD14位128KSPS采样速率并行输出模数转换器(民用级DIP 216AD780AN 2.5V或3V可选输出高精度电压基准源(工业级DIP217AD781JN700ns采样保持放大器(民用级DIP218AD7820KN8位500KSPS采样速率模数转换器(民用级DIP219AD7821KN8位1MSPS采样速率模数转换器(民用级DIP220AD7822BN8位2MSPS采样速率模数转换器(工业级DIP221AD7824BQ8位四通道高速模数转换器(民用级DIP222AD7824KN8位四通道高速模数转换器(工业级DIP223AD7837AN12位双路乘法数模转换器(工业级DIP224AD7845JN12位乘法数模转换器(民用级DIP225AD7846JN16位电压输出数模转换器(民用级DIP226AD7847AN12位双路乘法数模转换器(工业级DIP227AD7856AN14位8通道285KSPS采样速率模数转换器(工业级DIP228AD7862AN-1012位4通道同时采样250KSPS速率模数转换器带2SHA and2ADCs(工业级DIP 229AD7864AS-112位4通道同时采样147KSPS速率模数转换器(工业级PQFP230AD7865AS-114位4通道同时采样175KSPS速率模数转换器带2SHA and2ADCs(工业级PQFP 231AD7872AN14位串行输出模数转换器(工业级DIP232AD7891AP-112位四通道同时采样模数转换器(工业级DIP233AD7892AN-112位四通道同时采样模数转换器(工业级SOIC234AD7895AN-1012位750KSPS采样速率模数转换器(民用级DIP235AD7874AN12位750KSPS采样速率模数转换器(民用级DIP236AD7874BR12位8通道200KSPS速率模数转换器(工业级SOIC237AD7886JD12位单电源八通道串行采样模数转换器(工业级DIP238AD7886KD12位单电源八通道串并行采样模数转换器(工业级DIP239AD7888AR12位600KSPS采样模数转换器(工业级DIP240AD7890AN-1012位单电源200KSPS采样速率模数转换器(工业级DIP241AD790JN高速精密比较器(民用级DIP242AD795JN低偏置电流低噪声运放(民用级DIP243AD797AN低失真低噪声运放(工业级DIP244AD797AR低失真低噪声运放(工业级SOIC245AD73360AR16位6通道数据采集子系统(三相电量测量IC(工业级SOIC 246AD8001AN800MHz电流反馈运放(工业级DIP247AD8002AN800MHz电流反馈双运放(工业级DIP248AD8009AR1GHz4500V/us电流反馈双运放(工业级DIP249AD8011AN340MHz电流反馈运放(工业级DIP250AD8015AR单电源真空管前置放大器(工业级SOIC251AD8018AR5V Rail-Rail大电流输出XDSL线性驱动放大器(工业级SOIC 252AD8031AN单电源Rail-Rail输入输出运放(工业级DIP253AD8032AN单电源Rail-Rail输入输出双运放(工业级DIP254AD8036AN低失真宽带240MHz电压输出运放(工业级DIP255AD8037AN低失真宽带270MHz电压输出运放(工业级DIP256AD8041AN120MHz带宽Rail-Rail输出运放(工业级DIP257AD8041AR120MHz带宽Rail-Rail输出运放(工业级SOIC258AD8042AN120MHz带宽Rail-Rail输出双运放(工业级DIP259AD8044AN80MHz带宽Rail-Rail输出四运放(工业级DIP260AD8047AN电压反馈运放(工业级DIP261AD8055AR电压反馈运放(工业级SOIC262AD8056AR低价格300MHz电压反馈双运放(工业级SOIC263AD8058AR电压反馈双运放(工业级SOIC264AD8079AR双通道260MHz缓冲器(工业级SOIC265AD8108AST8×8视频距阵开关(工业级LQFP266AD8109AST8×8视频距阵开关(工业级LQFP267AD810AN带电源休眠控制端的低功耗视频运放(工业级DIP 268AD8111AST16×8视频距阵开关(工业级LQFP269AD8115AST16×16视频距阵开关(工业级LQFP270AD8116AST16×16视频距阵开关(工业级LQFP271AD811AN高性能视频运放(工业级DIP272AD811JR高性能视频运放(工业级SOIC273AD812AN低功耗电流反馈双运放(工业级DIP274AD812AR低功耗电流反馈双运放(工业级SOIC275AD8131AR差分输入输出电压反馈放大器(工业级SOIC 276AD8138AR IF放大器(工业级SOIC277AD813AN单电源低功耗三视频运放(工业级DIP278AD813AR-14单电源低功耗三视频运放(工业级SOIC279AD815AY大电流输出,差动输入\输出运放(工业级280AD8170AN2选1视频多路转换器(工业级DIP281AD8174AN4选1视频多路转换器(工业级DIP282AD817AN高速低功耗宽电源运放(工业级DIP283AD8180AN差动2选1视频多路转换器(工业级DIP284AD8184AN4选1视频多路转换器(工业级DIP285AD818AN低价格高速电压反馈视频运放(工业级DIP286AD820AN单电源低功耗FET输入Rail-Rail输出运放(工业级DIP 287AD822AN双AD820(工业级DIP288AD822AN-3V双AD820(工业级DIP3V电源289AD823AN单电源Rail-Rail输出双运放(工业级DIP290AD824AN单电源Rail-Rail输出四运放(工业级DIP291AD826AN高速低功耗双运放(工业级DIP292AD827AQ双AD847(工业级DIP293AD827JN双AD847(民用级DIP294AD828AN双AD818(工业级DIP295AD829JN高速低噪声视频运放(工业级DIP296AD8307AN500MHz对数放大器(工业级DIP297AD8307AR500MHz对数放大器(工业级SOIC298AD8309ARU500MHz对数放大器(工业级TSSOP299AD830AN高速视频差动运放(工业级DIP300AD8313ARM 2.5GHz对数放大器(工业级RM-8301AD830AN高速视频差动运放(工业级DIP302AD8313ARM 2.5GHz对数放大器(工业级RM-8303AD8320ARP数字可变增益线性驱动器(工业级RP-20304AD834JN500MHz带宽四象限模拟乘法器(工业级DIP305AD8350AR15差分输入射频放大器(工业级SOIC306AD835AN250MHz带宽四象限电压输出模拟乘法器(工业级DIP 307AD8402AN-102通道数字电位器阻值10K(工业级DIP308AD8403AN1004通道数字电位器阻值100K(工业级DIP309AD840JN宽带高速运放(民用级DIP310AD843AQ34MHz带宽高速FET输入运放(工业级DIP311AD844AN2000V/us高速运放(工业级DIP312AD845JN16MHz带宽高速FET输入运放(民用级DIP313AD845KN16MHz带宽高速FET输入运放(民用级DIP314AD847AQ300V/us高速低功耗运放(工业级DIP315AD847JN300V/us高速低功耗运放(民用级DIP316AD847SQ300V/us高速低功耗运放(军用级DIP317AD849JN高速低功耗运放(民用级DIP318AD8522AN12位单电源双路电流输出型数模转换器(工业级DIP 319AD8551AR自稳零运放(工业级SOIC320AD8552AR自稳零双运放(工业级SOIC321AD8561AN单电源比较器(工业级DIP322AD8561AR单电源比较器(工业级SOIC323AD8564AN单电源TTL/CMOS四路比较器(工业级DIP324AD8598AN单电源双路比较器(工业级DIP325AD9042AST12位41MSPS模数转换器(工业级LQFP326AD9048JQ8位35MSPS视频模数转换器(民用级DIP327AD9049BRS9位30MSPS模数转换器(工业级SSOP328AD9050BR10位40MSPS模数转换器(工业级SOIC329AD9051BRS10位60MSPS模数转换器(工业级SSOP330AD9057BRS-408位40MSPSz视频模数转换器(工业级SSOP 331AD9057BRS-608位60MSPS视频模数转换器(工业级SSOP 332AD9058JJ双路8位50MSPS视频模数转换器(民用级LCC 333AD9059BRS双路8位60MSPS视频模数转换器(工业级SSOP 334AD9066JR双路6位60MSPS视频模数转换器(民用级SSOP 335AD9071BR10位TTL兼容100MSPS模数转换器(工业级SOIC 336AD9101AR7ns建立时间采样保持放大器(工业级SOIC337AD9200ARS10位20MSPS模数转换器(工业级SSOP338AD9203ARU10位40MSPS模数转换器(工业级TSSOP339AD9220AR12位10MSPS模数转换器(工业级SOIC340AD9221AR12位1MSPS模数转换器(工业级SOIC341AD9223AR12位3MSPS模数转换器(工业级SOIC342AD9225AR12位25MSPS模数转换器(工业级SOIC343AD9226ARS12位65MSPS模数转换器(工业级SSOP344AD9240AS14位10MSPS模数转换器(工业级MQFP345AD9243AS14位3MSPS模数转换器(工业级MQFP346AD9260AS16位2.5MSPS∑–△模数转换器(工业级MQFP347AD9280ARS单电源8位32MSPS模数转换器(工业级SSOP348AD9281ARS单电源8位双路32MSPS模数转换器(工业级SSOP 349AD9283BRS-100单电源8位100MSPS模数转换器(工业级SSOP350AD9283BRS-80单电源8位80MSPS模数转换器(工业级SSOP351AD9288BRS-80单电源8位双路80MSPS模数转换器(工业级SSOP 352AD9300KQ4选1宽带视频多路转换器(民用级DIP353AD9483KS-1008位100MSPS三视频模数转换器(民用级MQFP354AD9500BQ数字化可编程延迟信号发生器(工业级DIP355AD9501JN TTL/COMS数字化可编程延迟信号发生器(民用级DIP356AD9617JR1400V/us,140MHz带宽高速运放(民用级SOIC357AD9617JN1400V/us,140MHz带宽高速运放(民用级DIP358AD9618JN1800V/us,160MHz带宽高速运放(民用级DIP359AD9630AN低失真闭环缓冲放大器(工业级DIP360AD9631AN超低失真宽带电压反馈放大器(工业级DIP361AD96687BQ高速双电压比较器(工业级DIP362AD9698KN高速TTL兼容双电压比较器(工业级DIP363AD9708ARU8位100MSPS双路数模转换器(工业级TSSOP364AD9709AST8位125MSPS双路数模转换器(工业级PQFP365AD9713BAN12位80MSPS TTL兼容数模转换器(工业级DIP366AD9721BR10位400MSPS TTL兼容数模转换器(工业级SOIC367AD9731BR10位170MSPS双电源数模转换器(工业级SOIC368AD9732BRS10位200MSPS单电源数模转换器(工业级SSOP369AD9750AR10位125MSPS数模转换器(工业级SOIC370AD9752AR12位125MSPS数模转换器(工业级SOIC371AD9760AR10位100MSPS数模转换器(工业级SOIC372AD9762AR12位100MSPS数模转换器(工业级SOIC373AD9764AR14位100MSPS数模转换器(工业级SOIC374AD976CN16位100KSPS BiCMOS并行输出模数转换器(工业级DIP 375AD976AN16位100KSPS BiCMOS并行输出模数转换器(工业级DIP 376AD976AAN16位200KSPS BiCMOS并行输出模数转换器(工业级DIP 377AD9772AST14位300MSPS数模转换器(工业级LQFP378AD977AAN16位200KSPS BiCMOS串行输出数模转换器(工业级DIP379AD977AN16位100KSPS BiCMOS串行输出数模转换器(工业级DIP380AD9801JCST10位6MSPS CCD信号处理器(民用级LQFP381AD9802JST10位6MSPS CCD信号处理器(民用级LQFP382AD9803JST10位6MSPS CCD信号处理器(民用级LQFP383AD9805JS10位3通道6MSPS CCD信号处理器(民用级MQFP384AD9816JS12位3通道6MSPS CCD信号处理器(民用级MQFP385AD9822JR14位3通道12MSPS CCD信号处理器(民用级SOIC386AD9830AST带10位D/A,25MHz主频直接数字同步调制器(工业级PQFP 387AD9831AST带10位D/A,50MHz主频直接数字同步调制器(工业级PQFP388AD9832BRU带10位D/A,25MHz主频直接数字同步调制器(工业级TSSOP 389AD9850BRS带10位D/A,125MHz主频直接数字同步调制器(工业级SSOP390AD9851BRS带10位D/A,180MHz主频直接数字同步调制器(工业级SSOP391AD9852AST带12位D/A,200MHz主频直接数字同步调制器(工业级LQFP-80392 AD9852ASQ 393 AD9853AS 394 AD9854AST 395 AD9854ASQ 396AD9901KQ 397 ADG201AKN 398 ADG201HSJN 399 ADG211AKN 400ADG222AKN 401 ADG333ABN 402 ADG333ABR 403 ADG408BN 404 ADG409BN 405 ADG411BN 406 ADG417BN 407 ADG419BN 408 ADG431BN 409 ADG436BN 410 ADG441BN 411 ADG442BN 412 ADG506AKN 413 ADG507AKN 414ADG508AKN 415 ADG508FBN 416 ADG509AKN 417 ADG511BN 418 ADG608BN 419 ADG609BN 420 ADG719BRM 带散热器带 12 位 D/A,300MHz 主频直接数字同步调制器(工业级)LQFP-80 数字 QPSK/16 QAM 调整器(工业级) PQFP 带12 位 D/A,200MHz 主频直接数字同步调制器(工业级)LQFP-80 带散热器带 12 位 D/A,300MHz 主频直接数字同步调制器(工业级)LQFP-80 线性相位探测器/频率鉴别器(民用级) DIP 四单刀单掷模拟开关(民用级) DIP 四单刀单掷模拟开关(民用级) DIP 四单刀单掷模拟开关(民用级) DIP 四单刀单掷模拟开关(民用级) DIP 四单刀单掷模拟开关(工业级) DIP 四单刀单掷模拟开关(工业级) SOIC 8 选 1CMOS 模拟多路转换器(工业级) DIP 差动 4 选 1CMOS 模拟多路转换器(工业级) DIP 四单刀单掷模拟开关(工业级) DIP 单刀单掷模拟开关(工业级) DIP 单刀单掷模拟开关(工业级) DIP 四单刀单掷模拟开关(工业级) DIP 双单刀单掷模拟开关(工业级) DIP 四单刀单掷模拟开关(工业级)DIP 四单刀单掷模拟开关(工业级) DIP 16 选 1CMOS 模拟多路转换器(民用级) DIP 差动 8 选 1CMOS 模拟多路转换器(民用级) DIP 8 选 1CMOS 模拟多路转换器(民用级) DIP 8 选 1CMOS 带过压保护模拟多路转换器(工业级) DIP 差动 4 选 1CMOS 模拟多路转换器(民用级) DIP 单电源四单刀单掷模拟开关(工业级) DIP 8 选 1CMOS 模拟多路转换器(工业级) DIP 差动 4 选 1CMOS 模拟多路转换器(工业级) DIP 单路视频 CMOS 模拟开关(工业级)RM-6 421ADG736BRM 422 ADM660AN 423 ADM690AN 424 ADM708AN 双路视频 CMOS 模拟开关(工业级)RM-10 DC-DC 转换器(工业级)DIP 微处理器监控电路(工业级) DIP 微处理器监控电路(工业级) DIP 425 ADSP21060KS160 32 位浮点数字信号处理器内存 4M(民用级)PQFP 426 ADSP21060CZ-16 0 ADSP21062KS-16 0 32 位浮点数字信号处理器内存 4M(工业级)PQFP 427 32 位浮点数字信号处理器内存 2M(民用级)PQFP 428 ADSP2181KS-133 16 位定点数字信号处理器(民用级)PQFP-128429 ADSP2181KST-13 3 16 位定点数字信号处理器(民用级)TQFP-128 带单片机、8 路 12 位 A/D、2 路 D/A 的数采系统(工业级)PQFP 500KHz 工业标准压频转换器(民用级) DIP ±1g-±5g 带温度补偿加速度传感器(民用级)QC-14 ±2g 双路加速度传感器(工业级)QC-14 高精度仪表放大器(工业级) DIP 单电源精密仪表放大器(工业级) DIP 8 位高速电流输出型数模转换器(民用级) DIP 8 位双路电压输出型数模转换器(工业级) DIP 超低失调电压运放(军用级)DIP 超低失调电压运放(工业级)DIP 超低失调电压运放(工业级)SOIC 低失真低噪声运放(工业级)DIP 高精密运放(工业级) DIP 低噪声精密运放(工业级) DIP 单电源 Rail-Rail 输入输出双运放(工业级)DIP 单电源 Rail-Rail 输入输出双运放(工业级)DIP 微功耗 Rail-Rail 输入输出双运放(工业级)DIP 超低偏置电流精密双运放(工业级) DIP 超低偏置电流精密双运放(工业级) SOIC 低噪声精密运放(民用级) DIP 低噪声精密运放(工业级) DIP 单电源 Rail-Rail 输入输出四运放(工业级)DIP 超低偏置电流精密四运放(工业级) DIP OP07 改进型(工业级)DIP 低电压微功耗精密运放(工业级) DIP 微功耗精密运放(工业级) DIP 微功耗精密运放(工业级) SOIC 峰值检测器(工业级) DIP 精密 5V 电压基准源带温度传感器(工业级) DIP 精密低价格 2.5V 电压基准源(工业级) DIP 低功耗大电流输出 2.5V 电压基准源(工业级) DIP 低功耗大电流输出 2.5V 电压基准源(工业级) SOIC 低功耗大电流输出 4.5V 电压基准源(工业级) DIP 低功耗大电流输出 5V 电压基准源(工业级) SOIC 高精度 2.5V 电压基准源(工业级)DIP7us 四通道采样保持放大器(工业级) DIP 7us 八通道采样保持放大器(工业级)DIP 差动线路接收器 Gain=0dB(工业级) DIP 430 ADUC812BS 431 ADVF32KN 432 ADXL105JQC 433 ADXL202AQC 434 AMP02FP 435 AMP04FP 436 DAC08CP 437 DAC8228FP 438 OP07AZ/883C 439 OP07CP 440 OP07CS 441 OP176GP 442OP177GP 443 OP27GP 444 OP291GP 445 OP295GP 446 OP296GP 447 OP297GP 448 OP297GS 449 OP37EP 450 OP37GP 451 OP495GP 452 OP497GP 453 OP77GP 454 OP90GP 455 OP97FP 456 OP97FS 457 PKD01FP 458 REF02CP 459 REF03GP 460 REF192GP 461 REF192GS 462 REF194GP 463 REF195GS 464 REF43FZ 465SMP04EP 466 SMP08FP 467 SSM2141P468 SSM2142P 469 SSM2143P 470 SSM2211P 471 SSM2275P 472 TMP03FS 473 TMP04FS 474 TMP36GT9 平衡线路驱动器(工业级) DIP 差动线路接收器 Gain=-6dB(工业级) DIP 1W 功率差分输出音频功率放大器(工业级)DIP Rail-Rail 输出双音频功率放大器(工业级)DIP PWM 输出,直接与微处理器接口数字输出温度传感器 SOIC 反相 PWM 输出,直接与微处理器接口数字输出温度传感器 SOIC 电压输出温度传感器 TO-92。

半导体传感器AD7711ARZ中文规格书

半导体传感器AD7711ARZ中文规格书

AD7705/AD7706Rev. C | Page 34 of 44 MICROCOMPUTER/MICROPROCESSORINTERFACINGThe flexible serial interface of the AD7705/AD7706 allows easy interfacing to most microcomputers and microprocessors. The flowchart in Figure 21 outlines the sequence to follow when interfacing a microcontroller or microprocessor to the AD7705/AD7706. Figure 22 through Figure 24 show typical interface circuits.The serial interface is capable of operating from three wires and is compatible with SPI interface protocols. The 3-wire operation makes these parts ideal for an isolated system in which minimizing the number of interface lines minimizes the number ofopto-isolators required in the system. The serial clock input is a Schmitt-triggered input to accommodate slow edges from opto-couplers. The rise and fall times of other digital inputs to the AD7705/AD7706 should be no longer than 1 μs.Most of the registers on the AD7705/AD7706 are 8-bit registers, which facilitates easy interfacing to the 8-bit serial ports of micro-controllers. The data register on the AD7705/AD7706 is 16 bits, and the offset and gain registers are 24-bit registers, but data transfers to these registers can consist of multiple 8-bit transfers to the serial port of the microcontroller. DSP processors and microprocessors generally transfer 16 bits of data in a serial data operation. Some of these processors, such as the ADSP-2105, have the facility to program the number of cycles in a serial transfer. This allows the user to tailor the number of bits in any transfer to match the length of the required register in the AD7705/AD7706.Because some registers on the AD7705/AD7706 are only 8 bits long, successive write operations to two of these registers can be handled as a single 16-bit data transfer. For example, to update the setup register, the processor must write to the communication register to indicate that the next operation is a write to the setup register, and then write 8 bits to the setup register. This can be done in a single 16-bit transfer, because once the eight serial clocks of the write operation to the communication register are complete, the part immediately sets up for a write operation to the setup register. AD7705/AD7706-to-68HC11 InterfaceFigure 22 shows an interface between the AD7705/AD7706 and the 68HC11 microcontroller. The diagram shows the minimum (3-wire) interface with CS on the AD7705/AD7706 hardwired low. In this scheme, the DRDY bit of the communication register is monitored to determine when the data register is updated. An alternative scheme, which increases the number of interface lines to four, is to monitor the DRDY output line from the AD7705/ AD7706. Monitoring the DRDY line can be done in two ways. First, DRDY can be connected to a 68HC11 port bit (such as PC0) that is configured as an input. This port bit is then polled to determine the status of DRDY .The second scheme is to use an interrupt-driven system, in which case the DRDY output is connected to the IRQ input of the 68HC11. For interfaces that require control of the CS input on the AD7705/AD7706, a port bit of the 68HC11 (such as PC1) that is configured as an output can be used to drive the CS input.01166-022Figure 22. AD7705/AD7706-to-68HC11 Interface The 68HC11 is configured in master mode with its CPOL and CPHA bits set to Logic 1. When the 68HC11 is configured like this, its SCLK line idles high between data transfers. The AD7705/ AD7706 are not capable of a full duplex operation. If the AD7705/ AD7706 are configured for a write operation, no data appears on the DOUT lines, even when the SCLK input is active. Similarly, if the AD7705/AD7706 are configured for a read operation, data presented to the part on the DIN line is ignored, even when SCLK is active. Coding for an interface between the 68HC11 and the AD7705/ AD7706 is given in the C Code for Interfacing AD7705 to 68HC11 section. In this example, the DRDY output line of the AD7705 is connected to the PC0 port bit of the 68HC11 and is polled to determine its status.01166-023Figure 23. AD7705/AD7706-to-8XC51 InterfaceAD7705/AD7706Rev. C | Page 35 of 44AD7705/AD7706-to-8051 InterfaceAn interface circuit between the AD7705/AD7706 and the 8XC51 microcontroller is shown in Figure 23. The diagram shows the minimum number of interface connections with CS on the AD7705/AD7706 hardwired low. In the case of the 8XC51interface, the minimum number of interconnects is two. In this scheme, the DRDY bit of the communication register is monitored to determine when the data register is updated. The alternative scheme, which increases the number of interface lines to three, is to monitor the DRDY output line from the AD7705/AD7706. Monitoring the DRDY line can be done in two ways. First, DRDY can be connected to a 8XC51 port bit (such as P1.0) that is configured as an input. This port bit is then polled to determine the status of DRDY . The second scheme is to use an interrupt-driven system, in which case the DRDY output is connected to the INT1 input of the 8XC51. For interfaces that require control of the CS input on the AD7705/AD7706, a port bit of the 8XC51 (such as P1.1) that is configured as an output can be used to drive the CS input. The 8XC51 is configured in Mode 0 serial interface mode. Its serial interface contains a single data line. As a result, the DOUT and DIN pins of the AD7705/AD7706 should be connected together with a 10 kΩ pull-up resistor. The serial clock on the 8XC51 idles high between data transfers. During a write operation, the 8XC51 outputs the LSB first. Because the AD7705/AD7706 expect the MSB first, the data must be rearranged before being written to the output serial register. Similarly, during a read operation, the AD7705/ AD7706 output the MSB first, and the 8XC51 expects the LSB first. Therefore, the data read into the serial buffer must be rearranged before the correct data-word from the AD7705/ AD7706 is available in the accumulator.01166-024Figure 24. AD7705/AD7706-to-ADSP-2103/ADSP-2105 InterfaceAD7705/AD7706-to-ADSP-2103/ADSP-2105 Interface Figure 24 shows an interface between the AD7705/AD7706 and the ADSP-2103/ADSP-2105 DSP processor. In the interface shown, the DRDY bit of the communication register is monitored to determine when the data register is updated. The alternative scheme is to use an interrupt-driven system, in which case the DRDY output is connected to the IRQ2 input of the ADSP-2103/ ADSP-2105. The serial interface of the ADSP-2103/ADSP-2105 is set up for alternate framing mode. The RFS and TFS pins of the ADSP-2103/ADSP-2105 are configured as active low outputs, and the ADSP-2103/ADSP-2105 serial clock line, SCLK, is configured as an output. The CS for the AD7705/AD7706 is active when either the RFS or TFS outputs from the ADSP-2103/ ADSP-2105 are active. The serial clock rate on the ADSP-2103/ ADSP-2105 should be limited to 3 MHz to ensure correct operation with the AD7705/AD7706. CODE FOR SETTING UP THE AD7705/AD7706 The following section shows a set of read and write routines in C code for interfacing the 68HC11 microcontroller to the AD7705. The sample program sets up the various registers on the AD7705 and reads 1000 samples from one channel into the 68HC11. The setup conditions on the part are the same as those outlined for the flowchart of Figure 21. In the example code given here, the DRDY output is polled to determine if a new valid word is available in the data register. The same sequence is applicable for the AD7706. The sequence of events in this program are as follows: 1.Write to the communication register, selecting Channel 1as the active channel and setting the next operation to be a write to the clock register.2.Write to the clock register, setting the CLKDIV bit, which divides the external clock internally by two. This assumesthat the external crystal is 4.9512 MHz. The update rate is selected to be 50 Hz.3.Write to the communication register selecting Channel 1 as the active channel and setting the next operation to be a write to the setup register.4.Write to the setup register, setting the gain to 1, setting bipolar mode, buffer off, clearing the filtersynchronization, and initiating a self-calibration.5.Poll the DRDY output.6.Read the data from the data register.7.Repeat Steps 5 and 6 (loop) until the specified number of samples has been taken from the selected channel.。

AD7266资料

AD7266资料

Differential Input, Dual 2 MSPS,12-Bit, 3-Channel SAR ADCPreliminary Technical DataAD7266FEATURESDual 12-bit, 3-channel ADC Fast throughput rate: 2 MSPS Specified for V DD of 2.7 V to 5.25 VLow power: 12 mW max at 1.5 MSPS with 3 V supplies 30 mW max at 2 MSPS with 5 V supplies Wide input bandwidth70 dB SNR at 100 kHz input frequency On-chip reference: 2.5 V –40°C to +125°C operationFlexible power/throughput rate management Simultaneous conversion/read No pipeline delaysHigh speed serial interface SPI®/QSPI™/MICROWIRE™/DSP compatibleShutdown mode: 1 µA max32-lead LFCSP and TQFP packagesGENERAL DESCRIPTIONThe AD72661 is a dual, 12-bit, high speed, low power, successive approximation ADC that operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 2 MSPS. The device contains two ADCs, each preceded by a 3-channel multi-plexer, and a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 10 MHz.The conversion process and data acquisition are controlled using standard control inputs, allowing easy interfacing to microproces-sors or DSPs. The input signal is sampled on the falling edge of CS ; conversion is also initiated at this point. The conversion time is determined by the SCLK frequency. There are no pipelined delays associated with the part.The AD7266 uses advanced design techniques to achieve very low power dissipation at high throughput rates. With 5 V supplies and a 2 MSPS throughput rate, the part consumes 4 mA maximum. The part also offers flexible power/throughput rate management when operating in sleep mode.The analog input range for the part can be selected to be a 0 V to V REF range or a 2V REF range with either straight binary or twos complement output coding. The AD7266 has an on-chip 2.5 V reference that can be overdriven if an external reference is pre-ferred. This external reference range is 100 mV to 2.5 V . TheAD7266 is available in 32-lead lead frame chip scale (LFCSP) and thin quad flat (TQFP) packages.Rev.PrG1Protected by U.S. Patent No. 6,681,332.FUNCTIONAL BLOCK DIAGRAM04603-P r A -001AV V V V V V BV V V V V V AGND AGND AGND D CAP BDGND DGNDFigure 1PRODUCT HIGHLIGHTS1.The AD7266 features two complete ADC functions that allow simultaneous sampling and conversion of two channels. Each ADC has 2 analog inputs, 3 fully differential pairs, or 6 single-ended channels as programmed. The conversion result of both channels is available simultaneously on separate data lines, or in succession on one data line if only one serial port is available.2.High Throughput with Low Power ConsumptionThe AD7266 offers a 1.5 MSPS throughput rate with 8 mW maximum power consumption when operating at 3 V . 3.Flexible Power/Throughput Rate ManagementThe conversion rate is determined by the serial clock, allowing power consumption to be reduced as conversion time is re-duced through an SCLK frequency increase. Power efficiency can be maximized at lower throughput rates if the part enters sleep between conversions.4.No Pipeline DelayThe part features two standard successive approximation ADCs with accurate control of the sampling instant via a CS input and once off conversion control.Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.326.8703© 2004 Analog Devices, Inc. All rights reserved.AD7266 Preliminary Technical Data TABLE OF CONTENTSAD7266—Specifications (3)Timing Specifications (4)Absolute Maximum Ratings (5)ESD Caution (5)Pin Configuration and Functional Descriptions (6)Terminology (8)Theory of Operation (10)Circuit Information (10)Converter Operation (10)Analog Input (11)Output Coding (11)Transfer Functions (12)Digital Inputs (12)V DRIVE (12)Modes of Operation (13)Normal Mode (13)Partial Power-Down Mode (13)Full Power-Down Mode (14)Outline Dimensions (15)Ordering Guide (17)REVISION HISTORYRevision PrG: Preliminary VersionRev. PrG | Page 2 of 17Preliminary Technical Data AD7266 AD7266—SPECIFICATIONS1Table 1. T A = T MIN to T MAX, V DD = 2.7 V to 3.3 V, f SCLK = 25 MHz, f S = 1.5 MSPS, V DRIVE = 2.7 V to 3.3 V; V DD = 4.75 V to 5.25 V,Rev. PrG | Page 3 of 17AD7266 Preliminary Technical DataNOTES1 Temperature ranges as follows: -40°C to +125°CTerminology2 See section.3 Sample tested during initial release to ensure compliance.4 Relates to Pins D CAP A or D CAP B.5 See Reference section for D CAP A, D CAP B output impedances.6 See Power Versus Throughput Rate section.TIMING SPECIFICATIONSRev. PrG | Page 4 of 17Preliminary Technical DataAD7266ABSOLUTE MAXIMUM RATINGSTable 3. AD7266 Stress RatingsParameter Rating V DD to AGND –0.3 V to +7 V DV DD to DGND –0.3 V to +7 V V DRIVE to DGND –0.3 V to DV DD V DRIVE to AGND –0.3 V to AV DD AV DD to DV DD –0.3 V to +0.3 V AGND to DGND –0.3 V to +0.3 VAnalog Input Voltage to AGND –0.3 V to AV DD +0.3 VDigital Input Voltage to DGND –0.3 V to +7 V Digital Output Voltage to GND –0.3 V to V DRIVE +0.3 V V REF to AGND –0.3 V to AV DD +0.3 V Input Current to Any Pin Except Supplies 1±10 mA Operating Temperature Range –40°C to +125°C Storage Temperature Range –65°C to +150°C Junction Temperature 150°C LFCSP Package θJA Thermal Impedance 108.2°C/WθJC Thermal Impedance 32.71°C/W Lead Temperature, Soldering Reflow Temperature (10- 30 sec) 255°CESD TBD1Transient currents of up to 100 mA will not cause SCR latch up.Stresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ESD CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.Rev. PrG | Page 5 of 17AD7266Preliminary Technical DataPIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS0460DGND REF SELECT AV DD D CAP A AGND AGND V A1V A2V A V A V A V A V B V B V B V B DI V ET ADT B KFigure 2. AD7266 Pin ConfigurationRev. PrG | Page 6 of 17Preliminary Technical Data AD7266Rev. PrG | Page 7 of 17AD7266Preliminary Technical DataTERMINOLOGYDifferential NonlinearityTrack-and-Hold Acquisition TimeThis is the difference between the measured and the ideal 1 LSB change between any two adjacent codes in the ADC. The track-and-hold amplifier returns into track mode after the end of conversion. Track-and-hold acquisition time is the time required for the output of the track-and-hold amplifier to reach its final value, within ±1/2 LSB, after the end of conversion. Integral NonlinearityThis is the maximum deviation from a straight line passing through the endpoints of the ADC transfer function. Theendpoints of the transfer function are zero scale, a point 1 LSB below the first code transition, and full scale, a point 1 LSB above the last code transition. Signal to (Noise + Distortion) RatioThis is the measured ratio of signal to (noise + distortion) at the output of the A/D converter. The signal is the rms amplitude of the fundamental. Noise is the sum of all non-fundamental signals up to half the sampling frequency (f S /2), excluding dc. The ratio is dependent on the number of quantization levels in the digitization process; the more levels, the smaller thequantization noise. The theoretical signal to (noise + distortion) ratio for an ideal N-bit converter with a sine wave input is given by:Offset ErrorThis applies to Straight Binary output coding. It is the deviation of the first code transition (00 . . . 000) to (00 . . . 001) from the ideal, i.e., AGND + 1 LSB. Offset Error MatchSignal to (Noise + Distortion) = (6.02N + 1.76) dB This is the difference in Offset Error between the two channels. Thus for a 12-bit converter, this is 74 dB. Gain ErrorTotal Harmonic DistortionThis applies to Straight Binary output coding. It is the deviation of the last code transition (111 . . . 110) to (111 . . . 111) from the ideal (i.e., VREF – 1 LSB) after the offset error has been adjusted out.Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7266 it is defined as:12625242322log20)(V V V V V V dB THD ++++=Gain Error Matchwhere V 1 is the rms amplitude of the fundamental and V 2, V 3, V 4, V 5 and V 6 are the rms amplitudes of the second through the sixth harmonics.This is the difference in Gain Error between the two channels. Zero Code ErrorThis applies when using twos complement output coding in particular with the 2 x V REF input range as –V REF to +V REF biased about the V REF point. It is the deviation of the midscaletransition (all 1s to all 0s) from the ideal V IN voltage, i.e., V REF - 1 LSB.Peak Harmonic or Spurious NoisePeak harmonic or spurious noise is defined as the ratio of the rms value of the next largest component in the ADC output spectrum (up to fS/2 and excluding dc) to the rms value of the fundamental. Normally, the value of this specification is determined by the largest harmonic in the spectrum, but for ADCs where the harmonics are buried in the noise floor, it will be a noise peak.Zero Code Error MatchThis refers to the difference in Zero Code Error between the two channels. Channel-to-Channel IsolationPositive Gain ErrorChannel-to-channel isolation is a measure of the level of crosstalk between channels. It is measured by applying a full-scale (2 x V REF ), 455kHz sine wave signal to all unselected input channels and determining how much that signal is attenuated in the selected channel with a 10 kHz signal (0 V to V REF ). The figure given is the worst-case across all twelve channels for the AD7266.This applies when using twos complement output coding in particular with the 2 x V REF input range as –V REF to +V REF biased about the V REF point. It is the deviation of the last codetransition (011…110) to (011…111) from the ideal (i.e., + V REF - 1 LSB) after the Zero Code Error has been adjusted out.Rev. PrG | Page 8 of 17Preliminary Technical Data AD7266Intermodulation DistortionWith inputs consisting of sine waves at two frequencies, fa and fb, any active device with nonlinearities will create distortion products at sum and difference frequencies of mfa ± nfb where m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are those for which neither m nor n are equal to zero. For example, the second order terms include (fa + fb) and (fa – fb), while the third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb).The AD7266 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second order terms are usually distanced in frequency from the original sine waves while the third order terms are usually at a frequency close to the input frequencies. As a result, the second and third order terms are specified separately. The calculation of the intermodulation distortion is as per the THD specification where it is the ratio of the rms sum of the individual distortion products to the rms amplitude of the sum of the fundamentals expressed in dBs.PSR (Power Supply Rejection)Variations in power supply will affect the full-scale transition but not the converter’s linearity. Power supply rejection is the maximum change in full-scale transition point due to a change in power supply voltage from the nominal value. See Typical Performance Curves.Rev. PrG | Page 9 of 17AD7266Preliminary Technical DataTHEORY OF OPERATION04603-P r A -003V VCIRCUIT INFORMATIONThe AD7266 is a fast, micropower, dual 12-bit, single supply, A/D converter that operates from a 2.7 V to 5.25 V supply. When operated from a 5 V supply, the AD7266 is capable of throughput rates of 2 MSPS when provided with a TBD MHz clock, and a throughput rate of 1.5 MSPS at 3 V .The AD7266 contains two on-chip differential track-and-hold amplifiers, two successive approximation A/D converters, and a serial interface with two separate data output pins, and is housed in a 32-lead LFCSP package, which offers the userconsiderable space-saving advantages over alternative solutions. The serial clock input accesses data from the part but also provides the clock source for each successive approximation ADC. The analog input range for the part can be selected to be a 0 V to V REF input or a 2 × V REF input with the analog inputs configured as either single ended or differential. The AD7266 has an on-chip 2.5 V reference that can be overdriven if an external reference is preferred.Figure 3. ADC Acquisition PhaseWhen the ADC starts a conversion (Figure 4), SW3 opens and SW1 and SW2 move to position B, causing the comparator to become unbalanced. Both inputs are disconnected once the conversion begins. The control logic and the charge redistribu-tion DACs are used to add and subtract fixed amounts of charge from the sampling capacitor arrays to bring the comparator back into a balanced condition. When the comparator is rebalanced, the conversion is complete. The control logicgenerates the ADC output code. The output impedances of the sources driving the V IN+ and V IN– pins must be matched; otherwise, the two inputs will have different settling times, resulting in errors.The AD7266 also features power-down options to allow power saving between conversions. The power-down feature isimplemented across the standard serial interface, as described in the Modes of Operation section.CONVERTER OPERATIONThe AD7266 has two successive approximation analog-to-digital converters, each based around two capacitive DACs. Figure 3 and Figure 4 show simplified schematics of one of these ADCs in acquisition and conversion phase, respectively. The ADC is comprised of control logic, a SAR, and twocapacitive DACs. In Figure 3 (the acquisition phase), SW3, is closed, SW1 and SW2 are in position A, the comparator is held in a balanced condition, and the sampling capacitor arrays acquire the differential signal on the input. 04603-P r A -004V VFigure 4. ADC Conversion PhaseRev. PrG | Page 10 of 17ANALOG INPUTThe channels to be converted on simultaneously are selected via the multiplexer address inputs A0 to A2. The logic states of these pins are also checked upon the falling edge of CS and the channels are chosen for the next conversion. The selected input channels are decoded as shown in Table 6.The analog inputs of the AD7266 may be configured as single ended or true differential via the SGL/ logic pin, as shown in Figure 5. On the falling edge of CS , point A, the logic level of the SGL/DIFF pin is checked to determine the configuration of the analog input channels for the next conversion. If this pin is tied to a logic low, the analog input channels to each on-chip ADC are set up as three true differential pairs. If this pin is at a logic high when CS goes low, the analog input channels to each on-chip ADC are set up as six single-ended analog inputs. In Figure 5 at point A, the SGL/DIFF pin is at a logic high so the analog inputs are configured as single-ended for the next conversion, i.e. sampling point B. At point B, the logic level of the SGL/DIFF pin has changed to low; there fore, the analog inputs are configured as differential for the next conversion after this one, even though this current conversion is on single ended configured inputs.The analog input range of the AD7266 can be selected as 0 V to V REF or 0 V to 2 × V REF via the RANGE pin. This selection is made in a similar fashion to that of the SGL/DIFF pin bychecking the logic state of the RANGE pin upon the falling edge of CS . The analog input range is set up for the next conversion. If this pin is tied to a logic low upon the falling edge of CS , the analog input range for the next conversion is 0 V to V REF . If this pin is tied to a logic high upon the falling edge of CS , the analog input range for the next conversion is 0 V to 2 × V REF .OUTPUT CODINGThe AD7266 output coding is set to either twos complement or straight binary depending on which analog input configuration is selected for a conversion. Table 5 shows which output coding scheme is used for each possible analog input configuration.04603-P r A -005CSSCLKFigure 5. Selecting Differential or Single Ended ConfigurationTRANSFER FUNCTIONSThe designed code transitions occur at successive integer LSB values (i.e., 1 LSB, 2 LSB, and so on). The LSB size is V REF /4096. The ideal transfer characteristic for the AD7266 when straight binary coding is output is shown in Figure 6, and the ideal transfer characteristic for the AD7266 when twos complement coding is output is shown in Figure 7.04603-P r A -006000 (000)111 (111)ANALOG INPUTA D C C O D E000...001000...010011 (111)Figure 6. Straight Binary Transfer Characteristic04603-P r A -007100 (000)011 (111)ANALOG INPUTA D C C O D E100 (001)100...010000...001000...000111 (111)Figure 7. Twos Complement Transfer Characteristic with V REF ±V REF InputRangeDIGITAL INPUTSThe digital inputs applied to the AD7266 are not limited by the maximum ratings that limit the analog inputs. Instead, thedigital inputs applied can go to 7 V and are not restricted by the V DD + 0.3 V limit as on the analog inputs. See the Absolute Maximum Ratings. Another advantage of SCLK, RANGE, A0–A2, and CS not being restricted by the V DD + 0.3 V limit is that power supply sequencing issues are avoided. If one of these digital inputs is applied before V DD , there is no risk of latch-up, as there would be on the analog inputs if a signal greater than 0.3 V were applied prior to V DD .V DRIVEThe AD7266 also has the V DRIVE feature, which controls the voltage at which the serial interface operates. V DRIVE allows the ADC to easily interface to both 3 V and 5 V processors. For example, if the AD7266 was operated with a V DD of 5 V , the V DRIVE pin could be powered from a 3 V supply, allowing a large dynamic range with low voltage digital processors. For example, the AD7266 could be used with the 2 × V REF input range, with a V DD of 5 V while still being able to interface to 3 V digital parts.MODES OF OPERATIONThe mode of operation of the AD7266 is selected by controlling the (logic) state of the CS signal during a conversion. There are three possible modes of operation: normal mode, partial power-down mode, and full power-down mode. The point at which CS is pulled high after the conversion has been initiated determines which power-down mode, if any, the device enters. Similarly, if already in a power-down mode, CS can control whether the device returns to normal operation or remains in power-down. These modes of operation are designed to provide flexible power management options. These options can be chosen to optimize the power dissipation/throughput rate ratio for differing application requirements.accessed on the same DOUT line, as shown in Figure TBD (see the Serial Interface section). The identification bit provided prior to each conversion result identifies which on-board ADC the following result is from. Once 32 SCLK cycles have elapsed, the DOUT line returns to three-state on the 32nd SCLK falling edge. If CS is brought high prior to this, the DOUT line returns to three-state at that point. Thus, CS may idle low after 32 SCLK cycles until it is brought high again sometime prior to the next conversion (effectively idling CS low), if so desired, since the bus still returns to three-state upon completion of the dual result read.Once a data transfer is complete and D OUT A and D OUT B have returned to three-state, another conversion can be initiated after the quiet time, t QUIET , has elapsed by bringing low again.NORMAL MODEThis mode is intended for fastest throughput rate performance since the user does not have to worry about any power-up times with the AD7266 remaining fully powered all the time. Figure 8 shows the general diagram of the operation of the AD7266 in this mode.PARTIAL POWER-DOWN MODE04603-P r A -008LEADING ZERO, I.D. BIT + CONVERSION RESULTCSSCLKD OUT A D OUT BThis mode is intended for use in applications where slower throughput rates are required. Either the ADC is powered down between each conversion, or a series of conversions may be performed at a high throughput rate and the ADC is then powered down for a relatively long duration between these bursts of several conversions. When the AD7266 is in partial power-down, all analog circuitry is powered down except for the on-chip reference and reference buffer.To enter partial power-down, the conversion process must be interrupted by bringing CS high anywhere after the secondfalling edge of SCLK and before the 10th falling edge of SCLK, as shown in Figure 9. Once CS has been brought high in this window of SCLKs, the part enters partial power-down, the conversion that was initiated by the falling edge of CS isterminated, and D OUT A and D OUT B go back into three-state. If CS is brought high before the second SCLK falling edge, the part remains in normal mode and does not power down. This avoids accidental power-down due to glitches on the CS line.Figure 8. Normal Mode OperationThe conversion is initiated on the falling edge of CS , asdescribed in the Serial Interface section. To ensure that the part remains fully powered up at all times, CS must remain low until at least 10 SCLK falling edges have elapsed after the falling edge of CS . If CS is brought high any time after the 10th SCLK falling edge but before the 14th SCLK falling edge, the part remains powered up but the conversion is terminated and D OUT A and D OUT B go back into three-state. Fourteen serial clock cycles are required to complete the conversion and access the conversion result. The DOUT line does not return to three-state after 14 SCLK cycles have elapsed, but instead does so when CS is brought high again. If CS is left low for another 2 SCLK cycles (e.g. if only a 16 SCLK burst is available), two trailing zeros are clocked out after the data. If CS is left low for a further 16 SCLK cycles again, the result from the other ADC on board is also04603-P r A -009CSSCLKTRI-STATED OUT A D OUT BFigure 9. Entering Partial Power-Down ModeTo exit this mode of operation and power up the AD7266 again, a dummy conversion is performed. On the falling edge of CS , the device begins to power up, and continues to power up as long as CS is held low until after the falling edge of the 10th SCLK. The device is fully powered up after approximately 1 µs has elapsed, and valid data results from the next conversion, as shown in Figure 10. If CS is brought high before the second falling edge of SCLK, the AD7266 again goes into partial power-down. This avoids accidental power-up due to glitches on the CS line. Although the device may begin to power up on the falling edge of CS , it powers down again on the rising edge of CS . If the AD7266 is already in partial power-down mode and CS is brought high between the second and 10th falling edges of SCLK, the device enters full power-down mode.FULL POWER-DOWN MODEThis mode is intended for use in applications where throughput rates slower than those in the partial power-down mode are required, as power-up from a full power-down takes substan-tially longer than that from partial power-down. This mode is more suited to applications where a series of conversionsperformed at a relatively high throughput rate are followed by a long period of inactivity and thus power-down. When theAD7266 is in full power-down, all analog circuitry is powered down. Full power-down is entered in a similar way as partial power-down, except the timing sequence shown in Figure 9 must be executed twice. The conversion process must beinterrupted in a similar fashion by bringing CS high anywhere after the second falling edge of SCLK and before the 10th falling edge of SCLK. The device enters partial power-down at this point. To reach full power-down, the next conversion cycle must be interrupted in the same way, as shown in Figure TBD. Once CS has been brought high in this window of SCLKs, the part powers down completely.Note that it is not necessary to complete the 14 SCLKs once CS has been brought high to enter a power-down mode.To exit full power-down and power the AD7266 up again, a dummy conversion is performed, as when powering up from partial power-down. On the falling edge of CS , the device begins to power up and continues to power up as long as CS is held low until after the falling edge of the 10th SCLK. Thepower-up time required must elapse before a conversion can be initiated, as shown in Figure TBD. See the Power-Up Times section for the power-up times associated with the AD7266.04603-P r A -010SCLKINVALID DATAVALID DATAD OUT A D OUT BCSTHE PART BEGINSFigure 10. Exiting Partial Power-Down ModeSERIAL INTERFACEFigure 11 shows the detailed timing diagram for serial interfacing to the AD7266. The serial clock provides the conversion clock and controls the transfer of information from the AD7266 during conversion.The CS signal initiates the data transfer and conversion process. The falling edge of CS puts the track and hold into hold mode and takes the bus out of three-state; the analog input is sampled at this point. The conversion is also initiated at this point and requires a minimum of 14 SCLKs to complete. Once 13 SCLK falling edges have elapsed, the track-and-hold will go back into track on the next SCLK rising edge, as shown in Figure 11 at point B. If a 16 SCK transfer is used then 2 trailing zeros will appear after the final LSB. On the rising edge of CS, the conversion will be terminated and D OUT A and D OUT B will go back into three-state. If CS is not brought high but is instead held low for a further 14 (or 16) SCLK cycles on D OUT A, the data from conversion B will be output on D OUT A (followed by 2 trailing zeros). Likewise, if CS is held low for a further 14 (or 16) SCLK cycles on D OUT B, the data from conversion A will be output on D OUT B. This is illustrated in Figure 12 where the case for D OUT A is shown. Note that in this case, the D OUT line in use will go back into three-state on the 32nd SCLK falling edge or the rising edge of CS, whichever occurs first.A minimum of fourteen serial clock cycles are required to perform the conversion process and to access data from one conversion on either data line of the AD7266. CS going low provides the leading zero to be read in by the microcontroller or DSP. The remaining data is then clocked out by subsequent SCLK falling edges, beginning with a second leading zero. Thus the first falling clock edge on the serial clock has the leading zero provided and also clocks out the second leading zero. The 12 bit result then follows with the final bit in the data transfer valid on the fourteenth falling edge, having being clocked out on the previous (thirteenth) falling edge. In applications with a slower SCLK, it may be possible to read in data on each SCLK rising edge depending on the SCLK frequency used, i.e., the first rising edge of SCLK after the CS falling edge would have the leading zero provided and the thirteenth rising SCLK edge would have DB0 provided.+5D OUT AD OUT BFigure 11 Serial Interface Timing DiagramD OUTZeros,Figure 12. Reading data from Both ADCs on One D OUT Line with 32 SCLKs。

AD7606中文电路描述

AD7606中文电路描述

此电路中所用产品∙AD7606∙AD7606-4∙AD7606-6∙ADR421特点∙多通道同时采样数据采集系统∙实现16位性能的布局指南应用:∙可编程逻辑控制和分布式控制系统∙电子测试和测量添加到信号链设计器使用信号链设计器BETA设计资源设备驱动Software,such as C code and/or FPGA code,used to communicate with a component's digital interface.∙AD7606IIO Multi-Channel Simultaneous Sampling ADC Linux Driver(Wiki Site) FPGA HDL∙CED1Z FPGA Project for AD7606with Nios driver电路功能与优势在电力线路测量和保护系统中,需要对多相输配电网络的大量电流和电压通道进行同步采样。

这些应用中,通道数量从6个到64个以上不等。

AD76068通道数据采集系统(DAS)集成16位双极性同步采样SAR ADC 和片内过压保护功能,可大大简化信号调理电路,并减少器件数量、电路板面积和测量保护板的成本。

高集成度使得每个AD7606只需9个低值陶瓷去耦电容就能工作。

在测量和保护系统中,为了保持多相电力线网络的电流和电压通道之间的相位信息,必须具备同步采样能力。

AD7606具有宽动态范围,是捕获欠压/欠流和过压/过流状况的理想器件。

输入电压范围可以通过引脚编程设置为±5V或±10V。

此电路笔记详细介绍针对采用多个AD7606器件应用而推荐的印刷电路板(PCB)布局。

该布局在通道间匹配和器件间匹配方面进行了优化,有助于简化高通道数系统的校准程序。

当通道间匹配非常重要时,此电路可以使用2.5V内部基准电压源AD7606;而对于要求出色绝对精度的高通道数应用,此电路可以使用外部精密基准电压源ADR421,它具有高精度(B级:最大值±1mV)、低漂移(B级:最大值3ppm/°C)、低噪声(典型值1.75μV p-p,0.1Hz至10Hz)等特性。

AD8606ARZ中文资料

AD8606ARZ中文资料
14 OUT D 13 –IN D
V+ 5
AD8608
TOP VIEW (Not to Scale)
12 +IN D 11 V– 10 +IN C
02731-004
概述
AD8605、AD8606和AD86081分别是单路、双路和四路、轨 到轨输入和输出、单电源放大器,具有极低失调电压、低 输入电压和电流噪声以及宽信号带宽等特性。这些放大器 采用ADI公司的DigiTrim®调整专利技术,无需激光调整便 可达到出色的精度。 低失调、低噪声、极低的输入偏置电流和高速度特性相结 合,使这些放大器适合各种应用。滤波器、积分器、光电 二极管放大器和高阻抗传感器等器件均可受益于这些特性 组合。宽带宽和低失真特性则有益于音频和其它交流应 用。具体应用包括光学控制环路、便携式和环路供电仪器 仪表以及便携式设备的音频放大。 AD8605 、 AD8606 和 AD8608 的额定温度范围为 −40°C 至 +125°C扩展工业温度范围。AD8605单通道放大器提供5引 脚SOT-23和5引脚WLCSP两种封装。AD8606双通道放大器 提供 8引脚 MSOP、 8引脚 WLSCP和窄体 SOIC表贴三种封 装。AD8608四通道放大器提供14引脚TSSOP和窄体14引脚 SOIC两种封装。5引脚和8引脚WLCSP封装器件是现有尺寸 最 小 的 表 贴 运 算 放 大 器 。 WLCSP 、 SOT-23 、 MSOP 和 TSSOP封装产品仅提供卷带和卷盘形式。
1
4
9 –IN C 8 OUT C
AD8605 ONLY
图3. 5引脚WLCSP(CB后缀)
图4. 14引脚SOIC_N(R后缀)
OUT A –IN A +IN A V+ +IN B –IN B OUT B 1 14 OUT D –IN D +IN D V– +IN C –IN C OUT C

控罗吉1756隔离分析输入输出模块系列说明书

控罗吉1756隔离分析输入输出模块系列说明书

ControlLogix 1756 Isolated Analog I/O ModulesEnhanced I/O for Advanced Control ApplicationsEnhanced Analog I/O ModulesThree 8-channel isolated designs and 12-channel and 16-channelnon-isolated designs with improved functionality of analog I/O provide faster performance, more accuracy, better resolution and cost savings due to less space needed in the chassis for additional modules and power supplies.• 1756-IF8I General Purpose Isolated Analog Input ModuleThis general purpose isolated analog input module provides faster performance, accuracy and per channel configuration for voltage, current or 2-wire transmitter current sourcing.• 1756-IRT8I Combined Temperature Sensing Input ModuleThis combined temperature sensing input (Thermocouple and RTD) module provides faster performance, accuracy and per channel configuration for either RTD or Thermocouple.• 1756-OF8I General Purpose Current Voltage Analog Output Module This general purpose current/voltage analog output module provides faster performance, accuracy and per channel configuration for either current or voltage.• 1756-IR12 non-Isolated High Density RTD module • 1756-IT16 non-Isolated High Density Temperature module •1756-CJC Cold Junction Compensation kit for use with either 1756-IRT8I or 1756-IT16 module. Kit includes two jumpersFeatures and Benefits of the ControlLogix® 1756 Isolated Analog I/O Modules:• Provides increased accuracy,repeatability and stability over the entire temperature operating range for enhanced precision • Up to 24 bits of usable resolution for increased precision • 1 ms of input sampling of floating point values for faster output response times helping to enable higher performance • Offers industry standard 8-point channel density enabling the ability to wire more devices per module for hardware simplification • No field calibration required for simplified device replacement and faster installation • Synchronized input sampling for increased visibility across the system for real-time control over the EtherNet/IP network• Per channel status and fault statusindicator annunciation for more simplified troubleshooting and maintenance • SIL 1 Systematic Capability 2 Type certified for use in a ControlLogix SIL 2 architecture • Emulation mode helps enable customers to more seamlesslymigrate from 6-channel applicationsAllen-Bradley, ControlLogix, LISTEN. THINK. SOLVE. and Rockwell Software are trademarks of Rockwell Automation, Inc. Trademarks not belonging to Rockwell Automation are property of their respective companies.The specifications for the 1756-IF8I, 1756-IRT8I, 1756-OF8I, 1756-IR12 and 1756-IT16 include:Publication1756-PP020C-EN-E – May 2016Copyright © 2016 Rockwell Automation, Inc. All Rights Reserved. Printed in USA.Supersedes Publication 1756-PP020B-EN-E – May 2015Analog 8-Channel Wiring SystemThe wiring system solution for the 1756 8-channel analog I/O modules enables the wiring of more devices. The 6-channel wiring system also functions with the 8-point I/O modules, allowing the preservation of existing field terminations.• Significantly decreases wiring time from the controller card to the terminal blocks• Provides additional capabilities for connections to the controller card via fusing and relays • Provides a more standard connection terminal block。

AD器件一览表

AD器件一览表
沈阳单片机开发网——帮您精确掌握电子器件的使用细节

AD器件一览表
ADI AD 转换器
型号
8 位 ADC AD7574 AD7820
后缀
引脚 数
封装
JN 24
DIP
KN 20
DIP
AD7821
KN 20
DIP
12 位 ADC
AD7874
AN 28 DIP
AD7878
JN 28 DIP
三相电量测量 IC
3
沈阳单片机开发网——帮您精确掌握电子器件的使用细节

TI AD 转换器
器件
后缀
并行输出 AD 转换器
TLC0820A CN
THS1206 THS1408
CDA CPFB
串行输出 AD 转换器
TLC0838 TLV0838 TLC549 TLC549 TLV1544 TLC1549
20 8
8
8
8
8
16 10
8
10
16 10
20 10
16 10
20 10
20 12 20 12
±1.0 20
8
5
12.5 8 位 A/D 转换器
±1.0 37.9 8
3.3
50
低电压
±0.5 40
1
5
Y
12
8 位 A/D 转换器
±0.5 40
1
5
Y
12
8 位 A/D 转换器
±1.0 66
4
3.3
Y
Y
AD7777
AN
28 DIP
AD7861
AP
44 PLCC
AD7853L AN

高精度、高驱动电流、双运算放大器AD826说明书

高精度、高驱动电流、双运算放大器AD826说明书

REV.BInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication oraAD826One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700World Wide Web Site: High-Speed, Low-Power Dual Operational AmplifierCONNECTION DIAGRAM8-Lead Plastic Mini-DIP and SO Package12348765AD826V+OUT2–IN2+IN2OUT1–IN1+IN1V–The AD826 features high output current drive capability of 50mA min per amp, and is able to drive unlimited capacitive loads. With a low power supply current of 15 mA max for both amplifiers, the AD826 is a true general purpose operational amplifier.The AD826 is ideal for power sensitive applications such as video cameras and portable instrumentation. The AD826 can operate from a single +5 V supply, while still achieving 25 MHz of band-width. Furthermore the AD826 is fully specified from a single +5 V to ±15 V power supplies.The AD826 excels as an ADC/DAC buffer or active filter in data acquisition systems and achieves a settling time of 70 ns to 0.01%, with a low input offset voltage of 2 mV max. The AD826 is available in small 8-lead plastic mini-DIP and SO packages.10901000%500ns5V5VC L = 100pFC L = 1000pFFEATURES High Speed:50 MHz Unity Gain Bandwidth 350 V/␮s Slew Rate70 ns Settling Time to 0.01%Low Power:7.5 mA Max Power Supply Current Per Amp Easy to Use:Drives Unlimited Capacitive Loads50 mA Min Output Current Per AmplifierSpecified for +5 V, ؎5 V and ؎15 V Operation 2.0 V p-p Output Swing into a 150 ⍀ Load (V S = +5 V)Good Video PerformanceDifferential Gain & Phase Error of 0.07% & 0.11؇Excellent DC Performance:2.0 mV Max Input Offset Voltage APPLICATIONSUnity Gain ADC/DAC Buffer Cable Drivers8- and 10-Bit Data Acquisition Systems Video Line Driver Active FiltersPRODUCT DESCRIPTIONThe AD826 is a dual, high speed voltage feedback op amp. It is ideal for use in applications which require unity gain stability and high output drive capability, such as buffering and cable driving. The 50 MHz bandwidth and 350 V/µs slew rate make the AD826 useful in many high speed applications including:video, CATV, copiers, LCDs, image scanners and fax machines.TEKTRONIX P6201 FET PROBE HP PULSE GENERATOR1/2AD8261k ⍀50⍀1k ⍀C LV OUTV INTEKTRONIX 7A24 FET PREAMP؉V S0.01␮F3.3␮F0.01␮F–V S3.3␮F132Driving a Large Capacitive Load查询AD826AR-REEL供应商捷多邦,专业PCB打样工厂,24小时加急出货AD826–SPECIFICATIONS(@ T A = +25؇C, unless otherwise noted)Parameter Conditions V S Min Typ Max Unit DYNAMIC PERFORMANCEUnity Gain Bandwidth±5 V3035MHz±15 V4550MHz0, +5 V2529MHz Bandwidth for 0.1 dB Flatness Gain = +1±5 V1020MHz±15 V2555MHz0, +5 V1020MHz Full Power Bandwidth1V OUT = 5 V p-pR LOAD = 500 Ω±5 V15.9MHzV OUT = 20 V p-pR LOAD = 1 kΩ±15 V 5.6MHz Slew Rate R LOAD = 1 kΩ±5 V200250V/µsGain = –1±15 V300350V/µs0, +5 V150200V/µs Settling Time to 0.1%–2.5 V to +2.5 V±5 V45ns0 V–10 V Step, A V = –1±15 V45nsto 0.01%–2.5 V to +2.5 V±5 V70ns0 V–10 V Step, A V = –1±15 V70ns NOISE/HARMONIC PERFORMANCETotal Harmonic Distortion F C = 1 MHz±15 V–78dB Input Voltage Noise f = 10 kHz±5 V, ±15 V15nV/√Hz Input Current Noise f = 10 kHz±5 V, ±15 V 1.5pA/√Hz Differential Gain Error NTSC±15 V0.070.1% (R1 = 150 Ω)Gain = +2±5 V0.120.15%0, +5 V0.15% Differential Phase Error NTSC±15 V0.110.15Degrees (R1 = 150 Ω)Gain = +2±5 V0.120.15Degrees0, +5 V0.15Degrees DC PERFORMANCEInput Offset Voltage±5 V to ±15 V0.52mVT MIN to T MAX3mV Offset Drift10µV/°C Input Bias Current±5 V, ±15 V 3.3 6.6µAT MIN10µAT MAX 4.4µA Input Offset Current±5 V, ±15 V25300nAT MIN to T MAX500nA Offset Current Drift0.3nA/°C Open-Loop Gain V OUT = ±2.5 V±5 VR LOAD = 500 Ω24V/mVT MIN to T MAX 1.5V/mVR LOAD = 150 Ω 1.53V/mVV OUT = ±10 V±15 VR LOAD = 1 kΩ 3.56V/mVT MIN to T MAX25V/mVV OUT = ±7.5 V±15 VR LOAD = 150 Ω (50 mA Output)24V/mV INPUT CHARACTERISTICSInput Resistance300kΩInput Capacitance 1.5pF Input Common-Mode Voltage Range±5 V+3.8+4.3V–2.7–3.4V±15 V+13+14.3V–12–13.4V0, +5 V+3.8+4.3V+1.2+0.9V Common-Mode Rejection Ratio V CM = ±2.5 V, T MIN–T MAX±5 V80100dBV CM = ±12 V±15 V86120dBT MIN to T MAX±15 V80100dBAD826 ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 VInternal Power Dissipation2Plastic (N) . . . . . . . . . . . . . . . . . . . . . See Derating CurvesSmall Outline (R) . . . . . . . . . . . . . . . . See Derating CurvesInput Voltage (Common Mode) . . . . . . . . . . . . . . . . . . .±V SDifferential Input Voltage . . . . . . . . . . . . . . . . . . . . . . .±6 VOutput Short Circuit Duration . . . . . . . See Derating Curves Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C Operating Temperature Range . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 seconds) . . . +300°C NOTES1Stresses above those listed under Absolute Maximum Ratings may cause perma-nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability .2Specification is for device in free air: 8-lead plastic package, θJA= 100°C/watt; 8-lead SOIC package, θJA = 155°C/watt.ORDERING GUIDETemperature Package Package Model Range Description Option AD826AN–40°C to +85°C8-Lead Plastic DIP N-8AD826AR–40°C to +85°C8-Lead Plastic SOIC SO-8 AD826AR-REEL7–40°C to +85°C7” Tape & Reel SOIC SO-8Parameter Conditions V S Min Typ Max Unit OUTPUT CHARACTERISTICSOutput Voltage Swing R LOAD = 500 Ω±5 V 3.3 3.8±VR LOAD = 150 Ω±5 V 3.2 3.6±VR LOAD = 1 kΩ±15 V13.313.7±VR LOAD = 500 Ω±15 V12.813.4±VR LOAD = 500 Ω0, +5 V+1.5,+3.5V Output Current±15 V50mA±5 V50mA0, +5 V30mA Short-Circuit Current±15 V90mA Output Resistance Open Loop8ΩMATCHING CHARACTERISTICSDynamicCrosstalk f = 5 MHz±15 V–80dB Gain Flatness Match G = +1, f = 40 MHz±15 V0.2dB Slew Rate Match G = –1±15 V10V/µs DCInput Offset Voltage Match T MIN–T MAX±5 V to ±15 V0.52mV Input Bias Current Match T MIN–T MAX±5 V to ±15 V0.060.8µA Open-Loop Gain Match V O = ±10 V, R LOAD = 1 kΩ,T MIN–T MAX±15 V0.150.01mV/V Common-Mode Rejection Ratio Match V CM = ±12 V, T MIN–T MAX±15 V80100dB Power Supply Rejection Ratio Match±5 V to ±15 V, T MIN–T MAX80100dB POWER SUPPLYOperating Range Dual Supply±2.5±18VSingle Supply+5+36V Quiescent Current/Amplifier±5 V 6.67.5mAT MIN to T MAX±5 V7.5mA±15 V7.5mAT MIN to T MAX±15 V 6.87.5mA Power Supply Rejection Ratio V S = ±5 V to ±15 V, T MIN to T MAX7586dB NOTES1Full power bandwidth = slew rate/2π VPEAK. Specifications subject to change without notice.ESD SUSCEPTIBILITYESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 volts, which readily accumulate on the human body and on test equipment, can discharge without detection. Although the AD826 features proprietary ESD protection cir-cuitry, permanent damage may still occur on these devicesif they are subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid any performance degradation or loss of functionality.2.0–50901.50.5–301.050703010–1080–40406020–20AMBIENT TEMPERATURE –؇CMAXIMUMPOWERDISSIPATION–WattsMaximum Power Dissipation vs. Temperature for Different Package TypesAD8262000201555101015I N P U T C O M M O N -M O D E R A N G E – ؎V o l t sSUPPLY VOLTAGE – ؎Volts–V CM+V CMFigure mon-Mode Voltage Range vs. Supply2000201555101015SUPPLY VOLTAGE – ؎VoltsO U T P U T V O L T A G E S W I N G – ؎V o l tsFigure 2.Output Voltage Swing vs. Supply 30010k1551001010201k25LOAD RESISTANCE – ⍀O U T P U T V O L T A G E S W I N G – V o l t s p -pFigure 3.Output Voltage Swing vs. Load Resistance7.75.70207.26.256.71015SUPPLY VOLTAGE – ؎VoltsQ U I E S C E N T S U P P L Y C U R R E N T P E R A M P – m AFigure 4.Quiescent Supply Current per Amp vs. Supply Voltage for Various TemperaturesS L E W R A T E – V /␮s20501510SUPPLY VOLTAGE– ؎Volts200300350400250Figure 5.Slew Rate vs. Supply Voltage10010.011k10k100M10M1M100k0.110FREQUENCY – HzC L O S ED -L O O P O U T P U T I M PE D A N C E – ⍀Figure 6.Closed-Loop Output Impedance vs. Frequency– Typical CharacteristicsAD8267114042–403–6065120806040100200–20TEMPERATURE – ؇CI N P U T B I A S C U R R E N T – ␮AFigure 7.Input Bias Current vs. Temperature130301409050–4070–60110120100806040200–20TEMPERATURE – ؇CS H O R T C I R C U I T C U R R E N T – m AFigure 8.Short Circuit Current vs. Temperature 10020–601408040–4060100120806040200–20TEMPERATURE – ؇CP H A S E M A R G I N – D e g r e e s20804060U N I T Y G A I N B A N D W I D T H – M HzFigure 9.Unity Gain Bandwidth and Phase Margin vs. Temperature100–201G4010k201k 8060100M 10M1M 100k FREQUENCY – Hz+100+40+20+80+60P H A S E M A R G I N – D e g r e e sO P E N -L O O P G A I N – d BFigure 10.Open-Loop Gain and Phase Margin vs. Frequency411001k10k2356LOAD RESISTANCE – ⍀O P E N -L OO P G A I N – V /m V7Figure 11.Open-Loop Gain vs. Load Resistance10010100M30201k 10040506070809010M 1M 100k10k FREQUENCY – HzP S R – d BFigure 12.Power Supply Rejection vs. FrequencyAD826140601k 10M1208010k 100100k 1M FREQUENCY – HzC M R – dBFigure mon-Mode Rejection vs. Frequency 30100100k1M 100M10M 20FREQUENCY – HzO U T P U T V O L T A G E – V o l t s p -pFigure rge Signal Frequency Response 10–10160–4–820–602–20468140120100806040SETTLING TIME – ns O U T P U T S W I N G F R O M 0 T O ؎V0.01%0.1%1%1%0.01%0.1%Figure 15.Output Swing and Error vs. Settling Time –40–10010M–70–901k –80100–50–601M 100k 10k FREQUENCY – HzH A R M O N I C D I S T O R T I O N – dBFigure 16. Harmonic Distortion vs. Frequency50010M301010203401M100k 10k 1k 100FREQUENCY – HzI N P U T V O L T A G E N O I S E – nV / H zFigure 17. Input Voltage Noise Spectral Density380300–60140360320–40340100120806040200–20TEMPERATURE – ؇CS L E WR A T E – V /␮sFigure 18. Slew Rate vs. TemperatureAD826FREQUENCY – HzG A I N – d B50–5100k1M100M10M–1–2–3–41234Figure 19. Closed-Loop Gain vs. Frequency SUPPLY VOLTAGE – Volts0.130.070.10D I F FE R E N T IA L P H A S E – D e g r e e sD I F FE R E N T I A L G A I N – P e r c e n t0.10؎150.130.110.12؎5؎10Figure 20. Differential Gain and Phase vs. Supply Voltage –30–70–110100k100M10M1M10k–90–50–60–80–100–40FREQUENCY – HzC R O S S T A L K – d BFigure 21. Crosstalk vs. Frequency FREQUENCY – HZ50–5100k1M 100M10M –1–2–3–41234G A I N – dBFigure 22. Closed-Loop Gain vs. Frequency, Gain = –1FREQUENCY – HzG A I N – d B1.00–1.0100k1M 100M10M –0.2–0.4–0.6–0.80.20.40.60.8Figure 23. Gain Flatness Matching vs. Supply, G = +1USE GROUND PLANEPINOUT SHOWN IS FOR MINIDIP PACKAGEV R L = 150⍀ FOR ؎V S = 5V, 1k ⍀ FOR ؎V S = 15VFigure 24. Crosstalk Test CircuitAD826Figure 25. Noninverting Amplifier ConfigurationFigure 26. Noninverting Large Signal Pulse Response, R L = 1 k ΩFigure 27. Noninverting Large Signal Pulse Response,R L = 150ΩFigure 28. Noninverting Small Signal Pulse Response, R L = 1 k ΩFigure 29.Noninverting Small Signal Pulse Response, R L = 150 ΩAD826Figure 30.Inverting Amplifier ConfigurationFigure 31.Inverting Large Signal Pulse Response,R L = 1 kΩFigure 32.Inverting Large Signal Pulse Response,R L = 150ΩFigure 33.Inverting Small Signal Pulse Response,R L = 1 kΩFigure 34.Inverting Small Signal Pulse Response,R L = 150 ΩAD826THEORY OF OPERATIONThe AD826 is a low cost, wide band, high performance dual operational amplifier which can drive heavy capacitive and resistive loads. It also achieves a constant slew rate, bandwidth and settling time over its entire specified temperature range. The AD826 (Figure 35) consists of a degenerated NPN differen-tial pair driving matched PNPs in a folded-cascode gain stage. The output buffer stage employs emitter followers in a class AB amplifier which delivers the necessary current to the load while maintaining low levels of distortion.–INNULL 1NULL 8S–VSFigure 35. Simplified SchematicThe capacitor, C F, in the output stage mitigates the effect of capacitive loads. With low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case, C F is bootstrapped and does not contribute to the overall compensation capacitance of the device. As the capacitive load is increased, a pole is formed with the output impedance of the output stage. This reduces the gain, and therefore, C F is incompletely bootstrapped. Effectively, some fraction of C F contributes to the overall compensation capacitance, reducing the unity gain bandwidth. As the load capacitance is further increased, the bandwidth continues to fall, maintaining the stability of the amplifier.INPUT CONSIDERATIONSAn input protection resistor (R IN in Figure 25) is required in circuits where the input to the AD826 will be subjected to transient or continuous overload voltages exceeding the ±6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current. For high performance circuits, it is recommended that a “bal-ancing” resistor be used to reduce the offset errors caused by bias current flowing through the input and feedback resistors. The balancing resistor equals the parallel combination of R IN and R F and thus provides a matched impedance at each input terminal. The offset voltage error will then be reduced by more than an order of magnitude.APPLYING THE AD826The AD826 is a breakthrough dual amp that delivers precision and speed at low cost with low power consumption. The AD826 offers excellent static and dynamic matching characteristics, combined with the ability to drive heavy resistive and capacitive loads.As with all high frequency circuits, care should be taken to main-tain overall device performance as well as their matching. The following items are presented as general design considerations. Circuit Board LayoutInput and output runs should be laid out so as to physically isolate them from remaining runs. In addition, the feedback resistor of each amplifier should be placed away from the feedback resistor of the other amplifier, since this greatly reduces inter-amp coupling.Choosing Feedback and Gain ResistorsIn order to prevent the stray capacitance present at each amplifier’s summing junction from limiting its performance, the feedback resistors should be ≤ 1 kΩ. Since the summing junction capaci-tance may cause peaking, a small capacitor (1 pF–5pF) may be paralleled with R F to neutralize this effect. Finally, sockets should be avoided, because of their tendency to increase interlead capacitance.Power Supply BypassingProper power supply decoupling is critical to preserve the integrity of high frequency signals. In carefully laid out designs, decoupling capacitors should be placed in close proximity to the supply pins, while their lead lengths should be kept to a mini-mum. These measures greatly reduce undesired inductive effects on the amplifier’s response.Though two 0.1µF capacitors will typically be effective in decoupling the supplies, several capacitors of different values can be paralleled to cover a wider frequency range.AD826؎SINGLE SUPPLY OPERATIONAn exciting feature of the AD826 is its ability to perform well in a single supply configuration (see Figure 37). The AD826 is ideally suited for applications that require low power dissipation and high output current and those which need to drive large capacitive loads, such as high speed buffering and instrumentation. Referring to Figure 36, careful consideration should be given to the proper selection of component values. The choices for this particular circuit are: (R1 + R3)ʈR2 combine with C1 to form a low frequency corner of approximately 30 Hz.OUT0.1VFigure 36. Single Supply Amplifier Configuration R3 and C2 reduce the effect of the power supply changes on the output by low-pass filtering with a corner at12πR3C2.The values for R L and C L were chosen to demonstrate the AD826’s exceptional output drive capability. In this configura-tion, the output is centered around 2.5 V. In order to eliminate the static dc current associated with this level, C3 was inserted in series with R L.Figure 37.Single Supply Pulse Response, G = +1,R L = 150Ω, C L = 200 pFPARALLEL AMPS PROVIDE 100 mA TO LOADBy taking advantage of the superior matching characteristics ofthe AD826, enhanced performance can easily be achieved byemploying the circuit in Figure 38. Here, two identical cells areparalleled to obtain even higher load driving capability than thatof a single amplifier (100 mA min guaranteed). R1 and R2 areincluded to limit current flow between amplifier outputs thatwould arise in the presence of any residual mismatch.LFigure 38.Parallel Amp ConfigurationAD826SINGLE-ENDED TO DIFFERENTIAL LINE DRIVEROutstanding CMRR (> 80 dB @ 5 MHz), high bandwidth, wide supply voltage range, and the ability to drive heavy loads, make the AD826 an ideal choice for many line driving applications.In this application, the AD830 high speed video difference amp serves as the differential line receiver on the end of a back terminated, 50 ft., twisted-pair transmission line (see Figure 40).The overall system is configured in a gain of +1 and has a –3 dB bandwidth of 14 MHz. Figure 39 is the pulse response with a 2 V p-p, 1 MHz signal input.Figure 39.Pulse ResponseFigure 40.Differential Line DriverLOW DISTORTION LINE DRIVERThe AD826 can quickly be turned into a powerful, low distor-tion line driver (see Figure 41). In this arrangement the AD826can comfortably drive a 75Ω back-terminated cable, with a 5MHz, 2 V p-p input; all of this while achieving the harmonic distortion performance outlined in the following table.Configuration 2nd Harmonic 1.No Load –78.5 dBm 2.150 Ω R L Only –63.8 dBm 3.150Ω R L 7.5Ω R C–70.4 dBmIn this application one half of the AD826 operates at a gain of 2.1 and supplies the current to the load, while the other pro-vides the overall system gain of 2. This is important for two reasons: the first is to keep the bandwidth of both amplifiers the same, and the second is to preserve the AD826’s ability to oper-ate from low supply voltages. R C varies with the load and must be chosen to satisfy the following equation:R C = MR Lwhere M is defined by [(M+ 1) G S = G D ] and G D = Driver ’s Gain,Figure 41.Low Distortion AmplifierAD826HIGH PERFORMANCE ADC BUFFERFigure 42 is a schematic of a 12-bit high speed analog-to-digital converter. The AD826 dual op amp takes a single ended input and drives the AD872 A/D converter differentially, thus reduc-ing 2nd harmonic distortion. Figure 43 is a FFT of a 1MHz input, sampled at 10 MHz with a THD of –78 dB. The AD826can be used to amplify low level signals so that the entire range of the converter is used. The ability of the AD826 to perform on a ±5 volt supply or even with a single 5 volts combined with its rapid settling time and ability to deliver high current to compli-cated loads make it a very good flash A/D converter buffer as well as a very useful general purpose building block.V Figure 42.A Differential Input Buffer for High Bandwidth ADCsFigure 43.FFT, Buffered A/D ConverterAD826OUTLINE DIMENSIONSDimensions shown in inches and (mm).8-Lead Plastic Mini-DIP (N) Package8-Lead SO (R) Package45؇All brand or product names mentioned are trademarks or registered trademarks of their respective holders.C 1807a –0–6/00 (r e v . B ) 00877P R I N T ED I N U .S .A .。

FPGA可编程逻辑器件芯片AD8692ARMZ中文规格书

FPGA可编程逻辑器件芯片AD8692ARMZ中文规格书
The small SC70 and TSOT package options for the AD8691 allow it to be placed next to sensors, thereby reducing external noise pickup.
The AD8691, AD8692, and AD8694 are specified over the extended industrial temperature range of −40°C to +125°C. The AD8691 single is available in 5-lead SC70 and 5-lead TSOT packages. The AD8692 dual is available in 8-lead MSOP and narrow SOIC surface-mount packages. The AD8694 quad is available in 14-lead TSSOP and narrow 14-lead SOIC packages.
OUTPUT VOLTAGE SWING (mV)
350 VS = 5V
300
AD8691_92 (V DD – VOH)
250 AD8694 (VDD – VOH) 200
150 AD8694 (VOL)
100
AD8691_92 (V OL)
50
0 –40 –20 0
20 40 60 80 100 120
28mV p-p
V–
B
130
–2.5V VOUT V+
120
110
100 90
80 1k
10k
100k

常用AD芯片介绍共7页word资料

常用AD芯片介绍共7页word资料

目前生产AD/DA的主要厂家有ADI、TI、BB、PHILIP、MOTOROLA等,武汉力源公司拥有多年从事电子产品的经验和雄厚的技术力量支持,已取得排名世界前列的模拟IC生产厂家ADI、TI 公司代理权,经营全系列适用各种领域/场合的AD/DA器件。

1. AD公司AD/DA器件AD公司生产的各种模数转换器(ADC)和数模转换器(DAC)(统称数据转换器)一直保持市场领导地位,包括高速、高精度数据转换器和目前流行的微转换器系统(MicroConvertersTM )。

1)带信号调理、1mW功耗、双通道16位AD转换器:AD7705AD7705是AD公司出品的适用于低频测量仪器的AD转换器。

它能将从传感器接收到的很弱的输入信号直接转换成串行数字信号输出,而无需外部仪表放大器。

采用Σ-Δ的ADC,实现16位无误码的良好性能,片内可编程放大器可设置输入信号增益。

通过片内控制寄存器调整内部数字滤波器的关闭时间和更新速率,可设置数字滤波器的第一个凹口。

在+3V电源和1MHz主时钟时, AD7705功耗仅是1mW。

AD7705是基于微控制器(MCU)、数字信号处理器(DSP)系统的理想电路,能够进一步节省成本、缩小体积、减小系统的复杂性。

应用于微处理器(MCU)、数字信号处理(DSP)系统,手持式仪器,分布式数据采集系统。

2)3V/5V CMOS信号调节AD转换器:AD7714AD7714是一个完整的用于低频测量应用场合的模拟前端,用于直接从传感器接收小信号并输出串行数字量。

它使用Σ-Δ转换技术实现高达24位精度的代码而不会丢失。

输入信号加至位于模拟调制器前端的专用可编程增益放大器。

调制器的输出经片内数字滤波器进行处理。

数字滤波器的第一次陷波通过片内控制寄存器来编程,此寄存器可以调节滤波的截止时间和建立时间。

AD7714有3个差分模拟输入(也可以是5个伪差分模拟输入)和一个差分基准输入。

单电源工作(+3V或+5V)。

AD转换电路设计之高精度AD采集系统

AD转换电路设计之高精度AD采集系统
0.004
软件
0.001
VSY = ±13V LOAD = 100kΩ GAIN = +1
8V p-p INPUT
设置并测试
从ADI网站的AD7988-1产品页面下载10引脚PulSAR软件,
1V p-p INPUT
THD + NOISE (%)
并使用UG-340用户指南中的安装指南进行安装。其测量配 置的功能框图如图5所示。 将9 V壁式电源连接至评估板电源引脚。若要测量频率响应, 设备应按图5所示进行连接。将Audio Precision SYS-2522信号 发生器设置为1 kHz频率和5 V p-p正弦波,并具有2.5 V直流 漂移。使用评估板软件记录数据。软件分析是评估板软件
REF 3 IN+
VDD
VIO
AD7988-1
ADC
4
SDK 8 SDO 7 CNV 6 3-WIRE INTERFACE
11095-001
49.9Ω VSS = –2.5V
IN–
GND
5
图1. 使用AD8641低功耗放大器驱动AD7988-1 ADC的系统电路图(原理示意图:未显示所有连接)
Rev. A
图2. 使用AD8641放大器驱动AD7988-1的系统电路性能
Rev. A | Page 2 of 4
11095-002
CN-0306
图3显示系统总谐波失真(THD)以及信噪比(SNR)如何随着 输入频率超过~1 kHz而下降。这是由于放大器失真导致的, 可从图 4中的总谐波失真加噪声 (THD+N)与频率的关系曲 线看出。
性能结果
本电路的目的是在最高1 kHz的给定输入频率范围、100 kSPS 的采样速率情况下,以尽可能最低的ADC驱动器功耗水平 提供良好的交流性能。图2显示1 kHz输入信号下的电路性 能 FFT 图。信噪比 (SNR) 为 88.5 dB ,总谐波失真 (THD) 为 −103 dB。相比91 dB的规格,AD7988-1信噪比(SNR)下降的 主要原因是AD8641具有比ADA4841-1的2 nV/√Hz更高的噪 声,为28 nV/√Hz。总系统功耗为7.35 mW,其中:ADC为 0.7 mW,放大器为2 mW,基准电压源为4.65 mW。这说明 相对于ADA4841-1的12 mW,它可降低58%的功耗,总系统 功耗为17.35 mW。

AD1866资料

AD1866资料
Each DAC is equipped with a high performance output amplifier. These amplifiers achieve fast settling and high slew rate, producing ± 1 V signals at load currents up to ± 1 mA. The buffered output signal range is 1.5 V to 3.5 V. The 2.5 V reference voltages eliminate the need for “false ground” networks.
–35
85
–60
100
Specifications subject to change without notice. Specifications in boldface are tested on all production units at final electrical
Unit
Bits
V V µA µA MHz
The AD1866 operates on +5 V power supplies. The digital supply, VL, can be separated from the analog supply, VS, for reduced digital feedthrough. Separate analog and digital ground pins are also provided. In systems employing a single +5 volt power supply, VL and VS should be connected together. In battery operated systems, operation will continue even with reduced supply voltage. Typically, the AD1866 dissipates 50 mW.
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Low Noise, Precision, 16 V, CMOS,Rail-to-Rail Operational AmplifiersAD8663/AD8667/AD8669 Rev. AInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, M A 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.FEATURESLow offset voltage: 175 μV maximum @ V SY = 5 V Low supply current: 275 μA maximum per amplifier Single-supply operation: 5 V to 16 VLow noise: 23 nV/√HzLow input bias current: 300 fAUnity-gain stableSmall packages available3 mm × 3 mm, 8-lead LFCSP8-lead MSOPAPPLICATIONSSensor front endsTransimpedance a mpsElectrometer applicationsPhotodiode amplificationLow power ADC driversMedical diagnostic instrumentspH and ORP meters and probesDAC or REF buffersPIN CONFIGURATIONSNC–IN+INV–NC = NO CONNECT6742-1NC = NO CONNECT1NC2–IN3+IN4V–7V+8NC6OUT5NC6742-2 Figure 1. 8-Lead SOIC (R-8)Figure 2. 8-Lead LFCSP (CP-8-2)OUT A–IN A+IN AV–6742-3OUT A–IN A+IN AV+OUT D–IN D+IN DV–+IN B+IN C–IN B–IN COUT B OUT C6742-4Figure 3. 8-Lead MSOP (RM-8),8-Lead SOIC (R-8)Figure 4. 14-Lead SOIC (R-14)GENERAL DESCRIPTIONThe AD866x are rail-to-rail output amplifiers that use the Analog Devices, Inc., patented DigiTrim® trimming technique to achieve low offset voltage. The AD866x feature an extended operating range with supply voltages up to 16 V. They also feature low input bias current, low input offset voltage, and low current noise.The combination of low offset, very low input bias current, and a wide supply range makes these amplifiers useful in a wide variety of applications usually associated with higher priced JFET amplifiers. Systems using high impedance sensors, such as photodiodes, benefit from the combination of low input bias current, low noise, low offset, and wide bandwidth.The ability to operate the device for single (5 V to 16 V) or dual supplies (±2.5 V to ±8 V) supports many applications. The rail-to-rail outputs provide increased dynamic range to drive low frequency data converters. The low bias current drift is well suited for precision I-to-V converters. The combination of precision offset, offset drift, and low noise also make the op amps ideal for gain, dc offset adjust, and active filter in both instrumentation and medical applications. These low power op amps can be used in IR thermometers, pH and ORP instru-ments, pressure transducer front ends, and other sensor signal conditioning circuits that are used in remote or wireless applications.The AD8663/AD8667/AD8669 are specified over the extended industrial temperature range of −40°C to +125°C. The single AD8663 is available in a narrow 8-lead SOIC package and a very thin, 8-lead LFCSP. The dual AD8667 is available in a narrow 8-lead SOIC package and an 8-lead MSOP. The quad AD8669 is available in a 14-lead SOIC package.AD8663/AD8667/AD8669Rev. A | Page 2 of 16TABLE OF CONTENTSFeatures..............................................................................................1 Applications.......................................................................................1 Pin Configurations...........................................................................1 General Description.........................................................................1 Revision History...............................................................................2 Specifications.....................................................................................3 AD8663/AD8667/AD8669 Electrical Characteristics.............3 Absolute Maximum Ratings............................................................5 Thermal Resistance.......................................................................5 ESD Caution...................................................................................5 Typical Performance Characteristics..............................................6 Outline Dimensions.......................................................................13 Ordering Guide.. (15)REVISION HISTORY10/07—Rev. 0 to Rev. AAdded AD8667 and AD8669............................................Universal Changes to Features..........................................................................1 Changes to General Description....................................................1 Inserted Figure 3 and Figure 4........................................................1 Changes to Table 1, Power Supply Section....................................3 Changes to Table 2............................................................................4 Reformatted Typical Performance Characteristics Section........6 Changes to Figure 5..........................................................................6 Changes to Figure 13........................................................................7 Changes to Figure 17 and Figure 20...............................................8 Inserted Figure 35 Through Figure 39.........................................11 Inserted Figure 40 and Figure 41..................................................12 Updated Outline Dimensions.......................................................13 Changes to Ordering Guide. (15)7/07—Revision 0: Initial VersionAD8663/AD8667/AD8669Rev. A | Page 3 of 16SPECIFICATIONSAD8663/AD8667/AD8669 ELECTRICAL CHARACTERISTICSV SY = 5.0 V , V CM = V SY /2, T A = 25°C, unless otherwise noted. Table 1.Parameter Symbol Conditions M in Typ M ax Unit INPUT CHARACTERISTICS Offset Voltage V OS V CM = V SY /2 30 175 μV −40°C < T A < +125°C 450 μV Input Bias Current I B 0.3 pA −40°C < T A < +85°C 45 pA −40°C < T A < +125°C 105 pA Input Offset Current I OS 0.2 pA −40°C < T A < +85°C 35 pA −40°C < T A < +125°C 65 pA Input Voltage Range 0.2 3.0 V Common-Mode Rejection Ratio CMRR V CM = 0.2 V to 3.0 V 76 100 dB −40°C < T A < +125°C 76 100 dB Large Signal Voltage Gain A VO R L = 100 kΩ, V OUT = 0.5 V to 4.5 V 115 140 dB R L = 2 kΩ, V OUT = 0.5 V to 4.5 V 106 114 dB Offset Voltage Drift TCV OS −40°C < T A < +125°C 1.5 5 μV/°C OUTPUT CHARACTERISTICS Output Voltage High V OH I L = 100 μA 4.95 4.97 V −40°C < T A < +125°C 4.90 V Output Voltage High V OH I L = 1 mA 4.65 4.80 V −40°C < T A < +125°C 4.60 V Output Voltage Low V OL I L = 100 μA 17 25 mV −40°C < T A < +125°C 35 mV Output Voltage Low V OL I L = 1 mA 150 200 mV −40°C < T A < +125°C 250 mV Short-Circuit Current I SC ±7 mA Closed-Loop Output Impedance Z OUT f = 100 kHz, A V = 1 120 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR V SY = 5 V to 16 V 95 105 dB −40°C < T A < +125°C 95 dB Supply Current per Amplifier I SY V OUT = V SY /2 210 275 μA −40°C < T A < +125°C 325 μA DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 0.26 V/μs Gain Bandwidth Product GBP C L = 20 pF 520 kHz Phase Margin ΦM C L = 20 pF 60 Degrees NOISE PERFORMANCE Peak-to-Peak Noise e n p-p f = 0.1 Hz to 10 Hz 2.5 μV p-p Voltage Noise Density e n f = 1 kHz 23 nV/√Hz f = 10 kHz 21 nV/√Hz Current Noise Density i n f = 1 kHz 0.05 pA/√HzAD8663/AD8667/AD8669Rev. A | Page 4 of 16V SY = 16.0 V , V CM = V SY /2, T A = 25°C, unless otherwise noted. Table 2.Parameter Symbol Conditions M in Typ M ax Unit INPUT CHARACTERISTICS Offset Voltage V OS V CM = V SY /2 40 300 μV −40°C < T A < +125°C 500 μV Input Bias Current I B 0.3 pA −40°C < T A < +85°C 45 pA −40°C < T A < +125°C 120 pA Input Offset Current I OS 0.2 pA −40°C < T A < +85°C 35 pA −40°C < T A < +125°C 65 pA Input Voltage Range 0.2 14.5 V Common-Mode Rejection Ratio CMRR V CM = 0.2 V to 14.5 V 87 109 dB −40°C < T A < +125°C 87 109 dB Large Signal Voltage Gain A VO R L = 100 kΩ, V OUT = 0.5 V to 15.5 V 115 140 dB R L = 2 kΩ, V OUT = 0.5 V to 15.5 V 106 111 dB Offset Voltage Drift TCV OS −40°C < T A < +125°C 1.5 5 μV/°C OUTPUT CHARACTERISTICS Output Voltage High V OH I L = 100 μA 15.95 15.98 V −40°C < T A < +125°C 15.90 V Output Voltage High V OH I L = 1 mA 15.85 15.92 V −40°C < T A < +125°C 15.80 V Output Voltage Low V OL I L = 100 μA 17 25 mV −40°C < T A < +125°C 35 mV Output Voltage Low V OL I L = 1 mA 70 100 mV −40°C < T A < +125°C 125 mV Short-Circuit Current I SC ±50 mA Closed-Loop Output Impedance Z OUT f = 100 kHz, A V = 1 100 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR V SY = 5 V to 16 V 95 105 dB −40°C < T A < +125°C 95 dB Supply Current per Amplifier I SY V OUT = V SY /2 230 285 μA −40°C < T A < +125°C 355 μA DYNAMIC PERFORMANCE Slew Rate SR R L = 2 kΩ 0.3 V/μs Gain Bandwidth Product GBP C L = 20 pF 540 kHz Phase Margin ΦM C L = 20 pF 64 Degrees NOISE PERFORMANCE Peak-to-Peak Noise e n p-p f = 0.1 Hz to 10 Hz 2.5 μV p-p Voltage Noise Density e n f = 1 kHz 23 nV/√Hz f = 10 kHz 21 nV/√Hz Current Noise Density i n f = 1 kHz 0.05 pA/√HzAD8663/AD8667/AD8669Rev. A | Page 5 of 16ABSOLUTE MAXIMUM RATINGSTable 3.Parameter RatingSupply Voltage 18 VInput Voltage −0.1 V to V SYDifferential Input Voltage 18 VOutput Short-Circuit Duration to GND IndefiniteStorage Temperature Range −60°C to +150°COperating Temperature Range −40°C to +125°CJunction Temperature Range −65°C to +150°CLead Temperature, Soldering (60 sec) 300°CStresses above those listed under Absolute Maximum Ratingsmay cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.THERMAL RESISTANCEθJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 4. Thermal ResistancePackage Type θJA θJC Unit 8-Lead SOIC (R-8) 121 43 °C/W 8-Lead LFCSP (CP-8-2) 751 181°C/W 8-Lead MSOP (RM-8) 145 45 °C/W 14-Lead SOIC (R-14) 90 45 °C/W 1Exposed pad soldered to application board.ESD CAUTIONAD8663/AD8667/AD8669Rev. A | Page 6 of 16TYPICAL PERFORMANCE CHARACTERISTICS1600140012001000800600400200N U M B E R O F A M P L I F I E R S06742-005V OS (µV)Figure 5. Input Offset Voltage DistributionN U M B E R O F A M P L I F I E R STCV OS (µV)06742-006Figure 6. Offset Voltage Drift Distribution0 5.0V CM (V)V O S (µV )0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.506742-007Figure 7. Input Offset Voltage vs. Common-Mode VoltageN U M B E R O F S A M P L E S06742-037V OS (µV)Figure 8. Input Offset Voltage DistributionN U M B E R O F A M P L I T U D E S6742-038TCV OS (µV/°C)Figure 9. Offset Voltage Drift Distribution016V CM (V)V O S (µV )246810121406742-010Figure 10. Input Offset Voltage vs. Common-Mode VoltageAD8663/AD8667/AD8669Rev. A | Page 7 of 1610000.5 4.5V CM (V)I B (p A )1.0 1.52.0 2.53.0 3.54.08060402006742-013Figure 11. Input Bias Current vs. Common-Mode Voltage at 125°C100FREQUENCY (Hz)C M R R (d B )1k 10k 100k 1M 10M 06742-023Figure 12. CMRR vs. Frequency, V SY = 5 V 100000.00110LOAD CURRENT (mA)O U T P U T S A T U R A T I O N V O L T A G E (m V )0.010.11100100006742-011Figure 13. Output Swing Saturation Voltage vs. Load Current 1000.5V CM (V)I B (p A )2.5 4.5 6.58.510.512.514.580604020006742-016Figure 14. Input Bias Current vs. Common-Mode Voltage at 125°C100100FREQUENCY (Hz)C M R R (d B )1k 10k 100k 1M 10M908070605040302006742-039Figure 15. CMRR vs. Frequency, V SY = 16 V0.001100LOAD CURRENT (mA)O U T P U T S A T U R A T I O N V O L T A G E (m V )0.010.111006742-014Figure 16. Output Swing Saturation Voltage vs. Load CurrentAD8663/AD8667/AD8669Rev. A | Page 8 of 16350–40TEMPERATURE (°C)D R O P O U T V O L T A GE (m V )–25–10520355065809511012530025020015010050006742-044Figure 17. Output Voltage Saturation vs. Temperature10010M FREQUENCY (Hz)G A I N (d B ) A N D P H A S E (D e g r e e s )1k 10k 100k 1M06742-017Figure 18. Open-Loop Gain and Phase Shift vs. Frequency 60–4010010MFREQUENCY (Hz)A C L (dB )1k 10k 100k 1M4020–2006742-018Figure 19. Closed-Loop Gain vs. Frequency 140–40TEMPERATURE (°C)D R O P O U T V O L T A GE (m V )–25–10520355065809511012512010080604020006742-045Figure 20. Output Voltage Saturation vs. Temperature10010MFREQUENCY (Hz)G A I N (d B ) A N D P H A S E (D e g r e e s )1k 10k 100k 1M06742-020Figure 21. Open-Loop Gain and Phase Shift vs. Frequency60–4010010MFREQUENCY (Hz)A C L (dB )1k 10k 100k 1M 4020–2006742-021Figure 22. Closed-Loop Gain vs. Frequency, V SY = 16 VAD8663/AD8667/AD8669Rev. A | Page 9 of 161000100FREQUENCY (Hz)Z O U T (Ω)1k 10k 100k 1M 10M 1001010.106742-040Figure 23. Closed-Loop Output Impedance vs. Frequency, V SY = 5 V 100FREQUENCY (Hz)P S R R (d B )1k10k100k1M10M9080706050403020100–10–2006742-024Figure 24. PSRR vs. Frequency, V SY = 5 V 10CAPACITANCE (pF)O V E R S H O O T (%)1001k 8070605040302010006742-025Figure 25. Small-Signal Overshoot vs. Load Capacitance, V SY = 5 V100FREQUENCY (Hz)Z O U T (Ω)1k 10k 100k 1M 10M06742-041Figure 26. Closed-Loop Output Impedance vs. Frequency, V SY = 16 V100FREQUENCY (Hz)P S R R (d B )1k10k100k1M10M9080706050403020100–10–2006742-027Figure 27. PSRR vs. Frequency, V SY= 16 V10CAPACITANCE (pF)O V E R S H O O T (%)1001k8070605040302010006742-028Figure 28. Small-Signal Overshoot vs. Load Capacitance, V SY = 16 VAD8663/AD8667/AD8669Rev. A | Page 10 of 1606742-029TIME (10µs/DIV)V O L T A G E (200m V /D I V )Figure 29. Large Signal Transient Response, V SY = ±2.5 V 06742-03TIME (2µs/DIV)V O L T A G E (50m V /D I V)Figure 30. Small Signal Transient Response, V SY = ±2.5 V 3000V SY (V)I S Y (µA )24681012141625020015010050006742-042Figure 31. Supply Current vs. Supply Voltage AD8663 06742-032TIME (20µs/DIV)V O L T A G E (2V /D I V)Figure 32. Large Signal Transient Response, V SY = ±8 V06742-033TIME (2µs/DIV)VO L T A G E (50m V /D I V )Figure 33. Small Signal Transient Response, V SY = ±8 V12000V SY (V)I S Y (µA )246810121416100080060040020006742-043Figure 34. Supply Current vs. Supply Voltage AD8669AD8663/AD8667/AD8669+125°C –40°C+25°C +85°C 055050045040050100150200250300350600I S Y (µA )0246810121416V SY (V)06742-031Figure 35. Supply Current vs. Supply Voltage AD8667 06742-049TIME (20µs/DIV)I N P U T V O L T A G E (50m V /D I V )O U T P U T V O L T A G E (1V /D I V )Figure 36. Positive Overload Recovery 06742-050TIME (20µs/DIV)I N P U T V O L T A G E (50m V /D I V )O U T P U T V O L TA G E (1V /D I V )–0.05–0.10–0.15–0.20–0.25–0.30–0.35Figure 37. Negative Overload Recovery 10001110000FREQUENCY (Hz)e N (n H z )1010010001010006742-034Figure 38. Voltage Noise Density06742-046TIME (20µs/DIV)I N P U T V O L T A G E (50m V /D I V )O U T P U T V O L T A G E (5V /D I V )0.150.100.05–0.05–0.10–0.15–0.20–0.25Figure 39. Positive Overload Recovery06742-048TIME (20µs/DIV)I N P U T V O L T A G E (50m V /D I V )O U T P U T V O L T A G E (5V /D I V )0.05–0.05–0.10–0.15–0.20–0.25–0.30–0.35Figure 40. Negative Overload RecoveryAD8663/AD8667/AD866906742-051–20–40–60–80–100–120–140–160C H A N N E L S E P A R A T I O N (d B )1001k10k 100k FREQUENCY (Hz)06742-047C H A N N E L S E P A R A T I O N (d B )1001k10k 100kFREQUENCY (Hz)Figure 41. Channel Separation vs. Frequency Figure 42. Channel Separation vs. FrequencyAD8663/AD8667/AD8669OUTLINE DIMENSIONSCONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.COMPLIANT TO JEDEC STANDARDS MS-012-AA012407-A0.17 (0.0067)Figure 43. 8-Lead Small Outline Package [SOIC_N]Narrow Body(R-8)Dimensions shown in millimeters and (inches)061507-B0.90 MAXFigure 44. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]3 mm × 3 mm Body, Very Thin, Dual Lead(CP-8-2)Dimensions shown in millimetersAD8663/AD8667/AD8669COMPLIANT TO JEDEC STANDARDS MO-187-AAPLANE0.10Figure 45. 8-Lead Mini Small Outline Package [MSOP](RM-8)Dimensions shown in millimetersCONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES)ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.COMPLIANT TO JEDEC STANDARDS MS-012-AB060606-AFigure 46. 14-Lead Small Outline Package [SOIC_N]Narrow Body (R-14)Dimensions shown in millimetersAD8663/AD8667/AD8669 ORDERING GUIDEModel Temperature Range Package Description Package Option BrandingAD8663ARZ1−40°C to +125°C 8-Lead SOIC_N R-8AD8663ARZ-REEL1−40°C to +125°C 8-Lead SOIC_N R-8AD8663ARZ-REEL71−40°C to +125°C 8-Lead SOIC_N R-8AD8663ACPZ-R21−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A1UAD8663ACPZ-REEL1−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A1UAD8663ACPZ-REEL71−40°C to +125°C 8-Lead LFCSP_VD CP-8-2 A1UAD8667ARZ1−40°C to +125°C 8-Lead MSOP R-8AD8667ARZ-REEL1−40°C to +125°C 8-Lead MSOP R-8AD8667ARZ-REEL71−40°C to +125°C 8-Lead MSOP R-8AD8667ARMZ-R21−40°C to +125°C 8-Lead MSOP RM-8 A1EAD8667ARMZ-REEL1−40°C to +125°C 8-Lead MSOP RM-8 A1EAD8669ARZ1−40°C to +125°C 14-Lead SOIC_N R-14AD8669ARZ-REEL1−40°C to +125°C 14-Lead SOIC_N R-14AD8669ARZ-REEL71−40°C to +125°C 14-Lead SOIC_N R-141 Z = RoHS Compliant Part.AD8663/AD8667/AD8669 NOTES©2007 Analog Devices, Inc. All rights reserved. Trademarks andregistered trademarks are the property of their respective owners.D06742-0-10/07(A)。

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