3360P测试机测试程式开发讲义

C O M PA R E LOW
CTG
PM U PPM U
PDCL RELAY IO L
VOH
VREF
IO H
VOL
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動態負載原理圖
Vref>Vo of DUT
Vref<Vo of DUT
Vref=Vo of DUT Or DUT is open
Iol
Iol
Iol
Vref
DUT Vref
DUT Vref
Ioh
Ioh
Ioh
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}
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DEC的格式3 - UR_PIN_GROUP
用途:宣告繼電器控制管腳群組名 UR_PIN_GROUP {
ur_pin_group_name = ur_pin_name operand ur_pin_name operand …; . .
測試程序檔案架構2
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圖形/主程序-編譯
Source program (XXXXXX.pat)
Compiling
Object program (XXXXXX.ppo)
IO FORMAT
IO_NRZ IO_RO IO_RZ
IO_O ION_O
FF
M DATA C DATA
CTG
PIN DRIVE R
ACTIV E LOAD
OUTPUT FORMAT EDGE
OW
MASK/ENABL E
COMPARATO R
Z DATA
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FORMAT GENERATOR
RESPONSE ANALYZER
LEVEL REFERENCE
PARAMETRIC MEASUREMENT UNIT ( PMU )
DEVICE POWER SUPPLY ( DPS ) PRECISION VOLTAGE REFERENCE (
PREF )
PPMU
宣告本圖形檔使用的管腳定義檔dec指定圖形的管腳順序
3360P测试机测试程式开发讲义
致力創新 追求卓越
CHROMA VLSI Test System 系統架構介紹
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參考電壓原理
level ref: Per-pin level : Vil, Vih, Vol, Voh, Iol, Ioh, Vref. Pin level : Cll (clamp low level),Clh (clamp high level).
Level Set 1: VIL,VIH,VOL,VOH, IOL,IOH,VCl, VCH Level Set 2: VIL,VIH,VOL,VOH, IOL,IOH,VCl, VCH Level Set 3: VIL,VIH,VOL,VOH, IOL,IOH,VCl, VCH
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管腳定義檔 (.DEC) DEC檔用途:宣告器件的管腳與測試資源的對映關係
PIN_LIST:
Define the relationship between test pin and DUT pin
PIN_GROUP: Be used to define groups of I/O pins.
LCD_PIN_GROUD: Be used to define groups of LCD pins.
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PIN_LIST 範例
PIN_LIST ( name ) {
pin_name = ate_pin [:ate_pin] = dut_pin = pin_type ; . . pin_name = ate_pin [:ate_pin] = dut_pin = pin_type ; }
PIN_LIST ( ft_package ) {
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數字通道方塊圖
IN PU T WAV E F O R M =F-D ATA +DTG/SBCM K +IN PU T FO R M AT
V IH CLH
IO WAV EFO R M =D -D ATA + IO T G +IO FO R M AT
RESPONSE RECORDER:
CLL V IL
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致力創新 追求卓越
CHROMA VLSI Test System 測試程序
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. . pin_group_name = pin_name operand pin_name operand…; } 範例:
PIN_GROUP { DD= D1+D2+D3+D4+D5+D6+D7+D8; QQ= Q1+Q2+Q3+Q4+Q5+Q6+Q7+Q8; INP= LE+OC+DD; OUTP= QQ; All_pins = LE+OC+DD+QQ;
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DEC的格式2- PIN_GROUP
用途:定義管腳群組名 PIN_GROUP {
pin_group_name = pin_name operand pin_name operand …; pin_group_name = pin_group_name operand pin_name operand…;
0: D R IV E O FF 1: D R IV E O N
C O M PA R E H IG H
P IN FA IL M E M O RY, D ATA LO G PR O C ESSO R
M A SK /EN A BLE, ED G E/W IN D O W
M -D ATA Z-D ATA F-D ATA
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DEC的格式4 - POWER_PIN_GROUP
用途:宣告電源管腳群組名稱 POWER_PIN_GROUP {
ps_pin_group_name = ps_pin_name operand ps_pin_name operand …; . .
ps_pin_group_name = ps_pin_name operand ps_pin_name operand…; } 範例:
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測試程序檔案架構1
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DEC檔的格式1-PIN_LIST
PIN_LIST (defined name){ pin_name = ate_pin [:ate_pin] = dut_pin = pin_type … pin_name = ate_pin [:ate_pin] = dut_pin = pin_type }
UR_PIN_GROUP : Be used to define groups of user relay.
POWER_PIN_GROUP : Be used to define groups of power pin.
TIME_NAME_DE: Specify a name to represent timing name.
Source program (XXXXXX.pln)
Compiling
Object program (XXXXXX.pin)
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12
編譯工具 –使用Make Wizard
14
測試數字器件的要件
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15
直流參數 DC 功能參數 Function 交流參數 AC
數字信號構成要素
(Vo lta g e )
Logical Characteristic (Functional Testing)
…………… ……………
Level Set 240: VIL,VIH,VOL,VOH, IOL,IOH,VCl, VCH
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MUX
VCL VIH VCH VIL VOH
2
測試系統方塊圖
TEST HEAD HIGH-SPEED CONTROLLER
DEVICE UNDER TEST
LOW-SPEED CONTROLLER COMPUTER / WORK STATION
TIMING GENERATOR
LOCAL MEMORY
ALGORITHM IC
PATTERN GENERATOR
ur_pin_group_name = ur_pin_name operand ur_pin_name operand…; } 範例:
UR_PIN_GROUP { UR_RC_PINS= UR_PIN0+UR_PIN10;
}
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pin_type:管腳種類
IN OUT IO DPS PREF LCD UR GND
輸入腳. 輸出腳. 雙向腳. 電源腳,使用DPS供電. 電源腳,使用PREF供電. 高壓輸出腳. 繼電器控制腳,系統提供 接地腳.
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3
高速功能方塊圖
F DATA DTG
D DATA IOTG
RESPONSOE RECORDER
INPUT FORMAT
NRZ DNRZ
RZ RO
SBC F0 F1 FCLK
T1
T2
Tim e Characteristic (A C Testing)
Higher Level Lower Level
Voltage C haracteristic (D C Testing)
(Tim e)
Fig 1-1-1
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VOL Pin Electronics
7
LCD PE card高壓數字比較通道原理
LV
ALD
HV
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致力創新 追求卓越
CHROMA VLSI Test System 測試程序架構
SYNC LE OC D1 Q7 Q8 Vcc Gnd }
=1 = 2 = IN ; =9 = 11 = IN ; =25 = 1 = IN ; =26 = 3 = IN ; =23 = 16 = OUT ; =20 = 19 = OUT ; = 0 = 20 = DPS ; = = 10 = GND ;