TP6911 datasheet 十速科技 USB声卡芯片
LTC6910-1中文资料
126910123faTotal Supply Voltage (V+ to V–)............................. 11V Input Current ..................................................... ±25mA Operating Temperature Range (Note 2)LTC6910-1C, -2C, -3C........................–40°C to 85°C LTC6910-1I, -2I, -3I ...........................–40°C to 85°C LTC6910-1H, -2H, -3H .................... –40°C to 125°C Specified Temperature Range (Note 3)LTC6910-1C, -2C, -3C........................–40°C to 85°C LTC6910-1I, -2I, -3I ...........................–40°C to 85°C LTC6910-1H, -2H, -3H .................... –40°C to 125°C Storage Temperature Range.................–65°C to 150°C Lead Temperature (Soldering, 10 sec)..................300°CORDER PART NUMBERT JMAX = 150°C, θJA = 230°C/WLTC6910-1CTS8LTC6910-1ITS8LTC6910-1HTS8LTC6910-2CTS8LTC6910-2ITS8LTC6910-2HTS8LTC6910-3CTS8LTC6910-3ITS8LTC6910-3HTS8(Note 1)TS8 PART MARKING*LTB5 (6910-1)LTACQ (6910-2)LTACS (6910-3)ABSOLUTE AXI U RATI GSWW WU PACKAGE/ORDER I FOR ATIOU U WConsult LTC Marketing for parts specified with wider operating temperature ranges.*The temperature grades are identified by a label on the shipping container.OUT 1AGND 2IN 3V – 48 V +7 G26 G15 G0TOP VIEWTS8 PACKAGE8-LEAD PLASTIC TSOT-23Table 1. LTC6910-1NOMINALNOMINAL NOMINAL LINEAR INPUT RANGE (V P-P )INPUT VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE G2G1G0Volts/Volt (dB)Supply Supply Supply(k Ω)0000–1201053(Open)001–10105310010–265 2.5 1.55011–514210.62100–102010.50.31101–20260.50.250.151110–50340.20.10.061111–100400.10.050.031GAI SETTI GS A D PROPERTIESU UU36910123faTable 2. LTC6910-2NOMINALNOMINAL NOMINAL LINEAR INPUT RANGE (V P-P )INPUT VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE G2G1G0Volts/Volt (dB)Supply Supply Supply(k Ω)0000–1201053(Open)001–10105310010–265 2.5 1.55011–412 2.5 1.250.75 2.5100–818.1 1.250.6250.375 1.25101–1624.10.6250.3130.188 1.25110–3230.10.3130.1560.094 1.25111–6436.10.1560.0780.0471.25GAI SETTI GS A D PROPERTIESU U UTable 3. LTC6910-3NOMINALNOMINAL NOMINAL LINEAR INPUT RANGE (V P-P )INPUT VOLTAGE GAIN Dual 5V Single 5V Single 3V IMPEDANCE G2G1G0Volts/Volt (dB)Supply Supply Supply(k Ω)0000–1201053(Open)001–10105310010–265 2.5 1.55011–39.5 3.33 1.671 3.3100–412 2.5 1.250.75 2.5101–514210.62110–615.6 1.670.830.5 1.7111–716.9 1.430.710.431.445678910V –, V + (Pins 4, 8): Power Supply Pins. The V + and V – pins should be bypassed with 0.1µF capacitors to an adequate analog ground plane using the shortest possible wiring.Electrically clean supplies and a low impedance ground are important for the high dynamic range available from the LTC6910-X (see further details under AGND). Low noise linear power supplies are recommended. Switching power supplies require special care to prevent switching noise coupling into the signal path, reducing dynamic range.G0, G1, G2 (Pins 5, 6, 7): CMOS-Level Digital Gain-Control Inputs. G2 is the most significant bit (MSB). These pins control the voltage gain from IN to OUT pins (seeU U UPI FU CTIO STable 1, Table 2 and Table 3). Digital input code 000 causes a “zero” gain with very low output noise. In this “zero” gain state the IN pin is disconnected internally, but the OUT pin remains active and forced by the internal op amp to the voltage present on the AGND pin. Note that the voltage gain from IN to OUT is inverting: OUT and IN pins always swing on opposite sides of the AGND potential. The G pins are high impedance CMOS logic inputs and must be connected (they will float to unpredictable voltages if open circuited). No speed limitation is associated with the digital logic because it is memoryless and much faster than the analog signal path.6910123faFunctional DescriptionThe LTC6910 family are small outline, wideband inverting DC amplifiers whose voltage gain is digitally program-mable. Each delivers a choice of eight voltage gains,controlled by the 3-bit digital inputs to the G pins, which accept CMOS logic levels. The gain code is always mono-tonic; an increase in the 3-bit binary number (G2 G1 G0)causes an increase in the gain. Table 1, Table 2 and Table␣3list the nominal voltage gains for LTC6910-1, LTC6910-2and LTC6910-3 respectively. Gain control within each amplifier occurs by switching resistors from a matched array in or out of a closed-loop op amp circuit using MOS analog switches (Figure 4). Bandwidth depends on gain setting. Curves in the Typical Performance Characteristics section show measured frequency responses.Digital ControlLogic levels for the LTC6910-X digital gain control inputs (Pins 5, 6, 7) are nominally rail-to-rail CMOS. Logic 1 is V +,logic 0 is V – or alternatively 0V when using ±5V supplies.The part is tested with the values listed in the Electrical Characteristics table (Digital Input “High” and “Low” Volt-ages), which are 10% and 90% of full excursion on the inputs. That is, the tested logic levels are 0.27V and 2.43V with a 2.7V supply, 0.5V and 4.5V levels with 0V and 5V supply rails, and 0.5V and 4.5V logic levels at ±5V sup-plies. Do not attempt to drive the digital inputs with TTL logic levels (such as HCT or LS logic), which normally do not swing near +5V. TTL sources should be adapted with CMOS drivers or suitable pull-up resistors to 5V so that they will swing to the positive rail.Timing ConstraintsSettling time in the CMOS gain-control logic is typically several nanoseconds and faster than the analog signal path. When amplifier gain changes, the limiting timing is analog, not digital, because the effects of digital input changes are observed only through the analog output (Figure 4). The LTC6910-X’s logic is static (not latched)and therefore lacks bus timing requirements. However, as with any programmable-gain amplifier, each gain change causes an output transient as the amplifier’s output moves,with finite speed, toward a differently scaled version of the input signal. Varying the gain faster than the output can settle produces a garbled output signal. The LTC6910-X analog path settles with a characteristic time constant or time scale, τ, that is roughly the standard value for a first order band limited response:τ = 1 / (2 π f -3dB ),where f -3dB is the –3dB bandwidth of the amplifier. For example, when the upper –3dB frequency is 1MHz, τ is about 160ns. The bandwidth, and therefore τ, varies with gain (see Frequency Response and –3dB Bandwidth curves in Typical Performance Characteristics). After a gain change it is the new gain value that determines the settling time constant. Exact settling timing depends on the gain change,the input signal and the possibility of slew limiting at the output. However as a basic guideline, the range of τ is 20ns to 1400ns for the LTC6910-1, 20ns to 900ns for the LTC6910-2 and 20ns to 120ns for the LTC6910-3. These numbers correspond to the ranges of –3dB Bandwidth in the plots of that title under Typical Performance Character-istics.Offset Voltage vs Gain SettingThe electrical tables list DC offset (error) voltage at the inputs of the internal op-amp in Figure 4, V OS(OA), which is the source of DC offsets in the LTC6910-X. The tables also show the resulting, gain dependent offset voltage referred to the IN pin, V OS(IN). These two measures are related through the feedback/input resistor ratio, which equals the nominal gain-magnitude setting, G:V OS(IN) = (1 + 1/G) V OS(OA)Offset voltages at any gain setting can be inferred from this relationship. For example, an internal offset V OS(OA) of 1mV will appear referred to the IN pin as 2mV at a gain setting G of 1, or 1.5mV at a gain setting of 2. At high gains,V OS(IN) approaches V OS(OA). (Offset voltage can be of either polarity; it is a statistical parameter centered on zero.) The MOS input circuitry of the internal op amp in Figure 4 draws negligible input currents (unlike some op amps), so only V OS(OA) and G affect the overall amplifier’s offset.APPLICATIO S I FOR ATIOW UUU6910123faAnalog Input and DC LevelsAs described in Tables 1, 2 and 3 and under Pin Functions,the IN pin presents a variable input resistance returned internally to a potential equal to that at the AGND pin (within a small offset-voltage error). This input resistance varies with digital gain setting, becoming infinite (open circuit) at “zero” gain (digital input 000), and as low as 1k Ωat high gain settings. It is important to allow for this input-resistance variation with gain, when driving the LTC6910-X from other circuitry. Also, as the gain in-creases above unity, the DC linear input-voltage range (corresponding to rail-to-rail swing at the OUT pin) shrinks toward the AGND potential. The output swings positive or negative around the AGND potential (in the opposite direction from the input, because the gain is inverting).AC-Coupled OperationAdding a capacitor in series with the IN pin makes the LTC6910-X into an AC-coupled amplifier, suppressing the source’s DC level (and even minimizing the offset voltage from the LTC6910-X itself). No further components are required because the input of the LTC6910-X biases itself correctly when a series capacitor is added. The IN pin connects to an internal variable resistor (and floats when DC open-circuited to a well defined voltage equal to the AGND input voltage at nonzero gain settings). The value of this internal input resistor varies with gain setting over a total range of about 1k to 10k, depending on version (the rightmost columns of Table 1, Table 2 and Table 3).Therefore, with a series input capacitor the low frequency cutoff will also vary with gain. For example, for a low frequency corner of 1kHz or lower, use a series capacitor of 0.16µF or larger. A 0.16µF capacitor has a reactance of 1k Ω at 1kHz, giving a 1kHz lower –3dB frequency for gain settings of 10V/V through 100V/V in the LTC6910-1. If the LTC6910-1 is operated at lower gain settings with an 0.16µF input capacitor, the higher input resistance will reduce the lower corner frequency down to 100Hz at a gain setting of 1V/V. These frequencies scale inversely with the value of the input capacitor.Note that operating the LTC6910-X in zero gain mode (digital inputs 000) open circuits the IN pin and thisdemands some care if employed with a series input capacitor. When the chip enters the zero gain mode, the opened IN pin tends to freeze the voltage across the capacitor to the value it held just before the zero gain state.This can place the IN pin at or near the DC potential of a supply rail (the IN pin may also drift to a supply potential in this state due to small junction leakage currents). To prevent driving the IN pin outside the supply limit and potentially damaging the chip, avoid AC input signals in the zero gain state with a series capacitor. Also, switching later to a nonzero gain value will cause a transient pulse at the output of the LTC6910-X (with a time constant set by the capacitor value and the new LTC6910-X input resis-tance value). This occurs because the IN pin returns to the AGND potential and transient current flows to charge the capacitor to a new DC drop.SNR and Dynamic RangeThe term “dynamic range” is much used (and abused)with signal paths. Signal-to-noise ratio (SNR) is an unam-biguous comparison of signal and noise levels, measured in the same way and under the same operating conditions.In a variable gain amplifier, however, further characteriza-tion is useful because both noise and maximum signal level in the amplifier will vary with the gain setting, in general. In the LTC6910-X, maximum output signal is independent of gain (and is near the full power supply voltage, as detailed in the Swing sections of the Electrical Characteristics table). The maximum input level falls with increasing gain, and the input-referred noise falls as well (as listed also in the table). To summarize the useful signal range in such an amplifier, we define Dynamic Range (DR)as the ratio of maximum input (at unity gain) to minimum input-referred noise (at maximum gain). (These two num-bers are measured commensurately, in RMS Volts.For deterministic signals such as sinusoids, 1V RMS =2.828V P-P .) This DR has a physical interpretation as the range of signal levels that will experience an SNR above unity V/V or 0dB. At a 10V total power supply, DR in the LTC6910-1 (gains 0V to 100V/V) is typically 120dB (the ratio of a nominal 9.9V P-P , or 3.5V RMS , maximum input to the 3.4µV RMS high gain input noise). The corresponding DR for the LTC6910-2 (gains 0V to 64V) is also 120dB; forAPPLICATIO S I FOR ATIOW UUU212223Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.24Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 q FAX: (408) 434-0507 q © LINEAR TECHNOLOGY CORPORA TION 2002LT/TP 0404 1K REV A • PRINTED IN USA。
TP-LINK EW-7811Un V2 N150 高效能隱形USB無線網路卡安裝指南说明书
EW-7811Un V2N150高效能隱形USB無線網路卡I.產品資訊 (1)I-1. 包裝內容 (1)I-2. LED指示燈 (1)I-3. 系統需求 (1)I-4. 安裝注意事項 (2)II.安裝 (2)III.Windows用戶 (3)III-1. 安裝驅動程式 (3)III-2. 移除驅動程式 (5)IV.Mac OS用戶 (6)IV-1. 安裝驅動程式 (6)IV-2. 移除驅動程式 (6)V.停用其它網路卡 (11)V-1. Windows 7用戶 (11)V-2. Windows 8.1/10 用戶 (11)V-3. Mac用戶 (12)VI.使用本網路卡 (12)VI-1. Windows用戶 (13)VI-2. Mac: 連線至Wi-Fi網路 (14)I.產品資訊I-1. 包裝內容EW-7811Un V2 安裝指南I-2. LED指示燈I-3. 系統需求-Windows 7/8/8.1/10, macOS 10.13-USB 2.0接埠-硬碟: 100MBI-4. 安裝注意事項為確保您及本產品操作使用上的安全,請務必詳讀及遵照以下說明指示。
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Richtek RT9116 10W Class-D Stereo Speaker Driver A
RT9116®©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Ordering InformationNote :Richtek products are :❝ RoHS compliant and compatible with the current require-ments of IPC/JEDEC J-STD-020.❝ Suitable for use in SnPb or Pb-free soldering processes.Pin Configuration(TOP VIEW)WQFN-28L 4x510W Stereo Class-D Speaker Driver AmplifierGeneral DescriptionThe RT9116 is a 10W per channel, high efficiency Class D stereo audio amplifier for driving bridge tied load (BTL)speakers. The RT9116 can drive stereo speakers with load as low as 4Ω. Its high efficiency eliminates the need for an extra heat sink when playing music. The gain of the amplifier can be controlled by gain select pins. The outputs are fully protected against shorts to GND, PVCC, and output to output with an auto recovery feature and monitored output.The RT9116 is available in the WQFN-28L 4x5 package.Features●8V to 17V Input Supply Range❝ 10W / CH for an 8Ω Load, 13V Supply at 10%THD +N❝ 15W / CH for an 8Ω Load, 16V Supply at 10%THD +N❝ 90% Efficiency Eliminates Need for Heat Sink ●DC Detect Protection ●Filter-Less Operation●Over-Temperature Protection (OTP) with Auto Recovery Option●Surface Mount 28-Lead WQFN PackageApplications●LCD-TV ●Monitors ●Home Audio●Amusement Equipment●Electronic Music EquipmentG : Green (Halogen Free and Pb Free)0J= : Product CodeYMDNN : Date CodeBSTNL PVDDR VOUTNR BSTNR VOUTPRVOUTPL VOUTNL PVDDL L I M I T S T P LA I N N R _C T R L V C C N CB S T P RG V D D 2A V S SN C A V S SRT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Typical Application CircuitNote :RT9116Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.RT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Functional Block DiagramOUTPLOUTNL OUTPROUTNRBSTPLBSTNLBSTPR BSTNRPVDDL PVDDR AVSS PVSSOperationThe RT9116 is a dual-channel 2 x 10W efficient, Class D audio power amplifier for driving bridge-tied stereo speakers. The RT9116 uses the three-level modulation (BD model) scheme that allows operation without external LC reconstruction when the amplifier is driving an inductive load.Moreover, the built-in spread spectrum modulation can efficiently reduce EMI and save the cost of the external inductor, replaced by ferrite beads.A closed-loop modulator, which enables negative error feedback, can improve THD+N and PSRR of output signals.The RT9116 offers two selectable power limit thresholds,5W/10W under 8Ω for protecting load speakers.These two limit thresholds can be set easily by connecting two different resistors, 25k Ω/150k Ω, from the PLIMIT pin to ground.Though there is no requirement for power limit, theresistance connected from the PLIMIT pin to ground must be greater than 500k Ω.The RT9116 features over-current protection against output stage short-circuit conditions.When a short-circuit condition occurs, amplifier outputs will be switched to a Hi-Z state, and the short-circuit protection latch will be triggered. Once the short-circuit condition is removed, the RT9116 will be automatically recovered.The RT9116 can drive stereo speakers as low as 4Ω. The high efficiency of the RT9116, 90%, eliminates the need for an external heat sink when playing music.RT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Electrical CharacteristicsAbsolute Maximum Ratings (Note 1)●Supply Voltage, PVDDL, PVDDR, AVCC ----------------------------------------------------------------- −0.3V to 21V●Input Voltage, EN, GAIN -------------------------------------------------------------------------------------- −0.3V to (PVDDx + 0.3V)●Output Voltage, OUTPL,OUTPR,OUTNL,OUTNR ------------------------------------------------------- −0.3V to (PVDDx + 0.3V)●Bootstrap Voltage, BSTPL,BSTPR,BSTNL,BSTNR ----------------------------------------------------−0.3V to (PVDDx + 6V)●Other Pins--------------------------------------------------------------------------------------------------------−0.3V to (GVDD + 0.3V)●Power Dissipation, P D @ T A = 25°CWQFN-28L 4x5------------------------------------------------------------------------------------------------- 3.64W ●Package Thermal Resistance (Note 2)WQFN-28L 4x5, θJA -------------------------------------------------------------------------------------------- 27.4°C/W WQFN-28L 4x5, θJC ------------------------------------------------------------------------------------------- 2°C/W ●Lead Temperature (Soldering, 10 sec.)-------------------------------------------------------------------- 260°C ●Junction T emperature ------------------------------------------------------------------------------------------ 150°C●Storage T emperature Range --------------------------------------------------------------------------------- −65°C to 150°C ●ESD Susceptibility (Note 3)HBM (Human Body Model)----------------------------------------------------------------------------------- 2kVRecommended Operating Conditions (Note 4)●Supply Input Voltage, PVDDL, PVDDR, AVCC ---------------------------------------------------------- 8V to 17V ●Min. SPK load in BTL mode, Rspk (BTL)---------------------------------------------------------------- 4Ω●Junction T emperature Range --------------------------------------------------------------------------------- −40°C to 125°C ●Ambient T emperature Range --------------------------------------------------------------------------------- −40°C to 85°CRT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These arestress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.Note 2. θJA is measured under natural convection (still air) at T A = 25°C with the component mounted on a high effective-thermal-conductivity four-layer test board on a JEDEC 51-7 thermal measurement standard. θJC is measured at the exposed pad of the package.Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.RT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Output Power vs. Supply Voltage0.02.55.07.510.012.515.017.520.022.525.067891011121314151617181920Supply Voltage (V)O u t p u t P o w e r (W )Efficiency vs. Output Power0102030405060708090100012345678910Output Power (W)E f f i c i e n c y (%)Typical Operating CharacteristicsPVCC = 12V, R L = 8Ω, Gain = 26dBPVCC = 12V, RL = 8Ω, Gain = 26dB1kHz 20Hz 10kHz0.5W 2.5W 5WFrequency (Hz)0-10-20-30-40-50-60-70-80-90-100PVCC = 12V, R L = 8Ω, Gain = 26dB, Po = 1WC r o s s t a l k (d B )20 50 100 200 500 1k 2k 5k 10k 20k R to L L to RFrequency (Hz)40383634323028262422201816141210PVCC = 12V, R L = 8Ω, Gain = 26dB, Po = 1Wd B V (d B )20 50 100 200 500 1k 2k 5k 10k 20kRT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Application InformationGVDD SupplyThe GVDD is used to supply the Gate Drivers for the output full bridge transistors. Connect a 1μF capacitor from this pin to ground for good bypass. The typical GVDD output voltage is 5V.Amplifier Gain SettingThe gain of the RT9116 amplifier can be set by one input terminals, GAIN shown as Table 1.The gain setting is realized by changing the taps on the input resistors and feedback resistors inside the amplifier.This causes the input impedance (ZI) to be dependent on the gain setting. The actual gain settings are controlled by the ratios of the resistors, so the gain variation from part-to-part is small. However, the input impedance from part-to-part at the same gain may shift by ±20% due to shifts in the actual resistance of the input resistors.Table 1. Gain SettingEN OperationThe RT9116 employs a shutdown mode operation designed to reduce supply current (ICC) to the absolute minimum level for power saving. The EN input terminal should be held high (see specification table for trip point) in normal operation. Pulling EN low causes the outputs to mute and the amplifier to enter a low current state. Leaving EN floating will cause the amplifier operation to be unpredictable. Never leave EN pin unconnected. For the best power-off pop performance, turn off the amplifier in the shutdown mode prior to removing the power supply voltage.Over-Current Protection (OCP)The RT9116 provides OCP function to prevent the device from damages during overload or short-circuit conditions.The current are detected by an internal sensing circuit.Once overload happens, the OCP function is designed to operate in auto-recovery mode.DC Detect ProtectionRT9116 has circuitry which will protect the speakers from DC current which might occur due to defective capacitors on the input or shorts on the printed circuit board at the inputs. To clear the DC Detect it is necessary to cycle the PVCC supply.ADC Detect Fault is issued when the output differential duty-cycle of either channel exceeds 18% (for example,+59%, −41%) for more than 290 msec at the same polarity.This feature protects the speaker from large DC currents or AC currents less than 4Hz. To avoid nuisance faultsdue to the DC detect circuit, hold the SD pin low at power-up until the signals at the inputs are stable. Also, take care to match the impedance seen at the positive andnegative inputs to avoid nuisance DC detect faults.Under-Voltage Protection (UVP)The RT9116 monitors the voltage on PVDD voltage threshold. When the voltage on PVDDL and PVDDR pin falls below the under voltage threshold, 7V (typ.), the UVP circuit turns off the output immediately and operates in cycle by cycle auto-recovery mode.Over-Voltage Protection (OVP)The RT9116 monitors the voltage on PVDD voltage threshold. When the voltage on PVDDL and PVDDR pin rise behind the over voltage threshold, 15V (typ.), the OVP circuit turns off the output immediately and operates in cycle by cycle auto-recovery mode.Over-Temperature Protection (OTP)The OTP prevents damage to the device when the internal die temperature exceeds 170°C. There is a ±15°C tolerance on this trip point from device to device. Once the die temperature exceeds the OTP threshold, the device entersRT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.into the shutdown state and the outputs are disabled. This is not a latched fault. The thermal fault is cleared once the temperature of the die is reduced by 15°C. The device begins normal operation at this point with no external system interaction.Power-On/Off SequenceUse the following sequence to power on the device❝PVCC power supply ready.Past EN = 1 (EN pin goes high)Figure 1. Power On SequenceFigure 2. Power Off SequenceUse the following sequence to power off the device ❝EN = 0 (EN pin goes Low) Past PVCC power supply shutdownThermal ConsiderationsThe junction temperature should never exceed the absolute maximum junction temperature T J(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow,and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula :P D(MAX) = (T J(MAX) − T A ) / θJAwhere T J(MAX) is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction-to-ambient thermal resistance.For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125°C. The junction-to-ambient thermal resistance, θJA , is highly package dependent. For a WQFN-28L 4x5 package, the thermal resistance, θJA , is 27.4°C/W on a standard JEDEC 51-7 high effective-thermal-conductivity four-layer test board. The maximum power dissipation at T A = 25°C can be calculated as below :P D(MAX) = (125°C − 25°C) / (27.4°C/W) = 3.64W for a WQFN-28L 4x5 package.The maximum power dissipation depends on the operating ambient temperature for the fixed T J(MAX) and the thermal resistance, θJA . The derating curves in Figur e 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.Power LimitThe voltage at the PLIMIT pin can used to limit the power to levels below that which is possible based on the supply rail. Add a resistor (Table 2) to ground set the voltage at the PLIMIT pin. Also add a 1μF capacitor from the PLIMIT pin to ground. The PLIMIT circuit sets a limit on the output Power.PVCCENPVCCENFigure 3. Derating Curve of Maximum Power Dissipation0.00.40.81.21.62.02.42.83.23.64.0255075100125Ambient Temperature (°C)M a x i m u m P o w e r D i s s i p a t i o n (W )RT9116©Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Figure 4. PCB Layout GuideLayout ConsiderationsFor the best performance of the RT9116, the below PCB layout guidelines must be strictly followed.Place the decoupling capacitors as close as possible to the AVCC, PVDDL, PVDDR and GND pins. For achieving a good quality, consider adding a small, good performance low ESR ceramic capacitor between 220pF and 1000pF and a larger mid-frequency capacitor between 0.1μF and 1μF to the PVDD pins of the chip. The traces of (LINP &LINN, RINP & RINN) and (OUTPL & OUTNL, OUTPR &OUTNR) should be kept equal width and length respectively. The thermal pad must be soldered to the PCB for proper thermal performance and optimal reliability.The dimensions of the thermal pad and thermal land should be larger for application. The vias should connect to a solid copper plane, either on an internal layer or on the bottom layer of the PCB.Audio InputNote : The configuration of the Pin #1 identifier is optional,W-Type 28L QFN 4x5 PackageRichtek Technology Corporation14F, No. 8, Tai Yuen 1st Street, Chupei CityHsinchu, Taiwan, R.O.C.Tel: (8863)5526789Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.DS9116-00 November 11。
DSP6919芯片手册V1.21-立体声FM、中波、短波收音
8OHM
3
GND
IO1
26
3v
EJA C
40P PVC
4
GND
5
ROUT
6
LOUT
IO2
25
IO3
工作温度
符号或者测试条件 最小值
VBAT
2
SCLK,SDIO
SCLK,SDIO
0.7* VBAT
SDIO,TUND
SDIO,TUND
0.8* VBAT
-40
典型值
3.3
最大值
4.5 0.3* VBAT
0.2*VBAT
-
85
单位
V V
V V °C
1.3 直流特性
(VBAT= 3V, VIO = 3 V, TA = 25 °C, 其他都是默认,除非特别提到)
Table 3. 直流特性
参数
符号或者测试条件
调频模式
驱动外置音频功放
最大音量,不接喇叭或耳机
驱动内置音频功放
最大音量,不接喇叭或耳机
电视伴音模式
驱动外置音频功放
最大音量,不接喇叭或耳机
驱动内置音频功放
最大音量,不接喇叭或耳机
中波模式
驱动外置音频功放
最大音量,不接喇叭或耳机
驱动内置音频功放
最大音量,不接喇叭或耳机
DSP6919
静态电流
33
40
μA
1.4 接收特性
(VBAT= 3V, TA = 25 °C, 其他都是默认,除非特别提到)
1.4.1 调频和电视伴音
Table 4. 调频接收特性
参数
符号
测试条件
输入频率范围
Fre
低噪放输入电阻
LED驱动IC——PT6910
待机模式
当 ADJ 引脚的输入电压低于 0.2V 时,IC 内部的调整器和输出开关管将被关断,此时只有 IBIAS 模块正常工作,给关断 电路提供偏置电流。PT6910 待机模式的工作电流被限制在 40μA(典型值)。
软启动时间
在很多应用场景中使用软启动可以避免上电瞬间造成的浪涌。PT6910 自身通过 ADJ 引脚内部的滤波器可以实现软启动 功能,内置的软启动时间为 0.3ms。如果需要更长的软启动时间,ADJ 引脚所接的电容 CSS 与 启动时间 TSS 的关系近似 为: TSS(ms)=0.3ms+0.5xCSS(nF) 注意:软启动时间是指从超过使能阈值(约 0.2V)到 90%最终电压值的时间。
V1.2c
5
March 2012
PT6910 电容选择
在电源输入端到地之间需要并联一个低等效串联电阻(ESR)的去耦电容。电容的的 ESR 越大,系统工作的效率损失也越 大。该去耦电容需要能够承受较大的峰值电流,减小芯片工作时因开关噪声而对输入电源造成的影响。 当电源输入为直流时,建议电容的最小值为10μF。如果输入为交流,需要100μF甚至更大的钽电容或者铝电解电容。为 了保证在较宽温度和电压范围内的稳定性,建议选用X7R, X5R甚至更好的电容。电容最好尽可能靠近IC管脚。
PT6910
40V/1.2A 降压 LED 驱动器
概述
PT6910 是一款工作在连续模式下的电感型降压转换器。在 电源电压高于输出电压的情况下,能高效地驱动单颗或者 多颗串联 LED。IC 的输入电压范围为 6V~36V,输出电流 外部可调,最大输出电流可达 1.2A。 PT6910 内部集成功率管和高端电流检测电路,通过外部电 阻可设定平均输出电流。此外,输出电流还可以通过外部 的 ADJ 引脚进行调整,使其低于或高于设定值。 ADJ 引脚可以接收直流电压或者 PWM 信号 , 根据 PWM 信 号的频率,PT6910 通过内部的 PWM 滤波电路可提供一个 连续或者 PWM 的输出电流。 PT6910 内设软启动功能,要获得更长的软启动时间可在 ADJ 引脚接一个电容到 GND 。 如果给 ADJ 引脚加一个 0.2V 或者更低的电压,输出功率管将会被关断,IC 工作在低电 流的待机模式下。
hx711中文资料
HX711中文资料一、HX711简介1. 高分辨率:24位ADC,能够精确地测量微小的重量变化。
2. 低功耗:在正常工作模式下,功耗仅为1.5毫安。
3. 简单的接口:采用SPI数字接口,方便与各种微控制器(如51、AVR、PIC等)相连。
4. 内置稳压电路:支持2.7V至5.5V的宽电压范围,适应不同场景需求。
5. 抗干扰能力强:具有优异的电磁兼容性和温度稳定性。
二、HX711核心参数1. 输入通道:两个差分模拟输入通道,可接桥式传感器或直接接入传感器。
2. 采样率:10SPS至80SPS可调,可根据实际需求选择合适的采样率。
3. 精度:最高±0.0015%FS(满量程)4. 量程:±20mV至±80mV,可根据传感器类型和量程进行配置。
5. 工作温度:40℃至+85℃三、HX711引脚说明1. VCC:电源输入,2.7V至5.5V。
2. GND:地线。
3. A:模拟输入端,接传感器正端。
4. B:模拟输入端,接传感器负端。
5. C:传感器激励端,输出高电平时,为传感器提供激励电流。
6. D:传感器激励端,输出低电平时,为传感器提供激励电流。
7. E:数字输出端,用于接收外部时钟信号。
8. PD_SCK:串行时钟输入,用于控制AD转换和数据输出。
9. DOUT:串行数据输出,输出AD转换结果。
10. GN:增益选择端,接VCC时为128倍增益,接GND时为64倍增益。
四、HX711应用电路1. 电源电路:为HX711提供稳定的电源输入,确保其正常工作。
2. 传感器接口:将传感器与HX711的A、B、C、D引脚相连,实现信号输入。
3. 微控制器接口:通过SPI接口将HX711与微控制器相连,实现数据传输和控制。
4. 去耦电路:在电源输入端加入滤波电容,提高电路的抗干扰能力。
五、HX711编程基础1. 初始化设置将PD_SCK引脚设置为高电平,确保HX711处于待机状态。
FY1 USB声卡 XMOS 用户手册_V1.0Cn
8 其他.......................................................................................................................... 26
User manual
ii
User manual
ALIENTEK
FY1 USB Audio 用户手册
FY1 高性能 USB 声卡
6 设备连接
说明:后面板从左往右的接口依次是:外接电源接口(DC 7-9V)、RCA 同轴输出接口、 光 纤输出接口、B 型 USB 输入接口、扩展接口(I2S 和 DFU);前面板从左往右依次是 3.5mm 耳机输出接口、3.5mm 录音输入接口、炫酷蓝光 OLED 显示屏、供用户操作的旋转编码器 (也称旋钮)。
7.1 驱动和软件安装....................................................................................................................... 4 7.1.1 FY1 USB 声卡驱动安装................................................................................................ 4 7.1.2 Foobar2000 安装.......................................................................................................... 5 7.1.3 Adobe Audition CS6 安装.......................................................................................... 7 7.1.4 USB 转串口驱动安装.................................................................................................. 10 7.2 FY1 操作说明...........................................................................................................................11 7.2.1 基本操作..................................................................................................................... 11 7.2.2 功能设置..................................................................................................................... 12 7.2.3 Foobar2000 的使用.................................................................................................... 14 7.2.4 Adobe Audition CS6 的使用.................................................................................... 18 7.3 同轴&光纤输出....................................................................................................................... 21 7.4 扩展接口(I2S&DFU)........................................................................................................... 21 7.4.1 接口引脚图................................................................................................................. 21 7.4.2 I2S 接口...................................................................................................................... 21 7.4.3 DFU 接口(固件升级接口)...................................................................................... 22
Audio-Technica ATW-1101 UniPak
ATW-1101UniPak ® 发射系统ATW-1101/G吉他系统ATW-1101/H 头戴式话筒系统ATW-1101/H92微型头戴式话筒系统ATW-1101/H92-TH微型(米黄色)头戴式话筒系统ATW-1101/L 领夹式话筒系统ATW-1102手持式话筒系统数字无线系统安装和操作System 102System 10安装和操作感谢您选择Audio-Technica专业无线系统,成为我们数以千计的满意客户群体中的一员,他们皆因我们出色的产品质量、性能和可靠性而选择我们的产品,该无线系统是我们经过多年设计和生产获得的成功结果。
Audio-Technica的System 10是一个八通道无线系统,被设计为可提供绝对可靠的性能,同时该系统设置简单,声音效果自然、清晰。
System 10具有可叠放、风格现代等特点,有手持式、头戴式、吉他式、领夹式和腰包式等组合。
System 10可在2.4GHz范围内工作,不受电视和数字电视的干扰影响,其操作极其简易,可进行瞬时通道选择。
可同时使用八个通道,不会产生任何频率协调问题或群组选择问题System 10无线系统通过频率、时间、空间等三个不同方面确保通信畅通。
在频率方面,以两个动态分配的频率发送信号,可进行无干扰通信;在时间方面,以多个时隙发送信号,在最大程度上确保不受多通道干扰影响;在空间方面,每个发射器和接收器使用两条天线,最大程度地确保信号完整性。
每个System 10专业数字无线系统包括一个接收器和一个腰包式发射器或手持式话筒/发射器。
ATW-1101 UniPak®腰包式发射系统包括带有AT-GcW吉他电缆(/G)、PRO 8HEcW头戴式话筒(/H)、PRO 92cW头戴式话筒(/H92)、PRO 92cW-TH头戴式话筒(/H92-TH)、或MT830cW 领夹式话筒(/L)的型号,可用于特定应用场合。
所有A-T Wireless Essentials®话筒和电缆可单独提供,已预先端接,可用于任何ATW-1101系统3System 10安装和操作由于System 10的包装被设计为可容纳该系统的所有款式,因此纸箱内的某些部分可能会有空置。
IME691HT手操器说明书
操作指南手持通信器型号691HT本质安全型(发布固件1,发布软件1.0)(所述操作包括600T以及600T EN压力变送器–Rev至5.3,652/653S 温度– Rev5.1,Deltapi K智能压力变送器– Rev至5.5,KST温度– Rev至5.1,普通HART设备- HART 5 Rev)ABB 自动化公司概况ABB自动化产品公司是一家久负盛名的国际公司,专为工业过程控制、流动测量、气体以及液体分析、环境应用设计并生产仪器仪表。
作为ABB的一部分,我们拥有世界领先的过程自动化技术,我们在全世界为客户提供应用专业技术、服务以及技术支持。
我们致力于团队合作,为您提供高品质的制造、先进的技术以及无与伦比的服务和技术支持保障。
公司的产品具有一流的品质、精度以及性能,这得益于100多年来的业界经验,以及长期以来始终坚持创新设计,并在研发过程中充分利用最先进的技术。
NAMAS标定实验室No. 0255(B)只是公司旗下十家流量标定机构中的一家而已,而这种规模也证明了ABB自动化公司始终秉持品质与精度至上的理念。
BS EN ISO 9001St Neots,U.K. – Cert. No. Q5907 Stonehouse,U.K. – Cert. No. FM 21106 UNI EN 29001(ISO 9001)Lenno,Italy – Cert. No. 9/90A Stonehouse,U.K. – Cert. No. 0255“危险”、“警告”、“小心”以及“注意”等提醒语言的使用本手册在适当处提供了“危险”、“警告”、“小心”以及“注意”信息,由于指出与安全相关或者其他重要的信息。
危险——可能导致严重人员伤害或者死亡的危险。
警告——可能导致人员伤害的危险。
小心——可能导致设备或者财产损坏的危险。
注意——提醒用户注意有关事项以及情况。
尽管“危险”以及“警告”类的危险与人员伤害有关,“小心”类的危险与设备或者财产损坏有关,但是用户应理解,在特定的运行条件下,使用损坏的设备会导致工艺系统性能降低,也可能导致人员伤害或者死亡。
常用主板IC芯片
常用主板IC芯片常用主板I/O 芯片W83977EFW83977EF-AWW83977 T FIT8870F-AW83627HF-AW8712FW83627HFLM2637MW83627SF-AWLPC47M102W83627F-AWIT8707W83627SF47M172W83627GF-AW47M102SW83627THF47M192W83877FFP5093MTCIT8712F-ALM2637MIT8712FIT8671W83637HFIT8702FW83697HFIT8703PC87366IBWIT8705FPC87372IBWW83877TFW83637HF8711f-A常用主板电源管理芯片RT9224 RT9238RT9231 L6916DRT9231A RT9237RT9241A RT9241BRT9221 RT9223RT9602 RT92285098 RT9227ART9222 RT9231HIP6021CB HIP6020HIP6016 HIP6017HIP6018 HIP6019HIP6018BCB ISL6524CBHIP6004 HIP6602HIP6521 HIP6301CBHIP6303CS HIP6601HIP6501 KA7500BSC1164 SC1189SC1185 5051SC1402ISS 93C46直5322 5053SC1185ACSW HIP6303LM2638 LM2637ST75185C LM2637MSC1155 ISL6524ISL6556BCB CS5301ICE2AS01 HIP6620BABRT9602 HIP6302MS-5 MS-7L6917BD ISL6556BCBIRU3013 IRU30555090MTC 5093MTC常用主板场效管,快恢复二极管,特殊电源IC,晶振3055(252封装小的) 55N03(263封装大的)55N03(252封装小的) 6030(263封装大的)6030(252封装小的) 7030(263封装大的)70N03(252封装小的) K3296(263封装大的)1084(263封装大的) 1117(252封装小的)75N03(263封装大的)15N03(252封装小的)15N03(263封装大的)45N03(263封装大的)45N03(252封装小的)50N03(252封装小的)9916H(252封装小的)10N03(252封装小的)20N03(252封装小的) RF3704S(252封装小的)85N03(263封装大的)603AL(263封装大的)70T03H(252封装小的) 9916H(252封装小的)9915H(252封装小的) LD1010D(252封装小的)P75N02LD(252封装小的)APL1084(252封装小的) LM324 80N03(252封装小的)AME1085AMCT(252封装小的) B1202(252封装小的)B1802(252封装小的) 603AL(252封装小的)2545大(快恢复二极管) 4500M贴片场效应管晶振14.318和晶振32.768 晶振32.768 和24.57LM常用主板门控I C74HC74D74HC1474HC0674HC32D74HC0774HC13274HC0874HC708DDM7407M74HC74A74067607主板BIOS 芯片M50FW040 A290021TL-70PM49FL004T PM49FL002T49V002FP 29C04049LF002A N28F00149LF004A PM39F01029F040 39VF040W39V040 49LF003A==========效率源总代理:效率源西捷专修程序,效率源迈拓硬盘专修程序效率源硬盘数据强力复制程序(数据恢复工具)效率源西数全系列硬盘数据恢复固件修复程序,效率源蓝精灵936小工具=============内存维修工具=============最新推出:9200三合一内存检测仪是JS-9000的升级版支持SD,DDR1,DDR2内存条3200内存分驱检测仪是JS-3000的升级版支持SD,DDR内存条2007正宗全套最新电脑维修视频教程及全套芯片级维修资料大全================电源管理芯片大全==================RT9237/RT9237CS/RT9231/RT9241/RT9231A/RT9241A/RT9241BRT9221/RT9600/RT9602/RT9603/RT9222/RT9224/RT9224A/RT9223RT9227A/RT9228/RT9238/RT9248A/RT9173/RT9202/RC5051M5090MTC/RC5093MTC/5098MTC/SC1470/SC1205/SC1214TSSC1155CSW/SC1154CSW/SC1153CSW/SC1189SW//SC1185ACSWSC1402ISS/SC2422ACS//SC1164CSW/SC1150/ISL6524CB/RC5053M/ISL6522CB/ISL6556BCB/ISL6566CRZ/4500M/HIP6501ACBHIP6521CB/HIP6502/HIP6016CB/HIP6017CB/HIP6018BCB/HIP6019BCB HIP6020CB/HIP6021CB/HIP6601/HIP6602BCB/HIP6603CB/HIP6004ECB HIP6620BAB/HIP6301CB/HIP6520/HIP6302CB/HIP6303CS/SC1163SC1159/SC1486/ST75185C/SC2434SW/SC1480/SC1403/SC1404SC1485/SC1486/SC1474/SC1476/SC1211/SC451/SC1470IRU3013/IRU3004CW/IRU3055CQTR/IRU1150CM/MS-5/MS-7/5322CS5301/L6916D/L6917CB/LM2637M/LM2638M/ICE2AS01/KA7500B================笔记本电源管理芯片=================ADP3421/ADP3410/ADP3205/ADP3180/ADP3806/ADP3203/ADP3020ADP3170/ADP3188/ADP3181/ADP3166/ADP3163/ADP3165/ADP3168ADP3169/ADP3415/ADP3416/ADP3417/ADP3418/ADP3155/ADP3422ADP3207/MAX3243/MAX1902/MAX1999/MAX785/MAX786/MAX1717MAX1604/MAX1987/MAX1887/ISL6223/ISL6565/ISL6225/ISL6218MAX1904(SSOP)/MAX1904(BGA的)/MAX1634/MAX1710/MAX1711MAX1904/MAX1714/MAX1715/MAX1718/MAX1772/MAX1773/MAX1901 MAX1908/MAX1632/MAX1545/MAX1535/MAX1631/MAX1909/MAX1977 MAX1504/MAX1845/MAX1844/MAX1980/MAX1532/MAX1907/MAX1617 MAX8734/MAX8743/MAX8724/MAX1644/MAX1645/ISL6207/ISL6559CBISL6217/ISL6264/ISL6227/ISL6255/SC1485/SC1404LT3728LX/LTC1709/LTC1439/LTC3735/LTC1628/LTC1707/LTC1736MB3887/MB3878/LTC1778/LTC1511/LTC1709/LTC1439/LM8463LM2729/LM2641/VT8235/LTC3728/SC1476/SC1474/SC1404/SC451SC1403/SC1470/SC1486/TPS51120/TPS51020/PU2211A/VT6105VT8235/VT1612/VT8237/VT8233/VT8235(BGA的)/LTC3707/LTC3716ISL6566/ISL6568/ISL6563=================笔记本IO芯片大全===================PC87591S(VPCQ01)/PC 87591L(VPC01)/PC 97317IBW/PC 87393 VGJTB 62501F/TB62506F/TB6808F/KB910QF/KB910QB4/KB910LQF/KB910LQFA1 KB3910QB0/KB910SFC1/KB3910SF/PC87591E-VLB/IT8510E/PS5130PC87591E (-VPCI01),(VPCQ01)/PC 97551-VPC/PC 87570-ICC/VPCPC87391VGJ/TB6807F/W83L950D/LPC47N249-AQQ/PCI4510/PC8394TPC87392/PC87541L/PC87541V/LPC47N253-AQQ/PC87591E-VLBLPC47N250-SD/LPC47N252-SG/LPC47N254-AQQ=======================主板常用三极管大全====================3055(252封装小的) 55N03(263封装大的)55N03(252封装小的) 6030(263封装大的)6030(252封装小的) 7030(263封装大的)70N30(252封装小的) K3296(263封装大的)1084(263封装大的) 1117(252封装小的)75N03(263封装大的)15N03(252封装小的)15N03(263封装大的)45N03(263封装大的)45N03(252封装小的)50N03(252封装小的)9916H(252封装小的)10N03(252封装小的)20N03(252封装小的) RF3704S(252封装小)85N03(263封装大的)603AL(263封装大的)70T03H(252封装小的) 9916H(252封装小的)9915H(252封装小的) LD1010D(25封装小的)P75N02LD(252封装小的)APL1084(252封装小)LM324 80N03(252封装小的)AME1085AMCT(252封装小的) B1202(252封装小的)B1802(252封装小的) 603AL(252封装小的)2545大(快恢复二极管) 4500M贴片场效应管晶振14.318和晶振32.768 32.768 和24.57LM=========笔记本常用场效应管:(8脚贴片)==========4800 4812 4936 4806 4816 8002 8203 48104900 4912 4407 4413 4410 4814 4892 4411 4433 46004606 4408 4906 4835 FDS9435A F7811A V F7313 FDS6912AFDS6680S FDS8958A FDS6982S 4812 4800 4810 4936 48354816 4431 4334 4542 4894 4425 4404 6990 44354500 4830 6900S 7881A 4914 6675 4880 6688 69866694 LM358 LM393 LM339 4411 TPC8014 TPC8203 TPC81074818 LM324 TPC8303 4832 TPC8106 7811A TPC80059916H可以用啥管子代换?技嘉主板电源电路里的9916H可以用啥代换5V输入只有1V输出,导致主板不启动测量原极与漏极的正向电阻在500欧左右为正常反向电阻无穷大,可用3054、3055、3056、15N03、45N03、9915、9916等代替。
Anritsu Site Master S331L 9代手持电缆与天线分析仪说明书
Description
Handheld Instruments Documentation Disc Anritsu Tool Box with Line Sweep Tools (LST) DVD Disc Site Master™ S331L User Guide (Hard copy) Site Master™ S331L Technical Data Sheet Soft Carrying Case Stylus with coiled tether Torque Multiplier N(m) AC-DC Adapter Automotive Cigarette Lighter 12 VDC Adapter USB A/5-pin mini-B Cable, 305 cm (120 in) One Year Warranty Certificate of Calibration and Conformance
Optimized for field use
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ADM691
REV.AInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.aMicroprocessor Supervisory Circuits ADM690–ADM695FEATURESSuperior Upgrade for MAX690–MAX695Specified Over TemperatureLow Power Consumption (5 mW)Precision Voltage MonitorReset Assertion Down to 1 V V CCLow Switch On-Resistance 1.5 ⍀ Normal,20 ⍀ in BackupHigh Current Drive (100 mA)Watchdog Timer—100 ms, 1.6 s, or Adjustable 600 nA Standby CurrentAutomatic Battery Backup Power SwitchingExtremely Fast Gating of Chip Enable Signals (5 ns)Voltage Monitor for Power Fail APPLICATIONSMicroprocessor Systems Computers ControllersIntelligent Instruments Automotive Systems GENERAL DESCRIPTIONThe ADM690–ADM695 family of supervisory circuits offers complete single chip solutions for power supply monitoring and battery control functions in microprocessor systems. Thesefunctions include µP reset, backup battery switchover, watchdog timer, CMOS RAM write protection, and power failure warn-ing. The complete family provides a variety of configurations to satisfy most microprocessor system requirements.The ADM690, ADM692 and ADM694 are available in 8-pin DIP packages and provide:1.Power-on reset output during power-up, power-down and brownout conditions. The RESET output remains opera-tional with V CC as low as 1 V.2.Battery backup switching for CMOS RAM, CMOS microprocessor or other low power logic.3.A reset pulse if the optional watchdog timer has not been toggled within a specified time.4.A 1.3 V threshold detector for power fail warning, low battery detection, or to monitor a power supply other than +5 V.The ADM691, ADM693 and ADM695 are available in 16-pin DIP and small outline packages and provide three additional functions.1.Write protection of CMOS RAM or EEPROM.2.Adjustable reset and watchdog timeout periods.3.Separate watchdog timeout, backup battery switchover, and low V CC status outputs.The ADM690–ADM695 family is fabricated using an advanced epitaxial CMOS process combining low power consumption (5 mW), extremely fast Chip Enable gating (5 ns) and high reli-ability. RESET assertion is guaranteed with V CC as low as 1 V.In addition, the power switching circuitry is designed for mini-mal voltage drop thereby permitting increased output current drive of up to 100 mA without the need for an external pass transistor.FUNCTIONAL BLOCK DIAGRAMSV BATTV CC WATCHDOG POWER FAIL INPUT (PFI)OSC IN OSC SELCE INV BATT V CCWATCHDOG INPUT (WDI)POWER FAIL INPUT (PFI)POWER FAIL © Analog Devices, Inc., 1996One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 617/329-4700Fax: 617/326-8703ADM690–ADM695–SPECIFICATIONSParameterMinTypMaxUnitsTest Conditions/CommentsBATTERY BACKUP SWITCHING V CC Operating Voltage RangeADM690, ADM691, ADM694, ADM695 4.75 5.5V ADM692, ADM6934.55.5V V BATT Operating Voltage RangeADM690, ADM691, ADM694, ADM695 2.0 4.25V ADM692, ADM693 2.04.0V V OUT Output Voltage V CC – 0.05V CC – 0.025V I OUT = 1 mA V CC – 0.5V CC – 0.25V I OUT ≤ 100 mAV OUT in Battery Backup Mode V BATT – 0.05V BATT – 0.02V I OUT = 250 µA, V CC < V BATT – 0.2 V Supply Current (Excludes I OUT )1 1.95mA I OUT = 100 mASupply Current in Battery Backup Mode 0.61µA V CC = 0 V, V BATT = 2.8 V Battery Standby Current5.5 V > V CC > V BATT + 0.2 V (+ = Discharge, – = Charge)–0.1+0.02µA T A = +25°C –1.0+0.02µA Battery Switchover Threshold 70mV Power Up V CC – V BATT50mV Power DownBattery Switchover Hysteresis 20mV BATT ON Output Voltage0.3V I SINK = 3.2 mABATT ON Output Short Circuit Current35mA BATT ON = V OUT = 4.5 V Sink Current 0.5125µABATT ON = 0 V Source CurrentRESET AND WATCHDOG TIMER Reset Voltage ThresholdADM690, ADM691, ADM694, ADM695 4.5 4.65 4.73V ADM692, ADM693 4.254.4 4.48V Reset Threshold Hysteresis 40mV Reset Timeout DelayADM690, ADM691, ADM692, ADM693355070ms OSC SEL = HIGH, V CC = 5 V, T A = +25°C ADM694, ADM695140200280ms OSC SEL = HIGH, V CC = 5 V, T A = +25°C Watchdog Timeout Period, Internal Oscillator 1.0 1.6 2.25s Long Period, V CC = 5 V, T A = +25°C 70100140ms Short Period, V CC = 5 V, T A = +25°C Watchdog Timeout Period, External Clock 38404097Cycles Long Period 7681025Cycles Short PeriodMinimum WDI Input Pulse Width 50ns V IL = 0.4, V IH = 3.5 V RESET Output Voltage @ V CC = +1 V 4200mV I SINK = 10 µA, V CC = 1 V RESET , LOW LINE Output Voltage 0.4V I SINK = 1.6 mA, V CC = 4.25 V 3.5V I SOURCE = 1 µA, V CC = 5 V RESET , WDO Output Voltage 0.4V I SINK = 1.6 mA, V CC = 5 V 3.5V I SOURCE = 1 µA, V CC = 4.25 V Output Short Circuit Source Current 1325µA Output Short Circuit Sink Current 25mA WDI Input Threshold V CC = 5 V 1Logic Low 0.8V Logic High3.5V WDI Input Current 2050µA WDI = V OUT , T A = +25°C –50–15µA WDI = 0 V, T A = +25°C POWER FAIL DETECTOR PFI Input Threshold 1.25 1.3 1.35V V CC = +5 VPFI Input Current –25±0.01+25nA PFO Output Voltage 0.4V I SINK = 3.2 mA 3.5V I SOURCE = 1 µAPFO Short Circuit Source Current 1325µA PFI = Low, PFO = 0 V PFO Short Circuit Sink Current 25mA PFI = High, PFO = V OUT CHIP ENABLE GATING CE IN Threshold0.8V V IL 3.0V V IHCE IN Pull-Up Current 3µA CE OUT Output Voltage0.4V I SINK = 3.2 mA V OUT – 1.5V I SOURCE = 3.0 mAV OUT – 0.05V I SOURCE = 1 µA, V CC = 0 VCE Propagation Delay59nsREV. A(V CC = Full Operating Range, V BATT = +2.8 V, T A = T MIN to T MAX unless otherwise noted)–2–ParameterMinTyp MaxUnits Test Conditions/CommentsOSCILLATOROSC IN Input Current±2µA OSC SEL Input Pull-Up Current 5µA OSC IN Frequency Range250kHz OSC SEL = 0 VOSC IN Frequency with External Capacitor4kHzOSC SEL = 0 V, C OSC = 47 pFNOTE 1WDI is a three level input which is internally biased to 38% of V CC and has an input impedance of approximately 125 k Ω.Specifications subject to change without notice.ADM690–ADM695REV. A –3–ABSOLUTE MAXIMUM RATINGS*(T A = +25°C unless otherwise noted)V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V V BATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V All Other Inputs . . . . . . . . . . . . . . . . . .–0.3 V to V OUT + 0.5 V Input CurrentV CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 mA V BATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . .20 mA Power Dissipation, N-8 DIP . . . . . . . . . . . . . . . . . . . .400 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .120°C/W Power Dissipation, Q-8 DIP . . . . . . . . . . . . . . . . . . . .500 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .125°C/W Power Dissipation, N-16 DIP . . . . . . . . . . . . . . . . . . .600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .135°C/W Power Dissipation, Q-16 DIP . . . . . . . . . . . . . . . . . . .600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .100°C/W Power Dissipation, R-16 SOIC . . . . . . . . . . . . . . . . . .600 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .110°C/W Operating Temperature RangeIndustrial (A Version) . . . . . . . . . . . . . . . . .–40°C to +85°C Extended (S Version) . . . . . . . . . . . . . . . . .–55°C to +125°C Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . .+300°C Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . .+215°C Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability.ORDERING GUIDEModelTemperature RangePackage OptionADM690AN –40°C to +85°C N-8ADM690AQ –40°C to +85°C Q-8ADM690SQ –55°C to +125°C Q-8ADM691AN –40°C to +85°C N-16ADM691AR –40°C to +85°C R-16ADM691AQ –40°C to +85°C Q-16ADM691SQ –55°C to +125°C Q-16ADM692AN –40°C to +85°C N-8ADM692AQ –40°C to +85°C Q-8ADM692SQ –55°C to +125°C Q-8ADM693AN –40°C to +85°C N-16ADM693AR –40°C to +85°C R-16ADM693AQ –40°C to +85°C Q-16ADM693SQ –55°C to +125°C Q-16ADM694AN –40°C to +85°C N-8ADM694AQ –40°C to +85°C Q-8ADM694SQ –55°C to +125°C Q-8ADM695AN –40°C to +85°C N-16ADM695AR –40°C to +85°C R-16ADM695AQ –40°C to +85°C Q-16ADM695SQ–55°C to +125°CQ-16CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily accumulate on the human body and test equipment and can discharge without detection.Although the ADM690–ADM695 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore,proper ESD precautions are recommended to avoid performance degradation or loss of functionality.ADM690–ADM695REV. A–4–PIN FUNCTION DESCRIPTIONMnemonicFunctionV CC Power Supply Input: +5 V Nominal.V BATT Backup Battery Input. Connect to Ground if a backup battery is not used.V OUT Output Voltage, V CC or V BATT is internally switched to V OUT depending on which is at the highest potential. V OUT can supply up to 100 mA to power CMOS RAM. Connect V OUT to V CC if V OUT and V BATT are not used.GND 0 V. Ground reference for all signals.RESETLogic Output. RESET goes low if 1. V CC falls below the Reset Threshold 2. V CC falls below V BATT3. The watchdog timer is not serviced within its timeout period.The reset threshold is typically 4.65 V for the ADM690/ADM691/ADM694/ADM695 and 4.4 V for the ADM692 and ADM693. RESET remains low for 50 ms (ADM690/ADM691/ADM692/ADM693) or 200 ms (ADM694/ADM695)after V CC returns above the threshold. RESET also goes low for 50 (200) ms if the watchdog timer is enabled but not serviced within its timeout period. The RESET pulse width can be adjusted on the ADM691/ADM693/ADM695 as shown in Table I. The RESET output has an internal 3 µA pull up, and can either connect to an open collector Reset bus or directly drive a CMOS gate without an external pull-up resistor.WDIWatchdog Input. WDI is a three level input. If WDI remains either high or low for longer than the watchdog timeout period, RESET pulses low and WDO goes low. The timer resets with each transition on the WDI line. The watchdog timer may be disabled if WDI is left floating or is driven to midsupply.PFI Power Fail Input. PFI is the noninverting input to the Power Fail Comparator when PFI is less than 1.3 V, PFO goes low. Connect PFI to GND or V OUT when not used.PFO Power Fail Output. PFO is the output of the Power Fail Comparator. It goes low when PFI is less than 1.3 V. The comparator is turned off and PFO goes low when V CC is below V BATT .CE IN Logic Input. The input to the CE gating circuit. Connect to GND or V OUT if not used.CE OUT Logic Output. CE OUT is a gated version of the CE IN signal. CE OUT tracks CE IN when V CC is above the reset threshold. If V CC is below the reset threshold, CE OUT is forced high. See Figures 5 and 6.BATT ONLogic Output. BATT ON goes high when V OUT is internally switched to the V BATT input. It goes low when V OUT is internally switched to V CC . The output typically sinks 35 mA and can directly drive the base of an external PNP transistor to increase the output current above the 100 mA rating of V OUT .LOW LINE Logic Output. LOW LINE goes low when V CC falls below the reset threshold. It returns high as soon as V CC rises above the reset threshold.RESET Logic Output. RESET is an active high output. It is the inverse of RESET .OSC SELLogic Oscillator Select Input. When OSC SEL is unconnected (floating) or driven high, the internal oscillator sets the reset active time and watchdog timeout period. When OSC SEL is low, the external oscillator input, OSC IN,is enabled. OSC SEL has a 3 µA internal pull up, (see Table I).OSC INOscillator Logic Input. With OSC SEL low, OSC IN can be driven by an external clock signal or an externalcapacitor can be connected between OSC IN and GND. This sets both the reset active pulse timing and the watch-dog timeout period (see Table I and Figure 4). With OSC SEL high or floating, the internal oscillator is enabled and the reset active time is fixed at 50 ms typ. (ADM691/ADM693) or 200 ms typ (ADM695). In this mode the OSC IN pin selects between fast (100 ms) and slow (1.6 s) watchdog timeout periods. In both modes, the timeout period immediately after a reset is 1.6 s typical.WDOLogic Output. The Watchdog Output, WDO , goes low if WDI remains either high or low for longer than thewatchdog timeout period. WDO is set high by the next transition at WDI. If WDI is unconnected or at midsupply,the watchdog timer is disabled and WDO remains high. WDO also goes high when LOW LINE goes low.ADM690–ADM695REV. A–5–PIN CONFIGURATIONSPRODUCT SELECTION GUIDEPart Nominal Reset Nominal V CCNominal Watchdog Battery Backup Base Drive Chip Enable NumberTimeReset ThresholdTimeout PeriodSwitchingExt PNPSignalsADM69050 ms4.65 V 1.6 sYes No No ADM69150 ms or ADJ 4.65 V 100 ms, 1.6 s, ADJ Yes Yes Yes ADM69250 ms4.4 V 1.6 sYes No NoADM69350 ms or ADJ 4.4 V 100 ms, 1.6 s, ADJ Yes Yes Yes ADM694200 ms4.65 V 1.6 sYes No No ADM695200 ms or ADJ 4.65 V 100 ms, 1.6 s, ADJ Yes Yes YesCIRCUIT INFORMATION Battery Switchover SectionThe battery switchover circuit compares V CC to the V BATT input, and connects V OUT to whichever is higher. Switchover occurs when V CC is 50 mV higher than V BATT as V CC falls, and when V CC is 70 mV greater than V BATT as V CC rises. This 20 mV of hysteresis prevents repeated rapid switching if V CC falls very slowly or remains nearly equal to the battery voltage.Figure 1.Battery Switchover SchematicDuring normal operation with V CC higher than V BATT , V CC is in-ternally switched to V OUT via an internal PMOS transistorswitch. This switch has a typical on-resistance of 1.5 Ω and can supply up to 100 mA at the V OUT terminal. V OUT is normally used to drive a RAM memory bank which may require instanta-neous currents of greater than 100 mA. If this is the case then a bypass capacitor should be connected to V OUT . The capacitor will provide the peak current transients to the RAM. A capaci-tance value of 0.1µF or greater may be used.If the continuous output current requirement at V OUT exceeds 100 mA or if a lower V CC –V OUT voltage differential is desired,an external PNP pass transistor may be connected in parallel with the internal transistor. The BATT ON output (ADM691/ADM693/ADM695) can directly drive the base of the external transistor.A 20 Ω MOSFET switch connects the V BATT input to V OUT during battery backup. This MOSFET has very low input-to-output differential (dropout voltage) at the low current levels required for battery back up of CMOS RAM or other low power CMOS circuitry. The supply current in battery back up is typically 0.6 µA.The ADM690/ADM691/ADM694/ADM695 operates with battery voltages from 2.0 V to 4.25 V and the ADM692/ADM693operates with battery voltages from 2.0 V to 4.0 V. High value capacitors, either standard electrolytic or the farad size double layer capacitors, can also be used for short-term memory back up. A small charging current of typically 10 nA (0.1 µA max)flows out of the V BATT terminal. This current is useful formaintaining rechargeable batteries in a fully charged condition.This extends the life of the back up battery by compensating for its self discharge current. Also note that this current poses no problem when lithium batteries are used for back up since the maximum charging current (0.1 µA) is safe for even the smallest lithium cells.If the battery-switchover section is not used, V BATT should be connected to GND and V OUT should be connected to V CC .GNDV V OUT PFIPFO WDO VRESET OSC INRESETCE IN CE OUTWDI GND V OUT PFIVCCADM690–ADM695REV. A–6–POWER FAIL RESET OUTPUTRESET is an active low output which provides a RESET signal to the Microprocessor whenever V CC is at an invalid level. When V CC falls below the reset threshold, the RESET output is forced low. The nominal reset voltage threshold is 4.65 V (ADM690/ADM691/ADM694/ADM695) or 4.4 V (ADM692/ADM693).1 = RESET TIME.V1 = RESET VOLTAGE THRESHOLD LOW V2 = RESET VOLTAGE THRESHOLD HIGH HYSTERESIS = V2–V1Figure 2.Power Fail Reset TimingOn power-up RESET will remain low for 50 ms (200 ms for ADM694 and ADM695) after V CC rises above the appropriate reset threshold. This allows time for the power supply and mi-croprocessor to stabilize. On power-down, the RESET output remains low with V CC as low as 1 V. This ensures that the microprocessor is held in a stable shutdown condition.This RESET active time is adjustable on the ADM691/ADM693/ADM695 by using an external oscillator or by connecting an external capacitor to the OSC IN pin. Refer to Table I and Figure 4.The guaranteed minimum and maximum thresholds of the ADM690/ADM691/ADM694/ADM695 are 4.5 V and 4.73 V,while the guaranteed thresholds of the ADM692/ADM693 are 4.25 V and 4.48 V. The ADM690/ADM691/ADM694/ADM695is, therefore, compatible with 5 V supplies with a +10%, –5%tolerance while the ADM692/ADM693 is compatible with 5 V ± 10% supplies. The reset threshold comparator has approxi-mately 50 mV of hysteresis. The response time of the reset volt-age comparator is less than 1 µs. If glitches are present on the V CC line which could cause spurious reset pulses, then V CC should be decoupled close to the device.In addition to RESET the ADM691/ADM693/ADM695 con-tain an active high RESET output. This is the complement of RESET and is intended for processors requiring an active high RESET signal.Watchdog Timer RESETThe watchdog timer circuit monitors the activity of the micro-processor in order to check that it is not stalled in an indefinite loop. An output line on the processor is used to toggle theWatchdog Input (WDI) line. If this line is not toggled within the selected timeout period, a RESET pulse is generated. Thenominal watchdog timeout period is preset at 1.6 seconds on the ADM690/ADM692/ADM694. The ADM691/ADM693/ADM695may be configured for either a fixed “short” 100 ms or a “long”1.6 second timeout period or for an adjustable timeout period.If the “short” period is selected, some systems may be unable to service the watchdog timer immediately after a reset, so the ADM691/ADM693/ADM695 automatically selects the “long”timeout period directly after a reset is issued. The watchdog timer is restarted at the end of reset, whether the reset was caused by lack of activity on WDI or by V CC falling below the reset threshold.The normal (short) timeout period becomes effective following the first transition of WDI after RESET has gone inactive. The watchdog timeout period restarts with each transition on the WDI pin. To ensure that the watchdog timer does not time out,either a high-to-low or low-to-high transition on the WDI pin must occur at or less than the minimum timeout period. If WDI remains permanently either high or low, reset pulses will be issued after each “long” timeout period (1.6 s). The watchdog monitor can be deactivated by floating the Watchdog Input(WDI) or by connecting it to midsupply.RESETWDOWDIt 1 = RESET TIME.t 2 = NORMAL (SHORT) WATCHDOG TIMEOUT PERIOD.t 3 = WATCHDOG TIMEOUT PERIOD IMMEDIATELY FOLLOWING A RESET.Figure 3.Watchdog Timeout Period and Reset Active TimeADM690–ADM695REV. A –7–Table I.ADM691, ADM693, ADM695 Reset Pulse Width and Watchdog Timeout SelectionsWatchdog Timeout PeriodReset Active Period ImmediatelyOSC SEL OSC INNormal After ResetADM691/ADM693ADM695LowExternal Clock Input 1024 CLKS4096 CLKS 512 CLKS2048 CLKSLowExternal Capacitor 260 ms × C/47 pF 1.04 s × C/47 pF 130 ms × C/47 pF 520 ms × C/47 pF Floating or High Low100 ms 1.6 s 50 ms 200 ms Floating or High Floating or High 1.6 s 1.6 s 50 ms 200 msNOTEWith the OSC SEL pin low, OSC IN can be driven by an external clock signal, or an external capacitor can be connected between OSC IN and GND. The nominal internal oscillator frequency is 10.24 kHz. The nominal oscillator frequency with external capacitor is: F OSC (Hz) = 184,000/C (pF).The watchdog timeout period is fixed at 1.6 seconds, and the reset pulse width is fixed at 50 ms on the ADM690/ADM692.On the ADM694 the watchdog timeout period is also 1.6 sec-onds but the reset pulse width is fixed at 200 ms. The ADM691/ADM693/ADM695 allow these times to be adjusted as shown in Table I. Figure 4 shows the various oscillator configurations which can be used to adjust the reset pulse width and watchdog timeout period.The internal oscillator is enabled when OSC SEL is high orfloating. In this mode, OSC IN selects between the 1.6 second and 100 ms watchdog timeout periods. With OSC IN connected high or floating, the 1.6 second timeout period is selected; while with it connected low, the 100 ms timeout period is selected. In either case, immediately after a reset, the timeout period is 1.6seconds. This gives the microprocessor time to reinitialize the system. If OSC IN is low, then the 100 ms watchdog period be-comes effective after the first transition of WDI. The software should be written such that the I/O port driving WDI is left in its power-up reset state until the initialization routines are com-pleted and the microprocessor is able to toggle WDI at the mini-mum watchdog timeout period of 70 ms.Watchdog Output (WDO)The Watchdog Output WDO (ADM691/ADM693/ADM695)provides a status output which goes low if the watchdog timer “times out” and remains low until set high by the next transition on the Watchdog Input. WDO is also set high when V CC goesbelow the reset threshold.Figure 4a.External Clock SourceFigure 4b.External CapacitorNCNCFigure 4c.Internal Oscillator (1.6 Second Watchdog)Figure 4d.Internal Oscillator (100 ms Watchdog)ADM690–ADM695REV. A–8–CE Gating and RAM Write Protection (ADM691/ADM693/ADM695)The ADM691/ADM693/ADM695 products include memory protection circuitry which ensures the integrity of data in mem-ory by preventing write operations when V CC is at an invalid level. There are two additional pins, CE IN and CE OUT , which may be used to control the Chip Enable or Write inputs ofCMOS RAM. When V CC is present, CE OUT is a buffered replica of CE IN , with a 5 ns propagation delay. When V CC falls below the reset voltage threshold or V BATT , an internal gate forces CE OUT high, independent of CE IN .CE OUT typically drives the CE , CS , or write input of battery backed up CMOS RAM. This ensures the integrity of the data in memory by preventing write operations when V CC is at an in-valid level. Similar protection of EEPROMs can be achieved by using the CE OUT to drive the store or write inputs.If the 5 ns typical propagation delay of CE OUT is excessive, con-nect CE IN to GND and use the resulting CE OUT to control a high speed external logic gate.CE OUTCE INPower Fail Warning ComparatorAn additional comparator is provided for early warning of failure in the microprocessor’s power supply. The Power Fail Input (PFI) is compared to an internal +1.3 V reference. The Power Fail Output (PFO ) goes low when the voltage at PFI is less than 1.3 V. Typically PFI is driven by an external voltage divider which senses either the unregulated dc input to the system’s 5 V regulator or the regulated 5 V output. The voltage divider ratio can be chosen such that the voltage at PFI falls below 1.3 V sev-eral milliseconds before the +5 V power supply falls below the reset threshold. PFO is normally used to interrupt the micropro-cessor so that data can be stored in RAM and the shut down procedure executed before power is lostPOWER FAIL OUTPUTFigure 7.Power Fail ComparatorTable II.Input and Output Status In Battery Backup ModeSignal StatusV OUT V OUT is connected to V BATT via an internal PMOS switch.RESETLogic low.RESET Logic high. The open circuit output voltage is equal to V OUT .LOW LINELogic low.BATT ON Logic high. The open circuit voltage is equal to V OUT.WDIWDI is ignored. It is internally disconnected from the internal pull-up resistor and does not source or sink current as long as its input voltage is between GND and V OUT . The input voltage does not affect supply current.WDOLogic high. The open circuit voltage is equal to V OUT .PFIThe Power Fail Comparator is turned off and has no effect on the Power Fail Output.PFO Logic low.CE INCE IN is ignored. It is internally disconnected from its internal pull-up and does not source or sink current as long as its input voltage is between GND and V OUT . The input voltage does not affect supply current.CE OUT Logic high. The open circuit voltage is equal to V OUT .OSC IN OSC IN is ignored.OSC SEL OSC SEL is ignored.1 = RESET TIME.V1 = RESET VOLTAGE THRESHOLD LOW V2 = RESET VOLTAGE THRESHOLD HIGH HYSTERESIS = V2–V1Figure 6.Chip Enable TimingTypical Performance Curves–ADM690–ADM6955.004.801004.954.85204.90806040V O U T – VI OUT – mAFigure 8.VOUT vs. I OUT Normal Operation20120401008060P F I I N P U T T H R E S H O L D – VTEMPERATURE – °CFigure 11.PFI Input Threshold vs.Temperature61.252013451.35TIME – µsFigure 14.Power Fail Comparator Response Time 2.802.7610002.792.772002.78800600400I OUT – µAV O U T –VFigure 9.V OUT vs. I OUT Battery Backup 534920120525040511008060TEMPERATURE – °CR E S E T A C T I V E T I M E – m sFigure 12.Reset Active Time vs.Temperature 6901.251.352013458050603040702010TIME – µsFigure 15.Power Fail Comparator Response TimeFigure 10.Reset Output Voltage vs.Supply Voltage4.704.62201204.684.64404.661008060TEMPERATURE – °CR E S E T V O L T A G ET H R E S H O L D – VFigure 13.Reset Voltage Threshold vs. Temperature601.81.2501.35201345 1.61.0 1.20.60.8 1.40.40.2TIME – µsFigure 16.Power Fail Comparator Response Time with Pull-Up ResistorREV. A –9–。
FPGA可编程逻辑器件芯片10M16SAU16917G中文规格书
×10
100
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100
100
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100
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continued...
Send Feedback
13.4
–13.4
SSTL-15 Class I
—
VREF – 0.1 VREF + 0.1
—
SSTL-15 Class II
—
VREF – 0.1 VREF + 0.1
—
SSTL-135 HSTL-18 Class I
—
VREF –
VREF +
—
0.09
0.09
—
VREF – 0.1 VREF + 0.1
ms
Send Feedback
Symbol tPLL_PSERR
Parameter Accuracy of PLL phase shift
Condition —
Min —
Intel® MAX® 10 FPGA Device Datasheet M10-DATASHEET | 2020.06.30
Typ —
Condition —
— FINPFD ≥ 100 MHz FINPFD < 100 MHz
— –6 speed grade –7 speed grade –8 speed grade Duty cycle set to 50%
—
After switchover, reconfiguring any non-post-scale counters or
0.18
—
VREF –
VREF +
—
VTT – 0.57 VTT + 0.57
数据采集软硬件解决方案
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PT6911_s_Ntertech
PT6911 Wide Input Range Buck LED DriverDESCRIPTIONThe PT6911 is ideally suited for AC/DC buck LED drivers. Since the PT6911 includes a 12V~450V linear regulator which allows it to work from a wide range of input voltages without the need for an external low voltage supply. Besides, the PT6911 operates in hysteretic control mode, the controller achieves good output current regulation without the need for any loop compensation. The PT6911 delivers constant current within high accuracy to a wide variety and number of series connected LEDs.The PT6911 includes PWM dimming and linear dimming functions. The PWM dimming input can accept an external control signal with a duty cycle of 0~100% and a frequency between 100Hz and a few KHz. Output current to LED string can be programmed to any value between 0 to its maximum value by PWM dimming. Also, a 0.1~1.2V linear dimming input can be used for linear dimming of the LED current. APPLICATIONS• AC/DC LED driver• LED Bulbs•Backlight LED driver• Constant-Current driver FEATURES•12V to 450V input range• Hysteretic controller•High accuracy output current•Low stand-by power dissipation•Softstart•PWM low-frequency dimming and linear dimming BLOCK DIAGRAMTYPICAL APPLICATIONORDER INFORMATIONValid Part Number Package Type Top CodePT6911-S 8 Pins, SOP, 150MIL PT6911-SPIN CONFIGURATIONPIN DESCRIPTIONPin Name Description Pin No.VIN Input supply voltage 12V~450V DC. 1PWMD Low frequency PWM dimming pin, also enable pin. When PWMD pin is floating or is pulled to GND, IC operates in stand-by mode. When PWMD pin is pulled to high, IC operates normally.2NC Noconnection. 3 CS Current sense pin. 4LD Linear dimming. If the voltage at the LD pin is less than 1.2V, the LD pin voltage sets the current sense threshold.5GND ICground. 6 GD IC output drives external MOSFET. 7 VDD Internal regulated voltage output pin. It must be bypassed with a low ESR capacitor to GND. 8。
Audio-Technica USB T urntables软件指南说明书
4. Next, select Quality tab at the top. • Default Sample Rate: 44100 Hz. • Default Sample Format: 16-bit. • Real-time sample rate converter: Fast Sinc Interpolation. • High-quality sample rate converter: High-quality Sinc Interpolation. • Real-time dither: None. • High-quality dither: Triangle. • Select OK to save settings and exit Preferences menu.
*NOTE: For use with Windows 7, Windows Vista and Mac OSX 10.6: If the Audacity recording software included with this turntable is version 1.2.6, please download Audacity recording software for these operating systems from .
5. Next, from the main Audacity window, select the drop-down box (arrow pointing down) next to the microphone at the right side of your screen.
Typical connection for: Speakers with RCA inputs
龙迅LT6911C是HDMI1.4转双MIPIDSI带音频
1.说明
LT6911C 是用于 VR /智能电话/显示应用的高性能 HDMI1.4 到 MIPI®DSI/ CSI 芯片。 对于 MIPI®DSI/ CSI 输出,LT6911C 具有可配置的单端口或双端口 MIPI®DSI/ CSI,具有 1 个高 速时钟通道和 1〜4 个高速数据通道,它们以最大 1.5Gb / s / lane 的速度运行。 可以支持高 达 12Gbps 的总带宽。 LT6911C 支持突发模式 DSI 视频数据传输,还支持灵活的视频数据映 射路径。
2.特点 •HDMDSI / CSI 发送器 •杂项
3.应用 •移动系统 •虚拟现实 •显示 特征 HDM1.4 接收器 符合带有 TMDS 的 HDM 1.4 规格每个通道的数据速率高达 3.4Gbps 支持 HDCP 1.4 用于 PCB,电缆和连接器 L88S8 Sngleul-Port MIP 怕 DSVCSI 发送器 符合 DCS1.02。 D-PHY1.2 和 D5I1.028CSI-2 10 每条通道有 1 条 Clok Lane 和 1-4 条可配置的 Daeta Lanes 港口 1/2 可配置端口 每个数据线 80Mbs〜1.5Gb / 8。 数据通道和礼节交换每半部分最大重叠 64pbval 支持非爆破和连拍广角模式 支持 RG666,Loosly,RGB668,RGB88,RGB565,16 位 YCbCr4:2:2,20 位 YCBCr4:2 2 24 位 YCbCr4:20 视频格式 原件为谷歌翻译结果,准确英文资料及开发数据资料/方案请向我方工作人员索取. LT9211/LT8911EX/LT8911EXB/LT6911C/LT8619C/LT86102/LT86104/LT8711HE/LT8712X 等型 号批发零售,润百信科技欢迎来电垂询.
usbcan-1通用USBCAN
>>高级屏蔽功能>>智能多段滤波功能>>总线分析功能>>总线监听模式
>>总线数据保存及录播功能>>文件发送功能
>>智能中继功能、智能脱机模式
<2> 多路温度采集系统<1>汽车发动机检测工具
一一【可定制】^_^【按需定制】一一
本文主要内容:usbcan 收发器USBcan盒“透明转化”
本文作者:广成科技才女小丫
随着电力、冶金、石化、环保、交通、建筑等行业的迅速发展,从数字家庭用的机顶盒、数字电视,银行柜员机、高速公路收费系统、加油站管理、制造业生产线控制,金融、政府、国防等行业信息化需求不时增加,对工控机的需求很大,工控机市场发展前景十分广阔。
1、向综合方向发展:满足工厂自动化要求,并适应开放化的大趋势。
2、向智能化方向发展
智能I/O智能PID控制、智能传感器、变送器、执行器、智能人接口及可编程调节器相继出现。
3、简单操作方向
对于工控机,能够简单操作是最好的,这也将成为未来的发展方向,简易操作可以改善人机接口,简化编程、操作面板使用符号键,尽量采用对话方式等,以方便用户使用。
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TP6911
USB Controller
GENERAL DESCRIPTION
The TP6911 is an 8-bit micro-controller embedded device tailored to the USB audio application. It is able to play two channels PC audio and record one channel voice through Full-Speed USB bus.
FEATURE
Compliance with the Universal Serial Bus specification v2.0 Full-Speed Built-in USB Transceiver and 3.3V Regulator Isochronous transfer with adaptive synchronization High performance 48KHz sampling rate for audio playback 24KHz sampling rate for voice recording
Two channel audio Class-D Amplify for speaker driving 64-level volume control
ADC control line support 12-keys for USB Audio and USB phone In USB phone mode, Support 24-keys matrix Embedded 10 bits ADC input Support USB Suspend function 12MHz crystal oscillation
28 / 48 pin package
PIN DESCRIPTION
Name I/O Description
V33 O 3.3V Regulator output
Ground
VSS P
VDD P 5V Power from USB cable
VDDV P 5V Power for PLL
VSSV P Ground for PLL
AVDD P 5V Power for Recorder
Recorder
for
AGND P
Ground
PWMVDD P 5V Power for Audio Output
PWMVSS P Ground for Audio Output
VR
input for volume adjustment
ADCI I
Crystal in (12MHz)
X1 I
Crystal out
X2 O
RESETn I Chip reset (active low)
positive data signal
USB
DP I/O
negative data signal
USB
DM I/O
AUDIOLP O Audio output
AUDIOLN O Audio output
AUDIORP O Audio output
AUDIORN O Audio output
IN+
MICIN+ I
MIC
IN-
MIC
MICIN- I
ANAO O Recorder AC Couple Out
ANAI I Recorder AC Couple In
KSI[7:0] I Keyscan Input
KSO[2:0] O Keyscan Output
purpose I/O
P1[7:0] I/O
General
purpose I/O
General
P3[5,4] I/O
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PIN ASSIGNMENT
AVDD ANAO ANAI MICIN+ MICIN- AGND KSI4 VSS
KSI3 DVDD P35 P15 P14 RESETn DVSS
V33 DM DP ADCI AUDIORN PWMRVDD AUDIORP
VSS
AUDIOLP PWMLVDD AUDIOLN
VSSV VDDV
X2 X1
HSOP28
LQFP48
P15 P14 RESETn P13 P12 P11 VSS X1 X2 VDDV VSSV KSO2
P35
P34
P16
P17VSS KSI0
KSI1KSI2VDD KSI3KSI4KSI5KSO1
P10
KSO0
PWMLVSS
AUDIOLN
PWMLVDD
AUDIOLP
PWMVSS
AUDIORP
PWMRVDD
AUDIORN PWMRVSS
APPLICATION CIRCUIT
Speaker Application
Earphone Application
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KSI
These pins are used as keyboard scan inputs. Each one of them has a pull up resistor. In addition, each KSI pin can cause Keyboard interrupt (KBDint) if the corresponding interrupt mask bit (KBDmask) is 0. The KBDint is asserted at the falling edge of KSI pin. KSI
KSO[2:0]
These pins are used as keyboard scan outputs. They have at least 4mA drive and sink strength.
KSO[2:0]
ABSOLOUTE MAXIMUM RATINGS
GND= 0V
Name Symbol Range Unit
Maximum Supply Voltage VDD -0.3 to 5.5 V
Maximum Input Voltage Vin -0.3 to VDD+0.3 V
Maximum output Voltage Vout -0.3 to VDD+0.3 V
Maximum Operating Temperature Topg -20 to +70 ℃
Maximum Storage Temperature Tstg -25 to +125 ℃
OPERATING CONDITION
at Ta= -20℃ to 70℃,GND= 0V
Max.
Unit
Min. Typ.
Name Symb.
4.5
5.5 V
Supply
Voltage VDD
Input “H” Voltage Vih 4.0 5.5 V
Input “L” Voltage Vil 0 1.0 V
Fosc 12 MHz
frequency
Crystal
ELECTRICAL PARAMETER
at Ta= -20℃ to 70℃,GND= 0V
Name Symb.Typ
Unit Maximum Audio Output Current per Channel @ 8ohm Load Iout 456 mA
DC ELECTRICAL CHARACTERISTICS:
at Ta=-25 ℃,VDD5=5.0V, VSS= 0V, Fosc=12MHz
Name Symb
Min.Typ.Max.Unit Condition Note
.
Operating current Icc 50 mA Fosc=12MHz
P14/P15 Output High Voltage Voh 4.0 V Ioh=30uA
P14/P15 Output Low Voltage Vol 0.4 V Iol=14mA
LED(P3.5) Output Low Voltage Vol 0.4 V Iol=34mA
V33 output voltage V33 3.2 3.4 V VDD=5V
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HSOP - 28Pin
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LQFP - 48Pin。