LRRK2-IN-1_1234480-84-2_DataSheet_MedChemExpress
ISL28448中文资料
MDP0038
Coming Soon, ISL28148FIZ-T7 (Note 2)
178Z
6 Ld WLCSP (1.5mmx1.0mm)
W3x2.6C
Coming Soon, ISL28248FBZ (Note 1)
28248BZ
8 Ld SOIC
MDP0027
Coming Soon, ISL28248FBZ-T7* (Note 1)
Features
• 4.5MHz gain bandwidth product • 900µA supply current (per amplifier) • 1.8mV maximum offset voltage • 1pA typical input bias current • Down to 2.4V single supply operation • Rail-to-rail input and output • Enable pin (ISL28148 SOT-23 package only) • -40°C to +125°C operation • Pb-free (RoHS compliant)
2. These Intersil Pb-free WLCSP and BGA packaged products products employ special Pb-free material sets; molding compounds/die attach materials and SnAgCu - e1 solder ball terminals, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free WLCSP and BGA packaged products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
IRLR024资料
IRU3007TYPICAL APPLICATIONDESCRIPTIONThe IRU3007 controller IC is specifically designed to meet Intel specification for Pentium II ™ microprocessor ap-plications as well as the next generation of P6 family processors. The IRU3007 provides a single chip control-ler IC for the Vcore, LDO controller for GTL+ and an internal 200mA regulator for clock supply which are re-quired for the Pentium II applications. It also contains a switching controller to convert 5V to 3.3V regulator for on-board applications that uses either AT type power supply or is desired not to rely on the ATX power supply’s 3.3V output. These devices feature a patented topology that in combination with a few external components, as shown in the typical application circuit, will provide in excess of 14A of output current for an on-board DC/DC converter while automatically providing the right output voltage via the 5-bit internal DAC. The IRU3007 also fea-tures, loss-less current sensing for both switchers by using the R DS(on) of the high-side power MOSFET as the sensing resistor, internal current limiting for the clock supply, a Power Good window comparator that switches its open collector output low when any one of the out-puts is outside of a pre-programmed window. Other fea-tures of the device are: Under-Voltage Lockout for both 5V and 12V supplies, an external programmable soft-start function, programming the oscillator frequency via an external resistor, Over-Voltage Protection (OVP) cir-cuitry for both switcher outputs and an internal thermal shutdown.Provides Single Chip Solution for Vcore, GTL+,Clock Supply & 3.3V Switcher On-BoardSecond switcher provides simple control for the on-board 3.3V supply200mA On-Board LDO RegulatorDesigned to meet Intel VRM 8.2 and 8.3 specifica-tion for Pentium II ™On-Board DAC programs the output voltage from 1.3V to 3.5VLinear Regulator Controller On-Board for 1.5V GTL+ supplyLoss-less Short Circuit ProtectionSynchronous Operation allows maximum efficiency Patented architecture allows fixed frequency operation as well as 100% duty cycle during dynamic loadMinimum Part Count Soft-StartHigh current totem pole drivers for directly driving the external Power MOSFETsPower Good function monitors all outputs Over-Voltage Protection circuitry protects the switcher outputs and generates a fault output Thermal ShutdownPACKAGE ORDER INFORMATIONFEATURES 5-BIT PROGRAMMABLE SYNCHRONOUS BUCK, NON-SYNCHRO-NOUS, ADJUSTABLE LDO AND 200mA ON-BOARD LDOAPPLICATIONSTotal Power Solution for Pentium II processor applicationNote: Pentium II and Pentium Pro are trademarks of Intel Corp.T A (°C) DEVICE PACKAGE0 To 70 IRU3007CW 28-pin Plastic SOIC WB (W)Data Sheet No. PD94142V O U T 3V O U T 25VV O U T 1V O U T 4元器件交易网IRU3007ELECTRICAL SPECIFICATIONSSupply UVLO Section UVLO Threshold-12V UVLO Hysteresis-12V UVLO Threshold-5V UVLO Hysteresis-5V Supply CurrentOperating Supply Current VID Section (Vcore only)DAC Output Voltage (Note 1)DAC Output Line Regulation DAC Output Temp Variation VID Input LO VID Input HI VID Input Internal Pull-Up Resistor to V5V FB 2 Voltage Oscillator Section (Internal)Osc Frequency ABSOLUTE MAXIMUM RATINGSV5 Supply Voltage .................................................... 7V V12 Supply Voltage .. (20V)Storage Temperature Range ...................................... -65°C To 150°C Operating Junction Temperature Range ..................... 0°C To 125°CUnless otherwise specified, these specifications apply over V12=12V, V5=5V and T A =0 to 70°C. Typical values refer to T A =25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS Switching Controllers; Vcore (V OUT 1) and I/O (V OUT 2)Supply Ramping Up Supply Ramping Up V12V5Rt=Open 0.99Vs 227100.44.30.3630Vs 0.10.522001.01Vs 0.8V V V V mAV %%V V K V V KHzIRU3007Error Comparator Section Input Bias Current Input Offset Voltage Delay to Output Current Limit Section CS Threshold Set Current CS Comp Offset Voltage Hiccup Duty Cycle Output Drivers Section Rise Time Fall Time Dead Band Time Between High Side and Synch Drive (Vcore Switcher Only)2.5V Regulator (V OUT 4)Reference Voltage Reference Voltage Dropout Voltage Load Regulation Line Regulation Input Bias Current Output Current Current Limit Thermal Shutdown 1.5V Regulator (V OUT 3)Reference Voltage Reference Voltage Input Bias Current Output Drive Current Power Good Section Core UV Lower Trip Point Core UV Upper Trip Point Core UV Hysteresis Core OV Upper Trip Point Core OV Lower Trip Point Core OV Hysteresis I/O UV lower trip point I/O UV Upper Trip Point Fb4 Lower Trip Point Fb4 Upper Trip Point Fb3 Lower Trip Point Fb3 Upper Trip Point Power Good Output LO Power Good Output HI Fault (Over-Voltage) Section Core OV Upper Trip Point Core OV Lower Trip Point Soft-Start Section Pull-Up Resistor to 5V I/O OV Upper Trip Point I/O OV Lower Trip Point Fault Output HI PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS V DIFF =10mV C SS =0.1m F C L =3000pF C L =3000pF C L =3000pF T A =258C, V OUT 4=Fb4I O =200mA 1mA<I O <200mA 3.1V<V I/O <4V, V O =2.5V T A =258C, Gate3=Fb3V SEN 1 Ramping Down V SEN 1 Ramping Up V SEN 1 Ramping Up V SEN 1 Ramping Down V SEN 2 Ramping Down V SEN 2 Ramping Up Fb4 Ramping Down Fb4 Ramping Up Fb3 Ramping Down Fb3 Ramping Up R L =3mA R L =5K Pull Up to 5V V SEN 1 Ramping Up V SEN 1 Ramping Down OCSet=0V, Phase=5V V SEN 2 Ramping Up V SEN 2 Ramping Down I O =3mA -2-520030050m A mV ns m A mV %ns ns ns V V V %%m A mA mA 8C V V m A mA V V V V V V V V V V V V V V V V K V V V V2+2100+5222001070702001.2601.2600.60.50.21451.2601.2600.90Vs 0.92Vs 0.02Vs 1.10Vs 1.08Vs 0.02Vs 2.42.60.951.050.951.050.44.81.17Vs 1.15Vs 234.34.210V O 4V O 3IRU3007PIN DESCRIPTIONSNote 1: Vs refers to the set point voltage given in Table 1D40000000000000000D31111111100000000D21111000011110000D11100110011001100D01010101010101010Vs 1.301.351.401.451.501.551.601.651.701.751.801.851.901.952.002.05D41111111111111111D31111111100000000D21111000011110000D11100110011001100D01010101010101010Vs 2.02.12.22.32.42.52.62.72.82.93.03.13.23.33.43.5Table 1 - Set point voltage vs. VID codesOutput driver for the high-side power MOSFET for the I/O supply.This pin is connected to the Source of the power MOSFET for the I/O supply and itprovides the negative sensing for the internal current sensing circuitry.This pin selects a range of output voltages for the DAC. When in the LO state the rangeis 1.3V to 2.05V and when it switches to HI state the range is 2.0V to 3.5V. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply.MSB input to the DAC that programs the output voltage. This pin is TTL compatible thatrealizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply.Input to the DAC that programs the output voltage. This pin is TTL compatible that real-izes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a27K V resistor to 5V supply.Input to the DAC that programs the output voltage. This pin is TTL compatible that real-izes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a27K V resistor to 5V supply.LSB input to the DAC that programs the output voltage. This pin is TTL compatible thatrealizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply.This pin is an open collector output that switches LO when any of the outputs are outsideof the specified under voltage trip point. It also switches low when V SEN 1 pin is more than 10% above the DAC voltage setting.This pin is connected to the Drain of the power MOSFET of the I/O supply and it providesthe positive sensing for the internal current sensing circuitry. An external resistor pro-grams the CS threshold depending on the R DS of the power MOSFET. An external ca-pacitor is placed in parallel with the programming resistor to provide high frequency noise filtering.PIN# PIN SYMBOL PIN DESCRIPTION 123456789UGate2Phase2VID4VID3VID2VID1VID0PGood OCSet2IRU3007This pin provides the feedback for the non-synchronous switching regulator. A resistordivider is connected from this pin to V OUT 2 and ground that sets the output voltage. The value of the resistor connected from V OUT 2 to Fb2 must be less than 100V .5V supply voltage. A high frequency capacitor (0.1 to 1m F) must be placed close to thispin and connected from this pin to the ground plane for noise free operation.This pin provides the soft-start for the 2 switching regulators. An internal resistor chargesan external capacitor that is connected from 5V supply to this pin which ramps up the outputs of the switching regulators, preventing the outputs from overshooting as well as limiting the input current. The second function of the Soft-Start cap is to provide long off time (HICCUP) for the synchronous MOSFET during current limiting.This pin has dual function. It acts as an output of the OVP circuitry or it can be used toprogram the frequency using an external resistor. When used as a fault detector, if any of the switcher outputs exceed the OVP trip point, the Fault pin switches to 12V and the soft-start cap is discharged. If the Fault pin is to be connected to any external circuitry,it needs to be buffered as shown in the application circuit.This pin provides the feedback for the internal LDO regulator that its output is V OUT 4.This pin is connected to the output of the I/O switching regulator. It is an input thatprovides sensing for the Under/Over-voltage circuitry for the I/O supply as well as the power for the internal LDO regulator.This pin is the output of the internal LDO regulator.This pin serves as the ground pin and must be connected directly to the ground plane.This pin controls the gate of an external transistor for the 1.5V GTL+ linear regulator.This pin provides the feedback for the linear regulator that its output drive is Gate3.No connection.This pin provides the feedback for the synchronous switching regulator. Typically this pincan be connected directly to the output of the switching regulator. However, a resistor divider is recommended to be connected from this pin to V OUT 1 and ground to adjust the output voltage for any drop in the output voltage that is caused by the trace resistance.The value of the resistor connected from V OUT 1 to Fb1 must be less than 100V .This pin is internally connected to the undervoltage and overvoltage comparators sensingthe Vcore status. It must be connected directly to the Vcore supply.This pin is connected to the Drain of the power MOSFET of the Core supply and itprovides the positive sensing for the internal current sensing circuitry. An external resis-tor programs the CS threshold depending on the R DS of the power MOSFET. An external capacitor is placed in parallel with the programming resistor to provide high frequency noise filtering.This pin serves as the Power ground pin and must be connected directly to the groundplane close to the source of the synchronous MOSFET. A high frequency capacitor (typically 1m F) must be connected from V12 pin to this pin for noise free operation.Output driver for the synchronous power MOSFET for the Core supply.This pin is connected to the Source of the power MOSFET for the Core supply and itprovides the negative sensing for the internal current sensing circuitry.Output driver for the high-side power MOSFET for the Core supply.This pin is connected to the 12V supply and serves as the power Vcc pin for the outputdrivers. A high frequency capacitor (typically 1m F) must be placed close to this pin and PGnd pin and be connected directly from this pin to the ground plane for noise free operation.PIN# PIN SYMBOL PIN DESCRIPTION 10111213141516171819202122232425262728Fb2V5SS Fault / Rt Fb4V SEN 2V OUT 4Gnd Gate3Fb3NC Fb1V SEN 1OCSet1PGnd LGate1Phase1UGate1V12IRU3007BLOCK DIAGRAMFigure 2 - Simplified block diagram of the IRU3007.PGoodFb4V OUT 4V SEN 2Gate3Fb3V SEN 1VID4V5V12S SFb2G n d UGate2Fault / RtPhase1OCSet2Phase2OCSet1LGate1UGate1Fb1VID3VID2VID1VID0PGndIRU3007TYPICAL APPLICATIONFigure 3 - Typical application of IRU3007 for an on-board DC-DC converter providing powerfor the Vcore, GTL+, Clock supply as well as an on-board 3.3V I/O supplyfor the Deschutes and the next generation processor applications.V V V OUT 1IRU3007IRU3007 APPLICATION PARTS LISTRef Desig Description Qty Part # Manuf Q1MOSFET1IRL3103S, TO-263 package IR Q2MOSFET1IRLR024, TO-252 package IR Q3MOSFET1IRL3103S, TO-263 package IR Q4MOSFET with Schottky1IRL3103D1S, TO-263 package IR D1Diode1MBRB1035, TO-263 package IR L1Inductor1L=1m H, 5052 core with 4 turns of Micro Metal1.0mm wireL2Inductor1L=4.7m H, 5052 core with 11 turns of Micro Metal1.0mm wireL3Inductor1L=2.7m H, 5052B core with 7 turns of Micro Metal1.2mm wireC1Capacitor, Electrolytic26MV1500GX, 1500m F, 6.3V Sanyo C2Capacitor, Electrolytic110MV470GX, 470m F, 10V Sanyo C3Capacitor, Electrolytic110MV1200GX, 1200m F, 10V Sanyo C4, 13Capacitor, Ceramic21000pF, 0603C5, 10Capacitor, Ceramic2220pF, 0603C8Capacitor, Ceramic11m F, 0805C9, 15, 19Capacitor, Ceramic31m F, 0603C14Capacitor, Electrolytic210MV1200GX, 1200m F, 10V Sanyo C16Capacitor, Electrolytic66MV1500GX, 1500m F, 6.3V Sanyo C17Capacitor, Electrolytic16MV1000GX, 1000m F, 6.3V Sanyo C18Capacitor, Electrolytic16MV150GX, 150m F, 6.3V Sanyo R1, 5, 13,Resistor4 4.7V, 5%, 120614R2Resistor175V, 1%, 0603R3, 6, 7, 8Resistor4100V, 1%, 0603R5Resistor119.1V, 1%, 0603R9Resistor1 1.5K V, 5%, 0603R10Resistor110V, 5%, 1206R12Resistor1 3.3K V, 5%, 0603R16, 17, 21Resistor3 2.2K V, 1%, 0603R19Resistor1220K V, 1%, 0603R22Resistor 110V, 5%, 0603IRU3007TYPICAL APPLICATION(Dual Layout with HIP6019)Figure 4 - Typical application of IRU3007 in a dual layout with HIP6019 for an on-board DC-DC converter providing power for the Vcore, GTL+, Clock supply as well as an on-board 3.3V I/O supply for theDeschutes and the next generation processor application.Components that need to be modified to make the dual layout work for HIP6019 and IRU3007:S - Short O - Open V - See IR or Harris parts list for the valueTable 2 - Dual layout component table.Part # R4 R11 R18 C6 C7 C9 C11 C12 C19 C20HIP6019 V O V V V O V V O V IRU3007 O S O O O V O O V OV V V OUT 1R22IRU3007Ref Desig Description QtyPart #Manuf Q1MOSFET 1IRL3103S, TO-263 package IR Q2MOSFET 1IRLR024, TO-252 package IR Q3MOSFET1IRL3103S, TO-263 package IR Q4MOSFET with Schottky 1IRL3103D1S, TO-263 package IR D1Diode 1MBRB1035, TO-263 package IR L1Inductor 1L=1m H, 5052 core with 4 turns of Micro Metal1.0 mm wireL2Inductor 1L=4.7m H, 5052 core with 11 turns of Micro Metal 1.0mm wireL3Inductor1L=2.7m H, 5052B core with 7 turns of Micro Metal 1.2mm wireC1Capacitor, Electrolytic 26MV1500GX, 1500m F, 6.3V Sanyo C2Capacitor, Electrolytic 110MV470GX, 470m F, 10V Sanyo C3Capacitor, Electrolytic 110MV1200GX, 1200m F, 10V Sanyo C4, 13Capacitor, Ceramic 21000pF, 0603C5, 10Capacitor, Ceramic2220pF, 0603C6,7,11,12Capacitor, Ceramic5See Table 2, dual layout component 200603 3 5C8Capacitor, Ceramic 11m F, 0805C9,15,19Capacitor, Ceramic 31m F, 0603C14Capacitor, Electrolytic 210MV1200GX, 1200m F, 10V Sanyo C16Capacitor, Electrolytic 66MV1500GX, 1500m F, 6.3V Sanyo C17Capacitor, Electrolytic 16MV1000GX, 1000m F, 6.3V Sanyo C18Capacitor, Electrolytic 16MV150GX, 150m F, 6.3V Sanyo R1,13,14Resistor44.7V , 5%, 120615R2Resistor 175V , 1%, 0603R3,6,7,8Resistor 4100V , 1%, 0603R4, 18Resistor 2See Table 2, dual layout component 0603 3 2R5Resistor 119.1V , 1%, 0603R9Resistor 1 1.5K V , 5%, 0603R10Resistor 110V , 5%, 1206R11Resistor 10V , 0603R12Resistor 1 3.3K V , 5%, 0603R16,17,21Resistor3 2.2K V , 1%, 0603R19Resistor 1220K V , 1%, 0603R22Resistor110V , 5%, 0603IRU3007 APPLICATION PARTS LISTDual Layout with HIP6019APPLICATION INFORMATIONAn example of how to calculate the components for the application circuit is given below.Assuming, two set of output conditions that this regula-tor must meet for Vcore:Also, the on-board 3.3V supply must be able to provide 10A load current and maintain less than ±5% total out-put voltage variation.The regulator design will be done such that it meets the worst case requirement of each condition.Output Capacitor Selection VcoreThe first step is to select the output capacitor. This is done primarily by selecting the maximum ESR value that meets the transient voltage budget of the total D Vo specification. Assuming that the regulators DC initial accuracy plus the output ripple is 2% of the output volt-age, then the maximum ESR of the output capacitor is calculated as:The Sanyo MVGX series is a good choice to achieve both the price and performance goals. The 6MV1500GX,1500m F, 6.3V has an ESR of less than 36m V typical.Selecting 6 of these capacitors in parallel has an ESR of ≈ 6m V which achieves our low ESR goal.Other type of Electrolytic capacitors from other manu-facturers to consider are the Panasonic FA series or the Nichicon PL series.3.3V supplyFor the 3.3V supply, since there is not a fast transient requirement, 2 of the 1500m F capacitors is sufficient.Reducing the Output Capacitors Using Voltage Level Shifting TechniqueThe trace resistance or an external resistor from the output of the switching regulator to the Slot 1 can be used to the circuit advantage and possibly reduce the number of output capacitors, by level shifting the DC regulation point when transitioning from light load to full load and vice versa. To accomplish this, the output of the regulator is typically set about half the DC drop that results fromlight load to full load. For example, if the total resistance from the output capacitors to the Slot 1 and back to the Gnd pin of the IRU3007 is 5m V and if the total D I, the change from light load to full load is 14A, then the output voltage measured at the top of the resistor divider which is also connected to the output capacitors in this case,must be set at half of the 70mV or 35mV higher than the DAC voltage setting. This intentional voltage level shift-ing during the load transient eases the requirement for the output capacitor ESR at the cost of load regulation.One can show that the new ESR requirement eases up by half the total trace resistance. For example, if the ESR requirement of the output capacitors without volt-age level shifting must be 7m V then after level shifting the new ESR will only need to be 8.5m V if the trace resistance is 5m V (7+5/2=9.5). However, one must be careful that the combined “voltage level shifting” and the transient response is still within the maximum tolerance of the Intel specification. To insure this, the maximum trace resistance must be less than:Where :Rs = Total maximum trace resistance allowed Vspec = Intel total voltage spec Vo = Output voltageD Vo = Output ripple voltage D I = load current stepFor example, assuming:Vspec = ±140mV = ±0.1V for 2V output Vo = 2VD Vo = assume 10mV = 0.01V D I = 14.2A Then the Rs is calculated to be:However, if a resistor of this value is used, the maximum power dissipated in the trace (or if an external resistor is being used) must also be considered. For example if Rs=12.6m V , the power dissipated is:This is a lot of power to be dissipated in a system. So, if the Rs=5m V , then the power dissipated is about 1W,which is much more acceptable. If level shifting is not implemented, then the maximum output capacitor ESR was shown previously to be 7m V which translated to ≈ 6a) Vo=2.8V , Io=14.2A, D Vo=185mV, D Io=14.2A b) Vo=2V , Io=14.2A, D Vo=140mV, D Io=14.2A ESR [ = 7m V10014.2Io 23Rs = 14.22312.6 = 2.54WRs ≤ 2 3 = 12.6m V(0.140 - 0.02 3 2 - 0.01)Rs [ 2 3(Vspec - 0.02 3 Vo - D Vo)D IT ≡ Switching Period D ≡ Duty CycleVsw ≡ High-side MOSFET ON Voltage R DS ≡ MOSFET On-ResistanceVsync ≡ Synchronous MOSFET ON Voltage D Ir ≡ Inductor Ripple Current D Vo ≡Output Ripple VoltageT = 1 / 200000 = 5m sVsw = Vsync = 14.230.019 = 0.27V D ≈ (2.8 + 0.27) / (5 - 0.27 + 0.27) = 0.61T ON = 0.6135 = 3.1m s T OFF = 5 - 3.1 = 1.9m sD Ir = (2.8 + 0.27)31.9 / 3 = 1.94A D Vo = 1.9430.006 = 0.011V = 11mVVf = 0.5VD MAX ≈ (3.3 + 0.5) / (4.75 - 0.27 + 0.5) = 0.76of the 1500m F, 6MV1500GX type Sanyo capacitors. With Rs=5m V , the maximum ESR becomes 9.5m V which is equivalent to ≈ 4 caps. Another important consideration is that if a trace is being used to implement the resistor,the power dissipated by the trace increases the case temperature of the output capacitors which could seri-ously affect the life span of the output capacitors.Output Inductor SelectionThe output inductance must be selected such that un-der low line and the maximum output voltage condition,the inductor current slope times the output capacitor ESR is ramping up faster than the capacitor voltage is drooping during a load current step. However, if the in-ductor is made too small, the output ripple current and ripple voltage will become too large. One solution to bring the ripple current down is to increase the switching fre-quency, however that will be at the cost of reduced effi-ciency and higher system cost. The following set of for-mulas are derived to achieve optimum performance with-out many design iterations.The maximum output inductance is calculated using the following equation:Where:V IN(MIN) = Minimum input voltageFor Vo = 2.8V and D I = 14.2A, we get:Assuming that the programmed switching frequency is set at 200KHz, an inductor is designed using the Micrometals’ powder iron core material. The summary of the design is outlined below:The selected core material is Powder Iron, the selected core is T50-52D from Micro Metal wound with 8 turns of #16 AWG wire, resulting in 3m H inductance with ≈ 3 m V of DC resistance.Assuming L=3m H and Fsw=200KHz (switching fre-quency), the inductor ripple current and the output ripple voltage is calculated using the following set of equations:L = ESR 3 C 3(V IN(MIN) - Vo (MAX))(2 3 D I)(4.75 - 2.8)(2 3 14.2)L = 0.006 3 9000 3 = 3.7m HIn our example for Vo = 2.8V and 14.2 A load, assuming IRL3103 MOSFET for both switches with maximum on r e s i s t a n c e o f 19m V , we have:Power Component Selection VcoreAssuming IRL3103 MOSFETs as power components,we will calculate the maximum power dissipation as fol-lows:For high side switch the maximum power dissipation happens at maximum Vo and maximum duty cycle.R DS(MAX)=Maximum R DS(ON) of the MOSFET at 1258C For synch MOSFET, maximum power dissipation hap-pens at minimum Vo and minimum duty cycle.3.3V SupplyAgain, for high side switch the maximum power dissipa-tion happens at maximum Vo and maximum duty cycle.The duty cycle equation for non synchronous replaces the forward voltage of the diode with the Synch MOSFET on voltage. In equations below:T = 1 / FswVsw = Vsync = Io 3R DSD ≈ (Vo + Vsync) / (V IN - Vsw + Vsync)T ON = D 3T T OFF = T - T OND Ir = (Vo + Vsync)3T OFF / L D Vo = D Ir 3ESRD MAX ≈ (2.8 + 0.27) / (4.75 - 0.27 + 0.27) = 0.65P DH = D MAX 3Io 23R DS(MAX)P DH = 0.65314.2230.029 = 3.8WD MIN ≈ (2 + 0.27) / (5.25 - 0.27 + 0.27) = 0.43P DS = (1 - D MIN )3Io 23R DS(MAX)P DS = (1 - 0.43)314.22 30.029 = 3.33WD MIN ≈ (3.3 + 0.5) / (5.25 - 0.27 + 0.5) = 0.69P DD = (1 - D MIN )3Io 3VfP DD = (1 - 0.69)31030.5 = 1.55WFor Vo = 1.5V, V IN = 3.3V and I L = 2A:R DS(MAX) = (V IN - Vo) / I L = (3.3 - 1.5) / 2 = 0.9V Vcs = I CL 3R DS = 2230.019 = 0.418V Rcs = Vcs / I B = (0.418V) / (200m A) = 2.1K V P DH = D MAX 3Io 23R DS(MAX)P DH = 0.76310230.029 = 2.21WR DS(MAX) = Maximum R DS(ON) of the MOSFET at 1258C For diode, the maximum power dissipation happens at minimum Vo and minimum duty cycle.Switcher Current Limit ProtectionThe IRU3007 uses the MOSFET R DS(ON) as the sensing resistor to sense the MOSFET current and compares to a programmed voltage which is set externally via a re-sistor (Rcs) placed between the drain of the MOSFET and the “CS+” terminal of the IC as shown in the appli-cation circuit.For example, if the desired current limit point is set to be 22A for the synchronous and 16A for the non syn-chronous, and from our previous selection, the maxi-mum MOSFET R DS(ON)=19mW, then the current sense resistor Rcs is calculated as:VcoreWhere:I B =200m A is the internal current setting of the IRU30073.3V supply1.5V, GTL+ Supply LDO Power MOSFET Selection The first step in selecting the power MOSFET for the 1.5V linear regulator is to select its maximum R DS(ON) of the pass transistor based on the input to output Dropout voltage and the maximum load current.Note: Since the MOSFETs R DS(ON) increases with tem-perature, this number must be divided by ≈ 1.5, in order to find the R DS(ON) max at room temperature. The Motorola MTP3055VL has a maximum of 0.18V R DS(ON) at room temperature, which meets our requirement.To select the heat sink for the LDO MOSFET the first step is to calculate the maximum power dissipation of the device and then follow the same procedure as for the switcher.Where:P D = Power Dissipation of the Linear Regulator I L = Linear Regulator Load Current For the 1.5V and 2A load:Assuming T J(MAX) = 1258C:With the maximum heat sink temperature calculated in the previous step, the heat-sink-to-air thermal resistance (u SA ) is calculated as follows:Assuming T A = 358C:The same heat sink as the one selected for the switcher MOSFETs is also suitable for the 1.5V regulator.2.5V Clock SupplyThe IRU3007 provides a complete 2.5V regulator with a minimum of 200mA current capability. The internal regu-lator has short circuit protection with internal thermal shutdown.1.5V and2.5V Supply Resistor Divider Selection Since the internal voltage reference for the linear regula-tors is set at 1.26V for IRU3007, there is a need to use external resistor dividers to step up the voltage. The re-sistor dividers are selected using the following equations:Where:Rt = Top resistor divider R B = Bottom resistor divider V REF = 1.26V typical For 1.5V supplyAssuming R B = 1K V :Vcs = I CL 3R DS = 1630.019 = 0.3V Rcs = Vcs / I B = (0.3V) / (200m A) = 1.50K V Rt = R B 3[(Vo / V REF ) - 1]Rt = 13[(1.5 / 1.26) - 1] = 191VVo = (1 + Rt / R B )3V REF D T = Ts - T A = 118 - 35 = 838C Temperature Rise Above Ambientu SA = D T / P D = 83 / 3.6 = 238C/WP D = (V IN - Vo)3I LP D = (3.3 - 1.5)32 = 3.6W Ts = T J - P D 3(u JC + u cs)Ts = 125 - 3.63(1.8 + 0.05) = 1188CFor 2.5V supplyAssuming R B = 1.02K V :Switcher Output Voltage Adjust VcoreAs it was discussed earlier, the trace resistance from the output of the switching regulator to the Slot 1 can be used to the circuit advantage and possibly reduce the number of output capacitors, by level shifting the DC regulation point when transitioning from light load to full load and vice versa. To account for the DC drop, the output of the regulator is typically set about half the DC drop that results from light load to full load. For example,if the total resistance from the output capacitors to the Slot 1 and back to the Gnd pin of the IRU3007 is 5m V and if the total D I, the change from light load to full load is 14A, then the output voltage measured at the top of the resistor divider which is also connected to the out-put capacitors in this case, must be set at half of the 70mV or 35mV higher than the DAC voltage setting. To do this, the top resistor of the resistor divider (R12 in the application circuit) is set at 100V , and the R19 is calcu-lated. For example, if DAC voltage setting is for 2.8V and the desired output under light load is 2.835V, then R19 is calculated using the following formula:Note: The value of the top resistor must not exceed 100V .The bottom resistor can then be adjusted to raise the output voltage.3.3V supplyThe loop gain for the non-synchronous switching regula-tor is intentionally set low to take advantage of the level shifting technique to reduce the number of output ca-pacitors. Typically there is a 1% drop in the output volt-age from light load (discontinuous conduction mode) to full load (continuous conduction mode) in the 3.3V sup-ply. To account for this, the output voltage is set at 3.5V typically. The same procedure as for the synchronous is applied to the non-synch with the exception that the in-ternal voltage reference of this regulator is internally set at 2V. The following is the set of equations to use for the output voltage setting for the non-synchronous assum-ing the Vo=3.5V and R2=75V (R2 is the top resistor in the application circuit).Rt = R B 3[(Vo / V REF ) - 1]Rt = 1.023[(2.5 / 1.26) - 1] = 1K VR19 = 1003[V DAC / (Vo - 1.0043V DAC )] (V )R19 = 1003[2.8 / (2.835 - 1.00432.800)] = 11.76K V Select 11.8K V , 1%I = 9000m F 3 (1V / 100ms) = 0.09AR3 = R23[2 / (Vo - 2)] (V )R3 = 753[2 / (3.5 - 2)] = 100V , 1%The bottom resistor, R3 is calculated as follows:Note: The value of the top resistor, R2 must not exceed 100V .Soft-Start Capacitor SelectionThe soft-start capacitor must be selected such that dur-ing the start up when the output capacitors are charging up, the peak inductor current does not reach the current limit threshold. A minimum of 1m F capacitor insures this for most applications. An internal 10m A current source charges the soft-start capacitor which slowly ramps up the inverting input of the PWM comparator Vfb3. This insures the output voltage to ramp at the same rate as the soft-start cap thereby limiting the input current. For example, with 1m F and the 10m A internal current source the ramp up rate is (D V/D t)=I/C=1V/100ms. Assuming that the output capacitance is 9000m F, the maximum start up current will be:Input FilterIt is highly recommended to place an inductor between the system 5V supply and the input capacitors of the switching regulator to isolate the 5V supply from the switching noise that occurs during the turn on and off of the switching components. Typically an inductor in the range of 1 to 3m H will be sufficient in this type of appli-cation.External ShutdownThe best way to shutdown the IRU3007 is to pull down on the soft-start pin using an external small signal tran-sistor such as 2N3904 or 2N7002 small signal MOSFET.This allows slow ramp up of the output, the same as the power up.Layout ConsiderationsSwitching regulators require careful attention to the lay-out of the components, specifically power components since they switch large currents. These switching com-ponents can create large amount of voltage spikes and high frequency harmonics if some of the critical compo-nents are far away from each other and are connected with inductive traces. The following is a guideline of how to place the critical components and the connections between them in order to minimize the above issues.。
ALC5621_DataSheet_1.0
ALC5621I2S AUDIO CODEC + 1.3W CLASS AB/D MONO SPEAKER AMPLIFIERDATASHEETRev. 1.027 December 2007Track ID: JATR-1076-21Realtek Semiconductor Corp.No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, TaiwanTel.: +886-3-578-0211. Fax: +886-3-577-6047I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifierii Track ID: JATR-1076-21 Rev. 1.0COPYRIGHT ©2007 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any means without the written permission of Realtek Semiconductor Corp.DISCLAIMERRealtek provides this document “as is”, without warranty of any kind, neither expressed nor implied, including, but not limited to, the particular purpose. Realtek may make improvements and/or changes in this document or in the product described in this document at any time. This document could include technical inaccuracies or typographical errors.TRADEMARKSRealtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are trademarks/registered trademarks of their respective owners.USING THIS DOCUMENTThis document is intended for the hardware and software engineer’s general information on the Realtek ALC5621 Audio Codec IC.Though every effort has been made to ensure that this document is current and accurate, more information may have become available subsequent to the production of this guide. In that event, please contact your Realtek representative for additional information that may help in the development process. REVISION HISTORYRevision Release Date Summary1.0 2007/12/27 First releaseTable of Contents1.GENERAL DESCRIPTION (1)2.FEATURES (2)3.SYSTEM APPLICATIONS (2)4.BLOCK DIAGRAMS (3)4.1.F UNCTION B LOCK (3)4.2.A UDIO M IXER P ATH (4)5.PIN ASSIGNMENTS (5)5.1.G REEN P ACKAGE AND V ERSION I DENTIFICATION (5)6.PIN DESCRIPTIONS (6)6.1.D IGITAL I/O P INS (6)6.2.A NALOG I/O P INS (6)6.3.F ILTER/R EFERENCE (7)6.4.P OWER/G ROUND (7)7.FUNCTIONAL DESCRIPTION (8)7.1.P OWER (8)7.2.R ESET (8)7.2.1.Power-On Reset (POR) (8)7.3.C LOCKING (9)7.3.1.Phase-Locked Loop (9)7.3.2.I2C and Stereo I2S (10)7.4.D IGITAL D ATA I NTERFACE (11)7.4.1.Stereo I2S/PCM Interface (11)7.5.A UDIO D ATA P ATH (14)7.5.1.Vref (14)7.5.2.Stereo ADC (14)7.5.3.Stereo DAC (14)7.6.M IXERS (15)7.6.1.Headphone Mixer (15)7.6.2.MONO Mixer (16)7.6.3.Speaker Mixer (16)7.6.4.ADC Record Mixer (17)7.7.A NALOG A UDIO I NPUT P ATH (18)7.7.1.Line Input (18)7.7.2.AUXiliary Input (18)7.7.3.Microphone Input (18)7.8.A NALOG A UDIO O UTPUT D ATA P ATH (19)7.8.1.Speaker Output (19)7.8.2.Headphone Output (20)7.8.3.MONO Output (20)7.9.AVC C ONTROL (21)7.10.H ARDWARE S OUND E FFECTS (23)7.10.1.Equalizer Block (23)7.10.2.Pseudo Stereo and Spatial 3D Sound (23)7.11.I2C C ONTROL I NTERFACE (24)7.11.1.Addressing Setting (24)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier iii Track ID: JATR-1076-21 Rev. 1.0plete Data Transfer (24)7.12.O DD-A DDRESSED R EGISTER A CCESS (25)7.13.P OWER M ANAGEMENT (25)7.14.GPIO AND J ACK D ETECT F UNCTION (26)7.15.I NTERNAL E VENT S IGNAL I NTERRUPTS (27)7.16.H EADPHONE D EPOP (27)8.MIXER REGISTERS LIST (28)8.1.R EG-00H:R ESET (28)8.2.R EG-02H:S PEAKER O UTPUT V OLUME (28)8.3.R EG-04H:H EADPHONE O UTPUT V OLUME (29)8.4.R EG-06H:MONO_OUT/AUXOUT V OLUME (30)8.5.R EG-08H:AUXIN V OLUME (30)8.6.R EG-0A H:LINE_IN V OLUME (31)8.7.R EG-0C H:STEREO DAC V OLUME (31)8.8.R EG-0E H:MIC V OLUME (32)8.9.R EG-10H:MIC R OUTING C ONTROL (32)8.10.R EG-12H:ADC R ECORD G AIN (33)8.11.R EG-14H:ADC R ECORD M IXER C ONTROL (33)8.12.R EG-16H:A VOL S OFT V OLUME C ONTROL T IME (34)8.13.R EG-1C H:O UTPUT M IXER C ONTROL (34)8.14.R EG-22H:M ICROPHONE C ONTROL (35)8.15.R EG-34H:D IGITAL A UDIO I NTERFACE C ONTROL (35)8.16.R EG-36A H:S TEREO AD/DA C LOCK C ONTROL (36)8.17.R EG-38H:C OMPANDING C ONTROL (37)8.18.R EG-3A H:P OWER M ANAGEMENT A DDITION 1 (37)8.18.1.Headphone Output Amplifier Configuration (38)8.18.2.Auxiliary Output Amplifier Configuration (38)8.19.R EG-3C H:P OWER M ANAGEMENT A DDITION 2 (39)8.20.R EG-3E H:P OWER M ANAGEMENT A DDITION 3 (40)8.21.R EG-40H:A DDITIONAL C ONTROL R EGISTER (41)8.22.R EG-42H:G LOBAL C LOCK C ONTROL R EGISTER (42)8.23.R EG-44H:PLL C ONTROL R EGISTER (42)8.23.1.Reg-44h: PLL Control Register (42)8.23.2.PLL Clock Setting Table for 48K: (Unit: MHz) (43)8.23.3.PLL Clock Setting Table for 44.1K: (Unit: MHz) (43)8.24.R EG-4A H:GPIO_O UTPUT P IN C ONTROL (43)8.25.R EG-4C H:GPIO P IN C ONFIGURATION (44)8.26.R EG-4E H:GPIO P IN P OLARITY (44)8.27.R EG-50H:GPIO P IN S TICKY (45)8.28.R EG-52H:GPIO P IN W AKE-U P (45)8.29.R EG-54H:GPIO P IN S TATUS (46)8.30.R EG-56H:P IN S HARING (46)8.31.R EG-58H:O VER-C URRENT S TATUS (47)8.32.R EG-5A H:J ACK D ETECT C ONTROL R EGISTER (47)8.33.R EG-5E H:MISC C ONTROL (48)8.34.R EG-60H:S TEREO AND S PATIAL E FFECT B LOCK C ONTROL (49)8.35.R EG-62H:EQ C ONTROL (50)8.36.R EG-66H:EQ M ODE C HANGE E NABLE (51)8.37.R EG-68H:AVC C ONTROL (51)8.38.R EG-6A H:I NDEX A DDRESS (52)8.39.R EG-6C H:I NDEX D ATA (52)8.40.I NDEX-00H:EQ B AND-0C OEFFICIENT (LP0: A1) (52)8.41.I NDEX-01H:EQ B AND-0G AIN (LP0:H O) (52)8.42.I NDEX-02H:EQ B AND-1C OEFFICIENT (BP1: A1) (53)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier iv Track ID: JATR-1076-21 Rev. 1.08.43.I NDEX-03H:EQ B AND-1C OEFFICIENT (BP1: A2) (53)8.44.I NDEX-04H:EQ B AND-1G AIN (BP1:H O) (53)8.45.I NDEX-05H:EQ B AND-2C OEFFICIENT (BP2: A1) (53)8.46.I NDEX-06H:EQ B AND-2C OEFFICIENT (BP2: A2) (54)8.47.I NDEX-07H:EQ B AND-2G AIN (BP2:H O) (54)8.48.I NDEX-08H:EQ B AND-3C OEFFICIENT (BP3: A1) (54)8.49.I NDEX-09H:EQ B AND-3C OEFFICIENT (BP3: A2) (54)8.50.I NDEX-0A H:EQ B AND-3G AIN (BP3:H O) (55)8.51.I NDEX-0B H:EQ B AND-4C OEFFICIENT (HPF: A1) (55)8.52.I NDEX-0C H:EQ B AND-4G AIN (HPF:H O) (55)8.53.I NDEX-11H:EQ I NPUT V OLUME C ONTROL (55)8.54.I NDEX-12H:EQ O UTPUT V OLUME C ONTROL (56)8.55.I NDEX-21H:A UTO V OLUME C ONTROL R EGISTER 1 (56)8.56.I NDEX-22H:A UTO V OLUME C ONTROL R EGISTER 2 (56)8.57.I NDEX-23H:A UTO V OLUME C ONTROL R EGISTER 3 (56)8.58.I NDEX-24H:A UTO V OLUME C ONTROL R EGISTER 4 (57)8.59.I NDEX-25H:A UTO V OLUME C ONTROL R EGISTER 5 (57)8.60.I NDEX-39H:D IGITAL I NTERNAL R EGISTER (57)8.61.I NDEX-46H:C LASS D I NTERNAL R EGISTER (58)8.62.R EG-7C H:VENDOR ID1 (58)8.63.R EG-7E H:VENDOR ID2 (58)9.ELECTRICAL CHARACTERISTICS (59)9.1.DC C HARACTERISTICS (59)9.1.1.Absolute Maximum Ratings (59)9.1.2.Recommended Operating Conditions (59)9.1.3.Static Characteristics (59)9.2.A NALOG P ERFORMANCE C HARACTERISTICS (60)9.3.S IGNAL T IMING (62)9.3.1.I2C Control Interface (62)9.3.2.I2S Master Mode (63)9.3.3.I2S Slave Mode (64)10.APPLICATION CIRCUIT (65)11.MECHANICAL DIMENSIONS (66)12.APPENDIX A: STEREO I2S CLOCK TABLE (68)13.ORDERING INFORMATION (69)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier v Track ID: JATR-1076-21 Rev. 1.0List of TablesT ABLE 1.D IGITAL I/O P INS (6)T ABLE 2.A NALOG I/O P INS (6)T ABLE 3.F ILTER/R EFERENCE (7)T ABLE 4.P OWER/G ROUND (7)T ABLE 5.R ESET O PERATION (8)T ABLE 6.P OWER-O N R ESET V OLTAGE (8)T ABLE 7.C LOCK S ETTING T ABLE FOR 48K(U NIT:MH Z) (9)T ABLE 8.C LOCK S ETTING T ABLE FOR 44.1K(U NIT:MH Z) (10)T ABLE 9.MONO/AUXOUT O UTPUT S IGNAL T ABLE (20)T ABLE 10.A DDRESSING S ETTING (24)T ABLE 11.W RITE WORD P ROTOCOL (25)T ABLE 12.R EAD WORD P ROTOCOL (25)T ABLE 13.R EG-00H:R ESET (28)T ABLE 14.R EG-02H:S PEAKER O UTPUT V OLUME (28)T ABLE 15.R EG-04H:H EADPHONE O UTPUT V OLUME (29)T ABLE 16.R EG-06H:MONO_OUT/AUXOUT V OLUME (30)T ABLE 17.R EG-08H:AUXIN V OLUME (30)T ABLE 18.R EG-0A H:LINE_IN V OLUME (31)T ABLE 19.R EG-0C H:STEREO DAC V OLUME (31)T ABLE 20.R EG-0E H:MIC V OLUME (32)T ABLE 21.R EG-10H:MIC R OUTING C ONTROL (32)T ABLE 22.R EG-12H:ADC R ECORD G AIN (33)T ABLE 23.R EG-14H:ADC R ECORD M IXER C ONTROL (33)T ABLE 24.R EG-16H:A VOL S OFT V OLUME C ONTROL T IME (34)T ABLE 25.R EG-1C H:O UTPUT M IXER C ONTROL (34)T ABLE 26.R EG-22H:M ICROPHONE C ONTROL (35)T ABLE 27.R EG-34H:A UDIO I NTERFACE (35)T ABLE 28.R EG-36H:S TEREO AD/DA C LOCK C ONTROL (36)T ABLE 29.R EG-38H:C OMPANDING C ONTROL (37)T ABLE 30.R EG-3A H:P OWER M ANAGEMENT A DDITION 1 (37)T ABLE 31.H EADPHONE O UTPUT A MPLIFIER C ONFIGURATION (38)T ABLE 32.A UXILIARY O UTPUT A MPLIFIER C ONFIGURATION (38)T ABLE 33.R EG-3C H:P OWER M ANAGEMENT A DDITION 2 (39)T ABLE 34.R EG-3E H:P OWER M ANAGEMENT A DDITION 3 (40)T ABLE 35.R EG-40H:A DDITIONAL C ONTROL R EGISTER (41)T ABLE 36.R EG-42H:G LOBAL C LOCK C ONTROL R EGISTER (42)T ABLE 37.R EG-44H:PLL C ONTROL R EGISTER (42)T ABLE 38.PLL C LOCK S ETTING T ABLE FOR 48K:(U NIT:MH Z) (43)T ABLE 39.PLL C LOCK S ETTING T ABLE FOR 44.1K:(U NIT:MH Z) (43)T ABLE 40.R EG-4C H:GPIO_O UTPUT P IN C ONTROL (43)T ABLE 41.R EG-4C H:GPIO P IN C ONFIGURATION (44)T ABLE 42.R EG-4E H:GPIO P IN P OLARITY (44)T ABLE 43.R EG-50H:GPIO P IN S TICKY (45)T ABLE 44.R EG-52H:GPIO P IN W AKE-U P (45)T ABLE 45.R EG-54H:GPIO P IN S TATUS (46)T ABLE 46.R EG-56H:P IN S HARING (46)T ABLE 47.R EG-58H:O VER-C URRENT S TATUS (47)T ABLE 48.R EG-5A H:J ACK D ETECT C ONTROL R EGISTER (47)T ABLE 49.R EG-5E H:MISC C ONTROL (48)T ABLE 50.R EG-60H:S TEREO AND S PATIAL E FFECT B LOCK C ONTROL (49)T ABLE 51.R EG-62H:EQ C ONTROL (50)T ABLE 52.R EG-66H:EQ M ODE C HANGE E NABLE (51)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier vi Track ID: JATR-1076-21 Rev. 1.0T ABLE 53.R EG-68H:AVC C ONTROL (51)T ABLE 54.R EG-6A H:I NDEX A DDRESS (52)T ABLE 55.R EG-6C H:I NDEX D ATA (52)T ABLE 56.I NDEX-00H:EQ B AND-0C OEFFICIENT (LP0: A1) (52)T ABLE 57.I NDEX-01H:EQ B AND-0G AIN (LP0:H O) (52)T ABLE 58.I NDEX-02H:EQ B AND-1C OEFFICIENT (BP1: A1) (53)T ABLE 59.I NDEX-03H:EQ B AND-1C OEFFICIENT (BP1: A2) (53)T ABLE 60.I NDEX-04H:EQ B AND-1G AIN (BP1:H O) (53)T ABLE 61.I NDEX-05H:EQ B AND-2C OEFFICIENT (BP2: A1) (53)T ABLE 62.I NDEX-06H:EQ B AND-2C OEFFICIENT (BP2: A2) (54)T ABLE 63.I NDEX-07H:EQ B AND-2G AIN (BP2:H O) (54)T ABLE 64.I NDEX-08H:EQ B AND-3C OEFFICIENT (BP3: A1) (54)T ABLE 65.I NDEX-09H:EQ B AND-3C OEFFICIENT (BP3: A2) (54)T ABLE 66.I NDEX-0A H:EQ B AND-3G AIN (BP3:H O) (55)T ABLE 67.I NDEX-0B H:EQ B AND-4C OEFFICIENT (HPF: A1) (55)T ABLE 68.I NDEX-0C H:EQ B AND-4G AIN (HPF:H O) (55)T ABLE 69.I NDEX-11H:EQ I NPUT V OLUME C ONTROL (55)T ABLE 70.I NDEX-12H:EQ O UTPUT V OLUME C ONTROL (56)T ABLE 71.I NDEX-21H:A UTO V OLUME C ONTROL R EGISTER 1 (56)T ABLE 72.I NDEX-22H:A UTO V OLUME C ONTROL R EGISTER 2 (56)T ABLE 73.I NDEX-23H:A UTO V OLUME C ONTROL R EGISTER 3 (56)T ABLE 74.I NDEX-24H:A UTO V OLUME C ONTROL R EGISTER 4 (57)T ABLE 75.I NDEX-25H:A UTO V OLUME C ONTROL R EGISTER 5 (57)T ABLE 76.I NDEX-39H:D IGITAL I NTERNAL R EGISTER (57)T ABLE 77.I NDEX-46H:C LASS D I NTERNAL R EGISTER (58)T ABLE 78.R EG-7C H:VENDOR ID1 (58)T ABLE 79.R EG-7E H:VENDOR ID2 (58)T ABLE 80.A BSOLUTE M AXIMUM R ATINGS (59)T ABLE 81.R ECOMMENDED O PERATING C ONDITIONS (59)T ABLE 82.S TATIC C HARACTERISTICS (59)T ABLE 83.A NALOG P ERFORMANCE C HARACTERISTICS (60)T ABLE 84.I2C T IMING (62)T ABLE 85.T IMING OF I2S M ASTER M ODE (63)T ABLE 86.I2S S LAVE M ODE T IMING (64)T ABLE 87.O RDERING I NFORMATION (69)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier vii Track ID: JATR-1076-21 Rev. 1.0List of FiguresF IGURE 1.B LOCK D IAGRAM (3)F IGURE 2.A UDIO M IXER P ATH (4)F IGURE 3.P IN A SSIGNMENTS (5)F IGURE 4.A UDIO SYSCLK (9)F IGURE 5.PCM M ONO D ATA M ODE A F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0, PCM_MODE_SEL=0) (11)F IGURE 6.PCM M ONO D ATA M ODE A F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=1, PCM_MODE_SEL=0) (11)F IGURE 7.PCM M ONO D ATA M ODE B F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0, PCM_MODE_SEL=1) (12)F IGURE 8.PCM S TEREO D ATA M ODE A F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0, PCM_MODE_SEL=0) (12)F IGURE 9.PCM S TEREO D ATA M ODE B F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0, PCM_MODE_SEL=1) (12)F IGURE 10.I2S D ATA F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0) (13)F IGURE 11.L EFT J USTIFIED D ATA F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0) (13)F IGURE 12.R IGHT J USTIFIED D ATA F ORMAT (STEREO_I2S_BCLK_POLARITY_CTRL=0) (13)F IGURE 13.A UTO V OLUME C ONTROL B LOCK D IAGRAM (22)F IGURE 14.AVC B EHAVIOR (22)F IGURE 15.D ATA T RANSFER O VER I2C C ONTROL I NTERFACE (24)F IGURE 16.GPIO I MPLEMENTATION (26)F IGURE 17.J ACK D ETECT AND IRQ L OGIC (27)F IGURE 18.P OWER C ONTROL TO MIC I NPUT (41)F IGURE 19.J ACK-I NSERT-D ETECT P ULL U P R ESISTER I MPLEMENTED VIA AN E XTERNAL C IRCUIT (49)F IGURE 20.I2C C ONTROL I NTERFACE (62)F IGURE 21.T IMING OF I2S M ASTER M ODE (63)F IGURE 22.I2S S LAVE M ODE T IMING (64)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier viii Track ID: JATR-1076-21 Rev. 1.01.General DescriptionThe ALC5621 is a highly-integrated I2S/PCM interface audio codec with multiple input/output ports and is designed for mobile computing and communications. It provides a Stereo Hi-Fi DAC for playback and Stereo ADC for recording via the I2S/PCM interface.To reduce component count, the device can connect directly to:•MONO or stereo differential analog inputs•LINE_IN stereo Single-Ended analog inputs•AUX_IN Single-Ended analog inputs•Stereo Headphone Output•Single-end stereo configurable to AUXOUT or BTL MONO_OUT•MONO or Stereo Bridge-Tied Load (BTL) speakerMultiple analog input and output pins are provided for seamless integration with analog connected wireless communication devices. Differential input/output connections efficiently reduce noise interference, providing better sound quality. Class AB or Class D amplifiers are easily swapped via simple register configuration, and the 1.3 Watt Mono speaker removes the need for an additional amplifier, further cutting both cost and required board area. Additionally, a flexible hardware 5-band equalizer with configurable gain, bandwidth, and center frequency, enriches the sound experience.The ALC5621 AVDD operates at supply voltages from 2.3V to 3.6V. DVDD operates from 1.71 to 3.6V, and SPKVDD operates from 2.3 to 5V. To extend battery life, each section of the device can be powered down individually under software control. Leakage current in maximum power saving state is less than 10µA.The ALC5621 is available in a 5x5mm ‘Green’ QFN-32 package, making it ideal for use in handheld portable systems.I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 1Track ID: JATR-1076-21 Rev. 1.0I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 2Track ID: JATR-1076-21 Rev. 1.0 2. FeaturesDigital-to-Analog Converter with 92dB SNR and –85dB THD+N Analog-to-Digital Converter with 85dB SNR and –80dB THD+N Two analog stereo single-ended inputs, LINE-IN_L/R and AUXIN_L/R Stereo differential analog microphone inputs, with boost pre-amplifiers (+20/+30/+40dB) BTL (Bridge-Tied Load) Speaker output with on-chip 1.3W speaker driver (SPKVDD=5V, 4.7Ω load with THD+N=40dB) Mono Speaker output supports Class AB or Class D optional Stereo headphone output with on-chip 45mW headphone driver (AVDD=3.3V, 16Ω load) 25mW SE or 75mW BTL Single-Ended differential MONO_OUT configurable to AUXOUT (AVDD=3.3V, 32Ω load)Audio jack insert detection and microphoneswitch detectionPower management and enhanced powersavingSupports digital 5-band equalizer (EQ) Supports digital spatial sound and pseudostereo effectSupports pop noise suppressionInternal PLL can receive wide range of clockinputDigital power supplies from 1.71V to 3.6V;speaker amplifier power supplies from 2.3V to 5VAnalog power and headphone power suppliedfrom 2.3V to 3.6VSupports soft-mute function32-pin QFN package3. System Applications Tablet PC system/Ultra-Mobile PC (UMPC) Personal Digital Assistants (PDA) or PDA Phone Multimedia Phone ApplicationsPortable Navigation Device (PND)Bluetooth HeadphoneI S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier3Track ID: JATR-1076-21 Rev. 1.04.Block Diagrams4.1.Function BlockMICBIASSDAM C L KSCLK SPK_OUT_NSPK_OUT AUXOUT_RAUXOUT_L LINE_IN_R LINE_IN_L MIC1P MIC1N MIC2P MIC2N ALC5621D A C D A TA D C D A TB C L KL R C KAUXIN_L AUXIN_RG P I O /I R QPLL_OUTFigure 1. Block DiagramI S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 4Track ID: JATR-1076-21 Rev. 1.04.2.Audio Mixer Path)10[1210[4]5]L +R+RR+RFigure 2. Audio Mixer PathI S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 5Track ID: JATR-1076-21 Rev. 1.0M I C 1PM I C 2PM I C 1NL I N E _I N _L /J D 1M I C 2NL I N E _I N _R /J D 2L R C KB C L KADCDATDACDAT MCLK DGND DCVDD DBVDD GPIO/IRQ/PLL_OUT SCLKS D AC d e p o pA U X I N _LA U X I N _RA U X O U T _L /M O N O _O U TA U X O U T _R /M O N O _O U T _NS P K _O U TS P K G N DSPKVDD SPK_OUT_NVREF AGND HP_OUT_R HP_OUT_LAVDD MICBIASN C /Figure 3. Pin Assignments5.1. Green Package and Version IdentificationGreen package is indicated by a ‘G’ in the location marked ‘T’ in Figure 3. The version number is shownin the location marked ‘V’.6.1.Digital I/O PinsTable 1. Digital I/O PinsName Type Pin Description Characteristic DefinitionLRCK IO7DigitalAudioSynchronousSignal Master:V OL =0.1*DVDD, V OH =0.9*DVDDSlave: Schmitt triggerBCLK IO8DigitalAudioSerialClock Master:V OL =0.1*DVDD, V OH =0.9*DVDDSlave: Schmitt triggerADCDAT O 9 SerialADCDataOutput V OL =0.1*DVDD, V OH =0.9*DVDD DACDAT I 10 Serial DAC Data Input Schmitt triggerMCLK I 11 Master Clock Input Schmitt triggerGPIO/ IRQ/PLL_OUT IO/O/O15 General Purpose Input And Output/Interrupt Output/PLL OutputGPIO: Input/OutputIRQOUT: OutputPLL_OUT: OutputSCLK I16I2C Clock Schmitt triggerSDA IO17I2C Data Schmitt triggerTotal: 8 Pins6.2.Analog I/O PinsTable 2. Analog I/O PinsName Type Pin Description Characteristic Definition MIC1P I 1 First Mic Positive Input Analog Input (1Vrms) MIC1N I 2 First Mic Negative Input Analog Input (1Vrms) LINE_IN_L/JD1 I 3 Line Input Left Channel/Jack DetectInput_1Analog Input (1Vrms) MIC2P I 4 Second Mic Positive Input Analog Input (1Vrms) MIC2N I 5 Second Mic Negative Input Analog Input (1Vrms) LINE_IN_R/JD2 I 6 Line Input Right Channel/Jack DetectInput_2Analog Input (1Vrms) AUXIN_L I 19 Auxiliary Input Left Channel Analog Input (1Vrms) AUXIN_R I 20 Auxiliary Input Right Channel Analog Input (1Vrms)AUXOUT_L/ MONO_OUT O 21 Positive Mono Output/AuxiliaryOutput Left ChannelAnalog Output (1Vrms)AUXOUT_R/ MONO_OUT_N O 22 Negative Mono Output/AuxiliaryOutput Right ChannelAnalog Output (1Vrms)SPK_OUT O 23 Speaker Output Analog Output (1.5Vrms, SPKVDD=5V) SPK_OUT_N O 25 Negative Speaker Output Analog Output (1.5Vrms, SPKVDD=5V) HP_OUT_R O 29 Headphone Output Right Channel Analog Output (1Vrms)HP_OUT_L O 30 Headphone Output Left Channel Analog Output (1Vrms)Total: 14 PinsI S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 6Track ID: JATR-1076-21 Rev. 1.0I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 7Track ID: JATR-1076-21 Rev. 1.06.3. Filter/ReferenceTable 3. Filter/ReferenceName Type Pin Description Characteristic Definition NC/Cdepop IO 18 NC/De-Pop Capacitor 1µf capacitor to analog ground VREF O 27 Internal Reference V oltage 1µf capacitor to analog ground MICBIAS O 32 MIC BIAS V oltage Output Programmable Analog DC output with 3mA drive Total: 3 Pins6.4. Power/GroundTable 4. Power/Ground Name Type Pin Description Characteristic Definition DGND P 12 Digital GND - DCVDD P 13 Digital VDD 1.71V~3.6V (Core) DBVDD P 14 Digital VDD 1.71V~3.6V (IO Buffer) SPKGND P 24 Analog GND for Speaker Amps - SPKVDD P 26 Analog VDD for Speaker Amps 2.3V~5V AGND P 28 Analog GND - A VDD P 31 Analog VDD 2.3V~3.6V Total: 7 Pins7.Functional Description7.1.PowerThe ALC5621 has many power blocks. SPKVDD operates between 2.3V and 3.0V for weak Class AB amplifiers, and between 3.0V and 5V for strong Class AB amplifiers. The full range is available for ClassD amplifiers.AVDD operates between 2.3V and 3.6V. DBVDD and DCVDD operate between 1.71V and 3.6V. TheALC5621 must handle ratio control between the different power blocks. The power supplier limit conditions are DBVDD ≥ DCVDD, and SPKVDD ≥ AVDD ≥ DCVDD.7.2.ResetThere are two types of reset operation: Power-On Reset (POR) and Register reset.Table 5. Reset OperationReset Type Trigger Condition CODEC ResponsePOR Monitor digital power supply voltage reach V POR Reset all hardware logic and all registers to defaultvalues.Register Reset Write Reg-00h Reset all registers to default values except PLLrelated register7.2.1.Power-On Reset (POR)When powered on, DCVDD passes through the V POR band of ALC5621 (V PORH ~V PORL). A Power-On Reset (POR) will generate an internal reset signal (POR reset ‘LOW’) to reset the whole chip.Table 6. Power-On Reset VoltageSymbol Min Typical Max UnitV POR_ON 1.0 - 1.6 V V POR_OFF- 1.3 - V Note: V POR_OFF must be below V POR_ON.I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 8Track ID: JATR-1076-21 Rev. 1.0I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 9Track ID: JATR-1076-21 Rev. 1.07.3. ClockingThe Audio SYSCLK can be selected from MCLK or PLL. The clock source of PLL can be selected from MCLK or BCLK. The ALC5621 only supports 256Fs or 384Fs as Audio SYSCLK (used as Stereo I 2Sclock).Figure 4. Audio SYSCLK7.3.1. Phase-Locked LoopA Phase-Locked Loop (PLL) is used to provide a flexible input clock from 2.048MHz to 40MHz. Typicalchoices are 2.048MHz, 4.096MHz, and 13MHz. The source of the PLL can be set to MCLK or BCLK by setting pll_sour_sel (Reg42[14]).The source clock of MCLK must be able to drive I 2C, and F/W can setup PLL to output the desired frequency as the SYSCLK.The PLL transmit formula is: F OUT = (MCLK * (N+2)) / ((M+2) * (K+2)) {Typical K=2}Table 7. Clock Setting Table for 48K (Unit: MHz)MCLK N M F VCO K F OUT13 66 7 98.222 2 24.555 3.6864 78 1 98.304 2 24.576 2.048 94 0 98.304 2 24.576 4.096 70 1 98.304 2 24.576 12 80 8 98.4 2 24.6 15.36 81 11 98.068 2 24.517 16 78 11 98.462 2 24.615 19.2 80 14 98.4 2 24.6 19.68 78 14 98.4 2 24.6Table 8. Clock Setting Table for 44.1K (Unit: MHz)MCLK N M F VCO K F OUT13 68 8 91 2 22.753.6864 72 1 90.931 2 22.7332.048 86 0 90.112 2 22.5284.096 64 1 90.112 2 22.52812 66 7 90.667 2 22.66715.36 63 9 90.764 2 22.69116 66 10 90.667 2 22.66719.2 64 12 90.514 2 22.62919.68 67 13 90.528 2 22.632 After a Cold Reset, PLL related Registers are reset to default values, however, they are not reset to default values after a soft-reset (write Reg00).7.3.2.I2C and Stereo I2SThe ALC5621 supports the I2S digital interface for Stereo Audio. The stereo audio digital interface is used to input data to the stereo DAC or output data from the stereo ADC. The Stereo Audio Digital Interface can be configured as Master mode or Slave mode. For the Stereo I2S Interface, the source system clock is always input from MCLK. Refer to section 12 Appendix A: Stereo I2S Clock Table, page 68 for details.Master ModeIn master mode (stereo_i2s_mode_sel=0), BCLK and LRCK are configured as output. Whensel_sysclk=0, MCLK is used as Stereo SYSCLK. When PLL is enabled and sel_sysclk=1, MCLK is suggested to provide frequencies shown in Table 7 Clock Setting Table for 48K (Unit: MHz) and Table 8 Clock Setting Table for 44.1K (Unit: MHz). PLL can be configured to support 44.1K and 48K base sampling rate.Slave ModeIn slave mode (stereo_i2s_mode_sel=1), BCLK/LRCK is configured as input. MCLK should provide the BCLK synchronized clock externally as the Stereo_SYSCLK.Note: The ALC5621 does not support different sample rates between SDAC and ADC in Stereo_I2S/PCM.I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 10Track ID: JATR-1076-21 Rev. 1.0I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 11Track ID: JATR-1076-21 Rev. 1.07.4.Digital Data Interface7.4.1.Stereo I 2S/PCM InterfaceThe stereo I 2S/PCM interface can be configured as Master mode or Slave mode. Four audio data formats are supported: • PCM mode • Left justified mode • Right justified mode • I 2S modeFigure 5. PCM Mono Data Mode A Format (stereo_i2s_bclk_polarity_ctrl=0, pcm_mode_sel=0)Figure 6. PCM Mono Data Mode A Format (stereo_i2s_bclk_polarity_ctrl=1, pcm_mode_sel=0)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 12Track ID: JATR-1076-21 Rev. 1.0Figure 7. PCM Mono Data Mode B Format (stereo_i2s_bclk_polarity_ctrl=0, pcm_mode_sel=1)Figure 8. PCM Stereo Data Mode A Format (stereo_i2s_bclk_polarity_ctrl=0, pcm_mode_sel=0)Figure 9. PCM Stereo Data Mode B Format (stereo_i2s_bclk_polarity_ctrl=0, pcm_mode_sel=1)I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier13Track ID: JATR-1076-21 Rev. 1.0Figure 10. I 2S Data Format (stereo_i2s_bclk_polarity_ctrl=0)Figure 11. Left Justified Data Format (stereo_i2s_bclk_polarity_ctrl=0)Figure 12. Right Justified Data Format (stereo_i2s_bclk_polarity_ctrl=0)7.5.Audio Data Path7.5.1.VrefVref is the reference voltage for all analog blocks. An external 1µF Capacitor connected to AGND is required. The default status of Vref is enabled after power on. Driver can set Index-39[11]=0b in order to enable power control bit of Reg-3C[13]:pow_vref.7.5.2.Stereo ADCThe stereo ADC is used for recording stereo sound. The sample rate of the stereo ADC is independent of the stereo DAC sample rate. In order to save power, the left and right ADC can be powered down separately by setting adc_l_vol & adc_r_volThe sample rate of the Stereo ADC is the same as the sample rate of Stereo DAC (described in the following section).7.5.3.Stereo DACThe stereo DAC can be configured to different sample rates by driving 256Fs/384Fs into audio SYSCLK with setting divider properly (Reg36). adda_osr is used to control the over sample rate clock divider of the DA filter to 128Fs or 64Fs.Performance of 128Fs is better than 64Fs but with much higher power consumption. Refer to section 12 Appendix A: Stereo I2S Clock Table, page 68 for detailed settings.dac_l_vol & dac_r_vol can be used to control the DAC output volume.I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 14Track ID: JATR-1076-21 Rev. 1.07.6.MixersThe ALC5621 supports four mixers for all audio function requirements:•Headphone mixer for 2 channels•MONO mixer•Speaker mixer•ADC record mixer7.6.1.Headphone MixerThe headphone mixer is used to drive stereo output, including HP_OUT_L/R, SPK_OUT, and MONO_OUT (AUXOUT_L/R). The output of the headphone mixer can be input to the ADC record mixer.The following signals can be mixed into the headphone mixer:•LINE-IN_L/R (Controlled by Reg0A)•PHONEP/N (Controlled by Reg08)•MIC1P/N and MIC2P/N (Controlled by Reg22 & Reg10)•Stereo DAC output (Controlled by Reg0C)•ADC record mixer output (Controlled by Reg12 & Reg14).When the SPK_OUT source is from the HP_mixer, SPK_OUT can be configured to L/R, L+R, and L/LN by setting spk_outn_source. The headphone mixer can be powered down by setting pow_mix_hp_l & pow_mix_hp_r.I S Audio Codec + 1.3W Class AB/D Mono Speaker Amplifier 15Track ID: JATR-1076-21 Rev. 1.0。
RS Pro K78_T-1000R3 DC-DC转变器广角输入电压非隔离和调节单输出说明书
ENSelection GuideCertification RS Stock no.(StandardPack)RS Stock no.(Tube Pack32pcs)Part No.Input Voltage(VDC)*Output Full LoadEfficiency (%)Vin Min. / Vin Max.Max.CapacitiveLoad (µF)Nominal(Range)Voltage(VDC)Current(mA) Max.CE 1933988 1933987 K7803T-1000R324(6.5-36)3.3 1000 90/80 680 1933990 1933989 K7805T-1000R324(8-36)5 1000 93/85 680 1933992 1933991 K78X6T-1000R324(10-36)6.5 1000 93/86 680 1933994 1933993 K7812T-1000R324(16-36)12 800 95/92 680Note:*For input voltage exceeding 30 VDC, an input capacitor of 22uF/50V is required.Input SpecificationsItem Operating Conditions Min. Typ. Max. Unit No-load Input Current-- 0.2 1 mA Reverse Polarity at Input Avoid / Not protectedInput Filter Capacitance filterCtrl* Module on Open or pulled high (TTL level 3.2-5.5VDC) Module offPulled low to GND level(0-0.8VDC)Input current when off -- 0.21mADatasheetRS Pro K78_T-1000R3 DC-DC ConverterWide input voltage non-isolated and regulated single output.RoHS FEATURES⚫High efficiency up to 95%⚫No-load input current as low as 0.2mA⚫Operating ambient temperature range -40℃ to +85℃⚫Output short-circuit protection⚫SMD package⚫EN62368 Approval⚫ 3 Year WarrantyK78_T-1000R3 series are high efficiency switching regulators. The converters feature high efficiency, low loss and short circuit protection in a compact SMD package. These products are widely used in applications such as industrial control, instrumentation and IoT.Output SpecificationsItem Operating Conditions Min. Typ. Max. UnitVoltage Accuracy Full load, input voltagerange3.3VDC o utput -- ±2±4%Others -- ±2±3Linear Regulation Full load, input voltage range -- ±0.2 ±0.4Load Regulation Nominal input voltage, 10% -100% load -- 0.3 ±0.6 %Ripple & Noise* 20MHz bandwidth -- 30 75 mVp-p Temperature Coefficient Operating temperature range -40℃ to +85℃-- -- ±0.03%/℃Transient Response DeviationNominal input voltage, 25% load step change -- 50 150 mVTransient Recovery Time-- 0.2 1 ms Short-circuit Protection Nominal input Continuous, self-recoveryVadj Input voltage range -- ±10 -- %Vo Note: *①The “parallel cable” method is used for ripple and noise test, please refer to DC-DC Converter Application Notes for specific information;② With light loads at or below 20%, Ripple & Noise increases to 150mVp-p max.General SpecificationsItem Operating Conditions Min. Typ. Max. Unit Operating Temperature See Fig. 1 -40 -- +85℃Storage Temperature-55 -- +125Storage Humidity Non-condensing 5 -- 95 %RH Reflow Soldering Temperature Peak temperature ≤245℃, duration ≤60s max. over 217℃. Also refer to IPC/JEDEC J-STD-020D.1.Switching Frequency Full load, nominalinput3.3/5/6.5VDC o utput -- 520--KHz09/12VDC o utput -- 700--MTBF MIL-HDBK-217F@25℃2000 -- -- K hoursMechanical SpecificationsCase Material Black plastic; flame-retardant and heat-resistant (UL94 V-0)Dimensions15.24 x11.40 x 8.25 mmWeight 1.7g (Typ.)Cooling Method Free air convectionElectromagnetic Compatibility (EMC)Emissions CE CISPR32/EN55032 CLASS B (see Fig. 4-② for recommended circuit) RE CISPR32/EN55032 CLASS B (see Fig. 4-② for recommended circuit)Immunity ESD IEC/EN 61000-4-2 Contact ±4KV perf. Criteria B RS IEC/EN 61000-4-3 10V/m perf. Criteria A EFT IEC/EN 61000-4-4 ±1KV (see Fig. 4-① fo r recommended circuit) perf. Criteria B Surge IEC/EN 61000-4-5 line to line ±1KV (see Fig. 4-① for rec ommended circuit) perf. Criteria B CS IEC/EN 61000-4-6 3Vr.m.s perf. Criteria ATypical Characteristic Curves9V o utput 12V o utputOther o utputsFig. 1Design Reference1. Typical applicationFig. 2 Typical application circuitPart No. C1(ceramic capacitorC2 (ceramic capacitor) Ra1/Ra2 (Vadj resistance) K7803T-1000R3 10µF/50V 22µF/10V Refer to Vadj resistance calculationK7805T-1000R322µF/16V K78X6T-1000R3 22µF/16V K7812T-1000R322µF/25V table 1Note:1. The required C1 and C2 capacitors must be connected as close as possible to the terminals of the module.2. Refer to T able 1 for C1 and C2 capacitor values. For certain applications, increased values and/or tantalum or low ESR electrolytic capacitors may also be used instead.3. Converter cannot be used for hot swap and with output in parallel.4. To further reduce the output ripple and noise, we suggested the use of a “LC ” fi lter at the output terminals, with an inductor value (L) of 10µH -47µH.Fig. 3 External “LC” output filter circuit diagram2. EMC compliance circuitFig.4 Recommended compliance circuitNote: Part ①in Fig. 4 shows EMS compliance filter and part ② filter for EMI compliance; depending on requirement both filters ① and ② can be used in seri esas shown.FUSEMOV LDM1 C0 C2C1/C5 LDM2 Select fuse value according toactual input currentS20K3082µH680µF /50VRefer to table 14.7µF /50V68µH3.Trim Function for Output Voltage Adjustment (open if unused)0V R2R1R3V re fR a2Va djVo’0V R2R1R3Vref R a1Va djVo’Va dj up Va dj downFig.5 Circuit diagram of Vadj up and down (dashed line shows internal part of module)Calculating Trim resistor values:up: a=VrefVo’-Vre fR1R=a2a R2R-a2-R3down:a=VrefVo’-Vre fR2R=a1a R1R-a1-R3Ra1、Ra2= Trim Resistor value;a= self-defined parameter;Vo’=desired output voltage.Vout(V) R1(KΩ)R2(KΩ)R3(KΩ)Vref(V) 3.3 75 22 75 0.755 43 7.5 33 0.756.5 43 5.6 22 0.7512 36 2.4 10 0.75Dimensions and Recommended LayoutNotes:1.The max. capacitive load should be tested within the input voltage range and under full load conditions;2.Unless otherwise specified, data in this data table should be tested under the conditions of T a=25℃, humidity<75%RH wheninputting nominal voltage and outputting rated load;3.All index testing methods in this data table are based on our Company’s corporate standards;4.The performance indexes of the product models listed in this manual are as above, but some indexes of non-standard modelproducts will exceed the above-mentioned requirements, and please directly contact with our technician for specific information;5.Products are related to laws and regulations: see "Features" and "EMC";6.Our products shall be classified according to ISO14001 and related environmental laws and regulations and shall be handled byqualified units.。
MIC23150 4MHz 2A 切换电源寄生模式芯片说明书
MIC23150 Evaluation Board4MHz 2A Buck Regulator withHyperLight Load™HyperLight Load is a trademark of Micrel, Inc. MLF is a registered trademark of Amkor Technology.Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • General DescriptionThe MIC23150 is a 2A 4MHz switching regulator featuring HyperLight Load™ mode. The MIC23150 is highly efficient throughout the entire output current range, drawing just 23µA of quiescent current in operation. The tiny 2mm x2mm MLF ®package, in combination with the 4MHz switching frequency, enables a compact sub-1mm height solution with only three external components. The MIC23150 provides accurate output voltage regulation under the most demanding conditions and responds extremely quickly to a load transient with exceptionally small output voltage ripple.Factoring in the output current, the internal circuitry of the MIC23150 automatically selects between two modes of operation for optimum efficiency. Under light load conditions, the MIC23150 goes into HyperLight Load™mode. HyperLight Load™ uses a Pulse-Frequency Modulation (PFM) control scheme that controls the off time at light load. This proprietary architecture reduces the amount of switching needed at light load, thereby increasing operating efficiency. The MIC23150 attains up to 87% efficiency at 1mA output load. As the load current increases beyond approximately 100mA, the device operates using the Pulse-Width Modulation (PWM) method for up to 93% efficiency at higher load. The two modes of operation ensure the highest efficiency across the entire load range.The MIC23150 operates from an input voltage range of 2.7V to 5.5V and features internal power MOSFETs that deliver up to 2A of output current. This step-down regulator provides an output voltage accuracy of +/-2.5% across the junction temperature range of -40ºC to +125ºC. The MIC23150 is available in fixed output versions supporting an output voltage as low as 1.0V.RequirementsThe MIC23150 evaluation board requires an input power source that is able to deliver greater than 2A at 2.7V to the MIC23150. The output load can either be an active (electronic) or passive (resistive) load.Getting Started1. Connect an external supply to the V IN (J1)terminal . Apply the desired input voltage to V IN (J1) and ground (J2) terminals of the evaluation board, paying careful attention to polarity and supply voltage (2.7V ≤ V IN ≤ 5.5V). An ammeter may be placed between the input supply and the V IN (J1) terminal. Be sure to monitor the supply voltage at the V IN (J1) terminal, since the ammeter and/or power lead resistance can reduce the voltage supplied to the device.2. Connect a load to the V OUT (J3) and groundterminal (J4). The load can be either passive (resistive) or active (electronic load). An ammeter may be placed between the load and the output terminal. Ensure the output voltage is monitored at the V OUT (J3) terminal.3. Enable the MIC23150. The MIC23150 evaluationboard has a pull-up resistor to V IN . To disable the device, apply a voltage below 0.5V to the EN (J5)terminal. In the absence of the pull-up resistor, the device is enabled by applying a voltage greater than 1.2V to the EN (J5) terminal. The enable pin must be either pulled high or low for proper operation. Removing the pull-up resistor and leaving the pin floating will cause the regulator to operate in an unknown state.Output VoltageThe MIC23150 evaluation board is available with the following output voltage options listed below:Ordering InformationPart Number Description(2)MIC23150-CYMT EV (1) 1.0V Fixed Output Evaluation Board MIC23150-4YMT EV(1)1.2V Fixed Output Evaluation Board MIC23150-GYMT EV 1.8V Fixed Output Evaluation Board MIC23150-SYMT EV3.3V Fixed Output Evaluation BoardNote:1. Contact Micrel Marketing2. Other voltage options available on request. Contact Micrel.HyperLight Load™ ModeMIC23150 uses a minimum on and off time proprietary control loop (patented by Micrel). When the output voltage falls below the regulation threshold, the error comparator begins a switching cycle that turns the PMOS on and keeps it on for the duration of the minimum-on-time. This increases the output voltage. If the output voltage is over the regulation threshold, then the error comparator turns the PMOS off for a minimum-off-time until the output drops below the threshold. The NMOS acts as an ideal rectifier that conducts when the PMOS is off. Using a NMOS switch instead of a diode allows for lower voltage drop across the switching device when it is on. The asynchronous switching combination between the PMOS and the NMOS allows the control loop to work in discontinuous mode for light load operations. In discontinuous mode, the MIC23150 works in pulse frequency modulation (PFM) to regulate the output. As the output current increases, the off-time decreases, thus provides more energy to the output. This switching scheme improves the efficiency of MIC23150 during light load currents by only switching when it is needed. As the load current increases, the MIC23150 goes into continuous conduction mode (CCM) and switches at a frequency centered at 4MHz. The equation to calculate the load when the MIC23150 goes into continuous conduction mode may be approximated by the following formula:˜˜¯ˆÁÁËÊ¥¥->f L D V V I OUT IN LOAD 2)(As shown in the previous equation, the load at which MIC23150 transitions from HyperLight Load™ mode to PWM mode is a function of the input voltage (V IN ), output voltage (V OUT ), duty cycle (D), inductance (L) and frequency (f). As shown in Figure 1, as the Output Current increases, the switching frequency also increases until theMIC23150 goes from HyperLight Load TMmode to PWM mode at approximately 120mA. The MIC23150 will switch at a relatively constant frequency around 4MHz once the output current is over 120mA.Figure 1. SW Frequency vs. Output CurrentMIC23150 Typical Application CircuitBill of MaterialsItem Part Number Manufacturer Description Qty. C1, C2C1608X5R0J475K TDK(1) 4.7µF Ceramic Capacitor, 6.3V, X5R, Size 06032 R1CRCW06031002K0FKEA Vishay(2)10kΩ, 1%, Size 06031 VLS3010T-1R0N1R9TDK(1)1µH, 1.9A, 60mΩ, L3.0mm x W3.0mm x H1.0mm1 L1VLS4012T-1R0N1R6TDK(1)1µH, 2.8A, 50mΩ, L4.0mm x W4.0mm x H1.2mmDO2010-102ML Coilcraft(3)1µH, 1.8A, 162mΩ, L2.0mm x W2.0mm x H1.0mm U1MIC23150-xYMT Micrel, Inc.(4)4MHz 2A Buck Regulator with HyperLight Load™ Mode1 Notes:1. TDK: .2. Vishay: .3. Coilcraft: .4. Micrel, Inc.: .PCB Layout RecommendationsTop LayerBottom Layer。
LPN-RK系列双元件时延断电保护器技术数据手册说明书
LPN-RK — 250 Vac/125 Vdc, 1⁄10-60 A, dual element, time-delay fusesCatalog symbols:• LPN-RK(amp)SP (non-indicating)• LPN-RK(amp)SPI (indicating) Description:Ultimate protection Class RK1 dual element, current-limiting, time-delay fuses available with optional open fuse indication. Time-delay – 10 seconds (minimum) at 500% of rated current (8 seconds for 0-30A sizes). Specifications:Ratings• Volts• 250 Vac• 125 Vdc*• Amps 1/10-60A• IR• 300 kA Vac RMS Sym.• 100kA Vdc* Indicating versions not Vdc rated.Agency Information• cULus Listed file No. JDDZ.E4273• UL 248-12 – Class RK1 Fuses• CSA C22.2 No. 248.12 – Class RK1 Fuses• CELPN-RK-15/100SP LPN-RK-2-1/4SP LPN-RK-10SP LPN-RK-2/10SP LPN-RK-2-1/2SP LPN-RK-12SP LPN-RK-3/10SP LPN-RK-2-8/10SP LPN-RK-15SP LPN-RK-4/10SP LPN-RK-3SP LPN-RK-17-1/2SP LPN-RK-1/2SP LPN-RK-3-2/10SP LPN-RK-20SP LPN-RK-6/10SP LPN-RK-3-1/2SP LPN-RK-25SP LPN-RK-8/10SP LPN-RK-4SP LPN-RK-30SP LPN-RK-1SP LPN-RK-4-1/2SP LPN-RK-35SP* LPN-RK-1-1/8SP LPN-RK-5SP LPN-RK-40SP* LPN-RK-1-1/4SP LPN-RK-5-6/10SP LPN-RK-45SP* LPN-RK-1-4/10SP LPN-RK-6SP LPN-RK-50SP* LPN-RK-1-6/10SP LPN-RK-6-1/4SP LPN-RK-60SP* LPN-RK-1-8/10SP LPN-RK-8SP* Open fuse indication available by inserting the suffix “I,”e.g. LPN-RK-50SPI. Requires 75Vac minimum voltage. Indicating fuses are not Vdc rated.Carton quantity• 10Features and benefits• Industry’s only UL Listed and CSA Certified fuse with a 300 kA interrupting rating that allows for simple, worry-free installation in virtually any application.• Fast short-circuit protection and dual-element, time-delay performance provide ultimate protection.• Reduces existing fuse inventory by up to 33% when upgrading to Low-Peak fuses.• Consistent 2:1 ampacity ratios for all Low-Peak fuses make selective coordination easy.• Time-delay permits 130% FLA sizing for back-up motor protection.• Current-limitation protects downstream components against damaging thermal and magnetic effects of short-circuit currents.• Protects against single-phase motor damage.• Proper sizing can provide “no damage” Type 2 coordinated protection for NEMA and IEC motor controllers.2Technical Data 1003Effective July 2023LPN-RK — 250 Vac/125 Vdc, 1⁄10-60 A, dual element, time-delay fuses/bussmannseriesRecommended fuse blocks60RM25060-1_RM25060-2_RM25060-3_For additional information on the 250 volt fuse blocks, see data sheets no. 10289.Fuse reducers for Class R fuses100 A30 ANO.213-R 60 ANO.216-R 200 A 60 ANO.226-RFor additional information on Class R fuse reducers, see data sheet no. 1118.Dimensions — inTime-current curves - average melt 1/10 to 12 ampsAMP RATING3001001010.10.010.11101001000CURRENT IN AMPST I M E I N S E C O N D S0.10.20.150.30.40.6.500.811.251.622.53.2456.25810123Technical Data 1003Effective July 2023LPN-RK — 250 Vac/125 Vdc, 1⁄10-60 A, dual element, time-delay fuses /bussmannseriesTime-current curves - average melt 15 to 60 amps20A60A30AAMP RATING15A CURRENT IN AMPS20100100010,000T I M E I N S E C O N D S3001001010.10.01Current-limitation curvesCurrent-limiting effects10001000100020001000100030001000100050001000200010,0001000200015,0001000200020,0001000300025,0001000300030,0002000300035,0002000300040,0002000300050,0002000300060,0002000300070,0002000300080,0002000400090,00020004000100,00020004000150,00020004000200,00030005000250,00030005000300,0003000600060A30AA M P R A T I N GI N S T A N T A N E O U S P E A K L E T -T H R O U G H C U R R E N T I N A M P S400,00090008000700060006000300,000200,000100,00050004000400090,000300020001000300080,00070,00060,00050,00060,000200,00020,000200040,000100,00010,000100030,00080,00040,000800030,00020,00010,000300,000ARMS SYMMETRICAL CURRENT IN AMPSA-B = ASYMMETRICAL AVAILABLE PEAK (2.3 X SYM RMS AMPS)LPN-RK — 250 Vac/125 Vdc, 1⁄10-60 A, dual element, time-delay fusesTechnical Data 1003Effective July 2023Follow us on social media to get thelatest product and support information.The only controlled copy of this data sheet is the electronic read-only version located on the Eaton network drive. All other copies of this document are by definition uncontrolled. This bulletin is intended to clearly present comprehensive product data and provide technical information that will help the end user with design applications. Eaton reserves the right, without notice, to change design or construction of any products and to discontinue or limit distribution of any products. Eaton also reserves the right to change or update, without notice, any technical information contained in this bulletin. Once a product has been selected, it should be tested by the user in all possible applications.Eaton, Bussmann and Low-Peak are valuable trademarks of Eaton in the U.S. and other countries. Y ou are not permitted to use the Eaton trademarks without prior written consent of Eaton.CSA is a registered trademark of the Canadian Standards Group.UL is a registered trademark of the Underwriters Laboratories, Inc.Eaton1000 Eaton Boulevard Cleveland, OH Bussmann Division 114 Old State Road Ellisville, MO 63021United States/bussmannseries © 2023 EatonAll Rights Reserved Printed in USAPublication No. 1003July 2023。
ISIS_7_Professional元件库列表
模拟芯片(Analog ICs )放大器(Amplifiers)比较器(Comparators)显示驱动器(Display Drivers)过滤器(Filters)数据选择器(Multiplexers)稳压器(Regulators)定时器(Timers)基准电压(Voltage Referenee) 杂类(Miseellananeous)电容(Capaeitors)可动态显示充放电电容(An imated)音响专用轴线电容(Audio Grade Axial)轴线聚苯烯电容(Axial Lead Polyprope ne)轴线聚苯烯电容(Axial Lead Polystyre ne)陶瓷圆片电容(Ceramic Disc)去耦片状电容(Deeoupling Disc)普通电容(Generic)高温径线电容(High Temp Radial)高温径线电解电容(High Temperature Axial Electrolytic)金属化聚酯膜电容(Metallised Polyester Film) 金属化聚烯电容(Metallised Polypropene)金属化聚烯膜电容( Metallised Polyprope ne Film)小型电解电容(Miniture Electrolytic)多层金属化聚酯膜电容( Multilayer Metallised Polyestern Film) 聚脂膜电容(Mylar Film)镍栅电容(Nickel Barrier)无极性电容(Non Polarised)聚脂层电容(Polyester Layer)径线电解电容(Radial Electrolytic)树脂蚀刻电容(Resin Dipped)钽珠电容(Tantalum Bead)可变电容(Variable)VX 轴线电解电容(VX Axial Electolytic)连接器(Connectors)音频接口( Audio)D 型接口( D-Type)双排插座(DIL)插头(Header Blocks)PCB 转接器(PCB Transfer)带线(Ribbon Cable)单排插座(SIL)连线端子(Terminal Blocks)杂类(Miscellananeous) 数据转换器(Data Converter) 模/数转换器(A/D converters) 数/模转换器(D/A converters) 采样保持器(Sample & Hold) 温度传感器(Temperature Sen sore) 调试工具(Debugging Tools) 断点触发器(Breakpoint Triggers) 逻辑探针(Logic Probes) 逻辑激励源(Logic Stimuli) 二极管(Diode) 整流桥(Bridge Rectifiers) 普通二极管(Generic) 整流管(Rectifiers) 肖特基二极管(Schottky) 开关管(Switching) 隧道二极管(Tunnel) 变容二极管(Varicap) 齐纳击穿二极管(Zener)ECL 10000 系列(ECL 10000 Series) 各种常用集成电路机电(Electromechanical)各种直流和步进电机电感(Inductors) 普通电感(Generic) 贴片式电感(SMT In ductors) 变压器(Transformers) 拉普拉斯变换(Laplace Primitives) 一阶模型(1st Order) 二阶模型(2st Order) 控制器(Controllers) 非线性模式(Non-Linear) 算子(Operators) 极点/零点(Poles/Zones) 符号(Symbols) 存储芯片(Memory Ics) 动态数据存储器(Dynamic RAM) 电可擦除可编程存储器(EEPROM) 可擦除可编程存储器(EPROM) I2C 总线存储器(I2C Memories) SPI 总线存储器(SPI Memories) 存储卡(Memory Cards) 静态数据存储器(Static Memories) 微处理器芯片(Microprocess ICs)6800 系列(6800 Family)8051 系列(8051 Family)ARM 系列(ARM Family)AVR 系列(AVR Family)Parallax 公司微处理器(BASIC Stamp Modules)HCF11 系列(HCF11 Family)PIC10 系列(PIC10 Family )PIC12 系列(PIC12 Family)PIC16 系列(PIC16 Family)PIC18 系列(PIC18 Family)Z80 系列(Z80 Family)CPU 外设(Peripherals)杂项(Miscellaneous)含天线、ATA/IDE硬盘驱动模型、单节与多节电池、串行物理接口模型、晶振、动态与通用保险、模拟电压与流符号、交通信号灯建模源(Modelling Primitives)模拟(仿真分析)(Analogy-SPICE)数字(缓冲器与门电路)(Digital-Buffers&Gates)数字(杂类)(Digital--Miscellaneous)数字(组合电路)(Digital--Combinational)数字(时序电路)(Digital--Sequential)混合模式(Mixed Mode)可编程逻辑器件单元(PLD Eleme nts)实时激励源(Realtime Actuators)实时指示器(Realtime Indictors)运算放大器(Operational Amplifiers)单路运放(Single)二路运放(Dual)三路运放(Triple)四路运放(Quad)八路运放(Octal)理想运放(Ideal)大量使用的运放(Macromodel)光电子类器件(Optoelectronics)七段数码管(7-Segment Displays)英文字符与数字符号液晶显示器(Alpha nu meric LCDs) 条形显示器(Bargraph Displays)点阵显示屏(Dot Matrix Display)图形液晶(Grphical LCDs)灯泡(Lamp)液晶控制器(LCD Controllers)液晶面板显示(LCD Pan els Displays)发光二极管(LEDs)光耦元件(Optocouplers)串行液晶(Serial LCDs)可编程逻辑电路与现场可编程门阵列(PLD&FPGA)无子类电阻(Resistors)0.6W 金属膜电阻(0.6W Metal Film)10W 绕线电阻(10W Wirewound)2W 金属膜电阻(2W Metal Film)3W 金属膜电阻(3W Metal Film)7W 金属膜电阻(7W Metal Film)通用电阻符号(Generic)高压电阻(High Voltage)负温度系数热敏电阻(NTC)排阻(Resisters Packs)滑动变阻器(Variable)可变电阻(Varistors)仿真源(Simulator Primitives)触发器(Flip-Flop)门电路(Gates)电源(Sources)扬声器与音响设备(Speaker&Sou nders)无子分类开关与继电器(Switch&Relays)键盘(Keypads)普通继电器(Generic Relays)专用继电器(Specific Relays)按键与拨码(Switchs)开关器件(Switching Devices)双端交流开关元件(DIACs)普通开关元件(Generic)可控硅(SCRs)三端可控硅(TRIACs)热阴极电子管(Thermionic Valves)二极真空管(Diodes)三极真空管(Triodes)四极真空管(Tetrodes)五极真空管(Pentodes)转换器(Transducers)压力传感器(Pressures)温度传感器(Temperature)晶体管(Transistors)双极性晶体管(Bipolar)普通晶体管(Generic)绝缘栅场效应管(IGBY/Insulated Gate Bipolar Transistors 结型场效应晶体管(JFET)金属-氧化物半导体场效应晶体管(MOSFET)射频功率LDMOS晶体管(RF Power LDMOS) 射频功率VDMOS晶体管(RF Power VDMOS) 单结晶体管(Unijunction)CMOS 4000 系列(CMOS 4000 seriesTTL 74 系列(TTL 74 series)TTL 74增强型低功耗肖特基系列(TTL 74ALS Series)TTL 74增强型肖特基系列(TTL 74AS Series)TTL 74 高速系列(TTL 74F Series)TTL 74HC 系列/CMOS 工作电平(TTL 74HC Series)TTL 74HCT 系歹U /TTL 工作电平(TTL 74HCT Series)TTL 74低功耗肖特基系列(TTL 74LS Series)TTL 74 肖特基系列(TTL 74S Series)加法器(Adders)缓冲器/驱动器(Bufers&Drivers)比较器(Comparators)计数器(Counters)解码器(Decoders)编码器(Encoders)存储器(Memory)触发器/锁存器(Flip-Flop&Latches)分频器/定时器(Frequency Dividers & Timers)门电路/反相器(Gates&lnverters)数据选择器(Multiplexers)多谐振荡器(Multivibrators)振荡器(Oscillators)锁相环(Phrase-Locked-Loop,PLL)寄存器(Registers)信号开关(Signal Switches) 收发器(Tranxceivers)杂类逻辑芯片(Misc.Logic)Proteus isis 的元件库中英对照Proteus元件名称对照1元件名称屮文名说明7407 驱动门1N914 二极管74Ls00 与非门74LS04 非门74LS08 与门74LS390 TTL 双十进制计数器7SEG 4 针BCD-LED俞出从0-9对应于4根线的BCD码7SEG 3-8 译码器电路BCD-7SEG[size=+0]转换电路ALTERNATOR 交流发电机AMMETER-MILLI m安培计AND 与门BATTERY 电池/电池组BUS 总线CAP 电容CAPACITOR 电容器CLOCK 时钟信号源CRYSTAL 晶振D-FLIPFLOP D 触发器FUSE 保险丝GROUND 地LAMP 灯LED-RED 红色发光二极管LM016L 2 行16列液晶可显示2行16列英文字符，有8位数据总线D0-D7, RS R/W EN三个控制端口（共14线），工作电压为5V。
Allwinner R8 Datasheet
REVISION HISTORYDECLARATIONTABLE OF CONTENTS5.3. DC Electrical Characteristics2.6.Memory Subsystem&Touch G-SENSORSPI1_CLK UART3_RX42 DDR3_D743 VCC3_DRAM79 AGND80 VRPSDC0_CMD 111PF3PE9 CSI_D6LCD_D10 141PD10PC19 163 VCC4function 0);3)Type: signal directionPC7 Input PC8 InputPE4 Input PE5 InputSignal Name DescriptionOthersVRP Reference voltageV IH High-Level Input Voltage V IL Low-Level Input VoltageFigure 5-1. Power Up Sequence5.5.2.Power Up Reset Sequence RequirementsThe device has a system reset signal to reset the board. When asserted, the following steps give an example of power up reset sequence supported by the R8 device.•AVCC ,VDD_CPU and VCC_DRAM can be powered up simultaneously.•VDD_INT can be powered up after VDD_CPU is powered up, the time difference is T1ms.•VCC can be powered up after VDD_INT is powered up, the time difference is T2ms.Figure 5-2. Power Up Reset Sequence5.5.3.Resume Power Up Sequence from Super Standby ModeTo resume a power up sequence when the device is in Super Standby mode:•VCC_DRAM and AVCC remains powered up always.•VDD_CPU can be powered up firstly.•VDD_INT can be powered up after VDD_CPU is powered up, the time difference is T1ms.•VCC can be powered up after VDD_INT is powered up, the time difference is T2ms.Figure 5-3. Exit Super Standby and Resume Power Up Sequence5.5.4.Power Down Sequence RequirementsTo reduce power consumption,the R8 can be partially powered down.The section lists the power down requirements in each mode.In Super Standby mode,•VCC_DRAM and AVCC must be kept powered up.•VDD_CPU,VDD_INT and VCC are powered down simultaneously.•VCC voltage fall time is more longer than VDD_INT.VDD_CPUVDD_CPU6.PIN ASSIGNMENT6.2.PACKAGE DIMENSIONThe following diagram shows the package dimension of R8.。
Modicon M241 产品数据手册说明书
i s c l a im e r : T h i s d o c u m e n t a t i o n i s n o t i n t e n d e d a s a s u b s t i t u t e f o r a n d i s n o t t o b e u s e d f o r d e t e r m i n i n g s u i t a b i l i t y o r r e l i a b i l i t y o f t h e s e p r o d u c t s f o r s p e c i f i c u s e r a p p l i c a t i o n sProduct datasheetCharacteristicsTM241CE40Tcontroller M241 40 IO transistor PNP EthernetMainRange of productModicon M241Product or component type Logic controller [Us] rated supply voltage 24 V DCDiscrete input number 24 discrete input including 8 fast input conforming to IEC 61131-2 Type 1Discrete output type TransistorDiscrete output number 16 transistor including 4 fast output Discrete output voltage 24 V DC for transistor outputDiscrete output current0.1 A with Q0...Q3 terminal(s) for fast output (PTO mode)0.5 A with Q0...Q15 terminal(s) for transistor outputComplementaryDiscrete I/O number40Number of I/O expansion module 7 (local I/O architecture)14 (remote I/O architecture)Supply voltage limits 20.4...28.8 V Inrush current<= 50 APower consumption in W 32.6...40.4 W with max number of I/O expansion module Discrete input logic Sink or source Discrete input voltage 24 V Discrete input voltage type DCVoltage state1 guaranteed >= 15 V for input Current state 1 guaranteed >= 2.5 mA for input >= 5 mA for fast input Voltage state 0 guaranteed <= 5 V for input Current state 0 guaranteed <= 1 mA for input<= 1.5 mA for fast input Discrete input current 7 mA for input10.7 mA for fast input Input impedance4.7 kOhm for input2.81 kOhm for fast inputResponse time<= 2 µs turn-on operation with I0...I7 terminal(s) for fast input<= 2 µs turn-off operation with I0...I7 terminal(s) for fast input<= 2 µs turn-on operation with Q0...Q3 terminal(s) for fast output<= 2 µs turn-off operation with Q0...Q3 terminal(s) for fast output50 µs turn-on operation with I0...I15 terminal(s) for input50 µs turn-off operation with I0...I15 terminal(s) for input<= 34 µs turn-on operation with Q0...Q15 terminal(s) for output<= 250 µs turn-off operation with Q0...Q15 terminal(s) for outputConfigurable filtering time 1 µs for fast input12 ms for fast input0 ms for input1 ms for input4 ms for input12 ms for inputDiscrete output logic Positive logic (source)Output voltage limits30 V DCCurrent per output common 2 AOutput frequency<= 20 kHz for fast output (PWM mode)<= 100 kHz for fast output (PLS mode)<= 1 kHz for outputAccuracy+/- 0.1 % at 20...100 Hz for fast output+/- 1 % at 100 Hz...1 kHz for fast outputLeakage current<= 5 µA for outputVoltage drop<= 1 VTungsten load<= 2.4 WProtection type Short-circuit and overload protection with automatic resetReverse polarity protection for fast outputShort-circuit protectionReset time10 ms automatic reset output12 s automatic reset fast outputMemory capacity8 MB for program64 MB for system memory RAMData backed up128 MB built-in flash memory for backup of user programsData storage equipment<= 32 GB SD card optionalBattery type BR2032 lithium non-rechargeable, battery life: 4 yrBackup time 2 years at 25 °CExecution time for 1 KInstruction0.3 ms for event and periodic task0.7 ms for other instructionApplication structure8 external event tasks4 cyclic master tasks3 cyclic master tasks + 1 freewheeling task8 event tasksRealtime clock WithClock drift<= 60 s/month at 25 °CPositioning functions PWM/PTO function 4 channel(s) (positioning frequency: 100 kHz)Counting input number 4 fast input (HSC mode)Control signal type A/B signal at 100 kHz for fast input (HSC mode)Pulse/Direction signal at 200 kHz for fast input (HSC mode)Single phase signal at 200 kHz for fast input (HSC mode)Integrated connection type USB port with connector mini B USB 2.0Ethernet with connector RJ45Non isolated serial link "serial 1" with connector RJ45 and interface RS232/RS485Non isolated serial link "serial 2" with connector removable screw terminal block and interface RS485 Supply Serial link supply "serial 1" at 5 V, 200 mATransmission rate 1.2...115.2 kbit/s (115.2 kbit/s by default) for bus length of 15 m - communication protocol: RS4851.2...115.2 kbit/s (115.2 kbit/s by default) for bus length of 3 m - communication protocol: RS232480 Mbit/s for bus length of 3 m - communication protocol: USB10/100 Mbit/s - communication protocol: EthernetCommunication port protocol Modbus non isolated serial link with master/slave methodPort Ethernet 1 - 10BASE-T/100BASE-TX port with copper cable supportCommunication service FDRDownloadingIEC VAR ACCESSMonitoringNGVLProgrammingUpdating firmwareSMS notificationsDHCP server (via TM4 Ethernet switch network module)DHCP client (embedded Ethernet port)SNMP client/serverFTP client/serverSQL clientSend email from the controller based on TCP/UDP libraryModbus TCP client I/O scannerEthernet/IP originator I/O scanner (embedded Ethernet port)Ethernet/IP target, Modbus TCP server and Modbus TCP slaveLocal signalling 1 LED green for SD card access (SD)1 LED red for BAT1 LED green for SL11 LED green for SL21 LED per channel green for I/O state1 LED red for I/O error (I/O)1 LED red for bus fault on TM4 (TM4)1 LED green for Ethernet port activity1 LED red for module error (ERR)1 LED green for PWR1 LED green for RUNElectrical connection Removable screw terminal block for inputs and outputs (pitch 5.08 mm)Removable screw terminal block for connecting the 24 V DC power supply (pitch 5.08 mm) Cable length<= 50 m unshielded cable for input<= 10 m shielded cable for fast input<= 3 m shielded cable for fast output<= 50 m unshielded cable for outputInsulation500 V AC between fast input and internal logicNon-insulated between inputs500 V AC between output and internal logic500 V AC between fast output and internal logicNon-insulated between outputs500 V AC between input and internal logic500 V AC between output groups500 V AC between supply and internal logicNon-insulated between supply and groundMarking CESurge withstand 1 kV for power lines (DC) in common mode conforming to EN/IEC 61000-4-51 kV for shielded cable in common mode conforming to EN/IEC 61000-4-50.5 kV for power lines (DC) in differential mode conforming to EN/IEC 61000-4-51 kV for relay output in differential mode conforming to EN/IEC 61000-4-51 kV for input in common mode conforming to EN/IEC 61000-4-51 kV for transistor output in common mode conforming to EN/IEC 61000-4-5Web services Web serverMaximum number of connections8 connection(s) for Modbus server8 connection(s) for SoMachine protocol10 connection(s) for web server4 connection(s) for FTP server16 connection(s) for Ethernet/IP target8 connection(s) for Modbus clientNumber of slave16 Ethernet/IP64 Modbus TCPCycle time10 ms 16 Ethernet/IP64 ms 64 Modbus TCPMounting support Top hat type TH35-15 rail conforming to IEC 60715Top hat type TH35-7.5 rail conforming to IEC 60715Plate or panel with fixing kitHeight90 mmDepth95 mmWidth190 mmProduct weight0.62 kgEnvironmentStandards CSA C22.2 No 142ANSI/ISA 12-12-01UL 1604CSA C22.2 No 213EN/IEC 61131-2 : 2007Marine specification (LR, ABS, DNV, GL)UL 508Product certificationsCSA cULus RCMIACS E10Resistance to electrostatic discharge 4 kV on contact conforming to EN/IEC 61000-4-28 kV in air conforming to EN/IEC 61000-4-2Resistance to electromagnetic fields10 V/m (80 MHz...1 GHz) conforming to EN/IEC 61000-4-33 V/m (1.4 GHz...2 GHz) conforming to EN/IEC 61000-4-31 V/m (2 GHz...3 GHz) conforming to EN/IEC 61000-4-3Resistance to fast transients2 kV for power lines conforming to EN/IEC 61000-4-41 kV for Ethernet line conforming to EN/IEC 61000-4-41 kV for serial link conforming to EN/IEC 61000-4-41 kV for input conforming to EN/IEC 61000-4-41 kV for transistor output conforming to EN/IEC 61000-4-4Resistance to conducted disturbances,induced by radio frequency fields10 V (0.15...80 MHz) conforming to EN/IEC 61000-4-63 V (0.1...80 MHz) conforming to Marine specification (LR, ABS, DNV, GL)10 V (spot frequency (2, 3, 4, 6.2, 8.2, 12.6, 16.5, 18.8, 22, 25 MHz)) conforming to Marine specification (LR, ABS, DNV, GL)Electromagnetic emissionConducted emissions, test level: 120...69 dBµV/m QP, condition of test: power lines (radio frequency:10...150 kHz) conforming to EN/IEC 55011Conducted emissions, test level: 79...63 dBμV/m QP, condition of test: power lines (radio frequency:150 kHz...1.5 MHz) conforming to EN/IEC 55011Conducted emissions, test level: 63 dBμV/m QP, condition of test: power lines (radio frequency:1.5...30 MHz) conforming to EN/IEC 55011Radiated emissions, test level: 40 dBμV/m QP with class A (radio frequency: 30...230 MHz)conforming to EN/IEC 55011Radiated emissions, test level: 47 dBμV/m QP with class A (radio frequency: 230 MHz...1 GHz)conforming to EN/IEC 55011Immunity to microbreaks10 msAmbient air temperature for operation -10...55 °C for horizontal installation -10...50 °C for vertical installation Ambient air temperature for storage -25...70 °CRelative humidity 10...95 % without condensation in operation 10...95 % without condensation in storage IP degree of protection IP20 with protective cover in place Pollution degree 2Operating altitude 0...2000 m Storage altitude 0...3000 mVibration resistance3.5 mm (vibration frequency: 5...8.4 Hz) on symmetrical rail 3 gn (vibration frequency: 8.4...150 Hz) on symmetrical rail 3.5 mm (vibration frequency:5...8.4 Hz) on panel mounting 3 gn (vibration frequency: 8.4...150 Hz) on panel mounting Shock resistance15 gn for 11 msOffer SustainabilitySustainable offer status Green Premium productRoHS (date code: YYWW)Compliant - since 1330 - Schneider Electric declaration of conformity Schneider Electric declaration of conformity REAChReference not containing SVHC above the threshold Reference not containing SVHC above the threshold Product environmental profileAvailableProduct environmental Product end of life instructionsAvailableEnd of life manualDimensions Drawings DimensionsClearanceMounting PositionAcceptable MountingNOTE: Expansion modules must be mounted above the logic controller.Incorrect MountingDirect Mounting On a Panel Surface Mounting Hole LayoutDigital InputsWiring Diagram(*) :Type T fuse(1) :The COM0, COM1 and COM2 terminals are not connected internally (A) :Sink wiring (positive logic)(B) :Source wiring (negative logic)Fast Input Wiring (I0...I7)Fast Transistor OutputsWiring Diagram(*) :Type T fuse(1)The V0+, V1+, V2+ and V3+ terminals are not connected internally.(2)The V0-, V1-, V2- and V3- terminals are not connected internally.Transistor OutputsWiring Diagram(*) :Type T fuse(1) :The V1+, V2+ and V3+ terminals are not connected internally.(2) :The V1–, V2– and V3– terminals are not connected internally.USB Mini-B ConnectionEthernet Connection to a PC。
Richtek RT9187B 600mA LDO 电源管理器说明书
RT9187B®DS9187B-03 March 2012©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Pin ConfigurationsApplicationsCDMA/GSM Cellular Handsets Battery-Powered EquipmentLaptop, Palmtops, Notebook Computers Hand-Held InstrumentsMini PCI & PCI-Express Cards PCMCIA & New CardsPortable Information Appliances600mA, Ultra-Low Dropout, Ultra-Fast CMOS LDO RegulatorOrdering InformationGeneral DescriptionThe RT9187B is a high-performance, 600mA LDO regulator,offering extremely high PSRR and ultra-low dropout. This chip is ideal for portable RF and wireless applications with demanding performance and space requirements. A noise reduction pin is also available for further reduction of output noise. Regulator ground current increases only slightly in dropout, further prolonging the battery life. The RT9187B also works well with low-ESR ceramic capacitors, reducing the amount of board space necessary for power applications, critical in hand-held wireless devices.The RT9187B consumes less than 0.1μA in shutdown mode and has fast turn-on time for less than 40μs. The other features include ultra-low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. The RT9187B is available in the SOT-23-5package.(TOP VIEW)SOT-23-5FeaturesUltra-Low-Noise for RF ApplicationUltra-Fast Response in Line/Load Transient Quick Start-Up (Typically 40μs)<0.1μA Standby Current When Shutdown Low Dropout : 100mV at 500mAWide Operating Voltage Ranges : 2.5V to 5.5V TTL-Logic-Controlled Shutdown Input Current Limiting Protection Thermal Shutdown ProtectionOnly 2.2μF Output Capacitor Required for Stability High Power Supply Rejection RatioRoHS Compliant and Halogen FreeNote :Richtek products are :` RoHS compliant and compatible with the current require-ments of IPC/JEDEC J-STD-020.` Suitable for use in SnPb or Pb-free soldering processes.RT9187BG : Green (Halogen Free and Pb Free)04= : Product CodeDNN : Date CodeRT9187B©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Typical Application CircuitFunction Pin DescriptionNote : The value of R2 should be less than 80k Ω to maintain regulation.21R R 1+ V OUT = 0.8 x ( ) VoltsFunction Block DiagramENVIN OUT VRT9187BDS9187B-03 March 2012©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Absolute Maximum Ratings (Note 1)Supply Input Voltage -------------------------------------------------------------------------------------------------------6V EN Input Voltage ------------------------------------------------------------------------------------------------------------6VPower Dissipation, P D @ T A = 25°CSOT-23-5---------------------------------------------------------------------------------------------------------------------0.400WPackage Thermal Resistance (Note 2)SOT-23-5, θJA ----------------------------------------------------------------------------------------------------------------250°C/W Lead Temperature (Soldering, 10 sec.)--------------------------------------------------------------------------------260°C Junction T emperature ------------------------------------------------------------------------------------------------------150°CStorage T emperature Range ---------------------------------------------------------------------------------------------−65°C to 150°CESD Susceptibility (Note 3)HBM ---------------------------------------------------------------------------------------------------------------------------2kV MM -----------------------------------------------------------------------------------------------------------------------------200VRecommended Operating Conditions (Note 4)Supply Input Voltage -------------------------------------------------------------------------------------------------------2.5V to 5.5V EN Input Voltage ------------------------------------------------------------------------------------------------------------0V to 5.5VJunction T emperature Range ---------------------------------------------------------------------------------------------−40°C to 125°CAmbient T emperature Range ---------------------------------------------------------------------------------------------−40°C to 85°CElectrical Characteristics(V IN = V OUT + 1V, V EN = V IN , C IN = C OUT = 2.2μF (Ceramic), T A = 25°C, unless otherwise specified)RT9187B©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Note 1. Stresses beyond those listed “Absolute Maximum Ratings ” may cause permanent damage to the device. These arestress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability.Note 2. θJA is measured at T A = 25°C on a low effective thermal conductivity single-layer test board per JEDEC 51-3.Note 3. Devices are ESD sensitive. Handling precaution is recommended.Note 4. The device is not guaranteed to function outside its operating conditions.Note 5. Quiescent, or ground current, is the difference between input and output currents. It is defined by I Q = I IN - I OUT under noload condition (I OUT = 0mA). The total current drawn from the supply is the sum of the load current plus the ground pin current.Note 6. Standby current is the input current drawn by a regulator when the output voltage is disabled by a shutdown signal(V EN <0.6V).Note 7. The dropout voltage is defined as V IN − V OUT , which is measured when V OUT is V OUT(NORMAL) − 100mV.Note 8. Regulation is measured at constant junction temperature by using a 2ms current pulse. Devices are tested for loadregulation in the load range from 10mA to 0.5A.RT9187BDS9187B-03 March 2012©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Quiescent Current vs. Temperature0100200300400500-50-25255075100125Temperature (°C)Q u i e s c e n t C u r r e n t (µA )Typical Operating Characteristics(C OUT = 2.2μF/x5R, unless otherwise specified )Quiescent Current vs. Input Voltage33.544.555.5Input Voltage (V)Q u i e s c e n t C u r r e n t (µA )Dropout Voltage vs. Load Current03060901201500.00.10.20.30.40.5Load Current (A)D r o p o u t V ol t a g e (m V )Start UpTime (25μs/Div)V IN = 3.3V I LOAD : 500mA2412V EN (V)V OUT (V)Time (100μs/Div)EN Pin Shutdown ResponseV IN = 3.3V, I LOAD : 500mA 510240V EN (V)V OUT (V)Current LimitTime (1ms/Div)O u t p u t C u r r e n t (A )V IN = 3.3V 451203RT9187B©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.PSRRP S R R (d B )Load Transient ResponseTime (100μs/Div)V IN = 5V, I OUT = 10mA to 0.3AV OUT (50mV/Div)I OUT(200mA/Div)Line Transient ResponseTime (500μs/Div)V IN = 3.3V to 4.3V, I LOAD : 300mA3.34.310-10V IN (V)V OUT (mV)Region of Stable C OUT ESR vs. Load Current0.0010.010.11101000.10.20.30.40.5Load Current (A)R e g i o n o f S t a b l e C O U TE S R (Ω)R e g i o n o f S t a b l e C O U T E S R (Ω)RT9187BDS9187B-03 March 2012©Copyright 2012 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.Applications InformationOutput Voltage SettingThe voltage divider resistors can have values up to 80k Ωbecause of the very high impedance and low bias current of the sense comparator. The output voltage is set according to the following equation :⎛⎞×⎜⎟⎝⎠OUT REF R1V = V 1+R2where VREF is the reference voltage with a typical value of 0.8V.Chip Enable OperationThe RT9187B goes into sleep mode when the EN pin is in a logic low condition. In this condition, the pass transistor,error amplifier, and band gap are all turned off, reducing the supply current to 1μA (max.). The EN pin can be directly tied to VIN to keep the part on.C IN and C OUT SelectionLike any low dropout regulator, the external capacitors of the RT9187B must be carefully selected for regulator stability and performance. Using a capacitor of at least 2.2μF is suitable. The input capacitor must be located at a distance of not more than 0.5 inch from the input pin of the IC. Any good quality ceramic capacitor can be used.However, a capacitor with larger value and lower ESR (Equivalent Series Resistance) is recommended since it will provide better PSRR and line transient response. The RT9187B is designed specifically to work with low ESR ceramic output capacitor for space saving and performance consideration. Using a ceramic capacitor with value at least 2.2μF and ESR larger than 10m Ω on the RT9187B output ensures stability. Nevertheless, the RT9187B can still work well with other types of output capacitors due to its wide range of stable ESR. “Typical Operating Characteristics ”shows the allowable ESR range as a function of load current for various output capacitance. Output capacitors with larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located at a distance of not more than 0.5 inch from the output pin of the RT9187B.Thermal ConsiderationsFor continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula :P D(MAX) = (T J(MAX) − T A ) / θJAwhere T J(MAX) is the maximum junction temperature, T A is the ambient temperature, and θJA is the junction to ambient thermal resistance.For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA , is layout dependent. For SOT-23-5 packages, the thermal resistance, θJA , is 250°C/W on a standard JEDEC 51-3 single-layer thermal test board. The maximum power dissipation at T A = 25°C can be calculated by the following formula :P D(MAX) = (125°C − 25°C) / (250°C/W) = 0.400W for SOT-23-5 packageThe maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA . The derating curve in Figure 1 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation.Figure 1. Derating Curve of Maximum Power Dissipation0.000.050.100.150.200.250.300.350.400.45255075100125Ambient Temperature (°C)M a x i m u m P o w e r D i s s i p a t i o n (W )RT9187BRichtek Technology Corporation5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C.Tel: (8863)5526789Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers shouldobtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.Outline DimensionA1HLSOT-23-5 Surface Mount Package。
LM2651_3.3V_EVAL 1.5A高效同步切换电源评估板用户指南说明书
User's GuideSNVA015C–February2000–Revised April2013 AN–1143LM2651_3.3V_EVAL1.5A High EfficiencySynchronous Switching Regulator Evaluation Board1IntroductionThe LM2651switching regulator provides high efficiency power conversion over a100:1load range(1.5A to15mA).This feature makes the LM2651an ideal fit in battery powered applications.Synchronous rectification and75mΩinternal switches provide up to97%efficiency.At light loads,the LM2651enters a low power hysteretic or sleep mode to keep the efficiency high.In many applications,the efficiency still exceeds80%at15mA load.A shutdown pin is available to disable the LM2651and reduce the supply current to7µA.The IC containspatented current sensing circuitry for current mode control.This feature eliminates the external current sensing required by other current mode DC to DC converters.The IC has a300kHz fixed frequencyinternal oscillator.The high oscillator frequency allows the use of extremely small,low profile components.The evaluation board can be obtained by ordering part number LM2651_3.3V_EVAL from your local TI sales office,or TI's website at .2Evaluation Board DesignThe evaluation board is designed to supply3.3V at15mA up to1.5A.The input voltage range is4V to ponents were selected based on the design procedure in the LM2651datasheet.PCB layout is critical to reduce noise and ensure specified performance for any power supply design.To minimize the parasitic inductance in the loop of input capacitors and the internal MOSFETs,connect the capacitors toVIN and PGND pins with short and wide traces.This is important because the rapidly switching current,together with wiring inductance can generate large voltage spikes that may cause noise problems.The feedback trace from the output to the feedback pin should be wide,short and kept away from the flux field of the inductor.The artwork for the evaluation board is shown at the end of this application report and the schematic shown in Figure1.The parts list is given in Table1.The pictorial representations of top,bottom and silkscreen layers are shown at the end of this document.When an undervoltage situation occurs,the output voltage can be pulled below ground as the inductor current is reversed through the synchronous FET.For applications that need to be protected from anegative voltage,a clamping diode D2is recommended.When used,D2should be connected cathode to VOUTand anode to ground.A diode rated for a minimum of2A is recommended.All trademarks are the property of their respective owners.1 SNVA015C–February2000–Revised April2013AN–1143LM2651_3.3V_EVAL1.5A High Efficiency Synchronous SwitchingRegulator Evaluation Board Submit Documentation FeedbackCopyright©2000–2013,Texas Instruments IncorporatedOperating the Evaluation Board Figure 1.LM2651_EVAL Schematic for Adjustable VoltageTable 1.Bill of MaterialsRef DesignatorPart Description Part Number U1IC LM2651MTC-3.3LM2651MTC-3.3L1Inductor Coilcraft DO3316P-223CINTan Cap 100µF 16V 10%Size =D Vishay 594D107X0016D2T CSSCer Cap 4.7nF 50V X7R 10%1206Vishay VJ1206Y472KXAMB CC2Cer Cap 100pF 50V NPO 1206Vishay VJ1206A101JXAMB CC1Cer Cap 2.2nF 50V X7R 10%1206Vishay VJ1206Y222KXAMB COUTTant Cap 120µF 6.3V 10%Size =D Vishay 594D127X06R3C2T CIN2Cer Cap 0.1µF 50V X7R 10%0805Vishay VJ0805Y104KXAMB CBCer Cap 0.1µF 50V X7R 10%0805Vishay VJ0805Y104KXAMB R1Res 0.1Ω⅛W 5%LR series 0805Vishay CRCW0805R100JTGLRR2Open RCRes 30.0k Ω⅛W 5%0805Vishay CRCW0805303J D1Schottky Diode 1A SMA Motorola MBRA130LT33Operating the Evaluation Board 3.1SetupThe LM2651_3.3V_EVAL evaluation board comes ready to be tested.The only setup needed isconnecting the input voltage to the V IN and GND posts.The load and output are connected to the V OUT post.3.2Operating ConditionsThe input voltage to the LM2651-3.3regulator must be within the range of 4V to 14V DC for properoperation.The device will not function properly with voltages below 4V and damage may occur if anyvoltage greater than 16V is applied.2AN–1143LM2651_3.3V_EVAL 1.5A High Efficiency Synchronous Switching SNVA015C–February 2000–Revised April 2013Regulator Evaluation BoardSubmit Documentation FeedbackCopyright ©2000–2013,Texas Instruments Incorporated Operating the Evaluation Boardyout Top Layer yout Bottom Layeryout Silkscreen3 SNVA015C–February2000–Revised April2013AN–1143LM2651_3.3V_EVAL1.5A High Efficiency Synchronous SwitchingRegulator Evaluation Board Submit Documentation FeedbackCopyright©2000–2013,Texas Instruments IncorporatedIMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right 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TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components as meeting ISO/TS16949requirements,mainly for automotive use.In any case of use of non-designated products,TI will not be responsible for any failure to meet ISO/TS16949.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Applications Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2013,Texas Instruments Incorporated。
ATMLH412
Table 1. Pin Configurations
Pin Name A0 – A2 SDA SCL
Function Address Inputs Serial Data Serial Clock Input
WP
Write Protect
GND
Ground
8-lead PDIP
A0 1 A1 2
8 VCC 7 WP
Absolute Maximum Ratings*
Operating Temperature...........................• 55°C to +125°C Storage Temperature ............................• 65°C to + 150°C Voltage on Any Pin with Respect to Ground................................ • 1.0 V +7.0V Maximum Operating Voltage.....................................6.25V DC Output Current ..................................................5.0 mA
CC
internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pins to a known state. When using a pull-up resistor, Atmel recommends using 10kΩ or less.
远程 I O R7K4D 系列 少点数 I O 模块规格书说明书
远程 I/O R7K4D 系列少点数 I/O 模块(MECHATROLINK-Ⅰ/-Ⅱ用、NPN 接点32点输入、机型: R7K4DML－B－DA32A－R① ①在下列代码中选择。
（例如: R7K4DML－B－DA32A－R/Q)・特殊规格 (例如: /C01)端子盘B: 电源: 连接器型弹簧夹持式端子盘通信: MECHATROLINK-Ⅰ/-Ⅱ 专用连接器输入输出: e-CON连接器类型DA32A: NPN 接点32点输入模块供电电源◆直流电源R: 24V DC (允许电压范围 24V±10%、纹波系数 10%p-p以下)①附加代码◆特殊规格未填写：无特殊规格/Q：特殊规格（请从特殊规格之项另行选择）/C01: 硅涂层/C02: 聚氨酯涂层/C03: 橡胶涂层・MECHATROLINK: MECHATROLINK-Ⅰ/-Ⅱ 专用连接器・供电电源、传感器电源: 连接器型弹簧夹持式端子盘・输入信号: e-CON 连接器机壳材质: 灰色耐燃性树脂隔离: 输入・传感器电源－MECHATROLINK・FE－供电电源间状态显示灯: 用 PWR、ERR、SD、RD 显示状态(详细内容请参照使用说明书)接点输入状态显示灯: ON时亮绿色灯－Ⅰ或 MECHATROLINK－Ⅱ以及传输字节数。
(出厂时设定为MECHATROLINK－Ⅱ、32字节模式)(详细内容请参照使用说明书。
)站地址设定: 60H～7FH (用旋转开关设定、出厂时设定为61H) (详细内容请参照使用说明书。
)■MECHATROLINK－I传输速度: 4Mbps传输距离: 最远50m站间距离: 最近30cm传输电缆线: MECHATROLINK 专用电缆线 (请使用 YaskawaControls Co.,Ltd生产的，机型为JEPMC-W6003-□-E的产品)连接从站数: 最多15站 (可连接的最多从站数会因所使用的主机而不同，请通过主机的使用说明书进行确认)传输周期: 2ms (固定)数据长: 17字节■MECHATROLINK－II传输速度: 10Mbps传输距离: 最远50m站间距离: 最近50cm传输电缆线: MECHATROLINK 专用电缆线 (请使用 YaskawaControls Co.,Ltd生产的，机型为JEPMC-W6003-□-E的产品)连接从站数: 最多30站 (可连接的最多从站数会因所使用的主机而不同，请通过主机的使用说明书进行确认)传输周期: 0.25ms、0.5ms、1ms、1.5ms、2ms、2.5ms、3ms、4ms、8ms数据长: 可选择17字节或32字节 (网络内不能兼容)可同时接通的输入点数: 无限制 (24V DC时)传感器电源: 24V DC±10%、纹波系数为5%p-p以下、 2A以下 (包含接点输入负载)、连接器额定电流为8AON电压／ON电流: 18V DC以上 (输入端子 X0～X1F 与+24V之间)／2.0mA以上OFF电压／OFF电流: 9V DC以下 (输入端子 X0～X1F 与+24V之间)／1.0mA以下输入电流: 3.0mA以下／点 (24V DC时)输入电阻: 约8.6kΩON延迟时间: 0.5ms以下OFF延迟时间: 1.0ms以下・直流电源: 约60mA (连接器额定电流为2A)使用温度范围: 0～55℃存放温度范围: -20～+65℃使用湿度范围: 30～90%RH (无冷凝)使用大气条件: 无腐蚀性气体和严重尘埃安装: 壁面安装或DIN 导轨安装 (35mm导轨)重量: 约200g隔离强度: 输入・传感器电源－供电电源间 1500V AC 1分钟 MECHATROLILNK・FE－输入・传感器电源・供电电源间 500V AC 1分钟电磁兼容指令（EMC指令） EMI EN 61000-6-4 EMS EN 61000-6-2RoHS指令设定站地址的X0X1X2X3X4X5X6X7X8X9XAXBXCXDXEXF1414X10X11X12X13X14X15X16X17X18X19X1A X1B X1C X1D X1E X1F·e-CON 连接器 推荐适用连接器: 37104-□-000FL (3M Company 生产) (本产品不附带该连接器。
76650-0225 3, 4 和 6 引脚 Molex Waldom 微型锁住接头数据表说明书
Datasheet for 76650-02253, 4 and 6 Circuits Product HighlightsWire size:28-22 AWG(1.5 - 3) Amps depending on AWG 250 Volts Voltage:Current:Features and BenefitsApplications • Data communication equipment • Printers and faxes • PCs and monitors • Automotive • Friction lock provides good matingretention• Box-style contact protects contact area• Polarizing features ensures propermating• Guide rails and molded ledgesfacilitates mating and unmating Receptacle and Header Vertical General InformationMolex / Waldom Wire-to-Board 2.50mm (.098")Kit assembled in U.S.A.Description:Product Family:Pitch:Mini-Latch connectors provide a reliable interface for industry-standard 2.50mm(.098" ) wire-to-board applications. The system includes a box-style contactdesign and housing-side terminal latch to provide protection to the contact areaduring and after assembly. The durable housing also includes guide rails andmolded tabs to facilitate mating and unmating.Manufacturer:Country of Origin:Mini-Latch™Certificates:Friction Lock Vertical Header and Receptacle (Molex parts within this kit) - EU and China RoHS Compliant, UL and CSA Circuit Sizes:MountingOrientation:Connector Type:SpecificationsPart Number:DesignConfiguration:76650-0225Title:Mini-Latch Connector KitDatasheet for 76650-0225Molex Part No.Quantity in Kit 50802-91016551191-0300551191-0400551191-0600522-04-1031522-04-1041522-04-10615Molex Part No.63811-5200 *Japan Bill of Materials for Part No. 76650-0225Mini-Latch™ Female Crimp Terminals 28-22 AWG Countryof OriginDescription 2.50mm (.098") Pitch Mini-Latch™ Receptacles, 6 Circuits 2.50mm (.098") Pitch Vertical Header 3 Circuits 2.50mm (.098") Pitch Vertical Header 6 Circuits Japan 2.50mm (.098") Pitch Vertical Header 4 Circuits 2.50mm (.098") Pitch Mini-Latch™ Receptacles, 4 Circuits China Japan *Tool(s) not included in kit. Tool(s) ordered separately.Recommended Molex Tool(s) for Part No. 76650-0225*Countryof OriginDescriptionHand Crimp Tool Germany China 2.50mm (.098") Pitch Mini-Latch™ Receptacles, 3 Circuits Japan China。
LL4148数据手册_引脚图_参数
3. TAPING SPECIFICATION & PACKAGING
3
4. MAXIMUM RATINGS (TA=25oC)
Version # Revision# Revision# Revision#
91002 91002A 91002B 91002C
Issue date:
Issue Date: Issue Date Issue Date
Jan.1,1991 Mar.15,2012 Mar. 20,2012 Mar. 29, 2012
G.W.
7. PACKING SPEC
7
8. THE RECOMMENDATION FOR REFLOW SOLDERING CONDITION
9. DATABOOK REFERENCE
The following data references are available for this device: 1. Good-Ark Databook 2. Applications Notes 3. Internet homepage
121-14-2 84-69-5 7758-97-6 12656-85-8
204-450-0 201-553-2 231-846-0 235-759-9
<1000PPM <1000PPM <1000PPM
<1000PPM
29
Lead sulfochromate yellow(C.I.Pigment
SAMS70和SAME70微控制器家族概述说明书
SAMS70 and SAME70 Microcontroller FamiliesSummaryThe SAMS70 MCU familiy is based on the ARM ® Cortex ®-M7 core plus FloatingPoint Unit (FPU) extending Microchip's 32-bit microcontroller portfolio with maximum operating speeds of up to 300 MHz, 2 MB of Flash and up to 384 KB of multi-port SRAM, of which up to 256 KB can be assigned to tightly coupled memory (data and instructions) delivering a zero wait state at 300 MHz. The SAMS70 family is able to accelerate execution from on-chip Flash and Non-Volatile Memory (NVM) connectedto Quad-SPI and EBI with 16 KB of data and 16 KB of instruction cache memory.This unique memory architecture enables the SAMS70 family to be optimized for real-time deterministic code execution and low-latency peripheral data access. Additionally, the SAMS70 family includes an extensive peripheral set including high-speed USB host and device with high-speed PHY , up to eight UARTs, five SPI, three I 2C, I 2S™, SD/MMC interface, a CMOS camera interface, twelve 16-bit timers, eight 16-bits PWMs and analog interfaces. The SAME70 family includes similar features as the SAMS70family as well as a 10/100 Ethernet MAC and dual Bosch CAN-FD interfaces with advanced analog features making them ideal forconnectivity applications.Key Features• ARM Cortex-M7 core running at 300 MHz• FPU for high-precision computing and accelerated data processing• High-performance internal-memory architecture with user-configurable tightly coupled memories and system memory/16 KB I and 16 KB D cache • Dual Bosch CAN-FD controller• 10/100 Ethernet MAC with IEEE 1588 and KSZ8061 PHY • Quad-SPI with eXecute-In-Place• High-speed USB host and device with on-chip high-speed PHY• CMOS image sensor interface• AES hardware-encryption engines, TRNG and SHA-based memory integrity checker• Advanced analog front end based on dual 2 Msps, 12-bit ADCs, including 16-bit average, with up to 24 channels, offset error correction and gain control• Dual 2 Msps, 12-bit DAC and analog comparator • 64- to 144-pin package options• Extended industrial temperature range from −40°C to 105°CDevelopment ToolsSAMV71 Xplained Ultra Evaluation Kit (ATSAMV71-XULT)The SAM V71 Xplained Ultra evaluation kit is ideal for evaluating and prototyping with the SAMV71, SAM V70, SAM S70 and SAM E70 MCUs. Extension boards to the SAM V71 Xplained Ultra can be purchased individually. This kit is also compatible with Arduino Shields.SAME70 Xplained Evaluation Kit (ATSAME70-XPLD)The SAME70-Xplained Evaluation Kit is ideal for evaluating and prototyping with the Microchip SAMS70 and SAME70 MCUs. It provides connectivity for Eth-ernet, HS USB and SD Cards as well as2-XPRO extension headers. Extension boards for the SAME70Xplained can be purchased individually.The Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. All other trademarks mentioned herein are property of their respective companies. © 2017, Microchip Technology Incorporated. All Rights Reserved. Printed in the U.S.A. 6/17DS60001427CPackage Options*QFN with wettable Flanks。
MEMORY存储芯片LPC824M201JHI33E中文规格书
1.General descriptionThe LPC82x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating atCPU frequencies of up to 30MHz. The LPC82x support up to 32 KB of flash memory and8KB of SRAM.The peripheral complement of the LPC82x includes a CRC engine, four I2C-businterfaces, up to three USARTs, up to two SPI interfaces, one multi-rate timer,self-wake-up timer, and state-configurable timer with PWM function (SCTimer/PWM), aDMA, one 12-bit ADC and one analog comparator, function-configurable I/O ports througha switch matrix, an input pattern match engine, and up to 29 general-purpose I/O pins.For additional documentation related to the LPC82x parts, see Section18.2.Features and benefits⏹System:◆ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to30MHz with single-cycle multiplier and fast single-cycle I/O port.◆ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).◆System tick timer.◆AHB multilayer matrix.◆Serial Wire Debug (SWD) with four break points and two watch points. JTAGboundary scan (BSDL) supported.◆MTB⏹Memory:◆Up to 32KB on-chip flash programming memory with 64 Byte page write anderase. Code Read Protection (CRP) supported.◆8 KB SRAM.⏹ROM API support:◆Boot loader.◆On-chip ROM APIs for ADC, SPI, I2C, USART, power configuration (powerprofiles) and integer divide.◆Flash In-Application Programming (IAP) and In-System Programming (ISP).⏹Digital peripherals:◆High-speed GPIO interface connected to the ARM Cortex-M0+ IO bus with up to 29General-Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors,programmable open-drain mode, input inverter, and digital filter. GPIO directioncontrol supports independent set/clear/toggle of individual bits.◆High-current source output driver (20 mA) on four pins.◆High-current sink driver (20 mA) on two true open-drain pins.◆GPIO interrupt generation capability with boolean pattern-matching feature on eightGPIO inputs.◆Switch matrix for flexible configuration of each I/O pin function.◆CRC engine.◆DMA with 18 channels and 9 trigger inputs.⏹Timers:◆State Configurable Timer (SCTimer/PWM) with input and output functions(including capture and match) for timing and PWM applications. EachSCTimer/PWM input is multiplexed to allow selecting from several input sourcessuch as pins, ADC interrupt, or comparator output.◆Four channel Multi-Rate Timer (MRT) for repetitive interrupt generation at up tofour programmable, fixed rates.◆Self-Wake-up Timer (WKT) clocked from either the IRC, a low-power,low-frequency internal oscillator, or an external clock input in the always-on power domain.◆Windowed Watchdog timer (WWDT).⏹Analog peripherals:◆One 12-bit ADC with up to 12 input channels with multiple internal and externaltrigger inputs and with sample rates of up to 1.2 Msamples/s. The ADC supports two independent conversion sequences.◆Comparator with four input pins and external or internal reference voltage.⏹Serial peripherals:◆Three USART interfaces with pin functions assigned through the switch matrix andone common fractional baud rate generator.◆Two SPI controllers with pin functions assigned through the switch matrix.◆Four I2C-bus interfaces. One I2C supports Fast-mode Plus with 1Mbit/s data rateson two true open-drain pins and listen mode. Three I2Cs support data rates up to 400 kbit/s on standard digital pins.⏹Clock generation:◆12MHz internal RC oscillator trimmed to 1.5 % accuracy that can optionally beused as a system clock.◆Crystal oscillator with an operating range of 1MHz to 25MHz.◆Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3MHz.◆PLL allows CPU operation up to the maximum CPU rate without the need for ahigh-frequency crystal. May be run from the system oscillator, the external clockinput, or the internal RC oscillator.◆Clock output function with divider that can reflect all internal clock sources.⏹Power control:◆Power consumption in active mode as low as 90 uA/MHz in low-current modeusing the IRC as the clock source.◆Integrated PMU (Power Management Unit) to minimize power consumption.◆Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, andDeep power-down mode.◆Wake-up from Deep-sleep and Power-down modes on activity on USART, SPI, andI2C peripherals.◆Timer-controlled self wake-up from Deep power-down mode.◆Power-On Reset (POR).◆Brownout detect (BOD).⏹Unique device serial number for identification.⏹Single power supply (1.8 V to 3.6 V).⏹Operating temperature range -40 °C to +105 °C.⏹Available in a TSSOP20 and HVQFN33 (5x5) package.3.Applications4.Ordering information4.1Ordering options⏹Sensor gateways ⏹Simple motor control ⏹Industrial⏹Portables and wearables ⏹Gaming controllers ⏹Lighting⏹8/16-bit applications ⏹Motor control⏹Consumer⏹Fire and security applications⏹Climate controlTable 1.Ordering informationType numberPackage NameDescriptionVersionLPC824M201JHI33HVQFN33HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 5 ⨯ 5 ⨯ 0.85 mmn/aLPC822M101JHI33HVQFN33HVQFN: plastic thermal enhanced very thin quad flat package; no leads; 33 terminals; body 5 ⨯ 5 ⨯ 0.85 mmn/a LPC824M201JDH20TSSOP20plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1LPC822M101JDH20TSSOP20plastic thin shrink small outline package; 20 leads; body width 4.4 mmSOT360-1Table 2.Ordering optionsType number Flash/KB SRAM/KB USART I 2C SPI ADCchannels Comparator GPIO Package LPC824M201JHI3332834212Y 29HVQFN33LPC822M101JHI3316434212Y 29HVQFN33LPC824M201JDH203283425Y 16TSSOP20LPC822M101JDH201643425y16TSSOP206.Block diagram7.Pinning information7.1Pinning。
瑞特拉电子产品购买指南说明书
241For additional technical information visit Metric measurements for this product are exact, imperial measurements are rounded to the nearest whole numberUseful Cooling Capacity: 2400 - 5794 BTU (703 - 1697 W)Part No. with basic controller 3303.1042)3303.1142)3304.1043304.1143304.1443305.1043305.1143305.144Part No. with comfort controller 3303.5042)3303.5142)3304.5043304.5143304.5443305.5043305.5143305.544Voltage V , Hz230, 50/60115, 60230, 50/60115, 60400, 50/ 460, 60, 3~230, 50/60115, 60400, 50/ 460, 60, 3~Dimensions inches (mm)H x W x D24 x 11 x 12 (620 x 285 x 298)40 x 16 x 14 (1020 x 405 x 358)Useful cooling capacity Q KBTU (W)T i 131 T a 1312400 (703)3916 (1147)5794 (1697)Useful cooling capacity Q K to DIN 3168 BTU (W)T i 95 T a 951708/2083(500/610)1708 (500)3415/3620 (1000/1060)5123/5157 (1500/1510)T i 95 T a 122956/1195(280/350)956 (280)2698/2869 (790/840)4201/4269 (1230/1250)Rated current maximum 2.6/2.6 A 5.7 A 5.4/5.0 A 10.6/11.1 A 2.8/2.9 A 6.0/6.5 A 12.1/13.6 A 2.6/2.9 A Starting current 5.1/6.4 A 11.5 A 12.0/14.0 A 26.0/28.0 A 11.5/12.7 A 22.0/24.0 A 42.0/46.0 A 12.2/11.3 A Pre-fuse T 10.0 A 10.0 A 10.0 A 16.0 A 10.0 A 1)16.0 A 20.0 A 10.0 A 1)Power consumption Pel toDIN 3168T i 95 T a 95360/380 W 470 W 700/650 W 725/680 W 580/550 W 850/1000 W 880/1050 W 800/980 W T i 95 T a 122420/390 W500 W 750/710 W 780/750 W 660/680 W 1000/1160 W 1040/1200 W 960/1150 W Cooling coefficient j =Q K /PelT i 95 T a 95 1.4 1.7 1.8 1.7 1.9Refrigerant R134a, 6.0 oz (170 g)R134a, 17.6 oz (500 g)R134a, 21.1 oz (600 g)Maximum allowable operating pressure 406 psi (28 bar)363 psi (25 bar)Temperature and setting range Comfort Controller - 68 to 131° F (+20 to +55° C) / Basic Controller - 86 to 131° F (+30 to +55° C)Environmental ratings UL Type 4X (IP 66)Duty cycle 100%Type of connection Plug-in terminal strip Weight lb (kg)55.1 (25)108.2 (49)119.0 (54)110.2 (50)112.4 (51)123.5 (56)114.6 (52)Material Type 304 stainless steelAir displacement offans External circuit 203 cfm (345 m 3/h)530 cfm (900 m 3/h)530 cfm (900 m 3/h)Internal circuit 182 cfm (310 m 3/h)353 cfm (600 m 3/h)471 cfm (800 m 3/h)Temperature control Basic or comfort controller (factory setting 95° F [+35° C])Accessories PU Page Door-operated switch 14127.010–Master/slave cable for comfortcontroller13124.100–3124.100267RiDiag II including cables for comfortcontroller13159.100267Interface card for comfort controller 13124.200268Condensate hose 13301.6103301.6122731) Motor circuit breaker. 2)Internal condensate evaporator not included. Special voltages and technical modifications available on request.Wallmounted UL T ype 4X Air ConditionerCon guration:Fully wired ready for connection, including drilling template and assembly parts. With nano-coated condenser and integrated condensate evaporator.Protection Ratings:UL and cUL recognized, CSA UL Type 4XUL file: SA8250 Material:Type 304 stainless steel Note:Air conditioner with comfortcontroller may be integrated into a monitoring system with an optional interface card 3124.20 (RS 232, RS 485, RS 422 and PLC interface). See page 268. Made in the USA.000C o u r t e s y o f C M A /F l o d y n e /H y d r a d y n e ŀ M o t i o n C o n t r o l ŀ H y d r a u l i c ŀ P n e u m a t i c ŀ E l e c t r i c a l ŀ M e c h a n i c a l ŀ (800) 426-5480 ŀ w w w .c m a f h .c o242For additional technical information visit Metric measurements for this product are exact, imperial measurements are rounded to the nearest whole numberUseful Cooling Capacity: 8706 - 10525 BTU (2550 - 3083 W)Part No. with basic controller 3328.1043328.1143328.1443329.1043329.1143329.144Part No. with comfort controller 3328.5043328.5143328.5443329.5043329.5143329.544Rated operating voltage V , Hz 230, 50/60115, 50/60400, 50/460, 60, 3~230, 50/60115, 50/60400, 50/460, 60, 3~Dimensions inches (mm)H x W x D 65 x 16 x 15 (1650 x 405 x 388)Useful cooling capacity Q K BTU (W)T i 131 T a 1318706 (2550)10525 (3083)Useful cooling capacity Q K to DIN 3168 BTU (W)T i 95 T a 956860/8025 (2000/2350)8538/9392 (2500/2750)T i 95 T a 1224952/5772 (1450/1690)5464/5977 (1600/1750)Rated current max. 7.5 A/9.1 A 14.7 A/17.3 A 2.8 A/3.3 A 8.6 A/10.6 A 17.0 A/22.0 A 3.7 A/3.8 A Start-up current 22.0 A/26.0 A36.0 A/39.0 A6.8 A/7.8 A 21.0 A/21.0 A44.0 A/42.0 A6.8 A/7.6 A Pre-fuse T16.0 A25.0 A 10.0A/10.0 A 1)16.0 A 25.0 A 10.0 A/10.0 A 1)Power consumption Pel to DIN 3168 T i 95 T a 951025/1200 W 1085/1250 W 1050/1275 W 1450/1675 W 1500/1725 W 1425/1625 W T i 95 T a 1221250/1350 W1300/1410 W1275/1525 W1625/2000 W1675/2065 W1675/1975 WCooling coefficient j = Q K /Pel T i 95 T a 951.72.31.92.0RefrigerantR134a, 31.7 oz (900 g)Maximum allowable operating pressure 406 psi (28 bar)Temperature and setting range Comfort Controller - 68 to 131° F (+20 to +55° C) / Basic Controller - 86 to 131° F (+30 to +55° C)Protection rating UL Type 4X (IP 66)Duty cycle 100%Type of connection Plug-in terminal stripWeight lb (kg)176.4 (80)191.8 (87)176.4 (80)183.0 (83)198.4 (90)183.0 (83)MaterialType 304 stainless steelAir displacement of fans External circuit 377 cfm (640 m 3/h)418 cfm (710 m 3/h)Internal circuit324 cfm (550 m 3/h)377 cfm (640 m 3/h)Temperature control Basic or comfort controller (factory setting 95° F [+35° C])Accessories PU Page Door-operated switch14127.010–Master/slave cable for comfort controller13124.100267RiDiag II including cables for comfort controller 13159.100267Interface card for comfort controller 13124.200268Condensate hose13301.6122731)Motor circuit breaker. Special voltages available on request. We reserve the right to make technical modifications.Wallmounted UL T ype 4X Air ConditionerCon guration:Fully wired ready for connection, including drilling template and assembly parts. With nano-coated condenser and integrated condensate evaporator.Protection Ratings: UL and cUL recognized UL Type 4X UL file: SA8250Material:Type 304 stainless steelNote:Air conditioner with comfortcontroller may be integrated into a monitoring system with an optional interface card 3124.200(RS 232, RS 485, RS 422 and PLC interface). See page 268. Made in the USA.C o u r t e s y o f C M A /F l o d y n e /H y d r a d y n e ŀ M o t i o n C o n t r o l ŀ H y d r a u l i c ŀ P n e u m a t i c ŀ E l e c t r i c a l ŀ M e c h a n i c a l ŀ (800) 426-5480 ŀ w w w .c m a f h .c o。
Latitude 5290 快速入门指南.pdf_1700617310.4779983说明书
1Connect the power adapter and press the power buttonConecte el adaptador de alimentación y presione el botón de encendido Sambungkan adaptor daya dan tekan tombol daya.ليغشتلا رز ىلع طغضلاو رايتلا ئياهم ليصوتب مقProduct support and manuals Manuales y soporte del producto Dukungan dan panduan produkةلدلأاو جتنملا معد/support/support/manuals /support/windowsContact DellPóngase en contacto con Dell | Hubungi DellDell ـب لاصتلاا/contactdellRegulatory and safetyInformación reglamentaria y de seguridadRegulasi dan keselamatan | ةيميظنتلا تاسرامملاو ناملأا تاسرامم/regulatory_complianceRegulatory modelModelo reglamentario | Model regulatoriيميظنتلا ليدوملاP27SRegulatory typeTipo reglamentario | Jenis regulatori Regulatory type | يميظنتلا عونلاP27S002Computer modelModelo del equipo | Model komputerرتويبمكلا زاهج زارطLatitude 52902017-11What’s NewNovedades | Apa yang Baruةديدجلا تازيملا• Supports Dual (7th Gen Intel ® Core ™) and Quad (8th Gen Intel Core) processors• Supports up to 2400 MHz DDR4 memory with 8th Gen Intel Core processors• Compatibilidad con procesadores dobles (Intel ® Core ™ de 7.a generación) y procesadores cuádruples (Intel Core de 8.a generación)• Compatibilidad con memoria DDR4 de hasta 2400 MHz con procesadores Intel Core de 8.a generación• Mendukung prosesor Dual (Intel ® Core ™ Generasi Ke-7) dan Quad (Intel Core Generasi Ke-8)• Mendukung hingga 2400 MHz memori DDR4 dengan prosesor Intel Core Generasi Ke-8ةاونلا ةيعابرو )عباسلا ليجلا نم Intel ® Core ™ ( ةاونلا ةيئانث تاجلاعملا معدي)نماثلا ليجلا نم Intel Core (نم Intel Core تاجلاعم عم زترهاجيم 2400 ىلإ لصت ةعرسب DDR4 ةركاذ معد نماثلا ليجلاDi impor oleh:PT Dell IndonesiaMenara BCA Lantai 48 Unit 4804Jalan M.H Thamrin No. 1 Jakarta Pusat,10310 Indonesia© 2017 Dell Inc. or its subsidiaries.© 2017 Intel Corporation.Features Características | Fitur |تازيملا1. Cámara2. Indicador luminoso de estado de lacámara3. Ranura para tarjeta microSIM(opcional)4. Lectora de tarjetas micro-SD5. Emisor de infrarrojos (opcional)6. Cámara de infrarrojos (opcional)7. Cámara (opcional)8. Indicador luminoso de estado de lacámara (opcional)9. Micrófonos de arreglo doble10. Indicador LED de botón de encendido/estado de alimentación11. Ranura para cierre de seguridad Noble12. Puerto de red13. Puerto VGA14. Puerto USB 3.1 de primera generacióncon PowerShare15. Puerto para auriculares y micrófono16. Lectora táctil de huellas dactilares(opcional)17. Indicador luminoso de estado de cargade la batería18. Sensor NFC (opcional)19. Superficie táctil20. Altavoces21. Lector de tarjetas inteligentes(opcional)22. Puerto USB 3.1 Gen 123. Puerto HDMI24. DisplayPort por USB Tipo C25. Puerto del conector de alimentación26. Indicador luminoso de estado delmicrófono27. Etiqueta de servicio1. Kamera2. Lampu status kamera3. Slot kartu SIM mikro (opsional)4. Satu pembaca kartu microSD5. Pemancar inframerah (IR) (opsional)6. Kamera inframerah (opsional)7. Kamera (opsional)8. Lampu status kamera (opsional)9. Rangkaian Mikrofon Ganda10. Tombol daya/LED status daya11. Slot kunci Nobel Wedge12. Port jaringan13. Port VGA14. Port USB 3.1 Tdengan PowerShare15. Port Headset/Microphone16. Pembaca sidik jari sentuhan(opsional)17. Lampu status pengisian baterai18. Sensor NFC (opsional)19. Panel sentuh20. Speaker21. Pembaca kartu pintar (opsional)22. Port USB 3.1 Gen 123. Port HDMI24. DisplayPort di atas USB Tipe-C25. Port konektor daya26. Lampu status mikrofon27. Label Tag Servis15. Headset/Microphone port16. Touch Fingerprint reader (optional)17. Battery charge status light18. NFC sensor (optional)19. Touchpad20. Speakers21. Smartcard reader (optional)22. USB 3.1 Gen 1 port23. HDMI port24. DisplayPort over USB Type-C25. Power connector port26. Microphone status light27. Service Tag label1.اريماكلا2.اريماكلا ةلاح حابصم3.)ةيرايتخا( micro-SIM ةقاطب ةحتف4.microSD تاقاطب ئراق5.)IR( ءارمحلا تحت ةعشلأا ثب زاهج)يرايتخا(6.ءارمحلا تحت ةعشلأاب ةلماعلا اريماكلا)يرايتخا(7.)ةيرايتخا( اريماكلا8.)يرايتخا( اريماكلا ةلاح حابصم9.ةيئانثلا فيفصلا تانوفوركيم10.ةلاح نايبل LED حابصم/ليغشتلا رزةقاطلا11.Nobel Wedge لفق ةحتف12.ةكبشلا ذفنم13.VGA ذفنم14.دوزم لولأا ليجلا نم USB 3.1 ذفنمPowerShare ةزيمب15.نوفوركيملا/سأرلا ةعامس ذفنم16.سمللاب لمعي يذلا عبصلإا ةمصب ئراق)يرايتخا(17.ةيراطبلا نحش ةلاح حابصم18.)يرايتخا( NFC رعشتسم19.سمللا ةحول20.توصلا تاربكم21.)يرايتخا( Smartcard ئراق22.لولأا ليجلا نم USB 3.1 ذفنم23.HDMI ذفنم24.نم USB ربع DisplayPort ذفنمC عونلا25.رايتلا لصوم ذفنم26.نوفوركيملا ةلاح حابصم27.ةمدخلا زمر قصلم。