IR4426STR中文资料
雷泰红外说明书
技术参数光学参数*?? 95%能量时，CF=近焦，SF=标准焦距??? 最小焦距时的最小光点尺寸*? 最小的光点尺寸直径=最小焦距/最小的D:S 一般参数电气参数仪器特点Marathon FA?红外测温仪技术参数：1、温度测量范围: 250℃到 3000℃(482°F to 5432°F)2、光学分辨率最高可达 100:13、特别适用于现场安装空间狭小的安装条件4、精度高，测量值的± 0.3%5、更快速响应时间 10 毫秒，可选到10秒6、提供模拟量和数字量输出技术参数Marathon FA 红外测温仪介绍雷泰马拉松 FA 系列红外测温仪使用光纤技术可克服测量过程中各种极端的环境条件。
FA 系列红外测温仪由电子盒和光纤探头、光缆组成，探测器和信号处理部分集成在一电子盒中，此电子盒可远距离放置，光纤探头和光缆可安装在强电磁场中的环境中，并且可耐的最高环温达200℃。
雷泰马拉松 FA 系列光纤测温仪的测温范围为250℃到3000℃(482°F to 5432°F) ，FA 光纤探头由耐用光缆将光学探头连接到电路盒上，电路盒包括：探测器、电子线路、内置用户接口、LED 显示及连接电缆的接线端子。
FA1 和FA2 系列尤其适用于目标不能接近的、恶劣的工业环境，安装空间狭小的现场测温应用。
雷泰 FA 系列单色光纤式测温仪的固定焦距的光学探头包括一个小的不锈钢圆柱形外壳和透镜，其可承受的环境温度高达200℃，并且符合NEMA-4的标准。
雷泰 FA 系列的光纤探头可装一空气吹扫器以防止透镜被污染，光缆由金属套保护，并由VITON 保护套所密封，以防止水和油的流入，这种装配可使光缆以很小的半径弯曲以便其方便地穿过狭小的空间。
雷泰 FA 系列单色光纤式测温仪还提供可在PC 上使用的WINDOWS下的马拉松软件，以实现远程进行参数设置、数据读取、数据的图形显示及RS485的多点网络配置。
场效应管驱动芯片IR4426
Data Sheet No. PD60177 Rev. EProduct SummaryDUAL LOW SIDE DRIVERFeatures查询IR4426供应商2IR4426/IR4427/IR4428(S) & (PbF)Absolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.Recommended Operating ConditionsThe input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to GND.DC Electrical CharacteristicsV BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB. 3IR4426/IR4427/IR4428(S) & (PbF)DC Electrical Characteristics cont.V BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB.4IR4426/IR4427/IR4428(S) & (PbF)AC Electrical CharacteristicsV BIAS (V S ) = 15V, CL = 1000pF, T A = 25o C unless otherwise specified.IR4426/IR4427/IR4428(S) & (PbF) Functional Block Diagram IR442756IR4426/IR4427/IR4428(S) & (PbF)Symbol DescriptionV S Supply voltage GND GroundINA L ogic input for gate driver output (OUTA), out of phase (IR4426, IR4428), in phase (IR4427)INB L ogic input for gate driver output (OUTB), out of phase (IR4426), in phase (IR4427, IR4428)OUTA Gate drive output A OUTBGate drive output BFunctional Block Diagram IR4428 7IR4426/IR4427/IR4428(S) & (PbF)INA OUTA V S IR4426 IR4427 IR4428Part NumberINA GND INBINA GND INBGND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead PDIP 8 Lead PDIP 8 Lead PDIPOUTA V S IR4426S IR4427S IR4428SPart NumberLead AssignmentsINA GND INBINA GND INBINA GND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead SOIC 8 Lead SOIC 8 Lead SOICIR4426/IR4427/IR4428(S) & (PbF)INA (IR4426, IR4428)INB (IR4426)INA (IR4427)INB (IR4427, IR4428)OUTAOUTBFigure 3. Timing DiagramINA (IR4426, IR4428)INB (IR4426)INA (IR4427)INB (IR4427, IR4428)OUTA OUTBtftd2td1trFigure 4. Switching Time Waveforms8IR4426/IR4427/IR4428(S) & (PbF)IR4428Figure 5. Switching Time Test Circuits9IR4426/IR4427/IR4428(S) & (PbF)1112IR4426/IR4427/IR4428(S) & (PbF)LEADFREE PART MARKING INFORMATIONPer SCOP 200-002Basic Part (Non-Lead Free)8-Lead PDIP IR4426order IR44268-Lead SOIC IR4426S order IR4426S 8-Lead PDIP IR4427order IR44278-Lead SOIC IR4427S order IR4427S 8-Lead PDIP IR4428order IR44288-Lead SOIC IR4428S order IR4428SLeadfree Part8-Lead PDIP IR4426order IR4426PbF 8-Lead SOIC IR4426S order IR4426SPbF 8-Lead PDIP IR4427order IR4427PbF 8-Lead SOIC IR4427S order IR4427SPbF 8-Lead PDIP IR4428order IR4428PbF 8-Lead SOIC IR4428Sorder IR4428SPbFORDER INFORMATION。
IRS4427中文资料
Data Sheet No. PD60278Block DiagramPackagesProduct SummaryI O +/- 1.5 A / 1.5 A V OUT 6 V - 20 V t on/off (typ.)50 ns & 50 nsDUAL LOW SIDE DRIVERFeatures•Gate drive supply range from 6 V to 20 V •CMOS Schmitt-triggered inputs•Matched propagation delay for both channels • Outputs out of phase with inputs (IRS4426)• Outputs in phase with inputs (IRS4427)• OutputA out of phase with inputA andoutputB in phase with inputB (IRS4428)• RoHS compliantDescriptionsThe IRS4426/IRS4427/IRS4428 are low voltage,high speed power MOSFET and IGBT driver. Pro-prietary latch immune CMOS technologies en-able ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for mini-mum driver cross-conduction. Propagation delays between two channels are matched.8 Lead PDIP 1IRS4426/IRS4427/IRS4428(S)PbF8-Lead SOIC 2IRS4426/IRS4427/IRS4428(S)PbFAbsolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.Recommended Operating ConditionsThe input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to GND.DC Electrical CharacteristicsV BIAS (V S ) = 15 V, T A = 25 °C unless otherwise specified. The V IN and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the 3IRS4426/IRS4427/IRS4428(S)PbFDC Electrical Characteristics cont.V BIAS (V S ) = 15 V, T A = 25 °C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the 4IRS4426/IRS4427/IRS4428(S)PbFFunctional Block Diagram IRS4426AC Electrical CharacteristicsV BIAS (V S ) = 15 V, CL = 1000 pF, T A = 25 o C unless otherwise specified.Functional Block Diagram IRS44275 6IRS4426/IRS4427/IRS4428(S)PbFFunctional Block Diagram IRS4428 7IRS4426/IRS4427/IRS4428(S)PbFV S INA GND INBINA GND INBINA GND INBOUTA V S OUTBOUTA V S OUTBOUTA V S OUTB8 Lead PDIPINA OUTA V SINA GND INBINA GND INBGND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead SOICIRS4426/IRS4427/IRS4428(S)PbF INA (IRS4426, IRS4428)INB (IRS4426)INA (IRS4427)INB (IRS4427, IRS4428)OUTAOUTBFigure 1. Timing DiagramINA (IRS4426, IRS4428)INB (IRS4426)INA (IRS4427)INB (IRS4427, IRS4428)OUTA OUTBtftd2td1trFigure 2. Switching Time Waveforms8IRS4426/IRS4427/IRS4428(S)PbFSS Array IRS4428Figure 3. Switching Time Test Circuits9IRS4426/IRS4427/IRS4428(S)PbF10 11IRS4426/IRS4427/IRS4428(S)PbFIRS4426/IRS4427/IRS4428(S)PbF12IRS4426/IRS4427/IRS4428(S)PbF13IRS4426/IRS4427/IRS4428(S)PbF14IRS4426/IRS4427/IRS4428(S)PbF15IRS4426/IRS4427/IRS4428(S)PbFIRS4426/IRS4427/IRS4428(S)PbF1718IRS4426/IRS4427/IRS4428(S)PbFCLOADED TAPE FEED DIRECTIONTape & Reel 8-lead SOIC 19IRS4426/IRS4427/IRS4428(S)PbF8-Lead PDIP IRS4426PbF 8-Lead SOIC IRS4426SPbF 8-Lead PDIP IRS4427PbF 8-Lead SOIC IRS4427SPbF 8-Lead PDIP IRS4428PbF 8-Lead SOIC IRS4428SPbFORDER INFORMATIONLEADFREE PART MARKING INFORMATIONPer SCOP 200-002The SOIC-8 is MSL2 qualified.This product has been designed and qualified for the industrial level.Qualification standardscan be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105Data and specifications subject to change without notice. 11/20/2006。
TC4422_中文数据手册
2006 Microchip Technology Inc.
1.0 电气特性
绝对最大值 †
供电电压............................................................... +20V 输入电压 ...........................(VDD + 0.3V) 至 (GND - 5V) 输入电流 （VIN > VDD）...................................... 50 mA 封装功耗 （TA ≤ 70°C）
80 ns 图 4-1
3
mA VIN = 3V
0.2
VIN = 0V
18
V
温度特性
电气规范：除非另外说明，否则所有参数均为 4.5V ≤ VDD ≤ 18V 条件下的值。
参数
符号 最小值 典型值 最大值 单位
条件
温度范围 规定温度范围 （商业级） 规定温度范围 （扩展级） 规定温度范围 （汽车级） 最高结温 储存温度范围 封装热阻 热阻， 5 引脚 TO-220 热阻， 8 引脚 6x5 DFN
2006 Microchip Technology Inc.
DS21420D_CN 第 3 页
TC4421/TC4422
直流特性 （在整个工作温度范围内）
电气规范：除非另外说明，否则温度超出正常工作范围，且 4.5V ≤ VDD ≤ 18V。
参数
符号
最小值 典型值 最大值 单位
条件
输入
逻辑 “1”，高输入电压 逻辑 “0”，低输入电压 输入电流 输出
VIH
2.4
—
VIL
—
无线红外防盗报警器的设计
1 前言随着微电子技术与网络技术的飞速进展，人们关于居住环境的平安、方便、舒适提出了愈来愈高的要求因此智能化住宅就随之显现，也随着改革开放的深切和市场经济的迅速进展、提高，城市外来流动人口的大量增加，带来了许多不平安因素，刑事案件专门是入室盗窃、抢劫居高不下，因此家庭智能平安防范系统是智能化小区建设中不可缺少的一项，而以往的做法是安装防盗门、防盗网，但普遍存在有碍美观，不符合防火要求，而且不能有效地避免犯法分子对住宅的入侵，故利用高科技的电子防盗报警系统也就应运而生。
无线红外防盗报警器的进展主若是基于传感器之上，因此有必要先谈谈红别传感器的进展状况。
而传感器技术是21世纪人们在高新技术进展方面争夺的一个制高点，各发达国家都将传感技术视为现代高新技术进展的关键。
从20世纪80年代起，日本就将传感器技术列为优先进展的高新科技之首，美国等西方国家也将此技术列为国家科技和国防技术进展的重点。
从而基于传感器技术的防盗报警系统也取得了高速进展。
不管是基于哪一种方式的无线防盗报警器，它的工作原理都是将探测到的信号，通过编码，经电路放大，输出并将报警信号通过天线发射出，再用接收电路接收信号，解码并通过操纵电路判定是不是属于异样信号，再决定是不是发送报警信号给报警电路，从而达到防盗的成效，本系统也是采纳此原理。
本系统采纳经常使用的STC89C52单片机作为系统的核心操纵部份，是一个利用红别传感器作为信号输入的操纵部份的智能报警器。
当有不明人物进过红外探头时，会有操纵信号输入单片机，进而输出扎耳报警声引发相关人员的注意，同时利用显示器来显示。
如此专门大程度上减少了搜索时刻，从而提高了时效性。
达到了信号同意灵明度高，显示反映快，报警声音响的成效。
2 整体方案设计方案比较2.1.1 方案一图方案一方框图2.1.1 方案二图方案二方框图方案论证2.3.1 收发模块的比较方案一中收发模块采纳的核心芯片是Nrf905，此芯片为32引脚芯片，工作电压在，需外接433MHz 50Ω天线。
442中文资料
®Linear Motion 1/4 Watt Composition Slide Controls•11/4" (31.7mm) slider travel•1/4watt power rating •Choice of resistance tapers •Economical•Wide resistance range•Choice of mounting stylesElectrical and Mechanical SpecificationsResistance Range200 ohms through 5 megaohmsResistance ToleranceStandard:±20%Available:±10%Power Rating, Watts1/4watt @ 55°C derated to no load @ 85°C,linear taper, control mounted on steel panel4" x 4" x .050" (101.6mm x 101.6mm x 1.27mm). Voltage RatingAcross end terminals:Linear curves — 500 VDCTapered curves — 350 VDC(Not to exceed wattage ratings)Between case and end terminals:1080 VAC RMSResistance TapersStandard:LinearSpecial:Available upon request Slide TravelMechanical — 11/4inches (31.7mm)Effective — 11/4inches (31.7mm)Shaft InformationSee illustrations, page 2.Operating ForceEither direction 1 to 9 in-oz. (28 to 256 gf-cm)Measured .250" (6.35mm) from base of slider.Stop StrengthMaximum — 35 in-lbs. (15.9 kg-cm) measuredat base of slider.Terminal InformationStraight, vertical or snap-in to printed circuit board,wirewrap or solder lug styles.Mounting InformationTop, bottom, side or no twist tab mounting —refer to illustrations, page 2.FeaturesOperating Temperature0°C - +70°C•RoHS compliant1-2©2006CTS C orporati o n. A ll r i g hts r eserved. I nformati o n s ubject t o c hange.9/21/06 CTS Electronic Components Ordering Information CTS Series 442DIMENSION:mmINCHSUGGESTED PANEL PIERCING VIEWED FROM TOP SIDE FOR TWIST TABS AND ACTUATOR FROM TOP SIDE FOR TWIST TABS SUGGESTED PANEL PIERCING VIEWED2.03851.77SUGGESTED PANEL PIERCING VIEWED FROMCENTERLINE OF CONTROL FOR VERTICAL P.C. TERMINALS CONTROL SIDE FOR STRAIGHT P.C. & WIREWRAP TERMINALSSUGGESTED PANEL PIERCING VIEWED FROMALTERNATE TERMINAL STYLESNO MOUNT2-2©2006CTS C orporati o n. A ll r i g hts r eserved. I nformati o n s ubject t o c hange.9/21/06 CTS Electronic Components CONTROL SIDE FOR SNAP-IN P.C. TERMINALSSUGGESTED PANEL PIERCING VIEWED FROM。
mic4426
Functional DiagramVPin DescriptionPin NumberPin NamePin Function1, 8NC not internally connected2INA Control Input A: TTL/CMOS compatible logic input.3GND Ground4INB Control Input B: TTL/CMOS compatible logic input.5OUTB Output B: CMOS totem-pole output.6V S Supply Input: +4.5V to +18V 7OUTAOutput A: CMOS totem-pole output.Pin ConfigurationNC INA GND INB MIC4426Inverting MIC4426MIC4427MIC442824MIC4427Noninverting MIC4428NoninvertingOrdering InformationPart Number Temperature Range Package Configuration MIC4426AM –55°C to +125°C 8-lead SOIC Dual Inverting MIC4426BM –40°C to +85°C 8-lead SOIC Dual Inverting MIC4426BMM –40°C to +85°C 8-lead MSOP Dual Inverting MIC4426BN –40°C to +85°C 8-lead Plastic DIP Dual Inverting MIC4427AM –55°C to +125°C 8-lead SOIC Dual Noninverting MIC4427BM –40°C to +85°C 8-lead SOIC Dual Noninverting MIC4427BMM –40°C to +85°C 8-lead MSOP Dual Noninverting MIC4427BN –40°C to +85°C 8-pin Plastic DIP Dual Noninverting MIC4428AM –55°C to +125°C 8-lead SOIC Inverting + Noninverting MIC4428BM –40°C to +85°C 8-lead SOIC Inverting + Noninverting MIC4428BMM –40°C to +85°C 8-lead MSOP Inverting + Noninverting MIC4428BN–40°C to +85°C8-lead Plastic DIPInverting + NoninvertingMIC426/427/428 Device ReplacementDiscontinued NumberReplacement MIC426CM MIC4426BM MIC426BM MIC4426BM MIC426CN MIC4426BN MIC426BN MIC4426BN MIC427CM MIC4427BM MIC427BM MIC4427BM MIC427CN MIC4427BN MIC427BN MIC4427BN MIC428CM MIC4428BM MIC428BM MIC4428BM MIC428CN MIC4428BN MIC428BNMIC4428BNMIC1426/1427/1428 Device ReplacementDiscontinued NumberReplacement MIC1426CM MIC4426BM MIC1426BM MIC4426BM MIC1426CN MIC4426BN MIC1426BN MIC4426BN MIC1427CM MIC4427BM MIC1427BM MIC4427BM MIC1427CN MIC4427BN MIC1427BN MIC4427BN MIC1428CM MIC4428BM MIC1428BM MIC4428BM MIC1428CN MIC4428BN MIC1428BNMIC4428BNAbsolute Maximum Ratings (Note 1)Supply Voltage (V S)....................................................+22V Input Voltage (V IN).........................V S + 0.3V to GND – 5V Junction Temperature (T J)........................................150°C Storage Temperature...............................–65°C to +150°C Lead Temperature (10 sec.)......................................300°C ESD Rating, Note 3Operating Ratings (Note 2)Supply Voltage (V S).....................................+4.5V to +18V Temperature Range (T A)(A)........................................................–55°C to +125°C(B)..........................................................–40°C to +85°C Package Thermal ResistancePDIP θJA............................................................130°C/W PDIP θJC.............................................................42°C/W SOIC θJA...........................................................120°C/W SOIC θJC.............................................................75°C/W MSOP θJC.........................................................250°C/WElectrical Characteristics4.5V ≤ V s≤ 18V; T A = 25°C, bold values indicate full specified temperature range; unless noted.Symbol Parameter Condition Min Typ Max Units InputV IH Logic 1 Input Voltage 2.4 1.4V2.4 1.5V V IL Logic 0 Input Voltage 1.10.8V1.00.8VI IN Input Current0 ≤ V IN≤ V S–11µA OutputV OH High Output Voltage V S–0.025V V OL Low Output Voltage0.025V R O Output Resistance I OUT = 10mA, V S = 18V610Ω812ΩI PK Peak Output Current 1.5A I Latch-Up Protection withstand reverse current>500mA Switching Timet R Rise Time test Figure 11830ns2040ns t F Fall Time test Figure 11520ns2940ns t D1Delay Tlme test Flgure 11730ns1940ns t D2Delay Time test Figure 12350ns2760ns t PW Pulse Width test Figure 1400ns Power SupplyI S Power Supply Current V INA = V INB = 3.0V 1.4 4.5mA1.58mAI S Power Supply Current V INA = V INB = 0.0V0.180.4mA0.190.6mANote 1.Exceeding the absolute maximum rating may damage the device.Note 2.The device is not guaranteed to function outside its operating rating.Note 3.Devices are ESD sensitive. Handling precautions recommended.Test CircuitsINA INBFigure 2a.Noninverting Configuration90%10%10%0V 5V V S OUTPUTINPUT90%0VFigure 2b. Noninverting TimingINAINBFigure 1a.Inverting ConfigurationV OUTPUTINPUTFigure 1b.Inverting TimingElectrical CharacteristicsRise and Fall Time vs. Supply Voltage70605040100TI M E (n s )2030Delay Time vs. Supply Voltage3530252050T I M E (n s )1015-2501502550TEMPERATURE (°C)751001251010000100CAPACITIVE LOAD (pF)10001010000100CAPACITIVE LOAD (pF)1000Supply Current vs. Frequency200S U P P L Y C U R R E N T (m A )30101100010FREQUENCY (kHz)100High Output vs. Current| V – V | (V )S O U TCURRENT SOURCED (mA)Low Output vs. Current1.200.9600.480.720.24010CURRENT SUNK (mA)2030405060708090100O U T P U T V O L T A G E (V )Rise and Fall Timevs. Temperature1.200.960.480.720.240102030405060708090100-50-75Quiescent Power Supply Current vs. Supply VoltagePackage Power DissipationAMBIENT TEMPERATURE (°C)10007502500500Quiescent Power Supply 00.52.51.01.5S U P P L Y C U R R E N T (m A )SUPPLY VOLTAGE (V)2.0S U P P L Y C U R R E N T (µA )50100150200300400SUPPLY VOLTAGE (V)M A X I M U M P A C K A G EP O W E R D I S S I P A T I O N (m W )1250Applications InformationSupply BypassingLarge currents are required to charge and discharge large capacitive loads quickly. For example, changing a 1000pF load by 16V in 25ns requires 0.8A from the supply input. To guarantee low supply impedance over a wide frequency range, parallel capacitors are recommended for power sup-ply bypassing. Low-inductance ceramic MLC capacitors with short lead lengths (< 0.5") should be used. A 1.0µF film capacitor in parallel with one or two 0.1µF ceramic MLC capacitors normally provides adequate bypassing. GroundingWhen using the inverting drivers in the MIC4426 or MIC4428, individual ground returns for the input and output circuits or a ground plane are recommended for optimum switching speed. The voltage drop that occurs between the driver’s ground and the input signal ground, during normal high-current switching, will behave as negative feedback and degrade switching speed.Control InputUnused driver inputs must be connected to logic high (which can be V S) or ground. For the lowest quiescent current (<500µA) , connect unused inputs to ground. A logic-high signal will cause the driver to draw up to 9mA.The drivers are designed with 100mV of control input hyster-esis. This provides clean transitions and minimizes output stage current spikes when changing states. The control input voltage threshold is approximately 1.5V. The control input recognizes 1.5V up to V S as a logic high and draws less than 1µA within this range.The MIC4426/7/8 drives the TL494, SG1526/7, MIC38C42, TSC170 and similar switch-mode power supply integrated circuits.Power DissipationPower dissipation should be calculated to make sure that the driver is not operated beyond its thermal ratings. Quiescent power dissipation is negligible. A practical value for total power dissipation is the sum of the dissipation caused by the load and the transition power dissipation (P L + P T).Load DissipationPower dissipation caused by continuous load current (when driving a resistive load) through the driver’s output resistance is:P L = I L2 R OFor capacitive loads, the dissipation in the driver is: P L = f C L V S2Transition DissipationIn applications switching at a high frequency, transition power dissipation can be significant. This occurs during switching transitions when the P-channel and N-channel output FETs are both conducting for the brief moment when one is turning on and the other is turning off.P T = 2 f V S QCharge (Q) is read from the following graph:1×10-88×10-94×10-93×10-92×10-96×10-91×10-94681012141618SUPPLY VOLT AGE (V)CHARGE(Q)Crossover Energy Loss per TransitionPackage Information8-lead SOP (M)8-lead MM8™ MSOP (MM)0.380 (9.65)0.370 (9.40)PIN 1DIMENSIONS:INCH (MM)8-lead Plastic DIP (N)MICREL INC.1849 FORTUNE DRIVE SAN JOSE, CA95131USATEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.© 1999 Micrel Incorporated。
IR4428中文资料
Data Sheet No. PD60177 Rev. EProduct SummaryDUAL LOW SIDE DRIVERFeatures8 Lead SOIC 1IR4426/IR4427/IR4428(S) & (PbF)2IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONAbsolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.Recommended Operating ConditionsThe input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to GND.DC Electrical CharacteristicsV BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB. 3IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONDC Electrical Characteristics cont.V BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB.4IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONFunctional Block Diagram IR4426AC Electrical CharacteristicsV BIAS (V S ) = 15V, CL = 1000pF, T A = 25o C unless otherwise specified.IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONFunctional Block Diagram IR442756IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONLead DefinitionsSymbol DescriptionV S Supply voltage GND GroundINA L ogic input for gate driver output (OUTA), out of phase (IR4426, IR4428), in phase (IR4427)INB L ogic input for gate driver output (OUTB), out of phase (IR4426), in phase (IR4427, IR4428)OUTA Gate drive output A OUTBGate drive output BFunctional Block Diagram IR4428 7IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONINA OUTA V S IR4426 IR4427 IR4428Part NumberINA GND INBINA GND INBGND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead PDIP 8 Lead PDIP 8 Lead PDIPOUTA V S IR4426S IR4427S IR4428SPart NumberLead AssignmentsINA GND INBINA GND INBINA GND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead SOIC 8 Lead SOIC 8 Lead SOIC8IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONINA (IR4426, IR4428)INB (IR4426)INA (IR4427)INB (IR4427, IR4428)OUTA OUTBFigure 3. Timing DiagramINA (IR4426, IR4428)INB (IR4426)INA (IR4427)INB (IR4427, IR4428)OUTA OUTBtftd2td1trFigure 4. Switching Time WaveformsIR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONIR4428Figure 5. Switching Time Test Circuits9IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATION1112IR4426/IR4427/IR4428(S) & (PbF)ADVANCE INFORMATIONIR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105This product has been qualified per industrial levelData and specifications subject to change without notice. 4/13/2004LEADFREE PART MARKING INFORMATIONPer SCOP 200-002Basic Part (Non-Lead Free)8-Lead PDIP IR4426order IR44268-Lead SOIC IR4426S order IR4426S 8-Lead PDIP IR4427order IR44278-Lead SOIC IR4427S order IR4427S 8-Lead PDIP IR4428order IR44288-Lead SOIC IR4428S order IR4428SLeadfree Part8-Lead PDIP IR4426order IR4426PbF 8-Lead SOIC IR4426S order IR4426SPbF 8-Lead PDIP IR4427order IR4427PbF 8-Lead SOIC IR4427S order IR4427SPbF 8-Lead PDIP IR4428order IR4428PbF 8-Lead SOIC IR4428Sorder IR4428SPbFORDER INFORMATION。
MIC4424中文资料
MIC4424中⽂资料MIC4423/4424/4425 Electrical Characteristics4.5V ≤ V S ≤ 18V; T A = 25°C, bold values indicate –40°C ≤ T A ≤ +85°C; unless noted.Symbol ParameterConditionsMinTypMaxUnitsInput V IH Logic 1 Input Voltage 2.4V V IL Logic 0 Input Voltage 0.8V I IN Input Current0V ≤ V IN ≤ V S–11µA –1010µAOutput V OH High Output Voltage V S –0.025V V OL Low Output Voltage 0.025V R OOutput Resistance HI StateI OUT = 10mA, V S = 18V2.85?V IN = 0.8V, I OUT = 10mA, V S = 18V3.78?Output Resistance LO StateI OUT = 10mA, V S = 18V3.55?V IN = 2.4V, I OUT = 10mA, V S = 18V4.38I PK Peak Output Current 3A ILatch-Up Protection>500mAWithstand Reverse CurrentSwitching Time (Note 4)t R Rise Time test Figure 1, C L = 1800pF 2335ns 2860ns t F Fall Time test Figure 1, C L = 1800pF 2535ns 3260ns t D1Delay Tlme test Ffigure 1, C L = 1800pF 3375ns 32100ns t D2Delay Timetest Figure 1, C L = 1800pF3875ns 38100nsPower Supply I S Power Supply Current V IN = 3.0V (both inputs) 1.5 2.5mA 2 3.5mA I SPower Supply CurrentV IN = 0.0V (both inputs)0.150.25mA 0.20.3mANote 1.Exceeding the absolute maximum rating may damage the device.Note 2.The device is not guaranteed to function outside its operating rating.Note 3.Devices are ESD sensitive. Handling precautions recommended. ESD tested to human body model, 1.5k in series with 100pF.Note 4.Switching times guaranteed by design.Absolute Maximum Ratings (Note 1)Supply Voltage (22)Input Voltage.................................V S + 0.3V to GND – 5V Junction Temperature ..............................................150°C Storage Temperature Range ....................–65°C to 150°C Lead Temperature (10 sec.).....................................300°C ESD Susceptability, Note 3.. (1000V)Operating Ratings (Note 2)Supply Voltage (V S )....................................+4.5V to +18V Temperature RangeC Version ..................................................0°C to +70°C B Version...............................................–40°C to +85°C Package Thermal ResistanceDIP θJA .............................................................130°C/W DIP θJC ...............................................................42°C/W Wide-SOIC θJA .................................................120°C/W Wide-SOIC θJC ...................................................75°C/W SOIC θJA ..........................................................120°C/W SOIC θJC ............................................................75°C/WApplication InformationAlthough the MIC4423/24/25 drivers have been specifically constructed to operate reliably under any practical circumstances, there are nonetheless details of usage which will provide better operation of the device.Supply BypassingCharging and discharging large capacitive loads quickly requires large currents. For example, charging 2000pF from 0 to 15 volts in 20ns requires a constant current of 1.5A. In practice, the charging current is not constant, and will usually peak at around 3A. In order to charge the capacitor, the driver must be capable of drawing this much current, this quickly, from the system power supply. In turn, this means that as far as the driver is concerned, the system power supply, as seen by the driver, must have a VERY low impedance.As a practical matter, this means that the power supply bus must be capacitively bypassed at the driver with at least 100X the load capacitance in order to achieve optimum driving speed. It also implies that the bypassing capacitor must have very low internal inductance and resistance at all frequencies of interest. Generally, this means using two capacitors, one a high-performance low ESR film, the other a low internal resistance ceramic, as together the valleys in their two impedance curves allow adequate performance over a broad enough band to get the job done. PLEASE NOTE that many film capacitors can be sufficiently inductive as to be useless for this service. Likewise, many multilayer ceramic capacitors have unacceptably highinternal resistance. Use capacitors intended for high pulse current service (in-house we use WIMA? film capacitors and AVX Ramguard? ceramics; several other manufacturers of equivalent devices also exist). The high pulse current demands of capacitive drivers also mean that the bypass capacitors must be mounted very close to the driver in order to prevent the effects of lead inductance or PCB land inductance from nullifying what you are trying to accomplish. For optimum results the sum of the lengths of the leads and the lands from the capacitor body to the driver body should total 2.5cm or less.Bypass capacitance, and its close mounting to the driver serves two purposes. Not only does it allow optimum performance from the driver, it minimizes the amount of lead length radiating at high frequency during switching, (due to the large ? I) thus minimizing the amount of EMI later available for system disruption and subsequent cleanup. It should also be noted that the actual frequency of the EMI produced by a driver is not the clock frequency at which it is driven, but is related to the highest rate of change of current produced during switching, a frequency generally one or two orders of magnitude higher, and thus more difficult to filter if you let it permeate your system. Good bypassing practice is essential to proper operation of high speed driver ICs. GroundingBoth proper bypassing and proper grounding are necessary for optimum driver operation. Bypassing capacitance only allows a driver to turn the load ON. Eventually (except in rare circumstances) it is also necessary to turn the load OFF. This requires attention to the ground path. Two things other than the driver affect the rate at which it is possible to turn a load off: The adequacy of the grounding available for the driver, and the inductance of the leads from the driver to the load. The latter will be discussed in a separate section.Best practice for a ground path is obviously a well laid out ground plane. However, this is not always practical, and a poorly-laid out ground plane can be worse than none. Attention to the paths taken by return currents even in a ground plane is essential. In general, the leads from the driver to its load, the driver to the power supply, and the driver to whatever is driving it should all be as low in resistance and inductance as possible. Of the three paths, the ground lead from the driver to the logic driving it is most sensitive to resistance or inductance, and ground current from the load are what is most likely to cause disruption. Thus, these ground paths should be arranged so that they never share a land, or do so for as short a distance as is practical.To illustrate what can happen, consider the following: The inductance of a 2cm long land, 1.59mm (0.062") wide on a PCB with no ground plane is approximately 45nH. Assuming a dl/dt of 0.3A/ns (which will allow a current of 3A to flow after 10ns, and is thus slightly slow for our purposes) a voltage of 13.5 Volts will develop along this land in response to our postulated Ι. For a 1cm land, (approximately 15nH) 4.5 Volts is developed. Either way, anyone using TTL-level input signals to the driver will find that the response of their driver has been seriously degraded by a common ground path for input to and output from the driver of the given dimensions. Note that this is before accounting for any resistive drops in the circuit. The resistive drop in a 1.59mm (0.062") land of 2oz. Copper carrying 3A will be about 4mV/cm (10mV/in) at DC, and the resistance will increase with frequency as skin effect comes into play.The problem is most obvious in inverting drivers where the input and output currents are in phase so that any attempt to raise the driver’s input voltage (in order to turn the driver’s load off) is countered by the voltage developed on the common ground path as the driver attempts to do what it was supposed to. It takes very little common ground path, under these circumstances, to alter circuit operation drastically.Output Lead InductanceThe same descriptions just given for PCB land inductance apply equally well for the output leads from a driver to its load, except that commonly the load is located much further away from the driver than the driver’s ground bus.Generally, the best way to treat the output lead inductance problem, when distances greater than 4cm (2") are involved, requires treating the output leads as a transmission line. Unfortunately, as both the output impedance of the driver and the input impedance of the MOSFET gate are at least an order of magnitude lower than the impedance of common coax, using coax is seldom a cost-effective solution. A twisted pair works about as well, is generally lower in cost, and allows use of a wider variety of connectors. The second wire of the twisted pair should carry common from as close as possibleto the ground pin of the driver directly to the ground terminal of the load. Do not use a twisted pair where the second wire in the pair is the output of the other driver, as this will not provide a complete current path for either driver. Likewise, do not use a twisted triad with two outputs and a common return unless both of the loads to be driver are mounted extremely close to each other, and you can guarantee that they will never be switching at the same time.For output leads on a printed circuit, the general rule is to make them as short and as wide as possible. The lands should also be treated as transmission lines: i.e. minimize sharp bends, or narrowings in the land, as these will cause ringing. For a rough estimate, on a 1.59mm (0.062") thick G-10 PCB a pair of opposing lands each 2.36mm (0.093") wide translates to a characteristic impedance of about 50?. Half that width suffices on a 0.787mm (0.031") thick board. For accurate impedance matching with a MIC4423/24/25 driver, on a 1.59mm (0.062") board a land width of 42.75mm (1.683") would be required, due to the low impedance of the driver and (usually) its load. This is obviously impractical under most circumstances. Generallythe tradeoff point between lands and wires comes when lands narrower than 3.18mm (0.125") would be required on a1.59mm (0.062") board.To obtain minimum delay between the driver and the load, it is considered best to locate the driver as close as possible to the load (using adequate bypassing). Using matching transformers at both ends of a piece of coax, or several matched lengths of coax between the driver and the load, works in theory, but is not optimum.Driving at Controlled RatesOccasionally there are situations where a controlled rise or fall time (which may be considerably longer than the normal rise or fall time of the driver’s output) is desired for a load. In such cases it is still prudent to employ best possible practice in terms of bypassing, grounding and PCB layout, and then reduce the switching speed of the load (NOT the driver) by adding a noninductive series resistor of appropriate value between the output of the driver and the load. For situations where only rise or only fall should be slowed, the resistor can be paralleled with a fast diode so that switching in the other direction remains fast. Due to the Schmitt-trigger action of the driver’s input it is not possible to slow the rate of rise (or fall) of the driver’s input signal to achieve slowing of the output. Input StageThe input stage of the MIC4423/24/25 consists of a single-MOSFET class A stage with an input capacitance of ≤38pF. This capacitance represents the maximum load from the driver that will be seen by its controlling logic. The drain load on the input MOSFET is a –2mA current source. Thus, the quiescent current drawn by the driver varies, depending on the logic state of the input.Following the input stage is a buffer stage which provides ~400mV of hysteresis for the input, to prevent oscillations when slowly-changing input signals are used or when noise is present on the input. Input voltage switching threshold is approximately 1.5V which makes the driver directly compatible with TTL signals, or with CMOS powered from any supply voltage between 3V and 15V.The MIC4423/24/25 drivers can also be driven directly by the SG1524/25/26/27, TL494/95, TL594/95, NE5560/61/62/68, TSC170, MIC38C42, and similar switch mode power supply ICs. By relocating the main switch drive function into the driver rather than using the somewhat limited drive capabilities of a PWM IC. The PWM IC runs cooler, which generally improves its performance and longevity, and the main switches switch faster, which reduces switching losses and increase system efficiency.The input protection circuitry of the MIC4423/24/25, in addition to providing 2kV or more of ESD protection, also works to prevent latchup or logic upset due to ringing or voltage spiking on the logic input terminal. In most CMOS devices when the logic input rises above the power supply terminal, or descends below the ground terminal, the device can be destroyed or rendered inoperable until the power supply is cycled OFF and ON. The MIC4423/24/25 drivers have been designed to prevent this. Input voltages excursions as great as 5V below ground will not alter the operation of the device. Input excursions above the power supply voltage will result in the excess voltage being conducted to the power supply terminal of the IC. Because the excess voltage is simply conducted to the power terminal, if the input to the driver is left in a high state when the power supply to the driver is turned off, currents as high as 30mA can be conducted through the driver from the input terminal to its power supply terminal. This may overload the output of whatever is driving the driver, and may cause other devices that share the driver’s power supply, as well as the driver, to operate when they are assumed to be off, but it will not harm the driver itself. Excessive input voltage will also slow the driver down, and result in much longer internal propagation delays within the drivers. T D2, for example, may increase to several hundred nanoseconds. In general, while the driver will accept this sort of misuse without damage, proper termination of the line feeding the driver so that line spiking and ringing are minimized, will always result in faster and more reliable operation of the device, leave less EMI to be filtered elsewhere, be less stressful to other components in the circuit, and leave less chance of unintended modes of operation. Power DissipationCMOS circuits usually permit the user to ignore power dissipation. Logic families such as 4000 series and 74Cxxx have outputs which can only source or sink a few milliamps of current, and even shorting the output of the device to ground or V CC may not damage the device. CMOS drivers, on the other hand, are intended to source or sink several Amps of current. This is necessary in order to drive large capacitive loads at frequencies into the megahertz range. Package power dissipation of driver ICs can easily be exceeded when driving large loads at high frequencies. Care must therefore be paid to device dissipation when operating in this domain. The Supply Current vs Frequency and Supply Current vs Load characteristic curves furnished with this data sheet aidin estimating power dissipation in the driver. Operating frequency, power supply voltage, and load all affect power dissipation.Given the power dissipation in the device, and the thermal resistance of the package, junction operating temperature for any ambient is easy to calculate. For example, the thermal resistance of the 8-pin plastic DIP package, from the datasheet, is150°C/W. In a 25°C ambient, then, using a maximum junction temperature of 150°C, this package will dissipate 960mW. Accurate power dissipation numbers can be obtained by summing the three sources of power dissipation in the device:? Load power dissipation (P L)Quiescent power dissipation (P Q)Transition power dissipation (P T)Calculation of load power dissipation differs depending on whether the load is capacitive, resistive or inductive. Resistive Load Power DissipationDissipation caused by a resistive load can be calculated as: P L = I2 R O Dwhere:I =the current drawn by the loadR O =the output resistance of the driver when theoutput is high, at the power supply voltage used(See characteristic curves)D =fraction of time the load is conducting (duty cycle) Capacitive Load Power DissipationDissipation caused by a capacitive load is simply the energy placed in, or removed from, the load capacitance by the driver. The energy stored in a capacitor is described by the equation:E = 1/2 C V2As this energy is lost in the driver each time the load is charged or discharged, for power dissipation calculations the 1/2 is removed. This equation also shows that it is good practice not to place more voltage in the capacitor than is necessary, as dissipation increases as the square of the voltage applied to the capacitor. For a driver with a capacitive load:P L = f C (V S)2where:f =Operating FrequencyC =Load CapacitanceV S =Driver Supply VoltageInductive Load Power DissipationFor inductive loads the situation is more complicated. For the part of the cycle in which the driver is actively forcing current into the inductor, the situation is the same as it is in the resistive case:P L1 = I2 R O DHowever, in this instance the R O required may be either the on resistance of the driver when its output is in the high state, or its on resistance when the driver is in the low state, depending on how the inductor is connected, and this is still only half the story. For the part of the cycle when the inductor is forcing current through the driver, dissipation is best described asP L2 = I V D (1 – D)where V D is the forward drop of the clamp diode in the driver (generally around 0.7V). The two parts of the load dissipation must be summed in to produce P LP L = P L1 + P L2Quiescent Power DissipationQuiescent power dissipation (P Q, as described in the input section) depends on whether the input is high or low. A low input will result in a maximum current drain (per driver) of ≤0.2mA; a logic high will result in a current drain of ≤2.0mA. Quiescentpower can therefore be found from:P Q = V S [D I H + (1 – D) I L]where:I H =quiescent current with input highI L =quiescent current with input lowD = fraction of time input is high (duty cycle)V S =power supply voltageTransition Power DissipationTransition power is dissipated in the driver each time its output changes state, because during the transition, for a very brief interval, both the N- and P-channel MOSFETs in the output totem-pole are ON simultaneously, and a current is conducted through them from V S to ground. The transition power dissipation is approximately:P T = f V S (A?s)where (A?s) is a time-current factor derived from Figure 2.Total power (P D) then, as previously described is justP D = P L + P Q +P TExamples show the relative magnitude for each term.EXAMPLE 1: A MIC4423 operating on a 12V supply driving two capacitive loads of 3000pF each, operating at 250kHz, with a duty cycle of 50%, in a maximum ambient of 60°C.First calculate load power loss:P L = f x C x (V S)2P L= 250,000 x (3 x 10–9 + 3 x 10–9) x 122= 0.2160WThen transition power loss:P T = f x V S x (A?s)= 250,000 ? 12 ? 2.2 x 10–9 = 6.6mWThen quiescent power loss:P Q= V S x [D x I H + (1 – D) x I L]= 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)]= 0.0228WTotal power dissipation, then, is:P D= 0.2160 + 0.0066 + 0.0228= 0.2454WAssuming an SOIC package, with an θJA of 120°C/W, this will result in the junction running at:0.2454 x 120 = 29.4°Cabove ambient, which, given a maximum ambient temperature of 60°C, will result in a maximum junction temperature of 89.4°C.EXAMPLE 2: A MIC4424 operating on a 15V input, with one driver driving a 50? resistive load at 1MHz, with a duty cycle of67%, and the other driver quiescent, in a maximum ambient temperature of 40°C:P L = I2 x R O x DFirst, I O must be determined.I O = V S / (R O + R LOAD)Given R O from the characteristic curves then,I O = 15 / (3.3 + 50)I O = 0.281Aand:P L= (0.281)2 x 3.3 x 0.67= 0.174WP T= F x V S x (A?s)/2(because only one side is operating)= (1,000,000 x 15 x 3.3 x 10–9) / 2= 0.025 Wand:P Q = 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) +(1 x 0.000125)](this assumes that the unused side of the driver has its input grounded, which is more efficient)= 0.015Wthen:P D= 0.174 + 0.025 + 0.0150= 0.213WIn a ceramic package with an θJA of 100°C/W, this amount of power results in a junction temperature given the maximum 40°C ambient of:(0.213 x 100) + 40 = 61.4°CThe actual junction temperature will be lower than calculated both because duty cycle is less than 100% and because the graph lists R DS(on) at a T J of 125°C and the R DS(on) at 61°C T J will be somewhat lower.DefinitionsC L =Load Capacitance in Farads.D =Duty Cycle expressed as the fraction of time the inputto the driver is high.f =Operating Frequency of the driver in HertzI H =Power supply current drawn by a driver when bothinputs are high and neither output is loaded.I L =Power supply current drawn by a driver when bothinputs are low and neither output is loaded.I D =Output current from a driver in Amps.P D =Total power dissipated in a driver in Watts.P L =Power dissipated in the driver due to the driver’s load in Watts.P Q =Power dissipated in a quiescent driver in Watts.P T=Power dissipated in a driver when the output changes states (“shoot-through current”) in Watts. NOTE: The “shoot-through” current from a dual transition (onceup, once down) for both drivers is stated in the graphon the following page in ampere-nanoseconds. Thisfigure must be multiplied by the number of repetitionsper second (frequency to find Watts).R O=Output resistance of a driver in Ohms.V S=Power supply voltage to the IC in Volts.。
中文手册
MIC4426/4427/4428麦克雷尔MIC4426/4427/4428双1.5A-Peak低侧MOSFET 驱动器一般描述该MIC4426/4427/4428 系列是高度可靠的双低边MOSFET驱动器上的BiCMOS制造/ DMOS亲cess低功耗和高效率.这些司机翻译TTL或CMOS输入逻辑电平输出内正电源电压水平摆动25mV或地面.可比双极器件是摆能力，ing只有在对供应1V的.是的MIC4426/7/8提供三种配置：双路反相，双nonin -verting，一加一相同相输出.该MIC4426/4427/4428是引脚兼容的替代品为MIC426/427/428和MIC1426/1427/1428与im- 证明了电气性能和坚固的设计（参照设备在以下页面替换清单）.他们可承受高达500mA的反向电流（或极性）无闭锁和高达5V噪声尖峰（无论是极性）上地面pins.主要用于驱动功率MOSFET，MIC4426/7/8司机的驾驶（其他合适的负载电容，电阻tive,或感性），需要低阻抗，高峰值电流和快速开关时间.其他应用包括驾驶重载时钟线，同轴电缆，或压电电传感器.唯一的限制是负载总驱动器功耗不得超过该包装的限制.特点双极/ CMOS / DMOS建设闭锁反向电流保护>500mA1.5A-peak输出电流4.5V到18V工作范围低静态电源电流4mA在逻辑1输入400µA在逻辑0输入在1000pF开关25ns匹配的上升和rall倍7Ω输出阻抗< 40ns典型的延迟逻辑输入阈值与电源电压无关逻辑输入保护–5V典型的等效输入电容6pF25mV 最大.从电源输出失调或地面替换MIC426/427/428和MIC1426/1427/1428 双反转，双同相，和反相/同相配置ESD保护MOSFET的驱动器时钟线驱动器同轴电缆驱动器Piezoelectic传感器驱动MIC4426/4427/4428麦克雷尔订购信息包装8-lead SOIC8-lead SOIC8-lead MSOP8-lead塑料DIP8-lead SOIC8-lead SOIC8-lead MSOP8-pin塑料DIP8-lead SOIC8-lead SOIC8-lead MSOP8-lead塑料DIP配置双反相双反相双反相双反相双同相双同相双同相双同相反相+同相反相+同相反相+同相反相+同相MIC426/427/428设备更换已停产数MIC426CMMIC426BMMIC426CNMIC426BNMIC427CMMIC427BMMIC427CNMIC427BNMIC428CMMIC428BMMIC428CNMIC428BN更换MIC4426BMMIC4426BMMIC4426BNMIC4426BNMIC4427BMMIC4427BMMIC4427BNMIC4427BNMIC4428BMMIC4428BMMIC4428BNMIC4428BNMIC1426/1427/1428设备更换已停产数MIC1426CMMIC1426BMMIC1426CNMIC1426BNMIC1427CMMIC1427BMMIC1427CNMIC1427BNMIC1428CMMIC1428BMMIC1428CNMIC1428BN更换MIC4426BMMIC4426BMMIC4426BNMIC4426BNMIC4427BMMIC4427BMMIC4427BNMIC4427BNMIC4428BMMIC4428BMMIC4428BNMIC4428BN引脚配置MIC4426NC 1INA 2GND 3INB 48 NC7 OUTAS5 OUTB 4B52A7MIC4426 NC 1 INA 2 GND 3 INB 4 MIC4427 8 NC7 OUTA 6 VS5 OUTB 42MIC4427 NC 1A7INA 2 GND 3 B5INB 4 MIC4428 8 NC7 OUTA 6 VS5 OUTB 42MIC4428 A7B5反相双同相反相+同相引脚说明接脚号码1, 8234567引脚名称NCINAGNDINBOUTBVSOUTA引脚功能在内部没有连接控制输入 A: TTL/CMOS兼容逻辑输入. 地面控制输入 B: TTL/CMOS兼容逻辑输入. 输出B: CMOS图腾柱输出.电源输入：+4.5V到+18V输出A: CMOS图腾柱输出.MIC4426/4427/44282九月1999MIC4426/4427/4428麦克雷尔绝对最大额定值（注1)电源电压(VS) .................................................... +22V 输入电压(V中) (V)S+ 0.3V到GND – 5V结温(TJ) ........................................ 150°C存储温度............................... –65°C到+150°C焊接温度(10秒）....................................... 300°CESD 额定值,注3经营额定值（注2)电源电压(VS) ..................................... +4.5V到+18V温度范围(TA)(A) ........................................................ –55°C到+125°C(B) .......................................................... –40°C到+85°C 包装热阻PDIPθJA ............................................................ 130°C/WPDIPθJC ............................................................. 42°C/WSOICθJA ........................................................... 120°C/WSOICθJC ............................................................. 75°C/WMSOPθJC ......................................................... 250°C/W电气特性4.5V≤Vs≤18V; TA= 25°C,大胆值表明足额温度范围;除非说. 符号输入VIHVILI中输出V俄亥俄州VOLROIPKI高输出电压低输出电压输出电阻峰值输出电流闭锁保护顶住逆流>500I输出= 10mA, VS= 18V681.5VS–0.0250.0251012VVΩΩAmA输入电压的逻辑1 输入电压的逻辑0 输入电流≤V中≤VS–12.42.41.41.51.11.00.80.81VVVVµA参数条件最小Typ最大单位开关时间tRtFtD1tD2tPW电源ISIS注1.注2.注3.上升时间下降时间延迟Tlme延迟时间脉冲宽度测试图1测试图1测试Flgure 1 测试图1测试图140018201529171923273040204030405060nsnsnsnsnsnsnsnsns电源电流电源电流VINA= VINB= 3.0VVINA= VINB= 0.0V1.41.50.180.194.580.40.6mAmAmAmA超过绝对最大额定值可能会损坏设备.该设备是不能保证其经营额定值函数之外. 设备是ESD敏感.处理措施建议.九月19993MIC4426/4427/4428MIC4426/4427/4428麦克雷尔功率耗散功耗应计算，以确保该驱动器不超出其经营热额定值.静态功耗可以忽略不计.一个总的实用价值功耗是由造成的损耗总和负载和过渡功耗(PL+ PT).应用信息电源旁路需要大电流充电和放电大很快容性负载.例如，改变一个1000pF在16V 25ns负载需要从电源输入0.8A.为了保证在很宽的频率低电源阻抗范围，并联电容器被推荐为电源线上，铺设绕过.低电容与电感陶瓷MLC短引线长度(< 0.5")应该被使用.阿1.0µF电影并联电容器与一个或两个0.1µF陶瓷MLC通常提供足够的旁路电容器.接地当使用在MIC4426或MIC4428,的反相驱动器输入和输出电路或个人返回地面地面平面被推荐为最佳的开关速度.电压降之间的驱动程序的地面和发生输入信号的地面，在正常的高电流开关，将表现为负反馈，并降低开关速度.控制输入未使用的驱动器输入必须连接到逻辑高（这可VS)或地面.以最低的静态电流(< 500µA) ,未使用的输入连接到地.一个逻辑高电平信号会导致驱动器制订到9mA.该驱动器设计与控制输入海斯特100mV -esis.这提供清洁，减少输出转换当改变电流峰值阶段的国家.控制输入电压阈值约为1.5V.控制输入承认1.5V高达VS为逻辑高，消耗低于1µA在此范围内.该MIC4426/7/8驱动TL494, SG1526/7, MIC38C42, TSC170和类似开关式电源供应器集成电路.负载损耗功耗引起的连续负载电流（驱动电阻负载）通过驱动程序的输出电阻是：PL= IL2RO容性负载，在驱动器功耗为：PL= f CLVS2耗散过渡在应用在高频开关，过渡权力耗散可能会很大.在开关过程中会出现这种情况转换时，P沟道和N沟道输出FETs都进行了短暂的时刻，一个是转在另一种是关闭.PT= 2 f VSQ读取充电(Q)从以下图表：1×10-88×10-9CHARGE (Q)6×10-94×10-93×10-92×10-91×10-946810 12 14 16SUPPLY VOLTAGE (V) 18每交叉过渡的能量损。
IRS4427S中文资料
Data Sheet No. PD60278Block DiagramPackagesProduct SummaryI O +/- 1.5 A / 1.5 A V OUT 6 V - 20 V t on/off (typ.)50 ns & 50 nsDUAL LOW SIDE DRIVERFeatures•Gate drive supply range from 6 V to 20 V •CMOS Schmitt-triggered inputs•Matched propagation delay for both channels • Outputs out of phase with inputs (IRS4426)• Outputs in phase with inputs (IRS4427)• OutputA out of phase with inputA andoutputB in phase with inputB (IRS4428)• RoHS compliantDescriptionsThe IRS4426/IRS4427/IRS4428 are low voltage,high speed power MOSFET and IGBT driver. Pro-prietary latch immune CMOS technologies en-able ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL outputs. The output drivers feature a high pulse current buffer stage designed for mini-mum driver cross-conduction. Propagation delays between two channels are matched.8 Lead PDIP 1IRS4426/IRS4427/IRS4428(S)PbF8-Lead SOIC 2IRS4426/IRS4427/IRS4428(S)PbFAbsolute Maximum RatingsAbsolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.Recommended Operating ConditionsThe input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to GND.DC Electrical CharacteristicsV BIAS (V S ) = 15 V, T A = 25 °C unless otherwise specified. The V IN and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the 3IRS4426/IRS4427/IRS4428(S)PbFDC Electrical Characteristics cont.V BIAS (V S ) = 15 V, T A = 25 °C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the 4IRS4426/IRS4427/IRS4428(S)PbFFunctional Block Diagram IRS4426AC Electrical CharacteristicsV BIAS (V S ) = 15 V, CL = 1000 pF, T A = 25 o C unless otherwise specified.Functional Block Diagram IRS44275 6IRS4426/IRS4427/IRS4428(S)PbFFunctional Block Diagram IRS4428 7IRS4426/IRS4427/IRS4428(S)PbFV S INA GND INBINA GND INBINA GND INBOUTA V S OUTBOUTA V S OUTBOUTA V S OUTB8 Lead PDIPINA OUTA V SINA GND INBINA GND INBGND INBOUTA V S OUTBOUTA V S OUTBV S OUTB8 Lead SOICIRS4426/IRS4427/IRS4428(S)PbF INA (IRS4426, IRS4428)INB (IRS4426)INA (IRS4427)INB (IRS4427, IRS4428)OUTAOUTBFigure 1. Timing DiagramINA (IRS4426, IRS4428)INB (IRS4426)INA (IRS4427)INB (IRS4427, IRS4428)OUTA OUTBtftd2td1trFigure 2. Switching Time Waveforms8IRS4426/IRS4427/IRS4428(S)PbFSS Array IRS4428Figure 3. Switching Time Test Circuits9IRS4426/IRS4427/IRS4428(S)PbF10 11IRS4426/IRS4427/IRS4428(S)PbFIRS4426/IRS4427/IRS4428(S)PbF12IRS4426/IRS4427/IRS4428(S)PbF13IRS4426/IRS4427/IRS4428(S)PbF14IRS4426/IRS4427/IRS4428(S)PbF15IRS4426/IRS4427/IRS4428(S)PbFIRS4426/IRS4427/IRS4428(S)PbF1718IRS4426/IRS4427/IRS4428(S)PbFCLOADED TAPE FEED DIRECTIONTape & Reel 8-lead SOIC 19IRS4426/IRS4427/IRS4428(S)PbF8-Lead PDIP IRS4426PbF 8-Lead SOIC IRS4426SPbF 8-Lead PDIP IRS4427PbF 8-Lead SOIC IRS4427SPbF 8-Lead PDIP IRS4428PbF 8-Lead SOIC IRS4428SPbFORDER INFORMATIONLEADFREE PART MARKING INFORMATIONPer SCOP 200-002The SOIC-8 is MSL2 qualified.This product has been designed and qualified for the industrial level.Qualification standardscan be found at IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105Data and specifications subject to change without notice. 11/20/2006。
TC4426MJA;TC4427MJA;TC4428MJA;中文规格书,Datasheet资料
• Switch-mode Power Supplies • Line Drivers • Pulse Transformer Drive
General Description
The TC4426M/TC4427M/TC4428M are improved versions of the earlier TC426M/TC427M/TC428M family of MOSFET drivers. The TC4426M/TC4427M/ TC4428M devices have matched rise and fall times when charging and discharging the gate of a MOSFET.
Package Types
8-Pin CERDIP TC4426M TC4427M TC4428M
NC 1 IN A 2 GND 3 IN B 4
8 NC 7 OUT A 6 VDD 5 OUT B
NC
OUT A VDD OUT B
NC
OUT A VDD OUT B
TC4426M TC4427M TC4428M
1.5A Dual High-Speed Power MOSFET Drivers
Featuresቤተ መጻሕፍቲ ባይዱ
• High Peak Output Current – 1.5A • Wide Input Supply Voltage Operating Range:
- 4.5V to 18V • High Capacitive Load Drive Capability – 1000 pF
© 2005 Microchip Technology Inc.
基于M24SR64的双接口NFC电子标签设计
引
Ｎ Ｆ Ｃ （ Ｎ ｅ ｏ ｒ ・ Ｆ ｉ ｅ ｌ ｄ Ｃ ｏ ｍｎ ｌ ｕ ｎ ｉ （ － ａ ｌ ｉ ｏ ｎ ） 近 场 通 信 技 术一 种 赴 ｉ ｔ ｉ 尢线 射 频Ｓ Ｊ ￣ｌ Ｊ （ Ｒ Ｆ Ｉ Ｄ） 及互 联互 通技 术整 合 演 变 来 的 技 术 ， 足ｆ ｝ ｔ 索尼 、 利浦 和诺 甚哑 共 同制 定 标 准和 研 发 的 一种 通 信 方式 ， Ｎ Ｆ Ｃ技 术将 电 磁耦 合 式 感 应 片 和点 对 点 等 功 能 整合 丁单 一ｎ ｆ 心 １ ｔ － 片 卜．能 ｌ ０ Ｃ １ １ １ 的距 离 内 与兼 容设 舒进 行 双 向半 双 ｒ 的 数据 交 换 。 Ｎ ｝ ’ ｃ的 ＿ 『 作频 率为 ｌ ３ ． ５ ６ ＭＨ ｚ ，数 据 传 输 速 度 ＿ 彳 ｆ １ ０ ６ ｋ １ ） ｉ ｔ ／ 秒 、 ２ １ ２ ｋ ｌ ｉ ｆ ｔ ／ 秒 、 ４ ２ ４ ｋ ｂ ｉ ｔ ／ 秒 以及 ８ ４ ８ ｋ ｂ ｉ ｔ ／ 秒【 Ｊ ｑ 种， Ｎ Ｆ Ｃ技 术 ｉ ｑ ： Ｊ ｔ ¨ 付 款 和 购 禁 、Ｊ ｔ ｊ 于 电子 票证 、 川 丁智 能媒 体以 硬川 ｆ交换 、 传输 数 据 ， 应川 非 常 广 泛 ｌ丛 ‘ ｒ Ｍ２ ４ Ｓ Ｒ ６ ４的 大 窬越 Ｎ Ｆ ｃ 电子 标签 设 计 Ｍ ２ ４ Ｓ Ｒ ６ ４是 意 法半 导 体 推 ｆ １ ｊ 的动 态 Ｎ Ｉ ： Ｃ Ｉ Ｒ Ｆ ｌ １ ） 标 签 集 成 电路 ， 具有 ６ ４ 一 Ｋ ｂ ｉ ｔ Ｅ Ｅ Ｐ Ｒ Ｏ Ｍ， 舣接 Ｉ Ｉ ， 可通 过 １ ２ Ｃ接 口或 ｌ ３ ． ５ ６ ＭＨ ｚ 图 １ 双 接 口 ＮＦ Ｃ标 签 买 物 图 Ｒ Ｆ Ｉ １ ） 读 或 Ｎ Ｆ Ｃ电话 埘 进 行 操 作 。 １ ２ Ｃ接 『 １ 使丌 Ｊ 二 线 ＂ 按 Ｉ ｊ． 包 括 蚁 阳 数据 线 和时 钟 线 、它 Ｉ ２ Ｃ 议－ ｝ Ｉ 表 为从 设 箭 、Ｒ Ｆ 。 计 算 …抓 掺 天线 的 ｌ Ｕ感 值 为 ５ ． ５ ｕ Ｈ，Ｉ ， ｉ ｌ 时 … 于 协 议 与 ） 门 ｃ ｌ ４ ４ ４ ３ Ａ 类 和 Ｍ ℃ 论 坛 ４类 标 签 兼 容 ， 他 』 ｌ Ｊ ２￥叮 Ｔ 、 ／ｌ Ｃ ＿ Ｊ ０ ６ ｋ ｂ ｉ ｔ ／ 秒 数据 传 输 速度 。 支持 Ｎ Ｆ Ｃ数据 交 换 格 （ Ｎ Ｉ ） Ｅ Ｆ ） １ ｌ ２ ８化 Ｍ ２ ４ Ｓ Ｒ ６ ４足 堆 于 Ｉ Ｓ Ｏｌ ４ ４ ４ ３ Ａ协 议进 行 Ｒ Ｆ通 信 的 ， 其 剐 拽 波 频 率 惭 码 保护 岔 令 机 制 ， 具有 ７ ¨ ｆ 仁 一 一 标识符（ Ｕ Ｉ Ｄ） ， 数 据 保 ｊ ９ 】 限 长 ８ ４ ７ ｋ ， 标 签数 据 的编 石 Ｊ ５ ｌ 格 式 为 曼 彻斯 特 编 码 ， 埘大 线 的带 宽 求 为 达２ ０ ０年 ， Ｅ Ｅ Ｐ Ｒ Ｏ Ｍ 存储 的数 据 能 擦 写一 ｉ Ｙ ７ Ｙ 次 陔芯 片 提 供 ２ ＭＨ ｚ ， 据 Ｑ ＝ ｉ ｆ ｂ， 僻 …标 签 火 线 的 Ｑ 约 为 ７ ， 采川舣ｍ ｆ 线 技 术 ， 种 封装 选 择 ｓ （ ） ８ 、 Ｔ Ｓ Ｓ Ｏ Ｐ ８ 、 Ｕ Ｆ １ ） Ｆ Ｐ Ｎ ８ 。 由此 议 汁 ｆ ｛ Ｉ 来 的 标签 ． 人线 大 小 为 ２ ６ ｘ ２ ６ ｔ 、 正是 ｝ ｛ Ｉ ｒ Ｍ ２ ４ Ｓ Ｒ ６ ４ ｌ 述 优势 ．此 芯 片 常 适 合 ｝ ｛ ｛ 于 设 汁 低 成 ２ 双接 ｒ １ Ｎ Ｉ ， 、 ｃ标 的实 物 Ｉ 冬 ｉ 及 性 能 本的大容 ｆ 畦舣接 口 Ｎ Ｆ Ｃ标 签 ， 经 过 选 型 和设 汁 ， 选用 Ｕ Ｆ Ｄ Ｆ Ｐ Ｎ ８ 这 按ｊ ！ ｆ ｛ ｝ 述 思 路设 汁标 签 ， 标 答 采川 杰 斯 高 频 Ｐ Ｃ Ｂ板 材 ， 供电 种封 装 作 为波 汁的 Ｒ Ｆ 芯 片， 芯 片 尺寸 仅 为 ２ １ ｎ ｎ ｌ ｘ ３ ｎ ｌ ｌ ｎ 。冈 为需 爱通 及 Ｒ Ｓ ２ ３ ２ 通 信 接 ｕ标 准 的 ２ ． ５ ４ Ｘ Ｈ连 接 器 ，灭线 主 板 采 川 Ｉ ． ０排 过Ｉ ２ Ｃ读 取 Ｍ２ ４ Ｓ Ｒ ６ ４的 １ 人 】 部 数 据 并 传 给 卜 传 给 上 位 机 ，所 以 陔 针连 接 或 者 使用 专 Ｈ 】 的 馈线 进 行 长距 离连 接 ， 最 终设 计４ ＝ ５ １ 块 如 ｌ 没 计需要 一 个 单 片机 作 为主 控 什 ： 片， 过 选 ，选 川 封 装 为 所 示 ， 尺寸 仅一 枚 一 元硬 币大小 。 测 能 ， 作为Ｒ Ｆ Ｉ Ｄ ／ Ｎ Ｉ ： Ｃ标 签 使 Ｕ Ｆ ＱＦ Ｐ Ｎ ２ ８的 Ｓ ｑ ’ Ｍ３ ２ Ｆ ０ ３ ｌ （ ４作 为 主 控 芯 片 ， 成本低 ， 性能ｌ ， Ｈ 川时 ， 使川 １ 基于 Ｎ ＸＰ公 Ｌ Ｒ Ｃ ５ ２ ２的 ＲＦ Ｉ １ ） 滇 模 块 ． 读嫩 离 能 达 其 大 小仪 为 ４ ｎ ｌ ｎ ｌ ￣ ４ １ １ １ ｍ一 到５ （ ・ Ｉ １ ｜ 以【 ： ， 写 入距 离 ３ ｃ １ １ １ 以上 ， 连续 ＇ ｉ 入６ ４ Ｋ ｂ ｉ ｔ 数据 的｝ Ｉ １ Ｊ 为 该 设 汁的 电路 主要包 括 ： 电 源管 理 电 路 、 单 片机 电 路 、 Ｍ２ ４ Ｓ Ｒ ６ ４ ７ ． ７ ３ 秒， 连续凄ｍ ６ ４ Ｋ ｜ ） ｉ ｔ 数据 的时 问 为 ５ ． ８ ６秒 。作 为 １ ２ Ｃ储 ； ｝ ｝ ｝ 使 外『 司电路 及 ｌ 火线 、 使川 Ｉ ２ Ｃ接 口｝ １ １ ｆ ， 电源 管， ｉ ｆ ｔ ｜ ｔ ｌ － 、 片 将 外部 输 入的 用 时 ． 使川 ５ Ｖ供 电 ， 连续写入 ６ ４ Ｋ ｂ ｉ ｔ 数据ｆ ｌ ， ＇ ｊ ｍ ｔ 问为 ３ ． ３ ５秒 ， 连续 读 ５ Ｖ电 转 换 为 ３ ３ｖ ， 供 单 片机 、 Ｒ Ｓ ２ ３ ２芯 片 及 Ｍ ２ ４ Ｓ Ｒ ６ ４使 Ｊ Ｉ Ｊ ， 收 Ⅲ ６ ４ Ｋ ｂ ｉ ｔ 数据的时间为 １ ． ８ ６ 秒， 而且 电流 仪 为 １ ２ ｍＡ 到上位￣ ７ Ｌ ｆ ｔ ］ 天指 令 时将 从 Ｍ２ ４ Ｓ Ｒ ６ ４的 Ｅ Ｅ ｌ Ｒ Ｏ Ｍ『 １ Ｊ 渎取 指 定 【 域 ３ 结 束 语 的 数据 ， 许 通 过 Ｒ Ｓ ２ ３ ２卜 传 给上 位机 使 Ｊ 【 ｊ ， 或 者是 把 化 机 通 过 ｝ ＇ ｈ 于 使川 ｔ了主控 板 ‘ ｊ 人 线 板 分离 没汁 的方 式 ， 火线 板 能 配 合 特 Ｒ Ｓ ２ ３ ２发送 下 来 的数 据 写进 Ｍ２ ４ Ｓ Ｒ ６ ４的 Ｅ Ｅ Ｐ Ｒ Ｏ Ｍ 的指 定 Ｉ ） ＿ ‘ ＝ 域１ 殊的铁氧体吸波材料． 将 天 线板 放 置 到 金属 材 料 上 ， 通过 ０ Ｊ １ Ｊ 的 馈 作为 Ｒ Ｉ ； ’ Ｉ Ｉ ） ／ Ｎ Ｆ Ｃ标 签 使 川 时 ， 不需要 额外的电源供 电， 标 签 通 线 连 接 主控 板 ， 从 成 为 抗 金 属 的 Ｒ Ｆ ｌ １ ） ／ Ｎ Ｆ Ｃ标 签 ， 具彳 『 很 广 泛 的 过 天线 Ｒ Ｆ Ｉ Ｄ ／ Ｎ Ｆ Ｃ渎写 没 胬 进 行 电 磁 合 获收 能 量激 活 ｝ 】 Ｉ 实 用 价 值 。此 款 双接 ｆ ． Ｊ Ｎ Ｆ Ｃ标 签 常遁 合应 用 到 锗 ￣ Ｕｔ ｃ ｓ 的项 ｆ ｊ 作． Ｒ Ｆ Ｉ Ｄ ／ Ｎ ￣ ’ Ｃ泼写 设 备 能 对 标 搂 内部 的 ６ ４ Ｋ ｂ ｉ ｔ 的储 存 空 进 行 数 上 及集 成 刮 各种 移 动设 备 巾作 为数 据 装 汀使川 ， 凡 已经 Ｉ Ｉ ｎ 占 丫 罔 据 的 渎 取 或巧 人 的 操 作 ＝ Ｍ ２ ４ Ｓ Ｒ ６ ４的１ 办 于册得 知 其 内 的 犬 家 专 利 ， 后 续 的研 究 『 １ １ 会 以进 一 步 提 升 性 能 为方 ｍ ， 使其臆ｊ ｆ 】 线调谐电窬 为 ２ ５ ｐ Ｆ ，ｌ ： 作频毕 为 １ ３ ． ５ ６ Ｍｔ ｔ ｚ ，通 过 Ｌ ｃ偕抓 公 ｌ 』 ｆ ＿ 范 围更 加 Ｊ 阔 、 、
4226r-
RSENSE B - Is the connection for the bottom of the B half bridge. This can have a sense resistor connection to the V+ return ground for current limit sensing, or can be connected directly to ground. The maximum voltage on this pin is ±2 volts with respect to GND.
RSENSE A - Is the connection for the bottom of the A half bridge. This can have a sense resistor connection to the V+ return ground for current limit sensing, or can be connected directly to ground. The maximum voltage on this pin is ±2 volts with respect to GND.
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伟健电子西安 伟健电子上海 伟健电子北京 伟健电子南京 伟健电子深圳 伟健电子武汉 W ELLKING HK LTD
ISO 9001 CERTIFIED BY DSCC
M.S.KENNEDY CORP.
75 VOLT 20 AMP MOSFET
H-BRIDGE WITH
4226
GATE DRIVE
4707 Dey Road Liverpool, N.Y. 13088
各种电源厚膜维修参数
电压V
引脚
电压
V
在路电阻
R测K
1
0
0
0
1
0
0
0
2
113
7.8
25
2
103
18.5
28
3
295
9.6
60
3
300
22
150
4
114
2.6
14
4
103
4.6
12
5
112
11.5
无限大
5
8.1
3.6
3.6
15.STR4009016.STR41090
引脚
电压
V
在路电阻K
引脚
电压
V
在路电阻K
R测
B测
R测
B测
1
87
4.8
28
1
85
4.8
28
45.STR-Z215246.STR-Z4302A47.TDA1684648.IR211249.MC44603P50.TDA8380
维修参数表
35.STR-S630936.STR-S6707
引脚
电压V
在路电阻K
引脚
电压
V
在路电阻K
开机
待机
R测
B测
R测
B测
1
290
300
26
8.5
1
290
10
500
2
0.2
2
0.2
3.6
5
2
0.35
3.8
5.5
3
300
9.5
22
3
285
串口通讯相关参数
WIN95界面下的VC++串口通讯程序在WIN32下是不建议对端口进行操作的，在WIN32中所有的设备都被看成是文件，串行口也不例外也是作为文件来进行处理的。
这是我的一份关于串口编程的读书笔记，对于使用VC进行编程的同行应该有一定的帮助。
1.打开串口：在Window 95下串行口作为文件处理，使用文件操作对串行口进行处理。
使用CreateFile()打开串口，CreateFile()将返回串口的句柄。
HANDLE CreateFile(LPCTSTR lpFileName, // pointer to name of the fileDWORD dwDesiredAccess, // access (read-write) modeDWORD dwShareMode, // share modeLPSECURITY_ATTRIBUTES lpSecurityAttributes, // pointer to security attributesDWORD dwCreationDistribution, // how to createDWORD dwFlagsAndAttributes, // file attributesHANDLE hTemplateFile // handle to file with attributes to copy );lpFileName: 指明串口制备，例：COM1，COM2dwDesiredAccess: 指明串口存取方式，例：GENERIC_READ|GENERIC_WRITE dwShareMode: 指明串口共享方式lpSecurityAttributes: 指明串口的安全属性结构,NULL为缺省安全属性 dwCreateionDistribution: 必须为OPEN_EXISTINdwFlagAndAttributes: 对串口唯一有意义的是FILE_FLAG_OVERLAPPED hTemplateFile: 必须为NULL2.关闭串口：CloseHandle(hCommDev);3.设置缓冲区长度：BOOL SetupComm(HANDLE hFile, // handle of communications deviceDWORD dwInQueue, // size of input bufferDWORD dwOutQueue // size of output buffer);MPROP结构：可使用GetCommProperties()取得COMMPROP结构，COMMPROP结构中记载了系统支持的各项设置。
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Data Sheet No. PD60177 Rev. F
Product Summary
DUAL LOW SIDE DRIVER
Features
1
IR4426/IR4427/IR4428(S) & (PbF)
2
IR4426/IR4427/IR4428(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-eters are absolute voltages referenced to GND. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to GND.
DC Electrical Characteristics
V BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB.
3
IR4426/IR4427/IR4428(S) & (PbF)
DC Electrical Characteristics cont.
V BIAS (V S ) = 15V, T A = 25°C unless otherwise specified. The V IN , and I IN parameters are referenced to GND and are applicable to input leads: INA and INB. The V O and I O parameters are referenced to GND and are applicable to the output leads: OUTA and OUTB.
4
IR4426/IR4427/IR4428(S) & (PbF)
AC Electrical Characteristics
V BIAS (V S ) = 15V, CL = 1000pF, T A = 25o C unless otherwise specified.
IR4426/IR4427/IR4428(S) & (PbF) Functional Block Diagram IR4427
5
6
IR4426/IR4427/IR4428(S) & (PbF)
Symbol Description
V S Supply voltage GND Ground
INA L ogic input for gate driver output (OUTA), out of phase (IR4426, IR4428), in phase (IR4427)INB L ogic input for gate driver output (OUTB), out of phase (IR4426), in phase (IR4427, IR4428)OUTA Gate drive output A OUTB
Gate drive output B
Functional Block Diagram IR4428
7
IR4426/IR4427/IR4428(S) & (PbF)
INA OUTA V S IR4426 IR4427 IR4428
Part Number
INA GND INB
INA GND INB
GND INB
OUTA V S OUTB
OUTA V S OUTB
V S OUTB
8 Lead PDIP 8 Lead PDIP 8 Lead PDIP
OUTA V S IR4426S IR4427S IR4428S
Part Number
Lead Assignments
INA GND INB
INA GND INB
INA GND INB
OUTA V S OUTB
OUTA V S OUTB
V S OUTB
8 Lead SOIC 8 Lead SOIC 8 Lead SOIC
IR4426/IR4427/IR4428(S) & (PbF)
INA (IR4426, IR4428)
INB (IR4426)
INA (IR4427)
INB (IR4427, IR4428)
OUTA
OUTB
Figure 3. Timing Diagram
INA (IR4426, IR4428)
INB (IR4426)
INA (IR4427)
INB (IR4427, IR4428)
OUTA OUTB
tf
td2
td1
tr
Figure 4. Switching Time Waveforms
8
IR4426/IR4427/IR4428(S) & (PbF)
IR4428
Figure 5. Switching Time Test Circuits
9
元器件交易网
IR4426/IR4427/IR4428(S) & (PbF)
11
12
IR4426/IR4427/IR4428(S) & (PbF)
ADVANCE INFORMA TION
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 3/3/2008
LEADFREE PART MARKING INFORMATION
Per SCOP 200-002
Basic Part (Non-Lead Free)
8-Lead PDIP IR4426order IR44268-Lead SOIC IR4426S order IR4426S 8-Lead PDIP IR4427order IR44278-Lead SOIC IR4427S order IR4427S 8-Lead PDIP IR4428order IR44288-Lead SOIC IR4428S order IR4428S
Leadfree Part
8-Lead PDIP IR4426order IR4426PbF 8-Lead SOIC IR4426S order IR4426SPbF 8-Lead PDIP IR4427order IR4427PbF 8-Lead SOIC IR4427S order IR4427SPbF 8-Lead PDIP IR4428order IR4428PbF 8-Lead SOIC IR4428S
order IR4428SPbF
ORDER INFORMATION。