FI08 - Config for GRIR
arcconf工具操作手册
arcconf工具操作手册arcconf是一款用于管理Adaptec RAID控制器的命令行工具。
以下是arcconf的操作手册。
1. 安装arcconf：- 下载arcconf工具的最新版本，并将其复制到适当的位置。
- 在命令行中运行`chmod +x arcconf`，以使arcconf可执行。
- 运行`./arcconf`，以验证arcconf是否正确安装。
2. 查看控制器信息：- 运行`./arcconf getversion`，以获取控制器的固件版本和驱动版本信息。
- 运行`./arcconf getconfig 1`，以获取控制器的详细配置信息。
3. 创建逻辑驱动器：- 运行`./arcconf create <adapter> logicaldrive<drive_type> [parameter=value]`命令，其中<adapter>是控制器的编号，<drive_type>是驱动器类型（如RAID 0、RAID 1等）。
- 可以使用参数指定逻辑驱动器的属性，例如RAID级别、磁盘数量、磁盘大小等。
4. 删除逻辑驱动器：- 运行`./arcconf delete <adapter> logicaldrive<drive_id>`命令，其中<adapter>是控制器的编号，<drive_id>是要删除的逻辑驱动器的ID。
5. 查看逻辑驱动器信息：- 运行`./arcconf getconfig <adapter> LD`命令，以获取逻辑驱动器的详细配置信息。
6. 查看物理磁盘信息：- 运行`./arcconf getconfig <adapter> PD`命令，以获取物理磁盘的详细配置信息。
7. 重建逻辑驱动器：- 运行`./arcconf rebuild <adapter> device<drive_id>`命令，以重新构建逻辑驱动器。
FICO-月结年结
FICO-月结年结月结年结描述一下FI和CO会计在月末关账（月结）时需要做哪些工作？一、月结前的准备工作1)总账：所有的费用是否入账，税费、工资是否已计提，预制凭证是否全部已经过账2)应收：出库的货物是否已经开票，回款是否全部入账3)应付：入库的货物是否全部入账，发票是否全部校验入账，付款单是否全部入账4)资产：新入资产是否记账，完工的在建工程是否结转5)KO02检查CO-IO的结算规则是否设置好6)检查CO-PC领料、报工是否完成7)MM检查盘点是否完成入账（MI01创建账存凭证、MI04创建实存凭证、MI07创建差异物料凭证）8)维护外币汇率F-62/OB08：如果有外币业务，还需要维护汇率二、月结操作——FI（GL、AR、AP、AA）1)OB52/ S_ALR_87003642打开新账期：月底最后一天下班前操作2)AFAB资产折旧3)GR/IR清账F.134)GR/IR重分类F.19：a.货到票未到重估：借：GRIR 贷：应付暂估下月初做相反分录b.票到货未到重估：借：在途物资贷：GRIR 下月初做相反分录5)AR/AP重分类FAGLF101：借：应收账款贷：调整科目借：调整科目贷：应付账款下月初自动冲回6)外币评估FAGL_FC_VAL（手动外币评估F-05）：三种评估策略：不评估、评估下月冲回、评估下月不冲回a.外币存款：重估冲回，也可以不冲回。
若冲回，下次重估时以原金额为基数进行重估；若不冲回，则下次重估时以重估后的金额为基数进行重估。
b.外币应收应付业务：没有实现的业务，月底重估，下月初冲回；已实现的业务则在实现的时候重估，不冲回。
三、月结操作——CO1)CK40N标准成本标记（不一定每个月都做，大多数是一年做一次，先标记后发布）2)特殊订单结算：内部订单KO88、无物料订单（CO07创建无物料订单）3)成本中心月结：a.分配KSV5、分摊KSU5b.执行作业分割KSS2c.计算实际作业价格KSIId.订单价格重估MFN1 CON2（把计划作业价格和实际作业价格的差异结转到生产订单）e.调整尾差KB11N（成本中心在实际常常留下几分几毛钱，用KB11N调整）4)CO-PC生产订单月结：a.计算在制品KKAX KKAOb.计算差异KKS2 KKS1c.订单结算KO88 CO88d.检查生产订单余额与在制品科目余额是否一致S_ALR_87013127e.关闭完工订单CO02 COHV（避免在下个月重复投料和报工）四、查看报表F.01打开下一物料账期间MMPVMMRV勾选前一个期间可以记账年结年结：把科目余额结转到下一年作为期初余额。
SAP逻辑、配置、日常操作---FI
SAP逻辑、后台配置、前台日常操作及相关事务码---FIFI一、公司全局参数公司---公司代码会计科目表、会计年度变式、信贷控制范围、记账期间变式、开账（公司基本参数）1、创建公司OX152、创建公司代码OX023、创建会计科目表OB134、定义会计年度变式OB295、定义信贷控制范围OB456、定义记账期间变式OBBO7、维护公司代码的全局参数OBY68、开账，指定记账期间OB52二、总账GL（围绕会计科目表、会计凭证展开）1、定义会计科目表科目组及科目输入控制OBD42、定义字段状态变式OBC43、把字段状态变式分配给公司代码OBC54、创建会计科目FS005、定义留存收益科目OB536、定义会计凭证号范围FBN17、定义凭证过账容差OBA4如果此时对应公司的CO成本控制范围标志已传输（重要传输标志），则可以进行总账凭证的录入8、总账凭证预制F-659、总账凭证预制或过账FV50 / FB5010、总账凭证记账F-0211、查询、修改预制凭证FBV212、过账预制凭证FBV013、修改已过账凭证FB02（一般只能修改文本）14、查询已过账凭证FB0315、总账凭证冲销FB08 / F.8016、查询总账科目行项目FBL3N / FAGLL0317、查询总账科目余额FS10N18、周期性凭证FBD119、周期性凭证修改FBD220、执行周期性凭证 F.1421、清账 F.1322、重置已结清项目（清账凭证的冲销）FBRA三、付款（供应商）AP1、定义供应商账户组及其字段状态OBD32、定义供应商编号范围XKN13、分配供应商账户组编号范围OBAS4、定义特别总账预付款统驭科目OBYR5、定义付款容差OBA36、确定税务科目（进项税MWS）OB407、维护采购供应商主数据XK01 / XK02 / XK03 / XK068、维护财务供应商主数据FK01 / FK02 / FK03 / FK069、定义对外付款原因代码（现金流量项目）OBBE10、预制校验财务供应商发票FV6011、记账校验财务供应商发票FB6012、记账校验采购供应商发票MIRO13、预付定金申请F-4714、预付定金付款F-4815、供应商预付冲应付清算F-5416、供应商清账F-5117、查询供应商账户行项目FBL1N18、查询供应商账户余额FK10N19、查询采购供应商未清账GRIR余额 F.19四、收款（客户）AR1、定义客户账户组及其字段状态OBD22、定义客户编号范围XDN13、分配客户账户组编号范围OBAR4、定义特别总账预收款统驭科目OBXR5、定义收款容差OBA46、确定税务科目（销项税VST）OB407、维护销售客户主数据XD01 / XD02 / XD03 / XD068、维护财务客户主数据FD01 / FD02 / FD03 / FD069、定义对外收款原因代码（现金流量项目）OBBE10、预制财务客户开票FV7011、过账财务客户开票FB7012、销售客户开票VF0113、客户清账F-3114、查询客户账户行项目FBL5N15、查询客户账户余额FD10N五、资产AM1、分配非税购置的进项税标识符OBCL2、定义日历分配（一般默认系统已配置的）OA VH3、定义终止值（残值）代码ANHAL4、维护折旧码AFAMA5、复制折旧表、修改折旧表名称EC086、定义折旧范围OADC7、分配折旧表到公司代码OAOB8、指定间隔和过账规则OAYR9、定义资产主数据号码范围AS0810、创建资产屏幕格式规则（一般复制系统标配）11、指定资产主数据所需的分录（一般进来看一下，然后保存）12、定义资产分类OAOA13、指定账户确定14、分配总账科目AO9015、详细说明科目分配目标的科目分配类型（激活账户分配对象）ACSET16、定义资产折旧范围的屏幕格式（一般是复制）AO2117、定义资产分类中的折旧范围OAYZ18、资产主数据维护AS01 / AS02 / AS03 / AS0619、资产浏览器AW01N20、外购固定资产（未经MM模块，从供应商购置）F-9021、集团内购置资产ABZON22、自制产品转固定资产ABZE23、公司内部资产合并、拆分ABUMN24、无收入的资产报废ABA VN25、有收入的报废ABAON / F-9226、资产盘盈、购进带折旧的资产ABSO27、资产折旧AFAB28、在建工程资本化-分配AIAB29、在建工程资本化-结算AIBU30、资产业务凭证冲销AB0831、在建工程资本化凭证冲销AIST六、报表1、定义会计报表版本OB582、总账余额报表3、客户余额报表4、供应商余额报表5、资产余额报表七、月结1、开关财务帐OB522、开物料帐MMPV3、关物料帐MMRV4、内部订单月结KO8G八、年结1、结转总账科目余额FAGLGVTR2、往来科目余额结转 F.073、资产年度变更AJRW4、结转资产余额AJAB。
Lauterbach黑芯调试器TRACE32在线帮助说明书
Blackfin Debugger Release 09.2023Blackfin DebuggerTRACE32 Online HelpTRACE32 DirectoryTRACE32 IndexTRACE32 Documents ......................................................................................................................ICD In-Circuit Debugger ................................................................................................................Processor Architecture Manuals ..............................................................................................Blackfin ....................................................................................................................................Blackfin Debugger (1)Introduction (4)Brief Overview of Documents for New Users4 Demo and Start-up Scripts5 Location of Debug Connector5Warning (5)Quick Start JTAG (6)Troubleshooting (8)SYStem.Up Errors8FAQ (8)Configuration (9)System Overview9Blackfin specific SYStem Commands (10)SYStem.CONFIG Configure debugger according to target topology10 Daisy-Chain Example13 TapStates14 SYStem.CONFIG.CORE Assign core to TRACE32 instance15 SYStem.CPU CPU type selection16 SYStem.JtagClock JTAG clock selection17 SYStem.LOCK Lock and tristate the debug port17 SYStem.MemAccess Real-time memory access (non-intrusive)18 SYStem.Mode System mode selection19 SYStem.Option.IMASKASM Interrupt disable19 SYStem.Option.IMASKHLL Interrupt disable20Breakpoints (21)Software Breakpoints21 On-chip Breakpoints21 Breakpoint in ROM21Example for Breakpoints22 Memory Classes (23)CPU specific TrOnchip Commands (24)JTAG Connector (25)Blackfin DebuggerVersion 10-Oct-2023 IntroductionThis document describes the processor specific settings and features for the Blackfin Embedded Media Processor. TRACE32-ICD supports all Blackfin devices which are equipped with the JT AG debug interface.Please keep in mind that only the Processor Architecture Manual (the document you are reading at the moment) is CPU specific, while all other parts of the online help are generic for all CPUs supported by Lauterbach. So if there are questions related to the CPU, the Processor Architecture Manual should be your first choice.If some of the described functions, options, signals or connections in this Processor Architecture Manual are only valid for a single CPU the name is added in brackets.Brief Overview of Documents for New UsersArchitecture-independent information:•“Training Basic Debugging” (training_debugger.pdf): Get familiar with the basic features of a TRACE32 debugger.•“T32Start” (app_t32start.pdf): T32Start assists you in starting TRACE32 PowerView instances for different configurations of the debugger. T32Start is only available for Windows.•“General Commands” (general_ref_<x>.pdf): Alphabetic list of debug commands.Architecture-specific information:•“Processor Architecture Manuals”: These manuals describe commands that are specific for the processor architecture supported by your Debug Cable. T o access the manual for your processorarchitecture, proceed as follows:-Choose Help menu > Processor Architecture Manual.•“OS Awareness Manuals” (rtos_<os>.pdf): TRACE32 PowerView can be extended for operating system-aware debugging. The appropriate OS Awareness manual informs you how to enable theOS-aware debugging.Demo and Start-up ScriptsLauterbach provides ready-to-run start-up scripts for known Blackfin based hardware.To search for PRACTICE scripts, do one of the following in TRACE32 PowerView:•Type at the command line: WELCOME.SCRIPTS•or choose File menu > Search for Script.Y ou can now search the demo folder and its subdirectories for PRACTICE start-up scripts(*.cmm) and other demo software.Y ou can also manually navigate in the ~~/demo/blackfin/ subfolder of the system directory ofTRACE32.Location of Debug ConnectorLocate the debug connector on your target board as close as possible to the processor to minimize the capacitive influence of the trace length and cross coupling of noise onto the JT AG signals. WarningSignal LevelThe debugger output voltage follows the target voltage level. It supports a voltage range of 0.4…5.2V. ESD ProtectionNOTE:T o prevent debugger and target from damage it is recommended to connect ordisconnect the debug cable only while the target power is OFF.Recommendation for the software start:•Disconnect the debug cable from the target while the target power is off.•Connect the host system, the TRACE32 hardware and the debug cable.•Start the TRACE32 software.•Connect the debug cable to the target.•Switch the target power ON.Power down:•Switch off the target power.•Disconnect the debug cable from the target.Quick Start JTAGStarting up the debugger is done as follows:1.Select the device prompt B: for the ICD Debugger, if the device prompt is not active after the TRACE32 software was started.2.Select the CPU type to load the CPU specific settings.3.Enter debug mode:This command resets the CPU and enters debug mode. After the execution of this command access to the registers and to memory is possible. Before performing the first access to external SDRAM or FLASH the External Bus Interface Unit (EBIU) must be configured.4.The following command sequence is for the BF537 processor and configures the SDRAM controller with default values that were derived for maximum flexibility. They work for a system clock frequency between 54MHz and 133MHz.In the example a ST M29W320DB flash device is used in 16-bit mode. All four memory banks and CLKOUT are enabled.B:SYStem.CPU BF537SYStem.Up; configure SDRAM controllerData.Set 0xFFC00A1sLONG 0x0091998D Data.Set 0xFFC00A14 %WORD 0x0025Data.Set 0xFFC00A1C %WORD 0x03A0; EBIU_SDGCTL ; EBIU_SDBCTL ; EBIU_SDRRC; enable all flash memory banks and clock outData.Set 0xFFC00A00 %WORD 0x00FF; EBIU_AMGCTL; ST M29W320DB flash device in 16-bit modeFLASH.Create 1. 0x20000000--0x20003FFF 0x4000 AM29LV100 Word FLASH.Create 1. 0x20004000--0x20007FFF 0x2000 AM29LV100 Word FLASH.Create 1. 0x20008000--0x2000FFFF 0x8000 AM29LV100 Word FLASH.Create 1. 0x20010000--0x203FFFFF 0x10000 AM29LV100 Word5.Load the program.Data.LOAD.Elf demo.dxe; The file demo.dxe is in ELF format The option of the Data.LOAD command depends on the file format generated by the compiler. A detailed description of the Data.LOAD command is given in the “General Commands Reference”. The start-up sequence can be automated using the programming language PRACTICE. A typical start sequence is shown below. This sequence can be written to a PRACTICE script file (*.cmm, ASCII format) and executed with the command DO<file>.B::; Select the ICD device promptWinClear; Delete all windowsSYStem.CPU BF537; select the processorSYStem.Up; Reset the target and enter debug modeData.Load.Elf sieve.dxe; Load the applicationRegister.Set PC main; Set the PC to function mainList.Mix; Open disassembly window *) Register.view; Open register window *) PER.view; Open window with peripheral register *) Break.Set sieve; Set breakpoint to function sieveBreak.Set 0x1000 /p; Set on-chip breakpoint to address 1000; Refer to the restrictions in; On-chip Breakpoints.*) These commands open windows on the screen. The window position can be specified with the WinPOS command.TroubleshootingSYStem.Up ErrorsThe SYStem.Up command is the first command of a debug session where communication with the target is required. If you receive error messages while executing this command this may have the following reasons.All The target has no power.All There are additional loads or capacities on the JTAG lines.All The JTAG clock is too fast.FAQPlease refer to https:///kb.Configuration System OverviewBlackfin specific SYStem CommandsSYStem.CONFIG Configure debugger according to target topologyThe four parameters IRPRE, IRPOST , DRPRE, DRPOST are required to inform the debugger about the T AP controller position in the JT AG chain, if there is more than one core in the JT AG chain (e.g. ARM + DSP). The information is required before the debugger can be activated e.g. by a SYStem.Up . See Daisy-chain Example .For some CPU selections (SYStem.CPU ) the above setting might be automatically included, since the required system configuration of these CPUs is known.T riState has to be used if several debuggers (“via separate cables”) are connected to a common JT AG port at the same time in order to ensure that always only one debugger drives the signal lines. T APState and TCKLevel define the T AP state and TCK level which is selected when the debugger switches to tristate mode. Please note: nTRST must have a pull-up resistor on the target, TCK can have a pull-up or pull-down resistor, other trigger inputs need to be kept in inactive state.Format:SYStem.CONFIG <parameter> <number_or_address>SYStem.MultiCore <parameter> <number_or_address> (deprecated)<parameter>:CORE <core><parameter>:(JTAG):DRPRE <bits>DRPOST <bits>IRPRE <bits>IRPOST <bits>DAPDRPOST <bits>DAPDRPRE <bits>DAPIRPOST <bits>DAPIRPRE <bits>TAPState <state>TCKLevel <level>TriState [ON | OFF ]Slave [ON | OFF ]DEBUGPORTTYPE [JTAG | SWD ]SWDPIDLEHIGH [ON | OFF ]SWDPTargetSel <value>CORE For multicore debugging one TRACE32 PowerView GUI has to be startedper core. To bundle several cores in one processor as required by thesystem this command has to be used to define core and processorcoordinates within the system topology.Further information can be found in SYStem.CONFIG.CORE.… DRPOST <bits>Defines the TAP position in a JT AG scan chain. Number of TAPs in theJTAG chain between the TDI signal and the TAP you are describing. InBYPASS mode, each TAP contributes one data register bit. See possibleTAP types and example below.Default: 0.… DRPRE <bits>Defines the TAP position in a JT AG scan chain. Number of TAPs in theJTAG chain between the TAP you are describing and the TDO signal. InBYPASS mode, each TAP contributes one data register bit. See possibleTAP types and example below.Default: 0.… IRPOST <bits>Defines the TAP position in a JT AG scan chain. Number of InstructionRegister (IR) bits of all TAPs in the JT AG chain between TDI signal andthe TAP you are describing. See possible T AP types and example below.Default: 0.… IRPRE <bits>Defines the TAP position in a JT AG scan chain. Number of InstructionRegister (IR) bits of all TAPs in the JTAG chain between the T AP you aredescribing and the TDO signal. See possible TAP types and examplebelow.Default: 0.TAPState(default: 7 = Select-DR-Scan) This is the state of the TAP controller whenthe debugger switches to tristate mode. All states of the JTAG T APcontroller are selectable.TCKLevel (default: 0) Level of TCK signal when all debuggers are tristated. TriState(default: OFF) If several debuggers share the same debug port, thisoption is required. The debugger switches to tristate mode after eachdebug port access. Then other debuggers can access the port. JT AG:This option must be used, if the JTAG line of multiple debug boxes areconnected by a JTAG joiner adapter to access a single JTAG chain. Slave(default: OFF) If more than one debugger share the same debug port, allexcept one must have this option active.JTAG: Only one debugger - the “master” - is allowed to control the signalsnTRST and nSRST (nRESET).DEBUGPORTTYPE [JTAG | SWD]It specifies the used debug port type “JT AG”, “SWD”. It assumes the selected type is supported by the target.Default: JT AG.SWDPIdleHigh [ON | OFF]Keep SWDIO line high when idle. Only for Serialwire Debug mode. Usually the debugger will pull the SWDIO data line low, when no operation is in progress, so while the clock on the SWCLK line is stopped (kept low).Y ou can configure the debugger to pull the SWDIO data linehigh, when no operation is in progress by usingSYStem.CONFIG SWDPIdleHigh ONDefault: OFF.SWDPTargetSel<value>Device address in case of a multidrop serial wire debug port.Default: none set (any address accepted).Daisy-Chain ExampleBelow, configuration for core C.Instruction register length of •Core A: 3 bit •Core B: 5 bit •Core D: 6 bitSYStem.CONFIG.IRPRE 6.; IR Core D SYStem.CONFIG.IRPOST 8.; IR Core A + B SYStem.CONFIG.DRPRE 1.; DR Core D SYStem.CONFIG.DRPOST 2.; DR Core A + BSYStem.CONFIG.CORE 0. 1.; Target Core C is Core 0 in Chip 1Core A Core B Core CCore D TDOTDI Chip 0Chip 1TapStates0Exit2-DR1Exit1-DR2Shift-DR3Pause-DR4Select-IR-Scan5Update-DR6Capture-DR7Select-DR-Scan8Exit2-IR9Exit1-IR10Shift-IR11Pause-IR12Run-Test/Idle13Update-IR14Capture-IR15Test-Logic-ResetSYStem.CONFIG.CORE Assign core to TRACE32 instance Format:SYStem.CONFIG.CORE<core_index><chip_index>SYStem.MultiCore.CORE<core_index><chip_index> (deprecated) <chip_index>:1 (i)<core_index>:1…kDefault core_index: depends on the CPU, usually 1. for generic chipsDefault chip_index: derived from CORE= parameter of the configuration file (config.t32). The COREparameter is defined according to the start order of the GUI in T32Start with ascending values.T o provide proper interaction between different parts of the debugger, the systems topology must bemapped to the debugger’s topology model. The debugger model abstracts chips and sub cores of these chips. Every GUI must be connect to one unused core entry in the debugger topology model. Once the SYStem.CPU is selected, a generic chip or non-generic chip is created at the default chip_index.Non-generic ChipsNon-generic chips have a fixed number of sub cores, each with a fixed CPU type.Initially, all GUIs are configured with different chip_index values. Therefore, you have to assign thecore_index and the chip_index for every core. Usually, the debugger does not need further information to access cores in non-generic chips, once the setup is correct.Generic ChipsGeneric chips can accommodate an arbitrary amount of sub-cores. The debugger still needs information how to connect to the individual cores e.g. by setting the JT AG chain coordinates.Start-up ProcessThe debug system must not have an invalid state where a GUI is connected to a wrong core type of a non-generic chip, two GUIs are connected to the same coordinate or a GUI is not connected to a core. The initial state of the system is valid since every new GUI uses a new chip_index according to its CORE= parameter of the configuration file (config.t32). If the system contains fewer chips than initially assumed, the chips must be merged by calling SYStem.CONFIG.CORE.SYStem.CPU CPU type selection Format:SYStem.CPU <cpu><cpu>:BF531 | BF532 | BF533 | BF534…Default selection: BF534.Selects the CPU type.SYStem.JtagClock JT AG clock selection Format:SYStem.JtagClock [<frequency>]SYStem.BdmClock<frequency>(deprecated)Default frequency: 1MHz.Selects the JT AG port frequency (TCK). Any frequency up to 50MHz can be entered, it will be generated by the debuggers internal PLL.For CPUs which come up with very low clock speeds it might be necessary to slow down the JT AGfrequency. After initialization of the CPUs PLL the JT AG clock can be increased.SYStem.LOCK Lock and tristate the debug port Format:SYStem.LOCK [ON | OFF]Default: OFF.If the system is locked, no access to the debug port will be performed by the debugger. While locked, the debug connector of the debugger is tristated. The main intention of the SYStem.LOCK command is to give debug access to another tool.SYStem.MemAccess Real-time memory access (non-intrusive) Format:SYStem.MemAccess Denied | StopAndGo | BTCBTC“BTC” allows a non-intrusive memory access while the core is running, if aBackground T elemetry Channel (BTC) is defined in your application. Anyinformation on how to create such a channel can be found in AnalogDevices’ VisualDSP++ user’s manual. The JT AG clock speed should be asfast as possible to get good performanceDenied Real-time memory access during program execution to target is disabled.StopAndGo Temporarily halts the core(s) to perform the memory access. Each stoptakes some time depending on the speed of the JT AG port, the number ofthe assigned cores, and the operations that should be performed.SYStem.Mode System mode selectionFormat:SYStem.Mode <mode>SYStem.Attach (alias for SYStem.Mode Attach)SYStem.Down (alias for SYStem.Mode Down)SYStem.Up (alias for SYStem.Mode Up)<mode>:DownGoAttachUpDown Disables the debugger.Go Resets the target with debug mode enabled and prepares the CPU fordebug mode entry. After this command the CPU is in the system.upmode and running. Now, the processor can be stopped with the breakcommand or if a break condition occurs.Attach User program remains running (no reset) and the debug interface isinitialized.Up Resets the target and sets the CPU to debug mode. After execution ofthis command the CPU is stopped and prepared for debugging.StandBy Not supported.NoDebug Not supported.SYStem.Option.IMASKASM Interrupt disable Format:SYStem.Option.IMASKASM [ON | OFF]Mask interrupts during assembler single steps. Useful to prevent interrupt disturbance during assembler single stepping.SYStem.Option.IMASKHLL Interrupt disable Format:SYStem.Option.IMASKHLL [ON | OFF]Mask interrupts during HLL single steps. Useful to prevent interrupt disturbance during HLL single stepping.BreakpointsThere are two types of breakpoints available: software breakpoints and on-chip breakpoints. Software BreakpointsSoftware breakpoints are the default breakpoints. A special breakcode is patched to memory so it only can be used in RAM or FLASH areas.There is no restriction in the number of software breakpoints.On-chip BreakpointsThe Blackfin processor has a total of six instruction and two data on-chip breakpoints.A pair of two breakpoints may be further grouped together to form a range breakpoint. A range breakpointcan be including or excluding. In the first case the core is stopped if an address in the range is detected, in the second case the core is stopped when an address outside of the range is observed.Breakpoint in ROMWith the command MAP.BOnchip<range> it is possible to inform the debugger about ROM(FLASH,EPROM) address ranges in target. If a breakpoint is set within the specified address range the debugger uses automatically the available on-chip breakpoints.Example for BreakpointsAssume you have a target with FLASH from 0x20000000 to 0x200FFFFF and RAM from 0x0 to 0x1000000. The command to configure TRACE32 correctly for this configuration is: Map.BOnchip 0x20000000--0x200FFFFFThe following breakpoint combinations are possible.Software breakpoints:Break.Set 0x0 /Program; Software Breakpoint 1Break.Set 0x1000 /Program; Software Breakpoint 2On-chip breakpoints:Break.Set 0x20000100 /Program; On-chip Breakpoint 1Break.Set 0x2000ff00 /Program; On-chip Breakpoint 2Memory ClassesThe following memory classes are available: Memory Class DescriptionP ProgramD DataCPU specific TrOnchip CommandsThe TrOnchip command group is not available for the Blackfin debugger.JTAG ConnectorSignal Pin Pin SignalGND12EMU-N/C34GNDVDDIO56TMSN/C78TCKN/C910TRST-N/C1112TDIGND1314TDOJTAG Connector Signal Description CPU Signal TMS JTAG-TMS,TMSoutput of debuggerTDI TDI JTAG-TDI,output of debuggerTCK TCK JTAG-TCK,output of debugger/TRST /TRST JTAG-TRST,output of debuggerTDO TDO JTAG-TDO,input for debugger/EMU JTAG Emulation Flag /EMUVDDIO VDDIO This pin is used by the debugger to sense the targetI/O voltage and to set the drive levels accordingly. Ifthe sensed voltage level is too low (e.g. target has nopower) the debugger powers down its drivers toprevent the target from damage.。
Infoprint 250 導入と計画の手引き 第 7 章ホスト
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Type of service...............: TOS
*NORMAL
Maximum transmission unit.....: MTU
*LIND
Autostart.....................:
AUTOSTART
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: xx.xxx.xxx.xxx
: xx.xxx.xxx.xxx
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48 Infoprint 250
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WRKAFP2 (V3R1 & V3R6)
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rpc8201f中文手册
rpc8201f中文手册引言概述：RPC8201F是一款功能强大的中文手册，为用户提供了丰富的功能和详细的操作指南。
本文将通过六个大点对RPC8201F中文手册进行阐述，包括基本介绍、使用方法、高级功能、故障排除、常见问题解答和技术支持。
希望本文能够帮助用户更好地了解和使用RPC8201F中文手册。
正文内容：1. 基本介绍1.1 产品概述：介绍RPC8201F中文手册的基本信息，包括产品名称、型号和主要特点等。
1.2 功能特点：详细介绍RPC8201F中文手册的功能特点，如支持的语言、操作系统兼容性、界面设计等。
2. 使用方法2.1 安装和配置：介绍RPC8201F中文手册的安装步骤和配置方法，包括硬件连接和软件设置等。
2.2 导航和搜索：详细介绍RPC8201F中文手册的导航和搜索功能，帮助用户快速找到所需的内容。
2.3 浏览和标注：介绍RPC8201F中文手册的浏览和标注功能，方便用户对重要内容进行标记和注释。
2.4 多媒体支持：说明RPC8201F中文手册对多媒体内容的支持，如图片、音频和视频等。
3. 高级功能3.1 定制化设置：介绍RPC8201F中文手册的定制化设置功能，用户可以根据自己的需求进行个性化设置。
3.2 多语言切换：详细说明RPC8201F中文手册的多语言切换功能，用户可以根据需要切换不同的语言界面。
3.3 批量导出和打印：介绍RPC8201F中文手册的批量导出和打印功能，方便用户将内容导出或打印成纸质文档。
4. 故障排除4.1 常见问题：列举RPC8201F中文手册使用过程中常见的问题，并给出解决方法。
4.2 错误代码：解释RPC8201F中文手册可能出现的错误代码及其含义，帮助用户快速定位问题。
4.3 故障诊断：提供RPC8201F中文手册的故障诊断方法，帮助用户分析和解决故障。
5. 常见问题解答5.1 如何更新手册内容：介绍RPC8201F中文手册内容更新的方法和步骤。
ABNTNBR15602_2D2_2007Ing_2008
BRAZILIAN STANDARD ABNT NBR15602-2First edition2007.11.30Valid from2007.12.01Digital terrestrial television – Video coding, audio coding and multiplexingPart 2: Audio codingDescriptors: Digital terrestrial television. Source coding. AAC. Level and profile. ICS 33.160.01ISBN 978-85-07-00608-4Reference numberABNT NBR 15602-2:200812 pages© ABNT 2008ABNT NBR 15602-2:2007© ABNT 2008All rights reserved. Unless otherwise specified, no part of this publication may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from either ABNT.ABNT officeAv.Treze de Maio, 13 - 28º andar20031-901 - Rio de Janeiro - RJTel.: + 55 21 3974-2300Fax: + 55 21 2220-1762abnt@.br.brPublished in Brazilii © ABNT 2007 – All rights reservedABNT NBR 15602-2:2007© ABNT 2007 – All rights reserved iiiContents Pages1 Scope (1)2 Normative references (1)3 Terms and definitions (1)4 Abreviations (2)5 Audio input format (3)5.1 General conditions (3)5.2 Main parameters (3)5.2.1 Formats (3)5.2.2 Interfaces (3)5.2.3 Audio signal levels (4)5.2.4 Multichannel modes or configurations (4)5.2.5 Metadata (4)6 Audio services and auxiliary channels (5)7 Audio coding system (6)8 Audio compression and transmission procedures (6)8.1 Overview of the coding standard (6)8.2 Profiles and levels (7)8.3 Transport and multiplex layer (7)9 Audio coding parameter restrictions (8)9.1 Audio coding parameter restrictions for full-seg services (8)9.1.1 Audio coding modes (8)9.1.2 Main parameters (9)9.1.3 Operational restrictions with respect to stereo receivers compatibility (10)9.2 Audio coding parameter restrictions for one-seg services (10)9.2.1 Audio coding modes (10)9.2.2 Main parameters (11)Bibliography (12)ABNT NBR 15602-2:2007ForewordAssociação Brasileira de Normas Técnicas (ABNT) is the Brazilian Standardization Forum. Brazilian Standards, which content is responsability of the Brazilian Committees (Comitês Brasileiros – ABNT/CB), Sectorial Standardization Bodies (Organismos de Normalização Setorial – ABNT/ONS), and Special Studies Committees (Comissões de Estudo Especiais – ABNT/CEE), are prepared by Study Committees (Comissões de Estudo – CE), made up of representants from the sectors involved including: producers, consumers and neutral entities (universities, laboratories, and others).Brazilian Standards are drafted in accordance with the rules given in the ABNT Directives (Diretivas), Part 2. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. ISO shall not be held responsible for identifying any or all such patent rights.ABNT NBR 15602-2 was prepared within the purview of the Special Studies Committees of Digital Television (ABNT/CEE-00:001.85). The Draft Standard was circulated for National Consultation in accordance with ABNT Notice (Edital) nº 07,from June 29, 2007 to August 28, 2007, with the number Draft 00:001.85-002/2.Should any doubts arise regarding the interpretation of the English version, the provisions in the original text in Portuguese shall prevail at all time.This standard is based on the work of the Brazilian Digital Television Forum as established by the Presidential Decree number 5.820 of June, 29th 2006.ABNT NBR 15602 consists of the following parts, under the general title “Digital terrestrial television – Video coding, audio coding and multiplexing”:⎯Part 1: Video coding;⎯Part 2: Audio coding;⎯Part 3: Signal multiplexing systems.This Standard is the English version of the corrected version dated 2008.04.07 of ABNT NBR 15602-2:2007.iv © ABNT 2007 – All rights reservedBRAZILIAN STANDARD ABNT NBR 15602-2:2007© ABNT 2007 – All rights reserved 1Digital terrestrial television – Video coding, audio coding and multiplexing Part 2: Audio coding1 ScopeThis part of ABNT NBR 15602 specifies the parameters for the audio signals and the system of sound coding and decoding to be used in the Brazilian system for digital terrestrial television (SBTVD).2 Normative referencesThe following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies.ABNT NBR 15602-3:2007, Digital terrestrial television – Audio coding, video coding and multiplexing – Part 3: Multiplexing signalsABNT NBR 15603-2:2007, Digital terrestrial television – Video coding, audio coding and multiplexing – Part 3: Signal multiplexing systemsISO/IEC 13818-1:2007, Information technology – Generic coding of moving pictures and associated audio information: SystemsISO/IEC 14496-3:2005, Information technology – Coding of audio-visual objects – Part 3: AudioITU Recommendation BS.775-1, Multichannel stereophonic sound system with and without accompanying picture 3 Terms and definitionsFor the purposes of this part of ABNT NBR 15602, the following terms and definitions apply.3.1encodingtransforming process of external signals in bits representing such signalsNOTE The encoding takes place, for instance, through sampling, and the obtained information may also be compressed.3.2decodingprocess responsible for original signal recovery through the bits received by the coderNOTE The decoding also may, eventually, perform the decompression of the received information.3.3downmixoperation that transforms a n-channel matrix and obtains less than n channels, usually related to the conversion of a multichannel program to stereo or monoABNT NBR 15602-2:20073.4LATM/LOAStransport mechanism defined in the MPEG-4 that utilizes two layers, one for multiplexing and other for synchronizingNOTE The multiplexing layer LATM manages the multiplexing of several audio payloads (audio data) and its configuration data on the AudioSpecificConfig() elements. The synchronizing layer LOAS specifies the syntax for self-synchronizing in the MPEG-4 audio transport stream.3.5levelmaximum number of channels and sample frequency indicating the computational complexity of the decoder3.6full-seg receiverdevice capable of decoding the audio, video and data information contained in the transport stream layer of the thirteen segments aimed the fixed (indoor) and mobile servicesNOTE The classification of full-seg shall be applied to digital converters, and know as settop boxes and integrated thirteen segments with exhibition screen but not limited to those. This kind of receiver shall be capable of receiving and decoding the high definition television signals and at manufactures criteria, also be capable of receiving and decoding the information on layer “A” of the transport stream, which is originally aimed to the portable receivers, here defined as one-seg.3.7one-seg receiverdevice which decode exclusively audio and video information contained in transmission layer “A” located in the central portion of the thirteen segmentsNOTE The classification of the one-seg shall be assigned to portable receivers, also known as handheld devices, with screen size bellow 7 inches. Within the products classified as one-seg are, but not limited to, the mobile phone integrated receivers, PDA, one-seg dongles, portable television, that are energized by an internal battery and, therefore, without the necessary use of an external power source, as well as those aimed vehicular reception. This kind of receiver shall be capable of receiving and decoding only digital terrestrial television signal in layer “A” of the transport stream, and therefore only the basic profile, aimed the portable devices.3.8audio access unitaudio portion of an elementary stream that is individually accessibleNOTE For the proposes of this part of ABNT NBR 15602, the audio access unit is equivalent to a rawdatablock4 AbreviationsFor the purposes of this part of ABNT NBR 15602, the following abbreviations apply.AAC Advanced Audio CodingCPE Channel Pair ElementHDMI High-definition multimedia interfaceLATM Low overhead audio transport multiplexLFE Low Frequency EnhancementLOAS Low Overhead Audio Stream2 © ABNT 2007 – All rights reservedABNT NBR 15602-2:2007PCE Program Configuration ElementPCM Pulse-code modulationPS Parametric StereoPSI Program Specific InformationSAP Second Audio ProgramSCE Single Channel ElementSDI Serial Digital InterfaceSBR Spectral Band ReplicationTS Transport Stream5 Audio input format5.1 General conditionsThe general conditions for the audio input format shall be the following:a) sample frequency of audio signal: 32 kHz, 44,1 kHz or 48 kHz;b) configuration of stereophonic and multichannel signals (that means, signals consisting of two or more audiosignals to obtain an evolving reproduction or spatial sound): sample rate for all the signals shall be the same;c) quantization of input signals shall use 16 bits or 20 bits;d) one audio program shall have at least one audio channel. The maximum number of channels in the programshall be limited to maximum number of channels allowed for ISO/IEC 14496-3;e) it is recommended that multichannel programs be prepared in conformance with ITU RecommendationBS.775-1;f) for audio programs in multichannel mode compatible with the modes foreseen in the standard ITURecommendation BS.775-1 shall be in one of the allowed configurations presented on Table 3;g) in case a multichannel program is transmitted without a stereo program, the multichannel program shall be inmode 3/2 (5.0 or 5.1, with or without LFE of low frequency enhancement) to allow stereo downmix;5.2 Main parameters5.2.1 FormatsBitstreams or files containing uncompressed digital audio shall be accepted in PCM format, such as WAVE or AIFF, stereo and multichannel.5.2.2 InterfacesWithin the allowed digital input/output interfaces shall be AES3 (AES/EBU, with two PCM channels per bitstream), SDI, HD-SDI and HDMI.© ABNT 2007 – All rights reserved3ABNT NBR 15602-2:20075.2.3 Audio signal levelsThe reference level for sound pressure intensity shall be equal to 0 dB. The allowable dynamic range shall be limited to + 20 dB (headroom) and – 70 dB with respect to reference, corresponding to a typical dynamic range of 90 dB. Mean audio levels should be at – 20 dBFS (0 dB), to allow volume homogeneity between distinct channels. The signal shall allow peaks of at least 4 times its mean RMS power.5.2.4 Multichannel modes or configurationsThe transmission mode refers to the multichannel configuration used, the number of available channels in the transport stream and to the coding mode of this bitstream.The number of source audio channels shall be at least one for a basic configuration, two for typical stereo and five channels plus one low frequency enhancement (LFE) channel for standard “5.1” multichannel transmission. The source signals shall be preprocessed and/or combined prior to entering the encoder to produce the transmission channels, which shall be present in the bitstream.A same audio program may be transmitted in more than one mode, for instance, in stereo (2 channels) plus multichannel mode 3/2 (5.1) simultaneously, but the simultaneous transmission is not mandatory.In the case of exclusive transmission on multichannel mode 3/2 (5.1) the receivers shall be capable of synthesizing the stereo channel by means of a downmixing conversion, replication operations, dematrixing, combination and signal processing within the functional audio reproduction system of the receiver. The allowed multichannel modes for coding and transmission shall be as described in 9.1.1.5.2.5 MetadataAuxiliary data shall contain information such as content description of audio programs, configuration parameters of audio services and parameters of the transmitted audio signals in the bitstream.The following data may be allowed as auxiliary data:a) content description of audio programs being transmitted (for instance, sound program rating, audio objectsdescription mixed within the content, auxiliary channel content description, etc);b) the multichannel mode;c) the reference level for equalization operations during playback on the access terminal.Auxiliary data and the content description of audio programs may be classified in two levels.A first level shall be normative. This level shall affect directly the receiver operation (bitstream decoding) such as, for instance, number and channel mode information and coding profile and level extracted directly from PSI tables. The data under this category shall be essential for the correct decoding and playback of the audio service in the receiver.A second level shall be informative. This level shall not interfere with decoding, but give information about the content of the audio programs associated with each PID. Data in this category shall be used for processing the program information on the receiver.Table 1 summarizes the types of audio auxiliary data allowed in the system.4 © ABNT 2007 – All rights reservedABNT NBR 15602-2:2007© ABNT 2007 – All rights reserved 5Table 1 — Type of audio auxiliary data Parameter Description and usematrix_downmix_idx Description: coefficient indicator used in the multichannel-to-stereodownmix equations. Shall be transmitted in the bitstream as metadata,as specified in ISO/IEC 14496-3Use: Mandatory when a multichannel program is transmittedWhen the matrix_mixdown_idx_present parameter is set to ‘1’ in itsprogram PCE (PID), the downmix system described inISO/IEC 14496-3:2005, in subclause 4.5.1.2.2 and Table 4.70 shall beusedIf the receiving terminal performs the downmix process, the stereoanalog output shall be always active with this signalprogram_ref_level Description: representative value of the mean intensity of long termprogram audio volume for all combined channels with respect to the0 dBFS reference. It is represented in 128 levels (7 bits), in steps of0.25 dB with a total range of 32 dB in relation to the end of scale(0 dBFS)This parameter shall contain an informative description of the referencevolume used by the broadcaster (0 dB) with respect to the end of scale(0 dBFS), for dialogue normalization and to make the channel changemore comfortable to the viewerUse: mandatory. It is recommended to use prog_ref_level = 80 (0x50)which corresponds, to an indicative value of – 20 dBFS as 0 dBreference, according to ISO/IEC 14496-3This parameter shall be transmitted together with the DRC structure,as described in ISO/IEC 14496-3:2005, subclause 4.5.2.7Dynamic Range Control (DRC)Description: the dynamic range control is specially indicated totransmissions in multichannel mode and can be signaled by metadata,as indicated in ISO/IEC 14496-3:2005, subclause 4.5.2.7Use: is optional during encoding, but the decoder shall support this tool.In case the encoder do not sends the DRC information, the decodershall not use the DRC tool 6 Audio services and auxiliary channelsAudio services include the transmission of additional audio programs to the main program and shall be considered optional services, excluding the audio description channel which transmission is required by current legislation.The transmission of these services is done through the allocation of additional auxiliary channels in distinct audio programs (PID) or in the same bitstream of a unique PID, observing the maximum number of allowed channels in the same bitstream by the coding profile/level used.Additional channels to the main program may be used to transmit audio in other languages (for instance, SAP), to transmit additional programs to the main program, audio description services (AD), and secondary audio from other sound takes (additional content, such as effects).All additional channels referring to auxiliary audio services shall be appropriately signaled using valid component_type identification in the respective audio_component_descriptor of the program.The auxiliary channels shall be transmitted in distinct programs (distinct PID) with proper signaling and channel identification to be selected, decoded and played with or in substitution of the main audio program channels.ABNT NBR 15602-2:2007The audio description service usually consists in one voice monoaural channel and gives a scene description as a subcomponent associated to the television service. It shall support the understanding of the main entertainment (but no exclusively) for viewers with visual impairment.The AD transmission shall be implemented using at least one of the mechanisms below:a) as an auxiliary channel (monaural or stereo) containing the AD previously mixed with the main audio program;b) as a auxiliary channel containing separate AD to later processing with the main audio program;In both cases, the service should be signaled on the component_type parameter described in the “Audio component descriptor”, as per ABNT NBR 15603-2:2007, Table 28.The ability to mix one or more supplementary description channels with the main audio program may have other applications, including multilingual commentary, interactivity and educational purposes.7 Audio coding systemAudio signals shall be coded by a combination of time-frequency transform coding. The frequency transform shall decompose the input signal in its frequency components by means of a modified discrete cosine transform (DCT), which reduces the amount of information by reducing the decrease in frequency deviation of each component.An additional compression tool is the psycho-acoustic weighted bit assignment in which codes shall be weighted to minimize signal degradation in the frequency bandwidth perceived by human ears.Audio compression and transmission procedures shall comply with ISO/IEC 14496-3.Decoders shall be made under the assumption that any legal structure as permitted by ISO/IEC 13818-1 may occur in the broadcast stream even if presently reserved or unused. The audio decoder shall be able to skip over “reserved” structures and data structures which correspond to functions not implemented by receivers.8 Audio compression and transmission procedures8.1 Overview of the coding standardFigure 1 shows audio compression and transmission procedure.6 © ABNT 2007 – All rights reservedFigure 1 - Procedures for audio transmission and codingThe filter bank shall convert the digital audio input signal from time domain to frequency domain. After that, the filter bank applies the modified discrete cosine transform, and windowing functions to input signal blocks, according to audible psychological characteristics.The psychoacoustic process shall calculate the masking quantity (limits for differentiating a specific audio signal from other signals) and feed the filter bank with input signal blocks.The samples shall be quantized after the filter bank processing, based on masking factor calculated by psychoacoustic process. So that, the total number of bits utilized for each block shall not be exceeded. Bitstream shall be configured according to ISO/IEC 14496-3.8.2 Profiles and levelsThe audio coding shall be compatible with ISO/IEC 14496-3. The following profiles and levels of MPEG-4 AAC standard shall be allowed:a) LC (low complexity), basic profile of AAC standard; L2 and L4 levels;b) HE (high efficiency), advanced profile of high efficiency, combining the LC profile with the use of the SBR(spectral band replication) tool for version 1 of this profile, L2 and L4 levels;c) HE combined with PS (parametric stereo) tool for version 2 of this profile, L2 level.The profile and level of the MPEG-4 AAC coder shall be adequately signalized according to ABNT NBR 15602-3e ABNT NBR 15603-2.8.3 Transport and multiplex layerThe intermediate audio coding and framing shall be compatible with LATM/LOAS according to ISO/IEC 14496-3. The elementary stream shall be first encapsulated in the LATM transport format and shall use the A udioMuxElement() multiplex element.The audio transport synchronization layer (LOAS) shall use the AudioSyncStream() transmission format, according to ISO/IEC 14496-3.The MPEG-4 audio transported by the MPEG-2 transport stream using the LATM/LOAS transport syntax shall be identified by the stream_type 0x11, according to the stream_type_assignments in ISO/IEC 13818-1:2007.To decode audio, the receiver shall identify the type, profile and level transmitted and shall be capable to extract the audio objects payloads. It is mandatory the use of explicit SBR signaling without PES alignment to transmit MPEG-4 audio over MPEG-2 transport streams.© ABNT 2007 – All rights reserved7The receivers shall be capable of processing the SBR tool. The SBR presence signaling shall be explicit using the non-backward compatible explicit signalization mechanism, according to ISO/IEC 14496-3.Table 2 describes the LATM/LOAS transport syntax fields within StreamMuxConfig(), which shall be formatted to identify and recover audio payloads, according to ISO/IEC 14496-3.Table 2 — Main LATM configuration parametersLATM parameter Use descriptionaudioMuxVersion Shall have the value “0”allStreamsSameTimeFraming Shall have the value “1”numSubFrames Shall have the value “0” indicating only one PayloadMux() (access unit) within an AudioMuxElement()numProgram Shall have the value “0” indicating one program per LATMnumLayer Shall have the value “0” indicating only one layerframeLengthType Shall have the value “0” indicating that the payload frame length isvariable. The payload extension in bytes is directly specified inPayloadLengthInfo() with 8 bits words9 Audio coding parameter restrictions9.1 Audio coding parameter restrictions for full-seg services9.1.1 Audio coding modesThe coding mode determines the number of available channels on the audio service. The audio coding modes for digital transmission shall be in accordance to the restrictions of Table 3.Table 3 — Restrictions of the audio coding modesParameter RestrictionAllowed audio modes Monaural (1/0), stereo (2/0 and 2/0 + LFE)a, multichannel stereo (3/0, 2/1, 3/1, 2/2, 3/2, 3/2 + LFE)a, two independent audio signals (dual monaural), multi-audio (three or more audio signals) and a any combination of the above modesRecommended audiomodesStereo (2/0), multichannel (3/2 + LFE)Downmix The signaling presented in Table 1 shall be used for 5.0 and 5.1 configurations. In any other multichannel configuration, the receiver can use other downmix schemes, since audio intelligibility is assured. The stereo-to-mono downmix scheme is not covered by this Standard, but clipping shall be avoideda Number of channels for front/surround loudspeakers.EXAMPLE 3/1 = 3 front + 1 surround; 3/2 = 5.0 = 3 front channels and 2 surround.© ABNT 2007 – All rights reserved 9The decoder shall be capable to process any of the recommended audio modes.The second channel configuration according to its operation mode, and its transmission order within the payload, shall be in accordance with Table 4.Table 4 — Channel configurations and recommended modes for MPEG-4 AAC ModeChannel configuration SE order of transmission a Standard element for loudspeaker mapping b Monaural (1/0)1 <SCE1><TERM> SCE1 = C Stereo (2/0)2 <CPE1><TERM> CPE1 = L and R 3/03 <SCE1><CPE1><TERM> SCE1 = C, CPE1 = L and R3/1 4 <SCE1><CPE1><SCE2> <TERM> SCE1 = C, CPE1 = L and R, SCE2 = MSMultichannel 5.0 (3/2) 5 <SCE1><CPE1><CPE2> <TERM> SCE1 = C, CPE1 = L and R,CPE2 = LS and RSMultichannel 5.1 (3/2 + LFE)6 <SCE1><CPE1><CPE2> <LFE><TERM> SCE1 = C, CPE1 = L and R,CPE2 = LS and RS, LFE = LFE a Abbreviations related to the syntactic element (SE): SCE – single channel element, CPE – channel pairelement, LFE – LFE channel element, TERM – terminator.b Abbreviations related to loudspeaker arrangement: L – front-left loudspeaker / R – front-right loudspeaker / C– front-central loudspeaker / LFE – low frequency enhancement / LS – left-surround loudspeaker / RS – right-surround loudspeaker / MS – monaural surround loudspeaker .In the case a two independent audio signals are transmitted (monaural dual or 1/0 + 1/0) the recommended SE order of transmission is: <SCE1><SCE2><TERM>, being SCE1 the first (main) channel and SCE2 the second program channel.If the used configuration is not present on Table 4, it shall be reproduced using a configuration with the same number of channels and with the respective signaling.9.1.2 Main parametersThe audio coding system main parameters shall be as presented on Table 5.Table 5 — Main audio coding parameters – Full-seg servicesParameter RestrictionAllowed transport mechanismsLATM/LOAS (according to ISO/IEC 14496-3) Recommended channel numberMono (1.0), 2 channels (stereo or 2.0) or multichannel (5.1) Allowed profiles and levels Low complexity AAC: level 2 (LC-AAC@L2) for two channelsLow complexity AAC: level 4 (LC-AAC@L4) for multichannel High-Efficiency (HE): level 2 (HE-AAC v1@L2) for two channelsHigh-Efficiency (HE): level 4 (HE-AAC v1@L4) for multichannelMaximum allowed bit rateIn accordance to ISO/IEC 14496-3 Samples per frame frameLengthFlag in GASpecificConfig() shall be set to 0, indicating that the frame length shall be of 1024 samples for AAC and 2048when using SBR. 960 samples for AAC (or 1920 when using SBR)are not allowedFor high-fidelity transmission it is recommended the use of the profile/level AAC@L4 in multichannel mode and profile/level AAC@L2 for stereo mode. In stereo audio transmission, level 4 (L4) shall not be used.Signals may be encoded on any bit rate supported by the selected profile and level. At the same time, the multichannel signal may use any of the profile sample rates.The dynamic range control tools of MPEG-4 AAC may be used.9.1.3 Operational restrictions with respect to stereo receivers compatibilityWhen the multichannel service is available:a) the transmission shall occur with a minimum of one program in two channels (2/0 or stereo) or onemultichannel program (3/2);b) the simultaneous transmission of two channels is not mandatory when the multichannel service is available.Basically, the two channels receiver (stereo) shall be capable to process the signal through downmixing;c) the receiver shall be capable to interpret the downmix coefficient using PCE according to the AAC standard(see Table 1) when the 5 (3/2) and 5.1 (3/2 + LFE) channel services are available.9.2 Audio coding parameter restrictions for one-seg services9.2.1 Audio coding modesThe coding mode determines the number of available channels on the audio service. The audio coding modes for digital transmission shall be in accordance to the restrictions described on Table 6.Table 6 — Restrictions on audio coding modes – one-seg service Parameter RestrictionAllowed audio modes Monaural (1/0), stereo (2/0)The audio decoder shall be capable to process any of the recommended audio modes.The channel configuration, according to the operation mode, and its transmission order within the payload shall be in accordance to Table 7.Table 7 — Channel configuration and standard modes for MPEG-4 AAC Mode Channel configuration SE order oftransmission aStandard element for loudspeaker mapping b Monaural (1/0) 1 <SCE1><TERM>SCE1 = C Stereo (2/0) 2 <CPE1><TERM>CPE1 = L and R a Abbreviations related to the syntactic element (SE): SCE – single channel element, CPE – channel pairelement, LFE – LFE channel element, TERM – terminator.b Abbreviations related to loudspeaker arrangement: L – front-left loudspeaker / R – front-rightloudspeaker / C – front-central loudspeaker.。
美福2008操作系统安装手册
服务器安装安装系统环境安装Windows2008 64位操作系统。
安装TTS引擎1) 关闭数据执行保护，并重启机器。
2) 安装InterPhonic 6.0系统（6700-HASP HL版本.密码：PTLAWX-GXEPD6-W3AHED）。
3)音库安装小芮音库，位置TTS\音库\VocLib16K_xiaorui。
4)cy2008定制包安装，位置TTS\CY2008定制包。
2.拷贝小芮提示音库到相应目录：●拷贝TTS\提示音库\王如提示音\VptLib.be替换C:\Program Files\iFly InfoTek\InterPhonic 6.0\resource\cy2008目录下的VptLib.be文件●拷贝TTS\提示音库\王如提示音库\VptAudio\wangru至C:\Program Files\iFlyInfo Tek\InterPhonic 6.0\resource\cy2008\VptAudio目录下修改TTS安装目录bin\isp目录下ses.cfg和spi.cfg配置文件。
svc_only = false修改为svc_only = true3.设置ses服务为自启动并启动ses（Speech Engine Service）服务，至此TTS引擎及音库安装完成。
4. 安装所需软件1)安装IIS2)安装Dotnetfx35.exe，安装完成后运行命令：（%windir%\\Framework\v2.0.50727\aspnet_regiis –i）安装数据库（使用SQL安装程序完整安装，sa用户对应的密码iflytek!234）安装SQL2005数据库，在DataBase目录下：1）安装isay365_lan数据库●新建isay365_lan数据库●执行i say365_lan.sql，位置DataBase\isay365_lan.sql2）安装PsciManager数据库●新建PsciManager数据库●执行PsciManager.sql，位置DataBase\PsciManager.sql3)对isay365_lan数据库执行isay365_lan_Add.sql脚本如果有安装包,即可从此处安装直至完成.部署WEB网站1.分别对APP,Service,systemweb三个网站建立应用程序池，打开IIS右键‘应用程序池’—添加应用程序池-分别以网站命名2.对已经建立的三个应用程序池，进行设置，设置如下：右键硬件应用程序池名，选择高级设置，将‘启用32位应用程序’对应的值 False 修改为True，三个应用程序池分别都进行此设置3.建立网站在IIS中新建网站SystemWeb，网站端口80，路径指向WebSite\web\SystemWeb3.1.1新建虚拟目录ManagerWeb，指向WebSite\web\ManagerWeb3.1.2新建虚拟目录TransactFileService，指向WebSite\service\TransactFileService3.1.3新建虚拟目录ttsFile，指向WebSite\service\TTSWebService\ecl_ttswave\standard\PromisStudy，3.2 新建文件夹APP（建于WebSite同级目录），在IIS中新建网站APP，路径指向新建的APP文件夹，网站端口88。
Mellanox OFED 安装指南说明书
INSTALLING UBUNTU OS FOR MELLANOX OPENFABRICS ENTERPRISE LINUX DISTRIBUTION ON HPE INFINIBAND EDR/ETHERNET 100G ADAPTERSInstallation guideCONTENTSIntroduction (3)About this document (3)System requirements (3)Installation process overview (3)Verify network adapter is installed (3)Download the Mellanox drivers (4)Install the OFED installation package (4)Post-installation actions (8)Additional links (11)INTRODUCTIONHPE and Mellanox® have aligned to enable end-to-end connectivity solutions for hyperconverged infrastructures. By leveraging the highest throughputs and lowest latency that Mellanox intelligent interconnect solutions provide, HPE customers can take advantage of data delivery speeds of up to 100Gb/s InfiniBand or 10/25/40/50/56/100Gb/s Ethernet. These speeds enable customers to run high-performance workloads such as real-time response and extreme computing.About this documentThis document is intended for users familiar with Linux® environments. This guide covers the steps for installing the Mellanox Linux OpenFabrics Enterprise Distribution (OFED), the software stack used to manage InfiniBand and Ethernet network adapter cards, specifically using the Mellanox ConnectX®-5 platform for HPE InfiniBand EDR/Ethernet 100Gb 2-port 841QSFP28 Adapter 872726-B21. IMPORTANTSuperuser privileges are required for installation. Use the superuser (root) or use the sudo prefix if the sudo package is enabled.SYSTEM REQUIREMENTSThe following table lists the system requirements to install the Mellanox InfiniBand drivers.TABLE 1. Installation requirementsRequirementOperating system Ubuntu 18.04NIC HPE InfiniBand EDR/Ethernet 100Gb 2-port 841QSFP28 Adapter 872726-B21INSTALLATION PROCESS OVERVIEWThe high-level steps for installing the drivers are:1.Verify the network adapter is present.2.Download the Mellanox drivers (OFED file).3.Install the OFED installation package.4.Perform the post-installation actions.5.Update the firmware.Verify network adapter is installedIssue the following command to verify the network adapter is installed:user@ubuntu-gpu1:~$ lspci -v | grep MellanoxSample output:user@ubuntu-gpu1:~$ lspci -v | grep Mellanox86:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]86:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]Download the Mellanox driversThe Mellanox drivers are available at: https:///page/products_dyn?product_family=26&mtag=linux_sw_driversFIGURE 1. MLNX_ OFED Download Center screenSelect the following options from the Mellanox Download Center:•Version: 4.7-1.0.0.1•OS Distribution: Ubuntu•OS Distribution Version: Ubuntu 18.04•Architecture: As applicable•Download: tgz: MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64.tgzInstall the OFED installation packageFollow these steps to install the OFED package.Installation of the OFED package is executed by running the installation script mlnxofedinstall. Refer to the MLNX_OFED Documentation Rev 4.7-1.0.0.1 for other installation methods.1.Copy the downloaded OFED file to the /tmp directory.user@ubuntu-gpu1: cp MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64$ /tmp2.Issue the following commands to extract the .tar file.user@ubuntu-gpu1:~$ cd /tmpuser@ubuntu-gpu1:/tmp$ sudo tar -xzf ./MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64.tgz3.Run the installation script (mlnxofedinstall) by following these commands:user@ubuntu-gpu1:/tmp$ cd MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64/user@ubuntu-gpu1:/tmp/MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64$ sudo ./mlnxofedinstall Sample output:Logs dir: /tmp/MLNX_OFED_LINUX.3524.logsGeneral log file: /tmp/MLNX_OFED_LINUX.3524.logs/general.logThe following list shows the MLNX_OFED_LINUX packages that you have chosen (some might have been added by the installer due to package dependencies):ofed-scriptsmlnx-ofed-kernel-utilsmlnx-ofed-kernel-dkmsrshim-dkmsiser-dkmssrp-dkmslibibverbs1ibverbs-utilslibibverbs-devlibibverbs1-dbglibmlx4-1libmlx4-devlibmlx4-1-dbglibmlx5-1libmlx5-devlibmlx5-1-dbglibrxe-1librxe-devlibrxe-1-dbglibibumadlibibumad-staticlibibumad-develibacmibacm-devlibrdmacm1librdmacm-utilslibrdmacm-devmstflintibdumplibibmadlibibmad-staticlibibmad-devellibopensmopensmopensm-doclibopensm-develinfiniband-diagsinfiniband-diags-compatmftkernel-mft-dkmslibibcm1libibcm-devperftestibutils2libibdm1cc-mgrar-mgrdump-pribsimibsim-docknem-dkmsknemmxmucxsharphcollopenmpimpitestslibdapl2dapl2-utilslibdapl-devsrptoolsmlnx-ethtoolmlnx-iproute2This program will install the MLNX_OFED_LINUX package on your machine. Note that all other Mellanox, OEM, OFED, RDMA, or Distribution IB packages will be removed. Those packages are removed due to conflicts with MLNX_OFED_LINUX. Do not reinstall them. Do you want to continue?[y/N]:yChecking SW Requirements...One or more required packages for installing MLNX_OFED_LINUX are missing.Attempting to install the following missing packages:libgfortran3 flex swig chrpath tk debhelper automake quilt gfortran libnl-route-3-200 m4 libltdl-dev dpatch bison graphviz autoconf autotools-dev tclRemoving old packages...Installing new packagesInstalling ofed-scripts-4.7...Installing mlnx-ofed-kernel-utils-4.7...Installing mlnx-ofed-kernel-dkms-4.7...Installing rshim-dkms-1.8...Installing iser-dkms-4.7...Installing srp-dkms-4.7...Installing libibverbs1-41mlnx1...Installing ibverbs-utils-41mlnx1...Installing libibverbs-dev-41mlnx1...Installing libibverbs1-dbg-41mlnx1...Installing libmlx4-1-41mlnx1...Installing libmlx4-dev-41mlnx1...Installing libmlx4-1-dbg-41mlnx1...Installing libmlx5-1-41mlnx1...Installing libmlx5-dev-41mlnx1...Installing libmlx5-1-dbg-41mlnx1...Installing librxe-1-41mlnx1...Installing librxe-dev-41mlnx1...Installing librxe-1-dbg-41mlnx1...Installing libibumad-43.1.1.MLNX20190905.1080879...Installing libibumad-static-43.1.1.MLNX20190905.1080879...Installing libibumad-devel-43.1.1.MLNX20190905.1080879...Installing ibacm-41mlnx1...Installing ibacm-dev-41mlnx1...Installing librdmacm1-41mlnx1...Installing librdmacm-utils-41mlnx1...Installing librdmacm-dev-41mlnx1...Installing mstflint-4.13.0...Installing ibdump-5.0.0...Installing libibmad-5.4.0.MLNX20190423.1d917ae...Installing libibmad-static-5.4.0.MLNX20190423.1d917ae...Installing libibmad-devel-5.4.0.MLNX20190423.1d917ae...Installing libopensm-5.5.0.MLNX20190923.1c78385...Installing opensm-5.5.0.MLNX20190923.1c78385...Installing opensm-doc-5.5.0.MLNX20190923.1c78385...Installing libopensm-devel-5.5.0.MLNX20190923.1c78385...Installing infiniband-diags-5.4.0.MLNX20190908.5f40e4f...Installing infiniband-diags-compat-5.4.0.MLNX20190908.5f40e4f...Installing mft-4.13.0...Installing kernel-mft-dkms-4.13.0...Installing libibcm1-41mlnx1...Installing libibcm-dev-41mlnx1...Installing perftest-4.4...Installing ibutils2-2.1.1...Installing libibdm1-1.5.7.1...Installing cc-mgr-1.0...Installing ar-mgr-1.0...Installing dump-pr-1.0...Installing ibsim-0.7mlnx1...Installing ibsim-doc-0.7mlnx1...Installing knem-dkms-1.1.3.90mlnx1...Installing knem-1.1.3.90mlnx1...Installing mxm-3.7.3112...Installing ucx-1.7.0...Installing sharp-2.0.0.MLNX20190922.a9ebf22...Installing hcoll-4.4.2938...Installing openmpi-4.0.2rc3...Installing mpitests-3.2.20...Installing libdapl2-2.1.10mlnx...Installing dapl2-utils-2.1.10mlnx...Installing libdapl-dev-2.1.10mlnx...Installing srptools-41mlnx1...Installing mlnx-ethtool-5.1...Installing mlnx-iproute2-5.2.0...Selecting previously unselected package mlnx-fw-updater.(Reading database ... 148359 files and directories currently installed.)Preparing to unpack .../mlnx-fw-updater_4.7-1.0.0.1_amd64.deb ...Unpacking mlnx-fw-updater (4.7-1.0.0.1) ...Setting up mlnx-fw-updater (4.7-1.0.0.1) ...Added 'RUN_FW_UPDATER_ONBOOT=no to /etc/infiniband/openib.confAttempting to perform Firmware update...The firmware for this device is not distributed inside Mellanox driver: 86:00.0 (PSID: HPE0000000009) To obtain firmware for this device, please contact your HW vendor.Failed to update Firmware.See /tmp/MLNX_OFED_LINUX.3524.logs/fw_update.logDevice (86:00.0):86:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]Link Width: x16PCI Link Speed: 8GT/sDevice (86:00.1):86:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]Link Width: x16PCI Link Speed: 8GT/sInstallation passed successfullyTo load the new driver, run:/etc/init.d/openibd restart4.Load the new driver by running the following command:user@ubuntugpu2:/tmp/MLNX_OFED_LINUX-4.7-1.0.0.1-ubuntu18.04-x86_64$ sudo /etc/init.d/openibd restartSample output:Unloading HCA driver: [ OK ]Loading HCA driver and Access Layer: [ OK ]Post-installation actionsAfter installation is complete, follow these steps:1.Update IP settings if necessary by updating the /etc/netplan/*.yaml file.a.You can find a way to identify the logical name of the Mellanox Ethernet interface used to update the *.yaml file by running thecommand:user@ubuntu-gpu1:~$ sudo lshw -class networkThis command will list all Ethernet interfaces. The Mellanox Ethernet interface will have listed product: MT27800 Family [ConnectX-5] and vendor: Mellanox Technologies.Sample output:*-network:0description: Ethernet interfaceproduct: MT27800 Family [ConnectX-5]vendor: Mellanox Technologiesphysical id: 0bus info: pci@0000:86:00.0logical name: ens4f0version: 00serial: b8:83:03:58:d3:38width: 64 bitsclock: 33MHzcapabilities: pciexpress vpd msix pm bus_master cap_list ethernet physical autonegotiation configuration: autonegotiation=on broadcast=yes driver=mlx5_core driverversion=4.7-1.0.0 duplex=full firmware=16.24.1000 (HPE0000000009) ip=10.20.100.125 latency=0 link=yesmulticast=yesb.Identify the logical name and use this logical name to edit the network interfaces on the netplan *.yaml file.Sample execution:user@ubuntu-gpu1:/tmp$ cd /etc/netplan/user@ubuntu-gpu1:/etc/netplan$ sudo vi /etc/netplan/01-netcfg.yaml# This file describes the network interfaces available on your system# For more information, see netplan(5).network:version: 2renderer: networkdethernets:eno1:dhcp6: nodhcp4: noaddresses: [X.X.X.X/XX]gateway4: X.X.X.Xnameservers:addresses: [X.X,X.X]ens4f0:dhcp6: nodhcp4: noaddresses: [X.X.X.X/XX]gateway4: X.X.X.Xnameservers:addresses: [X.X,X.X]a.)Reapply netplan if necessaryuser@ubuntu-gpu1:/etc/netplan$ sudo netplan apply2.Confirm activation by issuing the following command:user@ubuntu-gpu1:~$ ibv_devinfoSample output:hca_id: mlx5_1transport: InfiniBand (0)fw_ver: 16.24.1000node_guid: b883:03ff:ff58:d339sys_image_guid: b883:03ff:ff58:d338vendor_id: 0x02c9vendor_part_id: 4119hw_ver: 0x0board_id: HPE0000000009phys_port_cnt: 1Device ports:port: 1state: PORT_DOWN (1)max_mtu: 4096 (5)active_mtu: 1024 (3)sm_lid: 0port_lid: 0port_lmc: 0x00link_layer: Ethernethca_id: mlx5_0transport: InfiniBand (0)fw_ver: 16.24.1000node_guid: b883:03ff:ff58:d338sys_image_guid: b883:03ff:ff58:d338vendor_id: 0x02c9vendor_part_id: 4119hw_ver: 0x0board_id: HPE0000000009phys_port_cnt: 1Device ports:port: 1state: PORT_ACTIVE (4)max_mtu: 4096 (5)active_mtu: 1024 (3)sm_lid: 0port_lid: 0port_lmc: 0x00link_layer: EthernetCheck the firmware version and update if needed. The latest firmware version when this document was published is 16.25.1020.Identify the PCI address by using the following command:user@ubuntu-gpu1:~$ lspci -v | grep MellanoxSample output:86:00.0 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]86:00.1 Ethernet controller: Mellanox Technologies MT27800 Family [ConnectX-5]3.Check the firmware version using the PCI address of the device by issuing the command:~]# mstflint -d < device PCI address> qSample execution:user@ubuntu-gpu1:~$ sudo mstflint -d 86:00.0 q[sudo] password for user:Image type: FS4FW Version: 16.24.1000FW Release Date: 26.11.2018Product Version: 16.24.1000Rom Info: type=UEFI version=14.17.11 cpu=AMD64type=PXE version=3.5.603 cpu=AMD64Description: UID GuidsNumberBase GUID: b88303ffff58d338 8Base MAC: b8830358d338 8Image VSD: N/ADevice VSD: N/APSID: HPE0000000009Security Attributes: secure-fw4.To update the firmware, download the firmware update from:https:///hpsc/swd/public/detail?swItemId=MTX_57d79dca3161495e963d90095e5.Install the firmware by issuing the command:mstflint -d <device number of first device> -i <File path/<FW filename> burnSample execution:user@ubuntu-gpu1:/tmp$ sudo tar -xzf ./fw-ConnectX5-rel-16_25_1020-872726-B21_Ax-UEFI-14.18.19-FlexBoot-3.5.701.tar.gzuser@ubuntu-gpu1:/tmp$ sudo mstflint -d 86:00.0 -i /tmp/fw-ConnectX5-rel-16_25_1020-872726-B21_Ax-UEFI-14.18.19-FlexBoot-3.5.701.signed.bin burnCurrent FW version on flash: 16.24.1000New FW version: 16.25.1020Initializing image partition - OKWriting Boot image component - OK-I- To load new FW run mstfwreset or reboot machine.6.Reboot the server and confirm the firmware update.ubuntu-gpu1:~$ sudo rebootuser@ubuntu-gpu1:~$ sudo mstflint -d 86:00.0 qSample output:[sudo] password for user:Image type: FS4FW Version: 16.25.1020FW Release Date: 30.4.2019Product Version: 16.25.1020Rom Info: type=UEFI version=14.18.19 cpu=AMD64type=PXE version=3.5.701 cpu=AMD64Description: UID GuidsNumberBase GUID: b88303ffff58d338 8Base MAC: b8830358d338 8Image VSD: N/ADevice VSD: N/APSID: HPE0000000009Security Attributes: secure-fwInstallation guideMake the right purchase decision.Contact our presales specialists.Share nowGet updates© Copyright 2020 Hewlett Packard Enterprise Development LP. The information contained herein is subject to change withoutnotice. The only warranties for Hewlett Packard Enterprise products and services are set forth in the express warrantystatements accompanying such products and services. Nothing herein should be construed as constituting an additionalwarranty. Hewlett Packard Enterprise shall not be liable for technical or editorial errors or omissions contained herein.Linux is the registered trademark of Linus Torvalds in the U.S. and other countries. Mellanox and ConnectX are registeredtrademarks of Mellanox Technologies. All third-party marks are property of their respective owners.a00094362ENW, January 2020Check if the document is availablein the language of your choice.ADDITIONAL LINKSHPE and Mellanoxhttps:///oem/hpe/Mellanox OFED documentationhttps:///display/MLNXOFEDv471001HPE firmware downloadhttps:///hpsc/swd/public/detail?swItemId=MTX_57d79dca3161495e963d90095eLEARN MORE AThttps:///v2/GetPDF.aspx/c04154440.pdf。
2008r2系统初始化流程
2008r2系统初始化流程下载温馨提示:该文档是我店铺精心编制而成，希望大家下载以后，能够帮助大家解决实际的问题。
文档下载后可定制随意修改，请根据实际需要进行相应的调整和使用，谢谢!并且，本店铺为大家提供各种各样类型的实用资料，如教育随笔、日记赏析、句子摘抄、古诗大全、经典美文、话题作文、工作总结、词语解析、文案摘录、其他资料等等，如想了解不同资料格式和写法，敬请关注!Download tips: This document is carefully compiled by theeditor. I hope that after you download them,they can help yousolve practical problems. The document can be customized andmodified after downloading,please adjust and use it according toactual needs, thank you!In addition, our shop provides you with various types ofpractical materials,such as educational essays, diaryappreciation,sentence excerpts,ancient poems,classic articles,topic composition,work summary,word parsing,copy excerpts,other materials and so on,want to know different data formats andwriting methods,please pay attention!1. 启动服务器：按下服务器电源按钮，等待服务器启动并进入 BIOS 设置界面。
fscan爆破用法 -回复
fscan爆破用法-回复Fscan爆破用法引言：在当今全球网络化的时代，网络安全问题变得愈发突出。
鉴于此，网络安全专家和黑客日夜攘攘，不断试图找到网络系统中的弱点以进行入侵。
爆破是一种常见的黑客技术之一，其目的是通过尝试大量可能的密码和账户组合来获取对目标系统的非法访问权限。
Fscan作为一款高效的网络安全工具，被广泛用于爆破攻击。
本文将一步一步向您介绍Fscan的使用方法和一些常见的防范技术。
第一步：准备工作1. 安装Fscan首先，您需要在您的计算机上安装Fscan软件。
Fscan是一款开源的漏洞评估工具，可帮助用户发现和利用各类网络安全漏洞。
您可以从Fscan的官方网站或开源代码托管平台上获取最新的稳定版本，并按照官方指引进行安装。
2. 了解Fscan的功能和特性在开始使用之前，您应该对Fscan的功能和特性有一定的了解。
Fscan提供了多种功能，包括但不限于端口扫描、Web漏洞查找、爆破攻击等。
通过对Fscan的功能有所了解，您可以更好地利用其功能进行网络安全评估和测试。
第二步：端口扫描1. 设置目标IP地址首先，您需要设置要进行端口扫描的目标IP地址。
在Fscan的命令行界面中，可以使用"-target"参数加上目标IP地址来指定扫描的目标。
例如：fscan -target 192.168.0.12. 执行端口扫描接下来，您可以执行端口扫描命令。
Fscan会自动探测目标系统中开放的端口，以便您进一步分析系统的漏洞和安全性。
例如：fscan -target 192.168.0.1 -mode port3. 分析扫描结果一旦端口扫描完成，Fscan将提供一个包含了所有开放端口信息的报告。
您可以通过阅读报告来了解目标系统的网络情况，并采取相应的安全措施来修复潜在的漏洞。
第三步：Web漏洞查找1. 设置目标URL除了端口扫描外，您还可以使用Fscan来查找目标系统中的Web漏洞。
FireBird CoaXPress 触发器输入使用指南说明书
SummaryThis is a step-by-step guide to trigger area scan CoaXPress (CXP) compatible cameras from ActiveCapture using an external signal input via the FireBird 50-wayI/O connector or the FireBird 15-way D-Type end bracket I/O connector on supported boards.Compatibility:All FireBird CoaXPress boardsSoftware required:ActiveCapture v1.5.7 onwardsWindows installer required:All CoaXPress installers from v1.5.1 onwardsGenICam support for CXP camerasAll CXP cameras support GenICam, therefore ActiveCapture can be used to control the camera and it is displayed in ActiveCapture’s ‘Device List’, as shown below:ActiveCapture connected to a Mikrotron MC2587 CXP cameraGet a live imageConnect to the camera in ActiveCapture as described in the FireBird QuickStart guide included with the Windows installer and available on our website . Once connected, live images should be obtained to check that the camera image is undistorted and correctly proportioned.Also, make a note of the frame rate displayed at the bottom of the image window in frames per second (FPS), which is the acquired frame rate from the camera, whilst free running using the camera’s own internal timing. If the camera does not produce live images, it is possible that it is expecting an external trigger signal to operate and should be reconfigured, such that the ‘Trigger mode’ is set to ‘off’, as shown in the figure below.The value shown below is 80.4 FPS for this 25MP camera using its internal triggering. This value will be used later when comparing to the externally triggered frame rate that we can control using the external trigger input.Camera trigger mode Off for internal triggeringThe configuration of both the FireBird frame grabber and the camera are set up by using the feature browser menus in the ActiveCapture GUI. The controls for the camera and FireBird board are shown in separate tabs in ActiveCapture, as indicated below.Feature browser ‘Camera’ tab when connected to a Mikrotron MC2587 CXP cameraFeature browser ‘Frame Grabber’ tab when connected to a FireBird CXP boardConfiguring the camera for external trigger inputReferring to the documentation supplied by the manufacturer of your camera, including the built-in help of the ActiveCapture feature browser (see the screenshot on the next page), find the available options for external trigger input via the CoaXPress interface. Options available could be to trigger on a rising edge signal, a falling edge or on both edge types at the same time, i.e. any edge will initiate a trigger event in the camera.Feature browser built-in help for the ‘Trigger Source’ menu item.Make a note of these settings, as they will be used next to configure the FireBird board’s output to match the camera trigger input and enable triggering via the FireBird board using the CoaXPress cable uplink.Configuring the FireBird board in the Frame Grabber tabThe next step is to set up the FireBird board to output a trigger signal to the camera via the CoaXPress cable. The trigger signal is looped through the FireBird’s timer M1, such that either the pulse width is fixed and defined by the value of M1, e.g. 10,000ns (0.01ms) or the input pulse width is used unmodified, just looping through. This latter method is often used when the pulse width from the external trigger is used to control the exposure duration in cameras that support this mode. The external trigger’s edge timing is always used to trigger the cameras exposure start, but when setting M1 > 0, the pulse width of M1 is used instead of the pulse width from the external pulse and it is this that is sent to the camera. See the screenshot on the next page.This feature sets the camera trigger source to be the TTL CH1 input on the 50-way I/O FireBird connector. Other input signal types are available on this connector as well, please refer to the ‘FireBird Hardware Manual’ for details.The CXP trigger source feature also needs to be defined, so that a pulse is sent to the camera via the CXP uplink from FireBird. In the example shown, it is set for a positive pulse with a rising edge followed by a falling edge after the width defined by the value of M1 in nanoseconds.This feature ensures that frame grabber triggers are not used. By configuring this to “Free Run” mode, its settings will have no effect on the acquisition and only the camera’s trigger is used with the frame grabber slaved to the camera’s output timing. This feature sets the pulse width (in nanoseconds) sent to the camera, with a pulse repetition frequency dependant on the external trigger’s input frequency. In this case the pulse width is fixed to a value of 1,000,000ns (1ms) using the timer M1. This value should be equal to or greater than the minimum required to trigger the camera, but not so large as to overlap the frame period of the pulse repetition frequency used.Note: If the pulse width sent to the camera is to be varied for exposure control by controlling the incoming external pulsewidth, then a value M1=0 should be used. In this case the value of M1 is ignored and the incoming pulse is mapped to the CXPuplink pulse width sent to the camera.Camera setup via the Camera tabThe camera must be configured to be externally triggered via the CXP trigger input, which is controlled via the settings in the Camera tab of the feature browser, as shown below. The setup options will vary slightly between different camera models and camera manufacturers, but it will follow a similar layout. Refer back to the documentation supplied by the manufacturer of your camera, including that shown in the help built into the ActiveCapture feature browser.The camera will now trigger from the CXP trigger input using the frequency from the external input supplied to FireBird’s TTL CH1 and using the M1 value for its pulse width. The M1 value also sets the camera exposure duration using the camera’s ‘Trigger Width’ mode.The TriggerMode feature sets the camera’s trigger to accept or reject external input. It should be noted that ifno valid external trigger signal is received, either via the CXP cable or directly into the camera head (for models that support this), the camera will not output any video at all, and no live image can be obtained.In the Trigger Source line, we define the source of the external trigger input to the camera to be the CXP uplink from our FireBird frame grabber using the CXP cable. The trigger can occur on either a rising or falling edge on the CXP uplink or both (either edge). In our example it is set to use a rising edge. Note: if both edges are selected, then any edge will be used, and this will lead to a doubling of the trigger rate obtained. The Exposure Mode setting “Trigger Width” is used to configure the camera into an exposure control mode where the exposure time is controlled via the width of the trigger pulse, in this case via CXP.Selecting ‘Live Acquisition’ from ActiveCapture’s ribbon will now show the camera operating at the frequency set by the external trigger source, and in this example that value is 4.5Hz, as shown below.ActiveCapture running with the camera acquiring images at 4.5Hz (FPS) triggered via FireBird’s external input TTL signal.Notes1.This example uses a 4.5Hz signal connected to FireBird, which is the target frame rate we wanted to achieve. The camera in internally triggered modeproduces live images at ~80Hz and so the 4.5Hz external trigger frequency is well within that maximum limit.2.The trigger pulse width should be above the minimum required for reliable triggering, as specified by the camera manufacturer for that model, when usingexternal input. In this example, the pulse is fixed at 1ms (using M1) and the minimum trigger width for this camera is around 0.001ms, so reliable trigger should easily be achieved. The camera’s exposure time is set to this same value using its Trigger Width exposure mode.3.If, however, the pulse width sent to the camera is made too large it will also cause unreliable triggering, as the pulse width approaches the limit defined by theperiod of the trigger frequency. In our example the 4.5Hz external trigger frequency gives a maximum possible frame period of 1/4.5 i.e. 222ms, therefore it can be seen that the pulse width to be sent to the camera must be less than this value or a trigger overlap condition can occur. In the event of overlap, some triggers will likely be lost and a lower frame rate than expected can occur.4.The trigger signal in this example is TTL for ease of setup. However, in a deployed system we recommend that RS-422 is used for connections to externalequipment outside the PC’s case, due to its noise immunity in industrial environments. For more information on the supported external input signal types and pin connections on our 50-way I/O connector, please refer to the ‘FireBird Hardware Manual’, page 35 onwards.For more information on trigger scenarios, please refer to the ‘FireBird System Manual’ included with the installed documentation.Trigger configuration path indicated in yellow:Headquarters:Active Silicon LtdPinewood Mews, Bond Close, Iver, Bucks, SL0 0NA, UK.Tel: +44 (0)1753 650600 Fax: +44 (0)1753 651661 Email ********************** Website: North America:Active Silicon, Inc.479 Jumpers Hole Road, Suite 301, Severna Park, MD 21146, USA. Tel: +1 410-696-7642 Fax: +1 410-696-7643 Email: ********************** Website: 。
U盘启动盘系统Fbinst菜单、Grldr菜单命令详解
U盘启动盘系统Fbinst菜单、Grldr菜单命令详解Fbinst菜单命令详解：default 0//设置默认启动的菜单入口项为NUM 0timeout 2//设置在自动启动缺省菜单前所等待的秒数为：2秒color white//设置文本字体颜色为白色text " Booting From FenDou USB Disk... "//文本内容color white//设置文本内容颜色为白色text "================================" //文本内容color yellow//设置文本字体颜色为黄色text "| Starting For No Acceleration |"//文本内容text "| |"//文本内容color yellow//设置文本字体颜色为黄色menu F1 buldr "GRLDR"//菜单0快捷键为F1启动GRLDR文件text "| Press F2 For Acceleration... |"//文本内容menu F2 buldr "FD"菜单1快捷键为F2启动FD文件color white//设置文本字体颜色为白色text "================================"//文本内容Grldr菜单命令详解：checkrange 0x21 read 0x8280 && pxe detect NotExist//如果是checkrange命令返回值是1，判断是否为PXE启动，如果是PXE启动，指定一个不存在的配置文件“NoExist”command --set-path=(bd)/BOOT/GRUB///设置外部命令所在位置//set设置变量，比如：--set-path=变量timeout 10//timeout设置在自动启动缺省菜单前所等待的秒数default 11//设置默认启动的菜单入口项为11gfxmenu (ud)/BOOT/GRUB/MESSAGE//使用MESSAGE中的图形菜单configfile (md)4+8//将指定文件作为配置文件予以加载,执行此命令后会重新加载一次内置菜单，可作为进入二级或三级或任意菜单后返回主菜单之用。
juniper配置导出和导入
6.1、防火墙配置文件的导出和导入J unipe r防火墙的配置文件的导入导出功能为用户提供了一个快速恢复当前配置的有效的手段。
一旦用户不小心因为操作失误或设备损坏更换，都可以利用该功能，实现快速的防火墙配置的恢复，在最短的时间内恢复设备和网络正常工作。
6.1.1、配置文件的导出配置文件的导出（W ebUI）：在Con figur ation > up date> Con fig F ile位置，点选：S ave t o fil e，将当前的防火墙设备的配置文件导出为一个无后缀名的可编辑文本文件。
配置文件的导出（CLI）：ns208->saveconfi g fro m fla sh to tftp 1.1.7.250 15Ju n03.c fg 6.1.2、配置文件的导入配置文件的导入（Web UI）：在Confi gurat ion > upda te >Confi g Fil e位置，1、点选：M ergeto Cu rrent Conf igura tion，覆盖当前配置并保留不同之处；2、点选：R eplac e Cur rentConfi gurat ion 替换当前配置文件。
导入完成之后，防火墙设备会自动重新启动，读取新的配置文件并运行。
配置文件的导入（CLI）：ns208-> sa ve co nfigfromtftp1.1.7.25015Jun e03.c fg toflas h或者ns208->sa ve co nfigfromtftp1.1.7.25015Jun e03.c fg me rge 6.2、防火墙软件（S creen OS）更新关于Scree nOS：Jun iper防火墙的OS软件是可以升级的，一般每一到两个月会有一个新的OS版本发布，OS版本如：5.0.0R11.0，其中R前面的5.0.0是大版本号，这个版本号的变化代表着功能的变化；R后面的11.0是小版本号，这个号码的变化代表着BUG的完善，因此一般建议，在大版本号确定的情况下，选择小版本号大的O S作为当前设备的OS。
PhoenixTool图文教程
PhoenixTool图文教程现在有很多新来的同学总是不知道修改工具怎么使用，其实很简单，在这里做了一个简单的图文教程，希望各位能看得懂！第一次做教程,望老大们手下留情,有什么说错的地方,望各位老大指点!此教程很多地方仅适合华硕的主板,对于其他的品牌的主板,还请查阅更详细的教程!本教程同样对AMITool162 及AwardTool152 也适用，只是稍微有点不同而已，可供参考，详细教程还请查阅站内其他老大们编写的！特别提醒：刷新BIOS前请一定要备份主板的初始BIOS，以防不测！修改BIOS有风险，请慎重，如出现任何事故，本教程及本站均不负任何责任！1:打开我们下载的BIOS文件。
2：软件处理BIOS过程，感觉 1.91比1.90时间长多了，请耐心等待！3：软件提示：如果修改的刷新失败，可以下载官方的BIOS文件，改成对应的文件名，存入U盘（不需要启动U盘），启动电脑按Ctrl+Home强制刷新。
4：证明我们从官方下载的BIOS文件含有SLIC2.0模块，当然这个是没用的！5：选择制造商，很多朋友以为是我们需要改成的OEM品牌，其实不是，这个是主板的制造商，这里不要搞错了！6：我们购买的是华硕的主板，自然，这里应该选择华硕。
7：选择我们需要修改的OEM品牌，我们选择的联想。
8：如果希望同时激活OEMXP系统，选择打开SLP文件。
9：我们选择了联想的OEMXP激活。
10：很多朋友不知道怎么弄这个rw文件，对于华硕的主板，新的191软件已经不需要自己提取rw文件，我们新建一个空白的文本文档，改成 *.rw，就可以了！11：修改好后的rw文件，记得 *.rw ,最好用小写字母，有一次我自己修改，大写的曾经出错过，改成小写的就好了，不知道是不是偶然，不过改个小写，也没什么不方便的！12：点击选择我们刚刚修改好的rw文件。
13：14：选择好的SLIC,SLP和rw文件，至于证书验证，可以略过，修改完BIOS，再用工具打开修改好的BIOS文件，检测一下你的证书跟SLIC表是不是匹配。
netgear 8-port gigabit ethernet smart managed pro
onscreen instructions. 4. Enter the email address and password for your NETGEAR account and tap LOG IN.
• Option 1: Your switch and mobile device are connected to the same network. Your switch and its IP address display in the devices list. Do the following: a. Select the switch or tap Unclaimed. b. On the next screen, tap ADD DEVICE, and continue with Step 5. If the switch does not display in the devices list, tap + in the upper-right corner, and tap Scan Network. If the switch still does not display, follow Option 2 below.
GS108Tv3 switch
PoE PSE switch IP camera Laptop
巧用McAfee VirusScan 8.0i“排毒”
巧用McAfee VirusScan 8.0i“排毒”
飘零雪
【期刊名称】《网上俱乐部：电脑安全专家》
【年(卷),期】2004(000)011
【摘要】一日，朋友的电脑被人安装了大名鼎鼎的远程控制软件pemote administratcr,这个“入侵者”充分利用了合法远程管理软件不会被查杀的特点，炒了防止朋友再次中招，我就用Mcafee virusscan8.0i的“有害程序策略”给他的电脑多加了一层“盔甲”。
【总页数】1页(P74)
【作者】飘零雪
【作者单位】无
【正文语种】中文
【中图分类】TP311.56
【相关文献】
1.巧用食物排毒 [J], 李红芳
2.巧用水果排毒 [J], 阿宝
3.玩转McAfee VirusScan Enterprise 8.0i [J], 古铜
4.McAfee VirusScan 8.0i企业版使用技巧两则 [J], 自由人
5.巧用WinRAR为硬盘排毒 [J], Vc水手
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Configurations for GR/IR
GR/IR科目与普通有open item管理功能的科目不同，配置时也有区别。
一. 建立科目主檔，本例为302010 – GR/IR Clearing
建立科目主檔的要求：
1)
2)
3)
4) GR/IR科目不能用F-03 / F-04 之类的T code进行手工结清，需用F.13进行自动结清。
二. 配置Transaction Key为WRX的会计科目--302010。
说明：PO收货、发票验证都涉及MM自动记账的配置，所以仅仅配置WRX并不能运作。
相关内容请参考我在FI版块的另一篇贴子：MM自动过账原理及配置
此步设置的作用是确定302010为系统的GR/IR科目。
三. Define Rules for Automatic Clearing
刚才说过，GR/IR科目不能用手工结清方法来结清，必须配置自动结清的规则。
否则F.13
配置如下
说明：
1) 在COA 9999中，定义供货商科目(S)可以进行自动结清，条件是ZUONR(Assignment)必须相同。
2) 在COA 9999中，定义总账科目(S) 302010可以进行自动结清，没有其它条件。
条件最多可设五个。
END OF DOC.。