TPS715_DataSheet

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74HC165_DataSheet

1Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.2LTC1569-6A U G WA W U W A R BSOLUTEXI TI SW U UPACKAGE/ORDER I FOR ATIO(Note 1)Total Supply Voltage................................................11V Power Dissipation..............................................500mW Operating Temperature................................0°C to 70°C Storage Temperature............................–65°C to 150°C Lead Temperature (Soldering, 10 sec)..................300°CThe q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 25°C.V S = 3V (V + = 3V, V – = 0V), f CUTOFF = 64kHz, R LOAD = 10k unless otherwise specified.ELECTRICAL C C HARA TERISTICSConsult factory for Industrial and Military grade parts.PARAMETER CONDITIONSMIN TYP MAX UNITS Filter GainV S = 5V, f CLK = 4.096MHz,f IN = 1280Hz = 0.02 • f CUTOFF q –0.050.050.15dB f CUTOFF = 64kHz, V IN = 1.4V P-P ,f IN = 12.8kHz = 0.2 • f CUTOFF q –0.25–0.15–0.05dB R EXT = 10k, Pin 5 Shorted to Pin 4f IN = 32kHz = 0.5 • f CUTOFF q –0.65–0.55–0.4dB f IN = 51.2kHz = 0.8 • f CUTOFF q –1.3–1.0–0.7dB f IN = 64kHz = f CUTOFFq –5.3–3.8–2.4dB f IN = 97.5kHz = 1.5 • f CUTOFF q –60–48dB f IN = 128kHz = 2 • f CUTOFF q –62–50dB f IN = 192kHz = 3 • f CUTOFF q –71–60dB V S = 2.7V, f CLK = 1MHz,f IN = 312Hz = 0.02 • f CUTOFF q –0.120.050.16dB f CUTOFF = 15.625kHz, V IN = 1V P-P ,f IN = 3125kHz = 0.2 • f CUTOFF q –0.25–0.15–0.05dB Pin 6 Shorted to Pin 4, External Clockf IN = 7812kHz = 0.5 • f CUTOFF q –0.65–0.55–0.4dB f IN = 12.5kHz = 0.8 • f CUTOFF q –1.1–0.9–0.7dB f IN = 15.625kHz = f CUTOFF q –3.6–3.4–3.2dB f IN = 23.44kHz = 1.5 • f CUTOFF q –54–50dB f IN = 31.25kHz = 2 • f CUTOFF q –60–55dB f IN = 46.88kHz = 3 • f CUTOFF q –66–60dB Filter PhaseV S = 2.7V, f CLK = 4MHz,f IN = 1250Hz = 0.02 • f CUTOFF –11Deg f CUTOFF = 62.5kHz, Pin 6 Shorted to f IN = 12.5kHz = 0.2 • f CUTOFF q –114–111–108Deg Pin 4, External Clockf IN = 31.25kHz = 0.5 • f CUTOFF q 798285Deg f IN = 50kHz = 0.8 • f CUTOFF q –83–79–75Deg f IN = 62.5kHz = f CUTOFFq156162168Deg f IN = 93.75kHz = 1.5 • f CUTOFF–91DegFilter Cutoff Accuracy R EXT = 10.24k from Pin 6 to Pin 7,62.5kHz ±1%when Self-Clocked V S = 3V, Pin 5 Shorted to Pin 4Filter Output DC Swing V S = 3V, Pin 3 = 1.11V2.1V P-P (Note 6)q1.9V P-P V S = 5V, Pin 3 = 2V3.6V P-P q3.2V P-P V S = ±5V, Pin 5 Shorted to Pin 7, R LOAD = 20k8.5V P-P3LTC1569-6The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 25°C.V S = 3V (V + = 3V, V – = 0V), f CLK = 4.096MHz, f CUTOFF = 64kHz, R LOAD = 10k unless otherwise specified.ELECTRICAL C C HARA TERISTICSPARAMETER CONDITIONSMIN TYP MAX UNITS Output DC Offset R EXT = 10k, Pin 5 Shorted to Pin 7V S = 3V ±2±5mV (Note 2)V S = 5V ±6±12mV V S = ±5V ±15mV Output DC Offset DriftR EXT = 10k, Pin 5 Shorted to Pin 7V S = 3V 25µV/°C V S = 5V 25µV/°C V S = ±5V 75µV/°CClock Pin Logic Thresholds V S = 3V Min Logical “1” 2.7V when Clocked ExternallyMax Logical “0”0.5V V S = 5V Min Logical “1” 4.0V Max Logical “0”0.5V V S = ±5VMin Logical “1” 4.0V Max Logical “0”0.5VPower Supply Current f CLK = 256kHz (40k from Pin 6 to Pin 7,V S = 3V34mA (Note 3)Pin 5 Open, ÷ 4), f CUTOFF = 4kHzq5mA V S = 5V3.55mA q6mA V S = 10V4.57mA q8mA f CLK = 4.096MHz (10k from Pin 6 to Pin 7,V S = 3V 8mA Pin 5 Shorted to Pin 4, ÷ 1), f CUTOFF = 64kHzq11mA V S = 5V9mA q13mA V S = 10V12mA q17mA Clock Feedthrough Pin 5 Open0.1mV RMS Wideband Noise Noise BW = DC to 2 • f CUTOFF 95µV RMSTHDf IN = 3kHz, 1.5V P-P , f CUTOFF = 32kHz80dBClock-to-Cutoff 64Frequency Ratio Max Clock Frequency V S = 3V 5MHz (Note 4)V S = 5V 5MHz V S = ±5V7MHz Min Clock Frequency V S = 3V, 5V, T A < 85°C 1.5kHz (Note 5)V S = ±5V3kHz Input Frequency RangeAliased Components <–65dB 0.9 • f CLKHzNote 1: Absolute maximum ratings are those values beyond which the life of a device may be impaired.Note 2: DC offset is measured with respect to Pin 3.Note 3: If the internal oscillator is used as the clock source and the divide-by-4 or divide-by-16 mode is enabled, the supply current is reduced as much as 40% relative to the divide-by-1 mode.Note 4: The maximum clock frequency is arbitrarily defined as thefrequency at which the filter AC response exhibits >1dB of gain peaking.Note 5: The minimum clock frequency is arbitrarily defined as the frequecy at which the filter DC offset changes by more than 5mV.Note 6: For more details refer to the Input and Output Voltage Range paragraph in the Applications Information section.4LTC1569-6TYPICAL PERFOR A CE CHARACTERISTICSU WTHD vs Input VoltageTHD vs Input FrequencyINPUT VOLTAGE (V P-P )0.51.0 1.52.0 2.53.0 3.54.0T H D (d B )1569-6 G02–50–55–60–65–70–75–80–85–90INPUT FREQUENCY (kHz)51015202530TH D (d B )1569-6 G01–60–65–70–75–80–85–90PI FU CTIO SU U UIN +/IN – (Pins 1, 2): Signals can be applied to either or both input pins. The DC gain from IN + (Pin 1) to OUT (Pin␣8) is 1.0, and the DC gain from Pin 2 to Pin 8 is –1. The input range, input resistance and output range are de-scribed in the Applications Information section. Input voltages which exceed the power supply voltages should be avoided. Transients will not cause latchup if the current into/out of the input pins is limited to 20mA.GND (Pin 3): The GND pin is the reference voltage for the filter and should be externally biased to 2V (1.11V) to maximize the dynamic range of the filter in applications using a single 5V (3V) supply. For single supply operation,the GND pin should be bypassed with a quality 1µF ceramic capacitor to V – (Pin 4). The impedance of the circuit biasing the GND pin should be less than 2k Ω as the GND pin generates a small amount of AC and DC current.For dual supply operation, connect Pin␣3 to a high quality DC ground. A ground plane should be used. A poor ground will increase DC offset, clock feedthrough, noise and distortion.V –/V + (Pins 4, 7): For 3V, 5V and ±5V applications a quality 1µF ceramic bypass capacitor is required from V +(Pin 7) to V – (Pin 4) to provide the transient energy for the internal clock drivers. The bypass should be as close aspossible to the IC. In dual supply applications (Pin 3 is grounded), an additional 0.1µF bypass from V + (Pin 7) to GND (Pin 3) and V – (Pin 4) to GND (Pin 3) is recom-mended.The maximum voltage difference between GND (Pin 3) and V + (Pin 7) should not exceed 5.5V.DIV/CLK (Pin 5): DIV/CLK serves two functions. When the internal oscillator is enabled, DIV/CLK can be used to engage an internal divider. The internal divider is set to 1:1when DIV/CLK is shorted to V – (Pin 4). The internal divider is set to 4:1 when DIV/CLK is allowed to float (a 100pF bypass to V – is recommended). The internal divider is set to 16:1 when DIV/CLK is shorted to V + (Pin 7). In the divide-by-4 and divide-by-16 modes the power supply current is reduced by as much as 40%.When the internal oscillator is disabled (R X shorted to V –) DIV/CLK becomes an input pin for applying an external clock signal. For proper filter operation, the clock waveform should be a squarewave with a duty cycle as close as possible to 50% and CMOS voltages levels (see Electrical Characteristics section for voltage levels). DIV/CLK pin voltages which exceed the power supply voltages should be avoided. Transients will not cause latchup if the fault current into/out of the DIV/CLK pin is limited to 40mA.LTC1569-656LTC1569-6Table1. f CUTOFF vs R EXT , V S = 3V, T A = 25°C, Divide-by-1 ModeR EXT Typical f CUTOFFTypical Variation of f CUTOFF3844Ω*N/A ±3.0%5010Ω*N/A ±2.5%10k 64kHz ±1%20.18k 32kHz ±2.0%40.2k16kHz±3.5%*REXT values less than 10k can be used only in the divide-by-16 mode.In the divide-by-4 and divide-by-16 modes, the cutoff frequencies in Table 1 will be lowered by 4 and 16respectively. When the LTC1569-6 is in the divide-by-4APPLICATIO S I FOR ATIO W UU U and divide-by-16 modes the power is automatically re-duced. This results in up to a 40% power savings with a single 5V supply.The power reduction in the divide-by-4 and divide-by-16modes, however, effects the fundamental oscillator fre-quency. Hence, the effective divide ratio will be slightly different from 4:1 or 16:1 depending on V S , T A and R EXT .Typically this error is less than 1% (Figures 4 and 6).The cutoff frequency is easily estimated from the equation in Figure 1. Examples 1 and 2 illustrate how to use the graphs in Figures 2 through 7 to get a more precise estimate of the cutoff frequency.Figure 4. Typical Divide Ratio in the Divide-by-4 Mode, T A = 25°CFigure 5. Filter Cutoff vs Temperature,Divide-by-4 Mode, R EXT = 10kFigure 3. Filter Cutoff vs Temperature,Divide-by-1 Mode, R EXT = 10kFigure 2. Filter Cutoff vs V SUPPLY ,Divide-by-1 Mode, T A = 25°CV SUPPLY (V)2D I V I D E R A T I O1569-6 F044.084.044.003.9646810TEMPERATURE (°C)–50N O R M A L I Z E D F I L T E R C U T O F F1569-6 F051.0101.0081.0061.0041.0021.0000.9980.9960.9940.9920.990–250255075100V SUPPLY (V)2N O R M A L I Z E D F I L T E R C U T O F F1569-6 F021.041.031.021.011.000.990.980.970.9646810TEMPERATURE (°C)–50N O R M A L I Z E D F I L T E R C U T O F F1569-6 F031.0101.0081.0061.0041.0021.0000.9980.9960.9940.9920.990–250255075100LTC1569-678LTC1569-6When driven with a complementary signal whose com-mon mode voltage is GND, the IN + input appears to have 125k to GND and the IN – input appears to have –125k to GND. To make the effective IN – impedance 125k when driven differentially, place a 62.5k resistor from IN – to GND. For other cutoff frequencies use 62.5k • (128kHz/f CUTOFF ), as shown in the Typical Applications section. The typical variation in dynamic input impedance for a given clock frequency is ±10%.Wideband NoiseThe wideband noise of the filter is the RMS value of the device’s output noise spectral density. The wideband noise data is used to determine the operating signal-to-noise at a given distortion level. The wideband noise is nearly independent of the value of the clock frequency and excludes the clock feedthrough. Most of the wideband noise is concentrated in the filter passband and cannot be removed with post filtering (Table 2). Table 3 lists the typical wideband noise for each supply.Table 2. Wideband Noise vs Supply Voltage, Single 3V SupplyBandwidth Total Integrated NoiseDC to f CUTOFF 80µV RMS DC to 2 • f CUTOFF 95µV RMS DC to f CLK110µV RMSTable 3. Wideband Noise vs Supply Voltage, f CUTOFF = 64kHzTotal Integrated Noise Power Supply DC to 2 • f CUTOFF3V 95µV RMS 5V 100µV RMS ±5V105µV RMSClock FeedthroughClock feedthrough is defined as the RMS value of the clock frequency and its harmonics that are present at the filter’s OUT pin (Pin 8). The clock feedthrough is measured with IN + and IN – (Pins 1 and 2) grounded and depends on the PC board layout and the power supply decoupling. Table␣4shows the clock feedthrough (the RMS sum of the first 11harmonics) when the LTC1569-7 is self-clocked with R EXT = 10k, DIV/CLK (Pin 5) open (divide-by-4 mode). The clock feedthrough can be reduced with a simple RC post filter.APPLICATIO S I FOR ATIO W UU U it reaches the typical limits V MAX and V MIN . The above voltage swings are for R LOAD = 10k for V S = 3V and 5V.R LOAD = 20k for V S = ±5V.To maximize the undistorted peak-to-peak signal swing of the filter, the GND (Pin 3) voltage should be set to 2V (1.11V) in single 5V (3V) supply applications.The LTC1569-6 can be driven with a single-ended or differential signal. When driven differentially, the voltage between IN + and IN – (Pin 1 and Pin 2) is filtered with a DC gain of 1. The single-ended output voltage OUT (Pin 8) is referenced to the voltage of the GND (Pin 3). The common mode voltage of IN + and IN – can be any voltage that keeps the input signals within the power supply range.For noninverting single-ended applications, connect IN –to GND or to a quiet DC reference voltage and apply the input signal to IN +. If the input is DC coupled then the DC gain from IN + to OUT will be 1. This is true given IN + and OUT are referenced to the same voltage, i.e., GND, V – or some other DC reference. To achieve the distortion levels shown in the Typical Performance Characteristics the input signal at IN + should be centered around the DC voltage at IN –. The input can also be AC coupled, as shown in the Typical Applications section.For inverting single-ended filtering, connect IN + to GND or to quiet DC reference voltage. Apply the signal to IN –. The DC gain from IN – to OUT is –1, assuming IN – is referenced to IN + and OUT is reference to GND.Refer to the Typical Performance Characteristics section to estimate the THD for a given input level.Dynamic Input ImpedanceThe unique input sampling structure of the LTC1569-6 has a dynamic input impedance which depends on the con-figuration, i.e., differential or single-ended, and the clock frequency. The equivalent circuit in Figure 8 illustrates the input impedance when the cutoff frequency is 64kHz. For other cutoff frequencies replace the 125k value with 125k • (64kHz/f CUTOFF ).When driven with a single-ended signal into IN – with IN +tied to GND, the input impedance is very high (~10M Ω).When driven with a single-ended signal into IN + with IN –tied to GND, the input impedance is a 125k resistor to GND.LTC1569-6910LTC1569-6Single 3V Operation, AC Coupled Input,64kHz Cutoff Frequencyf CUTOFF =n = 1, 4, 16 FOR PIN 5 ATGROUND, OPEN, V +64kHz n = 1()10k R EXT()n = 1, 4, 16 FOR PIN 5 ATGROUND, OPEN, V+n = 4R EXTSingle 3V Supply Operation, DC Coupled,16kHz Cutoff FrequencySingle 5V Operation, 50kHz Cutoff Frequency,DC Coupled Differential Inputs with Balanced Input Impedancef CUTOFF ~n = 1, 4, 16 FOR PIN 5 ATGROUND, OPEN, V +64kHz n = 1()10k 12.8k()µF±5V Supply Operation, DC Coupled Filter with External Clock SourceTYPICAL APPLICATIO SUFREQUENCY (Hz)G A I N (d B )GROUP DELAY 1569-6 TA02a0–10–20–30–40–50–60–70–80–90µs µsµs Single 3V, AC Coupled Input,64kHz Cutoff FrequencyLTC1569-61112LTC1569-6© Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 q FAX : (408) 434-0507 q PART NUMBER DESCRIPTIONCOMMENTSLTC1064-3Linear Phase, Bessel 8th Order Filter f CLK /f CUTOFF = 75/1 or 150/1, Very Low Noise LTC1064-7Linear Phase, 8th Order Lowpass Filter f CLK /f CUTOFF = 50/1 or 100/1, f CUTOFF(MAX) = 100kHzLTC1068-x Universal, 8th Order Filterf CLK /f CUTOFF = 25/1, 50/1, 100/1 or 200/1, f CUTOFF(MAX) = 200kHz LTC1069-7Linear Phase, 8th Order Lowpass Filter f CLK /f CUTOFF = 25/1, f CUTOFF(MAX) = 200kHz, SO-8LTC1164-7Low Power, Linear Phase Lowpass Filter f CLK /f CUTOFF = 50/1 or 100/1, I S = 2.5mA, V S = 5V LTC1264-7Linear Phase, 8th Order Lowpass Filter f CLK /f CUTOFF = 25/1 or 50/1, f CUTOFF(MAX) = 200kHz LTC1562/LTC1562-2Universal, 8th Order Active RC Filterf CUTOFF(MAX) = 150kHz (LTC1562)f CUTOFF(MAX) = 300kHz (LTC1562-2)RELATED PARTSFf CUTOFF =n = 1, 4, 16 FOR PIN 5 ATGROUND, OPEN, V +n = 4()R EXT()Single 5V Supply Operation, DC Coupled Input,16kHz Cutoff Frequency0.5V /D I VINPUT 32ksps (OR 64kbps)1569-6 TA07TYPICAL APPLICATIO SU。

ICS557-01 Datasheet说明书

PCI-EXPRESS CLOCK SOURCEDescriptionThe ICS557-01 is a clock chip designed for use inPCI-Express Cards as a clock source. It provides a pair of differential outputs at 100 MHz in a small 8-pin SOIC package.Using IDT’s patented Phase-Locked Loop (PLL) techniques, the device takes a 25 MHz crystal input and produces HCSL (Host Clock Signal Level) differential outputs at 100 MHz clock frequency. LVDS signal levels can also be supported via an alternative termination scheme.Features•Supports PCI-Express TM HCSL Outputs0.7 V current mode differential pair •Supports LVDS Output Levels•Packaged in 8-pin SOIC•RoHS 5 (green ) or RoHS 6 (green and lead free) compliant packaging•Operating voltage of 3.3 V•Low power consumption•Input frequency of 25 MHz•Short term jitter 100 ps (peak-to-peak)•Output Enable via pin selection•Industrial temperature range availableBlock DiagramPin Assignment Pin DescriptionsPin NumberPinNamePinTypePin Description1OE Input Output Enable signal(H = outputs are enabled, L = outputs are disabled/tristated).Internal pull-up resistor.2X1Input Crystal or clock input. Connect to a 25 MHz crystal or single ended clock. 3X2XO Crystal Connection. Connect to a parallel mode crystal.Leave floating if clock input.4GND Power Connect to ground.5IREF Output A 475Ω precision resistor connected between this pin and groundestablishes the external reference current.6CLK Output HCSL differential complementary clock output.7CLK Output HCSL differential clock output.8VDD Power Connect to +3.3 V.Applications Information External ComponentsA minimum number of external components are required for proper operation.Decoupling CapacitorsDecoupling capacitors of 0.01 μF should be connected between VDD and the ground plane (pin 4) as close to the VDD pin as possible. Do not share ground vias between components. Route power from power source through the capacitor pad and then into IDT pin.CrystalA 25 MHz fundamental mode parallel resonant crystal with C L = 16 pF should be used. This crystal must have less than 300 ppm of error across temperature in order for theICS557-01 to meet PCI Express specifications.Crystal CapacitorsCrystal capacitors are connected from pins X1 to ground and X2 to ground to optimize the accuracy of the output frequency.C L= Crystal’s load capacitance in pFCrystal Capacitors (pF) = (C L- 8) * 2For example, for a crystal with a 16 pF load cap, each external crystal cap would be 16 pF. (16-8)*2=16.Current Source (Iref) Reference Resistor - R RIf board target trace impedance (Z) is 50Ω, then R R = 475Ω(1%), providing IREF of 2.32 mA. The output current (I OH) is equal to 6*IREF.Output TerminationThe PCI-Express differential clock outputs of the ICS557-01 are open source drivers and require an external series resistor and a resistor to ground. These resistor values and their allowable locations are shown in detail in thePCI-Express Layout Guidelines section.The ICS557-01can also be configured for LVDS compatible voltage levels. See the LVDS Compatible Layout Guidelines sectionGeneral PCB Layout RecommendationsFor optimum device performance and lowest output phase noise, the following guidelines should be observed.1. Each 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible.2. No vias should be used between decoupling capacitor and VDD pin.3. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. Distance of the ferrite bead and bulk decoupling from the device is less critical.4. An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers (any ferrite beads and bulk decoupling capacitors can be mounted on the back). Other signal traces should be routed away from the ICS557-01.This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device.PCI-Express Layout GuidelinesFigure 1: PCI-Express Device RoutingTypical PCI-Express (HCSL) WaveformLVDS Compatible Layout GuidelinesFigure: LVDS Device RoutingTypical LVDS WaveformAbsolute Maximum RatingsStresses above the ratings listed below can cause permanent damage to the ICS557-01. These ratings are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.DC Electrical CharacteristicsUnless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature -40 to +85°C1 Single edge is monotonic when transitioning through region.2 Inputs with pull-ups/-downs are not included.ItemRatingSupply Voltage, VDD, VDDA 5.5 VAll Inputs and Outputs-0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial)0 to +70°C Ambient Operating Temperature (industrial)-40 to +85°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°CESD Protection (Input)2000 V min. (HBM)ParameterSymbolConditions Min.Typ.Max.UnitsSupply Voltage V 3.135 3.465Input High Voltage 1V IH 2.0VDD +0.3V Input Low Voltage 1V IL VSS-0.30.8V Input Leakage Current 2I IL 0 < Vin < VDD-55μA Operating Supply Current I DD With 50Ω and 2 pF load 55mA I DDOE OE =Low35mA Input Capacitance C IN Input pin capacitance 7pF Output Capacitance C OUT Output pin capacitance 6pF Pin Inductance L PIN 5nH Output Resistance Rout CLK outputs 3.0k ΩPull-up ResistorR PUPOE60k ΩAC Electrical Characteristics - CLK/CLKUnless stated otherwise, VDD=3.3 V ±5%, Ambient Temperature -40 to +85°C1 Test setup is R L =50 ohms with2 pF , R R = 475Ω (1%).2 Measurement taken from a single-ended waveform.3 Measurement taken from a differential waveform.4Measured at the crossing point where instantaneous voltages of both CLKOUT and CLKOUT are equal.5 CLKOUT pins are tri-stated when OE is low asserted. CLKOUT is driven differential when OE is high.Thermal Characteristics (8-pin SOIC)ParameterSymbolConditions Min.Typ.Max.UnitsInput Frequency 25MHz Output Frequency 100MHzOutput High Voltage 1,2V OH 660700850mV Output Low Voltage 1,2V OL-150027mV Crossing Point Voltage 1,2Absolute250350550mV Crossing Point Voltage 1,2,4Variation over all edges140mV Jitter, Cycle-to-Cycle 1,380ps Rise Time 1,2t OR From 0.175 V to 0.525 V 175332700ps Fall Time 1,2t OFFrom 0.525 V to 0.175 V175344700ps Rise/Fall Time Variation 1,2125ps Duty Cycle 1,34555%Output Enable Time 5All outputs 30µs Output Disable Time 5All outputs30µs Stabilization Time t STABLEFrom power-up VDD=3.3 V3.0ms Spread Change Timet SPREAD Settling period after spread change3.0msParameterSymbolConditionsMin.Typ.Max.UnitsThermal Resistance Junction to AmbientθJA Still air150°C/W θJA 1 m/s air flow 140°C/W θJA 3 m/s air flow120°C/W Thermal Resistance Junction to CaseθJC40°C/WMarking Diagram (ICS557M-01LF) Marking Diagram (ICS557MI-01LF)Notes:1. ###### is the lot code.2. YYWW is the last two digits of the year, and the week number that the part was assembled.3. “L ” designates Pb (lead) free packaging.4. “I” denotes industrial temperature.5. Bottom marking: (orgin). Origin = country of origin if not USA.Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95Ordering InformationPart / Order Number Marking Shipping Packaging Package Temperature 557M-01LF See Page 8Tubes8-pin SOIC0 to +70° C557M-01LFT Tape and Reel8-pin SOIC0 to +70° C557MI-01LF Tubes8-pin SOIC-40 to +85° C557MI-01LFT Tape and Reel8-pin SOIC-40 to +85° C"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.Corporate HeadquartersIntegrated Device Technology, For Sales800-345-7015408-284-8200Fax: 408-284-2775For Tech Support/go/clockhelpInnovate with IDT and accelerate your future networks. Contact:www.IDT .com。

TPS71533中文资料

Size 2,3 mm)FEATURES DESCRIPTIONAPPLICATIONSDCK PACKAGE(TOP VIEW)FB/NCGNDNCOUTINTPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY2001–REVISED JUNE200450mA,24V,3.2µA Supply CurrentLow-Dropout Linear Regulator in SC70Package•24-V Maximum Input Voltage The TPS715xx low-dropout(LDO)voltage regulatorsoffer the benefits of high input voltage,low-dropout •Low3.2-µA Quiescent Current at50mAvoltage,low-power operation,and miniaturized pack-•Stable With Any Capacitor(>0.47µF)aging.The devices,which operate over an input •50-mA Low-Dropout Regulator range of2.5V to24V,are stable with any capacitor •Available in2.5V,3.0V,3.3V,5.0V,and(>0.47µF).The low dropout voltage and lowquiescent current allow operations at extremely low Adjustable(12V to15V)power levels.Therefore,the devices are ideal for •Minimum/Maximum Specified Current Limitpowering battery management ICs.Specifically,since •5-Pin SC70/SOT-323(DCK)Package the devices are enabled as soon as the appliedvoltage reaches the minimum input voltage,the •-40°C to125°C Specified Junctionoutput is quickly available to power continuously Temperature Rangeoperating battery charging ICs.The usual PNP pass transistor has been replaced by •Ultra Low Power Microcontrollers a PMOS pass element.Because the PMOS passelement behaves as a low-value resistor,the low •Cellular/Cordless Handsetsdropout voltage,typically415mV at50mA of load •Portable/Battery-Powered Equipmentcurrent,is directly proportional to the load current.The low quiescent current(3.2µA typically)is stableover the entire range of output load current(0mA to50mA).Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.元器件交易网ABSOLUTE MAXIMUM RATINGSDISSIPATION RATING TABLETPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY 2001–REVISED JUNE 2004AVAILABLE OPTIONS (1)(1)Contact the factory for other voltage optionsbetween 1.25V and 5.85V.over operating temperature range (unless otherwise noted)(1)(2)(1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.(2)All voltage values are with respect to network ground terminal.(1)The JEDEC Low-K (1s)board design used to derive this data was a 3inch x 3inch,two-layer board with 2ounce copper traces on top of the board.(2)The JEDEC High-K (2s2p)board design used to derive this data was a 3inch x 3inch,multilayer board with 1ounce internal power and ground planes and 2ounce copper traces on top and bottom of the board.元器件交易网ELECTRICAL CHARACTERISTICSTPS71501 TPS71525,TPS71530TPS71533,TPS71550 SLVS338H–MAY2001–REVISED JUNE2004over operating junction temperature range(T J=-40°C to125°C),V IN=V OUT(NOM)+1V,I OUT=1mA,C OUT=1µF unless otherwise noted.Typical values are at T J=25°C.(1)Minimum V IN=V OUT+V DO or the value shown for Input voltage in this table,whichever is greater.元器件交易网V(IN)GNDV(OUT)V(IN) GND V(OUT)TPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY2001–REVISED JUNE2004FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSIONFUNCTIONAL BLOCK DIAGRAM—FIXED VERSIONTable1.Terminal Functions元器件交易网TYPICAL CHARACTERISTICSI O − Output Current − mAV O U T − O u t p u t V o l t a g e − VT J − Free−Air Temperature − °CV O U T − O u t p u t V o l t a g e −VT J − Free-Air Temperature − °CI G N D − G r o u n d C u r r e n t − µ A1001 k 10 k 100 kf − Frequency − HzµH zO u t p u t S p e c t r a l N o i s e D e n s i t y − V/f − Frequency − Hz− O u t p u t I m p e d a n c e −Z o ΩI OUT − Output Current − mA− D r o p o u t V o l t a g e − m VV DO V IN − Input Voltage − V − D r o p o u t V o l t a g e − VV D O T J − Free-Air Temperature − °C− D r o p o u t V o l t a g e − m VV D Of − Frequency − HzP S R R − P o w e r S u p p l y R i p p l e R e j e c t i o n − d BTPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY 2001–REVISED JUNE 2004OUTPUT VOLTAGEOUTPUT VOLTAGEQUIESCENT CURRENTvsvsvsOUTPUT CURRENTFREE-AIR TEMPERATUREFREE-AIR TEMPERATUREFigure 1.Figure 2.Figure 3.OUTPUT SPECTRAL NOISE DENSITYOUTPUT IMPEDANCEDROPOUT VOLTAGEvsvsvsFREQUENCYFREQUENCYOUTPUT CURRENTFigure 4.Figure 5.Figure 6.TPS71501POWER-SUPPLY DROPOUT VOLTAGEDROPOUT VOLTAGERIPPLE REJECTIONvsvsvsINPUT VOLTAGEFREE-AIR TEMPERATUREFREQUENCYFigure 7.Figure 8.Figure 9.元器件交易网t − Time − µsI O U T − O u t p u t C u r r e n t − m VD V O U T − C h a n g e I n O u t p u t V o l t a g e − mV t − Time − msV O U T − O u t p u t V o l t a g e − m VV I N − I n p u t V o l t a g e − Vt − Time − msV O U T − O u t p u t V o l t a g e − VV I N − I n p u t V o l t a g e − VTPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY 2001–REVISED JUNE 2004TYPICAL CHARACTERISTICS (continued)POWER UP /POWER DOWNLINE TRANSIENT RESPONSELOAD TRANSIENT RESPONSEFigure 10.Figure 11.Figure 12.元器件交易网APPLICATION INFORMATION0.1 V I V OµFExternal Capacitor RequirementsPower Dissipation and Junction TemperatureP D(max)+T Jmax *TA Rq JA(1)P D+ǒV I *V O ǓIO(2)Regulator ProtectionTPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY 2001–REVISED JUNE 2004The TPS715xx family of LDO regulators has been optimized for ultra-low power applications such as the MSP430microcontroller.Its ultralow supply current maximizes efficiency at light loads,and its high input voltage range makes it suitable for supplies such as unconditioned solar panels.Figure 13.Typical Application Circuit (Fixed Voltage Version)Although not required,a 0.047-µF or larger input bypass capacitor,connected between IN and GND and located close to the device,is recommended to improve transient response and noise rejection of the power supply as a whole.A higher-value input capacitor may be necessary if large,fast-rise-time load transients are anticipated and the device is located several inches from the power source.The TPS715xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop.Any capacitor (including ceramic and tantalum)≥0.47µF properly stabilizes this loop.To ensure reliable operation,worst-case junction temperature should not exceed 125°C.This restriction limits the power dissipation the regulator can handle in any given application.To ensure the junction temperature is within acceptable limits,calculate the maximum allowable dissipation,P D(max),and the actual dissipation,P D ,which must be less than or equal to P D(max).The maximum-power-dissipation limit is determined using the following equation:where:•T J max is the maximum allowable junction temperature.•R θJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings table).•T A is the ambient temperature.The regulator dissipation is calculated using:Power dissipation resulting from quiescent current is negligible.The TPS715xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the inputvoltage drops below the output voltage (e.g.,during power down).Current is conducted from the output to the input and is not internally limited.If extended reverse voltage operation is anticipated,external limiting might be appropriate.元器件交易网Programming the TPS71501Adjustable LDO RegulatorV O +Vrefǒ1)R1R2Ǔ(3)R1+ǒVO V ref*1ǓR2(4)OUTPUT VOLTAGE PROGRAMMING GUIDE OUTPUT VOLTAGER1R21.8 V 2.8 V 5.0 V0.499 M Ω1.33 M Ω3.16 M Ω1 M Ω1 M Ω1 M ΩV O V I 0.47 µFTPS71501TPS71525,TPS71530TPS71533,TPS71550SLVS338H–MAY 2001–REVISED JUNE 2004APPLICATION INFORMATION (continued)The TPS715xx features internal current limiting.During normal operation,the TPS715xx limits output current to approximately 500mA.When current limiting engages,the output voltage scales back linearly until the overcurrent condition ends.Take care not to exceed the power dissipation ratings of the package.The output voltage of the TPS71501adjustable regulator is programmed using an external resistor divider as shown in Figure 14.The output voltage is calculated using:where:•V REF =1.205V typ (the internal reference voltage)Resistors R1and R2should be chosen for approximately 1.5-µA divider current.Lower value resistors can be used for improved noise performance,but the solution consumes more power.Higher resistor values should be avoided as leakage current into/out of FB across R1/R2creates an offset voltage that artificially in-creases/decreases the feedback voltage and thus erroneously decreases/increases V O .The recommended design procedure is to choose R2=1M Ωto set the divider current at 1.5µA,and then calculate R1using:Figure 14.TPS71501Adjustable LDO Regulator Programming元器件交易网PACKAGING INFORMATIONORDERABLE DEVICESTATUS(1)PACKAGE TYPEPACKAGE DRAWINGPINS PACKAGE QTYBQ71525DCKR ACTIVE SOP DCK 53000BQ71533DCKR ACTIVE SOP DCK 53000TPS71501DCKR ACTIVE SOP DCK 53000TPS71525DCKR ACTIVE SOP DCK 53000TPS71530DCKR ACTIVE SOP DCK 53000TPS71533DCKR ACTIVE SOP DCK 53000TPS71550DCKRACTIVESOPDCK53000(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.PACKAGE OPTION ADDENDUM2-Jun-2004元器件交易网元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third-party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2004, Texas Instruments Incorporated。

ADM7151--相关资料介绍

Clock distribution circuits Ultrasound and other imaging applications High speed RF transceivers High speed, 16-bit or greater ADCs Communications and infrastructure Cable digital-to-analog converter (DAC) drivers
Model Selection .......................................................................... 16 Capacitor Selection .................................................................... 16 Enable (EN) and Undervoltage Lockout (UVLO)................. 18 Start-Up Time ............................................................................. 19 REF, BYP, and VREG Pins......................................................... 19 Current-Limit and Thermal Overload Protection................. 19 Thermal Considerations............................................................ 19 Printed Circuit Board Layout Considerations........................ 22 Outline Dimensions ....................................................................... 23 Ordering Guide .......................................................................... 24

TLC1549CP;TLC1549IP;TLC1549CD;TLC1549ID;TLC1549CDR;中文规格书,Datasheet资料

TLC1549MFK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1995, Texas Instruments Incorporated
description
The TLC1549C is characterized for operation from 0°C to 70°C. The TLC1549I is characterized for operation from – 40°C to 85°C. The TLC1549M is characterized for operation over the full military temperature range of – 55°C to 125°C.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Sample and Hold

ACS715_datasheet

ACS715捷多邦，您值得信赖的PCB打样专家！of the device at up to 5× overcurrent conditions. The terminals of the conductive path are electrically isolated from the sensor leads (pins 5 through 8). This allows the ACS715 current sensor to be used in applications requiring electrical isolation without the use of opto-isolators or other costly isolation techniques.The A CS715 is provided in a small, surface mount SOIC8 package. The leadframe is plated with 100% matte tin, which is compatible with standard lead (Pb) free printed circuit board assembly processes. Internally, the device is Pb-free, except for flip-chip high-temperature Pb-based solder balls, currently exempt from RoHS. The device is fully calibrated prior to shipment from the factory.Description (continued)TÜV AmericaCertificate Number:U8V 06 05 54214 010Parameter SpecificationFire and Electric ShockCAN/CSA-C22.2 No. 60950-1-03UL 60950-1:2003EN 60950-1:2001Selection GuidePart Number Optimized Range, I P(A)Sensitivity, Sens (Typ) (mV/A)T A (°C)Packing*ACS715ELCTR-20A-T 0 to 20185–40 to 85Tape and reel, 3000 pieces/reelACS715ELCTR-30A-T 0 to 30133ACS715LLCTR-20A-T 0 to 20185–40 to 150ACS715LLCTR-30A-T0 to 30133*Contact Allegro for additional packing options.Absolute Maximum RatingsCharacteristicSymbol NotesRating Units Supply Voltage V CC 8V Reverse Supply Voltage V RCC –0.1V Output VoltageV IOUT 8V Reverse Output Voltage V RIOUT –0.1V Reinforced Isolation Voltage V ISO Pins 1-4 and 5-8; 60 Hz, 1 minute, T A =25°C 2100V Rated Input Voltage V working Voltage applied to leadframe (Ip+ pins)184V AC MaxOutput Current Source I OUT(Source) 3mA Output Current SinkI OUT(Sink)10mA Overcurrent Transient Tolerance I P 1 pulse, 100 ms 100A Nominal Operating Ambient Temperature T A Range E –40 to 85ºC Range L–40 to 150ºC Maximum Junction Temperature T J (max)165ºC Storage TemperatureT stg–65 to 170ºCIP+IP+IP–IP–VCC VIOUT FILTER GNDTerminal List TableNumber Name Description1 and 2IP+Input terminals for current being sensed; fused internally 3 and 4IP–Output terminals for current being sensed; fused internally 5GND Signal ground terminal6FILTER Terminal for external capacitor that sets bandwidth 7VIOUT Analog output signal 8VCCDevice power supply terminalFunctional Block DiagramPin-out DiagramCOMMON THERMAL CHARACTERISTICS 1Min.Typ.Max.Units Operating Internal Leadframe TemperatureT AE range –40–85°C L range–40–150°C ValueUnits Junction-to-Lead Thermal Resistance 2R θJL Mounted on the Allegro ASEK 715 evaluation board5°C/W Junction-to-Ambient Thermal Resistance 2,3R θJAMounted on the Allegro 85-0322 evaluation board, includes the powerconsumed by the board23°C/W1Additional thermal information is available on the Allegro website.2The Allegro evaluation board has 1500 mm 2 of 2 oz. copper on each side, connected to pins 1 and 2, and to pins 3 and 4, with thermal vias connect-ing the layers. Performance values include the power consumed by the PCB. Further details on the board are available from the Frequently Asked Questions document on our website. Further information about board design and thermal performance also can be found in the Applications Informa-tion section of this datasheet.3RθJA values shown in this table are typical values, measured on the Allegro evaluation board. The actual thermal performance depends on the actual application board design, the airflow in the application, and thermal interactions between the sensor and surrounding components through the PCB and the ambient air. To improve thermal performance, see our applications material on the Allegro website.COMMON OPERATING CHARACTERISTICS 1 over full range of T A , and V CC = 5 V, unless otherwise specifiedCharacteristicSymbol Test Conditions Min.Typ.Max.Units ELECTRICAL CHARACTERISTICSSupply Voltage V CC 4.55.0 5.5V Supply CurrentI CC V CC = 5.0 V, output open –1013mA Output Capacitance Load C LOAD VIOUT to GND ––10nF Output Resistive Load R LOAD VIOUT to GND 4.7––k ΩPrimary Conductor Resistance R PRIMARYT A = 25°C– 1.2–m ΩRise Timet r I P = I P (max), T A = 25°C, C OUT = 10 nF –5–μs Frequency Bandwidth f –3 dB, T A = 25°C; I P is 10 A peak-to-peak –80–kHz Nonlinearity E LIN Over full range of I P , I P applied for 5 ms –±1.5–%SymmetryE SYM Over full range of I P , I P applied for 5 ms 98100102%Zero Current Output Voltage V IOUT(Q)Unidirectional; I P = 0 A, T A = 25°C–V CC × 0.1–V Power-On Time t POOutput reaches 90% of steady-state level, no capacitor on FILTER pin; T J = 25; 20 A present on leadframe–35–μs Magnetic Coupling 2–12–G/A Internal Filter Resistance 3R F(INT)1.7k Ω1Device may be operated at higher primary current levels, IP , and ambient, T A, and internal leadframe temperatures, T A , provided that the Maximum Junction Temperature, T J (max), is not exceeded.21G = 0.1 mT. 3RF(INT) forms an RC circuit via the FILTER pin.x20A PERFORMANCE CHARACTERISTICS over Range E: T A = –40°C to 85°C1, CF= 1 nF, and V CC = 5 V, unless otherwise specified Characteristic Symbol Test Conditions Min.Typ.Max.Units Optimized Accuracy Range I P0–20A Sensitivity Sens Over full range of I P , I P applied for 5ms; T A = 25°C178185190mV/ANoise V NOISE(PP)Peak-to-peak, T A = 25°C, 2 kHz external filter, 185 mV/A pro-grammed Sensitivity, C F = 47 nF, C OUT = 10 nF, 2 kHz bandwidth–21–mVZero Current Output Slope∆I OUT(Q)T A = –40°C to 25°C–0.08–mV/°C T A = 25°C to 150°C–0.16–mV/°CSensitivity Slope∆Sens T A = –40°C to 25°C–0.035–mV/A/°C T A = 25°C to 150°C–0.019–mV/A/°CElectrical Offset Voltage V OE I P = 0 A–40–40mV Total Output Error2E TOT I P = 20 A, I P applied for 5 ms; T A = 25°C–±1.5–% 1Device may be operated at higher primary current levels, I P, and ambient temperatures, T A, provided that the Maximum Junction Temperature,T J(max), is not exceeded.2Percentage of I P, with I P = 20 A. Output filtered.1, C = 1 nF, and V = 5 V, unless otherwise specifiedP AT J(max), is not exceeded.2Percentage of I P, with I P = 20 A. Output filtered.x30A PERFORMANCE CHARACTERISTICS over Range E: T A = –40°C to 85°C1, CF= 1 nF, and V CC = 5 V, unless otherwise specified Characteristic Symbol Test Conditions Min.Typ.Max.Units Optimized Accuracy Range I P0–30A Sensitivity Sens Over full range of I P , I P applied for 5ms; T A = 25°C129133137mV/ANoise V NOISE(PP)Peak-to-peak, T A = 25°C, 2 kHz external filter, 133 mV/A pro-grammed Sensitivity, C F = 47 nF, C OUT = 10 nF, 2 kHz bandwidth–15–mVZero Current Output Slope∆I OUT(Q)T A = –40°C to 25°C–0.06–mV/°C T A = 25°C to 150°C–0.1–mV/°CSensitivity Slope∆Sens T A = –40°C to 25°C–0.007–mV/A/°C T A = 25°C to 150°C––0.025–mV/A/°CElectrical Offset Voltage V OE I P = 0 A–30–30mV Total Output Error2E TOT I P = 30 A, I P applied for 5 ms; T A = 25°C–±1.5–% 1Device may be operated at higher primary current levels, I P, and ambient temperatures, T A, provided that the Maximum Junction Temperature,T J(max), is not exceeded.2Percentage of I P, with I P = 30 A. Output filtered.x30A PERFORMANCE CHARACTERISTICS over Range L: T A = –40°C to 150°C1, CF= 1 nF, and V CC = 5 V, unless otherwise specified Characteristic Symbol Test Conditions Min.Typ.Max.Units Optimized Accuracy Range I P0–30ASensitivity Sens Over full range of I P , I P applied for 5ms; T A = 25°C–133–mV/A Over full range of I P, T A = –40°C to 150°C125–137mV/ANoise V NOISE(PP)Peak-to-peak, T A = 25°C, 2 kHz external filter, 133 mV/A pro-grammed Sensitivity, C F = 47 nF, C OUT = 10 nF, 2 kHz bandwidth–15–mVZero Current Output Slope∆I OUT(Q)T A = –40°C to 25°C–0.06–mV/°C T A = 25°C to 150°C–0.1–mV/°CSensitivity Slope∆Sens T A = –40°C to 25°C–0.007–mV/A/°C T A = 25°C to 150°C––0.025–mV/A/°CElectrical Offset Voltage V OE I P = 0 A–40–40mVTotal Output Error2E TOT I P = 30 A, I P applied for 5 ms; T A = 25°C–±1.5–% I P = 30 A, I P applied for 5 ms; T A = –40° to 150°C–5–5%1Device may be operated at higher primary current levels, I P, and ambient temperatures, T A, provided that the Maximum Junction Temperature, T J(max), is not exceeded.2Percentage of I P, with I P = 30 A. Output filtered.Mean Supply Current versus Ambient TemperatureM e a n I C C (m A )Supply Current versus Supply VoltageE T O T (%)V I O U T (V )I O M (m A )V I O U T (Q ) (m V )Characteristic PerformanceI P = 20 A, unless otherwise specifiedCharacteristic PerformanceI P = 30 A, unless otherwise specifiedMean Supply Current versus Ambient TemperatureM e a n I C C (m A )Supply Current versus Supply VoltageE T O T (%)V I O U T (V )I O M (m A )V I O U T (Q ) (m V )Sensitivity (Sens). The change in sensor output in response to a 1 A change through the primary conductor. The sensitivity is the product of the magnetic circuit sensitivity (G / A ) and the linear IC amplifier gain (mV/G). The linear IC amplifier gain is pro-grammed at the factory to optimize the sensitivity (mV/A) for the full-scale current of the device.Noise (V NOISE ). The product of the linear IC amplifier gain (mV/G) and the noise floor for the Allegro Hall effect linear IC (≈1 G). The noise floor is derived from the thermal and shot noise observed in Hall elements. Dividing the noise (mV) by the sensitivity (mV/A) provides the smallest current that the device is able to resolve.Linearity (E LIN ). The degree to which the voltage output from the sensor varies in direct proportion to the primary currentthrough its full-scale amplitude. Nonlinearity in the output can be attributed to the saturation of the flux concentrator approaching the full-scale current. The following equation is used to derive the linearity:where V IOUT_full-scale amperes = the output voltage (V) when thesensed current approximates full-scale ±I P .Quiescent output voltage (V IOUT(Q)). The output of the sensor when the primary current is zero. For a unipolar supply voltage, it nominally remains at V CC ⁄ 2. Thus, V CC = 5 V translates into V IOUT(Q) = 2.5 V . Variation in V IOUT(Q) can be attributed to the resolution of the Allegro linear IC quiescent voltage trim and thermal drift.Electrical offset voltage (V OE ). The deviation of the device out-put from its ideal quiescent value of V CC / 2 due to nonmagnetic causes. To convert this voltage to amperes, divide by the device sensitivity, Sens.Accuracy (E TOT ). The accuracy represents the maximum devia-tion of the actual output from its ideal value. This is also known as the total ouput error. The accuracy is illustrated graphically in the output voltage versus current chart at right.Accuracy is divided into four areas:• 0 A at 25°C. Accuracy of sensing zero current flow at 25°C, without the effects of temperature.• 0 A over Δ temperature. Accuracy of sensing zero current flow including temperature effects.• Full-scale current at 25°C. Accuracy of sensing the full-scale current at 25°C, without the effects of temperature.• Full-scale current over Δ temperature. Accuracy of sensing full-scale current flow including temperature effects.Ratiometry . The ratiometric feature means that its 0 A output, V IOUT(Q), (nominally equal to V CC /2) and sensitivity, Sens, are proportional to its supply voltage, V CC . The following formula is used to derive the ratiometric change in 0 A output voltage,ΔV IOUT(Q)RAT (%).The ratiometric change in sensitivity, ΔSens RAT (%), is defined as:Definitions of Accuracy Characteristics1001–[{[{V IOUT _full-scale amperes –V IOUT(Q)Δ gain × % sat ()2 (V IOUT _half-scale amperes – V IOUT(Q))100V IOUT(Q)VCC /V IOUT(Q)5VV CC /5 V100Sens VCC /Sens 5VV CC /5 V‰Output Voltage versus Sensed CurrentAccuracy at 0 A and at Full-Scale CurrentPower on Time versus External Filter CapacitanceC F (nF)t P O (μs )0.010.11101001000N o i se (p -p )(m A)Noise vs.Filter Cap502575100125150t r (μs )C F (nF)Rise Time versus External Filter Capacitance100200300400500t r (μs )C F (nF)C F (nF)t r (μs) 0 6.6 1 7.7 4.7 17.4 10 32.1 22 68.2 47 88.2 100 291.3 220 623.0 470 1120.0Definitions of Dynamic Response CharacteristicsRise time (t r ). The time interval between a) when the sensor reaches 10% of its full scale value, and b) when it reaches 90% of its full scale value. The rise time to a step response is used to derive the bandwidth of the current sensor, in which ƒ(–3 dB) = 0.35 / t r . Both t r and t RESPONSE are detrimentally affected by eddy current losses observed in the conductive IC ground plane.Power-On Time (t PO ). When the supply is ramped to its operat-ing voltage, the device requires a finite time to power its internal components before responding to an input magnetic field.Power-On Time, t PO , is defined as the time it takes for the output voltage to settle within ±10% of its steady state value under an applied magnetic field, after the power supply has reached its minimum specified operating voltage, V CC (min), as shown in the chart at right.Chopper Stabilization is an innovative circuit technique that is used to minimize the offset voltage of a Hall element and an asso-ciated on-chip amplifier. Allegro patented a Chopper Stabiliza-tion technique that nearly eliminates Hall IC output drift induced by temperature or package stress effects. This offset reduction technique is based on a signal modulation-demodulation process. Modulation is used to separate the undesired dc offset signal from the magnetically induced signal in the frequency domain. Then, using a low-pass filter, the modulated dc offset is suppressed while the magnetically induced signal passes through the filter. As a result of this chopper stabilization approach, the output voltage from the Hall IC is desensitized to the effects of tempera-ture and mechanical stress. This technique produces devices that have an extremely stable Electrical Offset V oltage, are immune to thermal stress, and have precise recoverability after temperature cycling.This technique is made possible through the use of a BiCMOS process that allows the use of low-offset and low-noise amplifiers in combination with high-density logic integration and sample and hold circuits.Application 2. 10 A Overcurrent Fault Latch. Fault threshold set by R1 and R2. This circuit latches an overcurrent fault and holds it until the 5 V rail is powered down.Application 4. Control circuit for MOSFET ORing.Chopper Stabilization TechniqueConcept of Chopper Stabilization TechniqueLOADTypical ApplicationsApplication 3. This configuration increases gain to 610 mV/A (tested using the ACS712ELC-05A).Improving Sensing System Accuracy Using the FILTER Pin In low-frequency sensing applications, it is often advantageous to add a simple RC filter to the output of the sensor. Such a low-pass filter improves the signal-to-noise ratio, and therefore the resolution, of the sensor output signal. However, the addition of an RC filter to the output of a sensor IC can result in undesirable sensor output attenuation — even for dc signals.Signal attenuation, ∆V ATT , is a result of the resistive divider effect between the resistance of the external filter, R F (see Appli-cation 5), and the input impedance and resistance of the customer interface circuit, R INTFC . The transfer function of this resistive divider is given by:Even if R F and R INTFC are designed to match, the two individualresistance values will most likely drift by different amounts overtemperature. Therefore, signal attenuation will vary as a function of temperature. Note that, in many cases, the input impedance, R INTFC , of a typical analog-to-digital converter (ADC) can be as low as 10 k Ω.The ACS715 contains an internal resistor, a FILTER pin connec-tion to the printed circuit board, and an internal buffer ampli-fier. With this circuit architecture, users can implement a simple RC filter via the addition of a capacitor, C F (see Application 6) from the FILTER pin to ground. The buffer amplifier inside of the ACS715 (located after the internal resistor and FILTER pin connection) eliminates the attenuation caused by the resistive divider effect described in the equation for ∆V ATT . Therefore, the ACS715 device is ideal for use in high-accuracy applications that cannot afford the signal attenuation associated with the use of an external RC low-pass filter.=∆V ATT R INTFC R F + R INTFC V IOUT ⎟⎠⎞⎜⎜⎝⎛.Application 5. When a low pass filter is construct-ed externally to a standard Hall effect device, a resistive divider may exist between the filter resistor, R F, and the resistance of the custom-er interface circuit, R INTFC . This resistive divider will cause excessive attenuation, as given by the transfer function for ∆V ATT .Application 6. Using the FILTER pin provided on the ACS715 eliminates the attenuation effects of the resis-tor divider between R F and R INTFC , shown in Application 5.Package LC, 8-pin SOICACS715T R LC PPP YYWWAACS Allegro Current Sensor 715Device family numberT Indicator of 100% matte tin leadframe plating R Operating ambient temperature range code LC Package type designator PPP Primary sensed currentYY Date code: Calendar year (last two digits)WW Date code: Calendar week A Date code: Shift codeACS715T R LC PPP L...L YYWWACS Allegro Current Sensor 715Device family numberT Indicator of 100% matte tin leadframe plating R Operating ambient temperature range code LC Package type designator PPP Primary sensed current L...L Lot codeYY Date code: Calendar year (last two digits)WW Date code: Calendar weekPackage BrandingTwo alternative patterns are usedFor the latest version of this document, go to our website at:Copyright ©2006, 2007, Allegro MicroSystems, Inc.The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de p ar t ures from the detail spec i f i c a t ions as may be required to per-mit improvements in the per f or m ance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current.Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system.The in f or m a t ion in c lud e d herein is believed to be ac c u r ate and reliable. How e v e r, Allegro MicroSystems, Inc. assumes no re s pon s i b il i t y for its use; nor for any in f ringe m ent of patents or other rights of third parties which may result from its use.。

ST STF715 STN715 数据手册

STF715STN715NPN MEDIUM POWER TRANSISTORSsSURFACE-MOUNTING DEVICES INMEDIUM POWER SOT-223 AND SOT-89PACKAGESsAVAILABLE IN TAPE & REEL PACKINGAPPLICATIONS s VOLTAGE REGULATION s RELAY DRIVER s GENERIC SWITCHDECRIPTION The STF715 and STN715 are NPN transistors manufactured using Planar Technology resulting in rugged high performance devices.April 2002ABSOLUTE MAXIMUM RATINGS®1/5查询STF715供应商STF715 - STN715THERMAL DATAC unless otherwise specified)ELECTRICAL CHARACTERISTICS (T case = 25 oSTF715 - STN715STF715 - STN715Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a trademark of STMicroelectronics © 2002 STMicroelectronics – Printed in Italy – All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States.STF715 - STN715。

Fluke 715 中文说明书

®715Volt/mA Calibrator说明书简介Fluke 715伏特/毫安校准仪 (Volt/mA Calibrator) 是一个伏特/毫安源及测量工具，用于 0到 24毫安的电流回路和 0到 20/25 V的直流电压测试上。

本校准仪不能同时用作输出和测量上。

您的校准仪应包括以下附件：皮套、一对测试导线、已经安装的9 V碱电池、以及本说明书。

校准仪功能摘要功能量程分辨率直流毫伏输入0 到 200 mV 0.01 mV直流毫伏输出到 25 V直流电压输入 00.001 V直流电压输出0 到 20 V直流毫安输入0 到 24 mA 0.001 mA直流毫安输出回路电源输出24 V dc 输出不适用PN 650314 (Simplified Chinese) July 1997 Rev. 3, 8/051997-2005 Fluke Corporation. All rights reserved. Printed in U.S.A.All product names are trademarks of their respective companies.若校准仪有损坏或缺少某些附件，请立即与采购的地方联系。

有关附件的资料，请和您的Fluke 经销商联系。

欲订购零件或备件，请参阅“更换零件”。

要和Fluke 联系，请打电话：通讯地址：Fluke Corporation Fluke Europe B.V. P.O. Box 9090, P.O. Box 1186, Everett, WA 98206-9090 5602 BD Eindhoven U.S.A.（美国） The Netherlands （荷兰）或向我们的全球网址查询，地址是：国际符号符号含义J 接地 I 保险丝 M 电池W 有关本项功能的资料，请参阅本说明书。

T双重绝缘$符合 Canadian Standards Association 的相关指令。

英飞凌 FS75R12N2T7_B15 EconoPACK 2 模块数据表

EconoPACK ™2 模块采用第七代沟槽栅/场终止IGBT7和第七代发射极控制二极管带有温度检测NTC 特性•电气特性-V CES = 1200 V-I C nom = 75 A / I CRM = 150 A -沟槽栅IGBT7-低 V CEsat-过载操作达175°C•机械特性-高功率循环和温度循环能力-集成NTC 温度传感器-铜基板-低热阻的三氧化二铝 Al 2O 3 衬底-焊接技术-标准封装可选应用•辅助逆变器•电机传动•伺服驱动器产品认证•根据 IEC 60747、60749 和 60068 标准的相关测试，符合工业应用的要求。

描述FS75R12N2T7_B15EconoPACK ™2 模块内容描述 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1特性 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1可选应用 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1产品认证 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1内容 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 1封装 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2IGBT, 逆变器 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3二极管,逆变器 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 4负温度系数热敏电阻 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 5特征参数图表 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 6电路拓扑图 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 7封装尺寸 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 8模块标签代码 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14修订历史 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15免责声明 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .161封装表 1绝缘参数特征参数代号标注或测试条件数值单位绝缘测试电压V ISOL RMS, f = 50 Hz, t = 1 min 2.5kV 模块基板材料Cu内部绝缘基本绝缘 (class 1, IEC 61140)Al2O3爬电距离d Creep端子至散热器10.0mm 电气间隙d Clear端子至散热器7.5mm 相对电痕指数CTI>200相对温度指数 (电)RTI封装140°C 表 2特征值特征参数代号标注或测试条件数值单位最小值典型值最大值杂散电感,模块L sCE17nH 模块引线电阻,端子-芯片R CC'+EE'T C=25°C, 每个开关 3.3mΩ储存温度T stg-40125°C 模块安装的安装扭距M根据相应的应用手册进行安装M5, 螺丝36Nm 重量G180g 注:The current under continuous operation is limited to 50A rms per connector pin.2IGBT, 逆变器表 3最大标定值特征参数代号标注或测试条件数值单位集电极－发射极电压V CES T vj = 25 °C1200V 连续集电极直流电流I CDC T vj max = 175 °C T C = 100 °C75A 集电极重复峰值电流I CRM t P = 1 ms150A 栅极－发射极峰值电压V GES±20V表 4特征值特征参数代号标注或测试条件数值单位最小值典型值最大值集电极－发射极饱和电压V CE sat I C = 75 A, V GE = 15 V T vj = 25 °C 1.55 1.80VT vj = 125 °C 1.69T vj = 175 °C 1.77栅极阈值电压V GEth I C = 1.28 mA, V CE = V GE, T vj = 25 °C 5.15 5.80 6.45V 栅极电荷Q G V GE = ±15 V, V CE = 600 V 1.25µC 内部栅极电阻R Gint T vj = 25 °C2Ω输入电容C ies f = 100 kHz, T vj = 25 °C, V CE = 25 V, V GE = 0 V15.1nF 反向传输电容C res f = 100 kHz, T vj = 25 °C, V CE = 25 V, V GE = 0 V0.053nF 集电极-发射极截止电流I CES V CE = 1200 V, V GE = 0 V T vj = 25 °C0.014mA 栅极-发射极漏电流I GES V CE = 0 V, V GE = 20 V, T vj = 25 °C100nA开通延迟时间(感性负载)t don I C = 75 A, V CE = 600 V,V GE = ±15 V, R Gon = 5.6 ΩT vj = 25 °C0.164µs T vj = 125 °C0.178T vj = 175 °C0.185上升时间(感性负载)t r I C = 75 A, V CE = 600 V,V GE = ±15 V, R Gon = 5.6 ΩT vj = 25 °C0.048µs T vj = 125 °C0.053T vj = 175 °C0.057关断延迟时间(感性负载)t doff I C = 75 A, V CE = 600 V,V GE = ±15 V, R Goff = 5.6 ΩT vj = 25 °C0.300µs T vj = 125 °C0.380T vj = 175 °C0.420下降时间(感性负载)t f I C = 75 A, V CE = 600 V,V GE = ±15 V, R Goff = 5.6 ΩT vj = 25 °C0.120µs T vj = 125 °C0.200T vj = 175 °C0.270开通损耗能量 (每脉冲)E on I C = 75 A, V CE = 600 V,Lσ = 35 nH, V GE = ±15 V,R Gon = 5.6 Ω, di/dt =1200 A/µs (T vj = 175 °C)T vj = 25 °C7.96mJ T vj = 125 °C10.8T vj = 175 °C12.3关断损耗能量 (每脉冲）E off I C = 75 A, V CE = 600 V,Lσ = 35 nH, V GE = ±15 V,R Goff = 5.6 Ω, dv/dt =3200 V/µs (T vj = 175 °C)T vj = 25 °C 5.02mJ T vj = 125 °C7.68T vj = 175 °C9.46(待续)表 4(续) 特征值特征参数代号标注或测试条件数值单位最小值典型值最大值短路数据I SC V GE≤ 15 V, V CC = 800 V,V CEmax=V CES-L sCE*di/dt t P≤ 8 µs,T vj=150 °C260At P≤ 7 µs,T vj=175 °C250结－外壳热阻R thJC每个 IGBT0.475K/W 外壳－散热器热阻R thCH每个 IGBT, λgrease= 1 W/(m*K)0.141K/W 允许开关的温度范围T vj op-40175°C注:T vj op > 150°C is allowed for operation at overload conditions. For detailed specifications, please refer to AN2018-14.3二极管,逆变器表 5最大标定值特征参数代号标注或测试条件数值单位反向重复峰值电压V RRM T vj = 25 °C1200V 连续正向直流电流I F75A 正向重复峰值电流I FRM t P = 1 ms150A I2t-值I2t t P = 10 ms, V R = 0 V T vj = 125 °C1150A²sT vj = 175 °C740表 6特征值特征参数代号标注或测试条件数值单位最小值典型值最大值正向电压V F I F = 75 A, V GE = 0 V T vj = 25 °C 1.72 2.10VT vj = 125 °C 1.59T vj = 175 °C 1.52反向恢复峰值电流I RM V R = 600 V, I F = 75 A,V GE = -15 V, -di F/dt =1200 A/µs (T vj = 175 °C)T vj = 25 °C43A T vj = 125 °C56T vj = 175 °C65(待续)表 6(续) 特征值特征参数代号标注或测试条件数值单位最小值典型值最大值恢复电荷Q r V R = 600 V, I F = 75 A,V GE = -15 V, -di F/dt =1200 A/µs (T vj = 175 °C)T vj = 25 °C 4.94µC T vj = 125 °C10.2T vj = 175 °C13.7反向恢复损耗（每脉冲）E rec V R = 600 V, I F = 75 A,V GE = -15 V, -di F/dt =1200 A/µs (T vj = 175 °C)T vj = 25 °C 1.45mJ T vj = 125 °C 3.32T vj = 175 °C 4.62结－外壳热阻R thJC每个二极管0.708K/W 外壳－散热器热阻R thCH每个二极管, λgrease= 1 W/(m*K)0.153K/W 允许开关的温度范围T vj op-40175°C注:T vj op > 150°C is allowed for operation at overload conditions. For detailed specifications, please refer to AN2018-14.4负温度系数热敏电阻表 7特征值特征参数代号标注或测试条件数值单位最小值典型值最大值额定电阻值R25T NTC = 25 °C5kΩR100偏差ΔR/R T NTC = 100 °C, R100 = 493 Ω-55%耗散功率P25T NTC = 25 °C20mW B-值B25/50R2 = R25 exp[B25/50(1/T2-1/(298,15 K))]3375K B-值B25/80R2 = R25 exp[B25/80(1/T2-1/(298,15 K))]3411K B-值B25/100R2 = R25 exp[B25/100(1/T2-1/(298,15 K))]3433K 注:根据应用手册标定4 负温度系数热敏电阻6电路拓扑图图 17封装尺寸图 28 模块标签代码8模块标签代码图 3修订历史修订历史修订版本发布日期变更说明1.002021-12-16Final datasheet商标所有参照产品或服务名称和商标均为其各自所有者的财产。

TPS71501中文资料

ST78系列_7805_7815_datasheet

November 2016 DocID2143 Rev 34 1/54This is information on a product in full production.L78Positive voltage regulator ICsDatasheet - production dataFeatures∙ Output current up to 1.5 A∙ Output voltages of 5; 6; 8; 8.5; 9; 12; 15; 18; 24 V∙ Thermal overload protection ∙ Short circuit protection∙ Output transition SOA protection∙ 2 % output voltage tolerance (A version) ∙ Guaranteed in extended temperature range (A version)DescriptionThe L78 series of three-terminal positiveregulators is available in TO-220, TO-220FP, D²PAK and DPAK packages and several fixed output voltages, making it useful in a wide range of applications.These regulators can provide local on-card regulation, eliminating the distribution problems associated with single point regulation. Each type embeds internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible. If adequate heat sinking is provided, they can deliver over 1 A output current. Although designed primarily as fixed voltage regulators, these devices can be used with external components to obtain adjustable voltage and currents.Contents L78 Contents1Diagram (3)2Pin configuration (4)3Maximum ratings (5)4Test circuits (6)5Electrical characteristics (7)6Application information (23)6.1Design consideration (23)7Typical performance (31)8Package information (33)8.1TO-220 (dual gauge) package information (34)8.2TO-220 (single gauge) package information (36)8.3TO-220FP package information (38)8.4TO-220 packing information (40)8.5DPAK package information (41)8.6D²PAK (SMD 2L STD-ST) type A package information (44)8.7D²PAK (SMD 2L Wooseok-subcon.) package information (46)8.8D²PAK and DPAK packing information (49)9Ordering information (52)10Revision history (53)L78 Diagram1 DiagramFigure 1: Block diagramPin configuration L782 Pin configurationFigure 2: Pin connections (top view)L78Maximum ratings3 Maximum ratingsAbsolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.Figure 4: Application circuitsTest circuits L784 Test circuitsFigure 5: DC parameter5 Electrical characteristicsV I = 10 V, I O = 1 A, T J = 0 to 125 °C (L7805AC), T J = -40 to 125 °C (L7805AB), unlessotherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.Refer to the test circuits, T J = 0 to 125 °C, V I = 14.5 V, I O = 500 mA, C I = 0.33 µF,C O = 0.1 µF unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.unless otherwise specified aNotes:(1)Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used.a Minimum load current for regulation is 5 mA.6 Application information6.1 Design considerationThe L78 Series of fixed voltage regulators are designed with thermal overload protectionthat shuts down the circuit when subjected to an excessive power overload condition,internal short-circuit protection that limits the maximum current the circuit will pass, andoutput transistor safe-area compensation that reduces the output short-circuit current asthe voltage across the pass transistor is increased. In many low current applications,compensation capacitors are not required. However, it is recommended that the regulatorinput be bypassed with capacitor if the regulator is connected to the power supply filter withlong lengths, or if the output load capacitance is large. An input bypass capacitor should beselected to provide good high frequency characteristics to insure stable operation under allload conditions. A 0.33 µF or larger tantalum, mylar or other capacitor having low internalimpedance at high frequencies should be chosen. The bypass capacitor should bemounted with the shortest possible leads directly across the regulators input terminals.Normally good construction techniques should be used to minimize ground loops and leadresistance drops since the regulator has no external sense lead.The addition of an operational amplifier allows adjustment to higher or intermediate valueswhile retaining regulation characteristics. The minimum voltage obtained with thearrangement is 2 V greater than the regulator voltage.The circuit of Figure 13: "High current voltage regulator" can be modified to provide supplyprotection against short circuit by adding a short circuit sense resistor, RSC, and anadditional PNP transistor. The current sensing PNP must be able to handle the short circuitcurrent of the three terminal regulator Therefore a four ampere plastic power transistor isspecified.1. Although no output capacitor is need for stability, it does improve transient response.2. Required if regulator is located an appreciable distance from power supply filter.Figure 14: High output current with short circuit protectionFigure 16: Split power supply (± 15 V - 1 A)* Against potential latch-up problems.Figure 21: High input and output voltageFigure 22: Reducing power dissipation with dropping resistorThe circuit performs well up to 100 kHz.Figure 25: Adjustable output voltage with temperature compensationQ2 is connected as a diode in order to compensate the variation of the Q1 V BE with the temperature. C allows a slow rise time of the V O.Figure 26: Light controllers (VO(min) = VXX + VBE)Application with high capacitance loads and an output voltage greater than 6 volts need an external diode (see Figure 22: "Reducing power dissipation with dropping resistor") to protect the device against input short circuit. In this case the input voltage falls rapidly while the output voltage decrease slowly. The capacitance discharges by means of the base-emitter junction of the series pass transistor in the regulator. If the energy is sufficiently high, the transistor may be destroyed. The external diode by-passes the current from the IC to ground.7 Typical performance8 Package informationIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK® packages, depending on their level of environmental compliance. ECOPACK®specifications, grade definitions and product status are available at: .ECOPACK® is an ST trademark.8.1 TO-220 (dual gauge) package information8.2 TO-220 (single gauge) package information8.3 TO-220FP package information8.4 TO-220 packing information8.5 DPAK package information8.6 D²PAK (SMD 2L STD-ST) type A package information8.7 D²PAK (SMD 2L Wooseok-subcon.) package information8.8 D²PAK and DPAK packing informationFigure 47: Tape outlineFigure 48: Reel outline。

BY715资料

元器件交易网
DISCRETE SEMICOndbook, 2 columns
M3D117
BY715 to BY724 Very fast high-voltage soft-recovery rectifiers
Product speciﬁcation 2001 Sep 24
BY715 to BY724
TYP.
MAX.
UNIT
− − − − − − − − − − − −
28 28 69 69 69 92 92 88 88 88 3 0.4
V V V V V V V V V V µA nC
tf
fall time
−
−
ns
trr
reverse recovery time
100
handbook, halfpage
20
MBL356
IF(AV) (mA)
handbook, halfpage
5
MBL357
IF(AV) (mA)
a = 1.57 a=3
16
4
12 a=5
3
8
2
4
1
0 0 100 Tamb (°C) 200
0 0 100 Tamb (°C) 200
BY715 and BY716 a = IF(RMS)/IF(AV); VR = VRWmax; Rth j-a ≤ 120 K/W. a = 1.57: half sinewave.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VRSM BY715 BY716 BY717 BY718 BY719 BY720 BY721 BY722 BY723 BY724 VRRM repetitive peak reverse voltage BY715 BY716 BY717 BY718 BY719 BY720 BY721 BY722 BY723 BY724 VRW working reverse voltage BY715 BY716 BY717 BY718 BY719 BY720 BY721 BY722 BY723 BY724 PARAMETER non-repetitive peak voltage CONDITIONS

STPTI-15L2C4 WLCSP 3 金属条 PTIC RF2 RF1 偏置特性说明书

STPTIC-15L2C4WLCSP 3 solder barsPTICRF1Features•High power capability •5:1 tuning range •High linearity (48x)•High quality factor (Q)•Low leakage current•Compatible with high voltage control IC (STHVDAC series)•RF tunable passive implementation in mobile phones to optimize antenna radiated performance•Available in wafer level chip scale package:–WLCSP package 0.75 x 0.72 x 0.32 mm •ECOPACK ®2 compliant componentApplications•Cellular antenna open loop tunable matching network in multi-band GSM/WCDMA/LTE mobile phone •Open loop tunable RF filtersDescriptionThe ST integrated tunable capacitor offers excellent RF performance, low power consumption and high linearity required in adaptive RF tuning applications. Thefundamental building block of PTIC is a tunable material called Parascan™, which is a version of barium strontium titanate (BST) developed by Paratek microwave.BST capacitors are tunable capacitors intended for use in mobile phone application and dedicated to RF tunable applications. These tunable capacitors are controlled through an extended bias voltage ranging from 1 to 24 V. The implementation of BST tunable capacitor in mobile phones enables significant improvement in terms of radiated performance making the performance almost insensitive to the external environment.Parascan is a trademark of Paratek Microwave Inc.Parascan™ tunable integrated capacitorSTPTIC-15C4DatasheetSTPTIC-15C4STPTIC-15C4 characteristics 1STPTIC-15C4 characteristicsTable 1. Absolute maximum ratings (limiting values)1.Class 1B defined as passing 500 V, but fails after exposure to 1000V ESD pulse.Table 2. Recommended operating conditionsTable 3. Representative performance (T amb = 25 °C otherwise specified)1.Measured at low frequency2.F 1 = 894 MHz, F 2 = 849 MHz, P 1 = +25 dBm, P 2 = +25 dBm, 2f 1 - f 2 = 939 MHz3.IP3 and harmonics are measured in the shunt configuration in a 50 Ω environment4.850 MHz, P IN = +34 dBm5.One or both of RF IN and RF OUT must be connected to DC ground, using the HVDAC turbo mode. Transition time for tunerbetween Cmin. to 90% of Cmax. or Cmax. to 90% of Cmin. include MIPI order work time (trig with last MIPI CLK).1.1RF measurementsFigure 3. Harmonic power versus bias voltage (shunt)Figure 4. Harmonic power versus bias voltage (series)STPTIC-15C4RF measurementsFigure 5.Third order intercept point (IP3)STPTIC-15C4RF measurements2Package informationIn order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitionsand product status are available at: . ECOPACK® is an ST trademark.2.1WLCSP 3 solder bars package informationFigure 8. WLCSP 3 solder bars package outlineBottom view(balls up)Top view(balls down)Side view Table 4. WLCSP 3 solder bars package dimensionsSTPTIC-15C4Package informationSTPTIC-15C4WLCSP 3 solder bars package informationFigure 9. Recommended PCB land pattern for WLCSP 3 solder bars package Copper pads Solder stencilTable 5. Dimensions2.2Packing informationFigure 10. Tape and reel outlineTable 6. Pocket dimensionsFigure 11. MarkingTop view (balls down)Bottom view (balls up)STPTIC-15C4Packing informationSTPTIC-15C4Reflow profileTable 7. Pinout description1.When connected in shunt, please connect RF2 (B2 ball) to GND2.3Reflow profileFigure 12. ST ECOPACK® recommended soldering reflow profile for PCB mountingNote:Minimize air convection currents in the reflow oven to avoid component movement.Table 8. Recommended values for soldering reflow3Evaluation boardFigure 14.Layer 1 and layer 4Figure 15. Layer 2 and layer 3RFinRFoutDC BiasSerie RFinRFoutDC BiasSHUNTSTPTIC-15C4Evaluation board4Ordering informationFigure 16. Ordering information schemeST PTIC - 15 L 2 C4ST MicroelectronicsPTICParascan™ tunableIntegrated capacitorCapacitorvalueLinearityF: Standard (x24)G: Standard (x24)L: High (x48)PackageTuning15 = 1.5 pF27 = 2.7 pF33 = 3.3 pF39 = 3.9 pF47 = 4.7 pF56 = 5.6 pF68 = 6.8 pF82 = 8.2 pFM6 : QFNC5 : WLCSP400 µm coating1 = 4/1 tuning2 = 5/1 tuningProduct familyManufacturer-C4 : WLCSP3 solder barsTable 9. Ordering informationOrdering informationRevision historyTable 10. Document revision historyIMPORTANT NOTICE – PLEASE READ CAREFULLYSTMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.No license, express or implied, to any intellectual property right is granted by ST herein.Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.Information in this document supersedes and replaces information previously supplied in any prior versions of this document.© 2018 STMicroelectronics – All rights reservedSTPTIC-15L2C4。

ST715高输入电压85mA线性电源数据手册说明书

ST715CRThis is information on a product in full production.October 2020DocID14414 Rev 151/24ST715High input voltage, 85 mA LDO linear regulatorDatasheet - production dataFeatures• 2.5 V to 24 V input voltage•Low-dropout voltage (500 mV typ. at 85 mA)•Very low quiescent current (3.8 µA typ. at full load)•85 mA guaranteed output current•Output voltages available on request: from 1.2V to 5.0 V with 100 mV step and adjustable •Compatible with ceramic output capacitors from 0.47 µF to 10 µF •Internal current limit•Packages: SOT23-5L, SOT323-5L and DFN8 (3x3 mm)•Temperature range: from -40 °C to 125 °CApplications•Mobile phones•Personal digital assistant (PDAs)•Cordless phones and similar battery-powered systemsDescriptionThe ST715 is a high voltage, ultra low quiescent current and low drop linear regulator capable of providing an output current in excess of 85 mA.The device operates over an input voltage range from 2.5 V to 24 V, and it is stable with output ceramic capacitors. Fault condition protection includes short-circuit current limitation. The ultra low quiescent current of 3.8 µA at full load makes it highly suitable for low power applications and battery-powered systems. The wide input voltage range makes the ST715 an ideal solution for low power industrial applications. The ST715 isavailable in SOT23-5, SOT323-5L or DFN8 (3x3 mm) 8 leads.Table 1. Device summaryOrder codesOutput voltageSOT23-5L Marking SOT323-5L Marking DFN8 (3x3 mm)Marking ST715MR 71AD ST715CR7ADST715PUR 715AD ADJ ST715M25R 7125ST715PU25R 71525 2.5 V ST715M33R7133ST715C33R 733ST715PU33R715333.3 V ST715C50R7505.0 VContents ST715Contents1Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65Output voltage selection for adjustable version . . . . . . . . . . . . . . . . . . 85.1External capacitor requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85.2Power dissipation and junction temperature . . . . . . . . . . . . . . . . . . . . . . . 8 6Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 232/24DocID14414 Rev 15ST715Diagram 1 DiagramDocID14414 Rev 153/24Pin configuration ST7154/24DocID14414 Rev 152 Pin configurationTable 2. Pin description (DFN8 3x3 mm)Symbol Pin for fixedPin for adjustableName and functionIN 11Input voltageNC 2, 3, 5, 6, 72, 3, 6, 7Not internally connected GND 44Common ground FB -5Feedback pin OUT88Output voltageExp padExp padLeave floating or connect to GNDTable 3. Pin description (SOT23-5L/SOT323-5L)Symbol Pin for fixedPin for adjustableName and functionIN 44Input voltageNC 1, 33Not internally connected GND 22Common ground FB -1Feedback pin OUT55Output voltageDocID14414 Rev 155/24ST715Maximum ratings3 Maximum ratingsNote:Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.Table 4. Absolute maximum ratingsSymbol ParameterValue Unit V IN DC input voltage From -0.3 to 26V V OUT DC output voltage From -0.3 to V IN +0.3V FB Feedback pin4V I OUTContinuous output currentAccording to package power dissipationAP D (1)1.P D is based on an operating temperature of 25 °C or less. It must be derated according to the operating temperature.Maximum power dissipation, DFN package2W Maximum power dissipation, SOT23-5L and SOT323-5L packages 0.45T STG Storage temperature range-65 to 150°C T OPOperating junction temperature range-40 to 125°C Table 5. Thermal dataSymbol ParameterSOT23-5L SOT323-5LDFN8Unit R thJAThermal resistance junction-ambient19524552°C/WElectrical characteristics ST7156/24DocID14414 Rev 154 Electrical characteristicsT J = 25 °C, V IN = V OUT(NOM) + 1 V, C IN = 0.1 µF, C OUT = 1 µF, I OUT = 1 mA, unless otherwise specified.(1)Table 6. Electrical characteristics - adjustable versionSymbol ParameterTest conditionsMin.Typ.Max.Unit V IN Operating input voltage I OUT = 85 mA 2.524V I OUTOutput currentV IN = 2.5 to 6 V, T J = -40 °C to 125 °C 85mAV FBV FB accuracy (1)V IN = V OUT + 1 to 24 V,I OUT = 1 mA to 30 mA,T J = 0 °C to 85 °C 1.1951.245VV IN = V OUT + 1 to 24 V,I OUT = 1 mA to 85 mA,T J = -40 °C to 125 °C1.1521.248∆V OUT Line regulation V IN = V OUT +1 to 24 V, I OUT = 1 mA,T J = -40 °C to 125 °C 0.0010.004%/V ∆V OUTLoad regulationI OUT = 1 mA to 85 mA, T J = -40 °C to 125 °C0.0020.004%/mAe NOutput noise voltage(2)200 Hz to 100 kHz, I OUT = 50 mA, C OUT = 10 µF, T J = -40 °C to 125 °C, V OUT = 1.2 V95µV RMSSVRSupply voltage rejection V IN = V OUTNOM +1 V+/-V RIPPLE, V RIPPLE = 0.2 V,IOUT = 1 mA, C OUT = 10 µFf = 1 kHz 45dBT J = -40 °C to 125 °C f = 100 kHz62I QQuiescent currentI OUT = 0 mA to 85 mA, T J = -40 °C to 125 °C5.5µAI OUT = 0 mA to 85 mA, V IN = 24 V T J = -40 °C to 125 °C6.5I SC Short-circuit current V OUT = 0, T J = -40 °C to 125 °C V IN = 3.8 V120mA T ON Turn-on time (3)V IN = 4.2 V, C OUT = 10 µF, I OUT = 60 mA, T J = -40 °C to 125 °C 0.7ms C OUTOutput capacitorCapacitance f = 100 kHz0.47µF1.For V OUT(NOM) < 2 V, V IN =2.5 V.2.Guaranteed by design.3.Turn-on time is time measured between the input just exceeding 90% of its final value and the output voltage just reaching95% of its nominal value.ST715Electrical characteristics T J = 25 °C, V IN = V OUT(NOM) + 1 V, C IN = 0.1 µF, C OUT = 1 µF, I OUT = 1 mA, V OUT = 3.3 Vunless otherwise specified.(1)Table 7. Electrical characteristics - fixed versionSymbol Parameter Test conditions Min.Typ.Max.UnitV IN Operating input voltage I OUT = 85 mA, T J = -40 °C to 125 °CV OUT+V DROP24VI OUT Output current V IN = 4.3 to 24 V, T J = -40 °C to 125 °C085mAV OUT V OUT total accuracy (1)V IN = V OUT+1 to 24 V, I OUT = 0 to 85 mA,T J = -40 °C to 125 °C-5+5%∆V OUT Line regulation V IN = 4.3 to 24 V, I OUT = 1 mA,T J = -40 °C to 125 °C0.0010.004%/V∆V OUT Load regulation I OUT =100 µA to 85 mA,T J = -40 °C to 125 °C0.0020.003%/mAV DROP Dropout voltage(2)I OUT = 85 mA, T J= -40 °C to 125 °C5001000mVe N Output noise voltage(3)200 Hz to 100 kHz, I OUT = 50 mA,C OUT=10 µF, T J = -40 °C to 125 °C210µV RMSSVR Supply voltage rejection V IN = V OUTNOM+1 V+/-V RIPPLE, V RIPPLE = 0.2 V,I OUT = 1 mA, C OUT =10 µFf = 1 kHz38dB T J = -40 °C to 125 °C f = 100 kHz57I Q Quiescent current I OUT=0 mA to 85 mA,T J = -40 °C to 125 °C3.75 5.5µAV IN=24 V 4.15 6.5I SC Short-circuit current V OUT = 0, T J =-40 °C to 125 °C V IN = 3.8 V120mAT ON Turn-on time (4)V IN = 4.2 V, C OUT = 10 µF, I OUT = 60 mA,T J = -40 °C to 125 °C0.7msC OUT Output capacitor Capacitance f = 100 kHz0.47µF1.For V OUT(NOM) < 2 V, V IN =2.5 V.2.Dropout voltage is the input-to-output voltage difference at which the output voltage is 100 mV below its nominal value. Thisspecification does not apply to output voltages below 2 V.3.Guaranteed by design.4.Turn-on time is time measured between the input just exceeding 90% of its final value and the output voltage just reaching95% of its nominal value.DocID14414 Rev 157/24Output voltage selection for adjustable version ST715 5 Output voltage selection for adjustable versionThe ST715 features an adjustable output voltage due to two external resistors connected asa voltage divider to the FB pin as shown in Figure4. The output voltage is set by thefollowing equation:Equation 1V OUT = V FB (1 + R1/R2)where typically V FB = 1.2 V. Choose R2≥ 5 kΩ to optimize the quiescent current, accuracy,and high-frequency power supply rejection. The resistor selection is given by the followingequation:Equation 2R1 = R2 x (V OUT/V FB - 1)5.1 External capacitor requirementsA 0.1 µF or a larger input bypass capacitor, connected between IN and GND and locatedclose to the device, is recommended. In this manner, the transient response and noiserejection of the power supply, as a whole, improve. A higher value of the input capacitor maybe necessary if large, fast-rise-time load transients are present in the application and if thedevice is several inches far from the power source.The ST715 requires an output capacitor connected between OUT and GND to stabilize theinternal control loop. Any capacitor, (including ceramic and tantalum) with a value higherthan 0.47 µF, stabilizes this loop.5.2 Power dissipation and junction temperatureFor a reliable operation, junction temperature should not exceed 125 °C. This limits thepower dissipation the regulator can handle in any application. To guarantee that the junctiontemperature is within acceptable limits, calculate the maximum allowable dissipation,P D(max), and the dissipation, P D, which must be less than or equal to P D(max).The maximum power dissipation limit is given by the following equation:Equation 3P D(max) = (T JMAX - T A) / R thJAwhere:T JMAX is the maximum allowable junction temperatureR thJA is the thermal resistance junction-to-ambient for the packageT A is the ambient temperatureThe regulator dissipation is calculated by the following equation:8/24DocID14414 Rev 15ST715Output voltage selection for adjustable versionEquation 4P D = (V IN - V OUT) x I OUTPower dissipation coming from quiescent current is negligible.The ST715 features the internal current limit. During normal operation, it limits the outputcurrent to approximately 350 mA. When the current limit engages, the output voltage scalesback linearly until the overcurrent condition ends. Do not exceed the power dissipationratings of the package.DocID14414 Rev 159/24Typical application ST71510/24DocID14414 Rev 156 Typical applicationFigure 4. Application circuit for fixed versionFigure 5. Application circuit for adjustable version7 Typical performance characteristicsDocID14414 Rev 1511/2412/24DocID14414 Rev 15Figure 13. Line transient C OUT =1µF; V IN =V EN =from 4.3 to 22V; I OUT =1mA; t R =t F =5µs Figure 14. Enable transientC IN = C OUT =1µF, V EN =V IN =0 to 4.3V, I OUT =1mA8 Package mechanical dataIn order to meet environmental requirements, ST offers these devices in different grades ofECOPACK packages, depending on their level of environmental compliance. ECOPACKspecifications, grade definitions and product status are available at: .ECOPACK is an ST trademark.DocID14414 Rev 1513/24Table 8. SOT23-5L mechanical datammDim.Min.Typ.Max.A0.90 1.45A100.15A20.90 1.30b0.300.50c 2.090.20D 2.95E 1.60e0.95H 2.80L0.300.60q0814/24DocID14414 Rev 15DocID14414 Rev 1515/24Table 9. SOT323-5L mechanical datammDim.Min.Typ.Max.A0.80 1.10A100.10A20.800.901b0.150.30c0.100.22D 1.802 2.20E 1.80 2.10 2.40E1 1.15 1.25 1.35e0.65e1 1.30L0.260.360.46<0°8°16/24DocID14414 Rev 15DocID14414 Rev 1517/24Table 10. DFN8 (3x3 mm) mechanical datammDim.Min.Typ.Max.A0.800.90 1.00A100.020.05A30.20b0.250.300.35D 2.853 3.15D2 1.603 1.753 1.853E 2.853 3.15E2 1.345 1.495 1.595e0.65L0.300.400.50 18/24DocID14414 Rev 15DocID14414 Rev 1519/249 Packaging mechanical data20/24DocID14414 Rev 15Table 11. SOT23-5L tape and reel mechanical datammDim.Min.Typ.Max.A180C12.813.013.2D20.2N60T14.4Ao 3.13 3.23 3.33Bo 3.07 3.17 3.27Ko 1.27 1.37 1.47Po 3.9 4.0 4.1P 3.9 4.0 4.1Table 12. SOT323-xL tape and reel mechanical datammDim.Min.Typ.Max.A175180185C12.81313.2D20.2N59.56060.5T14.4Ao 2.25Bo 3.17Ko 1.2Po 3.9 4.0 4.1P 3.9 4.0 4.2DocID14414 Rev 1521/24Table 13. DFN8 (3x3 mm) tape and reel mechanical datammDim.Min.Typ.Max.A180C12.813.2D20.2N60T14.4Ao 3.3Bo 3.3Ko 1.1Po4P822/24DocID14414 Rev 15ST715Revision history 10 Revision historyTable 14. Document revision historyDate Revision Changes08-Feb-20081Initial release.19-Feb-20082Modified: Features on page 1.22-Sep-20083Modified: DFN8 (3x3 mm) mechanical data 10 on page 23.26-Nov-20084Modified: Section 5 on page 8.24-Mar-20105Modified: Table 4 on page 5.24-Mar-20106Modified: I Q max values Table 6 on page 6 and Table 7 on page 7.20-May-20107Modified: Table 2 and Table 4 on page 4.28-Jan-20148Part numbers ST715xx, ST715xx25, ST715xx33 changed to ST715.Added package DFN8 (3 x 3 mm).Updated the title, the features and the description in cover page.Updated Section 1: Diagram, Section 2: Pin configuration, Section 3: Maximum ratings, Section 4: Electrical characteristics and Section 8: Package mechanical data.Added Section 9: Packaging mechanical data.Minor text changes.21-May-20149Updated Section 8: Package mechanical data. Minor text changes.26-Sep-201410Updated Table 2: Pin description (DFN8 3x3 mm) and Table 3: Pin description (SOT23-5L/SOT323-5L).Updated Figure 9: COUT stability region.Minor text changes.15-Oct-201411Updated Table 6 on page 6 and Table 7 on page 7. Minor text changes.08-Jan-201812Updated Table 6: Electrical characteristics - adjustable version.06-Jul-201813Added new order code ST715C50R on Table 1: Device summary.06-Apr-202014Updated Table 2: Pin description (DFN8 3x3 mm).12-Oct-202015Added new order code ST715CR in Table1 on the cover page.DocID14414 Rev 1523/24ST715IMPORTANT NOTICE – PLEASE READ CAREFULLYSTMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.No license, express or implied, to any intellectual property right is granted by ST herein.Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to /trademarks. All other product or service names are the property of their respective owners.Information in this document supersedes and replaces information previously supplied in any prior versions of this document.© 2020 STMicroelectronics – All rights reserved24/24DocID14414 Rev 15ST715CR。

744710215;中文规格书,Datasheet资料

5.1 5.0 4.02012-06-272012-05-022009-06-30SStSStRStSStCZWürth Elektronik eiSos GmbH & Co. KGEMC & Inductive SolutionsMax-Eyth-Str. 174638 WaldenburgGermanyTel. +49 (0) 79 42 945 - 0A Dimensions: [mm]F Typical Impedance Characteristics:H4: Classification Wave Soldering Profile:H5: Classification Wave ProfileProfile FeaturePreheat- Temperature Min (T smin )- Temperature Typical (T stypical ) - Temperature Max (T smax ) - Time (t s ) from (T smin to T smax )Δ preheat to max Temperature Peak temperature (T p )Time of actual peak temperature (t p )Ramp-down rate - Min - Typical - MaxTime 25°C to 25°C Pb-Free Assembly 100°C 120°C 130°C 70 seconds 150°C max.250°C - 260°C max. 10 secondsmax. 5 second each wave ~ 2 K/s ~ 3.5 K/s ~ 5 K/s 4 minutesSn-Pb Assembly 100°C 120°C 130°C 70 seconds 150°C max.235°C - 260°C max. 10 secondsmax. 5 second each wave ~ 2 K/s ~ 3.5 K/s ~ 5 K/s 4 minutesrefer to EN 61760-1:2006H Soldering Specifications:I Cautions and Warnings:The following conditions apply to all goods within the product series of WE-SDof Würth Elektronik eiSos GmbH & Co. KG:General:All recommendations according to the general technical specifications of the data-sheet have to be complied with.The disposal and operation of the product within ambient conditions which probably alloy or harm the wire isolation has to be avoided.If the product is potted in customer applications, the potting material might shrink during and after hardening. Accordingly to this the product is exposed to the pressure of the potting material with the effect that the core, wire and termination is possibly damaged by this pressure and so the electrical as well as the mechanical characteristics are endanger to be affected. After the potting material is cured, the core, wire and termination of the product have to be checked if any reduced electrical or mechanical functions or destructions have occurred.The responsibility for the applicability of customer specific products and use in a particular customer design is always within the authority of the customer. All technical specifications for standard products do also apply for customer specific products.Washing varnish agent that is used during the production to clean the application might damage or change the characteristics of the wire in-sulation, the marking or the plating. The washing varnish agent could have a negative effect on the long turn function of the product.Direct mechanical impact to the product shall be prevented as the ferrite material of the core could flake or in the worst case it could break. Product specific:Follow all instructions mentioned in the datasheet, especially:•The solder profile has to be complied with according to the technical wave soldering specification, otherwise no warranty will be sustai-ned.•All products are supposed to be used before the end of the period of 12 months based on the product date-code, if not a 100% solderabi-lity can´t be warranted.•Violation of the technical product specifications such as exceeding the nominal rated current will result in the loss of warranty.1. General Customer ResponsibilitySome goods within the product range of Würth Elektronik eiSos GmbH & Co. KG contain statements regarding general suitability for certain application areas. These statements about suitability are based on our knowledge and experience of typical requirements concerning the are-as, serve as general guidance and cannot be estimated as binding statements about the suitability for a customer application. The responsibi-lity for the applicability and use in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate, where appropriate to investigate and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not.2. Customer Responsibility related to Specific, in particular Safety-Relevant ApplicationsIt has to be clearly pointed out that the possibility of a malfunction of electronic components or failure before the end of the usual lifetime can-not be completely eliminated in the current state of the art, even if the products are operated within the range of the specifications.In certain customer applications requiring a very high level of safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health it must be ensured by most advanced technological aid of suitable design of the customer application that no injury or damage is caused to third parties in the event of malfunction or failure of an electronic component.3. Best Care and AttentionAny product-specific notes, warnings and cautions must be strictly observed.4. Customer Support for Product SpecificationsSome products within the product range may contain substances which are subject to restrictions in certain jurisdictions in order to serve spe-cific technical requirements. Necessary information is available on request. In this case the field sales engineer or the internal sales person in charge should be contacted who will be happy to support in this matter.5. Product R&DDue to constant product improvement product specifications may change from time to time. As a standard reporting procedure of the Product Change Notification (PCN) according to the JEDEC-Standard inform about minor and major changes. In case of further queries regarding the PCN, the field sales engineer or the internal sales person in charge should be contacted. The basic responsibility of the customer as per Secti-on 1 and 2 remains unaffected.6. Product Life CycleDue to technical progress and economical evaluation we also reserve the right to discontinue production and delivery of products. As a stan-dard reporting procedure of the Product Termination Notification (PTN) according to the JEDEC-Standard we will inform at an early stage about inevitable product discontinuance. According to this we cannot guarantee that all products within our product range will always be available. Therefore it needs to be verified with the field sales engineer or the internal sales person in charge about the current product availability ex-pectancy before or when the product for application design-in disposal is considered.The approach named above does not apply in the case of individual agreements deviating from the foregoing for customer-specific products.7. Property RightsAll the rights for contractual products produced by Würth Elektronik eiSos GmbH & Co. KG on the basis of ideas, development contracts as well as models or templates that are subject to copyright, patent or commercial protection supplied to the customer will remain with Würth Elektronik eiSos GmbH & Co. KG.8. General Terms and ConditionsUnless otherwise agreed in individual contracts, all orders are subject to the current version of the “General Terms and Conditions of Würth Elektronik eiSos Group”, last version available at .J Important Notes:The following conditions apply to all goods within the product range of Würth Elektronik eiSos GmbH & Co. KG:分销商库存信息: WURTH-ELECTRONICS 744710215。

TPS-1,TPS-10,TPS-15,TPS-20,TPS-25,TPS-3,TPS-30,TPS-35, 规格书,Datasheet 资料

Catalog Symbol: TPS DC Power Distribution Fuses Ampere Rating: 1 to 70A Voltage Rating: 170VdcInterrupting Rating: 100,000A Agency Information:UL Recognized, File E56412, Guide JFHR2Catalog NumbersTPS-1TPS-6TPS-25L TPS-50TPS-1L TPS-6L TPS-25V TPS-50L TPS-1LB TPS-10TPS-30TPS-50V TPS-2TPS-10L TPS-30L TPS-60TPS-2L TPS-15TPS-35TPS-60L TPS-3TPS-15L TPS-35L TPS-70TPS-3L TPS-20TPS-40TPS-70L TPS-5TPS-20L TPS-40L TPS-70LBTPS-5LTPS-25TPS-40V—1 to 70 Amps,170 Volts DCGeneral Information:•TELPOWER ®fuses bring modern power fuse design to the telecommunications industry.•TELPOWER ®fuse line is the first to be specifically designed to meet the unique needs of DC Power Distribution Systems.•The U.L. Recognized ratings of 170Vdc and 100,000A interrupting rating along with the fuse’s current-limiting capability make this fuse ideal for overcurrent protection on existing DC Distribution Systems.• A unique BLUE label is used on all TELPOWER ®fuses to designate their DC capability.•Circuit board applications available.•Silver-plated brass ferrules.•Glass melamine tube.•For use with Bussmann Fused Disconnect Switch 15800.•Spare Fuseholder: TPSFH-AS.88• (± .015).56• (± .002)Dimensional Data TPS-(AMP)Custom Designs•Printed circuit board variations available.Form No. TPS Page 1 of 2Data Sheet: 50094-23-03SB03090芯天下--/1 to 70 Amps,170 V olts DCTime-Current Characteristic CurveThe only controlled copy of this Data Sheet is the electronic read-only version located on the Bussmann Network Drive. All other copies of this Data Sheet are by definition uncontrolled. This bulletin is intended to clearly present comprehensive product data and provide technical information that will help the end user with design applications. Bussmann reserves the right, without notice, to change design or construction of any products and to discontinue or limit distribution of any products. Bussmann also reserves the right to change or update, without notice, any technical information contained in this bulletin. Once a product has been selected, it should be tested by the user in all possible applications.Form No. TPSPage 2 of 2Data Sheet: 5009 4-23-03SB03090芯天下--/。

TPS71550中文资料

TOKO TK715xxAS Data Sheet

查询TK71515AS供应商TK715xxASTK715xxASABSOLUTE MAXIMUM RATINGS (V OUT £ 5.0 V)Supply Voltage .............................................-0.4 to 19 V Power Dissipation (Note 1)................................400 mW Reverse Bias.............................................................8 V Short Circuit Current...........................................170 mA Storage Temperature (Ambient)..............-55 to +150 °COperating Temperature (Ambient)............-30 to +80 °C Max. Operating Temperature (Junction).............125 °C Operating Voltage Range...........................1.8 to 18.0 V Junction Temperature .........................................150 °C Lead Soldering Temperature (10 s).....................235 °CTK715xx ELECTRICAL CHARACTERISTICS (V OUT £ 5.0 V)Test conditions: V IN = V OUT(TYP) + 1V, T A = 25 °C, unless otherwise specified.Note 1: Power dissipation is 400 mW when mounted as recommended. Derate at 3.2 mW/°C for operation above 25 °C.Note 2: Refer to “Definition of Terms.”Note 3: Please refer to the Applications Section for more information.Note 4: Ripple rejection is measured at V R = 200 mVrms, V IN = V OUT(TYP) + 2 V, I OUT = 10 mA, C L = 2.2 µF, f = 100 Hz.Note 5: The minimum operating voltage for V IN can be 1.8 V. Also, the minimum voltage required for V IN is V IN = V DROP + V OUT . As a result, operating at V OUT £ 2.0 V at the minimum input operating voltage is not preferred.Gen. Note: Parameters with min. or max. values are 100% tested at T A = 25 °C.L O B M Y S R E T E M A R A P SN O I T I D N O C T S E T N I M P Y T X A M S T I N U I Q t n e r r u C t n e c s e i u Q I T U O A m 0=5254A µI D N G t n e r r u C n i P d n u o r G I T U O A m 51=003005A µV T U O e g a t l o V t u p t u O I T U O Am 5=1e l b a T e e S Vg e R e n i L n o i t a l u g e R e n i L V N I V =)P Y T (T U O V o t V 1+)P Y T (T U O V 6+321V m ge R d a o L no i t a l u g e R d a o L I T U O )2e t o N (,A m 001o t 5=8163V m V PO R D )5e t o N (e g a t l o V t u o p o r D I T U O Am 05=501.081.0V I T U O V 4.2,A m 001=£V T U O £V 0.561.082.0V I T U O V 1.2,A m 001=£V T U O £V4.261.003.0V I )X A M (T U O t n e r r u C t u p t u O s u o u n i t n o C 511551A m 8.1V £V n i £)3e t o N (V 1.20709RR no i t c e j e R e l p p i R )4e t o N (06B d ∆V T U O /∆T tn e i c i f f e o C e r u t a r e p m e T I T U O Am 5=03C°/m p pTK715xxASABSOLUTE MAXIMUM RATINGS (V OUT ³ 5.1 V)Supply Voltage .............................................-0.4 to 19 V Power Dissipation (Note 1)................................400 mW Reverse Bias.............................................................8 V Short Circuit Current...........................................170 mA Storage Temperature (Ambient)..............-55 to +150 °COperating Temperature (Ambient)............-30 to +80 °C Max. Operating Temperature (Junction).............125 °C Operating Voltage Range..............................1.8 to 18 V Junction Temperature .........................................150 °C Lead Soldering Temperature (10 s).....................235 °CTK715xx ELECTRICAL CHARACTERISTICS (V OUT ³ 5.1 V)Test conditions: V IN = V OUT(TYP) + 1V, T A = 25 °C, unless otherwise specified.Note 1: Power dissipation is 400 mW when mounted as recommended. Derate at 3.2 mW/°C for operation above 25 °C.Note 2: Refer to “Definition of Terms.”Note 3: Ripple rejection is measured at V R = 200 mVrms, V IN = V OUT(TYP) + 2 V, I OUT = 10 mA, C L = 2.2 µF, f = 100 Hz.Gen. Note: Parameters with min. or max. values are 100% tested at T A = 25 °C.L O B M Y S RE T E M A R A P S N O I T I D N O C T S E T N I M P Y T X A M S T I N U I Q t n e r r u C t n e c s e i u Q I T U O A m 0=2306A µI D N G t n e r r u C n i P d n u o r G I T U O A m 51=003005A µV T U O e g a t l o V t u p t u O I T U O Am 5=1e l b a T e e S Vg e R e n i L n o i t a l u g e R e n i L V N I V =)P Y T (T U O ot V 1+V )P Y T (T U O V 81x a M r o V 6+321V m g e R d a o L n o i t a l u g e R d a o L I T U O )2e t o N (,A m 001o t 5=5308V m V P O R D eg a t l o V t u o p o r D I T U O A m 05=501.081.0V I T U O Am 001=061.082.0V I )X A M (T U O t n e r r u C t u p t u O s u o u n i t n o C 511551A m R R n o i t c e j e R e l p p i R )3e t o N (06B d ∆V T U O /∆Ttn e i c i f f e o C e r u t a r e p m e T I T U O Am 5=03C°/m p pTK715xxASTK715xxAS ELECTRICAL CHARACTERISTICS TABLE 1Output Voltage VOUT(MIN)VOUT(MAX)TestVoltage Code Voltage 1.5 V15 1.440 V 1.560 V 2.5 V 1.6 V16 1.540 V 1.660 V 2.6 V 1.7 V17 1.640 V 1.760 V 2.7 V 1.8 V18 1.740 V 1.860 V 2.8 V1.9 V19 1.840 V 1.960 V2.9 V2.0 V20 1.940 V 2.060 V3.0 V 2.1 V21 2.040 V 2.160 V 3.1 V 2.2 V22 2.140 V 2.260 V 3.2 V 2.3 V23 2.240 V 2.360 V 3.3 V 2.4 V24 2.340 V 2.460 V 3.4 V 2.5 V25 2.440 V 2.560 V 3.5 V 2.6 V26 2.540 V 2.660 V 3.6 V 2.7 V27 2.640 V 2.760 V 3.7 V 2.8 V28 2.740 V 2.860 V 3.8 V2.9 V29 2.840 V 2.960 V3.9 V3.0 V30 2.940 V 3.060 V4.0 V 3.1 V31 3.040 V 3.160 V 4.1 V 3.2 V32 3.140 V 3.260 V 4.2 V 3.3 V33 3.240 V 3.360 V 4.3 V 3.4 V34 3.340 V 3.460 V 4.4 V Output Voltage VOUT(MIN)VOUT(MAX)Test Voltage Code Voltage 3.5 V35 3.440 V 3.560 V 4.5 V 3.6 V36 3.530 V 3.670 V 4.6 V 3.7 V37 3.630 V 3.770 V 4.7 V 3.8 V38 3.730 V 3.870 V 4.8 V3.9 V39 3.830 V 3.970 V4.9 V4.0 V40 3.930 V 4.070 V5.0 V 4.1 V41 4.030 V 4.170 V 5.1 V 4.2 V42 4.130 V 4.270 V 5.2 V 4.3 V43 4.230 V 4.370 V 5.3 V 4.4 V44 4.330 V 4.470 V 5.4 V 4.5 V45 4.430 V 4.570 V 5.5 V 4.6 V46 4.530 V 4.670 V 5.6 V 4.7 V47 4.630 V 4.770 V 5.7 V 4.8 V48 4.730 V 4.870 V 5.8 V4.9 V49 4.830 V 4.970 V5.9 V5.0 V50 4.930 V 5.070 V6.0 V6.0 V60 5.880 V 6.120 V7.0 V7.0 V70 6.860 V7.140 V8.0 V8.0 V807.840 V8.160 V9.0 V9.0 V908.820 V9.180 V10.0 VTK715xxASTK715xxASTYPICAL PERFORMANCE CHARACTERISTICS (CONT.)T A = 25 °C, unless otherwise specified.Ripple RejectionV D R O P (m V )-100DROPOUT VOLTAGE VS.I OUT (mA)-2000 50 100V D R O P (m V )100250DROPOUT VOLTAGE VS.T A (°C)50-50 0 50 1002001500I G N D (µA )200500GROUND PIN CURRENT vs.I OUT (mA)1000 5 10 154003000I G ND (m A )25GROUND PIN CURRENT vs.OUTPUT CURRENTI OUT (mA)10 20 40 60 80 100430∆V O U T (m V )-10OUTPUT VOLTAGE VS.T A (°C)-20-50 0 50 10010020-30I O U T (m A )MAX OUTPUT CURRENTT A (°C)-50 0 50 100L GNDRIPPLE REJECTION CIRCUITd B0.01 0.1 1 10 100 1000-1000-90-80-70-60-50-40-30-20-10 F (kHz)TK715xxASTK715xxASDEFINITION AND EXPLANATION OF TECHNICAL TERMSOUTPUT VOLTAGE (VOUT)The output voltage is specified with VIN = (VOUT(TYP)+ 1 V)and IOUT= 5 mA.DROPOUT VOLTAGE (VDROP)The dropout voltage is the difference between the input voltage and the output voltage at which point the regulator starts to fall out of regulation. Below this value, the output voltage will fall as the input voltage is reduced. It is dependent upon the load current and the junction tempera-ture.CONTINUOUS OUTPUT CURRENT (IOUT)Normal operating output current. This is limited by pack-age power dissipation.LINE REGULATION (Line Reg)Line regulation is the ability of the regulator to maintain a constant output voltage as the input voltage changes. The line regulation is specified as the input voltage is changedfrom VIN = VOUT(TYP)+ 1 V to VIN= VOUT(TYP)+ 6 V or VIN=max 18 V.LOAD REGULATION (Load Reg)Load regulation is the ability of the regulator to maintain a constant output voltage as the load current changes. It is a pulsed measurement to minimize temperature effectswith the input voltage set to VIN = VOUT(TYP)+1 V. The loadregulation is specified under the output current step con-dition 5 mA to 100 mA.QUIESCENT CURRENT (IQ)The quiescent current is the current which flows throughthe ground terminal under no load conditions (IOUT= 0 mA).GROUND CURRENT (IGND)Ground current is the current which flows through theground pin(s). It is defined as IIN - IOUT, excluding controlcurrent.RIPPLE REJECTION RATIO (RR)Ripple rejection is the ability of the regulator to attenuate the ripple content of the input voltage at the output. It is specified with 200 mVrms, 100 Hz superimposed on the input voltage, where VIN= VOUT(TYP)+ 2.0 V. The output decoupling capacitor is set to 2.2 µF and the load current is set to 10 mA. Ripple rejection is the ratio of the ripple content of the output vs. the input and is expressed in dB. REVERSE VOLTAGE PROTECTIONReverse voltage protection prevents damage due to the output voltage being higher than the input voltage. This fault condition can occur when the output capacitor re-mains charged and the input is reduced to zero, or when an external voltage higher than the input voltage is applied to the output side.REDUCTION OF OUTPUT NOISEAlthough the architecture of the Toko regulators are de-signed to minimize semiconductor noise, further reduction can be achieved by the selection of external components. The obvious solution is to increase the size of the output capacitor. Please note that several parameters are af-fected by the value of the capacitors and bench testing is recommended when deviating from standard values.PACKAGE POWER DISSIPATION (PD)This is the power dissipation level at which the thermal sensor is activated. The IC contains an internal thermal sensor which monitors the junction temperature. When the junction temperature exceeds the monitor threshold of 150 °C, the IC is shut down. The junction temperaturerises as the difference between the input power (VINx IIN)and the output power (VOUTx IOUT) increases. The rate of temperature rise is greatly affected by the mounting pad configuration on the PCB, the board material, and the ambient temperature. When the IC mounting has good thermal conductivity, the junction temperature will be low even if the power dissipation is great. When mounted on the recommended mounting pad, the power dissipation of the SOT23-3 is increased to 400 mW. For operation at ambient temperatures over 25 °C, the power dissipation of the SOT23-3 device should be derated at 3.2 mW/°C. ToTK715xxASTK715xxASAPPLICATION INFORMATIONINPUT-OUTPUT CAPACITORSLinear regulators require input and output capacitors in order to maintain regulator loop stability. The output capacitor should be selected within the Equivalent Series Resistance (ESR) range as shown in the graphs below for stable operation. The output capacitor C L can be reduced as the output voltage is increased. However, the output noise will increase as C L is reduced, so the largest value of C L possilbe is recommended (C L = 4.7 m F or more).Note: It is very important to check the selected manufacturers electrical characteristics (capacitance and ESR) over temperature.Range which can be used:OUT OUT ³ 0.1 m F (CERAMIC CAP 0.22 m F + 2.2WCapacitor used for evaluation: V OUT ³ 1.5V I OUT = 1 mA ~ Max, TANTALUM CAP. ³ 0.22 m F (CERAMIC CAP 0.22m F + 2.2W V OUT ³ 2.8V I OUT = 1 mA ~ Max, MULTI LAYER CERAMIC CAP. ³ 0.68 m FV OUT ³ 2.0V I OUT = 1 mA ~ Max, MULTI LAYER CERAMIC CAP. ³ 1.0 m F V OUT ³ 1.5V I OUT = 1 mA ~ Max, MULTI LAYER CERAMIC CAP. ³ 4.7 m FΩ0.68 µF ≤ C L ≤ 4.7 µF or More0.1 µF ≤ C ≤ 0.22 µF or MoreMULTI LAYER CERAMIC CAPI OUT (mA)1.61.51.82.02.22.42.60 20 40 60 80 100Stable area isabove the line UNSTABLE AREA UNDER AND TO THE LEFT3.3 µF 2.2 µF 1.0 µF 1.61.51.82.00 20 40 60 80 1000.1 µFMarch 2001 TOKO, Inc.Page 11Page 12March 2001 TOKO, Inc.In general, a ceramic capacitor has a voltage and temperature dependence. Parts should be selected with consideration of the voltage and temperature used. The “B ” characteristic curves are recommended.APPLICATION INFORMATION (CONT)VOLTAGE DEPENDENCY1005040C A P A C I T A N C E (%)0 2 4 6 8 10BIAS V (V)TEMPERATURE DEPENDENCY10090706050C A P A C I TA N C E (%)T A (°C)R(*) MAG -17.98 dB 10 dB/ -50.00 dB B(*) B -41.05 dB 10 dB/ -50.00 dB START: 100 Hz STOP: 1 MHzOUT (B): -20.00 dBm ST: AUTO x1 1 M ΩIRG: 26 dBm RBW: 30 kHZ VBW: 38 kHzR(*) MAG -57.78 dB 10 dB/ -50.00 dB B(*) B -41.05 dB 10 dB/ -50.00 dBSTART: 100 Hz STOP: 1 MHzOUT (B): -20.00 dBm ST: AUTO x1 1 M ΩIRG: 26 dBm RBW: 30 kHZ VBW: 38 kHz++March 2001 TOKO, Inc.Page 13Page 14March 2001 TOKO, Inc.REVERSE VOLTAGE PROTECTIONThe internal reverse bias protection eliminates the require-ment for a reverse voltage protection diode. This saves both cost and board space.Another reverse voltage protection technique is illustrated below. The extra diode and extra capacitor are not neces-sary with the TK715xxA. The high output voltage accuracy is maintained because the diode forward voltage varia-tions over temperature and load current have been elimi-nated.PARALLEL OPERATIONThe series resistor R is put in the input line of the low output voltage regulator in order to prevent overdissipation. The voltage dropped across the resistor reduces the large input-to-output voltage across the regulator, reducing the power dissipation in the device.APPLICATION INFORMATION (CONT.)SWITCHING OPERATIONEven though the input voltages or the output voltages are different, the outputs of the TK715xxA regulators can be connected together, and the output voltages switched. If two or more TK715xxA regulators are turned ON simulta-neously, the highest output voltage will be present.CURRENT BOOST OPERATIONThe output current can be increased by connecting an external PNP transistor as shown below. The output current capability depends upon the H fe of the external transistor. Note: The TK715xxA internal short circuit pro-tection and thermal sensor do not protect the external transistor.VOUT V INV INV INV OUTMarch 2001 TOKO, Inc.Page 15Printed in the USA© 1999 Toko, Inc.All Rights ReservedIC-xxx-TK715xx 0798O0.0K。

LT1175_datasheet

捷多邦，您值得信赖的PCB打样专家！LT1175LT11751175fdELECTRICAL CHARACTERISTICSThe ● denotes specifications which apply over the operating temperaturerange, otherwise specifications are at T A = 25°C. V OUT = 5V, V IN = 7V, I OUT = 0, V SHDN = 3V, I LIM2 and I LIM4 tied to V IN , T J = 25°C,unless otherwise noted. To avoid confusion with “min” and “max” as applied to negative voltages, all voltages are shown as absolute values except where polarity is not obvious.GND Pin Current Increase with Load (Note 4)●1020µA/mAInput Supply Current in Shutdown V SHDN = 0V1020µA ●25µA Shutdown Thresholds (Note 9)Either Polarity On SHDN Pin●0.82.5V SHDN Pin Current (Note 2)V SHDN = 0V to 10V (Flows Into Pin)●48µA V SHDN = –15V to 0V (Flows Into Pin)14µA Output Bleed Current in Shutdown (Note 6)V OUT = 0V, V IN = 15V0.11µA ●15µA SENSE Pin Input Current (Adjustable Part Only, Current Flows Out of Pin)●75150nA (Fixed Voltage Only, Current Flows Out of Pin)●1220µA Dropout Voltage (Note 7)I OUT = 25mA ●0.10.2V I OUT = 100mA ●0.180.26V I OUT = 500mA●0.50.7V I LIM2 Open, I OUT = 300mA ●0.330.5V I LIM4 Open, I OUT = 200mA●0.30.45V I LIM2, I LIM4 Open, I OUT = 100mA ●0.260.45V Current Limit (Note 11)V IN – V OUT = 1V to 12V ●5208001300mA I LIM2 Open ●390600975mA I LIM4 Open●260400650mA I LIM2, I LIM4 Open●130200325mA Line Regulation (Note 10)V IN – V OUT = 1V to V IN = 20V ●0.0030.015%/V Load Regulation (Note 5, 10)I OUT = 0mA to 500mA ●0.10.35%Thermal RegulationP = 0 to P MAX (Notes 3, 8)5-Pin Packages0.040.1%/W 8-Pin Packages0.10.2%/W Output Voltage Temperature DriftT J = 25°C to T JMIN , or 25°C to T JMAX0.251.25%PARAMETERCONDITIONSMIN TYP MAX UNITS V IN and V OUT . For currents between 100mA and 500mA, with both I LIM pins tied to V IN , maximum dropout can be calculated from V DO = 0.15 + 1.1Ω (I OUT ).Note 8: Thermal regulation is a change in the output voltage caused by die temperature gradients, so it is proportional to chip power dissipation.Temperature gradients reach final value in less than 100ms. Outputvoltage changes after 100ms are due to absolute die temperature changes and reference voltage temperature coefficient.Note 9: The lower limit of 0.8V is guaranteed to keep the regulator in shutdown. The upper limit of 2.5V is guaranteed to keep the regulator active. Either polarity may be used, referenced to GND pin.Note 10: Load and line regulation are measured on a pulse basis with pulse width of 20ms or less to keep chip temperature constant. DC regulation will be affected by thermal regulation (Note 8) and chiptemperature changes. Load regulation specification also holds for currents up to the specified current limit when I LIM2 or I LIM4 are left open.Note 11: Current limit is reduced for input-to-output voltage above 12V.See the graph in Typical Performance Characteristics for guaranteed limits above 12V.Note 12: Operating at very large input-to-output differential voltages(>15V) with load currents less than 5mA requires an output capacitor with an ESR greater than 1Ω to prevent low level output oscillations.Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.Note 2: SHDN pin maximum positive voltage is 30V with respect to–V IN and 13.5V with respect to GND. Maximum negative voltage is –20V with respect to GND and –5V with respect to –V IN .Note 3: P MAX = 1.5W for 8-pin packages, and 6W for 5-pin packages. This power level holds only for input-to-output voltages up to 12V, beyond which internal power limiting may reduce power. See Guaranteed Current Limit curve in Typical Performance Characteristics section. Note that all conditions must be met.Note 4: GND pin current increases because of power transistor base drive.At low input-to-output voltages (< 1V) where the power transistor is in saturation, GND pin current will be slightly higher. See Typical Performance Characteristics.Note 5: With I LOAD = 0, at T J > 125°C, power transistor leakage couldincrease higher than the 10µA to 25µA drawn by the output divider or fixed voltage SENSE pin, causing the output to rise above the regulated value.To prevent this condition, an internal active pull-up will automatically turn on, but supply current will increase.Note 6: This is the current required to pull the output voltage to within 1V of ground during shutdown.Note 7: Dropout voltage is measured by setting the input voltage equal to the normal regulated output voltage and measuring the difference betweenLT1175LT1175LT1175LT11751175fdAPPLICATIO S I FOR ATIO W UU U during a “shorting out” surge, only during a “charge up”surge.The output capacitor should be located within several inches of the regulator. If remote sensing is used, the output capacitor can be located at the remote sense node,but the GND pin of the regulator should also be connected to the remote site. The basic rule is to keep SENSE and GND pins close to the output capacitor, regardless of where it is.Operating at very large input-to-output differential volt-ages (>5V) with load currents less than 5mA requires an output capacitor with an ESR greater than 1Ω to prevent low level output oscillations.Input CapacitorThe LT1175 requires a separate input bypass capacitor only if the regulator is located more than six inches from the raw supply output capacitor. A 1µF or larger tantalum capacitor is suggested for all applications, but if low ESR capacitors such as ceramic or film are used for the output and input capacitors, the input capacitor should be at least three times the value of the output capacitor. If a solid tantalum or aluminum electrolytic output capacitor is used, the input capacitor is very noncritical.High Temperature OperationThe LT1175 is a micropower design with only 45µA quiescent current. This could make it perform poorly at high temperatures (>125°C), where power transistor leak-age might exceed the output node loading current (5µA to 15µA). To avoid a condition where the output voltage drifts uncontrolled high during a high temperature no-load condition, the LT1175 has an active load which turns on when the output is pulled above the nominal regulated voltage. This load absorbs power transistor leakage and maintains good regulation. There is one downside to this feature, however. If the output is pulled high deliberately,as it might be when the LT1175 is used as a backup to a slightly higher output from a primary regulator, the LT1175will act as an unwanted load on the primary regulator.Because of this, the active pull-down is deliberately “weak.”It can be modeled as a 2k resistor in series with an internal clamp voltage when the regulator output is being pulledDie V V I Maximum T T I V JA IN OUT LOAD AJA AJA LOADOUTTemp = T + Power Dissipation = T =T A MAX MAX θθθ−()()−−()+high. If a 4.8V output is pulled to 5V, for instance, the load on the primary regulator would be (5V – 4.8V)/2k Ω =100µA. This also means that if the internal pass transistor leaks 50µA, the output voltage will be (50µA)(2k Ω) =100mV high. This condition will not occur under normal operating conditions, but could occur immediately after an output short circuit had overheated the chip.Thermal ConsiderationsThe LT1175 is available in a special 8-pin surface mount package which has Pins 1 and 8 connected to the die attach paddle. This reduces thermal resistance when Pins 1 and 8 are connected to expanded copper lands on the PC board. Table 2 shows thermal resistance for various combinations of copper lands and backside or internal planes. Table 2 also shows thermal resistance for the 5-pin DD surface mount package and the 8-pin DIP and package.Table 2. Package Thermal Resistance (°C/W)LAND AREA DIP ST SO Q Minimum 1409010060Minimum with 110708050Backplane 1cm 2 Top Plane 100647535with Backplane 10cm 2 Top Plane 80506027with BackplaneTo calculate die temperature, maximum power dissipation or maximum input voltage, use the following formulas with correct thermal resistance numbers from Table 2. For through-hole TO-220 applications use θJA = 50°C/W without a heat sink and θJA = 5°C/W + heat sink thermal resistance when using a heat sink.Maximum Input Voltagefor Thermal ConsiderationsLT1175APPLICATIO S I FOR ATIO W UU U T A=Maximum ambient temperatureT MAX =Maximum LT1175 die temperature (125°C forcommercial and industrial grades)θJA =LT1175 thermal resistance, junction to ambient V IN=Maximum continuous input voltage at maximum load currentI LOAD =Maximum load currentExample: LT1175S8 with I LOAD = 200mA, V OUT = 5V,V IN = 7V, T A = 60°C. Maximum die temperature for the LT1175S8 is 125°C. Thermal resistance from Table 2 is found to be 80°C/W.Die Temperature = 60 + 80 (0.2A)(8 – 5) = 108°CMaximum W V Power Dissipation =125–6080125–60==()+=081800259..Output Voltage ReversalThe LT1175 is designed to tolerate an output voltagereversal of up to 2V. Reversal might occur, for instance, if the output was shorted to a positive 5V supply. This would almost surely destroy IC devices connected to the negative output. Reversal could also occur during start-up if the positive supply came up first and loads were connected between the positive and negative supplies. For these reasons, it is always good design practice to add a reverse biased diode from each regulator output to ground to limit output voltage reversal . The diode should be rated to handle full negative load current for start-up situations, or the short-circuit current of the positive supply if supply-to-supply shorts must be tolerated.Input Voltage Lower Than OutputLinear Technology’s positive low dropout regulators LT1121 and LT1129, will not draw large currents if the input voltage is less than the output. These devices use a lateral PNP power transistor structure that has 40V emitter base breakdown voltage.The LT1175, however, uses anNPN power transistor structure that has a parasitic diode between the input and output of the regulator . Reverse voltages between input and output above 1V will damage the regulator if large currents are allowed to flow. Simply disconnecting the input source with the output held up will not cause damage even though the input-to-output volt-age will become slightly reversed.High Frequency Ripple RejectionThe LT1175 will sometimes be powered from switching regulators that generate the unregulated or quasi-regu-lated input voltage. This voltage will contain high fre-quency ripple that must be rejected by the linear regulator.Special care was taken with the LT1175 to maximize high frequency ripple rejection, but as with any micropower design, rejection is strongly affected by ripple frequency.The graph in the Typical Performance Characteristics section shows 60dB rejection at 1kHz, but only 15dB rejection at 100kHz for the 5V part. Photographs in Figures 4a and 4b show actual output ripple waveforms with square wave and triwave input ripple.Maximum Continuous Input Voltage(for Thermal Considerations)C OUT = 4.7µF TANTC OUT = 1µF TANT5µs/DIV1175 F04Figure 4a.C OUT = 4.7µF TANT C OUT = 1µF TANT2µs/DIV1175 F04Figure 4b.INPUT RIPPLE 100mV/DIVOUTPUT 100mV/DIVf = 100kHzf = 50kHzOUTPUT 20mV/DIVINPUT RIPPLE 100mV/DIV111175fdAPPLICATIO S I FOR ATIO W UU U To estimate regulator output ripple under different condi-tions, the following general comments should be helpful:1.Output ripple at high frequency is only weakly affected by load current or output capacitor size for medium to heavy loads. At very light loads (<10mA), higher fre-quency ripple may be reduced by using larger output capacitors.2. A feedforward capacitor across the resistor divider used with the adjustable part is effective in reducing ripple only for output voltages greater than 5V and only for frequencies less than 100kHz.3.Input-to-output voltage differential has little effect on ripple rejection until the regulator actually enters a dropout condition of 0.2V to 0.6V.If ripple rejection needs to be improved, an input filter can be added. This filter can be a simple RC filter using a 1Ωto 10Ω resistor. A 3.3Ω resistor for instance, combined with a 0.3Ω ESR solid tantalum capacitor, will give an additional 20dB ripple rejection. The size of the resistor will be dictated by maximum load current. If the maximum voltage drop allowable across the resistor is “V R ,” and maximum load current is I LOAD , R = V R /I LOAD . At light loads, larger resistors and smaller capacitors can be usedto save space. At heavier loads an inductor may have to be used in place of the resistor. The value of the inductor can be calculated from:L ESR f FIL rr =()()21020π/ESR =Effective series resistance of filter capacitor. Thisassumes that the capacitive reactance is small compared to ESR, a reasonable assumption for solid tantalum capacitors above 2.2µF and 50kHz.f =Ripple frequencyrr=Ripple rejection ratio of filter in dBExample: ESR = 1.2Ω, f = 100kHz, rr = –25dB.L HFIL =⎛⎝⎞⎠⎛⎝⎞⎠=−126310103452520../µSolid tantalum capacitors are suggested for the filter tokeep filter Q fairly low. This prevents unwanted ringing at the resonant frequency of the filter and oscillation prob-lems with the filter/regulator combination.121314Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.1516© Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● 。

DPM 715 Digital Panel Meter说明书

S c h w i l l e -- E E l e k t r o n i k Manual DPM 725Page 1 von 2Digital Panel Meter DPM 715Display:3 1/2 digitDisplaydimension:red LED 25,4 mmZero:automatic zero point correction Polarity:automatic polarity - sign Meas. Rate: 2.5 Measurements per sec.Decimal Point:selectable setting Plasticcase:ABS blackOverload Meas.:10 times of meas. Voltage range, max 250VOverload Meas.: 2 times of meas. Current rangeSupply Voltage:230 Volt AC, 3 VA Common Mode:CMRR better 80dB Operating Temp.:-10°C…+50°C Protection Index:IP 50 FrontIP 00 Rare acc. DIN 40050Connector Type:Lift ClampsFront Panel:H x W = 72 x 144 mm Panel cut-out:H x W = 66 x 136 mm Mounting Depth:D = 135 mmMechanical Dimensions :Schwille - Elektronik D 85551 Kirchheim Telefon 089 / 904 868 - 0 Fax: 089 / 904 868 - 10 Internet: www.schwille.deSetting the Decimal PointThe decimal point is setable with jumper on the top side of the PCB.DC-Voltage Type 725-001 … 725-006Meas. instrument with full +/- range from -1999 to +1999 digits. Accuracy class 0.1% +/- 1 digit from measuring value. Measuring input terminals 1(Minus) and 2 (Plus). Supply voltage terminals 15 and 17.AC-Voltage Type 725-011 … 725-016Meas. instrument with integrated rectifier. Meas.display is in ‘U eff’calibrated. Frequency range DC to 100Hz. Accuracy class +/-0.5% +/- 2 digits from mea-suring value. Measuring input terminals 1 and 2.Supply voltage terminals 15 and 17.DC-Current Type 725-020 … 725-025Meas. instrument with full +/- range from-19999 to +19999 digits. Accuracy class 0.2% +/- 1digit from measuring value. Internal voltage drop max. 200mV. Measu-ring input terminals 1 (Minus)and 2 (Plus). Supply voltage terminals 15 and 17.AC-Current Type 725-030 … 725-035Meas. instrument with integrated rectifier for. Meas.display is in ‘I eff’calibrated. Frequency range DC to 100Hz. Accuracy class +/-0.5% +/- 2 digits from mea-suring value. For current measurements a 200mV range shunt is used with the deci-mal point set accor-dingly. Example: Shunt 20A/200mV. The decimal point will be set to 19.99. Measuring input terminals 1and 2. Supply voltage terminals 15 and 17.PT100 Temperature 2-wire Type 725-050/-051Temperature measuring device for P T100 sensor according to DIN 43760. The models are calibrated for a line resistance of 10 Ohm. Line resistance < 10Ohm compensatable with Pot. P2. Maximum measu-ring current 1.5mA. Accuracy: 0.1% +/-1 digit of the meas. value. Range B1: -100.0°C ---+199.9°C, reso-lution 0.1 Kelvin. Range B2: -100°C … +750°C,resolution 1 Kelvin. Sensor terminals 2 and 3. Supply voltage terminals 15 and 17. Analog output in mV/°C on terminals 7 (Minus) and 8 (Plus).PT100 Temperature 3-wireType 725-052/-053Temperature measuring device for P T100 sensor according to DIN 43760. With these models the line resistance is compensated automatically. Maximum measuring current 1.5mA. Accuracy: 0.1% +/-1 digit of the meas. value. Range B1: -150.0°C …+199.9°C, resolution 0.1 Kelvin. Range B2: -150°C … +750°C, resolution 1 Kelvin. Sensor terminals 1, 3and 4. Supply voltage terminals 15 and 17. Analog output in mV/°C on terminals 7 (Minus) and 8 (Plus).PT100 Temperature 4-wire Type 725-054/-055Temperature measuring device for P T100 sensoraccording to DIN 43760. With these models the line resistance is compensated automatically. Maximum measuring current 1.5mA. Accuracy: 0.1% +/-1 digit of the meas. value. Range B1: -150.0°C…+199.9°C, resolution 0.1 Kelvin. Range B2: -150°C … +750°C, resolution 1 Kelvin. Sensor terminals 1, 2and 3, 4. Supply voltage terminals 15 and 17. Analog output in mV/°C on terminals 7 (Minus) and 8 (Plus).S c h w i l l e -- E E l e k t r o n i k Manual DPM 725Page 2 von 2Schwille - ElektronikD 85551 Kirchheim Telefon 089 / 904 868 - 0 Fax: 089 / 904 868 - 10 Internet: www.schwille.deNiCrNi Temperature Type 725-060/-061Temperature measuring device for NiCrNi sensor according to DIN 43710 with internal temperature compensation. Accuracy: 1% +/-4 digits of the meas.value. Range B1: 0.0°C … +199.9°C, resolution 0.1Kelvin. Range B2: 0°C … +1300°C, resolution1Kelvin. Measuring input terminal 3 (red line of sensor)and terminal 4 (green line of sensor). Supply voltage terminals 15 and 17. Analog output in mV/°C on ter-minals 7 (Minus) and 8 (Plus).Temperature measuring device for FeCuNi sensor according to DIN 43710 with internal temperature compensation. Accuracy class: +/-1.5% +/-4 digits of the meas. value. Range B1: -50°C … +600°C, reso-lution 1 Kelvin. Measuring input terminal 3 (red line of sensor) and terminal 4 (blue line of sensor). Supply voltage terminals 15 and 17. Analog output in mV/°C on terminals 7 (Minus) and 8 (Plus).Type 725-008/-009 and 725-027/-029These models provide for standard voltage- and cur-rentsignals displays for different values. The ranges are set at factory site according to customer order and a zero point shift is indicated on the device label.Measu-ring input terminals 1 (Minus) and 2 (P lus).Supply voltage terminals 15 and 17. Type 725-008/0-10V: Accuracy 0.1% +/- 1digit from meas. value.Display range from 0 to customer value. Type 725-009/0-10V: Accuracy class 0.1% +/- 1digit from meas.value. Display range from + to - customer value. Type 725-027/0-20mA: Accuracy 0.2% +/- 1 digit from meas. value. Display range from 0 to customer value.Type 725-028/0-20mA: Accuracy 0.2% +/- 1 digit from meas. value. Display range from + to - customer value. Type 725-029/4-20mA: Accuracy 0.2% +/- 1digit from meas. value. Display range from + to -customer value.Voltage output 24V DCVoltage output to supply external sensors with gal-vanic separated 24V 30mA. Voltage is available atterminal 9 (Minus) and 10 (Plus).Run-Hold FunctionRun-Hold: The measuring device runs its measuring cycle up to the end and holds the displayed value as long as the Run-Hold terminals are connected with each other.Option: Dimension Display Type 725-900A customer selected dimension display is placed inclusive illuminated field at the right side behind the front panel. The illuminated field holds a negative film with the desired dimension.Option: AC Supplies Type 725-105/-107On selected option a transformer with the respective primary voltage will be mounted and indicated on the device label (galvanic separation).Order No.: 725-105 Input voltage 115V/AC. Order No.: 725-107 Input voltage 24V/AC.These types do not provide the 24V Voltage output.Safety PrecautionsEmploying these instruments, regulations for wor-king with high voltage equipment, as well as any Professional Trade Association regulation for wor-king with electrical appliances and installations have to be observed.CE-GuidelinesMeets the EMV Guideline (89/336/EWG) and the German EMV ruling by applying the Basic Standard EN 50081/ EN 50082. Meets the Low Voltage Guideline (73/23/EWG) by applying Product Standard EN 61010.Guarantee RegulationsRegulations by law apply for guarantee within 6month. All equipment is factory tested and calibra-ted. Excluded from the guarantee are normal wear and tear, defects due to misuse, negligence, chemi-cal exposure, mechanical stress as well as equip-ment, which has been modified, re-labeled or other-wise altered or if attempts to repair have beenmade. All guarantee claims are subject to our scruti-ny and approval.ServiceWe are glad that you decided on an instrument from our product range. If there are what so ever any defects, please send the instrument (postage paid)to your distributor. For technical information contact us via E Mail: ****************Technical changes reserved.。

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Actual Size(3,0 mm x 3,0 mm)FEATURESDESCRIPTION APPLICATIONSOUT NC NC FB/NC INNCNCGND DRB PACKAGE3mm x 3mm SON(TOP VIEW)TPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004HIGH INPUT VOLTAGE,MICROPOWER SON PACKAGED 80-mA LDO LINEARREGULATORS•80-mA Low-Dropout Regulator The TPS715Axx low-dropout (LDO)voltage regu-lators offer the benefits of high input voltage,•Available in 3.3V and Adjustable low-dropout voltage,low-power operation,and •24-V Maximum Input Voltage miniaturized packaging.The devices,which operate •Low 3.2-µA Quiescent Current at 80mA over an input range of 2.5V to 24V,are stable with •Stable With Any Capacitor (>0.47µF)any capacitor (≥0.47µF).The high maximum input voltage combined with excellent power dissipation •Specified Current Limit capability makes this part particularly well-suited to •3mm x 3mm SON Package industrial and automotive applications.•-40°C to +125°C Specified JunctionA PMOS pass element behaves as a low-valueTemperature Range resistor.The low dropout voltage,typically 670mV at80mA of load current,is directly proportional to theload current.The low quiescent current (3.2µA typi-•Ultralow Power Microcontrollers cally)is nearly constant over the entire range ofoutput load current (0mA to 80mA).•Industrial/Automotive Applications •PDAs •Portable,Battery-Powered EquipmentPlease be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Copyright ©2004,Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.ABSOLUTE MAXIMUM RATINGSPOWER DISSIPATION RATING TABLETPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.AVAILABLE OPTIONS (1)SPECIFIED PACKAGE-LEAD TEMPERATURE PACKAGE ORDERING TRANSPORT MEDIA,PRODUCTV OUT (2)(DESIGNATOR)RANGE MARKING NUMBER QUANTITY TPS715A01DRBT Tape and Reel,250(Adjustable)TPS715A013x 3SON (DRB)-40°C to 125°C ANO 1.2V-15V TPS715A01DRBR Tape and Reel,3000TPS715A33DRBT Tape and Reel,250TPS715A333.3V 3x 3SON (DRB)-40°C to 125°C ANN TPS715A33DRBR Tape and Reel,3000(1)For the most current package and ordering information,see the Package Option Addendum located at the end of this data sheet.(2)Custom output voltages from 1.3V to 4V in 100mV increments are available on a quick-turn basis for prototyping.Production quantities are available;minimum order quantities apply.Contact factory for details and availability.over operating temperature range (unless otherwise noted)(1)UNITV IN range-0.3V to 24V Peak output currentInternally limited ESD rating,HBM2kV ESD rating,CDM500V Continuous total power dissipationSee Dissipation Rating Table Junction temperature range,T J-40°C to 150°C Storage temperature range-65°C to 150°C (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.DERATING FACTOR T A ≤25°C POWER T A =70°C POWER T A =85°C POWER BOARDPACKAGE R θJA °C/W ABOVE T A =25°C RATING RATING RATING High-K (1)DRB 6515.4mW/°C 1.54W 0.85W 0.62W (1)The JEDEC High-K (2s2p)board design used to derive this data was a 3inch x 3inch,multilayer board with 1ounce internal power and ground planes and 2ounce copper traces on top and bottom of the board.2ELECTRICAL CHARACTERISTICSTPS715A01TPS715A33 SBVS047A–MAY2004–REVISED DECEMBER2004Over operating junction temperature range(TJ =-40°C to+125°C),VIN=VOUT(NOM)+1V,IOUT=1mA,COUT=1µF,unlessotherwise noted.The TPS715A01is tested with VOUT =2.8V.Typical values are at TJ=25°C.PARAMETER TEST CONDITIONS MIN TYP MAX UNITI OUT=10mA 2.524Input voltage(1)V IN VI OUT=80mA324Voltage range(TPS715A01)V OUT 1.215VV OUT+1.0V≤V IN≤24V,0.96× 1.04×TPS715A01V OUT(nom)1.2V≤V OUT≤15V,0≤I OUT≤80mA V OUT(nom)V OUT(nom)Output voltage accuracy(1)VTPS715A33 4.3V<V IN<24V,0≤I OUT≤80mA 3.135 3.3 3.465Output voltage∆V OUT/∆V IN V OUT+1V<V IN≤24V2060mV line regulation(1)Load regulation∆V OUT/∆I OUT I OUT=100µA to80mA35mVDropout voltageV DO I OUT=80mA6701120mVV IN=V OUT(NOM)-0.1VOutput current limit I CL V OUT=0V1601100mAT J=-40°C to85°C,0mA≤I OUT≤80mA 3.2 4.2 Ground pin current I GND0mA≤I OUT≤80mA 3.2 4.8µAV IN=24V,0mA≤I OUT≤80mA 5.8Power-supply ripple rejection PSRR f=100kHz,C OUT=10µF60dBBW=200Hz to100kHz,Output noise voltage V IN575µVrmsC OUT=10µF,I OUT=50mA(1)Minimum V IN=V OUT+V DO,or the value shown for Input voltage,whichever is greater.3V(IN)GNDV(OUT)V(IN) GND V(OUT)TPS715A01TPS715A33SBVS047A–MAY2004–REVISED DECEMBER2004FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSIONFUNCTIONAL BLOCK DIAGRAM—FIXED VERSIONTable1.Terminal FunctionsTERMINALNO.DESCRIPTIONNAMEFIXED ADJ.FB5Adjustable version.This terminal is used to set the output voltage.GND44GroundNC2,3,5-72,3,6,7No connectionIN11Unregulated input voltage.OUT88Regulated output voltage,any output capacitor≥0.47µF can be used for stability. 4 TYPICAL CHARACTERISTICSI OUT -Output Current -mA 010203040506070803.4653.4323.3993.3663.3333.3003.2673.2343.2013.1683.135V O U T -O u t p u t V o l t a g e -V T J -Junction T emperature -°C −40−25−1052035506580951101253.4653.4323.3993.3663.3333.3003.2673.2343.2013.1683.135V D O -D r o p o u t V o l t a g e -m VT J − Junction Temperature − °C I G N D − G r o u n d C u r r e n t − µ A I OUT −Output Current −mA 0102030405060708010009008007006005004003002001000V D O −D r o p o u t V o l t a g e −m V100 1 k 10 k100 k f − Frequency − HzO u t p u t S p e c t r a l N o i s e D e n s i t y − µV /H z f − Frequency − Hz− O u t p u t I m p e d a n c e −Z o ΩV IN −Input Voltage −V 3456789101112131415140012001000800600400200V D O −D r o p o u t V o l t a g e −m V T J -Junction T emperature -°C −40−25−10520355065809511012510009008007006005004003002001000V D O -D r o p o u t V o l t a g e -m VI OUT −Current Limit −mA01002003004005003.53.02.52.01.51.00.50V O U T −O u t p u t V o l t a g e −V TPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004TPS715A33TPS715A33OUTPUT VOLTAGE OUTPUT VOLTAGE QUIESCENT CURRENT vs vs vs OUTPUT CURRENTJUNCTION TEMPERATURE JUNCTION TEMPERATURE Figure 1.Figure 2.Figure 3.OUTPUT SPECTRAL TPS715A33NOISE DENSITY OUTPUT IMPEDANCE DROPOUT VOLTAGE vs vs vs FREQUENCYFREQUENCY OUTPUT CURRENT Figure 4.Figure 5.Figure 6.TPS71501TPS715A33DROPOUT VOLTAGE DROPOUT VOLTAGE CURRENT LIMIT vs vs vs INPUT VOLTAGEJUNCTION TEMPERATURE V OUT Figure 7.Figure 8.Figure 9.5 t − Time − msV O U T − O u t p u t V o l t a g e − m V V I N − I n p u t V o l t a g e − Vt − Time − ms V O U T − O u t p u t V o l t a g e − V V I N − I n p u t V o l t a g e − V f − Frequency − Hz P S R R − P o w e r S u p p l y R i p p l e R e j e c t i o n − d B t −Time −ms−0.500.51.01.52.02.53.03.54.04.51005002000−200I O U T −O u t p u t C u r r e n t −m A V O U T −O u t p u t V o l t a g e −mV TPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004TYPICAL CHARACTERISTICS (continued)POWER-SUPPLY RIPPLE REJECTION vs FREQUENCYPOWER UP /POWER DOWN LINE TRANSIENT RESPONSE Figure 10.Figure 11.Figure 12.LOAD TRANSIENT RESPONSEFigure 13.6 APPLICATION INFORMATIONV V OUT External Capacitor RequirementsPower Dissipation and Junction TemperatureP D(max)+T Jmax *T A R q JA(1)P D +ǒV IN *V OUT Ǔ I OUT (2)Regulator ProtectionTPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004The TPS715Axx family of LDO regulators has been optimized for ultra low power applications such as the MSP430microcontroller.Its ultralow supply current maximizes efficiency at light loads,and its high input voltage range makes it suitable for supplies such as unconditioned solar panels.Figure 14.Typical Application Circuit (Fixed Voltage Version)Although not required,a 0.047-µF or larger input bypass capacitor,connected between IN and GND and located close to the device,is recommended to improve transient response and noise rejection of the power supply as a whole.A higher-value input capacitor may be necessary if large,fast-rise-time load transients are anticipated and if the device is located several inches from the power source.The TPS715Axx requires an output capacitor connected between OUT and GND to stabilize the internal control loop.Any capacitor (including ceramic and tantalum)that is ≥0.47µF properly stabilizes this loop.To ensure reliable operation,worst-case junction temperature should not exceed 150°C.This restriction limits the power dissipation the regulator can handle in any given application.To ensure the junction temperature is within acceptable limits,calculate the maximum allowable dissipation,P D(max),and the actual dissipation,P D ,which must be less than or equal to P D(max).The maximum-power-dissipation limit is determined using Equation 1:where:•T J max is the maximum allowable junction temperature.•R θJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Rating table).•T A is the ambient temperature.The regulator dissipation is calculated using Equation 2:Power dissipation resulting from quiescent current is negligible.The TPS715Axx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example,during power-down).Current is conducted from the output to the input and is not internally limited.If extended reverse voltage operation is anticipated,external limiting might be appropriate.The TPS715Axx features internal current limiting.During normal operation,the TPS715Axx limits output current to approximately 500mA.When current limiting engages,the output voltage scales back linearly until the overcurrent condition ends.Take care not to exceed the power dissipation ratings of the package.7 Programming the TPS71501Adjustable LDO RegulatorV OUT +V REFǒ1)R1R2Ǔ(3)R1+ǒV OUT V REF *1Ǔ R2(4)OUTPUT VOLTAGE PROGRAMMING GUIDE OUTPUT VOLTAGE R1R21.8 V 2.8 V 5.0 V 392 M Ω1.07 M Ω2.55 M Ω806 k Ω806 k Ω806 k ΩV OUT V 0.47 µF TPS715A01TPS715A33SBVS047A–MAY 2004–REVISED DECEMBER 2004The output voltage of the TPS715A01adjustable regulator is programmed using an external resistor divider as shown in Figure 15.The output voltage is calculated using Equation 3:where:•V REF =1.205V typ (the internal reference voltage)Resistors R1and R2should be chosen for approximately 1.5-µA divider current.Lower value resistors can be used for improved noise performance,but the solution consumes more power.Higher resistor values should be avoided as leakage current into/out of FB across R1/R2creates an offset voltage that artificially in-creases/decreases the feedback voltage and thus erroneously decreases/increases V O .The recommended design procedure is to choose R2=1M Ωto set the divider current at 1.5µA,and then calculate R1using Equation 4:Figure 15.TPS715A01Adjustable LDO Regulator Programming8PACKAGING INFORMATION Orderable DeviceStatus (1)Package Type Package Drawing Pins Package Qty Eco Plan (2)Lead/Ball Finish MSL Peak Temp (3)TPS715A01DRBRACTIVE SON DRB 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A01DRBRG4ACTIVE SON DRB 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A01DRBTACTIVE SON DRB 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A01DRBTG4ACTIVE SON DRB 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A33DRBRACTIVE SON DRB 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A33DRBRG4ACTIVE SON DRB 83000Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A33DRBTACTIVE SON DRB 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR TPS715A33DRBTG4ACTIVE SON DRB 8250Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan -The planned eco-friendly classification:Pb-Free (RoHS)or Green (RoHS &no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS):TI's terms "Lead-Free"or "Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all 6substances,including the requirement that lead not exceed 0.1%by weight in homogeneous materials.Where designed to be solderedat high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green (RoHS &no Sb/Br):TI defines "Green"to mean Pb-Free (RoHS compatible),and free of Bromine (Br)and Antimony (Sb)based flame retardants (Br or Sb do not exceed 0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The 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