M27C1024-90XB1X中文资料

M27C10241Mbit (64Kb x16)UV EPROM and OTP EPROMSeptember 19981/15AI00702B16A0-A15P Q0-Q15V PPV CC M27C1024GE V SS16Figure 1.Logic Diagram5V ±10%SUPPLY VOLTAGE in READ OPERATIONFAST ACCESS TIME:35nsLOW POWER CONSUMPTION:–Active Current 35mA at 5MHz –Standby Current 100µAPROGRAMMING VOLTAGE:12.75V ±0.25V PROGRAMMING TIME:100µs/byte (typical)ELECTRONIC SIGNATURE –Manufacturer Code:0020h –Device Code:008ChDESCRIPTIONThe M27C1024is a 1Mbit EPROM offered in the two ranges UV (ultra violet erase)and OTP (one time programmable).It is ideally suited for micro-processorsystems requiring large data or program storage and is organized as 65,536words of 16bits.The FDIP40W (window ceramic frit-seal package)has a transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern.A new pattern can then be written to the device by following the programming procedure.For application where the content is programmed only one time and erasure is not required,the M27C1024is offered in PDIP40,PLCC44and TSOP40(10x 14mm)packages.A0-A15Address Inputs Q0-Q15Data Outputs E Chip Enable G Output Enable P Program V PP Program Supply V CC Supply Voltage V SSGroundTable 1.Signal Names140FDIP40W (F)PLCC44(C)TSOP40(N)10x 14mm140PDIP40(B)Q6Q5Q4Q11Q8V SS Q7Q10Q9A12A8A11A10A6A13A9V SS A7A2Q1Q0A0GA1A5NC P E Q12V PP V CCQ15AI00703M27C10248123456791011121314151632313029282726252423222120191817Q3Q2Q14Q13A4A34039383736353433A14A15Figure 2A.DIP Pin ConnectionsAI00704A 14A11A7A 323Q6Q5Q4Q 3Q 2N C A 2Q12Q8V SS NC Q11Q1012A 15A91Q 15V SS A12Q 13A544N C N C M27C1024Q 14A13A 4NC A634Q 1Q9A10A8Q7Q 0G A 0A 1V P P E P V C C Figure 2B.LCC Pin ConnectionsWarning:NC =Not Connected.DEVICE OPERATIONThe modes of operations of the M27C1024are listed in the OperatingModes table.Asingle power supply is required in the read mode.All inputs are TTL levels except for Vpp and 12V on A9for Electronic Signature.Read ModeThe M27C1024has two control functions,both of which must be logically active in order to obtain data at the outputs.Chip Enable (E)is the power control and should be used for device selection.Output Enable (G)is the output control and should be used to gate data to the output pins,inde-pendent of device selection.Assuming that the addresses are stable,the address access time (t AVQV )is equalto the delayfrom E to output (t ELQV ).Data is available at the output after a delay of t OE from the falling edge of G,assuming that E has been low and the addresses have been stable for at least t AVQV -t GLQV .Standby ModeThe M27C1024has a standby mode which re-duces the active current from 35mA to 100µA.The M27C1024is placed in the standby mode by applying a TTL high signal to the E input.When in the standby mode,the outputs are in a high imped-ance state,independent of the G input.Warning:NC =Not Connected.DQ6DQ3DQ2DQ13DQ8DQ7DQ10DQ9A14A8A11A10A4A15A9G A7A2DQ1DQ0A0A1A3NC P E DQ14V PP V CC DQ15AI01582M27C1024 (Normal)101112021303140V SSA12A6A13A5DQ12DQ4DQ11DQ5V SS Figure 2C.TSOP Pin ConnectionsWarning:NC =Not Connected.2/15M27C1024M27C1024Table2.Absolute Maximum Ratings(1)Symbol Parameter Value Unit T A Ambient Operating Temperature(3)–40to125°CT BIAS Temperature Under Bias–50to125°CT STG Storage Temperature–65to150°C V IO(2)Input or Output Voltages(except A9)–2to7VV CC Supply Voltage–2to7VV A9(2)A9Voltage–2to13.5VV PP Program Supply Voltage–2to14V Notes:1.Except for the rating”Operating Temperatur e Range”,stresses above those listed in the Table”Absolute Maximum Ratings”may cause permanent damage to the device.These are stress ratings only and operation of the device at these or any otherconditions above those indicated in the Operating sections of this specification is not implied.Exposure to Absolute MaximumRating conditions for extended periods may affect device reliability.Refer also to the STMicroelectronics SURE Program and other relevant quality documents.2.Minimum DC voltage on Input or Output is–0.5V with possible undershoot to–2.0V for a period less than20ns.Maximum DCvoltage on Output is V CC+0.5V with possible overshoot to V CC+2V for a period less than20ns.3.Depends on range.Table3.Operating ModesMode E G P A9V PP Q0-Q15 Read V IL V IL V IH X V CC or V SS Data Output Output Disable V IL V IH X X V CC or V SS Hi-Z Program V IL X V IL Pulse X V PP Data Input Verify V IL V IL V IH X V PP Data Output Program Inhibit V IH X X X V PP Hi-Z Standby V IH X X X V CC or V SS Hi-Z Electronic Signature V IL V IL V IH V ID V CC Codes Note:X=V IH or V IL,V ID=12V±0.5VTable4.Electronic SignatureIdentifier A0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data Manufacturer’s Code V IL0010000020h Device Code V IH100011008Ch Note:Outputs Q8-Q15are set to’0’.3/15AI018223VHigh Speed0V1.5V2.4VStandard 0.4V2.0V 0.8VFigure 3.AC Testing Input Output Waveform AI01823B1.3VOUTC LC L =30pF for High Speed C L =100pF for Standard C L includes JIG capacitance3.3k Ω1N914DEVICE UNDER TESTFigure 4.AC Testing Load CircuitHigh SpeedStandard Input Rise and Fall Times ≤10ns ≤20ns Input Pulse Voltages0to 3V 0.4V to 2.4V Input and Output Timing Ref.Voltages1.5V0.8V and 2VTable 5.AC Measurement ConditionsSymbol ParameterTest ConditionMinMax Unit C IN Input Capacitance V IN =0V 6pF C OUTOutput CapacitanceV OUT =0V12pFNote: 1.Sampled only,not 100%tested.Table 6.Capacitance (1)(T A =25°C,f =1MHz )Two Line Output ControlBecauseEPROMs are usuallyused in largermem-ory arrays,this product features a 2line control function which accommodates the use of multiple memory connection.The two line control function allows:a.the lowest possible memory power dissipation,plete assurance that output bus contention will not occur.For the most efficientuse of thesetwo controllines,E should be decoded and used as the primary device selecting function,while G should be made a common connection to all devices in the array and connected to the READ line from the systemcontrol bus.This ensures that all deselectedmem-ory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.System ConsiderationsThe power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices.The supply current,I CC ,has three seg-ments that are of interest to the system designer :the standby current level,the active current level,and transient current peaks that are produced by the falling and rising edges of E.The magnitude of transientcurrent peaks is dependenton the capaci-tive and inductive loading of the device at the output.4/15M27C1024Symbol ParameterTest Condition Min Max Unit I LI Input Leakage Current 0V ≤V IN ≤V CC ±10µA I LO Output Leakage Current 0V ≤V OUT ≤V CC ±10µA I CC Supply CurrentE =V IL ,G =V IL ,I OUT =0mA,f =5MHz35mA I CC1Supply Current (Standby)TTL E =V IH 1mA I CC2Supply Current (Standby)CMOS E >V CC –0.2V 100µA I PP Program Current V PP =V CC100µA V IL Input Low Voltage –0.30.8V V IH(2)Input High Voltage 2V CC +1V V OL Output Low Voltage I OL =2.1mA 0.4V V OHOutput High Voltage TTL I OH =–400µA 2.4V Output High Voltage CMOSI OH =–100µAV CC –0.7VNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously with or after V PP.2.Maximum DC voltage on Output is V CC +0.5V.Table 7.Read Mode DC Characteristics (1)(T A =0to 70°C,–40to 85°C;–40to 105°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )SymbolAltParameterTest ConditionM27C1024Unit-35(3)-45(3)-55(3)Min Max Min Max Min Maxt AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL354555ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 354555ns t GLQV t OE Output Enable Low to Output Valid E =V IL 202530ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 030030030ns t GHQZ (2)t DF Output Enable High to Output Hi-Z E =V IL 030030030ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V ILnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously with or after V PP.2.Sampled only,not 100%tested.3.Speed obtained with High Speed AC measurementconditions.Table 8A.Read Mode AC Characteristics (1)(T A =0to 70°C,–40to 85°C;–40to 105°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )5/15M27C1024SymbolAltParameterTest ConditionM27C1024Unit-70-80/-90-10/-12/-15/-20Min Max Min Max Min Maxt AVQV t ACC Address Valid to Output Valid E =V IL ,G =V IL7080100ns t ELQV t CE Chip Enable Low to Output Valid G =V IL 7080100ns t GLQV t OE Output Enable Low to Output Valid E =V IL 354050ns t EHQZ (2)t DF Chip Enable High to Output Hi-Z G =V IL 030030030ns t GHQZ (2)t DF Output Enable High to Output Hi-Z E =V IL 030030030ns t AXQXt OHAddress Transition to Output TransitionE =V IL ,G =V ILnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously with or after V PP.2.Sampled only,not 100%tested.Table 8B.Read Mode AC Characteristics (1)(T A =0to 70°C,–40to 85°C;–40to 105°C or –40to 125°C;V CC =5V ±5%or 5V ±10%;V PP =V CC )AI00705BtAXQXtEHQZA0-A15EGQ0-Q15tAVQVtGHQZtGLQVtELQVVALID Hi-ZVALIDFigure 5.Read Mode AC Waveforms6/15M27C1024Symbol ParameterTest Condition MinMax Unit I LI Input Leakage Current 0≤V IN ≤V IH±10µA I CC Supply Current 50mA I PP Program Current E =V IL50mA V IL Input Low Voltage –0.30.8V V IH Input High Voltage 2V CC +0.5V V OL Output Low Voltage I OL =2.1mA 0.4V V OH Output High Voltage TTL I OH =–400µA2.4V V IDA9Voltage11.512.5VNote: 1.V CC must be applied simultaneously with or before V PP and removed simultaneously with or after V PP .Table 9.Programming Mode DC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)Symbol Alt ParameterTest Condition Min Max Unit t AVPL t AS Address Valid to Program Low 2µs t QVPL t DS Input Valid to Program Low 2µs t VPHPL t VPS V PP High to Program Low 2µs t VCHPL t VCS V CC High to Program Low 2µs t ELPL t CES Chip Enable Low to Program Low 2µst PLPH t PW Program Pulse Width95105µs t PHQX t DH Program High to Input Transition 2µs t QXGL t OES Input Transition to Output Enable Low2µst GLQV t OE Output Enable Low to Output Valid 100ns t GHQZ(2)t DFP Output Enable High to Output Hi-Z 0130ns t GHAXt AHOutput Enable High to Address TransitionnsNotes:1.V CC must be applied simultaneously with or before V PP and removed simultaneously with or after V PP .2.Sampled only,not 100%tested.Table 10.ProgrammingMode AC Characteristics (1)(T A =25°C;V CC =6.25V ±0.25V;V PP =12.75V ±0.25V)7/15M27C1024tAVPLVALIDAI00706A0-A15Q0-Q15V PPV CCPGDATA INDATA OUTEtQVPLtVPHPLtVCHPLtPHQXtPLPHtGLQV tQXGLtELPLtGHQZtGHAXPROGRAM VERIFYFigure 6.Programming and Verify Modes AC WaveformsThe associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling ca-pacitors.It is recommended that a 0.1µF ceramic capacitor be used on every device between V CC and V SS .Thisshould be a high frequencycapacitor of low inherent inductance and should be placed as close to the device as possible.In addition,a 4.7µF bulk electrolytic capacitor should be used between Vcc and V SS for every eight devices.The bulk capacitor should be located near the power supply connection point.The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.ProgrammingWhen delivered (and after each ’1’s erasure for UV EPROM),all bits of the M27C1024are in the ’1’state.Data is introduced by selectively program-ming ’0’s into the desired bit locations.Although only ’0’s will be programmed,both ’1’s and ’0’s canbe present in the data word.The only way to change a ’0’to a ’1’is by die exposure to ultraviolet light (UV EPROM).The M27C1024is in the pro-gramming mode when V PP input is at 12.75V,E is at V IL and P is pulsed to V IL .The data to be programmed is applied to 16bits in parallel to the data output pins.The levels required for the ad-dress and data inputs are TTL.V CC is specified to be 6.25V ± 0.25V.PRESTO II Programming AlgorithmPRESTO II Programming Algorithm allows pro-gramming of the whole array with a guaranteed margin,in a typical time of 6.5seconds.Program-ming with PRESTO II consists of applying a se-quenceof 100µs programpulses toeach worduntil a correct verify occurs (see Figure 7).During pro-gramming and verify operation,a MARGIN MODE circuit is automaticallyactivated in order to guaran-tee that each cell is programmed with enough margin.No overprogrampulse is applied since the verify in MARGIN MODE provides necessary mar-gin to each programmed cell.DEVICE OPERATION (cont’d)8/15M27C1024AI00707Cn =0Last AddrVERIFYP =100µs Pulse++n =25++AddrV CC =6.25V,V PP =12.75VFAILCHECK ALL WORDS 1st:V CC =6V 2nd:V CC =4.2VYES NOYESNOYESNO Figure 7.Programming FlowchartProgram InhibitProgramming of multiple M27C1024s in parallel with different data is also easily accomplished.Except for E,all like inputs including G of the parallel M27C1024may be common.A TTL low level pulse applied to a M27C1024’s P input,with E low and V PP at 12.75V,will program that M27C1024.A high level E input inhibits the other M27C1024s from being programmed.Program VerifyA verify (read)should be performed on the pro-grammed bits to determine that they were correctly programmed.The verify is accomplished with E and G at V IL ,P at V IH ,V PP at 12.75V and V CC at 6.25V.On-Board ProgrammingThe M27C1024can be directly programmed in the application circuit.See the relevant Application Note AN620.Electronic SignatureThe Electronic Signature (ES)mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type.This mode is intended for use by programming equipment to automatically match the device to be programmed withits correspondingprogramming algorithm.The ES mode is functional in the 25°C ±5°C ambient temperaturerange that is required when program-ming the M27C1024.To activate the ES mode,the programming equipmentmust force 11.5Vto 12.5V on address line A9of the M27C1024with V PP =V CC =5V.Two identifier bytes may then be se-quenced from the device outputs by toggling ad-dress line A0from V IL to V IH .All otheraddress lines must be held at V IL during Electronic Signature mode.Byte 0(A0=V IL )represents the manufac-turer code and byte 1(A0=V IH )the device identifier code.For the STMicroelectronics M27C1024,these two iden-tifier bytes are given in Table 4and can be read-out on outputs Q0to Q7.ERASURE OPERATION (applies to UV EPROM)The erasure characteristics of the M27C1024is such that erasure begins when the cells are ex-posed to light with wavelengths shorter than ap-proximately4000Å.It shouldbe notedthat sunlight and some type of fluorescent lamps have wave-lengthsin the 3000-4000Årange.Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C1024in about 3years,while it would take approximately 1week to cause erasure when exposed to direct sunlight.If the M27C1024is to be exposed to these types of lighting conditions for extended periods of time,it is suggested that opaque labels be put over the M27C1024window to prevent unintentional era-sure.The recommended erasure procedurefor the M27C1024is exposure to short wave ultraviolet light which has wavelength 2537Å.The integrated dose (i.e.UV intensityx exposuretime)for erasure should be a minimum of 15W-sec/cm 2.The era-sure time with this dosage is approximately 15to 20minutes using an ultraviolet lamp with 12000µW/cm 2power rating.The M27C1024should be placed within 2.5cm (1inch)of the lamp tubes during the erasure.Some lamps have a filter on their tubes which should be removed before erasure.9/15M27C1024ORDERING INFORMATION SCHEMESpeed-35(1)35ns -45(1)45ns -55(1)55ns -7070ns -8080ns -9090ns -10100ns -12120ns -15150ns -20200ns -10100nsV CC Toleranceblank±10%X±5%PackageF FDIP40WB PDIP40C PLCC44N TSOP4010x14mmTemperature Range10to70°C6–40to85°C7–40to105°C3–40to125°COptionX AdditionalBurn-inTR Tape&ReelPacking Example:M27C1024-12X C1XNote: 1.High Speed,see AC Characteristics section for further information.For a list of availableoptions(Speed,Package,etc...)or for furtherinformationon any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.10/15M27C1024FDIP40W -40pin Ceramic Frit-seal DIP,with windowFDIPW-aA3A1A LB1B eD SE1EN1CαeA D2∅eBA2Symb mminches TypMinMax TypMinMax A 5.720.225A10.51 1.400.0200.055A2 3.91 4.570.1540.180A3 3.89 4.500.1530.177B 0.410.560.0160.022B1 1.45––0.057––C 0.230.300.0090.012D 51.7952.60 2.039 2.071D248.26–– 1.900––E 15.24––0.600––E113.0613.360.5140.526e 2.54––0.100––eA 14.99–– 1.900––eB 16.1818.030.6370.710L 3.180.125S 1.52 2.490.0600.098∅8.13––0.320––α4°11°4°11°N4040Drawing is not to scale.11/15PDIP40-40pin Plastic DIP,600mils widthPDIPA2A1A LB1B e1D SE1EN1CαeA eBD2Symbmm inches TypMin Max Typ Min Max A 4.45––0.175––A10.640.38–0.0250.015–A2 3.56 3.910.1400.154B 0.380.530.0150.021B1 1.14 1.780.0450.070C 0.200.310.0080.012D 51.7852.58 2.039 2.070D248.26–– 1.900––E 14.8016.260.5830.640E113.4613.990.5300.551e1 2.54––0.100––eA 15.24––0.600–eB 15.2417.780.6000.700L 3.05 3.810.1200.150S 1.52 2.290.0600.090α0°15°0É15°N4040Drawing is not to scale.12/15PLCC44-44lead Plastic Leaded Chip Carrier,squarePLCCD NeE1E1ND1NdCPBD2/E2eB1A1AR0.51(.020)1.14(.045)F A2Symbmm inches TypMin Max TypMin Max A 4.20 4.700.1650.185A1 2.29 3.040.0900.120B 0.330.530.0130.021B10.660.810.0260.032D 17.4017.650.6850.695D116.5116.660.6500.656D214.9916.000.5900.630E 17.4017.650.6850.695E116.5116.660.6500.656E214.9916.000.5900.630e 1.27––0.050––j 0.89––0.035––N 4444CP0.100.004Drawing is not to scale.13/15TSOP40-40lead Plastic Thin Small Outline,10x 14mmTSOP-aD1E1NCPBeA2AN/2DDIECLA1αSymbmm inches TypMinMax TypMinMax A 1.200.047A10.050.150.0020.006A20.95 1.050.0370.041B 0.170.270.0070.011C 0.100.210.0040.008D 13.8014.200.5430.559D112.3012.500.4840.492E 9.9010.100.3900.398e 0.50––0.020––L 0.500.700.0200.028α0°5°0°5°N 4040CP0.100.004Drawing is not to scale.14/15Information furnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use.No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specifications mentioned in this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics©1998STMicroelectronics-All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A.15/15。