AD811_04中文资料
ADC0804工作原理及其在单片机中的应用(基于Proteus仿真)
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2、分辨率概念：分辨率是指使输出数字量变化 1 时的输入模拟量，也就是使输出数字量
变化一个相邻数码所需输入模拟量的变化值。 分辨率与 A/D 转换器的位数有确定的关系，可以表示成 FS / 2
n
。FS 表示满量程输入
值，n 为 A/D 转换器的位数。例如，对于 5V 的满量程，采用 4 位的 ADC 时，分辨率为 5V/16=0.3125V (也就是说当输入的电压值每增加 0.3125V，输出的数字量增加 1)；采用 8 位 的 ADC 时，分辨率为 5V/256＝19.5mV（也就是说当输入的电压值每增加 19.5mV，则输出 的数字量增加 1） ；当采用 12 位的 ADC 时，分辨率则为 5V/4096＝1.22mV（也就是说当输 入的电压值每增加 1.22mV ，则输出的数字量增加 1） 。显然，位数越多,分辨率就越高。
因此，对于本试验，转换公式为
Vout (
Dsample ) 5V 256
5、ADC0804 在单片机中的简单应用举例
如下图所示，本例 ADC0804 中的 VCC=5V， VREF/2 引脚悬空（悬空则相当于与 VCC 共接 5V 电源） ，因此 ADC 转换的参考电压为 VCC 的值，即 5V。VIN-接地，而 VIN+连接 滑动变阻器 RV1 的输出， 因此 VIN+的电压输入范围为 0V～5V， 正好处于参考电压范围内。 引脚CS接地, WR和RD分别连接单片机的 P3^6 和 P3^7 引脚，而 DB0~DB7 连接单片机
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Байду номын сангаас 2012 年 8 月 6 日星期一
信号低电平有效，即WR信号由低电平变成高电平时，触发一次 ADC 转换。 RD：低电平有效，即RD=0 时，DAC0804 把转换完成的数据加载到 DB 口，可以通过 数据端口 DB0～DB7 读出本次的采样结果。 VIN（+）和 VIN（-） ：模拟电压输入端，单边输入时模拟电压输入接 VIN（+）端，VIN （-）端接地。双边输入时 VIN（+） 、VIN（-）分别接模拟电压信号的正端和负端。当输入 的模拟电压信号存在“零点漂移电压”时，可在 VIN（-）接一等值的零点补偿电压，变换 时将自动从 VIN（+）中减去这一电压。 VREF/2：参考电压接入引脚，该引脚可外接电压也可悬空，若外接电压，则 ADC 的参 考电压为该外界电压的两倍，如不外接，则 VREF 与 Vcc 共用电源电压，此时 ADC 的参考 电压即为电源电压 Vcc 的值。 CLKIN 和 CLKR： 外接 RC 振荡电路产生模数转换器所需的时钟信号， 时钟频率 CLK = 1/1.1RC，一般要求频率范围 100KHz～1460KHz。 AGND 和 DGND：分别接模拟地和数字地。 INTR：转换结束输出信号，低电平有效，当一次 A/D 转换完成后，将引起INTR=0，实际 应用时，该引脚应与微处理器的外部中断输入引脚相连（如 51 单片机的INT0，INT1脚） ， 当产生INTR信号有效时，还需等待RD=0 才能正确读出 A/D 转换结果，若 ADC0804 单独使 用，则可以将INTR引脚悬空。 DB0~DB7：输出 A/D 转换后的 8 位二进制结果。 补充说明：ADC0804 片内有时钟电路，只要在外部“CLKIN（引脚 4） ”和“CLKR（引脚 19） ” 两端外接一对电阻电容即可产生 A/D 转换所要求的时钟， 其振荡频率为 fCLK≈1/1.1RC。 其典型应用参数为：R=10KΩ ，C=150PF，fCLK≈640KHz，转换速度为 100μ ｓ。若采用外 部时钟， 则外部 fCLK 可从 CLKIN 端送入， 此时不接 R、 C。 允许的时钟频率范围为 100KHz～ 1460KHz。
AD421中文资料
这款DAC采用Σ-Δ架构，可保证16位单调性，且积分非线 性为±0.01%。该器件提供4 mA零电平输出电流(失调误差 为±0.1%)，以及20 mA满量程输出电流(增益误差为±0.2%)。
单位
条件/注释
精度 分辨率 单调性 积分非线性 失调(4 mA)(+25°C时)4 失调漂移 典型输出误差(20 mA) (+25°C时)4 总输出漂移 VCC电源灵敏度
16 16 ± 0.01 ± 0.1 ± 25 ± 0.2 ± 50 50
位 位(最小值) % FS(最大值) % FS(最大值) ppm FS/°C(最大值) % FS(最大值) ppm FS/°C(最大值) nA/mV(最大值)
FS = 满量程输出电流 VCC = 5 V 包括片内基准电压漂移 VCC = 5 V 包括片内基准电压漂移 25 nA/mV(典型值)
基准电压源 REF OUT2 输出电压 温漂
外部电流 VCC电源灵敏度 输出阻抗 噪声(0.1 Hz–10 Hz) REF OUT1
输出电压 温漂
外部电流 VCC电源灵敏度 输出阻抗 噪声(0.1 Hz–10 Hz) REF IN 输入电阻
7. AD421具有可编程报警电流功能，允许发射器通过发 送超量程电流来指示传感器故障。
HART是HART通信基金会的注册商标。
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Speci cationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
[教材]ADC0804_中文资料
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[教材]ADC0804_中文资料ADC0804_中文资料/CS 芯片选择信号。
/CS 芯片选择信号。
模拟/数字转换器(相关知识) A/D转换器的基本原理 ----ADC08041，所谓A/D转换器就是模拟/数字转换器(ADC)，是将输入的模拟信号转换成数字信号。
信号输入端可以是传感器或转换器的输出，而 ADC的数字信号也可能提供给微处理器，以便广泛地应用。
2，ADC0804的规格及引脚图8位COMS依次逼近型的A/D转换器.三态锁定输出存取时间:135US分辨率:8位转换时间:100US总误差:正负1LSB工作温度:ADC0804LCN---0~70度引脚图及说明见图1/RD外部读取转换结果的控制输出信号。
/RD为HI时，DB0~DB7处理高阻抗:/RD为 LO时，数字数据才会输出。
/WR:用来启动转换的控制输入，相当于ADC的转换开始(/CS=0时)，当/WR由HI变为LO时，转换器被清除:当/WR回到HI时，转换正式开始。
CLK IN，CLK R:时钟输入或接振荡无件(R，C)频率约限制在100KHZ~1460KHZ，如果使用RC电路则其振荡频率为1/(1.1RC)/INTR:中断请求信号输出,低地平动作.VIN(+) VIN(-) :差动模拟电压输入.输入单端正电压时, VIN(-)接地:而差动输入时,直接加入VIN(+) VIN(-).AGND,DGND:模拟信号以及数字信号的接地. VREF:辅助参考电压.DB0~DB7:8位的数字输出 .VCC: 电源供应以及作为电路的参考电压 .参考腾龙套件的0804原理图:十六进制二进制码与满刻度的比率相对电压值 VREF=2.560伏高四位字节低四位字节高四位电压低四位电压 F 1111 15/16 15/256 4.8000.300 E 1110 14/16 14/256 4.480 0.280 D 1101 13/16 13/256 4.160 0.260 C 1100 12/16 12/256 3.840 0.240. B 1011 11/16 11/256 3.520 0.220. A 101010/16 10/256 3.200 0.200 9 1001 9/16 9/256 2.880 0.180 8 1000 8/16 8/256 2.560 0.160 7 0111 7/16 7/256 2.240 0.140. 6 0110 6/16 6/256 1.920 0.120.5 0101 5/16 5/256 1.600 0.100 4 0100 4/16 4/256 1.280 0.080 3 0011 3/16 3/256 0.960 0.060 2 0010 2/16 2/256 0.640 0.040. 1 0001 1/16 1/256 0.320 0.020. 0 0000 0 0例:VIN=3V,由上表可知2. 880+0.120=3V 为10010110=96H功能说明1,ADC0804将输入模拟值转换成数字值输出到 P0,使相对应的LED亮.如输入3V,ADC0804的输出应为96H=10010110,此数字信号送入 8051的P1,再由P1存入8051的累加器,然后累加器再到P0,使相应的LED亮.2,先将ADC0804的参考电压 VREF调整为 2.56V.(在腾龙套件中主要演示原理，未作此精确调整电压，用2个1K电阻分压，约 2.5V)3调整ADC0804的VIN可变电阻器.由 0V调到5V根据其关系观察 P1的LED变化情形 .参考程序:;0804的基本应用，转动电位器，P0口显示取到的数;//定义ADC的连接端口 ad_cs equ P3.6 ad_wr equ P2.0 ad_rd equ P3.7ad_input_port equ p1org 0000h ajmp main org 0030hmain:lcall adc_demo ajmp main;//==========================================;// 启动 AD转换;//==========================================Adc_Start:clr ad_cs nopclr ad_wr nopsetb ad_wr nopsetb ad_cs nopret;//==========================================;// 读AD转换;//==========================================Adc_Read:mov ad_input_port,#0ffhclr ad_csnopclr ad_rdnopnopmov a,AD_INPUT_PORTnopsetb ad_rd nopsetb ad_cs ret;//==========================================;// AD转换读取延时程序，显示读到的数值;//==========================================Adc_Demo:lcall Adc_Start lcall delay1ms lcall adc_read clr p2.0 clr p2.3mov p0,aretdelay1ms:mov r7,#10 tt1: mov r6,#50djnz r6,$ ;2us djnz r7,tt1retend。
AD4111低功耗24位Σ-Δ型ADC数据手册说明书
Rev. 0Document FeedbackInformation furnished by Analog Devices is believed to be accurate and reliable.However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks andregistered trademarks are the property of their respective owners.One Technology Way, P .O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 ©2018 Analog Devices, Inc. All rights reserved. Technical Support /cnADI 中文版数据手册是英文版数据手册的译文，敬请谅解翻译中可能存在的语言组织或翻译错误，ADI 不对翻译中存在的差异或由此产生的错误负责。
如需确认任何词语的准确性，请参考ADI 提供的最低功耗24位Σ-Δ型ADC ，±10 V 和0 mA 至20 mA 输入，具有开路检测功能数据手册AD4111特性集成模拟前端的24位ADC每通道最高6.2 kSPS （每通道161μs ） 1 kSPS 时每通道16位无噪声分辨率50 Hz 和60 Hz 抑制：85 dB （20 SPS ，每通道） ±10 V 输入，4个差分或8个单端 超量程高达±20 V ≥1 MΩ阻抗25°C 时精度为±0.06% 开路检测0 mA 至20 mA 输入，4个单端 超量程从−0.5 mA 至+24 mA 60Ω阻抗25°C 时精度为±0.08% 片内2.5 V 基准电压源25°C 时精度为±0.12%，温漂为±5 ppm/°C （典型值） 内部或外部时钟 电源AVDD = 3.0 V 至5.5V IOVDD = 2 V 至5.5 V 总I DD = 3.9 mA温度范围：−40°C 至+105°C3线或4线串行数字接口（SCLK 上为施密特触发器） SPI 、QSPI 、MICROWIRE 和DSP 兼容应用过程控制 PLC 和DCS 模块概述AD4111是一款低功耗、低噪声、24位Σ-Δ型模数转换器(ADC)，集成了模拟前端(AFE)，支持全差分或单端、高阻抗(≥1MΩ)双极性±10 V 电压输入和0 mA 至20 mA 电流输入。
ADC0804最完整资料（内含驱动程序）
试验 模拟/数字转换芯片ADC0804的使用1、实验目的1．了解并测试模/数芯片ADC0804性能。
性能。
2．学习A/D 芯片ADC0804的接线和转换的基本原理。
2、试验内容2.1 模拟/数字转换的一些背景知识介绍模拟模拟//数字转换就是我们通常所说的A/D 转换，它将输入的模拟信号转换，它将输入的模拟信号((如电压如电压))转换成控制芯片转换成控制芯片((如单片机，如单片机，ARM)ARM)ARM)所能识别的二进制形式，然后经过运算，既可所能识别的二进制形式，然后经过运算，既可以还原出输入模拟信号的值。
以还原出输入模拟信号的值。
A/D 转换是一种非常重要的技术手段，是单片机等控制芯片与外界信号的接口部分，图1给出了一种常用的嵌入式设计模式。
A/D 转换芯片（如ADC0804）模拟电路处理器芯片（如51单片机） 显示(如八段数码管，LCD ，上位机软件)外界信号（如声音，血糖浓度，温度）电压值二进制形式控制信号传感器 电压值图1：一种常用的基于A/D 芯片的嵌入式设计模式由图1可见，这种设计模式包含以下几个环节。
可见，这种设计模式包含以下几个环节。
外界信号：外界信号的范围十分广泛，外界信号的范围十分广泛，自然界的一切信号，自然界的一切信号，自然界的一切信号，比如声音，比如声音，比如声音，温度甚至温度甚至是血糖浓度等都可以规类为外界信号。
是血糖浓度等都可以规类为外界信号。
传感器：因为大多数外界信号都不是电信号，因为大多数外界信号都不是电信号，因此需要通过各种传感器将这些外因此需要通过各种传感器将这些外界信号转换成电信号，例如：通过热电耦可以将温度转换成一个电压值。
模拟电路：设计模拟电路的原因主要有以下两点设计模拟电路的原因主要有以下两点1．由于外界信号的复杂性，使得传感器直接输出的电信号可能会存在一些问题（如不稳定），这些不稳定信号如果直接送到A/D 芯片进行采样，则最终结果可能使得最后的显示值来回乱跳，果可能使得最后的显示值来回乱跳，而无法确定待测的外界信号到底是多少。
ad811
AD811IntroductionAD811 is a high performance video amplifier that has been designed to fulfill the requirements of a wide range of video applications. It is a versatile device that combines high speed performance with low power consumption, making it suitable for various video signal processing tasks.Features•High Speed: AD811 operates at a bandwidth of 350 MHz, allowing it to handle high frequency video signals without any degradation in the signalquality.•Low Power Consumption: Despite its high speed performance, AD811 consumes only 4.5 mA of quiescent current, making it an energy-efficient choice for video applications.•Wide Supply Voltage Range: AD811 can operate within a supply voltage range of ±5 V to ±15 V, providing flexibility in different applications.•Excellent Video Performance: AD811 offers a differential gain of 0.015% and a differential phase of 0.03°, ensuring accurate and precise video signalamplification.•Voltage Feedback Architecture: With a voltage feedback architecture, AD811 achieves low distortion and excellent output voltage drive capability.•Adjustable Output Balance: Users can adjust the output balance to compensate for any inconsistencies in the video signal.ApplicationsAD811 is widely used in various video applications, including:Video Distribution AmplifiersAD811 can be used to amplify video signals in distribution amplifiers, ensuring that the signal quality is maintained across multiple output channels. With its high speed and low power consumption, AD811 is an ideal choice for such applications.Video Switching SystemsAD811 can be used in video switching systems to drive video signals to different output channels. Its high bandwidth and low distortion guarantee accurate and reliable video signal switching.Composite Video AmplifiersAD811 can be used to amplify composite video signals, enhancing the signal quality and ensuring that it can be displayed accurately on a screen or monitor.RGB Video AmplifiersAD811 can be used to amplify RGB video signals, maintaining the color accuracy and fidelity of the video output.Video Test EquipmentAD811 is commonly used in video test equipment to ensure accurate and precise measurements of video signals. Its high speed performance and excellent video performance make it a reliable choice for video signal testing.ConclusionAD811 is a high performance video amplifier that offers a combination of high speed performance, low power consumption, and excellent video quality. Its wide range of applications makes it a versatile choice for various video signal processing tasks. Whether it is used in video distribution amplifiers, video switching systems, or video test equipment, AD811 provides accurate and reliable amplification for video signals.。
ADC0804中文资料
AD0804简介最近做到A/D转换器，我有的那块FPGA上的AD是AD0804，到网上一搜，发现关于这个型号的文章不多，大部分都是关于AD0809的。
功夫不负有心人，我终于在一本书（《VHDL与数字电路设计》卢毅、赖杰编著，科学出版社）上找到关于AD0804的详细讲解，现在传上来以供大家参考。
ADC0804的管脚图如下所示它的主要电气特性如下：●工作电压：＋5V，即VCC＝＋5V。
●模拟输入电压范围：0～＋5V，即0≤Vin≤＋5V。
●分辨率：8位，即分辨率为1/28=1/256，转换值介于0～255之间。
●转换时间：100us（f CK＝640KHz时）。
●转换误差：±1LSB。
●参考电压：2.5V，即V ref＝2.5V。
1.ADC0804的转换原理ADC0804是属于连续渐进式（Successive Approximation Method）的A/D 转换器，这类型的A/D转换器除了转换速度快（几十至几百us）、分辨率高外，还有价钱便宜的优点，普遍被应用于微电脑的接口设计上。
以输出8位的ADC0804动作来说明“连续渐进式A/D转换器”的转换原理，动作步骤如下表示（原则上先从左侧最高位寻找起）。
第一次寻找结果：10000000 （若假设值≤输入值，则寻找位＝假设位＝1）第二次寻找结果：11000000 （若假设值≤输入值，则寻找位＝假设位＝1）第三次寻找结果：11000000 （若假设值>输入值，则寻找位＝该假设位＝0）第四次寻找结果：11010000 （若假设值≤输入值，则寻找位＝假设位＝1）第五次寻找结果：11010000 （若假设值>输入值，则寻找位＝该假设位＝0）第六次寻找结果：11010100 （若假设值≤输入值，则寻找位＝假设位＝1）第七次寻找结果：11010110 （若假设值≤输入值，则寻找位＝假设位＝1）第八次寻找结果：11010110 （若假设值>输入值，则寻找位＝该假设位＝0）这样使用二分法的寻找方式，8位的A/D转换器只要8次寻找，12位的A/D 转换器只要12次寻找，就能完成转换的动作，其中的输入值代表图1的模拟输入电压Vin2.分辨率与内部转换频率的计算对8位ADC0804而言，它的输出准位共有28＝256种，即它的分辨率是1/256，假设输入信号Vin为0～5V电压范围，则它最小输出电压是5V/256＝0.01953V，这代表ADC0804所能转换的最小电压值。
ADC0804中文资料_数据手册_参数
ad811与buf634p功放电路功率放大电路设计
ad811与buf634p功放电路功率放大电路设计AD811和BUF634P都是常用的功放电路芯片，可以用来设计功率放大电路。
本文将详细介绍AD811和BUF634P的特点、电路设计和注意事项。
AD811是一种高速、宽带的差分输入和单端输出的功率放大器。
它的特点是速度快、带宽宽、电压增益高、低输入偏置电流、低电流噪声和低失真等。
AD811的供电电压为±12V，最大输出电流为±50mA，最大功率为300mW。
它主要适用于音频和视频信号的放大以及驱动要求高速解调器的应用。
BUF634P是一种高精度、高输出驱动能力的运算放大器。
它的特点是输入阻抗高、输出阻抗低、失调电压低、电流噪声低、工作稳定性好等。
BUF634P的供电电压为±15V至±22V，输出电流可以达到100mA，最大功率为2W。
它适用于音频和高速数据接口信号的放大以及驱动功率要求高的负载。
设计AD811和BUF634P功率放大电路时，需要注意以下几点：1.电源供应：AD811和BUF634P分别需要正负电源供应。
在设计电源电路时，需要选择合适的电源电压，并保证电源电压的稳定性。
2.差分输入：AD811的输入为差分输入，需要使用差分输入信号源。
可以使用差分放大器或者差分线路作为输入，以实现信号的差分输入。
3.单端输出：AD811的输出为单端输出，BUF634P可以直接驱动负载。
可以使用适当的级联电阻网络实现单端输出。
4.反馈电路：为了实现增益控制和稳定工作，可以使用反馈电路连接AD811和BUF634P。
反馈电路可以通过改变反馈电阻的大小来调节输出电压增益。
5.耦合电容：为了阻隔直流偏置电压和阻止低频信号通过，可以在输入和输出端添加耦合电容。
耦合电容的选取需要根据具体的应用需求确定。
6.温度和保护：在设计中考虑到温度和保护问题也是必要的。
可以通过添加温度传感器、过热保护电路、过流保护电路等来提高电路的稳定性和可靠性。
ADC0804Philips说明书翻译
ADC0804Philips说明书翻译ADC0804翻译ADC0804说明书ADC0803芯片族是一个系列，它是由三个8位的CMOS逐次采用逐次比较型的A / D转换器和一系列的电容外加一个自动调零的比较器组成的。
这些转换器是为了满足使微处理器的控制总线使用最少的外部线路而设计的。
三态输出数据线可以直接连接到数据总线上。
差分模拟输入电压能够有助于共模抑制，并提供了一种调整零刻度偏移方法。
此外，参考电压的输入提供了一种手段将晓得模拟电压编码成为一个完整的8位编码。
?5 V单电源?保证规格为1 MHz的CLOC图1.引脚说明应用?传感器到微处理器接口?数字温度计?数字控制的自动调温器?微处理器为基础的监测和控制系统特点?兼容大多数微处理器?差分输入?三态输出?逻辑电平与TTL兼容的MOS ?可使用内部或外部时钟使用?模拟输入范围为0 V至V CC订购信息1ADC0804翻译极限参数注意：1避免环境温度高于25 °C，遵循如下比率：N封装为13.5 mW/°C;D 封装为11.1 mW/°C.框图图2.框图2ADC0804翻译直流电气特性注意：1、逻辑电压输入必须保持在：–0.05 ≤V IN ≤V CC + 0.05 V；2、参考输入典型电压VCC =5 V；3、为了防止锁存错误，V REF /2 和V IN必须在Vcc已经打开的前提下才可以使用。
3ADC0804翻译AC电气特性1. 精度最好保证在f CLK=1MHz。
在更高的时钟频率时，准确度可能会降低。
功能描述该设备采用逐次比较型。
模拟开关由于连续相近的逻辑值被顺序地关闭，直到输入到自动调零比较器的电压[V IN（+）- V IN（- ）]与解码器的电压相匹配。
在所有的位被测试和确定后，与输入电压相应的8位二进制码被输送到输出锁存器上。
如果在CS输入为低且WR有一个脉冲传来则转换开始。
当WR或者CS的输入端发生了一个有高电平到低电平的跳变信号，SAR被初始化，移位寄存器复位，而INTR输出被设置为高电平。
常用AD芯片介绍共7页word资料
目前生产AD/DA的主要厂家有ADI、TI、BB、PHILIP、MOTOROLA等，武汉力源公司拥有多年从事电子产品的经验和雄厚的技术力量支持，已取得排名世界前列的模拟IC生产厂家ADI、TI 公司代理权，经营全系列适用各种领域/场合的AD/DA器件。
1. AD公司AD/DA器件AD公司生产的各种模数转换器(ADC)和数模转换器(DAC)(统称数据转换器)一直保持市场领导地位，包括高速、高精度数据转换器和目前流行的微转换器系统（MicroConvertersTM )。
1）带信号调理、1mW功耗、双通道16位AD转换器：AD7705AD7705是AD公司出品的适用于低频测量仪器的AD转换器。
它能将从传感器接收到的很弱的输入信号直接转换成串行数字信号输出，而无需外部仪表放大器。
采用Σ-Δ的ADC，实现16位无误码的良好性能，片内可编程放大器可设置输入信号增益。
通过片内控制寄存器调整内部数字滤波器的关闭时间和更新速率，可设置数字滤波器的第一个凹口。
在+3V电源和1MHz主时钟时， AD7705功耗仅是1mW。
AD7705是基于微控制器（MCU）、数字信号处理器（DSP）系统的理想电路，能够进一步节省成本、缩小体积、减小系统的复杂性。
应用于微处理器（MCU）、数字信号处理（DSP）系统，手持式仪器，分布式数据采集系统。
2）3V/5V CMOS信号调节AD转换器：AD7714AD7714是一个完整的用于低频测量应用场合的模拟前端，用于直接从传感器接收小信号并输出串行数字量。
它使用Σ-Δ转换技术实现高达24位精度的代码而不会丢失。
输入信号加至位于模拟调制器前端的专用可编程增益放大器。
调制器的输出经片内数字滤波器进行处理。
数字滤波器的第一次陷波通过片内控制寄存器来编程，此寄存器可以调节滤波的截止时间和建立时间。
AD7714有3个差分模拟输入（也可以是5个伪差分模拟输入）和一个差分基准输入。
单电源工作（+3V或+5V）。
ADC0804资料
ADC0804是用CMOS集成工艺制成的逐次比较型摸数转换芯片。
分辨率8位，转换时间100μs，输入电压范围为0~5V。
该芯片内有输出数据锁存器，当与计算机连接时，转换电路的输出可以直接连接在CPU数据总线上，无须附加逻辑接口电路。
A/D 转换器数据输出端，该输出端具有三态特性，能与微机总线相接。
ADC0804控制信号的时序图
例一：如图所示，用中断的方法实现A/D转换，并将转换结果放到片内RAM 23H单元.
ORG 0000H
LSMP MAIN
ORG 0013H
LJMP INT000
MAIN: MOV IE,#84H INT111: CLR P.7
CLR P1.0 NOP
CLR P2.6 NOP
NOP SETB P2.7
SETB P2.6 MOV 23H,A
SJMP $ RETI
例二：如图所示，用中断的方法实现A/D转换，并将转换结果放到片内RAM 20H单元.
ORG 0000H
LSMP MAIN
ORG 0003H
LJMP INT000
MAIN: MOV IE,#81H INT000: MOVX A,@DPTR
MOV DPTR,#0EFFFH MOV 20H,A
MOVX @DPTR,A RETI
SJMP $。
AD 芯片资料中文版
AD9954- Direct Digital Synthesizer400 MSPS 14-Bit, 1.8 V CMOS功能： (2)应用 (2)概述 (2)AD9954电气特性 (3)最大操作范围 (4)Table 2. (4)管脚定义 (4)管脚功能描述 (4)典型的性能特性 (6)原理 (7)器件块 (7)控制寄存器位描述 (10)Other Register Descriptions 其他寄存器描述 (14)Programming AD9954 Features-- AD9954编程特性 (18)SERIAL PORT OPERATION串口操作 (19)INSTRUCTION BYTE指令字节 (20)SERIAL INTERFACE PORT PIN DESCRIPTION串行接口管脚描述 (20)MSB/LSB TRANSFERS (20)RAM I/O VIA SERIAL PORT (21)Power-Down Functions of the AD9954 AD9954省电功能 (21)功能：400MSPS 内部时钟 集成14位DAC可编程相位/幅度抖动 32位控制字相位噪声小于等于-120dbc/Hz@1kHz(DAC 输出)出色的动态性能>80db SFDR@160MHz （偏离100KHz ） 串行I/O 口控制 超高速模拟比较器 自动线性和非线性扫频能力 4种频率/相位偏移坡面 1.8v 电压供电软件或者硬件控制休眠内部集成1024字节*32位RAM 大多数输入口支持5v 电平PLL REFCLK 乘法器（4倍-20倍） 单晶振驱动内部时钟 相位调制能力 多芯片同步 应用敏捷LO 频率输出 可编程的时钟发生器雷达和扫频系统中的FM 啁啾源自动雷达测试和测量设备 声光设备驱动概述AD9954具有一个14位DAC 最高达400 MSPS 的DDS 。
AD9954使用了先进的DDS 技术，内部集成高速，高性能的DAC 形成数字可编程，完整的高频合成器，能产生高达200MHz 模拟正弦波的能力。
ADC0801S040TS中文资料
ADC0801S040Single 8 bits ADC, up to 40 MHzRev. 02 — 18 August 2008Product data sheet1.General descriptionThe ADC0801S040 is an 8-bit universal analog-to-digital converter (ADC) for video andgeneral purpose applications. It converts the analog input signal from 2.7 V to 5.5 V into8-bit binary-coded digital words at a maximum sampling rate of 40 MHz. All digital inputsand outputs are CMOS/T ransistor-Transistor Logic(TTL)compatible.A sleep mode allowsreduction of the device power consumption to 4 mW.2.FeaturesI8-bit resolutionI Operation between 2.7 V and 5.5 VI Sampling rate up to 40 MHzI DC sampling allowedI High signal-to-noise ratio over a large analog input frequency range (7.3 effective bitsat 4.43 MHz full-scale input at f clk = 40 MHz)I CMOS/TTL compatible digital inputs and outputsI External reference voltage regulatorI Power dissipation only 30 mW (typical value)I Low analog input capacitance, no buffer amplifier requiredI Sleep mode (4 mW)I No sample-and-hold circuit required3.ApplicationsI Video data digitizingI CameraI CamcorderI Radio communicationI Car alarm system4.Quick reference data5.Ordering informationTable 1.Quick reference dataV DDA =V5to V6=3.3V;V DDD =V3to V4=3.3V;V DDO =V20to V11=3.3V;V SSA ,V SSD and V SSO shorted together; V i(a)(p-p) = 1.84 V; C L = 20 pF; T amb = 0°C to 70°C; typical values measured at T amb = 25°C unless otherwise specified.Symbol Parameter ConditionsMin Typ Max Unit V DDA analog supply voltage 2.7 3.3 5.5V V DDD digital supply voltage 2.7 3.3 5.5V V DDO output supply voltage2.53.3 5.5V ∆V DD supply voltage difference V DDA − V DDD −0.2-+0.2V V DDD − V DDO −0.2-+2.25V I DDA analog supply current -46mA I DDD digital supply current -58mA I DDO output supply current f clk = 40 MHz; ramp input;C L =20pF-12mA INL integralnon-linearity ramp input; see Figure 6-±0.5±0.75LSB DNL differential non-linearity ramp input; see Figure 7-±0.25±0.5LSB f clk(max)maximum clockfrequency 40--MHzP tottotal power dissipationV DDA =V DDD =V DDO =3.3 V -3053mWTable 2.Ordering informationType numberPackage NameDescriptionVersion ADC0801S040TSSSOP20plastic shrink small outline package; 20 leads; body width 4.4mmSOT266-16.Block diagramFig 1.Block diagram79R lad810RB RM RTVI3V DDD 5V DDA 2CMOS OUTPUTSLATCHESCLOCK DRIVER014aaa4951CLK SLEEPADC0801S04020V DDO6V SSAanalog grounddigital ground4V SSD 11V SSOoutput groundanalog voltage inputdata outputsLSB MSB19D718D617D516D415D314D213D112D0ANALOG - TO - DIGIT ALCONVERTER7.Pinning information7.1Pinning7.2Pin descriptionFig 2.Pin configurationADC0801S040TSCLK V DDO SLEEP D7V DDD D6V SSD D5V DDA D4V SSA D3RB D2RM D1VID0RT V SSO014aaa4941234567891012111413161518172019Table 3.Pin descriptionSymbol Pin Description CLK 1clock input SLEEP 2sleep mode inputV DDD 3digital supply voltage (2.7 V to 5.5 V)V SSD 4digital groundV DDA 5analog supply voltage (2.7 V to 5.5 V)V SSA 6analog groundRB 7reference voltage BOTTOM input RM 8reference voltage MIDDLE VI 9analog input voltage RT 10reference voltage TOP input V SSO 11output stage groundD012data output; bit 0 (Least Significant Bit (LSB))D113data output; bit 1D214data output; bit 2D315data output; bit 3D416data output; bit 4D517data output; bit 58.Limiting values[1]The supply voltages V DDA , V DDD and V DDO may have any value between −0.3 V and +7.0 V provided that the supply voltage ∆V DD remains as indicated.9.Thermal characteristics10.CharacteristicsD618data output; bit 6D719data output; bit 7 (Most Significant Bit (MSB))V DDO20positive supply voltage for output stage (2.7 V to 5.5 V)Table 3.Pin description …continuedSymbol Pin Description Table 4.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol ParameterConditionsMin Max Unit V DDA analog supply voltage [1]−0.3+7.0V V DDD digital supply voltage [1]−0.3+7.0V V DDO output supply voltage [1]−0.3+7.0V ∆V DDsupply voltage differenceV DDA −V DDD ;V DDD −V DDO ;V DDA −V DDO −0.1+4.0VV I input voltage referenced to V SSA−0.3+7.0V V i(clk)(p-p)peak-to-peak clock input voltage referenced toV SSD -V DDD V I O output current -10mA T stg storage temperature −55+150°C T amb ambient temperature −20+75°C T jjunction temperature-150°CTable 5.Thermal characteristics Symbol ParameterCondition Value Unit R th(j-a)thermal resistance from junction to ambientin free air120K/WTable 6.CharacteristicsV DDA =V5to V6=3.3V;V DDD =V3to V4=3.3V;V DDO =V20to V11=3.3V;V SSA ,V SSD and V SSO shorted together;V i(a)(p-p)= 1.84 V; C L = 20 pF; T amb = 0°C to 70°C; typical values measured at T amb = 25°C unless otherwise specified.Symbol ParameterConditions Min Typ Max Unit Supplies V DDA analog supply voltage 2.7 3.3 5.5V V DDD digital supply voltage 2.7 3.3 5.5VV DDOoutput supply voltage2.53.35.5∆V DD supply voltage difference V DDA−V DDD−0.2-+0.2VV DDD−V DDO−0.2-+2.25VI DDA analog supply current-46mAI DDD digital supply current-58mAI DDO output supply current f clk= 40 MHz; ramp input;C L=20pF-12mAP tot total power dissipation V DDA=V DDD=V DDO=3.3V-3053mW InputsClock input CLK (Referenced to V SSD)[1]V IL LOW-level input voltage0-0.3 V DDD VV IH HIGH-level input voltage V DDD≤ 3.6 V0.6 V DDD-V DDD VV DDD > 3.6 V0.7 V DDD-V DDD VI IL LOW-level input current V clk = 0.3 V DDD−10+1µAI IH HIGH-level input current V clk = 0.7 V DDD--5µAZ i input impedance f clk= 40 MHz-4-kΩC i input capacitance f clk= 40 MHz-3-pF Input SLEEP (Referenced to V SSD); see Table8V IL LOW-level input voltage0-0.3 V DDD VV IH HIGH-level input voltage V DDD≤ 3.6 V0.6 V DDD-V DDD VV DDD > 3.6 V0.7 V DDD-V DDD VI IL LOW-level input current V IL = 0.3 V DDD−1--µAI IH HIGH-level input current V IH = 0.7 V DDD--+1µA Analog input VI (Referenced to V SSA)I IL LOW-level input current V I = V RB-0-µAI IH HIGH-level input current V I = V RT-9-µAZ i input impedance f i= 1 MHz-20-kΩC i input capacitance f i= 1 MHz-2-pF Reference voltages for the resistor ladder; see Table7V RB voltage on pin RB 1.1 1.2-VV RT voltage on pin RT V RT≤ V DDA 2.7 3.3V DDA VV ref(dif)differential referencevoltageV RT−V RB 1.5 2.1 2.7VI ref reference current-0.95-mAR lad ladder resistance- 2.2-kΩTC Rlad ladder resistortemperature coefficient-4092- mΩ/K V offset offset voltage BOTTOM[2]-170-mVTOP[2]-170-mVV i(a)(p-p)peak-to-peak analoginput voltage [3] 1.4 1.76 2.4VTable 6.Characteristics …continuedV DDA=V5to V6=3.3V;V DDD=V3to V4=3.3V;V DDO=V20to V11=3.3V;V SSA,V SSD and V SSO shorted together;V i(a)(p-p) = 1.84 V; C L = 20 pF; T amb = 0°C to 70°C; typical values measured at T amb = 25°C unless otherwise specified.Symbol Parameter Conditions Min Typ Max UnitDigital outputs D7 to D0 and IR (Referenced to V SSD )V OL LOW-level output voltageI O = 1 mA 0-0.5V V OH HIGH-level output voltageI O =−1 mAV DDO −0.5-V DDO V I OZ OFF-state output current 0.4V <V O <V DDO −20-+20µA Clock input CLK; see Figure 4[1]f clk(max)maximum clock frequency40--MHz t w(clk)H HIGH clock pulse width 9--ns t w(clk)L LOW clock pulse width9--nsAnalog signal processing (f clk = 40 MHz)Linearity INL integral non-linearity ramp input; see Figure 6-±0.5±0.75LSB DNL differential non-linearityramp input; see Figure 7-±0.25±0.5LSB Bandwidth Bbandwidthfull-scale sine wave [4]-10MHz 75 % full-scale sine wave -13MHz 50 % full-scale sine wave -20MHz small signal at mid scale;V i =±10 LSB at code 128-350MHzInput set response; see Figure 8[5]t s(LH)LOW to HIGH settling timefull-scale square wave -35ns t s(HL)HIGH to LOW settling timefull-scale square wave-35nsHarmonics; see Figure 9[6]THD total harmonic distortion f i =4.43MHz -−50-dB Signal-to-Noise ratio; see Figure 9[6]S/Nsignal-to-noise ratiowithout harmonics;f i =4.43MHz -47-dBEffective bits; see Figure 9[6]ENOBeffective number of bitsf i =300MHz -7.8-bits f i =4.43MHz-7.3-bitsDifferential gain [7]G difdifferential gainPAL modulated ramp- 1.5-%Table 6.Characteristics …continuedV DDA =V5to V6=3.3V;V DDD =V3to V4=3.3V;V DDO =V20to V11=3.3V;V SSA ,V SSD and V SSO shorted together;V i(a)(p-p)= 1.84 V; C L = 20 pF; T amb = 0°C to 70°C; typical values measured at T amb = 25°C unless otherwise specified.Symbol Parameter Conditions Min Typ Max Unit[1]In addition to a good layout of the digital and analog ground,it is recommended that the rise and fall times of the clock must not be less than 1 ns.[2]Analog input voltages producing code 0 up to and including code 255:a)V offset BOTTOM is the difference between the analog input which produces data equal to 00 and the reference voltage on pin RB(V RB ) at T amb = 25°C.b)V offset TOP is the difference between the reference voltage on pin RT (V RT )and the analog input which produces data outputs equal to code 255 at T amb = 25°C .[3]To ensure the optimum linearity performance of such a converter architecture the lower and upper extremities of the converter reference resistor ladder are connected to pins RB and RT via offset resistors R OB and R OT as shown in Figure 3.a)The current flowing into the resistor ladder is and the full-scale input range at the converter, to cover code 0to 255 is b)Since R L , R OB and R OT have similar behavior with respect to process and temperature variation, the ratio will be kept reasonably constant from device to device.Consequently variation of the output codes at a given input voltage depends mainly on the difference V RT − V RB and its variation with temperature and supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the matching between each of them is optimized.[4]The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSB, nor any significant attenuation is observed in the reconstructed signal.[5]The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square wave signal) in order to sample the signal and obtain correct output data.[6]Effective bits are obtained via a Fast Fourier T ransform (FFT) treatment taking 8000 acquisition points per equivalent fundamentalperiod. The calculation takes into account all harmonics and noise up to half of the clock frequency (Nyquist frequency). Conversion to signal-to-noise ratio: S/N = ENOB × 6.02 + 1.76 dB.[7]Measurement carried out using video analyzer VM700A, where video analog signal is reconstructed through a DAC.[8]Output data acquisition: the output data is available after the maximum delay time of t d(o).Differential phase [7]ϕdif differential phase PAL modulated ramp-0.25-deg Timing (f clk = 40 MHz; C L = 20 pF); see Figure 4[8]t d(s)sampling delay time --5ns t h(o)output hold time 5 --ns t d(o)output delay timeV DDO = 4.75 V 81215ns V DDO = 3.15 V 81720ns V DDO = 2.7 V81821ns 3-state output delay times; see Figure 5t dHZ active HIGH to float delay time-1418ns t dZL float to active LOW delay time-1620ns t dZH float to active HIGH delay time-1620ns t dLZactive LOW to float delay time-1418nsTable 6.Characteristics …continuedV DDA =V5to V6=3.3V;V DDD =V3to V4=3.3V;V DDO =V20to V11=3.3V;V SSA ,V SSD and V SSO shorted together;V i(a)(p-p)= 1.84 V; C L = 20 pF; T amb = 0°C to 70°C; typical values measured at T amb = 25°C unless otherwise specified.Symbol Parameter ConditionsMin Typ Max Unit I V RT V RB –R OB R L R OT++----------------------------------------=V I R L I L ×R LR OB R L R OT++----------------------------------------V RT V RB +()×0.838V RT V RB –()×===R LR OB R L R OT++----------------------------------------11.Additional information relating to Table 6Fig 3.Explanation of Table 6Table note 3014aaa504RTRBRMR ladR OTR LR LR LR LI LR OBcode 255code 0976Table 7.Output coding and input voltage (typical values; referenced to V SSA )Code V i(a)(p-p) (V)Binary outputs D7to D0Underflow < 1.37000000000 1.37000000001-00000001↓-↓254-11 1111 10255 3.1311 1111 11Overflow > 3.1311 1111 11Table 8.Mode selectionSLEEP D7 to D0I DDA + I DDD (typ)1high impedance 1.2 mA 0active9 mAFig 4.Timing diagramsample N + 1sample N CLK 014aaa508sample N + 2sample N + 1sample N sample N + 250 %VIDATA D0 to D7V DDO0 V50 %DATA N + 1DA TA N DAT A N − 1DATA N − 2t d(o)t w(clk)Ht w(clk)Lt d(s)t h(o)frequency on pin SLEEP = 100 kHz.Fig 5.Timing diagram and test conditions of 3-state output delay timeLOWHIGHHIGHLOWADC0801S040V DDD V DDDS1SLEEPSLEEPoutput dataoutput data10 %50 %50 %90 %50 %t dLZt dZLt dHZt dZH20 pF3.3 k ΩS1TESTV DDD t dLZ V DDD t dZL GNDt dZHt dHZ GND 014aaa496Fig 6.Typical Integral Non-Linearity (INL) performance014aaa501−0.0470.065−0.1600.1780.291A (LSB)−0.272codes027220468136Fig 7.Typical Differential Non-Linearity (DNL) performance014aaa502−0.0250.032−0.840.0910.150A (LSB)−0.143codes027220468136Fig 8.Analog input settling-time diagram014aaa497code 255code 050 %50 %CLK VI t s(LH)t s(HL)50 %50 %5 ns 5 ns2 ns 2 nsEffective bits: 7.32; THD =−51.08 dB.Harmonic levels (dB): 2nd =−68.99; 3rd =−51.62; 4th =−66.05; 5th =−63.23; 6th =−72.79.Fig 9.Typical fast Fourier transform (f clk = 40 MHz; f i = 4.43 MHz)f (MHz)020.015.05.010.0014aaa503−80−400A (dB)−120Fig 10.CMOS data outputs Fig 11.VI analog inputFig 12.SLEEP 3-state inputFig 13.RB, RM and RT inputs014aaa498V DDOD7 to D0V SSOV DDAVIV SSA014aaa505014aaa499V DDOV SSOSLEEPV DDARTRMRBV SSA014aaa506R LR LR LR LV DDDCLK1/2 V DDDV SSD014aaa507 Fig 14.CLK input12.Application information12.1Application diagramsThe analog and digital supplies should be separated and decoupled.The external voltage reference generator must be built in such a way that a good supply voltage ripple rejection is achieved with respect to the LSB value.Eventually,the reference ladder voltages can be derived from a well regulated V DDA supply through a resistor bridge and a decoupling capacitor.(1) RB, RM, RT are decoupled to V SSA .Fig 15.Application diagram100 nF100 nF100 nFCLK SLEEP V DDD V SSD V DDA V SSA V SSAV SSAV SSARB(1)RM(1)VIRT(1)V DDO D7D6D5D4D3D2D1D0V SSO1234567891011122019181716151413ADC0801S040014aaa50013.Package outlineFig 16.Package outline SOT266-1 (SSOP20)UNIT A 1A 2A 3b p c D (1)E (1)(1)e H E L L p Q Z y w v θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTIONISSUE DATE IECJEDEC JEITAmm0.1501.41.20.320.200.200.136.66.44.54.30.6510.26.66.20.650.450.480.18100oo 0.130.1DIMENSIONS (mm are the original dimensions)Note1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.0.750.45SOT266-1MO-15299-12-2703-02-19w MθAA 1A 2b pD H EL p Qdetail XE ZecLv M AX(A )3Ay0.251102011pin 1 index0 2.5 5 mmscaleSSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mmSOT266-1Amax.1.514.Revision historyTable 9.Revision historyDocument ID Release date Data sheet status Change notice Supersedes ADC0801S040_220080818Product data sheet-ADC0801S040_1 Modifications:•Corrections made to table notes in Figure1.•Corrections made to Table3.•Corrections made to symbol in Table4.•Corrections made to Table6.•Corrections made to Figure13ADC0801S040_120080612Product data sheet--15.Legal information15.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term ‘short data sheet’ is explained in section “Definitions”.[3]The product status of device(s)described in this document may have changed since this document was published and may differ in case of multiple devices.The latest product status information is available on the Internet at URL .15.2DefinitionsDraft —The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet —A short data sheet is an extract from a full data sheet with the same product type number(s)and title.A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.15.3DisclaimersGeneral —Information in this document is believed to be accurate andreliable.However,NXP Semiconductors does not give any representations or warranties,expressed or implied,as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes —NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and without notice.This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use —NXP Semiconductors products are not designed,authorized or warranted to be suitable for use in medical, military, aircraft,space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications —Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Limiting values —Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134)may cause permanent damage to the device.Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. 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In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license —Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant,conveyance or implication of any license under any copyrights,patents or other industrial or intellectual property rights.Quick reference data —The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding.15.4TrademarksNotice:All referenced brands,product names,service names and trademarks are the property of their respective owners.16.Contact informationFor more information, please visit:For sales office addresses, please send an email to:salesaddresses@Document status [1][2]Product status [3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development.Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheetProductionThis document contains the product specification.17.Contents1General description. . . . . . . . . . . . . . . . . . . . . . 12Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Quick reference data. . . . . . . . . . . . . . . . . . . . . 25Ordering information. . . . . . . . . . . . . . . . . . . . . 26Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 37Pinning information. . . . . . . . . . . . . . . . . . . . . . 47.1Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47.2Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 48Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 59Thermal characteristics. . . . . . . . . . . . . . . . . . . 510Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 511Additional information relating to Table6. . . . 912Application information. . . . . . . . . . . . . . . . . . 1512.1Application diagrams . . . . . . . . . . . . . . . . . . . 1513Package outline . . . . . . . . . . . . . . . . . . . . . . . . 1614Revision history. . . . . . . . . . . . . . . . . . . . . . . . 1715Legal information. . . . . . . . . . . . . . . . . . . . . . . 1815.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . 1815.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1815.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 1815.4T rademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 1816Contact information. . . . . . . . . . . . . . . . . . . . . 1817Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2008.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@Date of release: 18 August 2008。
功率放大AD811模块
功率放大AD811模块1. 模块功能 (1)2. 内部结构 (1)3. 电路原理图 (1)3.1功率放大AD811模块原理图 (1)3.2功率放大AD811模块印制版图 (2)3.3功率放大AD811模块印制版图（丝印层顶层） (3)4. 参考文献 (3)5. 使用方法 (3)6. 测试数据和截图 (3)7. 其他 (3)1. 模块功能AD811视频运算放大器是美国ADI公司推出的视频运算放大器系列产品中的一种产品, 具有高速、高频、宽频带、低噪声等优异特性, 并且是电流反馈运算放大器。
它针对广播质量级的视频系统进行了优化设计。
因此, 在视频系统的电子线路中, 是一种极好的首选器件。
本模块AD811将信号放大10倍后，然后设计了四级并联的高速缓冲器BUF634实现扩流。
AD811的单位增益带宽等于140MHz，压摆率S R=2500V/μs，由于AD811的带宽是随着增益变化的，当放大倍数很大时，频宽就会很窄，为了保证带宽范围足够大、放大倍数足够大，我们选取AD811的放大倍数为10，保证了可通过的带宽频率，并提高电路的稳定性。
BUF634是一种高速单位增益开环缓冲器，它可用于到运算放大器的反馈环路内增加输出电流，消除热反馈改善电容负载驱动。
对于低功耗应用，BUF634经营 1.5毫安静态电流250mA 输出， 2000V/ms压摆率和30MHz带宽。
带宽可以从30MHz到180MHz的调整 V型和BW引脚之间连接一个电阻。
输出电路是完全由内部电流保护限制和热关机坚固性和易于使用。
四级BUF634并联，采用+-18V供电，保证了带负载的能力。
2. 内部结构AD811引脚端封装形式，如图2.1.1所示。
图2.1.1 AD811引脚端封装形式图3. 电路原理图3.1功率放大AD811模块原理图图3.1.1功率放大AD811模块原理图3.2功率放大AD811模块印制版图图3.2.1功率放大AD811模块印制版图3.3功率放大AD811模块印制版图（丝印层顶层）图3.3.1功率放大AD811模块印制版图（丝印层顶层）4. 参考文献[1] 钟济南. 高性能视频运算放大器AD811的应用[J].电视技术,1994年第9期，P48-P54[2] 吴星明.AD811视频运算放大器的主要技术性能及其应用[J].电子技术应用,1995年7月,P40-P44[3] Analog Devices, Inc. High Performance Video Op Amp AD811[EB/OL]. 5. 使用方法6. 测试数据和截图7. 其他。
ASM811, ASM812 4 Pin
ASM811, ASM812 October 2003rev 1.04 Pin µP Voltage Supervisor with Manual ResetGeneral DescriptionThe ASM811/ASM812 are cost effective low power supervisors designed to monitor voltage levels of 3.0V, 3.3V and 5.0V power supplies in low-power microprocessor (µP), microcontroller (µC) and digital systems. They provide excellent reliability by eliminating external components and adjustments.A reset signal is issued if the power supply voltage drops below a preset reset threshold and is asserted for at least 140ms after the supply has risen above the reset threshold. The ASM811 has an active-low output RESET that is guaranteed to be in the correct state for V CC down to 1.1V. The ASM812 has an active-high RESET output. The reset comparator is designed to ignore fast transients on V CC. A debounced manual reset input allows the user to manually reset the systems to bring them out of locked state.Low power consumption makes the ASM811/ASM812 ideal for use in portable and battery operated equipment. The ASM811/ ASM812 are available in a compact 4-pin SOT-143 package and thus use minimal board space.Six voltage thresholds are available to support 3V to 5V systems:Features•New 4.0V threshold option•9µA supply current•Monitor 5V, 3.3V and 3V supplies•Manual reset input•140ms min. reset pulse width•Guaranteed over temperature•Active-low reset valid with 1.1V supply (ASM811)•Small 4-pin SOT-143 package•No external components•Power-supply transient-immune designRESET THRESHOLDSuffix VoltageL 4.63M 4.38J 4.00T 3.08S 2.93R 2.63Applications•Computers and Controllers •Embedded controllers•Portable/Battery operated systems •Intelligent instruments •Wireless communication systems •PDAs and handheld equipment •Automotive systems•Safety Systems Typical Operating CircuitV CCV CCV CCµPRESETInputRESET(RESET)GNDGND(RESET)MR查询ASM812SEUS-T供应商捷多邦，专业PCB打样工厂，24小时加急出货ASM811, ASM812October 2003rev 1.0Pin Diagram:Block DiagramPin DescriptionPin #Pin Name FunctionASM811ASM81211GND Ground.2 -RESETRESET is asserted LOW if V CC falls below V TH and remains LOW for T RST after V CC exceeds the Threshold. In addition, RESET is active LOW as long as the manual reset is low.-2RESETRESET is asserted HIGH if V CC falls below V TH and remains HIGH for T RST after V CC exceeds the threshold. In addition, RESET is active HIGH as long as the manual reset is low.33MRManual Reset Input. A logic LOW on MR asserts reset. Reset remains active as long as MR is LOW and for T MRST after MR returns HIGH. The active low input has an internal 20k Ω pull-up resistor. The input should be left open if not used. It can be driven by TTL or CMOS logic or shorted to ground by a switch.44V CCPower supply input voltage (3.0V, 3.3V, 5.0V)Detailed DescriptionA proper reset input enables a microprocessor /microcontroller to start in a known state. ASM811/812 assert reset to prevent code execution errors during power-up, power-down and brown-out conditions.Reset TimingThe reset signal is asserted- LOW for the ASM811 and HIGH for the ASM812- when the V CC supply voltage falls below the threshold trip voltage and remains asserted for 140ms minimum after the V CC has risen above the threshold.Manual Reset (MR) InputA logic low on MR assserts RESET LOW on the ASM811 and RESET HIGH on the ASM812. MR is internally pulled high through a 20k Ω resistor and can be driven by TTL/CMOS gates or with open collector/drain outputs. MR can be left open if not used. MR may be connected to ground through a normally-open momentary switch without an external debounce circuit.A 0.1µF capacitor from MR to ground can be added for additional noise immunity.123SOT143ASM811(ASM812)GNDRESETV CC(RESET)4MR+-RESET Generator-+V CCRESET (RESET)GNDASM811(ASM812)4.38V 4.00V 3.08V 2.93V 2.63V4.38V 4.63V MR 20k ΩV CCASM811, ASM812October 2003rev 1.0Reset Output OperationIn µP / µC systems it is important to have the processor and the system begin operation from a known state. A reset output to a processor is provided to prevent improper operation during power supply sequencing or low voltage brown-out conditions.The ASM811/812 are designed to monitor the system power supply voltages and issue a reset signal when the levels are out of range. RESET outputs are guaranteed to be active for V CC above 1.1V. When V CC exceeds the reset threshold, an internal timer keeps RESET active for the reset timeout period, after which RESET becomes inactive (HIGH for the ASM811 and LOW for the ASM812). If V CC drops below the reset threshold, RESET automatically becomes active.Alternatively, external circuitry or an operator can initiate this condition using the Manual Reset (MR) pin. MR can be left open if it is not used. MR can be driven by TTL/CMOS logic or even an external switch.Valid Reset with V CC under 1.1VTo ensure logic inputs connected to the ASM811 RESET pin are in a known state when V CC is under 1.1V, a 100k Ω pull-down resistor at RESET is needed. The value is not critical.A 100k Ω pull-up resistor to V CC is needed with the ASM812.Application InformationNegative VCC TransientsTypically short duration transients of 100mV amplitude and 20µs duration do not cause a false RESET. A 0.1µF capacitor at V CC increses transient immunity.Bidirectional Reset Pin InterfacingThe ASM811/812 can interface with µP / µC bi-directional reset pins by connecting a 4.7k Ω resistor in series with the ASM811/812 reset output and the µP/µC bi-directional reset input pin.Power supplyBUFBuffered RESETV CCASM811GNDGNDRESET RESET InputµC or µP 4.7k ΩBi-directional I/O PinFigure 4: Bi-directional Reset Pin InterfaceMR V CCPower SupplyASM811RESET GND100k ΩV CCPower SupplyASM812RESET GNDMRMR100k ΩV CC5V 0V 5V 0V 5V 0VMRRESETRESETFigure 1: Reset Timing and Manual Reset (MR)Figures 2 & 3: RESET valid with V CC under 1.1VASM811, ASM812October 2003rev 1.0Absolute Maximum Ratings, Table 1:Absolute Maximum Ratings, Table 2:ParameterMin Max UnitsPin Terminal Voltage With Respect To GroundV CC-0.3 6.0V RESET, RESET and MR-0.3V CC + 0.3V Input current at V CC and MR 20mA Output current: RESET, RESET 20mA Rate of Rise at V CC100V/µsNote: These are stress ratings only and the functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.ParameterMinMax Units Power Dissipation (T A = 70°C)Derate SOT-143 4mW/°C above 70°C 320uW Operating temperature range -40105°C Storage temperature range-65160°C Lead temperature (Soldering, 10 sec)300°CNote: These are stress ratings only and the functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.ASM811, ASM812October 2003rev 1.0Electrical Characteristics:Unless otherwise noted, V CC is over the full voltage range, T A = -40°C to 105°C.Typical values at T A = 25°C, V CC = 5V for L/M/J devices, V CC = 3.3V for T/S devices and V CC = 3V for R devices.SymbolParameterConditionsMinTyp MaxUnitV CCInput Voltage RangeT A = 0°C to 70°C T A = -40°C to 105°C1.11.25.55.5V VI CC Supply Current (Unloaded)T A = -40°C to 85°C T A = -40°C to 85°C T A = 85°C to 105°C T A = 85°C to 105°CV CC < 5.5V, L/M/J V CC < 3.6V, R/S/T V CC < 5.5V, L/M/J V CC < 3.6V, R/S/T 96.815102520µAV THReset ThresholdL devicesT A = 25°C T A = -40°C to 85°C T A = 85°C to 105°C 4.564.504.40 4.634.704.754.86VM devices T A = 25°CT A = -40°C to 85°C T A = 85°C to 105°C 4.314.254.16 4.384.454.504.56J devicesT A = 25°C T A = -40°C to 85°C T A = 85°C to 105°C 3.933.893.80 4.004.064.104.20T devicesT A = 25°C T A = -40°C to 85°C T A = 85°C to 105°C 3.043.002.92 3.083.113.153.23S devices T A = 25°C T A = -40°C to 85°C T A = 85°C to 105°C 2.892.852.78 2.932.963.003.08R devices T A = 25°C T A = -40°C to 85°C T A = 85°C to 105°C2.592.552.502.632.662.702.76TC VTHReset Threshold Temp. Coefficient 30ppm/°C V CC to Reset DelayV CC = V TH to (V TH - 125mV),60µsReset Active Timeout PeriodT A = 0°C to 70°C 140100240560840msT A = -40°C to 105°Ct MR MR Minimum Pulse Width10µsNotes:1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.3. Glitches of 100ns or less typically will not generate a reset pulse.ASM811, ASM812October 2003rev 1.0MR Glitch ImmunityNote 3100ns t MD MR to RESET Propogation DelayNote 20.5µsV IHMR Input ThresholdV CC > V TH (MAX), ASM811/812L/M/J 2.3VV IL 0.8V IHMR Input ThresholdV CC > V TH (MAX), ASM811/812R/S/T0.77V CCVV IL0.25V CCMR Pullup Resistance102030k ΩV OLLow RESET Output Voltage (ASM811)V CC = V TH min., I SINK = 1.2mA,ASM811R/S/T0.30.40.3VV CC = V TH min., I SINK = 3.2mA,ASM811L/M/J V CC > 1.1V, I SINK = 50µA V OHHigh RESET Output Voltage (ASM811)V CC > V TH max., I SOURCE = 500µA,ASM811R/S/T 0.8V CCV CC - 1.5VV CC > V TH max., I SOURCE = 800µA,ASM811L/M/J V OLLow RESET Output Voltage (ASM812)V CC = V TH max., I SINK = 1.2mA,ASM812R/S/T 0.30.4VV CC = V TH max., I SINK = 3.2mA,ASM812L/M/JV OH High RESET Output Voltage (ASM812)1.8V < V CC < V TH min., I SOURCE = 150µA0.8V CC VT RST Active Reset Timeout Period V CC > V TH 140240msec T MRSTManual Active Reset Time-out PeriodMR returns HIGH180msecSymbolParameterConditionsMin TypMax UnitNotes:1. Production testing done at TA = 25°C. Over-temperature specifications guaranteed by design only using six sigma design limits.2. RESET output is active LOW for the ASM811 and RESET output is active HIGH for the ASM812.3. Glitches of 100ns or less typically will not generate a reset pulse.ASM811, ASM812October 2003rev 1.0Typical Operating CharacteristicsUnless otherwise noted, V CC is over the full voltage range, T A = -40°C to 105°C. Typical values at T A = 25°C, V CC = 5V for L/M/J devices, V CC = 3.3V for T/S devices and V CC = 3V for R devices.ASM811, ASM812October 2003rev 1.0Package Dimensions:Plastic SOT-143 (4-Pin)Inches MillimetersMinMax Min Max A 0.0310.0470.787 1.194A10.0010.0050.0250.127B 0.0140.0220.3560.559B10.0300.0380.7620.965C 0.00340.0060.0860.152D 0.1050.120 2.667 3.048E 0.0470.055 1.194 1.397e 0.0700.080 1.778 2.032e10.0710.079 1.803 2.007H 0.0820.098 2.083 2.489L0.0040.0120.1020.305E He DAA1eCLa = 0° -8°Be1B1ASM811, ASM812October 2003rev 1.0Ordering Information:Related Products:Part Number 1Reset Threshold (V)Temperature RangePin-PackagePackage Marking (XX Lot Code)ASM811 ACTIVE LOW RESETASM811LEUS-T 4.63-40°C to +105°C 4-SOT143SMXX ASM811MEUS-T 4.38-40°C to +105°C 4-SOT143SNXX ASM811JEUS-T 4.00-40°C to +105°C 4-SOT143SOXX ASM811TEUS-T 3.08-40°C to +105°C 4-SOT143SPXX ASM811SEUS-T 2.93-40°C to +105°C 4-SOT143SQXX ASM811REUS-T2.63-40°C to +105°C4-SOT143SRXXASM812 ACTIVE HIGH RESETASM812LEUS-T 4.63-40°C to +105°C 4-SOT143SSXX ASM812MEUS-T 4.38-40°C to +105°C 4-SOT143STXX ASM812JEUS-T 4.00-40°C to +105°C 4-SOT143SUXX ASM812TEUS-T 3.08-40°C to +105°C 4-SOT143SVXX ASM812SEUS-T 2.93-40°C to +105°C 4-SOT143SWXX ASM812REUS-T2.63-40°C to +105°C4-SOT143SXXXNotes:1. Tape and Reel packaging is indicated by the -T designation.ASM809ASM810ASM811ASM812Max Supply Current 15µA 15µA 15µA 15µA Package Pins 3344Manual RESET inputPackage TypeSOT - 23SOT - 23SOT - 143SOT - 143Active-HIGH RESET OutputActive-LOW RESET OutputAlliance Semiconductor Corporation 2575, Augustine Drive,Santa Clara, CA 95054Tel: 408 - 855 - 4900Fax: 408 - 855 - Copyright © Alliance Semiconductor All Rights ReservedPart Number: ASM811, ASM812Document Version: v 1.0© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.ASM811, ASM812。
F2--04AD--1和F2--04AD--1L 4通道模拟电流输入模块说明书
F2--04AD--1,(L)4-Ch.Current InputThe following tables provide the specifications for both the F2--04AD--1and F2--04AD--1L Analog Input Modules (all specifications are the same for both modules except for the input voltage requirements).Review these specifications to make sure the module meets your application requirements.Number of Channels 4,single ended (one common)Input Range 4to 20mA current Resolution 12bit (1in 4096)Step Response 4.0mS to 95%of full step change Crosstalk--80dB,1/2count maximumActive Low-pass Filtering --3dB at 80Hz,2poles (--12dB per octave)Input Impedance250Ω 0.1%,½W current input mA current Absolute Maximum Ratings --40mA to +40mA,input Converter typeSuccessive approximation(0025%Linearity Error (End to End) 1count (0.025%of full scale)maximum Input Stability1countFull Scale Calibration Error counts maximum,@20mA input (Offset error not included) 12current maximum Offset Calibration Error 7counts maximum,@4mA current input Maximum Inaccuracy @25°C (77°y .5%F).65%0to 60_C (32to 140°F)Accuracy vs.Temperature ppm/_C maximum full scale calibration y p 50(including maximum offset change)0032A fast-acting current Recommended Fuse (external)0.032A,Series 217fast-acting,inputsPLC Update Rate 1channel per scan maximum (DL230CPU)4channels per scan maximum (DL240/250--1/260CPU)Digital 12binary data bits,2channel ID bits,2diagnostic bits InputsInput points required 16point (X)input modulemaximum Power Budget Requirement 50mA maximum,5VDC (supplied by base)External Power Supply 80mA maximum,18to 30VDC (F2-04AD-1)90mA maximum,10to 15VDC (F2-04AD-1L)Operating Temperature 0to 60_C (32to 140°F)Storage Temperature -20to 70_C (-4to 158°F)Relative Humidity 5to 95%(non-condensing)Environmental air No corrosive gases permitted Vibration MIL STD 810C 514.2ShockMIL STD 810C 516.2Noise ImmunityNEMA ICS3--304One count in the specification table is equal to one least significant bit of the analog data value (1in 4096).The F2-04AD-1,(L)Analog Input appears as a 16-point discrete input module.The module can be installed in any slot of a DL205system.The available power budget and discrete I/O points are the limiting factors.Check the user manual for your particular model of CPU and I/O base for more information regarding power budget and number of local,local expansion or remote I/O points.InputSpecificationsGeneralSpecificationsAnalog Input Configuration RequirementsF2--04AD--1,(L)4-Ch.Current InputThe F2--04AD--1,(L)module has a removable connector to make wiring easier.Simply squeeze the top and bottom retaining clips and gently pull the connector from the e the following diagram to connect the field wiring.The diagram shows separate module and transmitter power supplies.If you desire to use only one field-side supply,just combine the supplies’positive (+)terminals into one node,and remove the transmitter supply.2or 3wire:Isolation between input signal and power supply.Isolation between input signal,power supply,and 4--20mA output.4wire:NOTE 1:Shields should be grounded at the signal source.NOTE 2:More than one external power supply can be used,provided all the power supply commons are connected.NOTE 3:A Series 217,0.032A fast-acting fuse is recommended for 4--20mA current loops.NOTE 4:If the power supply common of an external power supply is not connected to 0VDC on the module,then theoutput of the external transmitter must be isolated.T o avoid “ground loop”errors,recommended 4--20mAtransmitter types are:Module Supply NOTE 5:Use 10--15VDC for F2-04AD-1LUse 18--30VDC for F2-04AD-124Volts Model ShownWiring Diagram。
AD811
====Word行业资料分享--可编辑版本--双击可删====AD811: 高性能视频运算放大器AD811是一款宽带电流反馈型运算放大器，针对广播级质量视频系统进行了优化。
-3 dB带宽为120 MHz (G=+2)，差分增益和相位误差分别为0.01%和0.01° (R L = 150 W)，使AD811成为所有视频系统的绝佳选择。
除了低差分增益和相位误差外，它还满足严苛的0.1 dB增益平坦度要求，带宽达到35 MHz (G = +2)。
无论驱动一条还是两条后部端接的75W电缆，均可达到这一性能，而且电源电流低至16.5 mA。
此外，AD811的额定电源电压范围为±4.5 V至±18 V。
AD811也特别适合注重瞬态响应性能的脉冲应用。
最大压摆率可以达到2500 V/µs以上，2 V步进时0.1%建立时间少于25 ns，10 V步进时0.01%建立时间少于65 ns。
低失真特性（带宽最高可达10 MHz）和宽单位增益带宽，使AD811非常适合用作数据采集系统中的ADC或DAC缓冲器。
由于它是一款电流反馈型放大器，因此可在整个宽增益范围内保持这一带宽。
该放大器还具有1.9 nV/√Hz的低电压噪声、20 pA/√Hz的低电流噪声以及出色的直流精度，适合宽动态范围应用。
●高速3 dB带宽：140 MHz (G = +1)3 dB带宽：120 MHz (G = +2)0.1 dB带宽：35 MHz (G = +2)压摆率：2500 V/µs0.1%建立时间：25 ns（2 V步进）0.01%建立时间：65 ns（10 V步进）●出色的直流精度输入失调电压：3 mV（最大值）●低失真：总谐波失真（THD）= -74 dB (10 MHz)●出色的视频性能(R L = 150 O)差分增益/相位误差：0.10% / 0.●灵活的工作方式额定电源电压：±5 V和±15 V输出摆幅：±2.3 V（75 Ω负载）(V S = ±5 V)AD811引脚配置图源-于-网-络-收-集。
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元器件交易网
High Performance Video Op Amp AD811
FEATURES
High speed 140 MHz bandwidth (3 dB, G = +1) 120 MHz bandwidth (3 dB, G = +2) 35 MHz bandwidth (0.1 dB, G = +2) 2500 V/µs slew rate 25 ns settling time to 0.1% (for a 2 V step) 65 ns settling time to 0.01% (for a 10 V step)
元器件交易网
AD811
TABLE OF CONTENTS
Specifications..................................................................................... 4 Absolute Maximum Ratings............................................................ 6
Specified for ±5 V and ±15 V operation ±2.3 V output swing into a 75 Ω load (VS = ±5 V)
APPLICATIONS
Video crosspoint switchers, multimedia broadcast systems HDTV compatible systems Video line drivers, distribution amplifiers ADC/DAC buffers DC restoration circuits Medical
REVISION HISTORY
7/04—Data Sheet Changed from Rev. D to Rev. E Updated Format............................................................. Universal Change to Maximum Power Dissipation Section .................... 7 Changes to Ordering Guide ...................................................... 20 Updated Outline Dimensions ................................................... 20
Ultrasound PET Gamma Counter applications
GENERAL DESCRIPTION
A wideband current feedback operational amplifier, the AD811 is optimized for broadcast-quality video systems. The −3 dB bandwidth of 120 MHz at a gain of +2 and the differential gain and phase of 0.01% and 0.01° (RL = 150 Ω) make the AD811 an excellent choice for all video systems. The AD811 is designed to meet a stringent 0.1 dB gain flatness specification to a bandwidth of 35 MHz (G = +2) in addition to low differential gain and phase errors. This performance is achieved whether driving one or two back-terminated 75 Ω cables, with a low power supply current of 16.5 mA. Furthermore, the AD811 is specified over a power supply range of ±4.5 V to ±18 V. (Continued on page 3)
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
00866-E-002
NC 4 NC 5 –IN 6 NC 7 +IN 8
3 2 1 20 19
AD811
18 NC 17 NC 16 +VS 15 NC 14 OUTPUT
9 10 11 12 13
–VS NC NC NC NC
00866-E-003
NC = NO CONNECT
Figure 3. 20-Terminal LCC (E-20A)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
CONNE1 –IN 2 +IN 3 –VS 4
AD811
8 NC
7 +VS 6 OUTPUT 5 NC
NC = NO CONNECT
Figure 1. 8-Lead Plastic (N-8), CERDIP (Q-8), SOIC (R-8)
The AD811 is ideal as an ADC or DAC buffer in data acquisition systems due to its low distortion up to 10 MHz and its wide unity gain bandwidth. Because the AD811 is a current feedback amplifier, this bandwidth can be maintained over a wide range of gains. The AD811 also offers low voltage and current noise of 1.9 nV/√Hz and 20 pA/√Hz, respectively, and excellent dc accuracy for wide dynamic range applications.
Rev. E | Page 2 of 20
元器件交易网
GENERAL DESCRIPTION (continued)
The AD811 is also excellent for pulsed applications where transient response is critical. It can achieve a maximum slew rate of greater than 2500 V/µs with a settling time of less than 25 ns to 0.1% on a 2 V step and 65 ns to 0.01% on a 10 V step.
NC 1 NC 2 NC 3 –IN 4 NC 5 +IN 6 NC 7 –VS 8 NC 9 NC 10
AD811
20 NC 19 NC 18 NC 17 +VS 16 NC 15 OUTPUT 14 NC 13 NC 12 NC 11 NC
00866-E-004
NC = NO CONNECT
Figure 4. 20-Lead SOIC (R-20)