MAX291ESA+T中文资料
MAX2990中文资料
传感器控制和数据采集 电力线传输语音设备
Key Specifications: Powerline Networking Devices
Part Features
Number
Security Features
Smalles
t
Budgetary
Availabl Oper. Interf EV Package e Pckg. Temp.
MAX2990
10kHz 至 490kHz、基于 OFDM 的电力线通信调制解调器
业内首款基于 OFDM 的电力线通信调制解调器，能够在 10kHz 至 490kHz 频带提供 100kbps 的数据传输
概述
MAX2990 电力线通信(PLC)基带调制解调器可通过交流或直 流电力线提供高性价比且可靠的半双工异步数据通信，传输速 率高达 100kbps。MAX2990 是高集成度片上系统(SoC)，利用 Maxim 的 16 位 RISC MAXQ 微控制器核构建物理层(PHY)和 媒体访问控制(MAC)层。MAX2990 采用 OFDM 调制技术，可 在电力网络中进行稳定的数据传输，同时为网络的所有器件供 电。
Yes LQFP/64
Compliant to
Serial
Managemen
FCC,
UART
t
CENELEC,
148.8
-40 to $8.50 @1k
+85
ARIB
Data Rate Up
to 100Kbps
OFDM-Based
PHY
查看所有 Powerline Networking Devices (5)
Pricing Notes:
This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.
MX29LV400CTXEI-55R中文资料
MX29LV400C T/B4M-BIT [512K x 8 / 256K x 16] CMOS SINGLE VOLTAGE3V ONLY FLASH MEMORY•Ready/Busy# pin (RY/BY#)- Provides a hardware method of detecting program or erase operation completion •Sector protection- Hardware method to disable any combination of sectors from program or erase operations- Temporary sector unprotect allows code changes in previously locked sectors•CFI (Common Flash Interface) compliant- Flash device parameters stored on the device and provide the host system to access•100,000 minimum erase/program cycles•Latch-up protected to 100mA from -1V to VCC+1V •Boot Sector Architecture - T = Top Boot Sector - B = Bottom Boot Sector •Package type:- 44-pin SOP - 48-pin TSOP- 48-ball CSP (6 x 8mm)- 48-ball CSP (4 x 6mm)- All Pb-free devices are RoHS Compliant •Compatibility with JEDEC standard- Pinout and software compatible with single-power supply Flash•20 years data retentionFEATURES•Extended single - supply voltage range 2.7V to 3.6V •524,288 x 8/262,144 x 16 switchable •Single power supply operation- 3.0V only operation for read, erase and program operation•Fully compatible with MX29LV400T/B device •Fast access time: 55R/70/90ns •Low power consumption- 30mA maximum active current - 0.2uA typical standby current •Command register architecture- Byte/word Programming (9us/11us typical)- Sector Erase (Sector structure 16K-Byte x 1,8K-Byte x 2, 32K-Byte x1, and 64K-Byte x7)•Auto Erase (chip & sector) and Auto Program- Automatically erase any combination of sectors with Erase Suspend capability- Automatically program and verify data at specified address•Erase suspend/Erase Resume- Suspends sector erase operation to read data from,or program data to, any sector that is not being erased,then resumes the erase •Status Reply- Data# Polling & Toggle bit for detection of program and erase operation completionGENERAL DESCRIPTIONThe MX29LV400C T/B is a 4-mega bit Flash memory organized as 512K bytes of 8 bits or 256K words of 16bits. MXIC's Flash memories offer the most cost-effec-tive and reliable read/write non-volatile random access memory. The MX29LV400C T/B is packaged in 44-pin SOP , 48-pin TSOP and 48-ball CSP . It is designed to be reprogrammed and erased in system or in standard EPROM programmers.The standard MX29LV400C T/B offers access time as fast as 55ns, allowing operation of high-speed micropro-cessors without wait states. To eliminate bus conten-tion, the MX29LV400C T/B has separate chip enable (CE#) and output enable (OE#) controls.MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29LV400C T/B uses a command register to manage this functionality. The command register allows for 100%TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maxi-mum EPROM compatibility.MXIC Flash technology reliably stores memory contents even after 100,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and program operations produces reliable cy-cling. The MX29LV400C T/B uses a 2.7V~3.6V VCC supply to perform the High Reliability Erase and auto Program/Erase algorithms.The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up pro-tection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V .MX29LV400C T/BPIN CONFIGURATIONS 44 SOP(500 mil)PIN DESCRIPTIONSYMBOL PIN NAMEA0~A17Address InputQ0~Q14Data Input/OutputQ15/A-1Q15 (Word mode)/LSB addr(Byte mode) CE#Chip Enable InputWE#Write Enable InputBYTE#Word/Byte Selection inputRESET#Hardware Reset Pin/Sector ProtectUnlockOE#Output Enable InputRY/BY#Ready/Busy OutputVCC Power Supply Pin (2.7V~3.6V)GND Ground PinNC Pin Not Connected Internally48 TSOP (Standard Type) (12mm x 20mm)A15A14A13A12A11A10A9A8NCNCWE# RESET#NCNC RY/BY#NCA17A7A6A5A4A3A2A1123456789101112131415161718192021222324A16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCQ11Q3Q10Q2Q9Q1Q8Q0OE#GNDCE#A0484746454443424140393837363534333231302928272625MX29LV400C T/B2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 2244 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23NC RY/BY#A17A7A6A5A4A3A2A1A0CE#GNDOE#Q0Q8Q1Q9Q2Q10Q3Q11RESET#WE#A8A9A10A11A12A13A14A15A16BYTE#GNDQ15/A-1Q7Q14Q6Q13Q5Q12Q4VCCMX29LV4CT/BMX29LV400C T/BMX29LV400C T/BBLOCK STRUCTURETable 1: MX29LV400CT SECTOR ARCHITECTURE Note: Byte mode:address range A17:A-1, word mode:address range A17:A0.Sector Sector SizeAddress range Sector AddressByte Mode Word ModeByte Mode (x8)Word Mode (x16)A17A16A15A14A13A12SA064Kbytes 32Kwords 00000-0FFFF 00000-07FFF 000X X X SA164Kbytes 32Kwords 10000-1FFFF 08000-0FFFF 001X X X SA264Kbytes 32Kwords 20000-2FFFF 10000-17FFF 010X X X SA364Kbytes 32Kwords 30000-3FFFF 18000-1FFFF 011X X X SA464Kbytes 32Kwords 40000-4FFFF 20000-27FFF 100X X X SA564Kbytes 32Kwords 50000-5FFFF 28000-2FFFF 101X X X SA664Kbytes 32Kwords 60000-6FFFF 30000-37FFF 110X X X SA732Kbytes 16Kwords 70000-77FFF 38000-3BFFF 1110X X SA88Kbytes 4Kwords 78000-79FFF 3C000-3CFFF 111100SA98Kbytes 4Kwords 7A000-7BFFF 3D000-3DFFF 111101SA1016Kbytes8Kwords7C000-7FFFF3E000-3FFFF11111XSector Sector SizeAddress range Sector AddressByte Mode Word ModeByte Mode (x8)Word Mode (x16)A17A16A15A14A13A12SA016Kbytes 8Kwords 00000-03FFF 00000-01FFF 00000X SA18Kbytes 4Kwords 04000-05FFF 02000-02FFF 000010SA28Kbytes 4Kwords 06000-07FFF 03000-03FFF 000011SA332Kbytes 16Kwords 08000-0FFFF 04000-07FFF 0001X X SA464Kbytes 32Kwords 10000-1FFFF 08000-0FFFF 001X X X SA564Kbytes 32Kwords 20000-2FFFF 10000-17FFF 010X X X SA664Kbytes 32Kwords 30000-3FFFF 18000-1FFFF 011X X X SA764Kbytes 32Kwords 40000-4FFFF 20000-27FFF 100X X X SA864Kbytes 32Kwords 50000-5FFFF 28000-2FFFF 101X X X SA964Kbytes 32Kwords 60000-6FFFF 30000-37FFF 110X X X SA1064Kbytes32Kwords70000-7FFFF38000-3FFFF111XXXTable 2: MX29LV400CB SECTOR ARCHITECTURE Note: Byte mode:address range A17:A-1, word mode:address range A17:A0.MX29LV400C T/BBLOCK DIAGRAMCONTROL INPUT LOGICPROGRAM/ERASE HIGH VOLTAGEWRITE STATE MACHINE (WSM)STATE REGISTERFLASH ARRAYX-DECODERADDRESS LATCHAND BUFFERY -PASS GATEY -DECODERARRAY SOURCE HVCOMMAND DATADECODERCOMMAND DATA LATCHI/O BUFFERPGM DATA HVPROGRAM DATA LATCHSENSE AMPLIFIERQ0-Q15/A-1A0-A17CE#OE#WE#RESET#MX29LV400C T/BAUTOMATIC PROGRAMMINGThe MX29L V400C T/B is byte programmable using the Automatic Programming algorithm. The Automatic Pro-gramming algorithm makes the external system do not need to have time out sequence nor to verify the data programmed. The typical chip programming time at room temperature of the MX29LV400C T/B is less than 10 seconds.AUTOMATIC CHIP ERASEThe entire chip is bulk erased using 10 ms erase pulses according to MXIC's Automatic Chip Erase algorithm. T ypical erasure at room temperature is accomplished in less than 4 second. The Automatic Erase algorithm au-tomatically programs the entire array prior to electrical erase. The timing and verification of electrical erase are controlled internally within the device.AUTOMATIC SECTOR ERASEThe MX29L V400C T/B is sector(s) erasable using MXIC's Auto Sector Erase algorithm. The Automatic Sector Erase algorithm automatically programs the specified sector(s) prior to electrical erase. The timing and verifi-cation of electrical erase are controlled internally within the device. An erase operation can erase one sector, multiple sectors, or the entire device.AUTOMATIC PROGRAMMING ALGORITHMMXIC's Automatic Programming algorithm requires the user to only write program set-up commands (including 2 unlock write cycle and A0H) and a program command (program data and address). The device automatically times the programming pulse width, provides the pro-gram verification, and counts the number of sequences.A status bit similar to Data# Polling and a status bit toggling between consecutive read cycles, provide feed-back to the user as to the status of the programming operation. Refer to write operation status, table7, for more information on these status bits.AUTOMATIC ERASE ALGORITHMMXIC's Automatic Erase algorithm requires the user to write commands to the command register using stan-dard microprocessor write timings. The device will auto-matically pre-program and verify the entire array. Then the device automatically times the erase pulse width, provides the erase verification, and counts the number of sequences. A status bit toggling between consecutive read cycles provides feedback to the user as to the sta-tus of the erasing operation.Register contents serve as inputs to an internal state-machine which controls the erase and programming cir-cuitry. During write cycles, the command register inter-nally latches address and data needed for the program-ming and erase operations. During a system write cycle, addresses are latched on the falling edge, and data are latched on the rising edge of WE# or CE#, whichever happens first.MXIC's Flash technology combines years of EPROM experience to produce the highest levels of quality, reli-ability, and cost effectiveness. The MX29LV400C T/B electrically erases all bits simultaneously using Fowler-Nordheim tunneling. The bytes are programmed by us-ing the EPROM programming mechanism of hot elec-tron injection.During a program cycle, the state-machine will control the program sequences and command register will not respond to any command set. During a Sector Erase cycle, the command register will only respond to Erase Suspend command. After Erase Suspend is completed, the device stays in read mode. After the state machine has completed its task, it will allow the command regis-ter to respond to its full command set.AUTOMATIC SELECTThe automatic select mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on Q7~Q0. This mode is mainly adapted for programming equipment on the de-vice to be programmed with its programming algorithm. When programming by high voltage method, automatic select mode requires VID (11.5V to 12.5V) on address pin A9 and other address pin A6, A1 as referring to T able 3. In addition, to access the automatic select codes in-system, the host can issue the automatic select com-mand through the command register without requiring VID, as shown in table4.To verify whether or not sector being protected, the sec-tor address must appear on the appropriate highest orderMX29LV400C T/BTABLE 3. MX29LV400C T/B AUTO SELECT MODE OPERATIONNOTE:SA=Sector Address, X=Don't Care, L=Logic Low, H=Logic HighA17A11A8A5DescriptionMode CE#OE#WE#RE- | |A9 |A6 |A1A0Q15~Q0SET#A12A10A7A2Manufacture LLHHXX VID XLXLLC2HCodeRead Device ID Word L L H H X X VID X L X L H 22B9H Silicon (T op Boot Block)Byte L L H H X X VID X L X L H XXB9H IDDevice ID (Bottom Word L L H H X X VID X L X L H 22BAH Boot Block)ByteL L H H X X VID X L X L H XXBAH XX01H Sector Protection LLHHSAX VID XLXHL(protected)VerificationXX00H (unprotected)address bit (see T able 1 and T able 2). The rest of address bits, as shown in table3, are don't care. Once all neces-sary bits have been set as required, the programming equipment may read the corresponding identifier code on Q7~Q0.MX29LV400C T/BTABLE 4. MX29LV400C T/B COMMAND DEFINITIONSFirst Bus Second Bus Third Bus Fourth Bus Fifth Bus Sixth Bus Command Bus Cycle Cycle Cycle Cycle Cycle CycleCycle Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Reset 1XXXH F0HRead1RA RDRead Silicon ID Word4555H AAH2AAH55H555H90H ADI DDIByte4AAAH AAH555H55H AAAH90H ADI DDISector Protect Word4555H AAH2AAH55H555H90H(SA)XX00HVerify x02H XX01HByte4AAAH AAH555H55H AAAH90H(SA)00Hx04H01HProgram Word4555H AAH2AAH55H555H A0H PA PDByte4AAAH AAH555H55H AAAH A0H PA PDChip Erase Word6555H AAH2AAH55H555H80H555H AAH2AAH55H555H10H Byte6AAAH AAH555H55H AAAH80H AAAH AAH555H55H AAAH10H Sector Erase Word6555H AAH2AAH55H555H80H555H AAH2AAH55H SA30H Byte6AAAH AAH555H55H AAAH80H AAAH AAH555H55H SA30H Sector Erase Suspend1XXXH B0HSector Erase Resume1XXXH30HCFI Query Word155H98Byte1AAH98Note:1.ADI = Address of Device identifier; A1=0, A0 = 0 for manufacturer code,A1=0, A0 = 1 for device code. A2-A17=do not care.(Refer to table 3)DDI = Data of Device identifier : C2H for manufacture code, B9H/BAH (x8) and 22B9H/22BAH (x16) for device code.X = X can be VIL or VIHRA=Address of memory location to be read.RD=Data to be read at location RA.2.P A = Address of memory location to be programmed.PD = Data to be programmed at location P A.SA = Address of the sector to be erased.3.The system should generate the following address patterns: 555H or 2AAH to Address A10~A0 in word mode/AAAH or555H to Address A10~A-1 in byte mode.Address bit A11~A17=X=Don't care for all address commands except for Program Address (PA) and SectorAddress (SA). Write Sequence may be initiated with A11~A17 in either state.4.For Sector Protect Verify operation: If read out data is 01H, it means the sector has been protected. If read out data is 00H, itmeans the sector is still not being protected.5.Any number of CFI data read cycle are permitted.MX29LV400C T/BADDRESSQ8~Q15DESCRIPTIONCE#OE#WE#RE- A17A10A9A8A6A5A1A0Q0~Q7BYTE BYTE SET#A11A7A2=VIH=VILReadLLHHAINDoutDout Q8~Q14=High ZQ15=A-1Write L H L H AIN DIN(3)DIN Q8~Q14=High ZQ15=A-1ResetX X X L X High Z High Z High Z Temporary sector unlock X X X VID AIN DIN DIN High Z Output Disable L H H H X High Z High Z High Z StandbyVcc ±XXVcc ±XHigh ZHigh ZHigh Z0.3V0.3VSector Protect L H L VID SA X X X L X H L DIN X X Chip Unprotect L H L VID X XXXH X H L DIN X X Sector Protection VerifyLLHHSAX VID XLXHLCODE(5)XXTABLE 5. MX29L V400C T/B BUS OPERATIONNOTES:1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to T able 4.2. VID is the Silicon-ID-Read high voltage, 11.5V to 12.5V .3. Refer to T able 4 for valid Data-In during a write operation.4. X can be VIL or VIH.5. Code=00H/XX00H means unprotected.Code=01H/XX01H means protected.6.A17~A12=Sector address for sector protect.7.The sector protect and chip unprotect functions may also be implemented via programming equipment.sequences. Note that the Erase Suspend (B0H) and Erase Resume (30H) commands are valid only while the Sector Erase operation is in progress.COMMAND DEFINITIONSDevice operations are selected by writing specific ad-dress and data sequences into the command register.Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. Table 4 defines the valid register commandMX29LV400C T/BREQUIREMENTS FOR READING ARRAY DATATo read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array data to the output pins. WE# should re-main at VIH.The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory con-tent occurs during the power transition. No command is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid address on the device address inputs produce valid data on the de-vice data outputs. The device remains enabled for read access until the command register contents are altered. WRITE COMMANDS/COMMAND SEQUENCEST o program data to the device or erase sectors of memory , the system must drive WE# and CE# to VIL, and OE# to VIH.An erase operation can erase one sector, multiple sec-tors , or the entire device. Table indicates the address space that each sector occupies. A "sector address" consists of the address bits required to uniquely select a sector. The "Writing specific address and data commands or sequences into the command register initiates device operations. Table 1 defines the valid register command sequences. Writing incorrect address and data values or writing them in the improper sequence resets the device to reading array data. Section has details on erasing a sector or the entire chip, or suspending/resuming the erase operation.After the system writes the autoselect command se-quence, the device enters the autoselect mode. The sys-tem can then read autoselect codes from the internal reg-ister (which is separate from the memory array) on Q7-Q0. Standard read cycle timings apply in this mode. Re-fer to the Autoselect Mode and Autoselect Command Sequence section for more information.ICC2 in the DC Characteristics table represents the ac-tive current specification for the write mode. The "AC Characteristics" section contains timing specification table and timing diagrams for write operations.STANDBY MODEWhen using both pins of CE# and RESET#, the device enter CMOS Standby with both pins held at Vcc ± 0.3V. If CE# and RESET# are held at VIH, but not within the range of VCC ± 0.3V, the device will still be in the standby mode, but the standby current will be larger. During Auto Algorithm operation, Vcc active current (Icc2) is required even CE# = "H" until the operation is completed. The device can be read with standard access time (tCE) from either of these standby modes, before it is ready to read data.OUTPUT DISABLEWith the OE# input at a logic high level (VIH), output from the devices are disabled. This will cause the output pins to be in a high impedance state.RESET# OPERATIONThe RESET# pin provides a hardware method of reset-ting the device to reading array data. When the RESET# pin is driven low for at least a period of tRP, the device immediately terminates any operation in progress, tristates all output pins, and ignores all read/write com-mands for the duration of the RESET# pulse. The device also resets the internal state machine to reading array data. The operation that was interrupted should be reinitiated once the device is ready to accept another command sequence, to ensure data integrityCurrent is reduced for the duration of the RESET# pulse. When RESET# is held at VSS±0.3V, the device draws CMOS standby current (ICC4). If RESET# is held at VIL but not within VSS±0.3V, the standby current will be greater.The RESET# pin may be tied to system reset circuitry.A system reset would that also reset the Flash memory, enabling the system to read the boot-up firm-ware from the Flash memory.If RESET# is asserted during a program or erase opera-tion, the RY/BY# pin remains a "0" (busy) until the inter-nal reset operation is complete, which requires a time of tREADY (during Embedded Algorithms). The system can thus monitor RY/BY# to determine whether the reset op-eration is complete. If RESET# is asserted when a pro-MX29LV400C T/Bgram or erase operation is completed within a time of tREADY (not during Embedded Algorithms). The system can read data tRH after the RESET# pin returns to VIH. Refer to the AC Characteristics tables for RESET# pa-rameters and to Figure 24 for the timing diagram.READ/RESET COMMANDThe read or reset operation is initiated by writing the read/ reset command sequence into the command register. Microprocessor read cycles retrieve array data. The de-vice remains enabled for reads until the command regis-ter contents are altered.If program-fail or erase-fail happen, the write of F0H will reset the device to abort the operation. A valid com-mand must then be written to place the device in the desired state.SILICON-ID READ COMMANDFlash memories are intended for use in applications where the local CPU alters memory contents. As such, manu-facturer and device codes must be accessible while the device resides in the target system. PROM program-mers typically access signature codes by raising A9 to a high voltage (VID). However, multiplexing high voltage onto address lines is not generally desired system de-sign practice.The MX29LV400C T/B contains a Silicon-ID-Read op-eration to supple traditional PROM programming meth-odology. The operation is initiated by writing the read silicon ID command sequence into the command regis-ter. Following the command write, a read cycle with A1=VIL, A0=VIL retrieves the manufacturer code of C2H/ 00C2H. A read cycle with A1=VIL, A0=VIH returns the device code of B9H/22B9H for MX29LV400CT, BAH/ 22BAH for MX29LV400CB.SET-UP AUTOMATIC CHIP/SECTOR ERASE COM-MANDSChip erase is a six-bus cycle operation. There are two "unlock" write cycles. These are followed by writing the "set-up" command 80H. T wo more "unlock" write cycles are then followed by the chip erase command 10H or sector erase command 30H.The Automatic Chip Erase does not require the device to be entirely pre-programmed prior to executing the Auto-matic Chip Erase. Upon executing the Automatic Chip Erase, the device will automatically program and verify the entire memory for an all-zero data pattern. When the device is automatically verified to contain an all-zero pat-tern, a self-timed chip erase and verify begin. The erase and verify operations are completed when the data on Q7 is "1" at which time the device returns to the Read mode. The system is not required to provide any control or timing during these operations.When using the Automatic Chip Erase algorithm, note that the erase automatically terminates when adequate erase margin has been achieved for the memory array (no erase verification command is required).If the Erase operation was unsuccessful, the data on Q5 is "1"(see Table 7), indicating the erase operation ex-ceed internal timing limit.The automatic erase begins on the rising edge of the last WE# or CE# pulse, whichever happens first in the com-mand sequence and terminates when the data on Q7 is "1" at which time the device returns to the Read mode, or the data on Q6 stops toggling for two consecutive read cycles at which time the device returns to the Read mode.MX29LV400C T/BPins A0A1Q15~Q8Q7Q6Q5Q4Q3Q2Q1Q0Code(Hex)Manufacture code Word VIL VIL00H1100001000C2HByte VIL VIL X11000010C2H Device code Word VIH VIL22H1011100122B9Hfor MX29LV400CT Byte VIH VIL X10111001B9HDevice code Word VIH VIL22H1011101022BAHfor MX29LV400CB Byte VIH VIL X10111010BAHSector Protection X VIH X0000000101H (Protected) Verification X VIH X0000000000H (Unprotected) TABLE 6. EXPANDED SILICON ID CODEREADING ARRA Y DATAThe device is automatically set to reading array data after device power-up. No commands are required to re-trieve data. The device is also ready to read array data after completing an Automatic Program or Automatic Erase algorithm.After the device accepts an Erase Suspend command, the device enters the Erase Suspend mode. The sys-tem can read array data using the standard read tim-ings, except that if it reads at an address within erase-suspended sectors, the device outputs status data. Af-ter completing a programming operation in the Erase Suspend mode, the system may once again read array data with the same exception. See "Erase Suspend/Erase Resume Commands" for more infor-mation on this mode. The system must issue the reset command to re-en-able the device for reading array data if Q5 goes high, or while in the autoselect mode. See the "Reset Command" section, next.RESET COMMANDWriting the reset command to the device resets the de-vice to reading array data. Address bits are don't care for this command.The reset command may be written between the se-quence cycles in an erase command sequence before erasing begins. This resets the device to reading array data. Once erasure begins, however, the device ignores reset commands until the operation is complete.The reset command may be written between the se-quence cycles in a program command sequence be-fore programming begins. This resets the device to reading array data (also applies to programming in Erase Sus-pend mode). Once programming begins, however, the device ignores reset commands until the operation is complete.The reset command may be written between the se-quence cycles in an SILICON ID READ command se-quence. Once in the SILICON ID READ mode, the reset command must be written to return to reading array data (also applies to SILICON ID READ during Erase Sus-pend).If Q5 goes high during a program or erase operation, writ-ing the reset command returns the device to read-ing array data (also applies during Erase Suspend).MX29LV400C T/Berase margin has been achieved for the memory array (no erase verification command is required). Sector erase is a six-bus cycle operation. There are two "un-lock" write cycles. These are followed by writing the set-up command 80H. Two more "unlock" write cycles are then followed by the sector erase command 30H. The sector address is latched on the falling edge of WE# or CE#, whichever happens later, while the command (data)is latched on the rising edge of WE# or CE#, whichever happens first. Sector addresses selected are loaded into internal register on the sixth falling edge of WE# or CE#, whichever happens later. Each successive sector load cycle started by the falling edge of WE# or CE#,whichever happens later must begin within 50us from the rising edge of the preceding WE# or CE#, whichever happens first. Otherwise, the loading period ends and internal auto sector erase cycle starts. (Monitor Q3 to determine if the sector erase timer window is still open,see section Q3, Sector Erase Timer.) Any command other than Sector Erase(30H) or Erase Suspend(B0H) during the time-out period resets the device to read mode.SECTOR ERASE COMMANDSThe Automatic Sector Erase does not require the de-vice to be entirely pre-programmed prior to executing the Automatic Sector Erase Set-up command and Au-tomatic Sector Erase command. Upon executing the Automatic Sector Erase command, the device will auto-matically program and verify the sector(s) memory for an all-zero data pattern. The system is not required to provide any control or timing during these operations.When the sector(s) is automatically verified to contain an all-zero pattern, a self-timed sector erase and verify begin. The erase and verify operations are complete when either the data on Q7 is "1" at which time the de-vice returns to the Read mode, or the data on Q6 stops toggling for two consecutive read cycles at which time the device returns to the Read mode. The system is not required to provide any control or timing during these operations.When using the Automatic sector Erase algorithm, note that the erase automatically terminates when adequateStatusQ7Q6Q5Q3Q2RY/(Note1)(Note2)BY#Byte Program in Auto Program Algorithm Q7#Toggle 0N/A No 0Toggle Auto Erase Algorithm0Toggle 01Toggle0Erase Suspend Read1No 0N/A Toggle1(Erase Suspended Sector)Toggle In ProgressErase Suspended ModeErase Suspend ReadData Data Data Data Data 1(Non-Erase Suspended Sector)Erase Suspend ProgramQ7#Toggle 0N/A N/A 0Byte Program in Auto Program AlgorithmQ7#Toggle 1N/A No 0Toggle ExceededTime Limits Auto Erase Algorithm0Toggle 11Toggle 0Erase Suspend ProgramQ7#Toggle1N/AN/ATable 7. Write Operation StatusNote:1.Q7 and Q2 require a valid address when reading status information. Refer to the appropriate subsection for further details.2.Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits.See "Q5:Exceeded Timing Limits " for more information.。
MAX3072EASA中文资料
Continuous Power Dissipation (TA = +70°C) 8-Pin SO (derate 5.88mW/°C above +70°C) .................471mW 8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) .....727mW 14-Pin SO (derate 8.33mW/°C above +70°C) ...............667mW 14-Pin Plastic DIP (derate 10.0mW/°C above +70°C) ...800mW
H/F, TXP, RXP)......................................................-0.3V to +6V Driver Input Voltage (DI)...........................................-0.3V to +6V Driver Output Voltage (Z, Y, A, B) .............................-8V to +13V Receiver Input Voltage (A, B)....................................-8V to +13V Receiver Input Voltage
max3485esa中文资料
General Description The MAX3483, MAX3485, MAX3486, MAX3488,MAX3490, and MAX3491 are 3.3V , low-power transceivers forRS-485 and RS-422 communication. Each part containsone driver and one receiver. The MAX3483 and MAX3488feature slew-rate-limited drivers that minimize EMI andreduce reflections caused by improperly terminatedcables, allowing error-free data transmission at data ratesup to 250kbps. The partially slew-rate-limited MAX3486transmits up to 2.5Mbps. The MAX3485, MAX3490, andMAX3491 transmit at up to 10Mbps.Drivers are short-circuit current-limited and are protectedagainst excessive power dissipation by thermal shutdowncircuitry that places the driver outputs into a high-imped-ance state. The receiver input has a fail-safe feature thatguarantees a logic-high output if both inputs are opencircuit.The MAX3488, MAX3490, and MAX3491 feature full-duplex communication, while the MAX3483, MAX3485, andMAX3486 are designed for half-duplex communication.Applications ●Low-Power RS-485/RS-422 Transceivers ●Telecommunications ●Transceivers for EMI-Sensitive Applications ●Industrial-Control Local Area NetworksFeatures●Operate from a Single 3.3V Supply—No Charge Pump!●Interoperable with +5V Logic ●8ns Max Skew (MAX3485/MAX3490/MAX3491)●Slew-Rate Limited for Errorless Data Transmission (MAX3483/MAX3488)●2nA Low-Current Shutdown Mode (MAX3483/MAX3485/MAX3486/MAX3491)●-7V to +12V Common-Mode Input Voltage Range ●Allows up to 32 Transceivers on the Bus ●Full-Duplex and Half-Duplex Versions Available ●Industry Standard 75176 Pinout (MAX3483/MAX3485/MAX3486)●Current-Limiting and Thermal Shutdown for Driver Overload Protection 19-0333; Rev 1; 5/19Ordering Information continued at end of data sheet.*Contact factory for for dice specifications.PARTTEMP . RANGE PIN-PACKAGE MAX3483CPA0°C to +70°C 8 Plastic DIP MAX3483CSA0°C to +70°C 8 SO MAX3483C/D0°C to +70°C Dice*MAX3483EPA-40°C to +85°C 8 Plastic DIP MAX3483ESA-40°C to +85°C 8 SO MAX3485CPA0°C to +70°C 8 Plastic DIP MAX3485CSA0°C to +70°C 8 SO MAX3485C/D0°C to +70°C Dice*MAX3485EPA-40°C to +85°C 8 Plastic DIP MAX3485ESA -40°C to +85°C 8 SO PARTNUMBERGUARANTEED DATA RATE (Mbps)SUPPLY VOLTAGE (V)HALF/FULL DUPLEX SLEW-RATE LIMITED DRIVER/RECEIVER ENABLE SHUTDOWN CURRENT (nA)PIN COUNT MAX34830.25 3.0 to 3.6Half Yes Yes 28MAX348510Half No No 28MAX34862.5Half Yes Yes 28MAX34880.25Half Yes Yes —8MAX349010Half No No —8MAX349110Half No Yes 214MAX3483/MAX3485/MAX3486/MAX3488/MAX3490/MAX3491Selection TableOrdering Information找电子元器件上宇航军工Figure 1. MAX3483/MAX3485/MAX3486 Pin Configuration and Typical Operating Circuit Figure 2. MAX3488/MAX3490 Pin Configuration and Typical Operating Circuit Figure 3. MAX3491 Pin Configuration and Typical Operating CircuitMAX3486/MAX3488/MAX3490/MAX3491True RS-485/RS-422 TransceiversFigure 22. MAX3488/MAX3490/MAX3491 Full-Duplex RS-485 NetworkFigure 23. Line Repeater for MAX3488/MAX3490/MAX3491MAX3486/MAX3488/MAX3490/MAX3491True RS-485/RS-422 Transceivers。
MAX1758EAI+T中文资料
MAX1758
o 300kHz PWM Oscillator Reduces Noise
Ordering Information
PART MAX1758EAI TEMP. RANGE -40°C to +85°C PIN-PACKAGE 28 SSOP
Typical Operating Circuit
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VHSD = VCSSP = VCSSN = 18V, V SHDN = VVL, VCELL = GND, VBATT = VCS = 4.2V, VVADJ = VREF / 2, VISETIN = VISETOUT = VREF, RTHM = 10kΩ, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SUPPLY AND REFERENCE DCIN Input Voltage Range DCIN Quiescent Supply Current DCIN to BATT Dropout Threshold, DCIN Falling DCIN to BATT Dropout Threshold, DCIN Rising VL Output Voltage VL Output Load Regulation REF Output Voltage REF Line Regulation REF Load Regulation SWITCHING REGULATOR PWM Oscillator Frequency LX Maximum Duty Cycle CSSN/CSSP Off-State Leakage HSD Off-State Leakage LX Off-State Leakage HSD to LX On-Resistance LX to PGND On-Resistance CS to BATT Current-Sensing Resistance BATT, CS Input Current RCS 6V < VDCIN < 28V Falling edge Rising edge 6V < VDCIN < 28V IVL = 0 to 15mA 6V < VDCIN < 28V 6V < VDCIN < 28V IREF = 0 to 1mA Nondropout fOSC In-dropout, fOSC / 4 VCSSN = VCSSP = VDCIN = 28V, V SHDN = GND VLX = PGND, VHSD = VDCIN = 28V, V SHDN = GND VLX = VHSD = VDCIN =28V, V SHDN = GND VBST = VLX + 4.5V See PWM Controller section Internal resistor between CS and BATT, 1.5A RMS operating V SHDN = GND, VBATT = 19V CELL = REF, VBATT = 15V, any charging state VBATT = 18V, done state 0.075 0.20 5.10 4.179 6 5 0.125 0.30 5.40 44 4.20 2 6 300 98 2 0.1 0.1 260 1 110 0.1 280 150 28 7 0.175 0.40 5.70 65 4.221 6 14 330 10 10 10 450 2 170 5 540 270 V mA V V V mV V mV mV kHz % µA µA µA mΩ Ω mΩ µA µA µA SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX3030EEUE+T中文资料
(MAX3031E, MAX3033E) o Available in 16-Pin TSSOP and Narrow SO
Packages o Low-Power Design (<330µW, VCC = 3.3V Static) o +3.3V Operation o Industry-Standard Pinout o Thermal Shutdown
DC ELECTRICAL CHARACTERISTICS
(3V ≤ VCC ≤ 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25°C.) (Note 1)
PARAMETER DRIVER OUTPUT: DO_+, DO_-
元器件交易网
MAX3030E–MAX3033E
±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters
ABSOLUTE MAXIMUM RATINGS
(All Voltages Are Referenced to Device Ground, Unless Otherwise Noted) VCC ........................................................................................+6V EN1&2, EN3&4, EN, EN............................................-0.3V to +6V DI_ ............................................................................-0.3V to +6V DO_+, DO_- (normal condition) .................-0.3V to (VCC + 0.3V) DO_+, DO_- (power-off or three-state condition).....-0.3V to +6V Driver Output Current per Pin.........................................±150mA
max485esa中文资料
General DescriptionThe MAX481, MAX483, MAX485, MAX487–MAX491, andMAX1487 are low-power transceivers for RS-485 and RS-422 communication. Each part contains one driver and onereceiver. The MAX483, MAX487, MAX488, and MAX489feature reduced slew-rate drivers that minimize E MI andreduce reflections caused by improperly terminated cables,thus allowing error-free data transmission up to 250kbps.The driver slew rates of the MAX481, MAX485, MAX490,MAX491, and MAX1487 are not limited, allowing them totransmit up to 2.5Mbps.These transceivers draw between 120µA and 500µA ofsupply current when unloaded or fully loaded with disableddrivers. Additionally, the MAX481, MAX483, and MAX487have a low-current shutdown mode in which they consumeonly 0.1µA. All parts operate from a single 5V supply.Drivers are short-circuit current limited and are protectedagainst excessive power dissipation by thermal shutdowncircuitry that places the driver outputs into a high-imped-ance state. The receiver input has a fail-safe feature thatguarantees a logic-high output if the input is open circuit.The MAX487 and MAX1487 feature quarter-unit-loadreceiver input impedance, allowing up to 128 MAX487/MAX1487 transceivers on the bus. Full-duplex communi-cations are obtained using the MAX488–MAX491, whilethe MAX481, MAX483, MAX485, MAX487, and MAX1487are designed for half-duplex applications.________________________Applications Low-Power RS-485 Transceivers Low-Power RS-422 Transceivers Level Translators Transceivers for EMI-Sensitive Applications Industrial-Control Local Area Networks__Next Generation Device Features o For Fault-Tolerant Applications MAX3430: ±80V Fault-Protected, Fail-Safe, 1/4Unit Load, +3.3V, RS-485 Transceiver MAX3440E–MAX3444E: ±15kV ESD-Protected,±60V Fault-Protected, 10Mbps, Fail-Safe, RS-485/J1708 Transceivers o For Space-Constrained Applications MAX3460–MAX3464: +5V, Fail-Safe, 20Mbps,Profibus RS-485/RS-422 Transceivers MAX3362: +3.3V, High-Speed, RS-485/RS-422Transceiver in a SOT23 Package MAX3280E–MAX3284E: ±15kV ESD-Protected,52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422,True Fail-Safe Receivers MAX3293/MAX3294/MAX3295: 20Mbps, +3.3V,SOT23, RS-485/RS-422 Transmitters o For Multiple Transceiver Applications MAX3030E–MAX3033E: ±15kV ESD-Protected,+3.3V, Quad RS-422 Transmitters o For Fail-Safe Applications MAX3080–MAX3089: Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422Transceiverso For Low-Voltage ApplicationsMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E: +3.3V Powered, ±15kVESD-Protected, 12Mbps, Slew-Rate-Limited,True RS-485/RS-422 Transceivers For pricing, delivery, and ordering information, please contact Maxim Direct at1-888-629-4642, or visit Maxim Integrated’s website at .______________________________________________________________Selection Table19-0122; Rev 10; 9/14PARTNUMBERHALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED LOW-POWER SHUTDOWN RECEIVER/DRIVER ENABLE QUIESCENT CURRENT (μA) NUMBER OF RECEIVERS ON BUS PIN COUNT MAX481Half 2.5No Yes Yes 300328MAX483Half 0.25Yes Yes Yes 120328MAX485Half 2.5No No Yes 300328MAX487Half 0.25Yes Yes Yes 1201288MAX488Full 0.25Yes No No 120328MAX489Full 0.25Yes No Yes 1203214MAX490Full 2.5No No No 300328MAX491Full 2.5No No Yes 3003214MAX1487 Half 2.5No No Yes 2301288Ordering Information appears at end of data sheet.找电子元器件上宇航军工MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-LimitedRS-485/RS-422 TransceiversPackage Information For the latest package outline information and land patterns, go to . Note that a “+”, “#”, or “-”in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.16Low-Power, Slew-Rate-Limited RS-485/RS-422 TransceiversMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-100017©2014 Maxim Integrated Products, Inc.Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.。
MEMORY存储芯片MAX3490EESA+T中文规格书
Figure 1. MAX3483/MAX3485/MAX3486 Pin Configuration and Typical Operating Circuit Figure 2. MAX3488/MAX3490 Pin Configuration and Typical Operating Circuit Figure 3. MAX3491 Pin Configuration and Typical Operating CircuitMAX3483/MAX3485/MAX3486/MAX3488/MAX3490/MAX34913.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 TransceiversDriver Output ProtectionExcessive output current and power dissipation caused by faults or by bus contention are prevented by two mechanisms. A foldback current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see Typical Operating Characteristics ). In addition, a thermal shut-down circuit forces the driver outputs into a high-impedance state if the die temperature rises excessively.Propagation Delay Figures 15–18 show the typical propagation delays. Skew time is simply the difference between the low-to-high and high-to-low propagation delay. Small driver/receiver skew times help maintain a symmetrical mark-space ratio (50% duty cycle).The receiver skew time, |t PRLH - t PRHL |, is under 10ns (20ns for the MAX3483/MAX3488). The driver skew times are 8ns for the MAX3485/MAX3490/MAX3491, 11ns for the MAX3486, and typically under 100ns for the MAX3483/MAX3488.Line Length vs. Data Rate The RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 23.Figures 19 and 20 show the system differential voltage for parts driving 4000 feet of 26AWG twisted-pair wire at 125kHz into 120Ω loads.Typical ApplicationsThe MAX3483, MAX3485, MAX3486, MAX3488, MAX3490, and MAX3491 transceivers are designed for bidirectional data communications on multipoint bus transmission lines. Figures 21 and 22 show typical net-work applications circuits. These parts can also be used as line repeaters, with cable lengths longer than 4000 feet, as shown in Figure 23.To minimize reflections, the line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as pos-sible. The slew-rate-limited MAX3483/MAX3488 and the partially slew-rate-limited MAX3486 are more tolerant of imperfect termination.Figure 21. MAX3483/MAX3485/MAX3486 Typical RS-485 NetworkMAX3483/MAX3485/MAX3486/MAX3488/MAX3490/MAX34913.3V-Powered, 10Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers。
MAX490ESA+T中文资料
For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .General DescriptionThe MAX481, MAX483, MAX485, MAX487–MAX491, and MAX1487 are low-power transceivers for RS-485 and RS-422 communication. Each part contains one driver and one receiver. The MAX483, MAX487, MAX488, and MAX489feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables,thus allowing error-free data transmission up to 250kbps.The driver slew rates of the MAX481, MAX485, MAX490,MAX491, and MAX1487 are not limited, allowing them to transmit up to 2.5Mbps.These transceivers draw between 120µA and 500µA of supply current when unloaded or fully loaded with disabled drivers. Additionally, the MAX481, MAX483, and MAX487have a low-current shutdown mode in which they consume only 0.1µA. All parts operate from a single 5V supply.Drivers are short-circuit current limited and are protected against excessive power dissipation by thermal shutdown circuitry that places the driver outputs into a high-imped-ance state. The receiver input has a fail-safe feature that guarantees a logic-high output if the input is open circuit.The MAX487 and MAX1487 feature quarter-unit-load receiver input impedance, allowing up to 128 MAX487/MAX1487 transceivers on the bus. Full-duplex communi-cations are obtained using the MAX488–MAX491, while the MAX481, MAX483, MAX485, MAX487, and MAX1487are designed for half-duplex applications.________________________ApplicationsLow-Power RS-485 Transceivers Low-Power RS-422 Transceivers Level TranslatorsTransceivers for EMI-Sensitive Applications Industrial-Control Local Area Networks__Next Generation Device Features♦For Fault-Tolerant ApplicationsMAX3430: ±80V Fault-Protected, Fail-Safe, 1/4Unit Load, +3.3V, RS-485 TransceiverMAX3440E–MAX3444E: ±15kV ESD-Protected,±60V Fault-Protected, 10Mbps, Fail-Safe, RS-485/J1708 Transceivers♦For Space-Constrained ApplicationsMAX3460–MAX3464: +5V, Fail-Safe, 20Mbps,Profibus RS-485/RS-422 TransceiversMAX3362: +3.3V, High-Speed, RS-485/RS-422Transceiver in a SOT23 PackageMAX3280E–MAX3284E: ±15kV ESD-Protected,52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422,True Fail-Safe ReceiversMAX3293/MAX3294/MAX3295: 20Mbps, +3.3V,SOT23, RS-855/RS-422 Transmitters ♦For Multiple Transceiver ApplicationsMAX3030E–MAX3033E: ±15kV ESD-Protected,+3.3V, Quad RS-422 Transmitters ♦For Fail-Safe ApplicationsMAX3080–MAX3089: Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422Transceivers♦For Low-Voltage ApplicationsMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E: +3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited,True RS-485/RS-422 TransceiversMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers______________________________________________________________Selection Table19-0122; Rev 8; 10/03Ordering Information appears at end of data sheet.M A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSSupply Voltage (V CC ).............................................................12V Control Input Voltage (RE , DE)...................-0.5V to (V CC + 0.5V)Driver Input Voltage (DI).............................-0.5V to (V CC + 0.5V)Driver Output Voltage (A, B)...................................-8V to +12.5V Receiver Input Voltage (A, B).................................-8V to +12.5V Receiver Output Voltage (RO).....................-0.5V to (V CC +0.5V)Continuous Power Dissipation (T A = +70°C)8-Pin Plastic DIP (derate 9.09mW/°C above +70°C)....727mW 14-Pin Plastic DIP (derate 10.00mW/°C above +70°C)..800mW 8-Pin SO (derate 5.88mW/°C above +70°C).................471mW14-Pin SO (derate 8.33mW/°C above +70°C)...............667mW 8-Pin µMAX (derate 4.1mW/°C above +70°C)..............830mW 8-Pin CERDIP (derate 8.00mW/°C above +70°C).........640mW 14-Pin CERDIP (derate 9.09mW/°C above +70°C).......727mW Operating Temperature RangesMAX4_ _C_ _/MAX1487C_ A...............................0°C to +70°C MAX4__E_ _/MAX1487E_ A.............................-40°C to +85°C MAX4__MJ_/MAX1487MJA...........................-55°C to +125°C Storage Temperature Range.............................-65°C to +160°C Lead Temperature (soldering, 10sec).............................+300°CDC ELECTRICAL CHARACTERISTICS(V CC = 5V ±5%, T A = T MIN to T MAX , unless otherwise noted.) (Notes 1, 2)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V V IN = -7VV IN = 12V V IN = -7V V IN = 12V Input Current (A, B)I IN2V TH k Ω48-7V ≤V CM ≤12V, MAX487/MAX1487R INReceiver Input Resistance -7V ≤V CM ≤12V, all devices except MAX487/MAX1487R = 27Ω(RS-485), Figure 40.4V ≤V O ≤2.4VR = 50Ω(RS-422)I O = 4mA, V ID = -200mV I O = -4mA, V ID = 200mV V CM = 0V-7V ≤V CM ≤12V DE, DI, RE DE, DI, RE MAX487/MAX1487,DE = 0V, V CC = 0V or 5.25VDE, DI, RE R = 27Ωor 50Ω, Figure 4R = 27Ωor 50Ω, Figure 4R = 27Ωor 50Ω, Figure 4DE = 0V;V CC = 0V or 5.25V,all devices except MAX487/MAX1487CONDITIONSk Ω12µA ±1I OZRThree-State (high impedance)Output Current at ReceiverV 0.4V OL Receiver Output Low Voltage 3.5V OH Receiver Output High Voltage mV 70∆V TH Receiver Input Hysteresis V -0.20.2Receiver Differential Threshold Voltage-0.2mA 0.25mA-0.81.01.55V OD2Differential Driver Output (with load)V 2V 5V OD1Differential Driver Output (no load)µA±2I IN1Input CurrentV 0.8V IL Input Low Voltage V 2.0V IH Input High Voltage V 0.2∆V OD Change in Magnitude of Driver Common-Mode Output Voltage for Complementary Output States V 0.2∆V OD Change in Magnitude of Driver Differential Output Voltage for Complementary Output States V 3V OC Driver Common-Mode Output VoltageUNITS MINTYPMAX SYMBOL PARAMETERMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers_______________________________________________________________________________________3SWITCHING CHARACTERISTICS—MAX481/MAX485, MAX490/MAX491, MAX1487(V CC = 5V ±5%, T A = T MIN to T MAX , unless otherwise noted.) (Notes 1, 2)DC ELECTRICAL CHARACTERISTICS (continued)(V CC = 5V ±5%, T A = T MIN to T MAX , unless otherwise noted.) (Notes 1, 2)ns 103060t PHLDriver Rise or Fall Time Figures 6 and 8, R DIFF = 54Ω, C L1= C L2= 100pF ns MAX490M, MAX491M MAX490C/E, MAX491C/E2090150MAX481, MAX485, MAX1487MAX490M, MAX491MMAX490C/E, MAX491C/E MAX481, MAX485, MAX1487Figures 6 and 8, R DIFF = 54Ω,C L1= C L2= 100pF MAX481 (Note 5)Figures 5 and 11, C RL = 15pF, S2 closedFigures 5 and 11, C RL = 15pF, S1 closed Figures 5 and 11, C RL = 15pF, S2 closed Figures 5 and 11, C RL = 15pF, S1 closed Figures 6 and 10, R DIFF = 54Ω,C L1= C L2= 100pFFigures 6 and 8,R DIFF = 54Ω,C L1= C L2= 100pF Figures 6 and 10,R DIFF = 54Ω,C L1= C L2= 100pF CONDITIONS ns 510t SKEW ns50200600t SHDNTime to ShutdownMbps 2.5f MAX Maximum Data Rate ns 2050t HZ Receiver Disable Time from High ns 103060t PLH 2050t LZ Receiver Disable Time from Low ns 2050t ZH Driver Input to Output Receiver Enable to Output High ns 2050t ZL Receiver Enable to Output Low 2090200ns ns 134070t HZ t SKD Driver Disable Time from High |t PLH - t PHL |DifferentialReceiver Skewns 4070t LZ Driver Disable Time from Low ns 4070t ZL Driver Enable to Output Low 31540ns51525ns 31540t R , t F 2090200Driver Output Skew to Output t PLH , t PHL Receiver Input to Output4070t ZH Driver Enable to Output High UNITS MIN TYP MAX SYMBOL PARAMETERFigures 7 and 9, C L = 100pF, S2 closed Figures 7 and 9, C L = 100pF, S1 closed Figures 7 and 9, C L = 15pF, S1 closed Figures 7 and 9, C L = 15pF, S2 closedM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 4_______________________________________________________________________________________SWITCHING CHARACTERISTICS—MAX483, MAX487/MAX488/MAX489(V CC = 5V ±5%, T A = T MIN to T MAX , unless otherwise noted.) (Notes 1, 2)SWITCHING CHARACTERISTICS—MAX481/MAX485, MAX490/MAX491, MAX1487 (continued)(V CC = 5V ±5%, T A = T MIN to T MAX , unless otherwise noted.) (Notes 1, 2)3001000Figures 7 and 9, C L = 100pF, S2 closed Figures 7 and 9, C L = 100pF, S1 closed Figures 5 and 11, C L = 15pF, S2 closed,A - B = 2VCONDITIONSns 40100t ZH(SHDN)Driver Enable from Shutdown toOutput High (MAX481)nsFigures 5 and 11, C L = 15pF, S1 closed,B - A = 2Vt ZL(SHDN)Receiver Enable from Shutdownto Output Low (MAX481)ns 40100t ZL(SHDN)Driver Enable from Shutdown toOutput Low (MAX481)ns 3001000t ZH(SHDN)Receiver Enable from Shutdownto Output High (MAX481)UNITS MINTYP MAX SYMBOLPARAMETERt PLH t SKEW Figures 6 and 8, R DIFF = 54Ω,C L1= C L2= 100pFt PHL Figures 6 and 8, R DIFF = 54Ω,C L1= C L2= 100pFDriver Input to Output Driver Output Skew to Output ns 100800ns ns 2000MAX483/MAX487, Figures 7 and 9,C L = 100pF, S2 closedt ZH(SHDN)Driver Enable from Shutdown to Output High2502000ns2500MAX483/MAX487, Figures 5 and 11,C L = 15pF, S1 closedt ZL(SHDN)Receiver Enable from Shutdown to Output Lowns 2500MAX483/MAX487, Figures 5 and 11,C L = 15pF, S2 closedt ZH(SHDN)Receiver Enable from Shutdown to Output Highns 2000MAX483/MAX487, Figures 7 and 9,C L = 100pF, S1 closedt ZL(SHDN)Driver Enable from Shutdown to Output Lowns 50200600MAX483/MAX487 (Note 5) t SHDN Time to Shutdownt PHL t PLH , t PHL < 50% of data period Figures 5 and 11, C RL = 15pF, S2 closed Figures 5 and 11, C RL = 15pF, S1 closed Figures 5 and 11, C RL = 15pF, S2 closed Figures 5 and 11, C RL = 15pF, S1 closed Figures 7 and 9, C L = 15pF, S2 closed Figures 6 and 10, R DIFF = 54Ω,C L1= C L2= 100pFFigures 7 and 9, C L = 15pF, S1 closed Figures 7 and 9, C L = 100pF, S1 closed Figures 7 and 9, C L = 100pF, S2 closed CONDITIONSkbps 250f MAX 2508002000Maximum Data Rate ns 2050t HZ Receiver Disable Time from High ns 25080020002050t LZ Receiver Disable Time from Low ns 2050t ZH Receiver Enable to Output High ns 2050t ZL Receiver Enable to Output Low ns ns 1003003000t HZ t SKD Driver Disable Time from High I t PLH - t PHL I DifferentialReceiver SkewFigures 6 and 10, R DIFF = 54Ω,C L1= C L2= 100pFns 3003000t LZ Driver Disable Time from Low ns 2502000t ZL Driver Enable to Output Low ns Figures 6 and 8, R DIFF = 54Ω,C L1= C L2= 100pFns 2502000t R , t F 2502000Driver Rise or Fall Time ns t PLH Receiver Input to Output2502000t ZH Driver Enable to Output High UNITS MIN TYP MAX SYMBOL PARAMETERMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers_______________________________________________________________________________________530002.5OUTPUT CURRENT vs.RECEIVER OUTPUT LOW VOLTAGE525M A X 481-01OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )1.515100.51.02.0203540450.90.1-50-252575RECEIVER OUTPUT LOW VOLTAGE vs.TEMPERATURE0.30.7TEMPERATURE (°C)O U T P U TL O W V O L T A G E (V )500.50.80.20.60.40100125-20-41.5 2.0 3.0 5.0OUTPUT CURRENT vs.RECEIVER OUTPUT HIGH VOLTAGE-8-16M A X 481-02OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )2.5 4.0-12-18-6-14-10-203.54.5 4.83.2-50-252575RECEIVER OUTPUT HIGH VOLTAGE vs.TEMPERATURE3.64.4TEMPERATURE (°C)O U T P UT H I G H V O L T A G E (V )0504.04.63.44.23.83.01001259000 1.0 3.0 4.5DRIVER OUTPUT CURRENT vs.DIFFERENTIAL OUTPUT VOLTAGE1070M A X 481-05DIFFERENTIAL OUTPUT VOLTAGE (V)O U T P U T C U R R E N T (m A )2.0 4.05030806040200.5 1.5 2.53.5 2.31.5-50-2525125DRIVER DIFFERENTIAL OUTPUT VOLTAGEvs. TEMPERATURE1.72.1TEMPERATURE (°C)D I F FE R E N T I A L O U T P U T V O L T A G E (V )751.92.21.62.01.8100502.4__________________________________________Typical Operating Characteristics(V CC = 5V, T A = +25°C, unless otherwise noted.)NOTES FOR ELECTRICAL/SWITCHING CHARACTERISTICSNote 1:All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to deviceground unless otherwise specified.Note 2:All typical specifications are given for V CC = 5V and T A = +25°C.Note 3:Supply current specification is valid for loaded transmitters when DE = 0V.Note 4:Applies to peak current. See Typical Operating Characteristics.Note 5:The MAX481/MAX483/MAX487 are put into shutdown by bringing RE high and DE low. If the inputs are in this state for lessthan 50ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See Low-Power Shutdown Mode section.M A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 6___________________________________________________________________________________________________________________Typical Operating Characteristics (continued)(V CC = 5V, T A = +25°C, unless otherwise noted.)120008OUTPUT CURRENT vs.DRIVER OUTPUT LOW VOLTAGE20100M A X 481-07OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )6604024801012140-1200-7-5-15OUTPUT CURRENT vs.DRIVER OUTPUT HIGH VOLTAGE-20-80M A X 481-08OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )-31-603-6-4-2024-100-40100-40-60-2040100120MAX1487SUPPLY CURRENT vs. TEMPERATURE300TEMPERATURE (°C)S U P P L Y C U R R E N T (µA )20608050020060040000140100-50-2550100MAX481/MAX485/MAX490/MAX491SUPPLY CURRENT vs. TEMPERATURE300TEMPERATURE (°C)S U P P L Y C U R R E N T (µA )257550020060040000125100-50-2550100MAX483/MAX487–MAX489SUPPLY CURRENT vs. TEMPERATURE300TEMPERATURE (°C)S U P P L Y C U R R E N T (µA )257550020060040000125MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers_______________________________________________________________________________________7______________________________________________________________Pin DescriptionFigure 1. MAX481/MAX483/MAX485/MAX487/MAX1487 Pin Configuration and Typical Operating CircuitM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487__________Applications InformationThe MAX481/MAX483/MAX485/MAX487–MAX491 and MAX1487 are low-power transceivers for RS-485 and RS-422 communications. The MAX481, MAX485, MAX490,MAX491, and MAX1487 can transmit and receive at data rates up to 2.5Mbps, while the MAX483, MAX487,MAX488, and MAX489 are specified for data rates up to 250kbps. The MAX488–MAX491 are full-duplex trans-ceivers while the MAX481, MAX483, MAX485, MAX487,and MAX1487 are half-duplex. In addition, Driver Enable (DE) and Receiver Enable (RE) pins are included on the MAX481, MAX483, MAX485, MAX487, MAX489,MAX491, and MAX1487. When disabled, the driver and receiver outputs are high impedance.MAX487/MAX1487:128 Transceivers on the BusThe 48k Ω, 1/4-unit-load receiver input impedance of the MAX487 and MAX1487 allows up to 128 transceivers on a bus, compared to the 1-unit load (12k Ωinput impedance) of standard RS-485 drivers (32 trans-ceivers maximum). Any combination of MAX487/MAX1487 and other RS-485 transceivers with a total of 32 unit loads or less can be put on the bus. The MAX481/MAX483/MAX485 and MAX488–MAX491 have standard 12k ΩReceiver Input impedance.Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 8_______________________________________________________________________________________Figure 2. MAX488/MAX490 Pin Configuration and Typical Operating CircuitFigure 3. MAX489/MAX491 Pin Configuration and Typical Operating CircuitMAX483/MAX487/MAX488/MAX489:Reduced EMI and ReflectionsThe MAX483 and MAX487–MAX489 are slew-rate limit-ed, minimizing EMI and reducing reflections caused by improperly terminated cables. Figure 12 shows the dri-ver output waveform and its Fourier analysis of a 150kHz signal transmitted by a MAX481, MAX485,MAX490, MAX491, or MAX1487. High-frequency har-monics with large amplitudes are evident. Figure 13shows the same information displayed for a MAX483,MAX487, MAX488, or MAX489 transmitting under the same conditions. Figure 13’s high-frequency harmonics have much lower amplitudes, and the potential for EMI is significantly reduced.MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers_______________________________________________________________________________________9_________________________________________________________________Test CircuitsFigure 4. Driver DC Test Load Figure 5. Receiver Timing Test LoadFigure 6. Driver/Receiver Timing Test Circuit Figure 7. Driver Timing Test LoadM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 10_______________________________________________________Switching Waveforms_________________Function Tables (MAX481/MAX483/MAX485/MAX487/MAX1487)Figure 8. Driver Propagation DelaysFigure 9. Driver Enable and Disable Times (except MAX488 and MAX490)Figure 10. Receiver Propagation DelaysFigure 11. Receiver Enable and Disable Times (except MAX488and MAX490)Table 1. TransmittingTable 2. ReceivingLow-Power Shutdown Mode (MAX481/MAX483/MAX487)A low-power shutdown mode is initiated by bringing both RE high and DE low. The devices will not shut down unless both the driver and receiver are disabled.In shutdown, the devices typically draw only 0.1µA of supply current.RE and DE may be driven simultaneously; the parts are guaranteed not to enter shutdown if RE is high and DE is low for less than 50ns. If the inputs are in this state for at least 600ns, the parts are guaranteed to enter shutdown.For the MAX481, MAX483, and MAX487, the t ZH and t ZL enable times assume the part was not in the low-power shutdown state (the MAX485/MAX488–MAX491and MAX1487 can not be shut down). The t ZH(SHDN)and t ZL(SHDN)enable times assume the parts were shut down (see Electrical Characteristics ).It takes the drivers and receivers longer to become enabled from the low-power shutdown state (t ZH(SHDN ), t ZL(SHDN)) than from the operating mode (t ZH , t ZL ). (The parts are in operating mode if the –R —E –,DE inputs equal a logical 0,1 or 1,1 or 0, 0.)Driver Output ProtectionExcessive output current and power dissipation caused by faults or by bus contention are prevented by two mechanisms. A foldback current limit on the output stage provides immediate protection against short cir-cuits over the whole common-mode voltage range (see Typical Operating Characteristics ). In addition, a ther-mal shutdown circuit forces the driver outputs into a high-impedance state if the die temperature rises excessively.Propagation DelayMany digital encoding schemes depend on the differ-ence between the driver and receiver propagation delay times. Typical propagation delays are shown in Figures 15–18 using Figure 14’s test circuit.The difference in receiver delay times, | t PLH - t PHL |, is typically under 13ns for the MAX481, MAX485,MAX490, MAX491, and MAX1487 and is typically less than 100ns for the MAX483 and MAX487–MAX489.The driver skew times are typically 5ns (10ns max) for the MAX481, MAX485, MAX490, MAX491, and MAX1487, and are typically 100ns (800ns max) for the MAX483 and MAX487–MAX489.MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers______________________________________________________________________________________1110dB/div0Hz5MHz500kHz/div10dB/div0Hz5MHz500kHz/divFigure 12. Driver Output Waveform and FFT Plot of MAX481/MAX485/MAX490/MAX491/MAX1487 Transmitting a 150kHz SignalFigure 13. Driver Output Waveform and FFT Plot of MAX483/MAX487–MAX489 Transmitting a 150kHz SignalM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 12______________________________________________________________________________________V CC = 5V T A = +25°CV CC = 5V T A = +25°CV CC = 5V T A = +25°CV CC = 5V T A = +25°CFigure 14. Receiver Propagation Delay Test CircuitFigure 15. MAX481/MAX485/MAX490/MAX491/MAX1487Receiver t PHLFigure 16. MAX481/MAX485/MAX490/MAX491/MAX1487Receiver t PLHPHL Figure 18. MAX483, MAX487–MAX489 Receiver t PLHLine Length vs. Data RateThe RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 23.Figures 19 and 20 show the system differential voltage for the parts driving 4000 feet of 26AWG twisted-pair wire at 110kHz into 120Ωloads.Typical ApplicationsThe MAX481, MAX483, MAX485, MAX487–MAX491, and MAX1487 transceivers are designed for bidirectional data communications on multipoint bus transmission lines.Figures 21 and 22 show typical network applications circuits. These parts can also be used as line repeaters, with cable lengths longer than 4000 feet, as shown in Figure 23.To minimize reflections, the line should be terminated at both ends in its characteristic impedance, and stub lengths off the main line should be kept as short as possi-ble. The slew-rate-limited MAX483 and MAX487–MAX489are more tolerant of imperfect termination.MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers______________________________________________________________________________________13DIV Y -V ZRO5V 0V1V0V -1V5V 0V2µs/divFigure 19. MAX481/MAX485/MAX490/MAX491/MAX1487 System Differential Voltage at 110kHz Driving 4000ft of Cable Figure 20. MAX483, MAX487–MAX489 System Differential Voltage at 110kHz Driving 4000ft of CableFigure 21. MAX481/MAX483/MAX485/MAX487/MAX1487 Typical Half-Duplex RS-485 NetworkM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 14______________________________________________________________________________________Figure 22. MAX488–MAX491 Full-Duplex RS-485 NetworkFigure 23. Line Repeater for MAX488–MAX491Isolated RS-485For isolated RS-485 applications, see the MAX253 and MAX1480 data sheets.MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers______________________________________________________________________________________15_______________Ordering Information_________________Chip TopographiesMAX481/MAX483/MAX485/MAX487/MAX1487N.C. RO 0.054"(1.372mm)0.080"(2.032mm)DE DIGND B N.C.V CCARE * Contact factory for dice specifications.__Ordering Information (continued)M A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 16______________________________________________________________________________________TRANSISTOR COUNT: 248SUBSTRATE CONNECTED TO GNDMAX488/MAX490B RO 0.054"(1.372mm)0.080"(2.032mm)N.C. DIGND Z A V CCYN.C._____________________________________________Chip Topographies (continued)MAX489/MAX491B RO 0.054"(1.372mm)0.080"(2.032mm)DE DIGND Z A V CCYREMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers______________________________________________________________________________________17Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)S O I C N .E P SM A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers 18______________________________________________________________________________________Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)MAX481/MAX483/MAX485/MAX487–MAX491Low-Power, Slew-Rate-Limited RS-485/RS-422 TransceiversMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________19©2003 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.M A X 481/M A X 483/M A X 485/M A X 487–M A X 491/M A X 1487P D I P N .E PSPackage Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)。
MAX1680ESA+T中文资料
PART MAX1680C/D MAX1680ESA MAX1681C/D MAX1681ESA
TEMP. RANGE 0°C to +70°C -40°C to +85°C 0°C to +70°C -40°C to +85°C
*Contact factory for dice specifications.
Note 1: Shorting OUT to IN may damage the device and should be avoided.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2.0
MAX1681
3.0
MAX1680
2.5
MAX1681
4.0
5.5 5.5
V 5.5
V 5.5
Supply Current
MAX1680 I+
MAX1822ESA+T中文资料
400 350 SUPPLY CURRENT (µA) 300 250 200 150 100 50
10
1
2
3
4
5
6
7
8
9
10
C3 CAPACITOR VALUE (µF)
C3 CAPACITOR VALUE (µF)
MAX1822 SUPPLY CURRENT vs. SUPPLY VOLTAGE
ELECTRICAL CHARACTERISTICS
(VCC = +5V, TA = TMIN to TMAX, unless otherwise noted.)
PARAMETER Supply Voltage SYMBOL VCC IOUT = 0, VCC = 3.5V, C1 = C2 = 0.047µF, C3 = 1µF IOUT = 0, VCC = 4.5V, C1 = C2 = 0.047µF, C3 = 1µF IOUT = 0, VCC = 16.5V, C1 = C2 = 0.01µF, C3 = 1µF (Note 2) High-Side Voltage (Note 1) VOUT IOUT = 50µA, VCC = 3.5V, C1 = C2 = 0.047µF, C3 = 1µF IOUT = 250µA, VCC = 5V, C1 = C2 = 0.047µF, C3 = 1µF IOUT = 500µA, VCC = 16.5V, C1 = C2 = 0.01µF, C3 = 1µF (Note 2) Power-Ready Threshold Power-Ready Output High Power-Ready Output Low Output Voltage Ripple Switching Frequency PRT PROH PROL VR FO IOUT = 0, VCC = 5V, C1 = C2 = 0.047µF, C3 = 1µF, TA = +25°C IOUT = 0, VCC = 16.5V, C1 = C2 = 0.047µF, C3 = 1µF, TA = +25°C IOUT = 0 (Note 3) ISOURCE = 100µA ISINK = 1mA C1 = C2 = 0.01µF, C3 = 10µF, IOUT = 1mA, VCC = 16.5V 50 90 150 150 500 µA 350 CONDITIONS MIN 3.5 11.5 14.5 26.5 8.5 15 26.5 12 3.8 13.5 4.3 12.5 15.5 27.5 10.5 TYP MAX 16.5 16.5 17.5 29.5 V 16.5 18 29.5 14.5 5 0.4 V V V mV kHz UNITS V
MAX3088ESA+中文资料
MAX1951ESA+T中文资料
General DescriptionThe MAX1951/MAX1952 high-efficiency, DC-to-DC step-down switching regulators deliver up to 2A of out-put current. The devices operate from an input voltage range of 2.6V to 5.5V and provide an output voltage from 0.8V to V IN , making the MAX1951/MAX1952 ideal for on-board postregulation applications. The MAX1951total output error is less than 1% over load, line, and temperature.The MAX1951/MAX1952 operate at a fixed frequency of 1MHz with an efficiency of up to 94%. The high operating frequency minimizes the size of external components.Internal soft-start control circuitry reduces inrush current.Short-circuit and thermal-overload protection improve design reliability.The MAX1951 provides an adjustable output from 0.8V to V IN , whereas the MAX1952 has a preset output of 1.8V. Both devices are available in a space-saving 8-pin SO package.ApplicationsASIC/DSP/µP/FPGA Core and I/O Voltages Set-Top Boxes Cellular Base StationsNetworking and TelecommunicationsFeatureso Compact 0.385in 2Circuit Footprinto 10µF Ceramic Input and Output Capacitors, 2µH Inductor for 1.5A Output o Efficiency Up to 94%o 1% Output Accuracy Over Load, Line, and Temperature (MAX1951, Up to 1.5A)o Guaranteed 2A Output Current o Operate from 2.6V to 5.5V Supplyo Adjustable Output from 0.8V to V IN (MAX1951)o Preset Output of 1.8V (1.5% Accuracy) (MAX1952)o Internal Digital Soft-Softo Short-Circuit and Thermal-Overload ProtectionMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators________________________________________________________________Maxim Integrated Products 1Ordering Information19-2622; Rev 1; 8/03For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .Typical Operating CircuitPin ConfigurationM A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.IN, V CC to GND........................................................-0.3V to +6V COMP, FB, REF to GND.............................-0.3V to (V CC + 0.3V)LX to Current (Note 1).........................................................±4.5A PGND to GND.............................................Internally Connected Continuous Power Dissipation (T A = +85°C)8-Pin SO (derate 12.2mW/°C above +70°C)................976mWOperating Temperature RangeMAX195_ ESA..................................................-40°C to +85°C Junction Temperature Range............................-40°C to +150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CNote 1:LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceedthe IC ’s package power dissipation limits.MAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS (continued)(V IN = V CC = 3.3V, PGND = GND, FB in regulation, C REF = 0.1µF, T A = 0°C to +85°C , unless otherwise noted. Typical values are at T A = +25°C.)ELECTRICAL CHARACTERISTICSM A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 4_______________________________________________________________________________________Note 3:The LX output is designed to provide 2.4A RMS current.ELECTRICAL CHARACTERISTICS (continued)(V IN = V CC = 3.3V, PGND = GND, FB in regulation, C REF = 0.1µF, T A = -40°C to +85°C , unless otherwise noted.) (Note 2)MAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators_______________________________________________________________________________________5EFFICIENCY vs. LOAD CURRENT(V CC = V IN = 5V)LOAD CURRENT (mA)E F F I C I E N C Y (%)100010010203040506070809010001010,000EFFICIENCY vs. LOAD CURRENT(V CC = V IN = 3.3V)LOAD CURRENT (mA)E F F I C I E N C Y (%)100010010203040506070809010001010,000REF VOLTAGEvs. REF OUTPUT CURRENTREF OUTPUT CURRENT (µA)R E F V O L T A G E (V )35302520151051.9901.9911.9921.9931.9941.9951.98940SWITCHING FREQUENCY vs. INPUT VOLTAGEINPUT VOLTAGE (V)S W I T C H I N G F R E Q U E N C Y (M H z )5.14.63.13.64.10.850.900.951.001.051.101.151.200.802.65.6OUTPUT VOLTAGE DEVIATIONvs. LOAD CURRENTLOAD CURRENT (A)O U T P U T V O L T A G ED E V I A T I O N (m V)1.20.80.4-5-4-3-2-10123456-61.6Typical Operating Characteristics(Typical values are at V IN = V CC = 5V, V OUT = 1.5V, I OUT = 1.5A, and T A = +25°C, unless otherwise noted. See Figure 2.)LOAD TRANSIENT RESPONSEMAX1951 toc0640µs/div0OUTPUT VOLTAGE:100mV/div, AC-COUPLED OUTPUT CURRENT:0.5A/div V IN = 5V V OUT = 2.5V I OUT = 0.5 TO 1ALOAD TRANSIENT RESPONSEMAX1951 toc0740µs/divOUTPUT VOLTAGE:100mV/div, AC-COUPLEDOUTPUT CURRENT:0.5A/div V IN = 3.3V V OUT = 1.5V I OUT = 0.5 TO 1AM A X 1951/M A X 19521MHz, All Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 6_______________________________________________________________________________________Typical Operating Characteristics (continued)(Typical values are at V IN = V CC = 5V, V OUT = 1.5V, I OUT = 1.5A, and T A = +25°C, unless otherwise noted. See Figure 2.)SHUTDOWN CURRENT vs. INPUT VOLTAGEM A X 1951 t o c 12INPUT VOLTAGE (V)S H U T D O W N C U R R E N T (m A )5.04.54.03.53.00.10.20.30.40.50.60.70.80.91.002.55.5SWITCHING WAVEFORMSMAX1951 toc08200ns/div0INDUCTOR CURRENT 1A/divV LX 5V/divOUTPUT VOLTAGE 10mV/div, AC-COUPLEDV IN = 3.3V V OUT = 1.8V I LOAD = 1.5ASOFT-START WAVEFORMSMAX1951 toc091ms/divV COMP 2V/divOUTPUT VOLTAGE 1V/divV IN = V CC = 3.3V V OUT = 2.5V I LOAD = 1.5ASOFT-START WAVEFORMSMAX1951 toc101ms/divV COMP 2V/divOUTPUT VOLTAGE 0.5V/divV IN = V CC = 3.3V V OUT = 0.8VSHUTDOWN WAVEFORMSMAX1951 toc1120µs/divV COMP 2V/divV LX 5V/divOUTPUT VOLTAGE 1V/divV IN = V CC = 3.3V V OUT = 2.5V I LOAD = 1.5AMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators_______________________________________________________________________________________7Detailed DescriptionThe MAX1951/MAX1952 high-efficiency switching regula-tors are small, simple, DC-to-DC step-down converters capable of delivering up to 2A of output current. The devices operate in pulse-width modulation (PWM) at a fixed frequency of 1MHz from a 2.6V to 5.5V input voltage and provide an output voltage from 0.8V to V IN , making the MAX1951/MAX1952 ideal for on-board postregula-tion applications. The high switching frequency allows for the use of smaller external components, and internal synchronous rectifiers improve efficiency and eliminate the typical Schottky free-wheeling diode. Using the on-resistance of the internal high-side MOSFET to sense switching currents eliminates current-sense resistors,further improving efficiency and cost. The MAX1951total output error over load, line, and temperature (0°C to +85°C) is less than 1%.Controller Block FunctionThe MAX1951/MAX1952 step-down converters use a PWM current-mode control scheme. An open-loop com-parator compares the integrated voltage-feedback signal against the sum of the amplified current-sense signal and the slope compensation ramp. At each rising edge of the internal clock, the internal high-side MOSFET turns on until the PWM comparator trips. During this on-time, cur-rent ramps up through the inductor, sourcing current to the output and storing energy in the inductor. The current-mode feedback system regulates the peak inductor cur-rent as a function of the output voltage error signal. Since the average inductor current is nearly the same as the peak inductor current (<30% ripple current), the circuit acts as a switch-mode transconductance amplifier. To preserve inner-loop stability and eliminate inductor stair-casing, a slope-compensation ramp is summed into the main PWM comparator. During the second half of the cycle, the internal high-side P-channel MOSFET turns off,and the internal low-side N-channel MOSFET turns on.The inductor releases the stored energy as its current ramps down while still providing current to the output. The output capacitor stores charge when the inductor current exceeds the load current, and discharges when the inductor current is lower, smoothing the voltage across the load. Under overload conditions, when the inductor current exceeds the current limit (see the Current Limit section), the high-side MOSFET does not turn on at the rising edge of the clock and the low-side MOSFET remains on to let the inductor current ramp down.Current SenseAn internal current-sense amplifier produces a current signal proportional to the voltage generated by the high-side MOSFET on-resistance and the inductor cur-rent (R DS(ON) x I LX ). The amplified current-sense signal and the internal slope compensation signal are summed together into the comparator ’s inverting input.The PWM comparator turns off the internal high-side MOSFET when this sum exceeds the output from the voltage-error amplifier.Current LimitThe internal high-side MOSFET has a current limit of 3.1A (typ). If the current flowing out of LX exceeds this limit,the high-side MOSFET turns off and the synchronous rectifier turns on. This lowers the duty cycle and causes the output voltage to droop until the current limit is no longer exceeded. A synchronous rectifier current limit of -0.6A (typ) protects the device from current flowing into LX. If the negative current limit is exceeded, the synchro-nous rectifier turns off, forcing the inductor current to flowM A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 8_______________________________________________________________________________________through the high-side MOSFET body diode, back to the input, until the beginning of the next cycle or until the inductor current drops to zero. The MAX1951/MAX1952utilize a pulse-skip mode to prevent overheating during short-circuit output conditions. The device enters pulse-skip mode when the FB voltage drops below 300mV, lim-iting the current to 3A (typ) and reducing power dissipation. Normal operation resumes upon removal of the short-circuit condition.V CC DecouplingDue to the high switching frequency and tight output tolerance (1%), decouple V CC with a 0.1µF capacitor connected from V CC to GND, and a 10Ωresistor con-nected from V CC to IN. Place the capacitor as close to V CC as possible.Soft-StartThe MAX1951/MAX1952 employ digital soft-start circuitry to reduce supply inrush current during startup conditions.When the device exits undervoltage lockout (UVLO), shut-down mode, or restarts following a thermal-overload event, or the external pulldown on COMP is released, the digital soft-start circuitry slowly ramps up the voltages at REF and FB (see the Soft-Start Waveforms in the Typical Operating Characteristics).Undervoltage LockoutIf V CC drops below 2.25V, the UVLO circuit inhibits switching. Once V CC rises above 2.35V, the UVLO clears, and the soft-start sequence activates.Compensationand Shutdown ModeThe output of the internal transconductance voltage error amplifier connects to COMP. The normal operation voltage for COMP is 1V to 2.2V. To shut down the MAX1951/MAX1952, use an NPN bipolar junction transistor or a very low output capacitance open-drain MOSFET to pull COMP to GND. Shutdown mode causes the internal MOSFETs to stop switching, forces LX to a high-impedance state, and shorts REF to G ND.Release COMP to exit shutdown and initiate the soft-start sequence.Thermal-Overload ProtectionThermal-overload protection limits total power dissipation in the device. When the junction temperature exceeds T J = +160°C, a thermal sensor forces the device into shut-down, allowing the die to cool. The thermal sensor turns the device on again after the junction temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following a thermal-shutdown condi-tion, the soft-start sequence begins.Figure 1. Functional DiagramMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators_______________________________________________________________________________________9Design ProcedureOutput Voltage Selection: Adjustable(MAX1951) or Preset (MAX1952)The MAX1951 provides an adjustable output voltage between 0.8V and V IN . Connect FB to output for 0.8V output. To set the output voltage of the MAX1951 to a voltage greater than V FB (0.8V typ), connect the output to FB and G ND using a resistive divider, as shown in Figure 2a. Choose R2 between 2k Ωand 20k Ω, and set R3 according to the following equation:R3 = R2 x [(V OUT / V FB ) – 1]The MAX1951 PWM circuitry is capable of a stable min-imum duty cycle of 18%. This limits the minimum output voltage that can be generated to 0.18 ✕V IN . Instability may result for V IN /V OUT ratios below 0.18.The MAX1952 provides a preset output voltage.Connect the output to FB, as shown in Figure 2b.Output Inductor DesignUse a 2µH inductor with a minimum 2A-rated DC cur-rent for most applications. For best efficiency, use an inductor with a DC resistance of less than 20m Ωand a saturation current greater than 3A (min). See Table 2for recommended inductors and manufacturers. For most designs, derive a reasonable inductor value (L INIT ) from the following equation:L INIT = V OUT x (V IN - V OUT ) / (V IN x LIR x I OUT(MAX)x f SW )where f SW is the switching frequency (1MHz typ) of the oscillator. Keep the inductor current ripple percentage LIR between 20% and 40% of the maximum load cur-rent for the best compromise of cost, size, and perfor-mance. Calculate the maximum inductor current as:I L(MAX)= (1 + LIR / 2) x I OUT(MAX)Check the final values of the inductor with the output ripple voltage requirement. The output ripple voltage is given by:V RIPPLE = V OUT x (V IN - V OUT ) x ESR / (V IN x L FINAL x f SW )where ESR is the equivalent series resistance of the output capacitors.Input Capacitor DesignThe input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit ’s switching.The input capacitor must meet the ripple current requirement (I RMS ) imposed by the switching currents defined by the following equation:For duty ratios less than 0.5, the input capacitor RMS current is higher than the calculated current. Therefore,use a +20% margin when calculating the RMS current at lower duty cycles. Use ceramic capacitors for their low ESR, equivalent series inductance (ESL), and lower cost. Choose a capacitor that exhibits less than 10°C temperature rise at the maximum operating RMS cur-rent for optimum long-term reliability.After determining the input capacitor, check the input ripple voltage due to capacitor discharge when the high-side MOSFET turns on. Calculate the input ripple voltage as follows:V IN_RIPPLE = (I OUT x V OUT ) / (f SW x V IN x C IN )Keep the input ripple voltage less than 3% of the input voltage.Output Capacitor DesignThe key selection parameters for the output capacitor are capacitance, ESR, ESL, and the voltage rating requirements. These affect the overall stability, output ripple voltage, and transient response of the DC-to-DC converter. The output ripple occurs due to variations in the charge stored in the output capacitor, the voltage drop due to the capacitor ’s ESR, and the voltage drop due to the capacitor ’s ESL. Calculate the output voltage ripple due to the output capacitance, ESR, and ESL as:V RIPPLE = V RIPPLE(C)+ V RIPPLE(ESR) + V RIPPLE(ESL)where the output ripple due to output capacitance,ESR, and ESL is:V RIPPLE(C)= I P-P / (8 x C OUT x f SW )V RIPPLE(ESR) = I P-P x ESRV RIPPLE(ESL)= (I P-P / t ON ) x ESL or (I P-P / t OFF ) x ESL,whichever is greater and I P-P the peak-to-peak inductor current is:I P-P = [ (V IN – V OUT ) / f SW x L) ] x V OUT / V INUse these equations for initial capacitor selection, but determine final values by testing a prototype or evalua-tion circuit. As a rule, a smaller ripple current results in less output voltage ripple. Since the inductor ripple current is a factor of the inductor value, the output voltage ripple decreases with larger inductance. Use ceramic capacitors for their low ESR and ESL at the switching frequency of the converter. The low ESL of ceramic capacitors makes ripple voltages negligible.Load transient response depends on the selected output capacitor. During a load transient, the output instantly changes by ESR x I LOAD . Before the controller can respond, the output deviates further, depending on the inductor and output capacitor values. After a short time (see the Load Transient Response graphin theM A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 10______________________________________________________________________________________Typical Operating Characteristic s), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on the closed-loop bandwidth. A higher bandwidth yields a faster response time, thus preventing the output from deviating further from its regulating value.Compensation DesignThe double pole formed by the inductor and output capacitor of most voltage-mode controllers introduces a large phase shift, which requires an elaborate compensa-tion network to stabilize the control loop. The MAX1951/MAX1952 utilize a current-mode control scheme that reg-ulates the output voltage by forcing the required current through the external inductor, eliminating the double pole caused by the inductor and output capacitor, and greatly simplifying the compensation network. A simple type 1compensation with single compensation resistor (R 1) and compensation capacitor (C 2) creates a stable and high-bandwidth loop.An internal transconductance error amplifier compen-sates the control loop. Connect a series resistor and capacitor between COMP (the output of the error ampli-fier) and G ND to form a pole-zero pair. The external inductor, internal current-sensing circuitry, output capacitor, and the external compensation circuit deter-mine the loop system stability. Choose the inductor and output capacitor based on performance, size, and cost.Additionally, select the compensation resistor and capacitor to optimize control-loop stability. The compo-nent values shown in the typical application circuit (Figure 2) yield stable operation over a broad range of input-to-output voltages.The basic regulator loop consists of a power modulator,an output feedback divider, and an error amplifier. The power modulator has DC gain set by gmc x R LOAD ,with a pole-zero pair set by R LOAD , the output capaci-tor (C OUT ), and its ESR. The following equations define the power modulator:Modulator gain:G MOD = ∆V OUT / ∆V COMP = gmc x R LOAD Modulator pole frequency:fp MOD = 1 / (2 x πx C OUT x (R LOAD +ESR))Modulator zero frequency:fz ESR = 1 / (2 x πx C OUT x ESR)where, R LOAD = V OUT / I OUT(MAX), and gmc = 4.2S.The feedback divider has a gain of G FB = V FB / V OUT ,where V FB is equal to 0.8V. The transconductance error amplifier has a DC gain, G EA(DC),of 70dB. The com-pensation capacitor, C 2,and the output resistance of the error amplifier, R OEA (20M Ω), set the dominantpole. C 2and R 1 set a compensation zero. Calculate the dominant pole frequency as:fp EA = 1 / (2πx C C x R OEA )Determine the compensation zero frequency is:fz EA = 1 / (2πx C C x R C )For best stability and response performance, set the closed-loop unity-gain frequency much higher than the modulator pole frequency. In addition, set the closed-loop crossover unity-gain frequency less than, or equal to, 1/5 of the switching frequency. However, set the maximum zero crossing frequency to less than 1/3 of the zero frequency set by the output capacitance and its ESR when using POSCAP, SPCAP, OSCON, or other electrolytic capacitors.The loop-gain equation at the unity-gain frequency is:G EA(fc) x G MOD(fc) x V FB / V OUT = 1where G EA(fc )= gm EA x R 1, and G MOD(fc)= gmc x R LOAD x fp MOD /f C, where gm EA = 60µS .R 1calculated as:R 1= V OUT x K / (gm EA x V FB x G MOD(fc))where K is the correction factor due to the extra phase introduced by the current loop at high frequencies (>100kHz). K is related to the value of the output capacitance (see Table 1 for values of K vs. C). Set the error-amplifier compensation zero formed by R 1and C 2at the modulator pole frequency at maximum load. C 2is calculated as follows:C 2= (2 x V OUT x C OUT / (R 1 x I OUT(MAX))As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly, resulting in a constant closed-loop unity-gain frequency. Use the following numerical example to calculate R 1and C 2values of the typical application circuit of Figure 2a.Table 1. K ValueV OUT = 1.5VI OUT(MAX)= 1.5A C OUT = 10µF R ESR = 0.010Ωgm EA = 60µSMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators______________________________________________________________________________________11gmc = 4.2Sf SWITCH = 1MHzR LOAD = V OUT / I OUT(MAX)= 1.5V / 1.5 A = 1Ωfp MOD = [1 / (2πx C OUT x (R LOAD + R ESR )]= [1 / (2 x π×10 ×10-6x (1 + 0.01)] = 15.76kHz.fz ESR = [1/(2πxC OUT R ESR )]= [1 / (2 x π×10 ×10-6×0.01)] = 1.59MHz.For 2µH output inductor, pick the closed-loop unity-gain crossover frequency (f C ) at 200kHz. Determine the power modulator gain at f C :G MOD(fc )= gmc ×R LOAD ×fp MOD / f C = 4.2 ×1 ×15.76kHz / 200kHz = 0.33then:R 1= V O x K / (gm EA x V FB x G MOD(fc )) = (1.5 x 0.55) /(60 ×10-6 ×0.8 ×0.33) ≈51.1k Ω(1%)C 2= (2 x V OUT ×C OUT ) / (R C ×I OUT(max))= (2 ×1.25 × 10 × 10-6)/ (51.1k ×1.5) ≈209pF, choose 220pF, 10%Applications InformationPC Board Layout ConsiderationsCareful PC board layout is critical to achieve clean and stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout:1)Place decoupling capacitors as close to the IC as possible. Keep power ground plane (connected to PG ND) and signal ground plane (connected to GND) separate.2)Connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane.3)Keep the high-current paths as short and wide as possible. Keep the path of switching current (C1 to IN and C1 to PG ND) short. Avoid vias in the switching paths.4)If possible, connect IN, LX, and PGND separately to a large copper area to help cool the IC to further improve efficiency and long-term reliability.5)Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC as possible.6)Route high-speed switching nodes away from sensi-tive analog areas (FB, COMP).Thermal ConsiderationsThe MAX1951 uses a fused-lead 8-pin SO package with a R THJC rating of 32°C/W. The MAX1951 EV kit layout is optimized for 1.5A. The typical application circuit shown in Figure 2c was tested with the existing MAX1951 EV kit layout at +85°C ambient temperature, and G ND lead temperature was measured at +113°C for a typical device. The estimated junction temperature was +138°C. Thermal performance can be further improved with one of the following options:1) Increase the copper areas connected to G ND, LX,and IN.2) Provide thermal vias next to G ND and IN, to the ground plane and power plane on the back side of PC board, with openings in the solder mask next to the vias to provide better thermal conduction.3) Provide forced-air cooling to further reduce case temperature.M A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 12______________________________________________________________________________________Figure 2a. MAX1951 Adjustable Output Typical Application CircuitFigure 2b. MAX1952 Fixed-Output Typical Application CircuitMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators______________________________________________________________________________________13Figure 2c. MAX1951 Typical Application Circuit with 2A OutputM A X 1951/M A X 19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC Regulators 14______________________________________________________________________________________Chip InformationTRANSISTOR COUNT: 2500PROCESS: BiCMOSMAX1951/MAX19521MHz, All-Ceramic, 2.6V to 5.5V Input,2A PWM Step-Down DC-to-DC RegulatorsMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embod ied in a Maxim prod uct. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________15©2003 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)。
max485esa中文资料
General DescriptionThe MAX481, MAX483, MAX485, MAX487–MAX491, andMAX1487 are low-power transceivers for RS-485 and RS-422 communication. Each part contains one driver and onereceiver. The MAX483, MAX487, MAX488, and MAX489feature reduced slew-rate drivers that minimize E MI andreduce reflections caused by improperly terminated cables,thus allowing error-free data transmission up to 250kbps.The driver slew rates of the MAX481, MAX485, MAX490,MAX491, and MAX1487 are not limited, allowing them totransmit up to 2.5Mbps.These transceivers draw between 120µA and 500µA ofsupply current when unloaded or fully loaded with disableddrivers. Additionally, the MAX481, MAX483, and MAX487have a low-current shutdown mode in which they consumeonly 0.1µA. All parts operate from a single 5V supply.Drivers are short-circuit current limited and are protectedagainst excessive power dissipation by thermal shutdowncircuitry that places the driver outputs into a high-imped-ance state. The receiver input has a fail-safe feature thatguarantees a logic-high output if the input is open circuit.The MAX487 and MAX1487 feature quarter-unit-loadreceiver input impedance, allowing up to 128 MAX487/MAX1487 transceivers on the bus. Full-duplex communi-cations are obtained using the MAX488–MAX491, whilethe MAX481, MAX483, MAX485, MAX487, and MAX1487are designed for half-duplex applications.________________________Applications Low-Power RS-485 Transceivers Low-Power RS-422 Transceivers Level Translators Transceivers for EMI-Sensitive Applications Industrial-Control Local Area Networks__Next Generation Device Features o For Fault-Tolerant Applications MAX3430: ±80V Fault-Protected, Fail-Safe, 1/4Unit Load, +3.3V, RS-485 Transceiver MAX3440E–MAX3444E: ±15kV ESD-Protected,±60V Fault-Protected, 10Mbps, Fail-Safe, RS-485/J1708 Transceivers o For Space-Constrained Applications MAX3460–MAX3464: +5V, Fail-Safe, 20Mbps,Profibus RS-485/RS-422 Transceivers MAX3362: +3.3V, High-Speed, RS-485/RS-422Transceiver in a SOT23 Package MAX3280E–MAX3284E: ±15kV ESD-Protected,52Mbps, +3V to +5.5V, SOT23, RS-485/RS-422,True Fail-Safe Receivers MAX3293/MAX3294/MAX3295: 20Mbps, +3.3V,SOT23, RS-485/RS-422 Transmitters o For Multiple Transceiver Applications MAX3030E–MAX3033E: ±15kV ESD-Protected,+3.3V, Quad RS-422 Transmitters o For Fail-Safe Applications MAX3080–MAX3089: Fail-Safe, High-Speed (10Mbps), Slew-Rate-Limited RS-485/RS-422Transceiverso For Low-Voltage ApplicationsMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E: +3.3V Powered, ±15kVESD-Protected, 12Mbps, Slew-Rate-Limited,True RS-485/RS-422 Transceivers For pricing, delivery, and ordering information, please contact Maxim Direct at1-888-629-4642, or visit Maxim Integrated’s website at .______________________________________________________________Selection Table19-0122; Rev 10; 9/14PARTNUMBERHALF/FULL DUPLEX DATA RATE (Mbps) SLEW-RATE LIMITED LOW-POWER SHUTDOWN RECEIVER/DRIVER ENABLE QUIESCENT CURRENT (μA) NUMBER OF RECEIVERS ON BUS PIN COUNT MAX481Half 2.5No Yes Yes 300328MAX483Half 0.25Yes Yes Yes 120328MAX485Half 2.5No No Yes 300328MAX487Half 0.25Yes Yes Yes 1201288MAX488Full 0.25Yes No No 120328MAX489Full 0.25Yes No Yes 1203214MAX490Full 2.5No No No 300328MAX491Full 2.5No No Yes 3003214MAX1487 Half 2.5No No Yes 2301288Ordering Information appears at end of data sheet.找电子元器件上宇航军工MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Low-Power, Slew-Rate-LimitedRS-485/RS-422 TransceiversPackage Information For the latest package outline information and land patterns, go to . Note that a “+”, “#”, or “-”in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status.16Low-Power, Slew-Rate-Limited RS-485/RS-422 TransceiversMAX481/MAX483/MAX485/MAX487–MAX491/MAX1487Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-100017©2014 Maxim Integrated Products, Inc.Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.。
MAX319ESA中文资料
_____________________Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
COM 1 N.C. 2 GND 3
V+ 4
MAX317
8 NC 7 V6 IN 5 VL
DIP/SO
MAX317
LOGIC
SWITCH
0
ON
Continuous Current (any terminal) .....................................30mA Peak Current, NC, NO, COM
(pulsed at 1ms, 10% duty cycle max)..........................100mA ESD .................................................................................±2000V
Operating Temperature Ranges: MAX31_C_ _.......................................................0°C to +70°C MAX31_E_ _ ....................................................-40°C to +85°C MAX31_MJA..................................................-55°C to +125°C
Storage Temperature Range ............................-55°C to +150°C Lead Temperature (soldering, 10sec) ............................+300°C
MAX3243EEAI-T中文资料
MAX3221E/MAX3223E/MAX3243E †
Ordering Information
PART MAX3221ECTE MAX3221ECUE MAX3221ECAE MAX3221EEAE MAX3221EETE MAX3221EEUE MAX3223ECPP MAX3223ECAP MAX3223ECUP MAX3223ECTP MAX3223EEPP MAX3223EEAP MAX3223EEUP MAX3223EETP TEMP RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C PINPACKAGE 16 Thin QFN-EP (5mm x 5mm) 16 TSSOP 16 SSOP 16 Thin QFN-EP (5mm x 5mm) 20 Plastic DIP 20 SSOP 20 TSSOP PKG CODE T1655-2 — — — T1655-2 — — — —
Pin Configurations appear at end of data sheet. Typical Operating Circuits appear at end of data sheet.
MAX3223E MAX3243E
AutoShutdown and ntegrated Products, Inc.
VCC to GND ..............................................................-0.3V to +6V V+ to GND (Note 1) ..................................................-0.3V to +7V V- to GND (Note 1) ...................................................+0.3V to -7V V+ + |V-| (Note 1) .................................................................+13V Input Voltages T_IN, EN, FORCEON, FORCEOFF to GND ............-0.3V to +6V R_IN to GND ......................................................................±25V Output Voltages T_OUT to GND................................................................±13.2V R_OUT, R2OUTB, INVALID to GND .........-0.3V to (VCC + 0.3V) Short-Circuit Duration T_OUT to GND .........................................................Continuous Continuous Power Dissipation (TA = +70°C) 16-Pin SSOP (derate 7.14mW/°C above +70°C) ...........571mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ........754.7mW 16-Pin TQFN (derate 20.8mW/°C above +70°C) ......1666.7mW 20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)....889mW 20-Pin SSOP (derate 8.00mW/°C above +70°C) ...........640mW 20-Pin TSSOP (derate 10.9mW/°C above +70°C) .........879mW 20-Pin TQFN (derate 21.3mW/°C above +70°C) ......1702.1mW 28-Pin SSOP (derate 9.52mW/°C above +70°C)............762mW 28-Pin TSSOP (derate 12.8mW/°C above +70°C) .......1026mW Operating Temperature Ranges MAX32_ _EC_ _ ....................................................0°C to +70°C MAX32_ _EE_ _..................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C
利用MAX291实现抗混叠滤波_高翠云
Realization Anti fold Filter Use for MAX291
GAO Cuiyun1 , JIA N G Zhaohui2
( 1. Hefei Univ ersi ty of T echnolog y, Hefei, 230009, Chi na; 2. Unive rsity of Science and Technolog y of China, Hefei, 230006, Chi na)
2 抗镜像滤波器选择
理论上如果遵守抽样定律 ,即 f s ≥ 2f c ,就可以避免镜 像效应产生。实 际上的信号 谱并不是矩 形截止的 ,同时由 于时域有限 ,高频分量不可避免。因此 ,在进行信号处理之 前 ,采用模拟低通滤波器来抑制大于 f s / 2的信号频率 , 这 就是抗镜像滤波器 (也称作抗混叠滤波器 )。在通带范围 , 为了不产生畸变 , 希望他有平坦的振幅特性和缓变的相位
fold filter , and discusses
1 问题的提出
随着现代工业的迅速发展 , 用户对电能质量的要求越 来越高 , 为此国家颁布了一系列标准 , 其中电网谐波就是 最重要的一个指标 [1]。 谐波监测为提高电网电能质量、 保 证电网安全运行以及电网治理提供保证。
对电网信号进行高次谐波分析时 , 一般采用离散傅里 叶变换。离散傅里叶变换意味着在时间域和频率域两方面 的周期化 , 周期化的结果带来一些新问题 , 这就是镜像效 应和频率泄漏。镜像效应是由于抽样的频率不够高 , 在频 率域周期化时产生了频谱的折叠而引起的。假设时域的抽 样间隔为 Δt ,即抽样频率 f s = 1 /Δt。如果时间函数 h ( t ) 的 上限频率为 f c ,且 f c > f s / 2,那么若以 f s 对 h (t )抽样 ,就相 当于把函数 h ( t ) 的频谱 H( f ) 以 f s 为周期在频率轴上进 行周期延拓 ,在 f s - f c 点与 f c 点之间发生了频谱重叠。f s - f c 点至 f c 点之间的频谱就是原频谱 H( f ) 中频率高于 f s / 2的那部分频谱镜像到低于 f s /2的那部分频谱上 ,产生 了频率畸变 [2] ,如图 1所示。
MAX490EESA+资料
Supply Control
Voltage (VCC) Input Voltage
.(.–R—..E.–..,..D..E..)........................................-.0....5..V...t.o...(.V..C...C...+...0...152VV)
♦ For Low-Voltage Applications: MAX3483E/MAX3485E/MAX3486E/MAX3488E/ MAX3490E/MAX3491E: +3.3V Powered, ±15kV ESD-Protected, 12Mbps, Slew-Rate-Limited, True RS-485/RS-422 Transceivers
General Description
The MAX481E, MAX483E, MAX485E, MAX487E– MAX491E, and MAX1487E are low-power transceivers for RS-485 and RS-422 communications in harsh environments. Each driver output and receiver input is protected against ±15kV electro-static discharge (ESD) shocks, without latchup. These parts contain one driver and one receiver. The MAX483E, MAX487E, MAX488E, and MAX489E feature reduced slew-rate drivers that minimize EMI and reduce reflections caused by improperly terminated cables, thus allowing error-free data transmission up to 250kbps. The driver slew rates of the MAX481E, MAX485E, MAX490E, MAX491E, and MAX1487E are not limited, allowing them to transmit up to 2.5Mbps.
MEMORY存储芯片MAX1951ESA+T中文规格书
M A X 1951/M A X 1952Typical Operating Characteristic s), the controllerresponds by regulating the output voltage back to itsnominal state. The controller response time depends onthe closed-loop bandwidth. A higher bandwidth yieldsa faster response time, thus preventing the output fromdeviating further from its regulating value.Compensation DesignThe double pole formed by the inductor and outputcapacitor of most voltage-mode controllers introduces a large phase shift, that requires an elaborate compensa-tion network to stabilize the control loop. The MAX1951/MAX1952 utilize a current-mode control scheme that reg-ulates the output voltage by forcing the required currentthrough the external inductor, eliminating the double polecaused by the inductor and output capacitor, and greatlysimplifying the compensation network. A simple type 1compensation with single compensation resistor (R 1) andcompensation capacitor (C2) creates a stable and high-bandwidth loop.An internal transconductance error amplifier compen-sates the control loop. Connect a series resistor andcapacitor between COMP (the output of the error ampli-fier) and GND to form a pole-zero pair. The externalinductor, internal current-sensing circuitry, outputcapacitor, and the external compensation circuit deter-mine the loop system stability. Choose the inductor andoutput capacitor based on performance, size, and cost.Additionally, select the compensation resistor andcapacitor to optimize control-loop stability. The compo-nent values shown in the typical application circuit(Figure 2) yield stable operation over a broad range ofinput-to-output voltages.The basic regulator loop consists of a power modulator,an output feedback divider, and an error amplifier. Thepower modulator has DC gain set by gmc x RLOAD ,with a pole-zero pair set by R LOAD , the output capaci-tor (COUT ), and its ESR. The following equations definethe power modulator:Modulator gain:G MOD = ΔV OUT /ΔV COMP = gmc x R LOADModulator pole frequency:fp MOD = 1 / (2 x πx C OUT x (R LOAD +ESR))Modulator zero frequency:fz ESR = 1 /(2 x πx C OUT x ESR)where, R LOAD = V OUT /I OUT(MAX), and gmc = 4.2S.The feedback divider has a gain of G FB = V FB / V OUT ,where VFB is equal to 0.8V. The transconductance erroramplifier has a DC gain, G EA(DC),of 70dB. The com-pensation capacitor, C2,and the output resistance ofthe error amplifier, R OEA (20M Ω), set the dominant pole. C 2and R 1 set a compensation zero. Calculate the dominant pole frequency as:fp EA = 1/(2πx C C x R OEA )Determine the compensation zero frequency is:fz EA = 1/(2πx C C x R C )F or best stability and response performance, set the closed-loop unity-gain frequency much higher than the modulator pole frequency. In addition, set the closed-loop crossover unity-gain frequency less than, or equal to, 1/5 of the switching frequency. However, set the maximum zero crossing frequency to less than 1/3 of the zero frequency set by the output capacitance and its ESR when using POSCAP, SPCAP, OSCON, or other electrolytic capacitors.The loop-gain equation at the unity-gain frequency is:G EA(fc) x G MOD(fc) x V FB /V OUT = 1where G EA(fc )= gm EA x R 1, and G MOD(fc)= gmc x R LOAD x fp MOD /f C, where gm EA = 60µS .R 1calculated as:R 1= V OUT x K/(gm EA x V FB x G MOD(fc))where K is the correction factor due to the extra phase introduced by the current loop at high frequencies (>100kHz). K is related to the value of the output capacitance (see Table 1 for values of K vs. C). Set the error-amplifier compensation zero formed by R 1and C 2at the modulator pole frequency at maximum load. C 2is calculated as follows:C 2= (V OUT x C OUT /(R 1 x I OUT(MAX))As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly, resulting in a constant closed-loop unity-gain frequency. Use the following numerical example to calculate R 1and C 2values of the typical application circuit of Figure 2a.V OUT = 1.5V I OUT(MAX)= 1.5A C OUT = 10µF R ESR = 0.010Ωgm EA = 60µS找MEMORY 、二三极管上美光存储1MHz, All-Ceramic, 2.6V to 5.5V Input, 2A PWM Step-Down DC-to-DC Regulatorsgmc = 4.2Sf SWITCH= 1MHzR LOAD= V OUT/I OUT(MAX)= 1.5V/1.5 A = 1Ωfp MOD= [1/(2πx C OUT x (R LOAD + R ESR)]= [1/(2 x π×10 ×10-6x (1 + 0.01)] = 15.76kHz. fz ESR= [1/(2πxC OUT R ESR)]= [1/(2 x π×10 ×10-6×0.01)] = 1.59MHz.For 2µH output inductor, pick the closed-loop unity-gain crossover frequency (f C) at 200kHz. Determine the power modulator gain at f C:G MOD(fc)= gmc ×R LOAD×fp MOD/f C= 4.2 ×1 ×15.76kHz/200kHz= 0.33then:R1= V O x K/(gm EA x V FB x G MOD(fc)) = (1.5 x 0.55)/(60 ×10-6 ×0.8 ×0.33) ≈51.1kΩ(1%)C2= (V OUT×C OUT)/(R×I OUT(max))= (1.5 × 10 × 10-6)/(51.1k ×1.5)≈196pF, choose 220pF, 10%Applications InformationPCB Layout Considerations Careful PCB layout is critical to achieve clean and sta-ble operation. The switching power stage requires par-ticular attention. Follow these guidelines for good PCB layout:1)Place decoupling capacitors as close to the IC aspossible. Keep power ground plane (connected to PGND) and signal ground plane (connected to GND) separate.2)Connect input and output capacitors to the powerground plane; connect all other capacitors to the signal ground plane.3)Keep the high-current paths as short and wide aspossible. Keep the path of switching current (C1 to INand C1 to PGND) short. Avoid vias in the switchingpaths.4)If possible, connect IN, LX, and PGND separately toa large copper area to help cool the IC to furtherimprove efficiency and long-term reliability.5)Ensure all feedback connections are short anddirect. Place the feedback resistors as close to theIC as possible.6)Route high-speed switching nodes away from sensi-tive analog areas (FB, COMP).Thermal ConsiderationsThe MAX1951 uses a fused-lead 8-pin SO package witha R THJC rating of 32°C/W. The MAX1951 EV kit layout is optimized for 1.5A. The typical application circuit shownin Figure 2c was tested with the existing MAX1951 EV kitlayout at +85°C ambient temperature, and GND lead temperature was measured at +113°C for a typical device. The estimated junction temperature was+138°C. Thermal performance can be further improvedwith one of the following options:1)Increase the copper areas connected to GND, LX,and IN.2)Provide thermal vias next to GND and IN, to theground plane and power plane on the back side ofPCB, with openings in the solder mask next to thevias to provide better thermal conduction.3)Provide forced-air cooling to further reduce casetemperature.MAX1951/MAX1952。