M38125ME-XXXFP中文资料
SAM 3X8E Hirel Arm 微控制器产品概述说明书
SAM 3X8E Hirel Arm® Microcontroller for AerospaceKey FeaturesCore• Arm Cortex®-M3 rev 2.0 running up to 84 MHz, delivering 105 DMips• Thumb®-2 instruction set, three-stage pipeline• Hardware divide, single cycle 32-bit multiply• Enhanced system debug with extensive breakpoint and trace capabilitiesMemory• 512 Kbytes in dual bank of 256 Kbytes embedded Flash • 64 + 32 Kbytes of SRAM memories in dual bank• 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines• Static Memory Controller (SMC): SRAM, NOR, NAND support Nand Flash controller with 4 Kbyte RAM buffer and ECCSystem• Embedded voltage regulator for single supply operation • Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe reset• Quartz or ceramic resonator oscillators: 3 to 20 MHz main and optional low power 32.768 kHz for RTC or device clock • High precision 8/12 MHz factory trimmed internal RC oscil-lator with 4 MHz default frequency for fast device startup • Slow clock internal RC oscillator as permanent clock for device clock in low-power mode• 3.0V to 3.6V/84 MHz operating voltage and speed grade • Temperature: –40˚C to +105˚C• One PLL for device clock and one dedicated PLL for USB2.0 high-speed mini host/device• Up to 17 peripheral DMA (PDC) channels and 6-channel central DMA plus dedicated DMA for Ethernet MAC• Low-power modesSAM3X8ECortex®-M384 MHzMPU6 LayerAHB Matrix25 ch DMAConnectivity22System1.8V RegulatorPOR, BOD2 Xtal OSC,2 RC OSC, 2 PLLWDT, RTT, RTCTRNGMemory Control16 ch, 12-bit ADC2 ch, 12-bit DACTemperatureSensor8x PWM9x 32-bit TimersUp to 103 IOsThe Microchip name and logo and the Microchip logo are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Arm and Cortex are registered trademarks of Arm Limited (or its subsidiaries) in the EU and other countries All other trademarks mentioned herein are property of their respective companies. © 2021, Microchip Technology Incorporated. All Rights Reserved. 7/21 DS00002753BSpace Environment• Full wafer loT traceability• 144-lead hermetic ceramic package• Space grade screening and qualification• Total ionizing dose: up to 30 KRad (Si), QML and ESCC • Heavy ions and Protons test• Single Event latch-up LET> 62 MeV.cm2/mg• SEU full characterization at 105°C for all functional blocks •Safety application noteSAM3X8E Developement Tools• Arduino Due Development Board: /• Atmel Studio and software package: Worldwide supportecosystem of industry-leading suppliers of development tools, real-time operating systems and middleware productsOther Aerospace Applications• Full wafer lot traceability • 144-lead plastic package• QML-N/AQEC/AEC-Q100 equivalent• Unitary burn-in and temperature cycling (opt.)• Neutrons Latch-up immune (opt.)• SEU full characterization (opt.)•Other aerospace applicationProduct Selection GuidePeripherals• Up to 4 USARTs (ISO7816, IrDA ®, Flow Control, SPI, Man-chester and LIN support) and one UART• 2 TWI (I 2C compatible), up to 4 SPIs, 1 SSC (I 2S), 1 HSMCI (SDIO/SD/MMC) with up to 2 slots• 9-channel 32-bit Timer Counter (TC) for capture, compare and PWM mode, quadrature decoder logic and 2-bit gray up/down counter for stepper motor•Up to 8-channel 16-bit PWM (PWMC) with complementary output, fault input, 12-bit dead time generator counter for motor control• 32-bit low-power Real-Time Timer (RTT) and low-power Real-Time Clock (RTC) with calendar and alarm features • 16-channel 12-bit 1 msps ADC with differential input mode and programmable gain stage • 2-channel 12-bit 1 msps DAC• Ethernet MAC 10/100 (EMAC) with dedicated DMA • 2 CAN controllers with 8, mailboxes•True Random Number Generator (TRNG)© ESA/ill./HUART Jacky。
M38124M4-XXXSP中文资料
To all our customersRegarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp.The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself.Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices.Renesas Technology Corp.Customer Support Dept.April 1, 2003MITSUBISHI MICROCOMPUTERS3812 GroupSINGLE-CHIP 8-BIT CMOS MICROCOMPUTER© 2002 MITSUBISHI ELECTRIC CORP.New publication, effective July 2002.Specifications subject to change without notice.REVISION HISTORY3812 GROUP USER’S MANUALRev.Date DescriptionPage Summary1.007/10/02The first edition is issued.(1/X)。
SMC书本资料
标准型(通孔)：CDQ2BP□-□DM-□□
二面宽 K
通孔 沉孔
±0.2
行程 行程
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两端螺孔的场合 缸径 O （mm） 50 63 80 标准型 缸径 (mm) 50 63 80 A B C D E F H M8X1.25 M10X1.5 M12X1.75
两端螺孔 CDQ2AP □ - □ DM- □□
IB 47 58 72
N 52 49 49
W 5 7 5.5
WC 34 38 44
WS 44 39 45
S 65 58 58
Z 90 80 80
ZZ 204 194 194
Hs 45 49 54.5
Ht 28 28 28
注）附件尺寸图参见P1.95
1.101
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P F
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行程
无杆侧法兰型：CDA1GP□-□□-□□
杆侧法兰型 缸径 40 50 63 80
B 71 81 101 119
FV 60 70 86 102
FD 9.0 9.0 11.5 13.5
FT 12 12 15 18
FX 80 90 105 130
FY 42 50 59 76
FZ 100 110 130 160
ZZ 190 210 227 270
中间耳轴型：CDA1TP□-□□-□□
Z+1/2 行程
行程
中间耳轴型 缸径 40 50 63 80
行程范围
带 1 个、 带2个
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-0.032 -0.059 -0.032 -0.059 -0.032 -0.059 -0.040 -0.073
IBM小机备件FRU大全
IBM小型机内存FC 适用于IBM 1930 1GB(2x512 MB) DDR2 DIMMS P51A,P52A,P55A,P561,P570IBM 1931 FRU：15R7168 2 GB (2x1 GB) DDR2 DIMMS P51A,P52A,P55A,P561,P570IBM 1932 FRU：15R7170 4GB(2x2GB) DDR2 DIMMS P51A,P52A,P55A,P561,P570IBM 1934 FRU：15R7172 8 GB (2x4 GB) DDR2 DIMMS P51A,P52A,P55A,P561,P570IBM 4100 1GB (2x512 MB) F80,M80,F85(P620),P660IBM 4120 512MB(2x 256MB) 170,265,270,P610,P640IBM 4121 1G(2 x512MB) 170,265,270,P610,P640IBM 4137 2GB (2x1GB) DIMMSIBM 4444 1GB (4x 256MB) P510,P520,P550IBM 4445 FRU:00P5769 4GB (4x1GB) DDR1 DIMMS，266 MHz P510,P520,P550IBM 4446 1GB (4x 256MB) P615,P510,P520,P550IBM 4447 2GB (4x512MB)DDR1 DIMMS P615,P510,P520,P550IBM 4448 4GB (4x1GB)DDR1 DIMMS P615IBM 4449 FRU:12R9257 8GB(4x2GB) DDR1 DIMMS, 266 MHz 00P5773 P615,P510,P520,P550IBM 4451 FRU:77P6498 2G(2*1GB) P520,P550 P560IBM 4452 2GB (4x512 MB) DDR1 DIMMS P630 P650 P520 P550 P560 P570IBM 4453 4GB (4x1GB) DDR1 DIMMS P630 P650 P520 P550 P560 P570IBM 4454 FRU:12R9259 8GB (4x2GB) DDR1 DIMMS, 266 MHz P630 P650 P520 P550 P560 P570IBM 4468 FRU:80P3274 64GB Memory Card ,633MHZ Inward Facing P670 P690 P670 P690 IBM 4482 FRU:97P2241 8GB Memory Card ,567MHZ Inward Facing P670 P690 P670 P690 IBM 4484 FRU:53P4252 16GB Memory Card ,567MHZ Inward Facing P670 P690 P670 P690 IBM 4486 FRU:00P5206 32GB Memory Card ,567MHZ Inward Facing P670 P690 P670 P690 IBM 4490 4GB (4x1GB) DDR1 DIMMS P630 P650 P520 P550 P560 P570IBM 4521 FRU:77P6498 2G(2*1GB) P6 P520,P550 P560IBM 4522 FRU:77P6499 4G(2*2GB) P6 P520,P550 P560IBM 4523 FRU:77P6500 8G(2*4GB)DDR2 memory DIMM, 667 MHz P6 520,P550 P560IBM光纤硬盘FAST（DS4300 DS4700）系列IBM 5205 2GB 36GB FC 10000转FAST（DS4300）光纤硬盘IBM 5206 2GB 73GB FC 10000转FAST（DS4300）光纤硬盘IBM 5207 32P0765 2GB 146GB FC 10000转FAST（DS4300）光纤硬盘IBM 5208 73P8022 2GB 300GB FC 10000转FAST（DS4300）光纤硬盘IBM 5212 49G6458 2GB 36.4GB FC 15000转FAST（DS4300）光纤硬盘IBM 5213 2GB 73.4GB FC 15000转FAST（DS4300）光纤硬盘IBM 5214 2GB 146GB FC 15000转FAST（DS4300）光纤硬盘IBM 5222 146G 2Gb FC 10K DS4700IBM 5223 300G 2GB FC 10K DS4700IBM 5233 146G 2GB FC 15K DS4700IBM 5413 73G 4GB FC 15K DS4700IBM 5414 146G 4GB FC 15K DS4700IBM 5415 300G 4GB FC 15K DS4700IBM小型机光纤卡（HBA卡）IBM 1910/5759 4GB 双口HBA光纤通道卡FC:1910/5759 P51A,P52A,P55A,P561,P570，P510,P520,P550,P560,P570IBM 2104/2340 光纤卡HBA卡24p0960 24p0961 2GB光纤道通卡IBM 2765 2G HBA光纤卡FRU: 80P4384IBM 5716 2GB 单口HBA光纤通道卡HBA卡FRU:03N7067 03N7069 RS6000专用P630,P650,P510,P520,P550,P570IBM 5758/1905 4GB 单口HBA光纤通道卡FC:1905/5758 P51A,P52A,P55A,P561,P570，P510,P520,P550,P560,P570IBM 5773 4GB PCI-E 单口HBA光纤通道卡FC:5773 全新，9117-MMA P570IBM 6228 1GB 单口HBA光纤通道卡FC:6228全新，P615，P630,P650,P670,P690IBM小型机其他卡SCSI/网卡SCSI卡IBM 1912 PCI-X 双口SCSI卡P51A,P52A,P55A,P561,P570IBM 5736 PCI-X 双口SCSI卡P510,P520,P550,P560,P570网卡IBM 5700 Gbit 单口光纤网卡P51A,P52A,P55A,P561,P570，P510,P520,P550,P560,P570 IBM 5701 10/100/1000MB 电口网卡P51A,P52A,P55A,P561,P570，P510,P520,P550,P560,P570IBM 5706IBM小型机电源IBM 6273 AC Power Supply 645W Base/R P630 小型机电源IBM 6282 RS6000 H80/H85 645W FRU:41L5448/00P3601/97P4025IBM 7889 P550 P55A 39J5638 39J2576 RS6000 电源IBM P590/P595 Motor Drive Assembly (MDA) FRU:41U0341,12R9038IBM P595 DCA 16R1062 41V0943 15R6710 电源IBM P595 DCA 44p4672 电源IBM 7888 AC Power Supply,240V,1400W FRU:39J2779/97P5676 P570电源模块IBM小型机硬盘IBM 1968 73GB/73.4GB 10Krpm 小型机内置硬盘全新原包P51A,P52A,P55A,P561,P570 IBM 1968 146GB/146.8GB 15Krpm 小型机内置硬盘P51A,P52A,P55A,P561,P570IBM 1969 146GB/146.8GB 10Krpm 小型机内置硬盘P51A,P52A,P55A,P561,P570IBM 1970 36GB 15k SCSI 小型机硬盘RS6000IBM 1971 73GB/73.4GB 15Krpm 小型机内置硬盘P51A,P52A,P55A,P561,P570IBM 1972 146GB 15,000 RPM 小型机硬盘RS6000IBM 1973 300GB 10K 小型机内置硬盘P51A,P52A,P55A,P561,P570IBM 3102 67G0535/34L7391 18.2GB ULTRA 10k RS6000 SCSI H80/6H1/6M1/M80/170IBM 3104 06H9389/07N3674 18.2GB ULTRA SCSI RS6000 SCSI F40/F50/H50/H70/S70/S7A IBM 3129 00P1519/07N7070/08K0283/09P4444/09p4439 36.4GB ULTRA3 10000转SCSI硬盘F80/6F1/B80 7025-6F0, 7025-6F1, 7025-F80, 7026-B80IBM 3158 36.4GB Ultra3 10000转RS6000 SCSI硬盘, U3 80p p630 7026-6C4,7038-6M2,7039-651,7040-61DIBM 3159 09P3924 73.4GB Ultra3 SCSI Disk Drive 10000转68 and 80 Pin (160MB/s) RS6000硬盘6F0,6F1,F80,B80,6C4,7038-6M2,7039-651,7040-61DIBM 3264 36.4GB Ultra3 10000转RS6000SCSI硬盘80p 7026-6C1IBM 3274 82G3274/00p2648/00P3811 73.4GB Ult320 10000转RS6000 SCSI硬盘U320 7029-6C3,7038-6M2,7039-651,7029-6E3IBM 3275 146GB Ult320 10000转RS6000 SCSI硬盘U320 6E4/6C4IBM 3276 146.8GB 10000转UITRA3 DISK RS6000 SCSI硬盘IBM 3277 82G3277 36.4GB Ult320 15000转RS6000 SCSI硬盘U320 6E4/6C4 p650IBM 3278 00p5260/00p2685/72.8GB Ult320 15000转RS6000 SCSI硬盘U320 7026-6C4,7029-6C3,7038-6M2,7039-651,7040-61D,7029-6E3IBM 3279 146GB Ult320 15000转RS6000 SCSI硬盘U320 6E4/6C4IBM 3280 36GB 15k SCSI 小型机硬盘RS6000IBM 3281 15k 73GB SCSI 小型机硬盘RS6000IBM 3578 300GB Ult320 10000转RS6000 SCSI硬盘P630 P650IBM 3585 300GB 15K 小型机内置硬盘P51A,P52A,P55A,P561,P570IBM小型机CPUIBM 5122 小型机CPU,2-way 1.2GHz Power4+ Processor Card P650IBM 5208 小型机CPU,2-way 1.65GHz Power4+ Processor Card P650IBM磁带机/磁带库IBM外置磁带机IBM 7206-336 36/72GB 4mm DDS5外置磁带机P51A,P52A,P55A,P561,P570，P510,P520,P550,P560,P570IBM 7206-220 20/40GB 4mm DDS4外置磁带机P520,P550,P560,P570IBM内置磁带机IBM 1991 36/72GB 4mm DDS5内置磁带机P52A,P55A,P520,P55A IBM 6185 20/40GB 4mm DDS4置磁带机P615,P630,P650,P670,P690IBM数据磁带IBM 59H4456 20/40GB 150M 4mm DDS4磁带/数据带IBM 18P7912 36/72GB 170M 4mm DDS5磁带/数据带IBM DS系列控制器/电池 DS4300控制器24P8206 IBM FAStT600/DS4300控制器，256MB Cache24P8225 IBM FAStT600/DS4300控制器，1GB Cache24P8062 IBM FAStT600/DS4300控制器电池，原装全新24P0953 IBM FAStT700/DS4400/FAStT900/DS4500电池battery。
M3535E1IRS9G12-850 红外发射管 产品规格书说明书
1产品规格书Production Specification客户名称（Customer name）：产品名称（Production name）：3535IR 型号（Model）：M3535E1IRS9G12-850编号（Part number）：日期（Date）：客户确认CUSTOMER CONFIRMATION确认Confirmed by审核Checked by核准Approved by备注：请检测后签回贵司的宝贵意见，谢谢支持！Note:please sign back your valuable comments after testing,thank you for your support!2目录Catalog1.特性（Features ）2.应用范围（Applications ）3.成品外观尺寸（Package Dimensions ）4.最大额定值（Maximum rating）5.光电特性参数（Electro-optical characteristics ）6.典型光电参数曲线（Typical optical characteristics curves ）7.BIN 级参数（Bin sorting parameters）8.编带规格（Tape Specification ）9.包装方式（Packaging ）10.标签描述（Label description ）11.可靠度实验项目及条件（Reliability Test Items And Conditions ）12.使用注意事项（Use of caveats ）31.特性（Features ）◆封装尺寸3.5*3.5*2.5/1.67mm ◆采用陶瓷基板封装Encapsulation Size Ceramic substrate encapsulation ◆焊接方式：回流焊◆符合RoHS 标准Welding Method:Reflow soldering Compliance with RoHS standards ◆采用高可靠性封装能量稳定◆体积小、功耗低、指向性好High reliability packaging energy stabilizationSmall size,low powerconsumption,good directivity2.应用范围（Applications ）◆摄像头（视频拍摄）数位摄影，监控，美容，治疗皮肤病等Camera (video shooting),digital photography,surveillance,beauty,treatment of skin diseases,etc◆楼寓对讲，防盗报警，红外防水，非视觉光源等Building intercom,burglar alarm,infrared waterproof,non visual light source,etc3．成品外观尺寸（Package Dimensions）备注：1.所有尺寸单位均以mm 单位.Remarks:All units of size in mm units.2.在没有明确标注的情况下正负公差为0.1mmA positive and negative tolerance of 0.1mm without a clear indication.44.最大额定值（Maximum rating）(Ta=25℃)项目Project 缩写Symbol 额定值Rating 单位Unit 峰值正向电流Peak forward currentIFP 1000mA 光功率Optical power IV 450mW 反向电压Reverse voltageVR 5V 漏电流Leakage currentIR 10µA 工作温度working temperatureTopr –40～85℃存储温度Storage temperatureTstg 5～30℃焊接温度welding temperatureTsld回流焊240℃不超过30sReflow soldering 240℃not more than 30s手动焊接300℃不超过3sManual welding at 300℃for no more than 3S℃ESD 等级（HBM)ESD 4000V（脉冲宽度≤10ms,占空比≤0.1）（Pulse width ≤10ms,duty cycle ≤0.1）5.主要光电参数（Electro-optical characteristics ）(Ta=25℃)项目Project 符号Symbol 测试条件（mA）Test conditions最小值Min 典型值Typ 最大值Max 单位Unit 正向电压Forward voltageVF IF=350mA1.4-2.0V 正向电流Forward currentIF --7001000mA 光功率Optical power IV --450-mW 发光角度Viewing Angle2θ½IF=350mA -120°波长Peak wavelengthλp IF=350mA 845850855nm 热阻Thermal resistanceRIF=350mA- 4.5-℃/W56.曲型光电参数曲线（Typical optical characteristics curves ）Relationship between voltage and currentRelationship between current and opticalpowerThe relationship between current and power Relationship between current and peakwavelengthLuminous angle Spectralwavelength67.BIN 级参数（Bin sorting parameters）(1)正向电压Forward voltage VF(公差tolerance ：±0.05V@IF=350mA)8.编带规格（Tape Specification ）：800PCS/卷(800pcs /Reel)最小值min(V)最大值max(V)1.62.02.0 2.22.22.479.包装方式（Packaging）10.标签描述（Label description ）Please use 70-75degree dehumidification for more than 15hours.Please sub contract the light splitting products,thank you!深圳市银月光科技有限公司P/N:WL:Φe ：IF:VF:Lot ：Qty ：请使用70-75度除湿，时间15小时以上。
FX系列PLC特殊元件及通信用元件
M8029 完成标志
√√
附表6 标志（D8020-D8029）
寄存器
内容
适用机型
寄存器
内容
适用机型
寄存器
内容
寄存器 FX1S FX1N FX2N FX2NC
内容
D8020 X0-X7的输入滤波数值
√ √ √ √ D8025
D8021
D8026
D8022
D8027
D8023
D8028 Z0(Z)寄存器的内容
注：上述位元件和字元件当在N:N网络通信时，不能作为其他用途。
特性
R R R W
数据寄存器 FX0N/FX1S FX1N/2N/2NC
名称
D8173
站点号
D8174
从站点总数
D8175
刷新范围
D8176
站点号设置
数据寄存器
描述
存储它自己的站点号 存储从站点总数 存储刷新范围 设置它自己的站点号（主站0；从站1-7）
√ √ √ √ M8036 强制RUN信号
M8032 全清保持存储器
√ √ √ √ M8037 强制STOP信号
M8033 存储器保存
√√ √ √
通信参数设定标记（N:N网络 M8038 站点设置专用，无需驱动线
圈，只需写入触点）
M8034 禁止所有输出
√ √ √ √ M8039 定时扫描
附表8 PLC方式（D8030-D8039）
M8160 XCH指令用（M8160=ON，且[D1]、[D2]指定为同一元件时，进行高低字节交换） M8164 FROM/TO指令的传送点数可变模式; M8164=ON时，D8164的内容将作为传送点数（n）处理 M8168 SMOV指令用（ON:仍为16位二进制码，以4位一组移位，OFF:自动变换为4位BCD码）
松下A5电机样本
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MSMA 2kW MSME 2kW
〈例：MSM、MDM 时〉 系列 A4 A5 轻量化
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株式会社三丰制造
Sony Manufacturing Systems 株式会社制造
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LM358DR中文资料
LM158, LM158A, LM258, LM258ALM158, LM158A, LM258, LM258ALM158, LM158A, LM258, LM258ALM158, LM158A, LM258, LM258APACKAGING INFORMATIONOrderable Device Status(1)Package Type Package Drawing PinsPackage Qty Eco Plan (2)Lead/Ball FinishMSL Peak Temp (3)5962-87710012A ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NC 5962-8771001PA ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC 5962-87710022A ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NC 5962-8771002PA ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158AFKB ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NCLM158AJG ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158AJGB ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158FKB ACTIVE LCCC FK 201None POST-PLATE Level-NC-NC-NCLM158JG ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM158JGB ACTIVE CDIP JG 81None A42SNPB Level-NC-NC-NC LM258AD ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258ADGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM258ADR ACTIVE SOIC D 82500Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258AP ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM258D ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM258DGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM258DR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM258P ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM2904AVQDR ACTIVE SOIC D 82500Pb-Free (RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIM LM2904AVQPWRACTIVE TSSOP PW 82000None CU NIPDAU Level-1-250C-UNLIM LM2904D ACTIVE SOIC D 875Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM2904DGKR ACTIVE MSOP DGK 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-2-260C-1YEAR LM2904DR ACTIVE SOIC D 82500Green (RoHS &no Sb/Br)CU NIPDAU Level-1-260C-UNLIM LM2904P ACTIVE PDIP P 850Pb-Free (RoHS)CU NIPDAU Level-NC-NC-NC LM2904PSR ACTIVE SO PS 82000Pb-Free (RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIM LM2904PW ACTIVE TSSOP PW 8150Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM LM2904PWLE OBSOLETE TSSOP PW 8None Call TI Call TILM2904PWR ACTIVE TSSOP PW 82000Pb-Free (RoHS)CU NIPDAU Level-1-250C-UNLIM LM2904QD OBSOLETE SOIC D 8None Call TI Call TILM2904QDROBSOLETESOICD8Pb-Free (RoHS)CU NIPDAULevel-2-250C-1YEAR/Level-1-235C-UNLIMPACKAGE OPTION ADDENDUM4-Mar-2005Addendum-Page 1Orderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)LM2904QP OBSOLETE PDIP P8None Call TI Call TILM2904VQDR ACTIVE SOIC D82500Pb-Free(RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIMLM2904VQPWR ACTIVE TSSOP PW82000None CU NIPDAU Level-1-250C-UNLIMLM358AD ACTIVE SOIC D875Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMLM358ADGKR ACTIVE MSOP DGK82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARLM358ADR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358AP ACTIVE PDIP P850Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCLM358APW ACTIVE TSSOP PW8150Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMLM358APWR ACTIVE TSSOP PW82000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMLM358D ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358DGKR ACTIVE MSOP DGK82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARLM358DR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-1-260C-UNLIMLM358P ACTIVE PDIP P850Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NCLM358PSLE OBSOLETE SO PS8None Call TI Call TILM358PSR ACTIVE SO PS82000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMLM358PW ACTIVE TSSOP PW8150Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM LM358PWLE OBSOLETE TSSOP PW8None Call TI Call TILM358PWR ACTIVE TSSOP PW82000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-May not be currently available-please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead(Pb-Free).Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean"Pb-Free"and in addition,uses package materials that do not contain halogens, including bromine(Br)or antimony(Sb)above0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it isprovided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI 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M38237GF-XXXFP资料
DESCRIPTIONThe 3823 group is the 8-bit microcomputer based on the 740 fam-ily core technology.The 3823 group has the LCD drive control circuit, an 8-channel A/ D converter, a serial interface, a watchdog timer, a ROM correc-tion function, and as additional functions.The various microcomputers in the 3823 group include variations of internal memory size and packaging. For details, refer to the section on part numbering.FEATURES●Basic machine-language instructions (71)●The minimum instruction execution time...........................0.4 µs (at f(X IN) = 10 MHz, High-speed mode)●Memory size ROM...............................................................16 K to 60 K bytes RAM.................................................................640 to 2560 bytes ●ROM correction function..............................32 bytes ✕ 2 blocks ●Watchdog timer..............................................................8-bit ✕ 1●Programmable input/output ports.. (49)●Input ports (5)●Software pull-up/pull-down resistors (Ports P0-P7 except port P40)●Interrupts.................................................17 sources, 16 vectors(includes key input interrupt)●Key Input Interrupt (Key-on Wake-Up) (8)●Timers...........................................................8-bit ✕ 3, 16-bit ✕ 2●Serial interface............8-bit ✕ 1 (UART or Clock-synchronized)●A/D converter............10-bit ✕ 8 channels or 8-bit ✕ 8 channels ●LCD drive control circuit Bias...................................................................................1/2, 1/3 Duty...........................................................................1/2, 1/3, 1/4 Common output.. (4)Segment output (32)●Main clock generating circuits..............Built-in feedback resistor(connect to external ceramic resonator or quartz-crystal oscillator)●Sub-clock generating circuits(connect to external quartz-crystal oscillator or on-chip oscillator)●Power source voltageIn frequency/2 mode (f(X IN) ≤ 10 MHz)...................4.5 to 5.5 V In frequency/2 mode (f(X IN) ≤ 8 MHz).....................4.0 to 5.5 V In frequency/4 mode (f(X IN) ≤ 10 MHz)...................2.5 to 5.5 V In frequency/4 mode (f(X IN) ≤ 8 MHz).....................2.0 to 5.5 V In frequency/4 mode (f(X IN) ≤ 5 MHz).....................1.8 to 5.5 V In frequency/8 mode (f(X IN) ≤ 10 MHz)...................2.5 to 5.5 V In frequency/8 mode (f(X IN) ≤ 8 MHz).....................2.0 to 5.5 V In frequency/8 mode (f(X IN) ≤ 5 MHz).....................1.8 to 5.5 V In low-speed mode....................................................1.8 to 5.5 V ●Power dissipationIn frequency/2 mode...............................................18 mW (std.) (at f(X IN) = 8 MHz, Vcc = 5 V, Ta = 25 °C)In low-speed mode at X CIN................................................18 µW (std.) (at f(X IN) stopped, f(X CIN) = 32 kHz, Vcc = 2.5 V, Ta = 25 °C)In low-speed mode at on-chip oscillator..................35 µW (std.) (at f(X IN) stopped, f(X CIN) = stopped, Vcc = 2.5 V, Ta = 25 °C)●Operating temperature range..................................– 20 to 85 °C APPLICATIONSCamera, audio equipment, household appliances, consumer elec-tronics, etc.3823 GroupSINGLE-CHIP 8-BIT CMOS MICROCOMPUTER REJ03B0146-0202Rev.2.02Jun.19.2007Table 1 Performance overviewParameter710.4 µs (Minimum instruction, f(X IN ) 10 MHz, High-speed mode)10 MHz (Maximum)16 K to 60 K bytes 640 to 2560 bytes 4-bit ✕ 1, 1-bit ✕ 1(4 pins sharing SEG)8-bit ✕ 5, 7-bit ✕ 1, 2 bit ✕ 1(16 pins sharing SEG)17 sources, 16 vectors (includes key input interrupt)8-bit ✕ 3, 16-bit ✕ 28-bit ✕ 1 (UART or Clock-synchronized)10-bit ✕ 8 channels or 8 bit ✕ 8 channels 8-bit ✕ 132 bytes ✕ 2 blocks 1/2, 1/32, 3, 4432Built-in feedback resistor(connect to external ceramic rasonator or quartz-crystal oscillator)Built-in feedback resistor(connect to external quartz-crystal oscillator or on-chip oscillator)4.5 to 5.5V 4.0 to 5.5V 2.5 to 5.5V 2.0 to 5.5V 1.8 to 5.5V 2.5 to 5.5V 2.0 to 5.5V 1.8 to 5.5V 1.8 to 5.5VStd. 18 mW (Vcc = 5V, f(X IN ) = 8MHz, Ta = 25 °C)Std. 18 µW (Vcc = 2.5V, f(X IN ) = stopped, f(X CIN ) = 32kHz, Ta = 25 °C)Std. 35 µW (Vcc = 2.5V, f(X IN ) = stopped, f(X CIN ) = stopped, Ta = 25 °C)V CC 10mA -20 to 85 °C CMOS sillicon gate80-pin plastic molded LQFP/QFPNumber of basic instructions Instruction execution time Oscillation frequency Memory sizes ROM RAM Input port P34-P37, P40I/O port P0-P2, P41-P47, P5, P6, P70, P71Interrupt TimerSerial interface A/D converter Watchdog timer ROM correction function LCD drive control Bias circuitDutyCommon output Segment outputMain clock generating circuits Sub-clock generating circuits Power source voltageIn frequency/2 mode (f(X IN ) ≤ 10MHz)In frequency/2 mode (f(X IN ) ≤ 8MHz)In frequency/4 mode (f(X IN ) ≤ 10MHz)In frequency/4 mode (f(X IN ) ≤ 8MHz)In frequency/4 mode (f(X IN ) ≤ 5MHz)In frequency/8 mode (f(X IN ) ≤ 10MHz)In frequency/8 mode (f(X IN ) ≤ 8MHz)In frequency/8 mode (f(X IN ) ≤ 5MHz)In low-speed modePower dissipationIn frequency/2 mode In low-speed mode at X CINIn low-speed mode at on-chip oscillatorInput/Output Input/Output withstand voltage characteristicsOutput current Operating temperature range Device structure PackageFunctionPIN DESCRIPTIONTable 2 Pin description (1)V CC , V SS FunctionPin Name Function except a port function•LCD segment output pinsPower source •Apply voltage of power source to V CC , and 0 V to V SS . (For the limits of V CC , refer to “Recom-mended operating conditions”).V REF AV SS RESET X IN X OUTV L1–V L3COM 0–COM 3SEG 0–SEG 11P00/SEG 16–P07/SEG 23P10/SEG 24–P17/SEG 31P20/KW 0 –P27/KW 7P34/SEG 12 –P37/SEG 15Analog refer-ence voltage Analog power source Reset input Clock input Clock outputLCD power sourceCommon outputSegment output I/O port P0I/O port P1I/O port P2•Reference voltage input pin for A/D converter.•GND input pin for A/D converter.•Connect to V SS .•Reset input pin for active “L”.•Input and output pins for the main clock generating circuit.•Feedback resistor is built in between X IN pin and X OUT pin.•Connect a ceramic resonator or a quartz-crystal oscillator between the X IN and X OUT pins to set the oscillation frequency.•If an external clock is used, connect the clock source to the X IN pin and leave the X OUT pin open.•This clock is used as the oscillating source of system clock.•Input 0 ≤ V L1 ≤ V L2 ≤ V L3 voltage.•Input 0 – V L3 voltage to LCD.•LCD common output pins.•COM 2 and COM 3 are not used at 1/2 duty ratio.•COM 3 is not used at 1/3 duty ratio.•LCD segment output pins.•8-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each port to be individually programmed as either input or output.•Pull-down control is enabled.•8-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•4-bit input port.•CMOS compatible input level.•Pull-down control is enabled.•Key input (key-on wake-up) interrupt input pins•LCD segment output pinsInput port P3Table 3 Pin description (2)FunctionPin Function except a port function P40P42/INT 0,P43/INT 1P44/R X D,P45/T X D,P46/S CLK ,P47/S RDY /S OUTP50/INT 2,P51/INT 3P52/RTP 0,P53/RTP 1P54/CNTR 0,P55/CNTR 1P56/T OUT P57/ADT P60/AN 0–P67/AN 7P70/X COUT,P71/X CIN•1-bit Input port.•CMOS compatible input level.•7-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•8-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•8-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•2-bit I/O port.•CMOS compatible input level.•CMOS 3-state output structure.•I/O direction register allows each pin to be individually programmed as either input or output.•Pull-up control is enabled.•φ clock output pin •Interrupt input pins•Interrupt input pins •Real time port function pins •Timer X, Y function pins •Timer 2 output pins •A/D conversion input pins •Sub-clock generating circuit I/O pins.(Connect a resonator. External clock cannot be used.)P41/φ•Serial interface function pins•A/D trigger input pinsName I/O port P4I/O port P5I/O port P6I/O port P7Input port P4•QzROM program power pinPART NUMBERINGFig. 4 Part numbering Package codeFP :PRQP0080GB-A packageHP :PLQP0080KB-A packageROM numberOmitted in the shipped in blank version.ROM/PROM size1 :4096 bytes2 :8192 bytes3 :12288 bytes4 :16384 bytes5 :20480 bytes6 :24576 bytes7 :28672 bytes8 :32768 bytesThe first 128 bites and the last 2 bytes of ROM are reserved areas ; they cannot be used.Memory typeG :QzROM versionRAM size0 :192 bytes1 :256 bytes2 :384 bytes3 :512 bytes4 :640 bytes5 :768 bytes6 :896 bytes7 :1024 bytes8 :1536 bytes9 :2048 bytesA :2560 bytesProduct M38234G6-XXX FP9 :36864 bytesA :40960 bytesB :45056 bytesC :49152 bytesD :53248 bytesE :57344 bytesF :61440 bytesCurrently products are listed below.RemarksPackage Part No.RAM size (bytes)61440(61310)49152(49022)32768(32638)24576(24446)16384(16254)ROM size (bytes) ROM size for User in ( )Table 4 List of productsM3823AGF-XXXFP M3823AGF-XXXHP M3823AGFFP M3823AGFHPM38239GC-XXXFP M38239GC-XXXHP M38239GCFP M38239GCHPM38238G8-XXXFP M38238G8-XXXHP M38238G8FP M38238G8HPM38235G6-XXXFP M38235G6-XXXHP M38235G6FP M38235G6HPM38234G4-XXXFP M38234G4-XXXHP M38234G4FP M38234G4HP2560(Note 1)2048(Note 2)1536(Note 2)768(Note 2)640(Note 2)PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-A PRQP0080GB-A PLQP0080KB-ABlank BlankBlank BlankBlank BlankBlank BlankBlank BlankNote 1: RAM size includes RAM for LCD display and ROM corrections.Note 2: RAM size includes RAM for LCD display.FUNCTIONAL DESCRIPTIONCENTRAL PROCESSING UNIT (CPU)The 3823 group uses the standard 740 family instruction set. Re-fer to the table of 740 family addressing modes and machine instructions or the 740 Family Software Manual for details on the instruction set.Machine-resident 740 family instructions are as follows:The FST and SLW instruction cannot be used.The STP , WIT, MUL, and DIV instruction can be used.The central processing unit (CPU) has six registers. Figure 6shows the 740 Family CPU register structure.[Accumulator (A)]The accumulator is an 8-bit register. Data operations such as data transfer, etc., are executed mainly through the accumulator.[Index Register X (X)]The index register X is an 8-bit register. In the index addressing modes, the value of the OPERAND is added to the contents of register X and specifies the real address.[Index Register Y (Y)]The index register Y is an 8-bit register. In partial instruction, the value of the OPERAND is added to the contents of register Y and specifies the real address.[Stack Pointer (S)]The stack pointer is an 8-bit register used during subroutine calls and interrupts. This register indicates start address of stored area (stack) for storing registers during subroutine calls and interrupts.The low-order 8 bits of the stack address are determined by the contents of the stack pointer. The high-order 8 bits of the stack ad-dress are determined by the stack page selection bit. If the stack page selection bit is “0” , the high-order 8 bits becomes “0016”. If the stack page selection bit is “1”, the high-order 8 bits becomes “0116”.The operations of pushing register contents onto the stack and popping them from the stack are shown in Figure 7.Store registers other than those described in Table 4 with program when the user needs them during interrupts or subroutine calls.[Program Counter (PC)]The program counter is a 16-bit counter consisting of two 8-bit registers PC H and PC L . It is used to indicate the address of the next instruction to be executed.Fig. 6 740 Family CPU register structureAAccumulator b7b7b7b7b0b7b15b0b7b0b0b0b0XIndex register X YIndex register Y SStack pointer PC LProgram counter PC HN V T B D I Z CProcessor status register (PS)Carry flag Zero flagInterrupt disable flag Decimal mode flag Break flagIndex X mode flag Overflow flag Negative flag[Processor status register (PS)]The processor status register is an 8-bit register consisting of 5 flags which indicate the status of the processor after an arithmetic operation and 3 flags which decide MCU operation. Branch opera-tions can be performed by testing the Carry (C) flag , Zero (Z) flag, Overflow (V) flag, or the Negative (N) flag. In decimal mode, the Z, V, N flags are not valid.•Bit 0: Carry flag (C)The C flag contains a carry or borrow generated by the arithmetic logic unit (ALU) immediately after an arithmetic operation. It can also be changed by a shift or rotate instruction.•Bit 1: Zero flag (Z)The Z flag is set if the result of an immediate arithmetic operation or a data transfer is “0”, and cleared if the result is anything other than “0”.•Bit 2: Interrupt disable flag (I)The I flag disables all interrupts except for the interrupt generated by the BRK instruction.Interrupts are disabled when the I flag is “1”.•Bit 3: Decimal mode flag (D)The D flag determines whether additions and subtractions are executed in binary or decimal. Binary arithmetic is executed when this flag is “0”; decimal arithmetic is executed when it is “1”.Decimal correction is automatic in decimal mode. Only the ADC and SBC instructions can be used for decimal arithmetic.•Bit 4: Break flag (B)The B flag is used to indicate that the current interrupt was generated by the BRK instruction. The BRK flag in the processor status register is always “0”. When the BRK instruction is used to generate an interrupt, the processor status register is pushed onto the stack with the break flag set to “1”.•Bit 5: Index X mode flag (T)When the T flag is “0”, arithmetic operations are performed between accumulator and memory. When the T flag is “1”, direct arithmetic operations and direct data transfers are enabled between memory locations.•Bit 6: Overflow flag (V)The V flag is used during the addition or subtraction of one byte of signed data. It is set if the result exceeds +127 to -128. When the BIT instruction is executed, bit 6 of the memory location operated on by the BIT instruction is stored in the overflow flag.•Bit 7: Negative flag (N)The N flag is set if the result of an arithmetic operation or data transfer is negative. When the BIT instruction is executed, bit 7 of the memory location operated on by the BIT instruction is stored in the negative flag.Table 6 Set and clear instructions of each bit of processor status registerSet instruction Clear instruction C flagSECCLCZ flag––I flagSEICLID flagSEDCLDB flag––T flagSETCLTV flag–CLVN flag––Real time port function output A/D conversion inputA/D trigger inputDiagram No.Related SFRs Input/Output Name Pin Non-Port Function I/O Format Table 7 List of I/O port functionP00/SEG 16–P07/SEG 23P10/SEG 24–P17/SEG 31P20/KW 0–P27/KW 7P34/SEG 12–P37/SEG 15P40P41/φP42/INT 0,P43/INT 1P44/R X D P45/T X D P46/S CLK P47/S RDY /S OUTP50/INT 2,P51/INT 3P52/RTP 0,P53/RTP 1P54/CNTR 0Port P0Port P1Port P2Port P3Port P4Input/output,individual portsInput/output,individual bits InputInputInput/output,individual bitsCMOS compatible input levelCMOS 3-state outputCMOS compatible input levelCMOS 3-state output CMOS compatible input level CMOS compatible input levelCMOS compatible input levelCMOS 3-state outputCMOS compatible input levelCMOS 3-state outputCMOS compatible input levelCMOS 3-state output CMOS compatible input levelCMOS 3-state output LCD segment outputKey input (key-on wake-up) interrupt inputLCD segment outputφ clock outputX CIN frequency signal outputExternal interrupt inputSerial I/O function input/outputExternal interrupt input Timer X function I/O Timer Y function input Timer 2 function output PULL register A Segment output enable registerPULL register AInterrupt control register 2PULL register ASegment output enable registerPULL register Bφ output control register Peripheral function extension register PULL register BInterrupt edge selection registerPULL register BSerial I/O control register Serial I/O status register UART control register Peripheral function extension register PULL register BInterrupt edge selection registerPULL register BTimer X mode register PULL register BTimer X mode register PULL register BTimer Y mode register PULL register BTimer 123 mode register PULL register B A/D control registerPULL register A CPU mode register (1)(2)(3)(4)(6)(5)(2)(8)(7)Port P5(9)(2)Input/output,individual bits(10)P55/CNTR 1(11)(12)(13)(12)(14)P56/T OUT P57/ADT P60/AN 0–P67/AN 7(15)P70/X COUT P71/X CIN COM 0–COM 3SEG 0–SEG 11(16)(17)(18)Input/output,individual bits Input/output,individual bits Output OutputSub-clockgenerating circuit I/O LCD common output LCD segment outputPort P6Port P7Common SegmentLCD mode registerNotes 1: For details of how to use double function ports as function I/O ports, refer to the applicable sections.2: When an input level is at an intermediate potential, a current will flow from V CC to V SS through the input-stage gate.Especially, power source current may increase during execution of the STP and WIT instructions.Fix the unused input pins to “H” or “L” through a resistor.QzROM program power pinTermination of unused pins• Termination of common pinsI/O ports:Select an input port or an output port and follow each processing method.Output ports: Open.Input ports:If the input level become unstable, through current flow to an input circuit, and the power supply currentmay increase.Especially, when expecting low consumption current(at STP or WIT instruction execution etc.), pull-up orpull-down input ports to prevent through current(built-in resistor can be used). Pull-down the P40/(V PP) pin.We recommend processing unused pins through aresistor which can secure I OH(avg) or I OL(avg).Because, when an I/O port or a pin which have anoutput function is selected as an input port, it mayoperate as an output port by incorrect operation etc.Table 8 Termination of unused pinsPinP00/SEG16–P17/SEG23 P10/SEG24–P17/SEG31 P20/KW0–P27/KW7P34/SEG12–P37/SEG15 P40/(V PP)P41/φP42/INT0P43/INT1P44/RxDP45/TxDP46/S CLKP47/S RDY/S OUTP50/INT2P51/INT3P52/RTP0P53/RTP1P54/CNTR0P55/CNTR1P56/T OUTP57/ADTP60/AN0–P67/AN7P70/X COUTP71/X CINV L3 (Note)V L2 (Note)V L1 (Note)COM0–COM3SEG0–SEG11AV SSV REFX OUTTermination 2When selecting SEG output, open.When selecting KW function, performtermination of input port.When selecting SEG output, open.–When selecting φ output, open.When selecting INT0 function,perform termination of input port.When selecting INT1 function,perform termination of input port.When selecting R X D function,perform termination of input port.When selecting T X D function,perform termination of output port.When selecting external clock input,perform termination of input port.When selecting S RDY function,perform termination of output port.When selecting INT2 function,perform termination of input port.When selecting INT3 function,perform termination of input port.When selecting RTP0 function,perform termination of output port.When selecting RTP1 function,perform termination of output port.When selecting CNTR0 input function,perform termination of input port.When selecting CNTR1 function,perform termination of input port.When selecting T OUT function,perform termination of output port.When selecting ADT function,perform termination of input port.When selecting AN function, thesepins can be opened. (A/D conversionresult cannot be guaranteed.)Do not select X CIN-X COUT oscillationfunction by program.––––––––Termination 3–––––––––When selecting internal clock output,perform termination of output port.When selecting S OUT function,perform termination of output port.––––When selecting CNTR0 output function,perform termination of output port.–––––––––––––Termination 1 (recommend)I/O portInput portInput port (pull-down)I/O portConnect to V SSConnect to V SSConnect to V SSOpenOpenConnect to V SSConnect to V CC or V SSWhen an external clock isinput to the X IN pin, leavethe X OUT pin open.Note :The termination of V L3, V L2 and V L1 is applied when the bit 3 of the LCD mode register is “0”INTERRUPTSThe 3823 group interrupts are vector interrupts with a fixed prior-ity scheme, and generated by 16 sources among 17 sources: 8external, 8 internal, and 1 software.The interrupt sources, vector addresses (1) , and interrupt priority are shown in Table 9.Each interrupt except the BRK instruction interrupt has the inter-rupt request bit and the interrupt enable bit. These bits and the interrupt disable flag (I flag) control the acceptance of interrupt re-quests. Figure 16 shows an interrupt control diagram.Notes1: Vector addresses contain interrupt jump destination addresses.2: Reset function in the same way as an interrupt with the highest priority.Table 9 Interrupt vector addresses and priorityRemarksInterrupt Request Generating Conditions At resetAt detection of either rising or falling edge of INT 0 input At detection of either rising or falling edge of INT 1 input At completion of serial interface data receptionAt completion of serial interface transmit shift or when transmis-sion buffer is empty Interrupt Source LowHigh PriorityVector Addresses (Note 1)Reset (Note 2)INT 0INT 1Serial I/O reception Serial I/O transmission Timer X Timer Y Timer 2Timer 3CNTR 0CNTR 1Timer 1INT 2INT 3Key input(Key-on wake-up)ADTA/D conversion BRK instruction1234567891011121314151617FFFD 16FFFB 16FFF916FFF716FFF516FFF316FFF116FFEF 16FFED 16FFEB 16FFE916FFE716FFE516FFE316FFE116FFDF 16FFDD 16FFFC 16FFFA 16FFF816FFF616FFF416FFF216FFF016FFEE 16FFEC 16FFEA 16FFE816FFE616FFE416FFE216FFE016FFDE 16FFDC 16At timer X underflow At timer Y underflow At timer 2 underflowAt timer 3 underflowAt detection of either rising or falling edge of CNTR 0 input At detection of either rising or falling edge of CNTR 1 input At timer 1 underflowAt detection of either rising or falling edge of INT 2 input At detection of either rising or falling edge of INT 3 input At falling of conjunction of input level for port P2 (at input mode)At falling of ADT inputAt completion of A/D conversion At BRK instruction executionNon-maskableExternal interrupt(active edge selectable)External interrupt(active edge selectable)Valid when serial interface is se-lectedValid when serial interface is se-lectedExternal interrupt(active edge selectable)External interrupt(active edge selectable)External interrupt(active edge selectable)External interrupt(active edge selectable)External interrupt (Valid at falling)Valid when ADT interrupt is se-lected, External interrupt (Valid at falling)Valid when A/D interrupt is se-lectedNon-maskable software interruptAn interrupt requests is accepted when all of the following conditions are satisfied:• Interrupt disable flag.................................“0”• Interrupt disable request bit .....................“1”• Interrupt enable bit.. (1)Though the interrupt priority is determined by hardware, priority processing can be performed by software using the above bits and flag.[Transmit Buffer/Receive Buffer Register (TB/RB)] 001816The transmit buffer register and the receive buffer register are lo-cated at the same address. The transmit buffer register is write-only and the receive buffer register is read-only. If a charac-ter bit length is 7 bits, the MSB of data stored in the receive buffer register is “0”.[Serial I/O Status Register (SIOSTS)] 001916 The read-only serial I/O status register consists of seven flags (bits 0 to 6) which indicate the operating status of the serial I/O function and various errors.Three of the flags (bits 4 to 6) are valid only in UART mode.The receive buffer full flag (bit 1) is cleared to “0” when the receive buffer is read.If there is an error, it is detected at the same time that data is transferred from the receive shift register to the receive buffer reg-ister, and the receive buffer full flag is set. A write to the serial I/O status register clears all the error flags OE, PE, FE, and SE. Writ-ing “0” to the serial I/O enable bit (SIOE) also clears all the status flags, including the error flags.All bits of the serial I/O status register are initialized to “0” at reset, but if the transmit enable bit (bit 4) of the serial I/O control register has been set to “1”, the transmit shift register shift completion flag (bit 2) and the transmit buffer empty flag (bit 0) become “1”. [Serial I/O Control Register (SIOCON)] 001A16 The serial I/O control register contains eight control bits for the se-rial I/O function.[UART Control Register (UARTCON) ]001B16 The UART control register consists of four control bits (bits 0 to 3) which are valid when asynchronous serial I/O is selected and set the data format of an data transfer. One bit in this register (bit 4) is always valid and sets the output structure of the P45/T X D pin. [Baud Rate Generator (BRG)] 001C16The baud rate generator determines the baud rate for serial trans-fer.The baud rate generator divides the frequency of the count source by 1/(n + 1), where n is the value written to the baud rate genera-tor.■Notes on serial I/OWhen setting the transmit enable bit to “1”, the serial I/O transmit interrupt request bit is automatically set to “1”. When not requiring the interrupt occurrence synchronized with the transmission enalbed, take the following sequence.➀Set the serial I/O transmit interrupt enable bit to “0” (disabled).➁Set the transmit enable bit to “1”.➂Set the serial I/O transmit interrupt request bit to “0” after 1 or more instructions have been executed.➃Set the serial I/O transmit interrupt enable bit to “1” (enabled).。
MRF7S18125BHR3;MRF7S18125BHR5;MRF7S18125BHSR3;MRF7S18125BHSR5;中文规格书,Datasheet资料
RF Power Field Effect TransistorsN-Channel Enhancement-Mode Lateral MOSFETsDesigned for GSM and GSM EDGE base station applications with frequencies from 1800 to 2000 MHz. Can be used in Class AB and Class C for all typical cellular base station modulations.GSM Application•Typical GSM Performance: V DD = 28 Volts, I DQ = 1100 mA, P out =125Watts CW, f = 1930 MHz.Power Gain — 16.5 dB Drain Efficiency — 55%GSM EDGE Application•Typical GSM EDGE Performance: V DD = 28 Volts, I DQ = 1100 mA,P out = 57 Watts Avg., Full Frequency Band (1930-1990 MHz).Power Gain — 17 dB Drain Efficiency — 39%Spectral Regrowth @ 400 kHz Offset = -60 dBc Spectral Regrowth @ 600 kHz Offset = -74 dBc EVM — 2.6% rms•Capable of Handling 5:1 VSWR, @ 28 Vdc, 1960 MHz, 125 Watts CW Output Power•Typical P out @ 1 dB Compression Point ] 140 Watts CW Features•Characterized with Series Equivalent Large-Signal Impedance Parameters •Internally Matched for Ease of Use •Integrated ESD Protection •RoHS Compliant•In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel .Table 1. Maximum RatingsRatingSymbol Value Unit Drain-Source Voltage V DSS -0.5, +65Vdc Gate-Source Voltage V GS -6.0, +10Vdc Operating VoltageV DD 32, +0Vdc Storage Temperature Range T stg -65 to +150°C Case Operating Temperature T C 150°C Operating Junction Temperature (1,2)T J225°CTable 2. Thermal CharacteristicsCharacteristicSymbol Value (2,3)Unit Thermal Resistance, Junction to Case Case Temperature 81°C, 125 W CW Case Temperature 81°C, 71 W CWR θJC0.310.35°C/W1.Continuous use at maximum temperature will affect MTTF.2.MTTF calculator available at /rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product.3.Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to /rf. Select Documentation/Application Notes - AN1955.Document Number: MRF7S18125BHRev. 0, 11/2008Freescale Semiconductor Technical DataMRF7S18125BHR3 MRF7S18125BHSR3Table 3. ESD Protection CharacteristicsTest MethodologyClass Human Body Model (per JESD22-A114)1B (Minimum)Machine Model (per EIA/JESD22-A115) A (Minimum)Charge Device Model (per JESD22-C101)IV (Minimum)Table 4. Electrical Characteristics (T C = 25°C unless otherwise noted)CharacteristicSymbolMinTypMaxUnitOff CharacteristicsZero Gate Voltage Drain Leakage Current (V DS = 65 Vdc, V GS = 0 Vdc)I DSS ——10μAdc Zero Gate Voltage Drain Leakage Current (V DS = 28 Vdc, V GS = 0 Vdc)I DSS ——1μAdc Gate-Source Leakage Current (V GS = 5 Vdc, V DS = 0 Vdc)I GSS——1μAdcOn CharacteristicsGate Threshold Voltage(V DS = 10 Vdc, I D = 316 μAdc)V GS(th) 1.2 1.9 2.7Vdc Gate Quiescent Voltage(V DS = 28 Vdc, I D = 1100 mAdc)V GS(Q)— 2.7—Vdc Fixture Gate Quiescent Voltage (1)(V DD = 28 Vdc, I D = 1100 mAdc, Measured in Functional Test)V GG(Q)4 5.37Vdc Drain-Source On-Voltage(V GS = 10 Vdc, I D = 3.16 Adc)V DS(on)0.10.20.3VdcDynamic Characteristics (1)Reverse Transfer Capacitance(V DS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, V GS = 0 Vdc)C rss — 1.15—pF Output Capacitance(V DS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, V GS = 0 Vdc)C oss —673—pF Input Capacitance(V DS = 28 Vdc, V GS = 0 Vdc ± 30 mV(rms)ac @ 1 MHz)C iss—309—pFFunctional Tests (In Freescale Test Fixture, 50 ohm system) V DD = 28 Vdc, I DQ = 1100 mA, P out = 125 W CW, f = 1930 MHzPower Gain G ps 1516.518dB Drain Efficiency ηD 5155—%Input Return LossIRL—-12-7dB1.V GG = 2 x V GS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit schematic.2.Part internally matched both on input and output.(continued)MRF7S18125BHR3 MRF7S18125BHSR3Table 4. Electrical Characteristics (T C = 25°C unless otherwise noted) (continued)CharacteristicSymbol Min Typ Max Unit Typical Performances (In Freescale Test Fixture, 50 ohm system) V DD = 28 Vdc, I DQ = 1100 mA, 1930-1990 MHz BandwidthP out @ 1 dB Compression PointP1dB —140—W IMD Symmetry @ 125 W PEP , P out where IMD Third Order Intermodulation ` 30 dBc(Delta IMD Third Order Intermodulation between Upper and Lower Sidebands > 2 dB)IMD sym—10—MHzVBW Resonance Point(IMD Third Order Intermodulation Inflection Point)VBW res —35—MHz Gain Flatness in 60 MHz Bandwidth @ P out = 125 W CW G F — 1.02—dB Average Deviation from Linear Phase in 60 MHz Bandwidth @ P out = 125 W CWΦ— 3.3—°Average Group Delay @ P out = 125 W CW, f = 1960 MHz Delay — 2.49—ns Part-to-Part Insertion Phase Variation @ P out = 125 W CW, f = 1960 MHz, Six Sigma Window ΔΦ— 6.7—°Gain Variation over Temperature (-30°C to +85°C)ΔG —0.016—dB/°C Output Power Variation over Temperature (-30°C to +85°C)ΔP1dB—0.01—dBm/°CTypical GSM EDGE Performances (In Freescale GSM EDGE Test Fixture, 50 ohm system) V DD = 28 Vdc, I DQ = 1100 mA, P out = 57 W Avg., 1930-1990 MHz EDGE Modulation Power Gain G ps —17—dB Drain Efficiency ηD —39—%Error Vector MagnitudeEVM — 2.6—% rms Spectral Regrowth at 400 kHz Offset SR1—-60—dBc Spectral Regrowth at 600 kHz OffsetSR2—-74—dBcMRF7S18125BHR3 MRF7S18125BHSR3Figure 1. MRF7S18125BHR3(HSR3) Test Circuit SchematicZ80.200″ x 0.083″ Microstrip Z9 1.045″ x 0.083″ Microstrip Z100.071″ x 0.083″ Microstrip Z110.227″ x 0.083″ Microstrip Z121.280″ x 0.080″ Microstrip Z13, Z140.760″ x 0.080″ MicrostripPCBTaconic TLX-8 RF35, 0.031″, εr = 2.55Z10.227″ x 0.083″ Microstrip Z20.697″ x 0.083″ Microstrip Z30.618″ x 0.083″ Microstrip Z40.568″ x 1.000″ Microstrip Z50.092″ x 1.000″ Microstrip Z60.095″ x 1.000″ Microstrip Z70.565″ x 1.000″ MicrostripTable 5. MRF7S18125BHR3(HSR3) Test Circuit Component Designations and ValuesPartDescriptionPart NumberManufacturer C11 μF, 50 V Chip Capacitor 12065G105AT2A AVX C2, C3, C4, C5 4.7 μF, 50 V Chip CapacitorsGRM55ER71H475KA01L Murata C6220 μF, 63 V Electrolytic Chip Capacitor 2222 136 68221Vishay C7, C8, C9, C10, C11 6.8 pF Chip Capacitors ATC100B6R8BT500XT ATC C12, C131 pF Chip Capacitors ATC100B1R0BT500XT ATC C14, C15, C16, C17, C180.2 pF Chip Capacitors ATC100B0R2BT500XT ATC R1, R210 k Ω, 1/4 W Chip Resistors CRCW12061001FKEA Vishay R310 Ω, 1/4 W Chip ResistorCRCW120610R1FKEAVishayFigure 2. MRF7S18125BHR3(HSR3) Test Circuit Component LayoutMRF7S18125BHR3 MRF7S18125BHSR3MRF7S18125BHR3 MRF7S18125BHSR3TYPICAL CHARACTERISTICSP out , OUTPUT POWER (WATTS) CW100131817151410300Figure 5. Power Gain versus Output PowerG p s , P O W E R G A I N (d B )161000.110TWO−TONE SPACING (MHz)Figure 6. Intermodulation Distortion Productsversus Two-Tone Spacing1MRF7S18125BHR3 MRF7S18125BHSR3TYPICAL CHARACTERISTICS60P in , INPUT POWER (dBm)53515034373552363839Figure 7. Pulsed CW Output Power versusInput PowerP o u t , O U T P U T P O W E R (d B c )54555657404142433001815103020P out , OUTPUT POWER (WATTS) CWFigure 8. Power Gain and Drain Efficiencyversus Output PowerG p s , P O W E R G A I N (d B )17.51710040585916.51615.51514.51413.51325354550556065E V M , E R R O R V E C T O R M A G N I T U D E (% r m s )063142)P out , OUTPUT POWER (WATTS)20Figure 11. Spectral Regrowth at 400 kHzversus Output Power S P E C T R A L R E G R O W T H @ 400 k H z (d B c )4020060801001201401601803350P out , OUTPUT POWER (WATTS)20Figure 12. Spectral Regrowth at 600 kHzversus Output Power402006080100120140160180ηD , D R A I N E F F I C I E N C Y (%)MRF7S18125BHR3 MRF7S18125BHSR3TYPICAL CHARACTERISTICSP out , OUTPUT POWER (WATTS) AVG.500122420160101820604030010Figure 13. EVM and Drain Efficiency versusOutput PowerE V M , E R R O R V E C T O R M A G N I T U D E (% r m s )141918171615f, FREQUENCY (MHz)Figure 14. Power Gain versus FrequencyG p s , P O W E R G A I N (d B )41005025010990T J , JUNCTION TEMPERATURE (°C)Figure 15. MTTF versus Junction TemperatureThis above graph displays calculated MTTF in hours when the device is operated at V DD = 28 Vdc, P out = 125 W CW, and ηD = 55%.MTTF calculator available at /rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product.107106105110130150170190M T T F (H O U R S )2102301081930194019501960197019801990ηD , D R A I N E F F I C I E N C Y (%)MRF7S18125BHR3 MRF7S18125BHSR3GSM TEST SIGNALFigure 16. EDGE Spectrum−10−20−30−40−50−60−70−80−90−100200 kHzSpan 2 MHzCenter 1.96 GHz−110(d B )MRF7S18125BHR3 MRF7S18125BHSR3Z o = 5ΩZ loadZ sourcef = 2040MHzf = 1880MHzf = 1880MHzf = 2040MHzV DD = 28 Vdc, I DQ = 1100 mA, P out = 125 W CWfMHzZ sourceWZ loadW1880 1.31 - j3.61 1.32 - j3.061900 1.25 - j3.061.30 - j2.921920 1.21 - j3.30 1.28 - j2.791940 1.17 - j3.17 1.26 - j2.671960 1.13 - j3.06 1.23 - j2.551980 1.10 - j2.92 1.20 - j2.422000 1.06 - j2.83 1.18 - j2.3020200.99 - j2.75 1.16 - j2.1820400.91 - j2.66 1.12 - j2.07Z source=Test circuit impedance as measured fromgate to ground.Z load=Test circuit impedance as measuredfrom drain to ground.Figure 17. Series Equivalent Source and Load ImpedanceZ source Z loadOutputMatchingNetwork分销商库存信息:FREESCALEMRF7S18125BHR3MRF7S18125BHR5MRF7S18125BHSR3 MRF7S18125BHSR5。
A3P125中文资料
QN1325 VQ100
PQ208 FG144, FG2565
400 k 9,216
54 12 1k Yes 1 18 4 194
600 k 13,824
108 24 1k Yes 1 18 4 235
1M 24,576
144 32 1k Yes 1 18 4 300
ProASIC3 Devices
ARM-Enabled ProASIC3 Devices
A3P030 A3P060 A3P125
A3P250 3
A3P400 3
M7A3P250 3, 4 M7A3P400 3 I/O Type
A3P600 M7A3P600
A3P1000 M7A3P1000
Single-Ended I/O Single-Ended I/O Single-Ended I/O Single-Ended I/O2 Differential I/O Pairs Single-Ended I/O2 Differential I/O Pairs Single-Ended I/O2 Differential I/O Pairs Single-Ended I/O2 Differential I/O Pairs
PQ208
PQ208
PQ208
FG144, FG256, FG144, FG256, FG144, FG256,
FG484
FG484
FG484
Notes:
1. Refer to the CoreMP7 datasheet for more information. 2. AES is not available for ARM-enabled ProASIC3 devices. 3. Six chip (main) and three quadrant global networks are available for A3P060 and above. 4. For higher densities and support of additional features, refer to the ProASIC3E Flash FPGAs datasheet. 5. The M7A3P250 device does not support this package.
Inter-M 产品中文手册
PA-2000/4000 合并式定压功放
特性
3路 输 入 MIC1 MIC2/AVX & MIC3/AVX 电 话 输 入 600欧 姆 有 优 先 输 入 时 静 音 ---MIC1的 输 入 自 动 优 先 于 MIC2和 MIC3 电话输入比所有输入优先 最 长 录 音 时 间 为 8分 钟 4通 道 2路 立 体 声 输 出
四川省 成都兴业证券股份有限公司 九沟新九宾馆 九沟黄龙山庄
公共广播及消防报警系统 我们做过什么
重庆市 重庆铜梁明月广场 重庆火车站 重庆大学 重庆北马广场 重庆大足南门广场 重庆中信银行 重庆武隆世纪广场 重庆现代图书 城 重庆武隆山庄宾馆 三星级
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湖北省 武汉市百汇商场背景音乐联动报警系 统 武汉市黄陂木兰湖环岛露天广播系统
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江西省 江西九江发电厂
公共广播及消防报警系统
播出信号的优先次序为
一 紧急报警 二 定时信号 三 Βιβλιοθήκη 控1 四 遥 控2 五 背景音乐
音源
三 碟 转 换CD 机 录音双卡座 数码调谐器 音调发生器
周边设备
单 通 道 31段 均 衡 双 通 道 31段 均 衡 单 通 道 15段 均 衡 5段 参 量 均 衡 单通道压限器 单通道数字延时器
餐厅
超市
酒吧
www
网吧
咖啡厅
时装店
24
便利店
5
技术参数
输 出 功 率 (RMS): 30W 频 率 响 应 : 60Hz~20kHz 总 失 真 率 : 小 于 0.5%(at 1kHz) 电 源 : AC100V~240V, 50/60Hz 功 耗 : 80W 重 量 : PA-1000B: 4.6kg
GM8125产品简介
GM8125产品简介
GM8125可为用户提供最简单和高性能的串口扩展方案，该芯片子串口最高波特率支持20Mbps。
该芯片提供两种工作模式，用户可根据需要灵活选择。
该芯片母串口和子串口的工作波特率可由软件调节，而不需要修改外部电路和晶振频率。
GM8125芯片的外部控制少，应用灵活，编程使用简单，适合于大多数需要多串口扩展的应用场合。
★特性
·扩展5个子串口
·采用写控制字的方式对芯片进行控制
·各子串口波特率可调（统一调节）
·数据格式10位或11位可选
·两种工作模式，用户可根据自己的系统需求灵活选择.单通道模式下最高波特率支持20Mbps；多通道模式下最高波特率38400bps ·与标准串口通讯格式兼容
·宽工作电压
·工作温度范围：-40℃~85℃
·输出波特率误差小于0.2%，输入波特率误差要求小于2.8%。
Shure SCM800 SCM800E 八通道微电话混音器系统规格表说明书
SCM800SCM800/SCM800E Microphone MixerSpecification SheetTL1030 (Rev. 3)©2009 Shure IncorporatedSCM800/SCM800E EIGHT-CHANNEL MICROPHONE MIXERSYSTEM OVERVIEWThe Shure Model SCM800 is a full-featured, eight-channel micro-phone mixer for sound reinforcement, general audio recording, and audio-visual systems. Any low-impedance, balanced dynamic or con-denser microphone, including a wireless microphone system, can be used with the SCM800 mixer.Each SCM800 accepts up to eight microphone- or line-level inputs and one aux-level input (two input jacks feed the same channel). Up to four SCM800 mixers can be linked to provide up to 32 input chan-nels. Each input channel has a two-band equalizer, switchable micro-phone- or line-level operation, switchable 48 V phantom power, and a 1/4-inch send/receive insert jack.The SCM800 operates on 120 Vac power; the SCM800E operates 230 Vac power. Both models are supplied with rack-mounting hard-ware, link cable and removable block terminal connectors. An acces-sory rack panel adapter (Model RKC800, available separately)converts the removable block input and output connectors to XLR connectors, and the Aux connectors to phono jacks.FEATURES•Compatible with Shure SCM810 and FP410 automatic mi-crophone mixers•Adjustable EQ per channel: low-frequency rolloff and high-frequency shelving•48 V phantom power selectable for each input•Active balanced microphone- and line-level inputs and line-level output•Highly RF-resistant chassis and circuitry •LED indication of channel clipping•Linking capability for systems up to 32 microphones •Two Aux-level input jacks that feed one channel •Insert jack on each channel •Manual mixing of input channels•Front-panel headphones output with level control•Peak-responding output limiter with selectable thresholdsand LED indicatorSHURE Incorporated United States, Canada, Latin America, Caribbean:5800 W. Touhy Avenue, Niles, IL 60714-4608, U.S.A.Phone: 847-600-2000 U.S. Fax: 847-600-1212 Intl Fax: 847-600-6446Europe, Middle East, Africa:Shure Europe GmbH, Phone: 49-7131-72140 Fax: 49-7131-721414Asia, Pacific:Shure Asia Limited, Phone: 852-2893-4290 Fax: 852-2893-4055SCM800/SCM800E MICROPHONE MIXER SPECIFICATION SHEETSPECIFICATIONSMeasurement Conditions (unless otherwise specified):Line voltage 120 Vac, 60 Hz (SCM800) or 230 Vac, 50 Hz (SCM800E); full gain; 1 kHz.Source impedances: Mic 150 Ω, Line 150 Ω.Terminations: Line 10 k Ω, Phones 300 Ω (tip-sleeve and ring-sleeve), Direct Out 10 k Ω.Equalization controls adjusted for flat response, Channel 1 gain control full clockwise, other gain controls full counterclockwise Frequency Response (Ref .1 kHz, channel controls centered)50 Hz to 20 kHz ±2 dB; -3 dB corner at 25 Hz Voltage Gain (typical, controls full clockwise)InputsOutputsTotal Harmonic Distortion<0.1% at +18 dBV output level, 50 Hz to 20 kHz (through 20 Hz-20 kHz filter; Input 1 and Master at 5, all other controls full counterclockwise)Hum and NoiseEquivalent Input Noise: –125 dBV (150 Ω source; through 400 Hz—20 kHz filter)Equivalent Input Hum and Noise: (150 Ω source; through 20Hz—20 kHz filter)–123 dBV Output Hum and Noise (through 20 Hz—20 kHz filter; channel controls full counterclockwise):Master full counterclockwise: -90 dBV Master full clockwise: -62 dBVCommon Mode Rejection>70 dB at 1 kHzPolarityMic/Line, Send inputs to all outputs are non-inverting; Aux input to all outputs is inverting Overload and Shorting ProtectionShorting outputs, even for prolonged periods, causes no dam-age. Microphone inputs are not damaged by signals up to 3 V; Line and Monitor inputs by signals up to 20 V EqualizationLow-frequency: 6 dB/octave cut, adjustable corner from 25 to 320 HzHigh-frequency: ±6 dB at 5 kHz, ±8 dB at 10 kHz, shelving LimiterType: PeakThreshold: Switchable: off, +4, +8, +16 (dBm at output)Attack Time: 2 msRecovery Time: 300 msIndicator: Lights red when limiting occurs Input LEDsLight at 6 dB below clippingPhantom Power46 Vdc open-circuit through 6.8 k Ω series resistance per DIN 45 596Operating VoltageSCM800: 120 Vac rated nominal (see Voltage Selection for 230 Vac operation), 50/60 Hz, 200 mASCM800E: 230 Vac rated nominal (see Voltage Selection for 120 Vac operation), 50/60 Hz, 100 mA Temperature RangeOperating: 0︒ to 60︒ C (32︒ to 140︒ F )Storage: -30︒ to 70︒ C (-22︒ to 158︒ F)Overall Dimensions44.5 mm H x 483 mm W x 317 mm D (13/4 x 19 x 121/2 in.)Net Weight4.3 kg (9 lb 9 oz)CertificationsSCM800: UL LISTED (U.S.) and cUL Certified (Canada)SCM800E: Conforms to European Union directives; eligible to bear CE marking.REPLACEMENT PARTSKnob, Channel Gain & Phones (white)........................95A8238Knob, Master (blue).....................................................95B8238Line (Power) Cord (SCM800).....................................95B8389*Line (Power) Cord (SCM800E)...................................95C8247*Link Cable....................................................................95B8889Three -Terminal Block Connector................................95B8580Output InputLine HeadphonesDirect Out Low-impedance mic(150 Ω)80 dB 88 dB 34 dB Line 40 dB 48 dB –6 dB Aux 44 dB 52 dB -Send/Return20 dB28 dB-ImpedanceInput Designed for use with Actual (typical)InputClipping LevelMic 19-600 Ω10 k Ω–15 dBV Line ≤2 k Ω10 k Ω+22 dBV Aux ≤2 k Ω10 k Ω+22 dBV Send/Return≤2 k Ω10 k Ω+18 dBVImpedanceOutput Designed for use with Actual (typical)Output Clipping Level Line >600 Ω60 Ω+18 dBV Headphones8-200 Ω,60 Ω recommended300 Ω+12 dBVDirect Out >2 k Ω 1 k Ω+18 dBV Send/Return>2 k Ω1 k Ω+18 dBVSCM800。
1扩5异步串口扩展芯片GM8125中文资料
1概述GM8125可以将一个全双工的标准串口扩展成5个标准串口，并能通过外部引脚控制串口扩展模式：单通道工作模式和多通道工作模式，即可以指定一个子串口和母串口以相同的波特率单一的工作，也可以让所有子串口在母串口波特率基础上分频同时工作。
该芯片工作在多通道模式下时，子串口能主动响应从机发送的数据，并由母串口发送给主机，同时返回子串口地址。
该模式使每个从机的发送要求都能被及时地响应，即使所有从机同时有发送要求，数据也不会丢失，基本实现了主控单元和外设通讯的实时性。
该芯片母串口和子串口的工作波特率可由软件调节，而不需要修改外部电路和晶振频率。
该芯片的外部控制少，应用灵活，编程使用简单，适用于大多数有串口扩展需求的系统。
2特征——采用写控制字的方式对芯片进行控制——各子串口波特率可调（统一调节）——数据格式10位或11位可选——单通道模式下，最高波特率支持20Mbps；多通道模式下，子串口最高波特率38400bps ——子串口数：5个——由一个引脚选择芯片的工作方式是单通道工作模式还是多通道工作模式——在单通道工作模式下，芯片工作无需初始化设置，工作串口由地址线控制选择——在多通道工作模式下，各子串口的波特率等于母串口波特率的6分频——在多通道工作模式下，接收时地址线SRADD2~0向MCU返回接收子通道的地址，MCU 接收到母串口送来的数据后就可根据SRADD2~0状态判断数据是从哪一个子串口送来的；发送时先由MCU选择子串口再向母串口发送数据——与标准串口通讯格式兼容，TTL电平输出——宽工作电压：2.3~6.7V——输出波特率误差小于0.2%，输入波特率误差要求小于2.8%——每bit采样16次，提高数据正确性——输入地址引脚有50～80KΩPull-Down电阻，其它输入引脚有50～80KΩPull-Up电阻（OSCI除外）3封装及引脚功能说明GM8125提供多电源和单电源两种封装，并提供DIP、SDIP、SOP、SSOP等多种封装形式，用户可根据各自系统的应用环境选择不同等级的封装，引脚排布见图1所示：VDDMSSTADD0STADD1STADD2SRADD0SRADD2RSTRXD0TXD0RXD5RXD4RXD3RXD2RXD1TXD5TXD4TXD3TXD2TXD1OSCOOSCIVDDGNDMSSTADD0STADD1SRADD0SRADD1RSTRXD0TXD0RXD3RXD2TXD3TXD2OSCOOSCIGNDVDDNCVDDTXD4RXD4TXD5RXD5SRADD2STADD2图1 GM8125引脚排布图该芯片的各引脚功能描述见表1：表1 芯片引脚功能说明引脚名方向说明OSCO Out 振荡器输出；OSCI In 振荡器输入；TXD1 Out 子通道1的发送端口；RXD1 In 子通道1的接收端口；TXD2 Out 子通道2的发送端口；RXD2 In 子通道2的接收端口；TXD3 Out 子通道3的发送端口；RXD3 In 子通道3的接收端口；TXD4 Out 子通道4的发送端口；RXD4 In 子通道4的接收端口；TXD5 Out 子通道5的发送端口；GND 电源地；RXD5 In 子通道5的接收端口；TXD0 Out 母通道的发送端口；RXD0 In 母通道的接收端口；RST In 系统复位SRADD2 In/Out 接收子通道地址2；SRADD1 In/Out 接收子通道地址1； SRADD0 In/Out 接收子通道地址0； STADD2 In 发送子通道地址2； STADD1 In 发送子通道地址1； STADD0 In 发送子通道地址0；MS In 模式选择，MS ＝1，单通道工作模式；MS ＝0，多通道工作模式； 地址线为全‘0’时，MS 为命令字读写控制引脚，MS=1，读命令字，MS=0，写命令字； VDD电源电压；4 芯片功能详细描述4.1 单通道工作模式当模式控制引脚MS = 1时，芯片工作在单通道工作模式下，单通道模式在一个时刻只允许一组RXD 和TXD 与母串口进行通讯。
万事达M38控制器说明
万事达M38控制器说明一、万事达M-38系统特点1、32级—65536级灰度控制，软件Gamma校正处理。
2、支持各种点、线、面光源，支持各种规则，异形处理。
3、控制器端口可带DMX 8*512pixels；TTL 8*1024pixels。
4、使用AC220V交流电，设置对应控制器ID编号，多台级联同步，级联同步时只操作第一台控制器，后面控制器相当于分控。
使用Simple LED程序软件，全部程序导出一个集合文件，插卡之后设置好控制器的ID序号，控制器根据ID序号对应去识别文件中相应的控制器的部分。
5、控制器输出端口提供三道保护，可保证控制器输出端口在控制的灯具有短路，接反等情况下端口不被烧坏。
6、控制器自带内置效果，可测试带载灯具(RGB/RGBW灯具均支持)。
7、控制器具有DMX512写址功能及地址测试，单端口或者全部端口带载DMX512 IC写地址，并对灯具进行地址测试。
7、控制器之间的通讯采用国际标准的TCP/IP网络协议，可选传输速率支持百兆/千兆自适应，传输速度更稳定快速，每两个台控制器之间最大传输距离可达100米，超过此距离可以增加交换机或者使用光纤进行远距离传输。
8、控制器提供LCD液晶屏显示，可显示控制的型号，ID，以及工作状态。
二、支持芯片：常规芯片：芯片就是使用灯具的型号，市场上常用芯片型号如下：UCS1903、UCS1904、UCS2909、UCS2903、UCS1912、TM1803、TM1804、TM1809、TM1914（断点续传）、WS2811、WS2812、WS2818（断点续传）、SM16703、SK6812、SK6814、GS8206(断点续传)、GS8205(断点续传)、UCS5603（断点续传）、P9883（断点续传）。
每台控制器使用都需要选择芯片型号UCS512C系列，B 系列，D系列；SM16512，TM512AC注：所列为市场现常用芯片，如用芯片和以上协议相同就可以通用。
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To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
MITSUBISHI MICROCOMPUTERS
3812 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
© 2002 MITSUBISHI ELECTRIC CORP.
New publication, effective July 2002.
Specifications subject to change without notice.
REVISION HISTORY3812 GROUP USER’S MANUAL
Rev.Date Description
Page Summary
1.007/10/02The first edition is issued.
(1/X)。