COUNTING CIRCUIT

专利名称：COUNTING CIRCUIT
发明人：OGURA TAKAYUKI,NAKABASHI KENZOU 申请号：JP9209279
申请日：19790719
公开号：JPS5616327A
公开日：
19810217
专利内容由知识产权出版社提供
摘要：PURPOSE:To obtain a frequency division output of duty waveform 50% which is not 1/2X1/2 without using any external FF but by inverting the higher-rank bit of the output of the IC counter and then feeding it back to the IC counter. CONSTITUTION:Highest bit output terminal QD of IC counter 1 is connected to inverter IV10, and the output of IV10 is fed back to input terminal D. And 0 is always applied to input terminals A-C. Clock pulse CLK is applied to the clock terminal of counter 1 at time T0', and 1, 0 and 1 are delivered to output terminals A-C of counter 1 each at time T1' when six units of pulse CLK are applied to be supplied to NAND circuit 3. The output of terminal B is supplied to circuit 3 via IV4, and the output 0 of circuit 3 is transmitted to input terminal PE. Terminal QD is set to 1 at rise time T2' of pulse CLK, and counter 1 performs the counting action again. And circuit 3 delivers 0 at time T3', and terminal QD becomes 0 at time T4' of the next pulse. Then the division signal of duty ratio 50% of
1/6X1/2 is delivered to terminal O4.
申请人：FUJITSU LTD
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