DR住宅 by su11 architecture+design
华为云引擎系列交换机技术介绍说明书
CloudEngine Is the Foundation of the Intent-driven NetworkHuawei CloudEngine Series Switches Technical PresentationContentsClick to add Title 1Click to add Title 2Click to add Title 3CloudEngine Switch OverviewCloudEngine Switch HighlightsCloudEngine Switch Market ProgressSwitches Are the Cornerstone for Transforming Data Centers from Service Centers to Value CentersCloud computingBig DataDistributed storageMetcalfe's Law: The effect of a telecommunications network is proportional to the square of the number of connected users of the system.-Robert Metcalfe who invented Ethernet, founder of 3Com In the future, even if all hardware network devices will disappear, data center switches used as the buses connecting to servers, will always exist. The Ethernet helps release the value of data.AISDN NFVIntent-driven networkUltra-broadbandInfrastructureSimplifiedOpenController and management tool layerControllerAnalyzerSecurityCharacteristics of the Future of DC Switches: Ultra-broadband, Simplified, Intelligent, Secure, and OpenIntelligentSecureManagementControlAnalysisOpenConvergenceEcosystemSpine LeafGatewayBandwidth -> LatencyLayer 2 and Layer 3 -> SecurityManual driving -> Automated drivingWeb page -> Service integrationCloudEngine Series Data Center Switches Portfolio(1)Core SwitchesAccess SwitchesCloudEngine 6881-48S6CQ (New)CloudEngine 6863-48S6CQ (New)CloudEngine 16800 (New)CloudEngine 16816CloudEngine 16808CloudEngine 1680410GE ToR switch25GE ToR switchCloudEngine Series Data Center Switches Portfolio(2)Core SwitchesAccess Switches10GE ToR switchCE6851-48S6Q-HICE6810-48S4Q-LICE6810-32T16S4Q-LIGE ToR switchCE5855-48T4S2Q-EICE5855-24T4S2Q-EIVirtual SwitchesCE1800VCE6855/CE6856-48S6Q-HICE6855/CE6856-48T6Q-HI10GE large-buffer ToR switchCE6870-48S6CQ-EIToR switch with flexible cardsCE8861-4C-EI40GE switchCE7855-32Q-EICE6865-48S8CQ-EI25GE ToR switch100GE switchCE8850-64CQ-EICE12816CE12812CE12808CE12808S CE12804SCE12804CE12800CE12800SCE6870-48T6CQ-EICE6875-48S4CQ-EICE8850-32CQ-EICE6860-48S8CQ-EICE6857-48S6CQ-EICE8860-4C-EICE5880-48T6Q-EICE6880-24S4Q2CQ-EIOrthogonal architectureStrict front-to-back airflow designNon-blocking switchingCounter-rotating fansLine cardNo cabling of the backplaneIncreased bandwidth of the entire systemCE12800Patent No.: CN201110339954.1Independent front-to-back airflowEven heat dissipation, suitable for data centersCell switching and VoQTraffic balancing, improving bandwidth utilizationCounter-rotating and turbo fansHighly efficient heat dissipationLeading energy-conserving designHigh-Quality CloudEngine: High-Quality Architecture Creates a Green and Stable Network•Industry-leading architecture design and high quality:orthogonal SFU design,Clos architecture,cell switching,and Virtual Output Queue (VOQ)mechanism 1/31/31/31/31/31/31/31/31/31/31/31/31/31/31/31/31/31/3ContentsClick to add Title 1Click to add TitleCloudEngine Switch Overview3CloudEngine Switch Market Progress▪Ultra-broadband Cloud Engine ▪Simplified Cloud Engine ▪Intelligent Cloud Engine▪Secure Cloud Engine ▪Open Cloud Engine2CloudEngine Switch HighlightsClos Theory: Cluster Scale Is the Driving Force for Data Center Network Architecture EvolutionSpineLeafCore EdgeSpineLeafCoreEdgeSpineLeafEdgeL2L310GE10GE40GE 40GE 40GEL2BGPL3L3First generation: 3K GE serversSecond generation: 10K GE serversThird generation: 20K 10GE servers⚫The port capacity of cards increases continuously, and CE switches canprovide 36*100GE ports.⚫To avoid HASH polarization, CE switches provide 128 ECMP paths.⚫Network congestion control: CE switches provide large buffer, and split a single flow into multiple ones to load balance them.Difficulties in the non-blocking Clos architecture: The convergence ratio and packet loss ratio cannot be compromised.⚫Data center network architecture: A fat-tree topology is used and the capacity of the root node determines the server cluster scale.⚫Evolution direction: Add network layers, and increase the quantity and capacity of spine or code nodes.⚫Network congestion control: Increase the buffer and optimize load balancing.CE switches' buffer is 80 times higher than the industry average, implementing zero packet loss for microburst traffic. The switches' performance is 1032 Tbit/s. CE switches can connect to over 50,000 servers with no blocking.Larger Interface Rate: The Rise of 25GE Interfaces Balance the Cost and Efficiency10M1980100M: IEEE802.3u199519981000M: IEEE802.3ab/z20021G: IEEE802.3ae/ak201040G/100G: IEEE802.3ba2008DCB/PB (IETF TRILL)2013400G2009FCoE201625G: 802.byDevelopment of Ethernet:DPDKIn the past two years, why are 25GE interfaces used?➢The 25GE interface can better match the SerDes rate: 1.25 Gbit/s -> 3.125 Gbit/s -> 6.25 Gbit/s -> 10.3125 Gbit/s -> 25 Gbit/s -> 56 Gbit/s➢Compared with the 40GE NIC, the 25GE NIC has higher use efficiency of the PCIe channel. (40G+40G)/8G*16= 62.5%; 25G*2/(8G*8) = 78%➢Lower cabling costs for 25GE interfaces: The SFP28 module is used. Because only single-channel connections are used, the SFP28 module is compatible with LC optical fibers in the 10GE era, without cabling.➢The bandwidth between NICs has exceeded 10 Gbit/s: As technologies such as RDMA, SR-IOV, and DPDK develop, the bandwidth between NICs has exceeded 10 Gbit/s.APP RDMA NICCoprocess or/FPGAAPPRDMA NICFast CNPCNPPPVIQ: eliminates packet lossinside chipsVIQ12Dynamic ECN3Dynamic ECNFast CNPPacket lossTraditionalVIQVIQ enables the outbound interface to send backpressure signals to the inbound interface, achieving zero packet loss.PFCSRECNNormal CNPPhysical queueThreshold (Port-Buffer)SwitchServer Q0Q1ECN waterline ECN waterlineRR ServerServerServer.. .Dynamic ECN uses dynamic collection and dynamic threshold adjustment to realize low latency and high throughput.Fast CNP provides fast congestion feedback to improve networkconvergence performance by 30%.AI Fabric: Intelligent Lossless Data Center Network Solution Provides Low latency and Zero Packet LossFast CNPUltra-broadband Cloud Engine Simplified Cloud Engine Intelligent Cloud Engine Secure CloudEngine Open Cloud Engine➢Independent forwarding, control, anddetection, and 3-channel cluster design ➢Four dedicated GE interfaces are used ascluster control channels.➢ A maximum of 3.2 Tbit/s cluster bandwidthis supported.Unique three-channel separated cluster, control plane coupling…Control signalingchannelData forwardingchannel Dual-active detection (DAD) channel➢The control plane runs independently and synchronizes asmall amount of information about interface status entries.➢Devices in the DFS group can be upgraded independently,without interrupting services.➢When the peer-link is faulty or the M-LAG master devicefails twice, the M-LAG backup device can still work properly.Independent control plane, protocol-level coupling…Peer-linkDAD channelDevice Virtualization: Easy-to-Manage, High-Performing, Highly Reliable Virtual SystemsC luster S witch S ystem (CSS)M ulti-Chassis LAG (M-LAG)➢The control plane runs independently anddoes not have synchronization information.➢Two switches are configured with the samegateway IP address and MAC address.➢Two links of the server NIC are configured tosend broadcast packets simultaneously.Independent control planewithout couplingM-LAG Lite➢Provide a maximum of 1:16virtualization capabilities in port and port group mode.On-demand VS allocation, improving resource utilization➢Exclusive CPU, memory, and MAC/VLAN/FIB entriesExclusive resources in VSs and highest specificationsFault isolation between VSs, improving securityVS (V irtual S ystem )Ultra-broadband Cloud Engine Simplified Cloud Engine Intelligent Cloud Engine Secure CloudEngine Open Cloud EngineLayer 2 Boundary Extension: Build a Large-Scale Network Resource Pool Based on BGP EVPNBGP EVPN acts as the VXLAN control plane to provide the following functions:➢Triggers automatic VXLAN tunnel setup between VTEPs to avoid the need to manually configure full-mesh tunnels.➢Advertises host routes and MAC address table, prevents unknown traffic flooding, and optimizes packet forwarding.➢Implements Layer 2 interconnection between data centers in different networking.Layer 2 large-scale horizontal expansion in the data centerand extension to the remote DCVXLAN BGP EVPNVTEP VTEP VTEP VTEP RRRRBGP EVPNVTEP VTEPProtocol vitality: open interconnection and interworkingbetween devices from different vendorsNetwork Automation: Interconnection with Third-Party Management Tools, Controllers, Virtualization Management Platforms, and Cloud PlatformsScenario 1: traditional network management➢Interconnection with a third-party management tool : CE switches can interconnect with a third-party management tool such as Ansible to implement automatic network configuration.Scenario 2: network and computing association➢Interconnection with a virtualization management platform : CE switches are connected to the Agile Controller-DCN, and the Agile Controller-DCN is associated with the third-party computing management platform.Scenario 3: third-party management on the overlay➢Interconnection with a third-party controller : The CE switch functions as the VXLAN Layer 2 VTEP and is managed by the NSX.Scenario 4: cloud-network integration➢Interconnection with a cloud platform through the Agile Controller-DCN : CE switches are connected to the AgileController-DCN, and the Agile Controller-DCN connects to the third-party cloud platform.SpineLeafGateway10GE40GEDCScenario 1Interconnection with a managementtoolISP2Scenario 2Interconnection with avirtualization managementplatformScenario 3Interconnectionwith a third-party controller Scenario 4Interconnection with a cloud platformSimplified Deployment: IPv4 and IPv6, Unicast and Overlay Multicast, and Rollout of Full-stack Services Within MinutesServer leaf IPv6IPv4VTEP Server leaf SpineVTEPServer leaf VM VM VMOVSBorder-LeafBMVTEP VM VM VMOVSServer leaf VTEPBMIPv4 extranetIPv4Service-centered IPv6 evolution mode➢2018 Q3: virtualization ➢2019 Q1: cloud-network cooperationServer leafIPv6IPv4VTEP Server leaf SpineVTEPServer leaf VM VM VMOVSBorder-LeafBMVTEP VM VM VMOVSServer leaf VTEPIPv6 extranetIPv4 extranetIPv4IPv6 extranetReplicate IPv4 O&MexperiencesServer leafVTEP Server leaf SpineVTEPServer leaf VM VM VMOVSBM VTEP VM VM VMOVSServer leaf VTEPIPv4 extranetIPv4 extranetOverlay multicastSave bandwidthServer leafVTEP Server leaf SpineVTEPServer leaf VM VM VMOVSBM VTEP VM VM VMOVSServer leaf VTEPIPv4 extranetIPv4 extranetDual-stackMulticastIngress replicationIGMP/PIM-SM➢2018 Q3: commercial chip ready ➢2019 Q1: controller mappingCollectorAnalyzerCPU Forwarding Chip CollectorAnalyzerCPUForwarding ChipCollectorAnalyzerCPUForwarding ChipNP•SNMP or NETCONF uses the query/response mechanism, minute-level reporting, and XML or text encoding, which is inefficient.•NetStream uses the flow sampling mechanism and requires CPU participation, which has low performance and is inaccurate.•gRPC uses the subscription/reporting mechanism, subsecond-level reporting , protobuffer coding, and HTTP transmission, which has a high efficiency .•ERSPAN+ adds ingress and egress ports or timestamps of original flows to calculate the flow path and delay .•INT supports in-line path or quality detection.SNMP NetconfNetstreamERSPANSNMP NetconfNetstreamERSPAN+INTgRPCSNMP NetconfFlow tableProtobuf over UDPgRPCERSPAN+Netstream1:1•Protobuf over UDP is used to encode andtransmit forwarding plane information, which is efficient and does not affect CPU performance .•Small NP intelligent analysis algorithm is used to perform in-depth analysis of abnormal flows to learn in-depth information such as the latency, jitter, packet loss ratio, and packet loss location .Historical CapabilitiesCurrent CapabilitiesFuture EvolutionTelemetry Capability: Transformation of the Data Collection Mode Is the Basis of Big Data O&MUltra-broadband Cloud Engine Simplified Cloud Engine Intelligent Cloud Engine Secure CloudEngine Open Cloud EngineMicroburst Detection Capability: Millisecond-level Buffer Monitoring and Subscription Collection, Which Are Visible and ClearData CenterService exceptionNormal networkTraditional NMSArtifactFreezeSubsecond-levelcollectiongRPC subscription . . .Content feedbackOne request formultiple tasks•Visible: subsecond-level subscription data collection510us50%100%The buffer is full and packet loss may occur.2-ms buffer monitoring•Clear: high-precision data monitoring5-minute pollingperiodSNMP request and response. . .Multiple requests for a single task510s50%100%Normal buffer detectionMicrosecond-level buffer monitoring•The collection period is too long, which may ignore network details.•The detection interval is too long, so device details may be incomplete.Forwarding chipCPUFPGACE8860Monitoring queueNote: The CE8860 supports this function.VM 1VM 2VM 3 1.1.1.1 1.1.1.2 1.1.1.3VM 4VM 5VM 6 2.2.2.1 2.2.2.2 2.2.2.3As Is: subnet-based isolation To Be:VM-level isolationFine-grained DefenseDefining applications based on VM names and discrete IP addresses, with finer granularity and wider dimensionsFlexible DeploymentDefining services based on application groups and decoupling from subnets to achieve flexible deployment Distributed SecurityTraffic of access switches is filtered nearby and east-west isolation is implemented without using firewalls.Use Microsegmentation to Achieve Fine-grained Isolation and Service SecurityWebAppAFW IDS LB NATVASResource poolSimplified deploymentThe SDN controller definesservice chains through drag-and-drop operations.Efficient forwardingProvide traffic diversion for one time, simple configuration, service traffic forwarding, and secure monitoring.Flexible orchestrationDecouple the VAS function from Fabric, providing flexible orchestration.Switch SwitchSwitchAgile CloudEngine: Supporting NSH Service Chains, Providing Easier VAS OrchestrationACOpticalfiber/transmissiondevice/Layer 2 transparenttransmissionMacSec at the Link Layer: IP Layer 3 Features such as Encryption Are Introduced to the MAC Link LayerSwitch ASwitch BScenario➢In scenarios that require high data confidentiality, such asgovernment, military, and finance scenarios, interconnection is required between data centers or between different modules of data centers across buildings.➢The CE6875 uplink port (100GE), and CEL16CQFD (16*100GE) and CEL08CFFG1 (8*200GE) cards of the CE12800 can be used.Definition➢Media Access Control Security (MACsec) ensures securecommunication within LANs in compliance with IEEE 802.1AE and 802.1X. It provides identity authentication, data encryption, integrity check, and replay protection to protect Ethernet frames and prevent devices from processing attack packets.NetworkingNetworkingOriginal packetData encryption protectionMACsec packetData integrity protectionStandardsChinaIntegration InnovationEcological cooperationGermany MoscowMulti-vendor pre-integration verificationMulti-layer open ecosystemOpen Ecosystem: Huawei Joins Hands with 20+ Industry Chain Partners to Perform System IntegrationOpen ecosystem: fast integration andsimplified managementSystem integration: 10+ OpenLabs in the globeManufacturerNSXAnsible. . .Rapid response to service requirementsHardware BFDMicrosegmentationNSH modeIPv6 over VXLANCPUForwarding chipIntra-card CPU chip Quad-core CPU:▪Protocol packet processing▪FIB entry delivery ▪. . .Co-processor▪Hardware BFD ▪High-performance sFlow ▪. . .Forwarding chipAdjustable processes New service processes Adjustable entry resourcesEnhanced serviceprocessesVRPnetconfCLILinux ContainergRPCopenflowSSHpuppetFuncEditnetconfSNMPLinux and driverFragmentation and reassemblyOpen architecture, Flexible Business Innovation•Higher interface rate: 25GE interfaces and larger buffer cope with traffic surge in N:1 scenarios.•Flowlet&DLB: One flow is load balanced among multiple links.•AI Fabric intelligent lossless data center network solution: low latency and zero packet lossUltra-broadband: higher interface rate, more even load balancing, larger buffer, and lower latency•Telemetry capability•Microburst detection •Edge analysis capability•Microsegmentation used to isolate east-west traffic on switches (east-west traffic is isolated on firewalls originally)•SFC used to divert traffic from the control plane to the data plane•MACsec hardware encryption, providing high security and reliability•Open API•Interconnection with third-party management tools: Ansible•Interconnection with third-party management tools or controllers: VMaare NSX•Multiple virtualization technologies: CSS, M-LAG, M-LAG Lite, and VS •VXLAN + BGP EVPN: intra-DC and inter-DC virtualization•SDN controller: deployment in drag-and-drop mode, IPv4 and IPv6, rollout of unicast and multicast full-stack services in minutesIntelligent: enabling service agilitySimplified: automatic deployment of full-stack services and service rollout within minutesOpen: easy integration and timelyresponse to servicesSecure: best quality in the industry and pioneering energy-saving technology CloudEngine High-Performance Cloud SwitchesContents1Click to add Title 2CloudEngine Switch OverviewCloudEngine Switch Highlights Click to add Title 3CloudEngine Switch Market ProgressChina's No.1 and One of World's Top 3 DCN Vendors2014Source: IHS “2015 Infonetics Data Center and Enterprise SDN Vendor Leadership Analysis ”20132012•Data center network vendor with the fastest growth•First release of InterOP impressing the world •Industry-leading ultra-high performance2015•Huawei was the only Chinese vendor in the global SDN leadership list.•Largest market share in China in Q2•Huawei was the global data center network vendor with the fastest growth.•Annual growth rate up to 137%Global SDN AuthoritativeReport of Leading Vendors2016•The market share ranks No. 1 in Chi na and the third largest in the world .•SDN capability won the Best of ShowNet Award at Tokyo Interop.2017•Huawei was positioned as challenger in Gartner's Magic Quadrant for Data Center Networking.2018•Huawei has been positioned as a leader in data center hardware platforms for SDN.•The AI Fabric won the Best of Show Gold Award.In 2013, the CloudEngine 12800 won the Best of Show Award at Interop, which is the highest exhibition in the IT industry. Huawei is the first Chinese provider that wins the position.Highly Recognized PerformanceAward of Excellent Product Trusted byCIOAward of the Most Competitive Product Awards and CertificationsPreferred Brand of Cloud Computing and Network SolutionAward of Annual Excellent TechnologyChina SDN SDN Best Practice AwardAward of Excellent Product in Big DataIn 2016, the CE8860 and CE6851 won the Best of Show Award at Interop.InterOP AwardsHuawei's AI FabricIntelligent Lossless Data Center Network Solution Takes Home Interop Tokyo Best of Show AwardCloudEngineSeries Switches Serve 7800+ Global Customers⚫The market share is No.1in China and No.3in theworld.⚫The global market share growth rate is No. 1 for fourconsecutive years .⚫Over 32,000 CE12800 switches have been soldaround the world, serving 7800+customers in 120+countries.DC SDN SDN hardware platform leader⚫2018 Approaching the Leaders Quadrant ⚫2017 ChallengerGartner Peer InsightsCustomers’ Choice for Data Center NetworkingCopyright©2018 Huawei Technologies Co., Ltd.All Rights Reserved.The information in this document may contain predictivestatements including, without limitation, statements regarding the future financial and operating results, future productportfolio, new technology, etc. There are a number of factors that could cause actual results and developments to differ materially from those expressed or implied in the predictive statements. Therefore, such information is provided for reference purpose only and constitutes neither an offer nor an acceptance. Huawei may change the information at any time without notice.把数字世界带入每个人、每个家庭、每个组织，构建万物互联的智能世界。
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IGLOO2 FPGA 设备家族之间的设计迁移指南说明书
Application Note AC416February 20141© 2014 Microsemi CorporationMigrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 PackageTable of ContentsIntroductionThis document describes how to migrate designs within the IGLOO ®2 field programmable gate array (FPGA) device family between the M2GL025 and M2GL050 devices within the VF400 package. It addresses restrictions and specifications that need to be considered while moving a design between the M2GL025 and M2GL050 devices. This includes pin compatibility between the devices, design and device resources evaluation, I/O banks, standards, and so on. This document also describes the software flow behavior during the migration.Design MigrationIGLOO2 family devices are architecturally compatible with each other. However, attention must be paid to some key areas while migrating a design from one device to another. The following specific points are discussed in this document:•Design and Device Evaluation •I/O Banks and Standards •Pin Migration and Compatibility•Power Supply and Board-Level Considerations •Software FlowDesign and Device EvaluationOne of the initial and main tasks while migrating a design should be to compare the available resources between the two devices. The device resources can be grouped into three different categories:•High Performance Memory Subsystem •Fabric Resources •On-Chip OscillatorsIn addition, necessary design timing analysis and simulations should be performed while migrating designs from one device to another.Each of the following sections focuses on the different aspects of the design and device evaluation categories.Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Design Migration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Design and Device Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1I/O Banks and Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Pin Migration and Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Power Supply and Board-Level Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Software Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13List of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Migrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package2High Performance Memory SubsystemTable1 provides a high-level summary of the differences between the M2GL025 and M2GL050 high performance memory subsystem (HPMS) blocks. Based on the different HPMS resources and features, migration from one device to another can be planned to avoid any resource conflicts or issues. Fabric ResourcesTable2 gives a high-level summary of the differences between M2GL025 and M2GL050 fabric resources. Based on the differences, effective logic count, RAM size, and number of I/Os, migration can be evaluated and planned from one device to another without any resource conflicts or issues.On-Chip OscillatorsTable3 shows the summary of IGLOO2 on-chip oscillators that are the primary sources for generating free-running clocks.Table 1 • HPMS Features Per Package or DeviceFeatureVF400 PackageM2GL025 and M2GL025T M2GL050 and M2GL050T Fabric interfaces (FIC) 1 (FIC_0) 2 (FIC_0 and FIC_1) Memory subsytem DDR (MDDR)1X181X182eNVM (Kbytes) 256256eSRAM (Kbytes)6464eSRAM (non-SECDED) (Kbytes)8080SPI, HPDMA, PDMA22SDRAM through SMC_FIC Yes YesNotes:1.DDR supports x18, x16, x9, and x8 modes2.DDR supports x18 and x16 modesTable 2 • Summary of the Fabric Features Supported Per DeviceFabric Features (Logic, DSP, and Memory)VF400 PackageM2GL025 andM2GL025TM2GL050 andM2GL050T Logic/DSP Logic Modules (4-Input LUT)27,69656,340 Mathblocks3472PLLs and CCCs66Fabric Memory LSRAM 18 K blocks3169uSRAM 1K blocks3472User I/Os MSIO (3.3 V max)11187MSIOD (2.5 V max)3232DDRIO (2.5 V max)6488Total user I/Os per package207207Table 3 • On-Chip Oscillator Support Per DeviceFeatureVF400 PackageM2GL025M2GL0501 MHz RC oscillator1150 MHz RC oscillator11Design Migration3Refer to the IGLOO2 Clocking Resources User Guide for more information.I/O Banks and StandardsIGLOO2 I/Os are partitioned into multiple I/O voltage banks. The number of banks depends on the device. There are seven(7) I/O banks in M2GL025 and eight(8) I/O banks in the M2GL050 device.Table 4 shows a summary of organization of the I/O banks between M2GL025 and M2GL050 FPGA devices.Main crystal oscillator (32 KHz - 20 MHz)11Auxiliary crystal oscillator (32 KHz - 20 MHz)1-Table 4 • Organization of the I/O Banks in IGLOO2 DevicesI/O Banks VF400 PackageM2GL025TM2GL050TBank 0DDRIO: MDDR or fabricDDRIO: MDDR or fabricBank 1MSIO: fabric MSIO: fabric Bank 2MSIO: fabric –Bank 3MSIO: JTAG MSIO: fabric Bank 4MSIO: fabricMSIO: JTAG Bank 5MSIOD: SERDES_0 or fabric DDRIO: fabricBank 6MSIOD: fabric MSIOD: SERDES_0 or fabric Bank 7MSIO: fabric MSIOD: fabric Bank 8–MSIO: fabricTable 3 • On-Chip Oscillator Support Per DeviceFeatureVF400 PackageM2GL025M2GL050Migrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package4Package pins VDDIx are the bank power supplies where x indicates the bank number. For example,VDDI0 is bank0 power supply. Figure 1 and Figure 2 show the different I/O bank locations and numbers per device in the VF400 package.An MSIO bank supports 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V voltage standards. MSIOD or DDRIO bank supports 1.2 V, 1.5 V, 1.8 V, or 2.5 V voltage standards. The 3.3 V voltage standard is not supported for MSIOD or DDRIO I/Os. For more details on user I/O pins (MSIO, MSIOD, and DDRIO) and supported voltage standards, refer to the "Supported Voltage Standards" table in the IGLOO2 FPGA Fabric Architecture User Guide .Figure 1 • IGLOO2 M2GL050T VF400 I/O Bank LocationsFigure 2 • IGLOO2 M2GL025T VF400 I/O Bank LocationsDesign Migration5Pin Migration and CompatibilityAlthough the IGLOO2 devices and packaging have been designed to allow footprint compatibility for smoother migration, some of the pins have a reduced compatibility feature set between M2GL025 and M2GL050 devices in the VF400 package. This section addresses the different aspects of pin compatibility. The differences can be grouped into three categories:•Global Versus Regular Pins •Available versus No Connect Pins•I/Os Technology Compatibility Per Pin or Bank •Probe PinsGlobal Versus Regular PinsWhen migrating designs between IGLOO2 devices, it is important to evaluate the different types of pins that are available per device. The functionality of the same pin can be different between devices. This section focuses on highlighting and comparing the global pins in one device against the other devices.Therefore, migration can be evaluated and planned from one device to another without any resource conflicts or issues.•Moving from a device, where the I/O is a global pin to a device where the same I/O is a regular pin. In this case, replace the global clock (for example, CLKBUF) with a regular input buffer (for example, INBUF) and then internally promote the signal to a global resource using a CLKINT or synthesis options.•Moving from a device, where the I/O is a regular pin to a device where the same I/O is a global pin. In this case, replace the INBUF with a CLKBUF or keep the INBUF and internally promote the signal to a global using a CLKINT or synthesis options.Table 5 provides a comparison between the global pins available in M2GL025 and M2GL050 devices.The unused global pins are configured as inputs with pull-up resistors by Libero ® System-on-Chip (SoC)software.For more information, refer to the "FPGA Fabric Global Network Architecture" chapter of the IGLOO2Clocking Resources User Guide .Table 5 • Non-Equivalent Global Pins Comparison Per DevicePackage Pin VF400 Pin NamesM2GL025Bank No M2GL050Bank No A3DDRIO62PB0/MDDR_DQ_ECC10DDRIO87PB0/CCC_NW1_CLKI3/MDDR_DQ_ECC10E6DDRIO61PB0/CCC_NW1_CLKI30DDRIO88PB00R13MSIO 134PB4/VCCC_SE1_CLKI 4DDRIO 164PB5/VCCC_SE1_CLKI 5U11MSIO 125NB4/GB7/CCC_SW1_CLKI24DDRIO 152NB5/GB7/CCC_SW1_CLKI25U13MSIO 133PB4/GB15/VCCC_SE1_CLKI 4DDRIO 163PB5/GB15/VCCC_SE1_CLKI 5V11MSIO 125PB4/GB3/CCC_SW0_CLKI34DDRIO 152PB5/GB3/CCC_SW0_CLKI35V12MSIO 130PB4/VCCC_SE0_CLKI 4DDRIO 160PB5/VCCC_SE0_CLKI 5W10MSIO 120NB4/CCC_SW0_CLKI24DDRIO 147NB5/CCC_SW0_CLKI25W13MSIO 131PB4/GB11/VCCC_SE0_CLKI 4DDRIO 161PB5/GB11/VCCC_SE0_CLKI 5Y12MSIO 129PB4/CCC_SW1_CLKI34DDRIO 159PB5/CCC_SW1_CLKI35Migrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package6Table6 shows the list of global pins that are similar between the two devices.Refer to the "Dedicated Global I/O Naming Conventions" section in the IGLOO2 Pin Descriptions. Table 6 • Equivalent Global Pins Per DevicePackagePinVF400 Pin NamesM2GL025BankNo M2GL050BankNo A1DDRIO65PB0/GB0/CCC_NW0_CLKI30DDRIO91PB0/GB0/CCC_NW0_CLKI3A11DDRIO49PB0/CCC_NE1_CLKI3/MDDR_DQ140DDRIO75PB0/CCC_NE1_CLKI3/MDDR_DQ14B1DDRIO65NB0/GB4/CCC_NW1_CLKI20DDRIO91NB0/GB4/CCC_NW1_CLKI2C9DDRIO52PB0/GB8/CCC_NE0_CLKI3/MDDR_DQS10DDRIO78PB0/GB8/CCC_NE0_CLKI3/MDDR_DQS1D10DDRIO50PB0/GB12/CCC_NE1_CLKI2/MDDR_DQ120DDRIO76PB0/GB12/CCC_NE1_CLKI2/MDDR_DQ12D3DDRIO66NB0/CCC_NW0_CLKI20DDRIO92NB0/CCC_NW0_CLKI20D9DDRIO53PB0/CCC_NE0_CLKI2/MDDR_DQ100DDRIO79PB0/CCC_NE0_CLKI2/MDDR_DQ10E18MSIO28PB1/GB14/VCCC_SE1_CLKI1MSIO42PB1/GB14/VCCC_SE1_CLKI1F19MSIO26PB1/CCC_NE1_CLKI11MSIO40PB1/CCC_NE1_CLKI11G1MSIO97PB7/GB2/CCC_NW0_CLKI17MSIO115PB8/GB2/CCC_NW0_CLKI18G14MSIO25PB1/CCC_NE0_CLKI11MSIO39PB1/CCC_NE0_CLKI11G17MSIO27PB1/GB10/VCCC_SE0_CLKI1MSIO41PB1/GB10/VCCC_SE0_CLKI1G2MSIO96PB7/GB6/CCC_NW1_CLKI17MSIO114PB8/GB6/CCC_NW1_CLKI18H1MSIOD100PB6/GB5/CCC_SW1_CLKI16MSIOD118PB7/GB5/CCC_SW1_CLKI17H20MSIO20NB2/GB13/VCCC_SE1_CLKI2MSIO20NB3/GB13/VCCC_SE1_CLKI3H5MSIO98PB7/CCC_NW1_CLKI07MSIO116PB8/CCC_NW1_CLKI08J19MSIO20PB2/GB9/VCCC_SE0_CLKI2MSIO20PB3/GB9/VCCC_SE0_CLKI3J2MSIOD102PB6/CCC_SW1_CLKI06MSIOD120PB7/CCC_SW1_CLKI07J4MSIOD101PB6/GB1/CCC_SW0_CLKI16MSIOD119PB7/GB1/CCC_SW0_CLKI17J7MSIO99PB7/CCC_NW0_CLKI07MSIO117PB8/CCC_NW0_CLKI08K7MSIOD103PB6/CCC_SW0_CLKI06MSIOD121PB7/CCC_SW0_CLKI07M17MSIO11NB2/CCC_NE1_CLKI02MSIO11NB3/CCC_NE1_CLKI03N16MSIO11PB2/CCC_NE0_CLKI02MSIO11PB3/CCC_NE0_CLKI03Design Migration7Available versus No Connect PinsThere are pins that have one specific function in one device while those same pins are "no connect" (NC)in the other device. Table 7 lists the summary of these pins. For example, pin Y17 functions as the VPP pin in the M2GL025 while it is an NC in the M2GL050 device.Similarly, P13 pin is an NC in the M2GL025 but it is a VREF5 pin in the M2GL050 device.When moving from a device, where the I/O is an NC pin to a device where the I/O has a defined functionality and it is not used, follow the recommended methods for connecting the unused I/Os depending on the functionality of that I/O. Refer to "Unused Pin Configurations" in the Board Design Guidelines for SmartFusion2 SoC and IGLOO2 FPGA Application Note .When moving from a device, where the I/O has a defined functionality to a device where the I/O is an NC,then the NC pins can be driven to any voltage or can be left floating with no effect on the operation of the device. NC indicates that the pin is not connected to circuitry within the device.I/Os Technology Compatibility Per Pin or BankTable 8 shows the list of I/Os that would lead to incompatibility with the different technology support while migrating between M2GL025 and M2GL050 within the VF400 package. The difference is the type of I/O technology (MSIO versus DDRIO) that is supported on those regular I/Os. Table 7 • Available versus NC PinsPackage Pin VF400 Pin NamesM2GL025M2GL050Y17VPP NC W17VPP NC P13NC VREF5R11NCVREF5Table 8 • I/O Standards Compatibility Per Device or Package Pins Package Pin VF400 Pin NamesM2GL025Bank NoM2GL050Bank NoR12MSIO 134NB44DDRIO 164NB55R13MSIO 134PB4/VCCC_SE1_C LKI4DDRIO 164PB5/VCCC_SE1_C LKI5T13MSIO 133NB44DDRIO 163NB55T14MSIO 144PB44DDRIO 184PB55T15MSIO 144NB44DDRIO 184NB55U11MSIO 125NB4/GB7/CCC_SW 1_CLKI24DDRIO 152NB5/GB7/CCC_SW 1_CLKI25U12MSIO 130NB44DDRIO 160NB55U13MSIO 133PB4/GB15/VCCC_SE1_CLKI 4DDRIO 163PB5/GB15/VCCC_S E1_CLKI 5U14MSIO 142NB44DDRIO 181NB55V11MSIO 125PB4/GB3/CCC_SW 0_CLKI34DDRIO 152PB5/GB3/CCC_SW 0_CLKI35V12MSIO 130PB4/VCCC_SE0_C LKI4DDRIO 160PB5/VCCC_SE0_C LKI5V14MSIO 142PB44DDRIO 181PB55V15MSIO 146NB44DDRIO 190NB55W10MSIO 120NB4/CCC_SW0_CL KI24DDRIO 147NB5/CCC_SW0_CL KI25Migrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package8The DDRIOs do not support single ended 3.3 V I/O standards and differential LVPECL, LVDS 3.3 V, LVDS 2.5 V, RSDS BLVDS, MLVDS, and Mini-LVDS I/O standards, as shown in Table9. To migrate from M2GL025 to M2GL050 successfully, ensure that the correct VDDI power supply is used to power the equivalent banks. Only I/Os with compatible standards can be assigned to the same bank.W12MSIO121NB4/PROBE_B4DDRIO148NB5/PROBE_B5W13MSIO131PB4/GB11/VCCC_SE0_CLKI4DDRIO161PB5/GB11/VCCC_SE0_CLKI5W14MSIO131NB44DDRIO161NB55W15MSIO146PB44DDRIO190PB55Y10MSIO120PB44DDRIO147PB55Y11MSIO121PB4/PROBE_A4DDRIO148PB5/PROBE_A5Y12MSIO129PB4/CCC_SW1_CLKI34DDRIO159PB5/CCC_SW1_CLKI35Y13MSIO129NB44DDRIO159NB55Y15MSIO145PB44DDRIO187PB55Y16MSIO145NB44DDRIO187NB55Table 9 • Technology Support Difference Between Different I/O TypesI/O StandardsI/O TypesMSIO DDRIOSingle-Ended I/OLVTTL 3.3V Yes–LVCMOS 3.3V Yes–PCI Yes–LVCMOS 1.2V Yes YesLVCMOS 1.5V Yes YesLVCMOS 1.8V Yes YesLVCMOS 2.5V Yes YesVoltage-Referenced I/OHSTL 1.5V Yes YesSSTL 1.8Yes YesSSTL 2.5Yes YesSSTL 2.5 V(DDR1)Yes YesSSTL 1.8 V(DDR2)Yes YesSSTL 1.5 V (DDR3)Yes YesDifferential I/OLVPECL (input only)Yes–LVDS 3.3 V Yes–LVDS 2.5 V Yes–RSDS Yes–BLVDS Yes–Table 8 • I/O Standards Compatibility Per Device or Package Pins (continued)PackagePinVF400 Pin NamesM2GL025Bank No M2GL050Bank NoDesign Migration9Note:Even though the VDDI might be the same (for example, MSIO 2.5 V and DDRIO 2.5 V), theattributes and features supported might be different between different I/O types (MSIO versus DDRIO). Refer to the "I/O Programmable Features" section in the IGLOO2 FPGA Fabric Architecture User Guide for more information on the list of features supported per I/O type.Probe PinsProbe pins locations are compatible between the two devices. Table 10 shows the different probe I/Os location per device within the VF400 package. By default, probe pins are reserved for the probe functionality. Unreserve these pins by clearing the Reserve Pins for Probes check box in the "Device I/O Settings" under Project Setting in Libero SoC software. When the pins are not reserved, the probe I/Os can be used as regular I/Os.Note:Different I/O technologies are supported on these pins (MSIO versus DDRIO). Refer to "I/OsTechnology Compatibility Per Pin or Bank" on page 7 for more information.Power Supply and Board-Level ConsiderationsI/O power supply requirements are one of the key aspects to consider for design migrations. Since the migration is within the IGLOO2 family, there is no issue regarding the core voltage (VDD), charge pumps voltage (VPP), and analog sense circuit supply of the eNVM voltage (VPPNVM). The ground pins (VSS)are also equivalent between M2GL025 and M2GL050 devices. Refer to the IGLOO2 Pin Descriptions for more details. The bank supply voltages VDDI pins must be connected appropriately. Refer to the "Recommendation for Unused Bank Supplies" connections table in the Board Design Guidelines for SmartFusion2 SoC and IGLOO2 FPGA Application Note for more information in case where the specific banks are not used. An MSIO bank supports 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V voltages and an MSIOD and DDRIO bank supports 1.2 V, 1.5 V, 1.8 V, or 2.5 V voltages. For more details on user I/O pins (MSIO,MSIOD, and DDRIO) and supported voltage standards, refer to the "Supported Voltage Standards" table in the IGLOO2 FPGA Fabric Architecture User Guide .The banks have dedicated supplies. Therefore, only I/Os with compatible voltage standards can be assigned to the same I/O voltage bank. The correct bank supply must be used when migrating between the different devices per the appropriate voltages (I/O Standards) selected for the bank. Table 11 shows the different banks power supply compatibility per device in the VF400 package.MLVDS Yes –Mini-LVDSYes–Table 10 • Probe Pins Per DevicePackage Pin VF400 Pin NamesM2GL025Bank No M2GL050Bank No W12MSIO 121NB4/PROBE_B 4DDRIO 148NB5/PROBE_B 5Y11MSIO 121PB4/PROBE_A4DDRIO 148PB5/PROBE_A5Table 11 • Power Supply Compatibility Per DevicePackage PinVF400 Pin NamesM2GL025M2GL050F2VDDI7VDDI8G5VDDI7VDDI8H18VDDI2VDDI3J1VDDI6VDDI7 J8VDDI7VDDI8Table 9 • Technology Support Difference Between Different I/O Types (continued)I/O Standards I/O TypesMSIO DDRIOMigrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package10For the other bank supplies that are equivalent, refer to the provided recommendations in the IGLOO2 Pin Descriptions.Any other board-level considerations are common among the three devices. Refer to the Board Design Guidelines for SmartFusion2 SoC and IGLOO2 FPGA Application Note for more details.Software FlowThe Libero® SoC Software provides the option of reserving pins for moving between different devices within the IGLOO2 family where pins within the current device that are not bonded in the destination device can be automatically reserved. This option is available in I/O Constraints Editor which can be accessed from the Design Flow window as shown in Figure3. This is done in the early stages of the design cycle.Follow the procedure given below to reserve pins:K4VDDI6VDDI7L17VDDI2VDDI3L8VDDI6VDDI7M20VDDI2VDDI3N14VDDI2VDDI3N3VDDI6VDDI7P16VDDI2VDDI3R14VDDI3VDDI4R19VDDI2VDDI3R3VDDI5VDDI6T12VDDI4VDDI5U15VDDI4VDDI5V18VDDI2VDDI3W11VDDI4VDDI5Y14VDDI4VDDI5Table 11 • Power Supply Compatibility Per Device (continued)Package PinVF400 Pin NamesM2GL025M2GL050Design Migration111.After finishing the Compile process, select the I/O Constraints option from the Design Flowwindow as shown in Figure 3.2.Select the Reserve Pins for Device Migration option from the Tools menu. The window shownbelow in Figure 4 is displayed.Figure 3 • I/O Constraint Editor Option part of the Design FlowMigrating Designs Between IGLOO2 M2GL025 and M2GL050 in VF400 Package12The first option shows the device that is currently being used in the Libero SoC project. From thedrop-down list, select the device that eventually will be migrated to as the target device. Refer to the Libero Soc software online help for more details on this window and other options.The Libero SoC software provides the option of moving between different devices within the IGLOO2family by changing the device selection using the Project Settings option in the Libero SoC software.Upon changing the device, Libero SoC software validates the features that are used within the design against the supported features within the new targeted device and package. Feedback messages are provided as part of the Libero SoC software flow listing the different actions taken by Libero SoC and the action required.The first step that Libero SoC performs upon changing the device is to invalidate the original design components and the design flows. The message is displayed as shown in Figure 5.Figure 4 • Reserve Pins for Device MigrationFigure 5 • Invalidating Component and Design Flow MessageConclusion 13As part of re-running the design flow, Libero SoC checks the different steps needed to be performed for completing and updating the design flow. Furthermore, Libero SoC converts the HPMS configurations to be compatible with the selected device and package combination.As part of the HPMS conversion, any changes that were made automatically to be compatible with the device and package selected will be printed to the log window. Libero SoC disables or defaults to different options if the current selected options are not supported in the new targeted device and package.After the HPMS configuration conversion is done, HPMS must be regenerated. To regenerate the HPMS component, open the HPMS component from Libero SoC Design Hierarchy Flow window and proceed through the different HPMS pages to complete the generation.ConclusionThis application note describes the design migration among IGLOO2 family devices focusing on migration between M2GL025 and M2GL050 within the VF400 package. IGLOO2 family devices share many common architectural features. During design migration, architecture differences between devices should be kept in mind to ensure seamless migration flow. Additionally, a key requirement is to run the functional simulation and timing analysis before and after the migration using Microsemi tools.List of ChangesThe following table lists critical changes that were made in the current version of the document. RevisionChanges PageRevision 1(February 2014)First version51900284-1/02.14© 2014 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.Microsemi Corporation (NASDAQ: MSCC) offers a comprehensive portfolio of semiconductor solutions for: aerospace, defense and security; enterprise and communications; and industrial and alternative energy markets. Products include high-performance, high-reliability analog and RF devices, mixed signal and RF integrated circuits, customizable SoCs, FPGAs, and complete subsystems. Microsemi is headquartered in Aliso Viejo, Calif. Learn more at .Microsemi Corporate HeadquartersOne Enterprise, Aliso Viejo CA 92656 USAWithin the USA: +1 (949) 380-6100Sales: +1 (949) 380-6136Fax: +1 (949) 215-4996。
某地区小学教学综合楼建筑方案设计图纸
英语一阅读真题16年 细节题
Expose = cope with
23
According to paragraphy 4, the stress wowen confront tends to be durable and frequent.
genetic architecture of the individual organism= upright posture
Conditioned=constraints
38
What do we learn about Thomas Jefferson?
细节性推理题定位比较排除
His attitude towards slavery was complex.
Live depend on Handed victory =benefit from
40
因果
Washington 's decision to free slaves originated from his military experience.
原Washington，who had begun to believe that all men were created equal after observing the bravery of the black soldiers during the Revolutionary War, overcame the strong opposition of his relatives to grant his salves their freedom in his will.
厄舍古屋的倒塌课件
Elements of Gothic Writing
• Emphasis on setting
– Exterior: landscape – Interior: houses
• Castle-like architecture • Characters are brooding, secretive • Buried family secrets • Long history of family tied to place
11
• Roderick’s mental condition is affected by his environment
• “He was enchanted by certain superstitious impressions in regard to the dwelling which he
• Roderick lives upstairs (mind) • Madeleine is entombed below ground (body)
18
Structure and Unity
• Poe creates texts within texts
1. “The Haunted Palace” (poem) reflects the Usher family life in the house (515)
• Poe addresses the dual and conflicted nature of the Self
• Mind and body are at war with each other in each of us
• We try to repress one side and live without it • But we cannot achieve a harmonious
瑞士康复花园对适老性户外环境设计的启示——以巴德-祖赫扎康复医疗中心花园为例
祖赫扎康复医疗中心花园为维持或促进使用者健康而设计的以自然元素为主的景观空间环境[2]。
一个良好的康复景观环境能够对老年人在某些疾病上起到缓解或减轻的辅助作用，为此，给老年人提供一个适宜养老的康复环境非常必要[3]。
适老性设计关注各类空间、设施及辅具对老人日常生活的友善支撑体系，缓解其因身体机能逐渐退化而带来的不便，提高其生活质量。
当前，我国适老性户外环境设计研究主要从设计原则、科学实证、案例研究等维度进行探讨。
例如，周燕珉等提出面向适老化的户外环境设计原则，及不同类型活动空间、设施及园林要素的设计要点[4]；袁晓梅等选择广州市老人院中心花园为研究对象，从健康管理的视角就其环境对老年人健康行为的支持进行评估，结合我国老年人实际需求，针对建立一种基于健康管理的地域性适老社区环境设计体系提出初步建议[5]；杨丹等对养老院的户外环境进行了实地调研，通过问卷调查与访谈了解了老人的户外活动情况，分析了老人的活动基本情况和颐乐园的康复景观要素[6]。
毛华松等认为社会转型下的单位社区适老性景观更新需从构建完善社区服务体系、增加多元交往空间、延续单位集体记忆来提升[7]。
总体而言，目前的研究重点是关注老年人在室外环境中的心理需求、行为特征、休闲行为、环境需求以及无障碍环境等[8]。
老年人在自然景观中的身体放松效果明显好于室内，并且整体上产生较好的精神疲劳恢复[9]。
显然，亲近自然能够促进老年人的身心健康，有效提高老年人的生活质量，养老环境中的康复景观为老年人提供了一个接触自然的机会[10]。
相关研究表明，老年人通常喜欢在花园中散步，种植开花、结果的植物等[11]，园艺操作活动对老人的身心健康有一定的改善作用[12]，而庭园使用活动对血压、心率和专注力都有改善作用，而且景观空间特征影响了具体康复效果和使用状况[13]。
适老环境的研究与设计现今已迎来了新的诉求，即不再限于以传统的空间配置、无障碍环境等“从上至下”的标准，而是需要承担精细化服务老龄群体生活的重任[14]。
建筑学毕业设计的外文文献及译文
建筑学毕业设计的外文文献及译文文献、资料题目：《Advanced Encryption Standard》文献、资料发表（出版）日期:2004.10.25系（部）：建筑工程系生：陆总LYY外文文献：Modern ArchitectureModern architecture, not to be confused with Contemporary architecture1, is a term given to a number of building styles with similar characteristics, primarily the simplification of form and the elimination of ornament. While the style was conceived early in the 20th century and heavily promoted by a few architects, architectural educators and exhibits, very few Modern buildings were built in the first half of the century. For three decades after the Second World War, however, it became the dominant architectural style for institutional and corporate building.1. OriginsSome historians see the evolution of Modern architecture as a social matter, closely tied to the project of Modernity and hence to the Enlightenment, a result of social and political revolutions.Others see Modern architecture as primarily driven by technological and engineering developments, and it is true that the availability of new building materials such as iron, steel, concrete and glass drove the invention of new building techniques as part of the Industrial Revolution. In 1796, Shrewsbury mill owner Charles Bage first used his "fireproof design, which relied on cast iron and brick with flag stone floors. Such construction greatly strengthened the structure of mills, which enabled them to accommodate much bigger machines. Due to poor knowledge of iron's properties as a construction material, a number of early mills collapsed. It was not until the early 1830s that Eaton Hodgkinson introduced the section beam, leading to widespread use of iron construction, this kind of austere industrial architecture utterly transformed the landscape of northern Britain, leading to the description, πDark satanic millsπof places like Manchester and parts of West Yorkshire. The Crystal Palace by Joseph Paxton at the Great Exhibition of 1851 was an early example of iron and glass construction; possibly the best example is the development of the tall steel skyscraper in Chicago around 1890 by William Le Baron Jenney and Louis Sullivan∙ Early structures to employ concrete as the chief means of architectural expression (rather than for purely utilitarian structure) include Frank Lloyd Wright,s Unity Temple, built in 1906 near Chicago, and Rudolf Steiner,s Second Goetheanum, built from1926 near Basel, Switzerland.Other historians regard Modernism as a matter of taste, a reaction against eclecticism and the lavish stylistic excesses of Victorian Era and Edwardian Art Nouveau.Whatever the cause, around 1900 a number of architects around the world began developing new architectural solutions to integrate traditional precedents (Gothic, for instance) with new technological possibilities- The work of Louis Sullivan and Frank Lloyd Wright in Chicago, Victor Horta in Brussels, Antoni Gaudi in Barcelona, Otto Wagner in Vienna and Charles Rennie Mackintosh in Glasgow, among many others, can be seen as a common struggle between old and new.2. Modernism as Dominant StyleBy the 1920s the most important figures in Modern architecture had established their reputations. The big three are commonly recognized as Le Corbusier in France, and Ludwig Mies van der Rohe and Walter Gropius in Germany. Mies van der Rohe and Gropius were both directors of the Bauhaus, one of a number of European schools and associations concerned with reconciling craft tradition and industrial technology.Frank Lloyd Wright r s career parallels and influences the work of the European modernists, particularly via the Wasmuth Portfolio, but he refused to be categorized with them. Wright was a major influence on both Gropius and van der Rohe, however, as well as on the whole of organic architecture.In 1932 came the important MOMA exhibition, the International Exhibition of Modem Architecture, curated by Philip Johnson. Johnson and collaborator Henry-Russell Hitchcock drew together many distinct threads and trends, identified them as stylistically similar and having a common purpose, and consolidated them into the International Style.This was an important turning point. With World War II the important figures of the Bauhaus fled to the United States, to Chicago, to the Harvard Graduate School of Design, and to Black Mountain College. While Modern architectural design never became a dominant style in single-dwelling residential buildings, in institutional and commercial architecture Modernism became the pre-eminent, and in the schools (for leaders of the profession) the only acceptable, design solution from about 1932 to about 1984.Architects who worked in the international style wanted to break with architectural tradition and design simple, unornamented buildings. The most commonly used materials are glass for the facade, steel for exterior support, and concrete for the floors and interior supports; floor plans were functional and logical. The style became most evident in the design of skyscrapers. Perhaps its most famous manifestations include the United Nations headquarters (Le Corbusier, Oscar Niemeyer, Sir Howard Robertson), the Seagram Building (Ludwig Mies van der Rohe), and Lever House (Skidmore, Owings, and Merrill), all in New York. A prominent residential example is the Lovell House (Richard Neutra) in Los Angeles.Detractors of the international style claim that its stark, uncompromisingly rectangular geometry is dehumanising. Le Corbusier once described buildings as πmachines for living,∖but people are not machines and it was suggested that they do not want to live in machines- Even Philip Johnson admitted he was πbored with the box∕,Since the early 1980s many architects have deliberately sought to move away from rectilinear designs, towards more eclectic styles. During the middle of the century, some architects began experimenting in organic forms that they felt were more human and accessible. Mid-century modernism, or organic modernism, was very popular, due to its democratic and playful nature. Alvar Aalto and Eero Saarinen were two of the most prolific architects and designers in this movement, which has influenced contemporary modernism.Although there is debate as to when and why the decline of the modern movement occurred, criticism of Modern architecture began in the 1960s on the grounds that it was universal, sterile, elitist and lacked meaning. Its approach had become ossified in a πstyleπthat threatened to degenerate into a set of mannerisms. Siegfried Giedion in the 1961 introduction to his evolving text, Space, Time and Architecture (first written in 1941), could begin ,,At the moment a certain confusion exists in contemporary architecture, as in painting; a kind of pause, even a kind of exhaustion/1At the Metropolitan Museum of Art, a 1961 symposium discussed the question πModern Architecture: Death or Metamorphosis?11In New York, the coup d r etat appeared to materialize in controversy around the Pan Am Building that loomed over Grand Central Station, taking advantage of the modernist real estate concept of πair rights,∖[l] In criticism by Ada Louise Huxtable and Douglas Haskell it was seen to ,,severπthe Park Avenue streetscape and πtarnishπthe reputations of its consortium of architects: Walter Gropius, Pietro Belluschi and thebuilders Emery Roth & Sons. The rise of postmodernism was attributed to disenchantment with Modern architecture. By the 1980s, postmodern architecture appeared triumphant over modernism, including the temple of the Light of the World, a futuristic design for its time Guadalajara Jalisco La Luz del Mundo Sede International; however, postmodern aesthetics lacked traction and by the mid-1990s, a neo-modern (or hypermodern) architecture had once again established international pre-eminence. As part of this revival, much of the criticism of the modernists has been revisited, refuted, and re-evaluated; and a modernistic idiom once again dominates in institutional and commercial contemporary practice, but must now compete with the revival of traditional architectural design in commercial and institutional architecture; residential design continues to be dominated by a traditional aesthetic.中文译文:现代建筑现代建筑，不被混淆与‘当代建筑’，是一个词给了一些建筑风格有类似的特点，主要的简化形式,消除装饰等.虽然风格的设想早在20世纪,并大量造就了一些建筑师、建筑教育家和展品，很少有现代的建筑物，建于20世纪上半叶.第二次大战后的三十年，但最终却成为主导建筑风格的机构和公司建设.1起源一些历史学家认为进化的现代建筑作为一个社会问题，息息相关的工程中的现代性, 从而影响了启蒙运动，导致社会和政治革命.另一些人认为现代建筑主要是靠技术和工程学的发展，那就是获得新的建筑材料，如钢铁，混凝土和玻璃驱车发明新的建筑技术，它作为工业革命的一部分.1796年，Shrewsbury查尔斯bage首先用他的‘火’的设计，后者则依靠铸铁及砖与石材地板.这些建设大大加强了结构，使它们能够容纳更大的机器.由于作为建筑材料特性知识缺乏,一些早期建筑失败.直到1830年初，伊顿Hodgkinson预计推出了型钢梁，导致广泛使用钢架建设，工业结构完全改变了这种窘迫的面貌,英国北部领导的描述，〃黑暗魔鬼作坊〃的地方如曼彻斯特和西约克郡.水晶宫由约瑟夫paxton的重大展览，1851年,是一个早期的例子, 钢铁及玻璃施工；可能是一个最好的例子，就是1890年由William乐男爵延长和路易沙利文在芝加哥附近发展的高层钢结构摩天楼.早期结构采用混凝土作为行政手段的建筑表达（而非纯粹功利结构），包括建于1906年在芝加哥附近，劳埃德赖特的统一宫，建于1926 年瑞士巴塞尔附近的鲁道夫斯坦纳的第二哥特堂,.但无论原因为何，约有1900多位建筑师，在世界各地开始制定新的建筑方法,将传统的先例（比如哥特式）与新的技术相结合的可能性.路易沙利文和赖特在芝加哥工作,维克多奥尔塔在布鲁塞尔，安东尼高迪在巴塞罗那，奥托瓦格纳和查尔斯景mackintosh格拉斯哥在维也纳，其中之一可以看作是一个新与旧的共同斗争.2现代主义风格由1920年代的最重要人物，在现代建筑里确立了自己的名声.三个是公认的柯布西耶在法国，密斯范德尔德罗和瓦尔特格罗皮乌斯在德国.密斯范德尔德罗和格罗皮乌斯为董事的包豪斯，其中欧洲有不少学校和有关团体学习调和工艺和传统工业技术.赖特的建筑生涯中，也影响了欧洲建筑的现代艺术,特别是通过瓦斯穆特组合但他拒绝被归类与他们.赖特与格罗皮乌斯和Van der德罗对整个有机体系有重大的影响.在1932年来到的重要moma展览,是现代建筑艺术的国际展览，艺术家菲利普约翰逊. 约翰逊和合作者亨利-罗素阁纠集许多鲜明的线索和趋势，内容相似,有一个共同的目的, 巩固了他们融入国际化风格这是一个重要的转折点.在二战的时间包豪斯的代表人物逃到美国，芝加哥，到哈佛大学设计黑山书院.当现代建筑设计从未成为主导风格单一的住宅楼，在成为现代卓越的体制和商业建筑，是学校（专业领导）的唯一可接受的，设计解决方案，从约1932年至约1984 年.那些从事国际风格的建筑师想要打破传统建筑和简单的没有装饰的建筑物。
建筑结构主义大师凡艾克Aldo Van Eyck
Apocalypse of traveling
critical regionalism & humanism
Aldo Van Eyck
这样，不仅建筑单 体的形式略有差异， 各单体之间的间隔 也呈现出各异的、 美妙的弧线。这种 通过曲线形式同时 产生正空间（功能 空间）和负空间 （交通空间）的多 样性与交融感，增 加了空间的灵活性 与趣味性。
humanism
范艾克在北非聚落的旅行极大的影响了他后来的建 筑理论和设计风格。
主要表现在他的批判的地域主义思想和对人文主义 的关注。
critical regionalism & humanism
Aldo Van Eyck
Apocalypse of traveling
地域主义的发展
19世纪时建筑追求“地域性”的风格特征，强调地域 身份、边界以及群体的权利，并通过历史及考古研究获 得必须的地域性准则。
FIRST PART:
Apocalypse of traveling
critical regionalism &
humanism
critical regionalism & humanism
Aldo Van Eyck
Apocalypse of traveling
FIRST PART:
critical regionalism &
芒福德的地域主义不再采取同全球化对立的姿态，而是 积极的主张消除本土和全球化之间的对立。他认为，每 个地域文化都有其普遍性的一面，因此对某一地区来说， 接受来自其它各地的影响并借助外来力量可以更有效的 运用本地资源，继而形成开放的文化系统。
批判的地域主义持一种辩证和批判的态度。它对以全球 化和大同文化为主导的现代主义建筑持强烈的批评态度， 它也对地方和地域主义，尤其是那种矫情的、浪漫风的 和风景化的地域主义持批评态度。它强调场址、地点和 地形、地貌在建筑设计中的作用，它也保持了现代建筑 的进步和解放的思想。这是一种严肃的、具有生命力的、 进行自我反思和批判的建筑思想。
住宅设计规范
住宅设计规范《住宅设计规范》由中华人民共和国住房和城乡建设部标准定额研究所组织中国建筑工业出版社出版发行。
中文名住宅设计规范外文名Residential design specification单位中华人民共和国住房和城乡建设部出版社中国建筑工业出版社有效期2012年08月01日生效文号公告第1093号目录.1规范.22003年版.31999年版.4规范内容.▪前言.▪总则.▪术语.▪基本规定.▪指标计算.▪套内空间.▪共用部分.▪室内环境.▪建筑设备.5附录.6其他说明住宅设计规范规范2011年《住宅设计规范》公告【文件名称】关于发布国家标准《住宅设计规范》的公告【有效期】2012年08月01日生效【文号】中华人民共和国住房和城乡建设部公告第1093号关于发布国家标准《住宅设计规范》的公告[1]现批准《住宅设计规范》为国家标准，编号为GB50096-2011，自2012年8月1日起实施。
其中，第5.1.1、5.3.3、5.4.4、5.5.2、5.5.3、5.6.2、5.6.3、5.8.1、6.1.1、6.1.2、6.1.3、6.2.1、6.2.2、6.2.3、6.2.4、6.2.5、6.3.1、6.3.2、6.3.5、6.4.1、6.4.7、6.5.2、6.6.1、6.6.2、6.6.3、6.6.4、6.7.1、6.9.1、6.9.6、6.10.1、6.10.4、7.1.1、7.1.3、7.1.5、7.2.1、7.2.3、7.3.1、7.3.2、7.4.1、7.4.2、7.5.3、8.1.1、8.1.2、8.1.3、8.1.4、8.1.7、8.2.1、8.2.2、8.2.6、8.2.10、8.2.11、8.2.12、8.3.2、8.3.3、8.3.4、8.3.6、8.3.12、8.4.1、8.4.3、8.4.4、8.5.3、8.7.3、8.7.4、8.7.5、8.7.9条为强制性条文，必须严格执行。
Bojie Li - 简历说明书
Bojie LiLast update on July11,2023 *****************·+86.150********·Haidian,Beijing,China·https://01.meWork ExperienceAssociate Chief Expert(副首席专家)&Assistant Scientist(助理科学家)&Technical Expert A(技术专家A)Beijing,China Computer Networking and Protocol Lab(计算机网络与协议实验室),Huawei Mar’22–present Manager:Dr.Kun TanHuawei TopMinds Program(华为天才少年)Beijing,China Computer Networking and Protocol Lab(计算机网络与协议实验室),Huawei June’19–Mar’22 Manager:Dr.Kun TanEducationUniversity of Science and Technology of China(中国科学技术大学)Hefei,Anhui,China Ph.D.in Computer Science Sept.’14–June’19 Joint Ph.D.program with Microsoft Research Asia.Advisor:Prof.Enhong Chen and Dr.Lintao Zhang University of Science and Technology of China(中国科学技术大学)Hefei,Anhui,ChinaB.S.in Computer Science(School of Gifted Young,少年班学院)Sept.’10–July’14No.2Middle School,Shijiazhuang(石家庄二中)Shijiazhuang,Hebei,China Honor Class in STEM(理科实验班)Sept.’04–July’10 Zhongshan Primary School,Shijiazhuang(石家庄市中山路小学)Shijiazhuang,Hebei,ChinaSept.’04–July’10 Internship ExperienceMicrosoft Research Asia Beijing,China Systems Research Group Oct.’16–May’19 Advisor:Dr.Lintao ZhangMicrosoft Research Asia Beijing,China Wireless and Networking Research Group July’13–Sept.’14and July’15–Oct.’16 Advisor:Dr.Kun TanSelected Projects in HuaweiUnified Bus(UB,灵衢):Next Generation Data Center Interconnect Huawei Ongoing project,instructed by Dr.Kun Tan and Dr.Heng Liao Apr.’20–July’23•Unified Bus(UB,灵衢)is Huawei’s full-stack interconnect fabric to compete with NVIDIA NVLink,Intel CXL,and Infiniband.•I am one of the key architects of Unified Bus,directly managing15software developers in Hangzhouand Shanghai and indirectly managing an innovation team of5local researchers in Isarel and5researchers in Beijing.•By co-designing the interconnect with Kunpeng(鲲鹏)ARM CPU and Ascend(昇腾)AI NPU,UB achieves3.2Tbps bandwidth and sub-µs latency with10K+CPUs and NPUs in water-cooledTiangong(天工)supercomputer for AI and HPC.In comparison,NVLink(7.2Tbps)only scales to512GPUs and Infiniband for large-scale clusters only have0.4Tbps bandwidth and2µs latency.•UB enables direct communication among GPUs in data center scale,bypassing the CPU and thusimproving communication performance in LLM training to5x with10K NPUs.•By overlapping communication and computation,UB improves AllReduce performance in CPU-based ML inference by20%in search,recommendation,and advertisement systems.•Design an instruction set for SmartNIC offloading,improving end-to-end performance of distributedtransactions,distributed in-memory database and enterprise storage by25%∼114%.•Enable remote direct memory access without pinning memory,increasing effective memory sizeto5x with tiered memory and accelerating Spark-based big data application initialization from2minutes to6seconds.•Design a fast process wake-up mechanism in the Linux kernel for NIC interrupts,thus reducinginterrupt-mode RDMA latency by59%∼80%on x86and52%∼77%on ARM.•Design a hardware-based Memory-Level Cache that utilizes local DDR as a cache of remote memory,improving Redis performance by21%∼45%and making Redis on remote memory only2.5%slowerthan Redis on local memory.AKG:Automatic Kernel Compiler for AI Chips using Polyhedral Transformations Huawei Published in PLDI’21,second author,instructed by Dr.Peng Di June’19–Apr.’20•AKG is the equivalent of CUDNN in the Ascend(昇腾)ecosystem.The major challenge of AscendNPUs is its TPU-like architecture which requires developers to explicitly manage the memoryhierarchy,data movement and synchronization among matrix and vector computation units in theNPU.•AKG automatically compiles mathematical formulas to low-level assembly of an AI NPU.AKGuses polyhedral compilation to fully automate tiling,scheduling and memory management in acomplicated memory hierarchy of an NPU.•My role:architect and technical leader of the polyhedral compilation framework and dynamicshape team of15developers.•My technical contributions:Propose and implement novel solutions to open problems in polyhedralcompilation(non-affine access and parametric tiling);Refine polyhedral schedule constraints tofit NPU architecture;Design a combined manual and automatic scheduling mechanism;Designthe architecture and key algorithms to support dynamic shape,e.g.,algebraic simplification ofmultivariate polynomials.uRPC:A High Performance Unified RPC for Cloud&Client Huawei Ongoing project,instructed by Dr.Kun Tan and Dr.Heng Liao Apr.’22–July’23•Design a high-performance RPC protocol for Cloud&Client,achieving5x∼10x performance ofGoogle’s gRPC,the de-facto standard of RPC.•Design a cross-language and cross-platform serialization library with easy-to-use APIs similar toGoogle’s Protocol Buffers,but storing unified data structure in off-heap memory,achieving5xserialization and deserialization performance of Protocol Buffers.•Design a highly efficient cross-language and cross-platform RPC framework designed for lowlatency and high throughput.We replace HTTP headers with simple binary ingRDMA hardware,uRPC achieves<5µs latency,which is50x lower than gRPC.•As a unified RPC for Cloud&Client,uRPC integrates optimizations in wireless LAN and client-to-cloud WAN,improving performance of an AI-based photo beautifier by4x.Selected Projects during Ph.D.Study in USTC&MSRAKV-Direct:High-Performance Key-Value Store with Programmable NIC Microsoft Research Asia Published in SOSP’17,first author,instructed by Dr.Lintao Zhang May’16–Apr’17•World’s fastest key-value store for AI parameter server,graph computation and web caching.•Extends RDMA primitives to key-value operations,enabling remote direct key-value access to themain host memory.Also supports vector operations and user-defined functions.•Achieves up to180M key-value operations per second per programmble NIC,equivalent to thethroughput of20–30CPU cores.Built an1.2billion KV ops server with10FPGA NICs.•Leverages PCIe bandwidth efficiently and hide PCIe latency with optimized hash table,slab allocator,out-of-order execution,load dispatch and client-side batching.ClickNP:Highly Flexible Network Processing with FPGA Microsoft Research Asia Published in SIGCOMM’16,first author,instructed by Dr.Kun Tan July’15–Jan.’16•Designed for FPGA-based acceleration of Azure network virtualization platform.•The first FPGA-accelerated platform for general network functions,written completely in high-levellanguage and achieving40Gbps line rate as well as<2µs latency at any packet size.•Support high throughput(25Gbps)and low latency(1µs)joint CPU-FPGA processing.•Implement the ClickNP tool-chain,which can integrate with various commercial HLS tools.•Work with two undergraduates to design and implement100elements and5network functions.FPGA-based Bing Ranking DNN and HTTPS Accelerator Microsoft Research Asia Global2nd place in Cloud and Enterprise,Microsoft Hackathon2016;Most Impact Award in Beijing Venue,Microsoft Hackathon2017Apr.’16–Oct.’17•FPGA-based accelerator for deep neural networks in Bing Search Ranking.Leverage pipelineparallelism to store all parameters of dense layers in the SRAMs of distributed FPGA cluster toavoid swapping out to DRAM.Optimize DRAM and PCIe accesses for sparse layers.Resulting in5x performance for Bing Ranking.•FPGA-based accelerator for RSA crypto in HTTPS,serving10K+new connections per second witha single server,which is20x performance of Nginx web server.SocksDirect:Datacenter Sockets can be Fast and Compatible Microsoft Research Asia Published in SIGCOMM’19,first author;Global1st place in IT Pros category,Microsoft Hackathon;instructed by Dr.Lintao Zhang July’17–Jan’19•OS kernel consume∼80%CPU time in network communication for Web applications in a server.•We design and implement SocksDirect,a user-space high performance socket system fully compatiblewith existing socket applications.•SocksDirect leverages RDMA and shared memory(SHM)for interhost and intra-host communi-cation,respectively.SocksDirect achieves isolation by employing a trusted monitor daemon tohandle control plane operations such as connection establishment and access control.The dataplane is peer-to-peer between processes,in which we remove multi-thread synchronization,buffermanagement,large payload copy and process wakeup overheads in common cases.•SocksDirect achieves7∼20x better message throughput and17∼35x better latency than Linux socket,and reduces Nginx HTTP latency to1/5.5.Fast and Incremental Web Crawler USTC Personal Project Jan.’17–Oct.’17•A fast web crawler framework based on Scrapy with browser mimicking and rotating proxies.•Scrapes100M+webpages from40+websites within one month for a commerical project,resultingin a database of1TB+structured data.•Incremental updating mechanism to dynamically probe and update information from the websites. Publications(selected)1Pipe:Scalable Total Order Communication in Data Center NetworksBojie Li,Gefei Zuo,Wei Bai and Lintao ZhangProceedings of the2021ACM SIGCOMM Conference(SIGCOMM’21)AKG:Automatic Kernel Generation for Neural Processing Units using Polyhedral Transformations Jie Zhao,Bojie Li,Wang Nie,Zhen Geng,Renwei Zhang,Xiong Gao,Bin Cheng,Chen Wu,Yun Cheng, Zheng Li,Peng Di,Kun Zhang and Xuefeng JinProceedings of the42nd ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI’21)SocksDirect:Datacenter Sockets Can be Fast and CompatibleBojie Li,Tianyi Cui,Zibo Wang,Wei Bai and Lintao ZhangProceedings of the ACM Special Interest Group on Data Communication(SIGCOMM’19) KV-Direct:High-Performance In-Memory Key-Value Store with Programmable NICBojie Li,Zhenyuan Ruan,Wencong Xiao,Yuanwei Lu,Yongqiang Xiong,Andrew Putnam,Enhong Chen and Lintao ZhangProceedings of the26th ACM Symposium on Operating Systems Principles(SOSP’17) ClickNP:Highly Flexible and High-performance Network Processing with Reconfigurable Hardware Bojie Li,Kun Tan,Layong(Larry)Luo,Yanqing Peng,Renqian Luo,Ningyi Xu,Yongqiang Xiong,Peng Cheng and Enhong ChenProceedings of the2016ACM conference on SIGCOMM(SIGCOMM’16)Multi-Path Transport for RDMA in DatacentersYuanwei Lu,Guo Chen,Bojie Li,Kun Tan,Yongqiang Xiong,Peng Cheng,Jiansong Zhang,Enhong Chen and Thomas MoscibrodaProceedings of the15th USENIX Symposium on Networked Systems Design and Implementation(NSDI’18) Fast and Cautious:Leveraging Multi-path Diversity for Transport Loss Recovery in Data Centers Guo Chen,Yuanwei Lu,Yuan Meng,Bojie Li,Kun Tan,Dan Pei,Peng Cheng,Layong(Larry)Luo, Yongqiang Xiong,Xiaoliang Wang and Youjian ZhaoProceedings of the2016USENIX Annual Technical Conference(ATC’16)Professional ActivitiesMember,ACM ChinaSys Yong Committee(ACM ChinaSys青年委员会委员)Dec.’21–now Reviewer,ACM Transactions on Computer Systems(TOCS)June’20–now Teaching Assistant,Advanced Software Engineering course,MSRA Sep.’15–Jan.’16 Co-founder,USTC icourse.club(USTC评课社区联合创始人)(9K+users,23K+reviews)Feb.’15–now Founder,USTC Freeshell(USTC容器云平台创始人)(2K+users,4K+VMs)Feb.’13–Sep.’14Founder,USTC Blog(USTC博客托管平台创始人)(3K+blogs)Nov.’12–Sep.’14 Maintainer,USTC Open Source Mirrors(USTC开源软件镜像维护者)(1TB+traffic/month)May’12–May ’13Member,Gewu Digital Startup(科大格物物联创业团队成员，因选择读博而退出，公司后发展成为国仪量子)Jan.’13–July’13 President,Linux User Group,USTC(科大Linux用户协会会长)May’12–May’13 Founder and President,Technology Division,Student Union,Class of Gifted Young,USTC(科大少年班学院学生会技术部创始人和首任部长)May’11–May’12 President,Technology Division,Office of Publicity,Youth League,USTC(科大校团委网络工作办公室技术部首任部长)May’11–Jan.’12 Vice President,Gewu Zhizhi Student Club of Physics,USTC(科大格物致知社（物理学术社团）副会长) May’11–May’12Awards in HuaweiInnovation Spark Award(任总颁发的“难题揭榜”火花奖)(100/110000)Feb.’23 Presidential Team Award of2012Labs(2012实验室总裁团队奖)(1/40)Dec.’22 Huawei Central Software Institute Innovation Contest2nd prize(10/1300)Nov.’22 20Minutes Report to Executive Management Team(每月2名基层员工向公司最高管理团队EMT汇报，我是第42期)(84/200000)Aug.’22 Huawei Golden Individual Award(公司金牌个人奖)(1/100)Dec.’21 Huawei Golden Team Award(公司金牌团队奖)(1/40)Dec.’21 Huawei Central Software Institute Innovation Contest1st prize(2/650)Nov.’21 Huawei Central Software Institute Hackathon1st place(1/38)Oct.’21 Outstanding New Employee in2012Labs(1%)Aug.’20Awards in USTC&MSRAACM China Doctoral Dissertation Award(total2awardees)(ACM中国优秀博士学位论文奖，全国共2名) Dec.’19Chinese Academy of Sciences Presidential Scholarship(中国科学院院长奖，全国共400名)June’19 Outstanding Graduate in Anhui Province(安徽省品学兼优毕业生)(196/4233=4.6%in USTC)Apr.’19 Outstanding Graduate in USTC(中国科学技术大学优秀毕业生)Apr.’19 Microsoft Research Asia Fellowship Award(微软学者奖学金)(total10awardees in Asia)Oct.’17 China National Ph.D.Scholarship(博士生国家奖学金)Oct.’17 Global1st place in IT Pros Category,Microsoft Hackathon2017(1/200+)Aug.’17 Most Impact Award in Beijing Venue,Microsoft Hackathon2017(1/200+)Aug.’17 Best Presentation Award,MSRA Student Techfest2016(1/50+)Oct.’16 Global2nd place in Cloud and Enterprise,Microsoft Hackathon2016(2/1000+)Aug.’16 Microsoft Research Asia Young Fellowship Award(微软小学者奖学金)(total10awardees)Aug.’13 Outstanding Student Leader in USTC(中科大优秀学生干部)May’13 Outstanding Lecturer,Web Development Workshop,USTC(“网站开发讨论班”优秀讲师)Jan.’12 Best Innovation Award,USTC RoboGame Contest(中科大机器人大赛最佳创意奖)(1/52)Oct.’11Awards before Undergraduate StudyBronze Medal,National Olympiad in Informatics(NOI)2009(高中全国信息学竞赛全国铜牌)Jan.’09 First Prize,National Olympiad in Informatics in Hebei Province(NOIP)2008(高中全国信息学竞赛河北省一等奖)(rank2nd)Nov.’08 First Prize,National Olympiad in Mathematics in Hebei Province2009(高中全国数学竞赛河北省一等奖) (top10)Oct.’09 Top20in High School Entrance Exam,Shijiazhuang(石家庄市中考前20名)June’07First Prize(full score),National Olympiad in Informatics for Junior High School(初中全国信息学竞赛一等奖，满分)Oct.’06 Top10Students in Shijiazhuang Primary Schools(石家庄市十佳金童)Aug.’03 Merit Student in Shijiazhuang Primary Schools(石家庄市小学三好学生)Aug.’03 First Prize,The Hope Cup Mathematical Contest National Finals(“希望杯”少年数学邀请赛全国总决赛一等奖)Aug.’03 Gold Medal,Hua Luogeng Cup Mathematical Contest National Finals(“华罗庚金杯”少年数学邀请赛全国总决赛金牌)(National top10)May’03。
山脊住宅_浦那_印度
１２６世界建筑 ２００８／１２索纳尔・桑切蒂，拉胡尔・戈尔Ｓｏｎａｌ Ｓａｎｃｈｅｔｉ， Ｒａｈｕｌ ＧｏｒｅＯＰＯＬＩＳ是个年轻的设计事务所，在孟买和浦那从事城市设计、建筑和室内设计。
ＯＰＯＬＩＳ在过去的５年中多次获得ＩＩＡ和ＩＩＩＤ的青年建筑师奖。
２００７年，除了ＩＩＡ、ＪＫ混凝土奖和建筑设计奖之外，ＯＰＯＬＩＳ还获得了“Ａ＋Ｄ青年建筑师奖”。
他们的作品大量发表在印度重要的建筑和室内设计杂志上。
索纳尔・桑切蒂艾哈迈达巴德的环境设计和技术中心学习建筑学。
洛杉矶南加州建筑学院硕士学位。
印度建筑师学会会员，印度室内设计学会会员。
孟买建筑学院课座讲师。
２００１年１月成立ＯＰＯＬＩＳ。
拉胡尔・戈尔艾哈迈达巴德的环境设计和技术中心学习建筑学。
洛杉矶南加州建筑学院硕士学位。
２００１年１月成立ＯＰＯＬＩＳ。
过去的６年是城市设计研究所（ＵＤＲＩ）的执行委员。
２００３年世界天然气大会可持续城市设计国际竞赛上获奖的印度团队的成员。
□山脊住宅，浦那，印度HOUSE ON THE RIDGE, PUNE, INDIA, 2004建筑设计：ＯＰＯＬＩＳ建筑与规划设计事务所ＡＲＣＨＩＴＥＣＴＳ： ＯＰＯＬＩＳ Ａｒｃｈｉｔｅｃｔｕｒｅ ａｎｄ Ｕｒｂａｎ ＤｅｓｉｇｎＡ ｙｏｕｎｇ ｄｅｓｉｇｎ ｐｒａｃｔｉｃｅ ｄｏｉｎｇ ｕｒｂａｎ ｄｅｓｉｇｎ，ａｒｃｈｉｔｅｃｔｕｒａｌ ａｎｄ ｉｎｔｅｒｉｏｒ ｄｅｓｉｇｎ ｗｏｒｋ ｉｎ Ｍｕｍｂａｉ ａｎｄＰｕｎｅ． ＯＰＯＬＩＳ ｈａｓ ｗｏｎ ｓｅｖｅｒａｌ ａｗａｒｄｓ ｉｎ ｔｈｅ ＹｏｕｎｇＡｒｃｈｉｔｅｃｔｓ ｃａｔｅｇｏｒｙ ｏｆ ｔｈｅ ＩＩＡ Ａｗａｒｄｓ ａｎｄ ｔｈｅ ＩＩＩＤＡｗａｒｄｓ ｆｏｒ ｔｈｅ ｐａｓｔ ｆｉｖｅ ｙｅａｒｓ． Ｉｎ ｔｈｅ ｙｅａｒ ２００７，ＯＰＯＬＩＳ ｗｏｎ ｔｈｅ “Ａ＋Ｄ Ｙｏｕｎｇ Ｅｎｔｈｕｓｅｄ ＡｒｃｈｉｔｅｃｔＡｗａｒｄ” ｉｎ ａｄｄｉｔｉｏｎ ｔｏ ｔｈｅ ＩＩＡ， ＪＫ Ｃｅｍｅｎｔ ａｎｄ Ａｒｃｈｉ－ｄｅｓｉｇｎ Ａｗａｒｄｓ． Ｔｈｅ ｗｏｒｋ ｈａｓ ｂｅｅｎ ｗｉｄｅｌｙ ｐｕｂｌｉｓｈｅｄ ｉｎｌｅａｄｉｎｇ Ａｒｃｈｉｔｅｃｔｕｒａｌ ａｎｄ Ｉｎｔｅｒｉｏｒ ｍａｇａｚｉｎｅｓ ｉｎ Ｉｎｄｉａ．Ｓｏｎａｌ ＳａｎｃｈｅｔｉＳｔｕｄｉｅｄ ａｒｃｈｉｔｅｃｔｕｒｅ ａｔ Ｃｅｎｔｅｒ ｆｏｒ ＥｎｖｉｒｏｎｍｅｎｔａｌＰｌａｎｎｉｎｇ ａｎｄ Ｔｅｃｈｎｏｌｏｇｙ （ＣＥＰＴ） ｉｎ Ａｈｍｅｄａｂａｄ ａｎｄ ｈｅｒＭａｓｔｅｒｓ Ｐｒｏｇｒａｍ ａｔ ｔｈｅ Ｓｏｕｔｈｅｒｎ Ｃａｌｉｆｏｒｎｉａ Ｉｎｓｔｉｔｕｔｅ ｏｆＡｒｃｈｉｔｅｃｔｕｒｅ， Ｌｏｓ Ａｎｇｅｌｅｓ （ＳＣＩ－Ａｒｃ）． Ｓｈｅ ｉｓ ｔｈｅ ＡｓｓｏｃｉａｔｅＭｅｍｂｅｒ ｏｆ ｔｈｅ Ｉｎｄｉａｎ Ｉｎｓｔｉｔｕｔｅ ｏｆ Ａｒｃｈｉｔｅｃｔｓ （ＩＩＡ） ａｎｄ ａｍｅｍｂｅｒ ｏｆ ｔｈｅ Ｉｎｄｉａｎ Ｉｎｓｔｉｔｕｔｅ ｏｆ Ｉｎｔｅｒｉｏｒ Ｄｅｓｉｇｎｅｒｓ（ＩＩＩＤ） ａｎｄ ｔｅａｃｈｅｓ ａｓ ｖｉｓｉｔｉｎｇ ｆａｃｕｌｔｙ ａｔ ｔｈｅ Ａｃａｄｅｍｙ ｏｆＡｒｃｈｉｔｅｃｔｕｒｅ ｉｎ Ｍｕｍｂａｉ． Ｓｅｔ ｕｐ ＯＰＯＬＩＳ ｉｎ Ｊａｎｕａｒｙ ２００１．ＲａｈｕｌＧｏｒｅＳｔｕｄｉｅｄ ａｒｃｈｉｔｅｃｔｕｒｅ ａｔ Ｃｅｎｔｅｒ ｆｏｒ ＥｎｖｉｒｏｎｍｅｎｔａｌＰｌａｎｎｉｎｇ ａｎｄ Ｔｅｃｈｎｏｌｏｇｙ （ＣＥＰＴ） ｉｎ Ａｈｍｅｄａｂａｄ ａｎｄ ｈｉｓＭａｓｔｅｒｓ Ｐｒｏｇｒａｍ ｉｎ Ｕｒｂａｎ Ｄｅｓｉｇｎ ａｔ ｔｈｅ Ｕｎｉｖｅｒｓｉｔｙ ｏｆＣａｌｉｆｏｒｎｉａ Ｌｏｓ Ａｎｇｅｌｅｓ （ＵＣＬＡ）． Ｓｅｔ ｕｐ ＯＰＯＬＩＳ ｉｎ Ｊａｎｕａｒｙ２００１． Ｈｅ ｈａｓ ｂｅｅｎ ｏｎ ｔｈｅ Ｅｘｅｃｕｔｉｖｅ Ｃｏｍｍｉｔｔｅｅ ｏｆ ＵＤＲＩ（Ｕｒｂａｎ Ｄｅｓｉｇｎ Ｒｅｓｅａｒｃｈ Ｉｎｓｉｔｉｕｔｅ） ｆｏｒ ｔｈｅ ｐａｓｔ ｓｉｘ ｙｅａｒｓ．Ｍｏｒｅ ｒｅｃｅｎｔｌｙ ｐａｒｔ ｏｆ ｔｈｅ ａｗａｒｄ ｗｉｎｎｉｎｇ Ｉｎｄｉａｎ ｔｅａｍ ｔｈａｔｗｏｎ ｉｎｔｅｒｎａｔｉｏｎａｌ ａｃｃｌａｉｍ ａｔ ｔｈｅ Ｉｎｔｅｒｎａｔｉｏｎａｌ Ｕｒｂａｎ ＤｅｓｉｇｎＣｏｍｐｅｔｉｔｉｏｎ ｆｏｒ ｔｈｅ Ｄｅｓｉｇｎ ｏｆ Ｓｕｓｔａｉｎａｂｌｅ Ｃｉｔｉｅｓ ｈｏｓｔｅｄ ｂｙＪａｐａｎ ａｔ ｔｈｅ Ｗｏｒｌｄ Ｇａｓ ｃｏｎｆｅｒｅｎｃｅ ｉｎ Ｊｕｎｅ ２００３．□１２３浦那：印度建筑片段／ＰＵＮＥ： Ａ ＳＬＩＣＥ ＯＦ ＩＮＤＩＡＮ ＡＲＣＨＩＴＥＣＴＵＲＥ该项目位于浦那附近Ｋｈａｄａｋｖａｓｌａ地区山脉的迎风面，海拔将近１２０ｍ。
某地二层别墅建筑CAD设计施工图
外贸中常见英文缩略词
外贸中常见英文缩略词1 C2 T/T（telegraphic transfer）电汇3 D/P（document against payment）付款交单4 D/A （document against acceptance）承兑交单5 C.O （certificate of origin）一般原产地证6 G.S.P.（generalized system of preferences）普惠制7 CTN/CTNS（carton/cartons）纸箱8 PCE/PCS（piece/pieces）只、个、支等9 DL/DLS（dollar/dollars）美元10 DOZ/DZ（dozen）一打11 PKG（package）一包，一捆，一扎，一件等12 WT（weight）重量13 G.W.（gross weight）毛重14 N.W.（net weight）净重15 C/D （customs declaration）报关单16 EA（each）每个，各17 W （with）具有18 w/o（without）没有19 FAC（facsimile）传真20 IMP（import）进口21 EXP（export）出口22 MAX （maximum）最大的、最大限度的23 MIN （minimum）最小的，最低限度24 M 或MED （medium）中等，中级的25 M/V（merchant vessel）商船26 S.S（steamship）船运27 MT或M/T（metric ton）公吨28 DOC （document）文件、单据29 INT（international）国际的30 P/L （packing list）装箱单、明细表31 INV （invoice）发票32 PCT （percent）百分比33 REF （reference）参考、查价34 EMS （express mail special）特快传递35 STL.（style）式样、款式、类型36 T或LTX或TX（telex）电传37 RMB（renminbi）人币38 S/M （shipping marks）装船标记39 PR或PRC（price）价格40 PUR （purchase）购买、购货41 S/C（sales contract）销售确认书42 L/C （letter of credit）信用证43 B/L （bill of lading）提单44 FOB （free on board）离岸价45 CIF （cost,insurance补充：CR=credit贷方，债主DR=debt借贷方（注意：国外常说的debt card，就是银行卡，credit card就是信誉卡。
北美地区微型木结构房屋的发展现状(二)结构与设计
尔建ih €!EWood Architecture Field图2.典型微型木结构房屋平面布局LOFT FLOOR PLAN阁楼平面图（照片来源:Zipkithomes ）北美地区微型木结构房屋的发展现状(二):结构与设计■张岱远 1,2/Zhang Daiyuan / 龚蒙2 / Gong Meng /(1南京林业大学材料科学与工程学院，中国南京「新不伦瑞克大学木材科技中心，加拿大弗雷德里克顿)摘要：本文对北美地区微型木结构房屋的市场现状进行了总结，分析了典型企业的经营思路和设计方向，对移动式和固定 式两种微型木结构房屋的结构和用材进行了调研分析。
随后通过搜集50个微型木结构房屋的室内平面布局图对现有的微型木结构房屋的室内设计进行归纳分析，总结了目前微型木结构房屋设计中空间布局的规律，如厨房柜体数量、客厅和卧室常见位置等。
最后本文从不同目标用户的使用需求、控制建造成本和提高空间利用率的角度对微型木结构房屋的室内设计提出了一些改进思路，比如针对无家可归人群的微型木结构房屋的适用面积应该控制在13 m 2(139 ft 2)以内。
再比如阁楼区域高度的设计应参照男性坐姿身高第95百分位是0.99 m(3 ft 3 in),将微型房屋的主要区域层高定为2.10 m(6 ft 11 in),阁楼层高定为1.60 m(5 ft 3 in), 即总层高 3.00 mm(10 ft 6 in)等。
关键字:北美地区，微型房屋，木结构，设计分析4■背量介绍经过21世纪初的“小房屋”运动的推动和受2008年次贷危机的影响，微型木结构房屋在北美地区已经拥有了大量 的拥护者，越来越多的公司和个人进入微型木结构房屋的市 场。
目前微型木结构房屋的主要结构形式还是以轻型木结构为主(图1),大量的个人工作室和小型公司采用以手工为主 的加工方式制作微型木结构房屋，在YouTube 网站上有大量微型木结构房屋的建造视频，同时一些微型木结构房屋也已经出现在各种展会上。
中国国际建筑艺术实践展四号住宅_南京
154建筑设计 / Design Team ：张雷、Jeffrey Cheng、王旺、王昳 / Zhang Lei, Jeffrey Cheng, Wang Wang, Wang Yi 设计合作/ Collaborator ：南京大学建筑规划设计研究院（施工图设计合作） / Architectural Design & Planning Institute, Nanjing University 建筑面积 / Floor Area ：500m 2设计时间 / Design ：2008.11建成时间 / Completion ：2011.04中国国际建筑艺术实践展四号住宅南京CiPea no.4 house, nanjing2011Copyright ©博看网. All Rights Reserved.155Situated in Laoshan Forest to the west of central Nanjing, ChinaInternational Practical Exhibition of Architecture (CIPEA) began in 2003 to bring twenty-four renowned international architects together onto one site. CIPEA is divided into four public buildings and twenty small houses, and in accordance with the brief, the small houses are to incorporate not fewer than five bedrooms, public spaces, and hospitality accommodations on 500 square metres.The Number Four “Blockhouse” sits on a particularly dramatic valley site, nestling the house into the landscape. In the spirit of a pagoda, four cubic floors are stacked vertically, allowing for minimal site excavation and land use. Each floor features living and dining spaces quietly enveloped in the surrounding forest and overlooking a stream, and a communal roof terrace rises to just above the trees. The roof merges into the landscape as another living space, complete with wooden deck and pool within the panorama of the forest. The geometric shape is sculpted from concrete and finished in a white protection surface.The concept of Blockhouse is almost the living attitude of many Chinese: a minimal opening to the surrounding landscape is the only perforation of the richness inside the house. The horizontal break of each floor—in combination with larger unique curved apertures on each floor—frame vistas in the spirit of Chinese landscape scrolls. Prescribed views have a long tradition in Chinese art history and traditional Chinese gardens, designed to make the viewer reconsider and contemplate the landscape.中国国际建筑艺术实践展（CIPEA）坐落在南京浦口老山森林公园附近的佛手湖畔，项目邀请了来自中国和世界各地的24位建筑师参与设计，其内容包括四幢公共建筑和二十幢小住宅。
2024-2025学年广东省三校决胜高考,梦圆乙巳第一次联考英语试题及答案
绝密★启用前2024-2025学年度上学期广东省三校“决胜高考，梦圆乙巳”第一次联合模拟考试参加学校：诺德安达学校、金石实验中学、英广实验学校学校:___________姓名：___________班级：___________考号：___________注意事项:1.答卷前，考生务必将自己的姓名、准考证号填写在答题卡上。
2.回答选择题时，选出每小题答案后，请2B用铅笔把答题卡对应题目的答案标号涂黑；如需改动，用橡皮擦干净后，再选涂其他答案标号。
回答非选择题时，将答案写在答题卡上，写在试卷上无效。
3.考试结束后，本试卷和答题卡一并交回。
一、阅读理解：本大题共15小题，共37.5分。
ASTUDENT COUNCIL MEETING AGENDAThe Student Council is committed to fostering a collaborative and proactive environment within our school community. Our meetings are designed to address critical issues, plan strategic initiatives, and promote student engagement across various domains.MEETING STRUCTURE AND OBJECTIVES The Student Council meetings will delve into complex topics, requiring participants to engage in thoughtful discussions and propose innovative solutions. We aim to enhance the educational experience, address student concerns, and develop leadership skills among our members.GROUP PARTICIPATION Groups interested in joining the council's discussions must consist of at least five members and should make arrangements in advance. Review the 'Strategic Initiatives List' and complete the 'Group Participation Form' to secure your spot.ELIGIBILITY, PREPARATION, AND MATERIALS•Volunteers of any age are welcome, but special guidelines apply for those under 15. Please refer to the 'Youth Involvement Policy'.•All participants must submit a completed 'Council Participation Agreement Form'. Minors require parental/guardian consent.•Council meetings are held regardless of weather conditions. Dress appropriately for a professional setting and be prepared for a full day of engagement.•Bring a personal notepad, laptop or tablet for note-taking, and any relevant research materials.•No prior experience is necessary. Guidance and resources will be provided to meet the council's objectives and fulfill any leadership or service requirements.SCHEDULE OF UPCOMING MEETINGSTime Meeting LocationJan. 15, 10am School LibraryJan. 22, 10am AuditoriumJan. 29, 9am Student Council Room1.What is the primary objective of the Student Council meetings?A. To explore new educational theories.B. To enhance school facilities.C. To advocate for student welfare.D. To organize social events.2.What is the minimum age requirement for active participation in the Student Council?A. 5 years old.B. 10 years old.C. 15 years old.D. 18 years old.3.What are the expectations from the volunteers attending the Student Council meetings?A. To provide their own research materials.B. To actively participate in discussions regardless of the meeting duration.C. To wear a designated uniform.D. To lead at least three initiatives.BINTEGRATIVE ACUPUNCTURE IN CHINESE MEDICINE"I am not delusional," declares Dr. Li Ming, after treating a patient with traditional Chinese acupuncture. "I am pioneering a new frontier." Despite the skepticism from some peers, Dr. Li remains undeterred by their occasional ridicule. He stands among a select group of Chinese medical practitioners who are embracing an integrative approach to healing—melding the wisdom of ancient Chinese medicine with modern medical science.Dr. Li, an alumnus of Beijing University of Chinese Medicine, initially pursued a more conventional path in his medical career. His journey towards alternative therapies began two decades ago when he was plagued by severe back pain. Conventional treatments offered him little respite. It was through acupuncture, an age-old Chinese medical technique, that he found remarkable improvement after just a few sessions. This personal experience inspired him to explore its potential for his patients. After years of dedicated study and practice, he started integrating these methods into his treatments.Consider the case of Zhang Wei's father, who suffered from chronic migraines. Zhang was at the brink of despair, ready to concede to the relentless pain, but Dr. Li's integrative approach not only alleviated his symptoms but also significantly improved his quality of life. Similarly, Chen Yu recounts how her mother, after a stroke, regained mobility and speech function following a series of acupuncture sessions.Dr. Li is convinced that the integrative approach to acupuncture will gain broader acceptance, and historical trends seem to support his optimism: Since the establishment of the Chinese Association for Integrative Medicine in 1990, its membership has surged from a handful to thousands. "The profound effectiveness of this integrative practice sometimes astonishes even me," Dr. Li admits. "I am committed to exploring every avenue to aid my patients. That is the essence of my vocation."4.What is the opinion of some of Dr. Li's colleagues regarding his methods?A. They consider him unconventional.B. They perceive him as overly strict.C. They admire his courage.D. They find him impolite.5.What motivated Dr. Li to explore acupuncture for his patients?A. His academic training in acupuncture.B. The influence of a fellow practitioner.C. His personal benefits from acupuncture.D. A desire to reduce medical costs for patients.6.What is the main focus of paragraph 3?A. The procedural details of acupuncture treatment.B. The intricacies involved in a medical practitioner's work.C. The rarity of certain diseases in patients.D. The tangible benefits of integrative medicine.7.Why does the author refer to the Chinese Association for Integrative Medicine?A. To validate Dr. Li's perspective.B. To highlight the association's significance.C. To commend the dedication of medical practitioners.D. To promote the cause of patient advocacy.CPARIS 2024 OLYMPIC GAMES VENUE DESIGN"Innovation is not just about technology; it's about the human experience," says Jean-Michel Wilmotte, the lead architect for the Paris 2024 Olympic Games. "We are crafting spaces that will be etched in the collective memory." His vision is to create venues that are not only functional but also a testament to the spirit of the Games. Yet, the path to realizing this vision is fraught with challenges, as it requires balancing aesthetics with sustainability and legacy.Wilmotte, renowned for his work that blends modernity with tradition, is faced with the task of designing venues that will host the world's most sporting event. His approach is to reimagine the urban landscape, creating spaces that are both iconic and adaptable, ensuring they serve Paris beyond the Games.The design process for the Olympic venues is a complex interplay of form and function. The benefits of thoughtful architectural design are particularly evident when the focus shifts from simple structures to those that demand a higher level of conceptual integration—such as venues that can be repurposed for community use post-Games.The differences in the design of traditional stadiums and the innovative venues for Paris 2024 are partly related to the physical properties of the materials and the spatial arrangement. With the new venues, there is a tactile quality to the spaces, along with a visual narrative that tells the story of the Games and the city's heritage.But equally important is the conceptual aspect. The design team has proposed a theory of "spatial engagement," suggesting that the venues should not only accommodate events but also engage visitors in a dialogue with the city and its culture.While the allure of new technology is undeniable, and many are tempted to rely solely on digital renderings andsimulations, the tangible experience of the spaces cannot be replicated. Architects have found that when people physically engage with a space, they form a deeper connection and memory of the event.The Paris 2024 venues, with their integration of technology, art, and architecture, all play a role in shaping the Olympic experience. However, for creating an environment where the spirit of the Games is fully realized and the legacy is meaningful, the design team must not assume that all design approaches are equivalent, even when they aim to achieve the same objectives.8.What does the phrase "shine through" in paragraph 2 imply?A. The benefits are short-lived.B. The benefits are difficult to articulate.C. The benefits become readily apparent.D. The benefits are ready for implementation.9.What does the "spatial engagement" theory assume?A. Venues should be treated as simple containers for events.B. Venues are easy to understand in terms of their design.C. People choose venues randomly based on their design.D. Venues should engage visitors in a meaningful way.10.Why are technological tools increasingly used in the design process?A. They can capture the public's imagination.B. They are more convenient to use in the design phase.C. They help develop more advanced architectural solutions.D. They provide more information than traditional design methods.11.What does the author imply in the last paragraph?A. Multiple design approaches should be considered.B. Designers should create their own unique materials.C. Traditional design methods cannot be entirely replaced.D. The importance of experiential learning in design should not be overlooked.DIn the quest to understand and compare the educational paradigms shaping the minds of future generations, researchers have delved into the intricate dynamics of Chinese and Western pedagogical approaches. Today, thediscourse on education systems is often framed by ideological debates and cultural perspectives. Yet, a new comprehensive study aims to dissect these systems beyond surface-level observations, exploring the underlying philosophies and their impact on students."With the proliferation of educational theories, it is crucial for us to examine the core principles that drive different educational systems," said Dr. Li Wei, lead author of the study and a professor of comparative education at the University of Beijing. "These systems now influence the lives of millions of students worldwide, and as we increasingly rely on them to shape the minds of our youth, I wanted to know: How do they compare?"Using a diverse set of educational case studies and outcomes from various countries, Dr. Li and her team scrutinized the effectiveness and philosophical underpinnings of Chinese and Western education systems."We were particularly interested in identifying the factors that contribute to the distinct characteristics of each system, such as the emphasis on rote learning in some cultures versus the focus on critical thinking in others," said Dr. Li.Their study revealed that the educational outcomes are not solely determined by the amount of content covered but also by the pedagogical approach. Moreover, these systems are biased towards certain types of learners and intellectual development. This is expected since the educational systems are often a reflection of the cultural values and societal expectations of the regions they serve.What can we learn from the comparative analysis of these educational systems?"A great deal," Dr. Li explained. "Educational policymakers can use our study to inform the development of curricula that balance the need for knowledge retention with the cultivation of critical thinking skills. To improve the adaptability of educational systems, we can also encourage the incorporation of diverse teaching methods that cater to a range of learning styles."QUESTIONS FOR REFLECTION12.What do we know about the current state of educational records and observations?A. They are becoming outdated.B. They are mostly based on theoretical models.C. They are limited in scope.D. They are used for comparative analysis.13.What does Dr. Li's study focus on?A. Teaching methodologies.B. Educational infrastructure.C. Observational data.D. Student performance metrics.14.What has led to the differences between the Chinese and Western education systems according to thestudy?A. Cultural and historical factors.B. Technological advancements.C. Economic disparities.D. Government policies.15.What is Dr. Li's suggestion for improving educational systems?A. Integrate more technology into classrooms.B. Standardize curriculums across different regions.C. Provide guidance to educators on diverse teaching methods.D. Focus on a single pedagogical approach for all subjects.二、阅读七选五：本大题共5小题，共12.5分。
室内设计英语常用词汇(个人收集).之欧阳歌谷创编
室内设计英语常用词汇欧阳歌谷（2021.02.01）标签：室内设计英语常用词汇方案：Design[di'zain], Scheme[ski:m]初步设计：Primary['praiməri] Design施工图CD: Construction[kən'strʌkʃən] DesignFunction ['fʌŋkʃən] 功能区Light['lait] 灯具Droplight ['drɔplait]吊灯ceiling['si:liŋ]light吸顶灯Entrance ['entrəns] 入口Living ['liviŋ] room 客厅Sitting['sitiŋ] room 起居室Embed[im'bed]light 嵌灯Dinning room 餐厅Daylight lamp[læmp] 日光灯Kitchen['kitʃin]厨房Reflect[ri'flekt] down light 筒灯Office 书房Quartz kwɔ:ts]down-light 石英灯Master['mɑ:stə]bedroom 主卧房voltage['vəultidʒ]track[træk] light 射灯Quest[kwest] bedroom 客卧Track light 轨道灯Children bedroom 儿童房Picture light 镜画灯Hiding['haidiŋ] light 暗藏灯管Projection[prə'dʒekʃən] room 视听室Dressing room 更衣室Wall lamp[læmp]壁灯Storeroom ['stɔ:rum, -ru:m]储藏室Reading lamp 台灯Master['mɑ:stə, 'mæstə] bathroom 主卫Floor lamp 落地灯Bathroom ['bɑ:θrum]卫生间Bathroom fixture['fikstʃə]卫生洁具Wash room 洗衣房Staircase['stεəkeis]楼梯Washbowl ['wɔʃbəul, 'wɔ:ʃ-]洗手台[台盆]Aisle [ail]过道Water faucet['fɔ:sit]水龙头Closestool['kləusstu:l]座便器Gazebe[ɡə'zi:bəu]阳台Urinal['juərinəl]小便斗Garden ['ɡɑ:dn]花园Bathtab ['bɑ:θtʌb]浴缸Swimming pool[pu:l]游泳池Shower['ʃauə]bath [b淋浴房Furniture['fə:nitʃə]家具Wiring['waiəriŋ]电器设备Cupboard ['kʌbəd]厨房橱柜Television['teli,viʒən, ,teli'v-]电视机Drink box 酒柜Sound[saund] box 音响Bar 吧台Washer 洗衣机Dinning table 餐桌Bedstand['bedstænd]床头柜Bed 床Bookcase 书柜Chest[tʃest] of drawers[drɔ:z]五斗矮柜Electrical [i'lektrik(ə)l] outlet['autlet, -lit]插座Chest of drawers 藏衣柜Switch [switʃ]开关TV set 电视柜Air-condition [kən'diʃən]空调Tea table 茶几Immersion [i'mə:ʃən] heater ['hi:tə]电热水壶Sofa 沙发Electric[i'lektrik]cooker['kukə]电饭褒Reclining chair 躺椅Macrowave['maikrəuweiv]oven['ʌvən微波炉Chair 椅子Refrigeratory [ri'fridʒərətəri]冰箱American interior [in'tiəriə]design; 美国室内设计American interior designer; 美国室内设计师Residential [,rezi'denʃəl] design; 私家住宅设计；Villa ['vilə]design (single family home design); 别墅设计；Office design; 办公室设计；Commercial[kə'mə:ʃəl]design; 非住宅设计（商务楼设计；写字楼设计；公共场所设计）Californian[,kæli'fɔ:njən]interior design; 加州室内设计Californian interior designer; 加州室内设计师Model ['mɔdəl] home design; 样板房设计Clubhouse ['klʌb,haus] interior design;会所室内设计American furniture['fə:nitʃə] design;美国家具设计Foreign interior design; 外国室内设计Foreign interior designer; 外国室内设计师PLAN[plæn]—设计方案Interior design –室内设计Exterior[ik'stiəriə]室外Landscape ['lændskeip]design –景观设计Architecture['ɑ:kitektʃə]design –建筑设计designer –设计师baseplan –基础建筑图floor plan –平面图elevation[,eli'veiʃən] -立面图RCP = 天花吊顶设计= Reflected[ri'flektid]Ceiling['si:liŋ] Planelectric[i'lektrik] plan = 电线走线图furniture['fə:nitʃə]plan –家具布置平面图interior plant[plɑ:nt, plænt]plan –室内植物摆放图window schedule['ʃədju:əl, -dʒu:əl, 'skedʒu:əl, -dʒuəl]–窗表door schedule –门表Chair Rail[reil]–挡椅线也可以叫做腰线Picture rair –挂镜线Baseboard ['beisbɔ:d]–踢脚Tub[tʌb] = 浴缸Mill work pull[pul]= 橱柜门拉手towel ['tauəl, taul]rack[ræk] = 毛巾架area rug[rʌɡ]装饰地毯（块）carpet['kɑ:pit]地毯（满铺房间）corbel ['kɔ:bəl]整梁承材coat [kəut]hook[huk]挂衣架crown[kraun]moulding ['məuldiŋ]天花线条coffer ['kɔfə]藻井ceramic[si'ræmik][tail]cladding['klædiŋ]包覆瓷砖counter ['kauntə]台面door pull门拉手double['dʌbl]passage ['pəsidʒ]door 双门drawer [drɔ:]pull 抽屉拉手exterior[ik'stiəriə]tile [tail]flooring ['flɔ:riŋ]室外地砖faucet ['fɔ:sit]龙头flush[flʌʃ]mount [maunt]lighting['laitiŋ吸顶灯grout [ɡraut]勾缝剂hinge [hindʒ]合页locker ['lɔkə]s锁laminate ['læmineit]复合板台面lighting fixture['fikstʃə]灯具lavatory['lævətəri, -,tɔ:ri]/sink [siŋk]水盆medallion [mi'dæljən]地板拼花mirror ['mirə]镜子paint [peint] -walls墙漆ceiling['si:liŋ]paint [peint]天花板乳胶漆partition [pɑ:'tiʃən]隔板屏风plaster['plɑ:stə, 'plæs-]moulding ['məuldiŋ]石膏线recessed [ri'sest] light嵌灯埋地灯RECESSED LIGHT IN cabinet ['kæbinit]橱柜嵌灯stone[stəun slab[slæb]石板soap[səup]dispenser[dis'pensə]肥皂盒semi['sem(a)i]flush[flʌʃ]mount [maunt] T 半吸顶灯shower head['ʃauəhed] and handles淋浴莲蓬头和把手showersoap[səup]dispenser [dis'pensə]淋浴间肥皂盒single['siŋɡl]passage ['pæsidʒ]door 单门stacked[stækt]stone [stəun]cladding['klædiŋ]文化石包覆stone [stəun]tile walls 墙面石材wood stain[stein]木染色剂stain[stein]–着色woodtruss [trʌs]–木桁梁stone[stəun]baseboard ['beisbɔ:d]石材踢脚stone [stəun]crown [kraun]石材装饰线step[step]/riser['raizə]light楼梯踏步灯towel ['tauəl, taul] bar毛巾杆toilet['tɔilit]seat[si:t]covers座便器坐垫tile[tail]flooring['flɔ:riŋ]瓷砖地板tongue[tʌŋ]and groove[gru:v]拼装towel ['tauəl, taul] hook毛巾架threshold['θreʃhəuld]门槛toilet['tɔilit]paper ['peipə]holder['həuldə]卷筒纸架trash[træʃ]receptacle[ri'septəkl]废料桶垃圾桶urinal ['juərinəl]小便器veneer [və'niə]面板Venetian[vi'ni:ʃən]plaster ['plɑ:stə]威尼斯石膏Venetian[vi'ni:ʃən]plaster ['plɑ:stə]-ceiling['si:liŋ]威尼斯石膏–天花板water ['wɔ:tə]closet ['klɔzit/toilet ['tɔilit]厕所applied[ə'plaid]wood [wud]moulding['məuldiŋ]粘贴木线wood [wud]beam [bi:m]木梁wood[wud]cladding['klædiŋ] -walls木板包覆wood[wud]flooring['flɔ:riŋ]木地板wood[wud]partition[pɑ:'tiʃən]木隔板wrought [rɔ:t]iron ['aiən铁艺wall mural ['mjuərəl]壁画wall sconce [skɔns]壁灯设计英语常用词汇enclosure 围栏void 空间，虚体edifice 大厦，体系aisle 走廊nave （教堂）的正厅chapel 教堂cathedral 大教堂balustrade 栏杆colonnade 柱廊ornament 装饰tensile 空的housing 住房quarters 住宅neighborhood 住宅小区single-family 独户的hallway 门厅tenenment 住房terrace 露台wing 厢房hip 屋脊balcony 阳台。
室内设计英语常用词汇(个人收集).
室内设计英语常常使用词汇之袁州冬雪创作标签：室内设计英语常常使用词汇方案：Design[di'zain], Scheme[ski:m]初步设计：Primary['praiməri] Design施工图CD: Construction[kən'strʌkʃən] DesignFunction ['fʌŋkʃən] 功能区Light['lait] 灯具Droplight ['drɔplait]吊灯ceiling['si:liŋ]light 吸顶灯Entrance ['entrəns] 入口Living ['liviŋ] room 客堂Sitting['sitiŋ]room 起居室Embed[im'bed]light 嵌灯Dinning room 餐厅Daylight lamp[læmp] 日光灯Kitchen['kitʃin]厨房Reflect[ri'flekt] down light 筒灯Office 书房Quartz kwɔ:ts]down-light 石英灯Master['mɑ:stə]bedroom 主卧房voltage['vəultidʒ] track[træk] light 射灯Quest[kwest] bedroom 客卧Track light 轨道灯Children bedroom 儿童房Picture light 镜画灯Hiding['haidiŋ]light 隐藏灯管Projection[prə'dʒekʃən] room 视听室Dressing room 更衣室Wall lamp[læmp]壁灯Storeroom ['stɔ:rum, -ru:m]储藏室Reading lamp 台灯Master['mɑ:stə,'mæstə] bathroom 主卫Floor lamp 落地灯Bathroom ['bɑ:θrum]卫生间Bathroomfixture['fikstʃə]卫生洁具Wash room 洗衣房Staircase['stεəkeis]楼梯Washbowl ['wɔʃbəul, 'wɔ:ʃ-]洗手台[台盆]Aisle [ail]过道Water faucet['fɔ:sit]水龙头Closestool['kləusstu:l]座便器Gazebe[ɡə'zi:bəu]阳台Urinal['juərinəl]小便斗Garden ['ɡɑ:dn]花园Bathtab ['bɑ:θtʌb]浴缸Swimming pool[pu:l]游泳池Shower['ʃauə]bath [b淋浴房Furniture['fə:nitʃə]家具Wiring['waiəriŋ]电器设备Cupboard ['kʌbəd]厨房橱柜Television['teli,viʒən , ,teli'v-]电视机Drink box 酒柜Sound[saund] box 音响Bar 吧台Washer 洗衣机Dinning table 餐桌Bedstand['bedstænd]床头柜Bed 床Bookcase 书柜Chest[tʃest]of drawers[drɔ:z]五斗矮柜Electrical[i'lektrik(ə)l]outlet['autlet, -lit]插座Chest of drawers 藏衣柜Switch [switʃ]开关TV set 电视柜Air-condition [kən'diʃən]空调Tea table 茶几Immersion [i'mə:ʃən] heater ['hi:tə]电热水壶Sofa 沙发Electric[i'lektrik] cooker['kukə]电饭褒Reclining chair 躺椅Macrowave['maikrəuweiv]oven['ʌv ən微波炉Chair 椅子Refrigeratory[ri'fridʒərətəri]冰箱American interior [in'tiəriə]design; 美国室内设计American interior designer; 美国室内设计师Residential[,rezi'denʃəl] design; 私家住宅设计；Villa ['vilə]design (single family home design); 别墅设计；Office design; 办公室设计；Commercial[kə'mə:ʃəl ]design; 非住宅设计（商务楼设计；写字楼设计；公共场合设计）Californian[,kæli'fɔ:n jən]interior design; 加州室内设计Californian interior designer; 加州室内设计师Model ['mɔdəl] home design; 样板房设计Clubhouse ['klʌb,haus] interior design;会所室内设计American furniture['fə:nitʃə] design;美国家具设计Foreign interior design; 外国室内设计Foreign interior designer; 外国室内设计师PLAN[plæn]—设计方案Interior design –室内设计Exterior[ik'stiəriə]室外Landscape['lændskeip]design –景观设计Architecture['ɑ:kitektʃə] design –建筑设计designer –设计师baseplan –基础建筑图floor plan –平面图elevation[,eli'veiʃən] -立面图RCP = 天花吊顶设计=Reflected[ri'flektid] Ceiling['si:liŋ] Plan electric[i'lektrik] plan = 电线走线图furniture['fə:nitʃə] plan –家具安插平面图interior plant[plɑ:nt, plænt] plan –室内植物摆放图windowschedule['ʃədju:əl, -dʒu:əl, 'skedʒu:əl, -dʒuəl]–窗表door schedule –门表Chair Rail[reil]–挡椅线也可以叫做腰线Picture rair –挂镜线Baseboard ['beisbɔ:d]–踢脚Tub[tʌb] = 浴缸Mill work pull[pul]= 橱柜门拉手towel ['tauəl, taul] rack[ræk] = 毛巾架area rug[rʌɡ]装饰地毯（块）carpet['kɑ:pit]地毯（满铺房间）corbel['kɔ:bəl]整梁承材coat [kəut]hook[huk]挂衣架crown[kraun]moulding ['məuldiŋ]天花线条coffer ['kɔfə]藻井ceramic[si'ræmik]tile[tail]cladding ['klædiŋ]包覆瓷砖counter ['kauntə]台面door pull门拉手double['dʌbl]passage ['pəsidʒ]door 双门drawer[drɔ:]pull 抽屉拉手exterior[ik'stiəriə]tile[tail]flooring['flɔ:riŋ]室外地砖faucet ['fɔ:sit]龙头flush[flʌʃ]mount [maunt]lighting['laitiŋ吸顶灯grout [ɡraut]勾缝剂hinge [hindʒ]合页locker ['lɔkə]s锁laminate['læmineit]复合板台面lightingfixture['fikstʃə]灯具lavatory['lævətəri, -,tɔ:ri]/sink[siŋk]水盆medallion[mi'dæljən]地板拼花mirror ['mirə]镜子paint[peint] -walls墙漆ceiling['si:liŋ]paint [peint]天花板乳胶漆partition[pɑ:'tiʃən]隔板屏风plaster['plɑ:stə, 'plæs-]moulding['məuldiŋ]石膏线recessed [ri'sest] light 嵌灯埋地灯RECESSED LIGHT IN cabinet ['kæbinit]橱柜嵌灯stone[stəun slab[slæb]石板soap[səup]dispenser[dis'pensə]肥皂盒semi['sem(a)i]flush [flʌʃ]mount[maunt] T 半吸顶灯shower head['ʃauəhed]and handles淋浴莲蓬头和把手showersoap[səup]dispenser[dis'pensə]淋浴间肥皂盒single['siŋɡl]passage ['pæsidʒ]door 单门stacked[stækt]stone [stəun]cladding['klædiŋ]文化石包覆stone[stəun]tile walls 墙面石材wood stain[stein]木染色剂stain[stein]–着色woodtruss [trʌs]–木桁梁stone[stəun]baseboard ['beisbɔ:d]石材踢脚stone[stəun]crown [kraun]石材装饰线step[step]/riser ['raizə]light楼梯踏步灯towel ['tauəl, taul] bar毛巾杆toilet['tɔilit]seat [si:t]covers座便器坐垫tile[tail]flooring ['flɔ:riŋ]瓷砖地板tongue[tʌŋ]and groove [gru:v]拼装towel ['tauəl, taul] hook毛巾架threshold['θreʃhəuld]门坎toilet['tɔilit]paper ['peipə]holder['həuldə]卷筒纸架trash[træʃ]receptacle [ri'septəkl]废料桶渣滓桶urinal['juərinəl]小便器veneer [və'niə]面板Venetian[vi'ni:ʃən]plaster['plɑ:stə]威尼斯石膏Venetian[vi'ni:ʃən]plaster['plɑ:stə]-ceiling['si:liŋ]威尼斯石膏–天花板water['wɔ:tə]closet ['klɔzit/toilet['tɔilit]厕所applied[ə'plaid]wood [wud]moulding['məuldiŋ]粘贴木线wood [wud]beam [bi:m]木梁wood[wud]cladding ['klædiŋ] -walls木板包覆wood[wud]flooring ['flɔ:riŋ]木地板wood[wud]partition [pɑ:'tiʃən]木隔板wrought[rɔ:t]iron ['aiən铁艺wall mural['mjuərəl]壁画wall sconce[skɔns]壁灯设计英语常常使用词汇enclosure 围栏void 空间，虚体edifice 大厦，体系aisle 走廊nave （教堂）的正厅chapel 教堂cathedral 大教堂balustrade 雕栏colonnade 柱廊ornament 装饰tensile 空的housing 住房quarters 住宅neighborhood 住宅小区single-family 独户的hallway 门厅tenenment 住房terrace 天台wing 厢房hip 屋脊balcony 阳台。
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DR住宅by su11 architecture+design 标签：建筑, 居住建筑, 住宅, 美国, 康涅狄格州, 2013, su11 architecture+design
来自专筑编辑罗晓茜，刘庆新的报道。
该项目是对一座独栋房屋的翻新。
在翻新过程中要保持其L型的平面结构，且新建建筑要包裹着老房子。
除了这些外部约束，三个主要构成元素形成了项目概念性的想法：环境(地理/历史)，建筑外立面的特定处理手法，空间的连续性。
将这三方面相结合创建一座独特的住宅——体现出当代气息且在其所处环境中不显得突兀。
DR住宅by su11 architecture+design关键词：iarch专筑，专筑视频，专筑讲坛，专筑
From the architect. This single-family home is a new construction, which had to adhere to the L-shaped plan and overall building envelope of an older house. In addition to these external constraints, three major components drove the conceptual ideas for the project: The context (geographical/his¬torical), the specific treatment of the building envelope, and
spatial-programmatic continuity. In combination, these three aspects aimed to create a unique house with a bold contemporary expression without appearing too alien to its environment.
我们最初的灵感来自于谷仓，这在康涅狄格州是一种受欢迎的建筑类型。
我们对这种建筑的两个特点十分感兴趣。
首先，我们想使项目融合在其历史和地理背景当中。
第二，我们对这些引人注目的抽象品质所吸引。
该建筑在体量、孔径和整体几何形状上的处理手法都激发我们有了远离传统住宅的想法。
We took our initial inspiration from the barn, a popular building type in Connecticut. We were mainly interested in two of the characteristics of this type. First, we wanted to anchor the project within a historical and geographical context. Second, we were intrigued by the abstract quali¬ties of these compelling objects. Their specific treatment of volume, apertures, and overall geometry interested us as tools to estrange conventional ideas of residential housing.。