TLV3501AIDR_中文资料

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新思为NA3501模组硬件用户指导手册 20150528 54

新思为NA3501模组硬件用户指导手册 20150528 54

3.5.2 SD 卡接口应用....................................................................................................................................... 25
1.4 缩略语................................................................................................................................................................10
中有关著作权法律的保护。未经新思为电子科技有限公司书面授权,任何人不得以任何形式复制、 传播、散布、改动或以其它方式使用本资料的部分或全部内容,违者将被依法追究责任。
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对特定目的的适销性及适用性或者任何间接、特殊或连带的损失承担任何责任。
1.3 支持及参考文档列表..........................................................................................................................................9
1.2 撰写目的..............................................................................................................................................................9

TLV3501AIDR-中文资料

TLV3501AIDR-中文资料

TLV3501AIDR说明TLV350x系列推挽输出比较器, 有来自快速延迟时间为4.5ns传播延迟和操作+ 2.7V至+5.5V,由于超出摆幅输入共模范围使其非常适合低电压应用的理想选择。

轨对轨输出可直接驱动CMOS或TTL逻辑。

Microsize软件包提供的选项为便携式和空间受限的应用。

单(TLV3501)是提供SOT23-6和SO-8封装。

双(TLV3502)进来的SOT23-8和SO-8封装。

注意:“静电释放”可以对该集成电路造成损失,精密集成电路可能会更容易受到损害,所以尽量不要用手触摸。

最大额定值(1):电源电压+5.5v信号输入端电压(2)电压-0.3v到+0.3v信号输入端电流(2)10mA输出短路(3)74mA工作温度-40度到+125度存储温度-65度到+150度结温150度焊接温度(焊接10s)300度ESD额定值(人体模型静电)3000v 资料查询:干燥环境下人体可产生几千到上万伏静电。

带电器件模型(CDM概念数据模型)500v(1)上面这些额定值可能会造成永久性的损害。

暴露在绝对最大条件下长时间可能会降低设备的可靠性。

不能让芯片工作在上述额定或超出其他条件的功能操作模式下。

(2)输入端二极管钳位到电源控制线。

输入信号可以在正负0.3v摆动。

电源供电电流限制在10mA 以下。

(3)短路到地,一个比较器的每个包。

引脚配置:SO—8:脚1:NC脚2:反相输入端脚3:同向输入端脚4:负电源输入端脚5:NC脚6:输出端脚7:正电源输入端脚8:关断信号控制端对于SOT23-6封装由上图可以看出引脚1是由定向的包装标记。

SO-8比SOT23-6封装多了两个NC引脚,NC引脚为空脚,没有内部的电路连接。

电气特性限额适用于在指定温度范围,TA = -40°C至+125°C。

一般情况下在TA=25°C和VS=+2.7V至+5.5 V,除非另有说明。

失调电压:在VCM=0V,IO=0mA条件下失调电压为正负1mv,最大为正负6.5mv温度:-40度到125度偏移量保持在正负5uf/du电源:供电电压保持在2.7v到5.5v偏移量一般保持在100uv/v最大400uv/v输入滞后6mv输入偏置电流:VCM= VCC/2一般偏移量保持在正负2pA最大量正负10pA。

爱立智电子GPS模拟广播系统DR说明书

爱立智电子GPS模拟广播系统DR说明书

ericssonzLBI-39208Ericsson Inc.Private Radio Systems Mountain View RoadLynchburg, Virginia 245021-800-592-7711 (Outside USA, 804-592-7711)Printed in U.S.A.MAINTENANCE MANUAL GPS SIMULCAST SYSTEM DRA WINGS(Transmit Site)DESCRIPTIONThis maintenance manual provides GPS Simulcast System drawings used at the transmit site. These drawing include Transmit Site Configuration, Floor Plan, Interrack Cabling and an Interrack Cabling List. Transmit Site Configuration Draw-ing 19C852716, Sheets 1 & 2 show the configuration for a 24channel GPS Simulcast transmit site. Floor Plan Drawing 19C852721 shows the equipment layout for and the ductwork layout for the same configuration. Interrack Cabling Drawing 19C852722, sheets 1 & 2 shows the interrack cabling for a 24channel transmit site. Cable list 350A1888, Sheets 1-3 pro-vides a list of the GPS Simulcast Transmit Site Interrack ca-bling. This list also provides a wiring diagram (Figure 1) for the alarm cables connected from T801 (ALM OUT) to T813“A” (ALM IN), and from D801 (ALM OUT) to T803-A (ALM IN) and from D801 (ALM OUT) to T813_A (ALM IN). T801is GPS receiver “A” and T803 is 10 MHz Oscillator Selector &Distribution Amplifier #1. These two items are located in the Simulcast equipment rack. T813 is 10 MHz Oscillator Selector & Distribution Amplifier #2 located in a station equipment rack. D801 is GPS receiver “A” located in the common equip-ment rack at the Control Point. This cable is used only when the Control Point and the Transmit Site are co-located.Copyright© November 1996, Ericsson Inc.TRANSMIT SITE FLOOR PLAN This manual is published by Ericsson Inc., without any warranty. Improvements and changes to this manual necessitated by typographical errors, inaccuracies of current information, or improvements to programs and/or equipment, may be made by Ericsson Inc., at any time and without notice. Such changes will be incorporated into new editions of this manual. No part of this manual may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Ericsson Inc.EQUIPMENT LAYOUTDUCTWORK LAYOUTTransmit Site Floor Plan(19C852721, Rev. 1)LBI-392081LBI-39208TRANSMIT SITE CONFIGURATION DIAGRAM24 ChannelTransmit Site Configuration Diagram(19C852716, Sh. 1, Rev. 1)2LBI-39208 TRANSMIT SITE CONFIGURATION DIAGRAM24 ChannelTransmit Site Configuration Diagram(19C852716, Sh. 2, Rev. 1)3LBI-39208INTERRACK CABLING DIAGRAMInterrack Cabling Diagram(19C852722, Sh. 1, Rev. 0)4LBI-39208 INTERRACK CABLING DIAGRAMInterrack Cabling Diagram(19C852722, Sh. 2, Rev. 0)5INTERRACK CABLING LISTInterrack Cabling List(350A1888, Sh. 1, Rev. 1A)(350A1888, Sh. 2, Rev. 1A)83 CABINETSLBI-392086INTERRACK CABLING LISTInterrack Cabling List(350A1888, Sh. 3, Rev. 1A)REMOTE TRANSMIT SITE ONLYLENGTH TO BE DETERMINED ON SITET803/T813A L A R M INPUT8 PIN CONNECTOR(SUPPLIED WITH T803/T813)13 PIN CONNECTOR (SUPPLIED WITH T801/D801)T801/D801A L A R M O U T P U TFigure 1 - Cable*Requires DB-9 ’T’ AdapterCO-LOCATED TRANSMIT SDITE ONLY LBI-392087。

TLV3501

TLV3501

延迟时间为4.5ns轨至轨,高速比较器Microsize软件包特点?高速:延迟时间为4.5ns?轨到轨I / O?电源电压:+2.7 V至+5.5 V?推挽式CMOS输出阶段?关闭(TLV3501只)?微套餐:采用SOT23 - 6(单人)SOT23 - 8(双)?低电源电流:3.2毫安应用?自动测试设备?无线基站?阈值检测器?过零检测器?窗口比较器TLV350x相关产品功能产品精密超高速,低功耗比较器TLC3016差分输出比较TL712高速运算放大器,16位精度,150MHz的OPA300高速运算放大器,38MHz,轨到轨OPA350OPA357 250MHz的高速运算放大器,带有关断描述推挽输出比较TLV350x家庭设有一个快速的延迟时间为4.5ns的传播延迟和操作+2.7 V至+5.5 V。

以后的护栏输入共模范围使得它为低电压应用的理想选择。

轨到轨输出,直接驱动的CMOS或TTL逻辑。

Microsize包提供了用于便携式选项空间受限的应用。

单(TLV3501)采用SOT23 - 6和SO - 8封装。

双(TLV3502)采用SOT23 - 8和SO - 8封装。

PAGE2绝对最大额定值(1)电源电压。

+5.5 V,信号输入端子,电压(2)。

(V)- 0.3V(V +)+ 0.3V信号输入端子,电流(2)。

10毫安输出短路(3)。

74毫安工作温度。

-40 °C至+125°C存储温度。

-65 °C至+150°C结温。

+150 °C铅温度(焊接,10S)。

300°C额定ESD(人体模型)。

3000V带电器件模型(CDM)。

500V(1)强调以上这些收视率可能会造成永久性损坏。

长时间暴露在绝对最大条件可能会降低设备的可靠性。

这些仅仅是极限参数,并设备的功能操作在这些或任何其他条件超出指定的那些不支持。

(2)输入端子二极管钳位的电源轨。

输入信号的摆幅可超过0.3V超出供应导轨应电流为10mA或更小有限。

PMC-651F馈线保护测控装置用户说明书_V5.2

PMC-651F馈线保护测控装置用户说明书_V5.2
本说明书版权属深圳市中电电力技术股份有限公司所有,未经书面许可,不得复制,传播或使用本文 件及其内容,违犯者将要对所造成的损失负责。深圳市中电电力技术股份有限公司保留所有版权。
我们已经检查了本手册关于描述硬件和软件保持一致的内容。由于不可能完全消除差错,所以我们不 能保证完全的一致。本手册中的数据将定期审核,并在新一版的文件中做必要的修改,欢迎提出修改建议。 以后版本中的变动不再另行通知。
3 功能说明...................................................................................................................................................................6 3.1 保护功能.......................................................................................................................................................7 3.1.1 辅助元件.......................................................................................................................................... 7 3.1.2 大电流闭锁保护............................................................................................................................ 10 3.1.3 相电流充电保护............................................................................................................................ 10 3.1.4 相电流加速保护............................................................................................................................ 11 3.1.5 开入加速相电流保护.................................................................................................................... 11 3.1.6 瞬时电流速断保护........................................................................................................................ 12 3.1.7 限时电流速断保护........................................................................................................................ 13 3.1.8 复压(方向)过流保护................................................................................................................ 14 3.1.9 过负荷保护.................................................................................................................................... 15 3.1.10 反时限过流保护.......................................................................................................................... 16 3.1.11 IN 充电保护................................................................................................................................. 17 3.1.12 IN 加速保护................................................................................................................................. 17 3.1.13 IN 过流保护................................................................................................................................. 18 3.1.14 IN 反时限过流保护..................................................................................................................... 19 3.1.15 I0 充电保护................................................................................................................................. 19 3.1.16 I0 加速保护................................................................................................................................. 20 3.1.17 I0 过流保护................................................................................................................................. 20 3.1.18 I0 反时限过流保护..................................................................................................................... 21 3.1.19 过电压保护.................................................................................................................................. 21 3.1.20 低电压保护.................................................................................................................................. 22 3.1.21 低压解列保护.............................................................................................................................. 23

TLV3502AID中文资料

TLV3502AID中文资料
At TA = +25°C and VS = +2.7V to +5.5V, unless otherwise noted. TLV3501, TLV3502 PARAMETER OFFSET VOLTAGE Input Offset Voltage(1) vs Temperature vs Power Supply Input Hysteresis INPUT BIAS CURRENT Input Bias Current Input Offset Current(2) INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection INPUT IMPEDANCE Common-Mode Differential SWITCHING CHARACTERISTICS Propagation Delay Time(3) T(pd) ∆VIN = 100mV, Overdrive = 20mV ∆VIN = 100mV, Overdrive = 20mV ∆VIN = 100mV, Overdrive = 5mV ∆VIN = 100mV, Overdrive = 5mV ∆VIN = 100mV, Overdrive = 20mV Overdrive = 50mV, VS = 5V CONDITION VOS dVOS/dT PSRR VCM = 0V, IO = 0mA TA = −40°C to +125°C VS = 2.7V to 5.5V MIN TYP ±1 ±5 100 6 ±2 ±2 (V−) − 0.2V 57 55 MAX ±6.5 400 UNITS mV µV/°C µV/V mV pA pA V dB dB Ω pF Ω pF 6.4 7 10 12 ns ns ns ns ns MHz ns ns mV ns ns V V pA µA V V mA °C °C °C °C/W °C/W °C/W

TLV3501怎么做比较器,TLV3501比较器电路设计思路

TLV3501怎么做比较器,TLV3501比较器电路设计思路

TLV3501怎么做比较器,TLV3501比较器电路设计思路TLV3501 怎么做比较器,比较器电路如何设计?电压比较器(简称为比较器)是对输入信号进行鉴幅和比较的集成器件,它可将模拟信号转换成二值信号,即只有高电平和低电平两种状态的离散信号。

可用作模拟电路和数字电路的接口,也可用作波形产生和变换电路等。

比较器看起来像是开路结构中的运算放大器,但比较器和运算放大器在电气性能参数方面有许多不同之处。

运算放大器在不加负反馈时,从原理上讲可以用作比较器,但比较器的响应速度比运算放大器快,传输延迟时间比运算放大器小,而且不需外加限幅电路就可直接驱动TTL、CMOS 等数字集成电路。

但在要求不高情况下也可以考虑将某些运算放大器(例如:LM324、LM358、μA741、TL081、OP07、OP27 等)当作比较器使用。

常见的比较器电路有过零比较器、门限比较器、滞回比较器、窗口比较器和三态比较器等。

比较器的输出级主要有开路输出和推挽式输出两种输出电路结构。

(1) 集电极开路输出:集电极开路输出比较器的电路结构如集电极开路的比较器在使用时,需要外接上拉电阻R_PLL,上拉电阻与逻辑电源Vs+相连,逻辑电源的电压值,决定了比较器的可输出电压值。

采用集电极开路输出的比较器可与各种逻辑器件系列连接,并可实现线与逻辑。

(2) 集电极/发射极开路输出:集电极/发射极开路输出比较器的电路结构如集电极/发射极开路输出的比较器均需要外接上拉或下拉电阻R_PLL,采用上拉电阻与逻辑电源Vs+相连或采用下拉电阻与逻辑电源Vs-相连,逻辑电源的电压值,决定了比较器的可输出电压值。

采用集电极开路输出的比较器可与各种逻辑器件系列连接,并可实现线与逻辑。

(3) 漏极开路输出:漏极开路输出比较器的电路结构如漏极开路输出的比较器均需要外接上拉电阻R_PLL,采用上拉电阻与逻辑电源Vs+相连,逻辑电源的电压值,决定了比较器的可输出电压值。

PMC-651T配电变压器保护测控装置使用说明书V1.3

PMC-651T配电变压器保护测控装置使用说明书V1.3

PMC-651T配电变压器保护测控装置操作使用说明书(V1.3版)深圳市中电电力技术有限公司2008年10月20日PMC-651T配电变压器保护测控装置深圳市中电电力技术有限公司目录1装置简介..................................................................................................................................... 错误!未定义书签。

1.1概述 .................................................................................................................................... 错误!未定义书签。

1.2产品特点............................................................................................................................. 错误!未定义书签。

1.3基本功能............................................................................................................................. 错误!未定义书签。

2技术指标..................................................................................................................................... 错误!未定义书签。

北京大华无线电仪器有限责任公司 2018产品目录说明书

北京大华无线电仪器有限责任公司 2018产品目录说明书

2018PRODUCT CATALOG北京大华无线电仪器有限责任公司(简称:大华电子,原国营768厂),始建于1958年,2018年北京大华电子将迎来60岁华诞。

作为我国最早建成的微波测量仪器大型军工骨干企业,大华人以发展中国测量仪器工业为已任,专注于测试仪器行业,奋勇前行,不断创新。

目前产品已覆盖精密电子测量仪器、自动化测试系统、行业应用解决方案等数百种产品,并广泛应用于军工、科研、高校、通讯、工业控制、汽车电子、新能源等领域。

作为国产测量仪器行业的首创者和领航者,在过去60年间,大华人为客户提供了高质量产品和服务,同时,也为行业的培育、规范、发展做出了自己应有的贡献。

近年来,随着市场需求的不断升级和市场竞争的不断加剧,大华人持续创新,主动求变,引领和推进产业升级。

深入学习贯彻党的十九大精神,“不忘初心,牢记使命”,大华将传承多年的行业经验,通过研发平台升级,致力于高端测量仪器的开发和新行业的测试解决方案的拓展,为新老客户提供全方位的服务。

2018年,将是大华人新的起点,我们将深入持续创新,全面升级迎发展,继续与终端客户、合作伙伴紧密合作,加强军民融合和产学研深度融合,不断推进民用测试仪器的研制开发和高校研究成果的转化,进一步为工业市场提供更具稳定实用的仪器设备及解决方案,为国防建设、电子测量仪器事业的发展做出更大的贡献。

可靠性设计:简化、冗余设计并采用成熟技术方案,MTTF≥5000hrs。

维修性:采用单元模块化设计,便于拆卸、安装,对部件标准化设计,增加产品的互换性。

MTTR≦30min。

保障性:提供全套设备维修手册,并按需为使用及维修人员开展专业培训。

测试性:简化测试及调试设计,提高软件自检功能,提高测试效率。

安全性:确保无害输出,无易碎材质,产品在使用及损坏时不会造成人身伤害。

环境适应性:全部优选合格供应商产品,电子元器件筛选并降额使用。

交、直流分离设计,并采用有效材料增加电磁屏蔽效果。

共立3125中文使用说明书

共立3125中文使用说明书
6-2 绝缘电阻测量 危险
● 测试前,使用高压电流仪确认被测回路中无电荷。 ● 必须戴上高压绝缘手套。 ● 绝缘电阻量程时,按测试开关后测试线头部和被测回路中产生高压电,请注意避免触摸。 ● 电池盖打开时,请不要进行测量。 ● 打雷时,请不要进行测量。
注意 显示带电线路警告或蜂鸣器发出警告声时,即使按下测试开关也不能进行测量。 使用本仪器可检查电气设备或电路的绝缘状况。测量时,请确认施加于被测回路的电压是否良好。 (注意) * 由于被测物不同,其绝缘电阻值可能不稳定,而可能造成显示的电阻值也不稳定。
电池电压在操作电压下限以下,不能保证精确度。更换方法请参考 8 章。 5-2 连接测试线
将测试线稳固插入仪器端口,测试线(红色)连接到测试端口,接地线(黑色)连接到接地端口和保护线(绿色)连接到保护 端口。
危险 ● 绝缘测量量程时按下测试开关后,测试线产生高压电,若碰触可能导致触电事故。
-3-
6. 测量
5000V
0.0~99.9MΩ 100~999MΩ 1.00~9.99GΩ 10.0~99.9GΩ 100~1000GΩ
DC 5000V +20%,-0% 5MΩ 负荷时 1mA—1.2mA
30~600V(分辨率 10V): ±10%rdg±10dgt
此模式适用于确认被测物中充电电荷的放电状态。测量时,将监视器中显示的测量电压值做为标准使用。请注意外部施加交流电压
●精确度保证温湿度范围: 23ºC±5ºC/相对湿度 85%以下(无结露)
●操作温度与湿度范围: 0ºC-40ºC /相对湿度 85% 以下(无结露)
●存储温度与湿度范围: -20ºC-60ºC /相对湿度 75% 以下(无结露)
●过载保护: 绝缘抵抗范围: AC1200V/10 秒。

3501-2021标准分享

3501-2021标准分享

2021年最新3501标准全面解读与分享随着科技的飞速发展和市场需求的不断变化,各行各业的标准也在不断更新和完善。

本文将为您详细解读2021年最新版的3501标准,帮助您更好地了解和应用这一重要标准。

一、3501标准概述3501标准,全称为《信息与通信技术(ICT)设备节能技术要求》,是我国在节能减排领域的一项重要标准。

该标准主要针对ICT设备,包括服务器、存储设备、网络设备、安全设备等,对其节能性能提出了一系列具体要求。

3501标准的制定旨在推动ICT产业的绿色发展,降低能源消耗,减少碳排放。

二、2021年版3501标准的主要变化1.扩展适用范围:2021年版3501标准在原有基础上,将适用范围扩展到更多的ICT设备,如云计算、大数据、物联网等新兴领域。

2.强化节能要求:针对不同类型的ICT设备,2021年版3501标准提高了节能指标,加大了节能减排力度。

例如,服务器电源效率要求从80%提高到85%,存储设备能耗密度要求降低10%等。

3.新增能效等级:2021年版3501标准引入了能效等级的概念,将ICT设备分为五个能效等级,以便于企业和个人更加直观地选择高效节能的产品。

4.完善检测方法:为进一步保证3501标准的实施效果,2021年版标准对检测方法进行了细化和优化,增加了现场检测、远程检测等多种检测手段。

三、3501标准在实际应用中的意义1.降低运营成本:遵循3501标准,选购节能型ICT设备,有助于降低企业运营成本,提高经济效益。

2.提升竞争力:符合3501标准的产品,代表着更高的能效和更环保的生产理念,有助于提升企业竞争力。

3.促进产业升级:3501标准的推广和实施,将推动ICT产业向绿色、低碳、高效方向发展,助力我国产业结构优化。

4.贯彻国家政策:遵循3501标准,是贯彻国家绿色发展理念、落实节能减排政策的具体举措。

总的来说,2021年最新版3501标准的发布实施,标志着我国ICT产业节能减排工作进入新阶段。

TLV3501

TLV3501

延迟时间为4.5ns轨至轨,高速比较器Microsize软件包特点?高速:延迟时间为4.5ns?轨到轨I / O?电源电压:+2.7 V至+5.5 V?推挽式CMOS输出阶段?关闭(TLV3501只)?微套餐:采用SOT23 - 6(单人)SOT23 - 8(双)?低电源电流:3.2毫安应用?自动测试设备?无线基站?阈值检测器?过零检测器?窗口比较器TLV350x相关产品功能产品精密超高速,低功耗比较器TLC3016差分输出比较TL712高速运算放大器,16位精度,150MHz的OPA300高速运算放大器,38MHz,轨到轨OPA350OPA357 250MHz的高速运算放大器,带有关断描述推挽输出比较TLV350x家庭设有一个快速的延迟时间为4.5ns的传播延迟和操作+2.7 V至+5.5 V。

以后的护栏输入共模范围使得它为低电压应用的理想选择。

轨到轨输出,直接驱动的CMOS或TTL逻辑。

Microsize包提供了用于便携式选项空间受限的应用。

单(TLV3501)采用SOT23 - 6和SO - 8封装。

双(TLV3502)采用SOT23 - 8和SO - 8封装。

PAGE2绝对最大额定值(1)电源电压。

+5.5 V,信号输入端子,电压(2)。

(V)- 0.3V(V +)+ 0.3V信号输入端子,电流(2)。

10毫安输出短路(3)。

74毫安工作温度。

-40 °C至+125°C存储温度。

-65 °C至+150°C结温。

+150 °C铅温度(焊接,10S)。

300°C额定ESD(人体模型)。

3000V带电器件模型(CDM)。

500V(1)强调以上这些收视率可能会造成永久性损坏。

长时间暴露在绝对最大条件可能会降低设备的可靠性。

这些仅仅是极限参数,并设备的功能操作在这些或任何其他条件超出指定的那些不支持。

(2)输入端子二极管钳位的电源轨。

输入信号的摆幅可超过0.3V超出供应导轨应电流为10mA或更小有限。

TLV3501高速比较器

TLV3501高速比较器

proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes couldPACKAGING INFORMATION(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF TLV3502:•Automotive:TLV3502-Q1NOTE:Qualified Version Definitions:•Automotive-Q100devices qualified for high-reliability automotive applications targeting zero defectsTAPE AND REEL INFORMATION*All dimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant TLV3501AIDBVR SOT-23DBV 63000180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDBVT SOT-23DBV 6250180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDR SOICD 82500330.012.4 6.4 5.2 2.18.012.0Q1TLV3502AIDCNR SOT-23DCN 83000179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDCNT SOT-23DCN 8250179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDR SOIC D 82500330.012.4 6.4 5.2 2.18.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) TLV3501AIDBVR SOT-23DBV63000190.5212.731.8 TLV3501AIDBVT SOT-23DBV6250190.5212.731.8 TLV3501AIDR SOIC D8*******.0346.029.0 TLV3502AIDCNR SOT-23DCN83000195.0200.045.0 TLV3502AIDCNT SOT-23DCN8250195.0200.045.0 TLV3502AIDR SOIC D8*******.0346.029.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.Reproduction of this information with alteration is an unfair and deceptive business practice.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice.TI is not responsible or liable for any such statements.TI products are not authorized for use in safety-critical applications(such as life support)where a failure of the TI product would reasonably be expected to cause severe personal injury or death,unless officers of the parties have executed an agreement specifically governing such use.Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications,and acknowledge and agree that they are solely responsible for all legal,regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications,notwithstanding any applications-related information or support that may be provided by TI.Further,Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications.TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or"enhanced plastic."Only products designated by TI as military-grade meet military specifications.Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk,and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS16949requirements.Buyers acknowledge and agree that,if they use any non-designated products in automotive applications,TI will not be responsible for any failure to meet such requirements.Following are URLs where you can obtain information on other Texas Instruments products and application solutions:Products ApplicationsAudio /audio Communications and Telecom /communicationsAmplifiers Computers and Peripherals /computersData Converters Consumer Electronics /consumer-appsDLP®Products Energy and Lighting /energyDSP Industrial /industrialClocks and Timers /clocks Medical /medicalInterface Security /securityLogic Space,Avionics and Defense /space-avionics-defense Power Mgmt Transportation and /automotiveAutomotiveMicrocontrollers Video and Imaging /videoRFID Wireless /wireless-appsRF/IF and ZigBee®Solutions /lprfTI E2E Community Home Page Mailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2011,Texas Instruments Incorporated。

GBPC3501中文资料

GBPC3501中文资料

GBPC35005/W - GBPC3510/W35A GLASS PASSIVATED BRIDGE RECTIFIERFeatures“W” Suffix Designates Wire LeadsNo Suffix Designates Faston TerminalsGBPC-WGBPCa Maximum Ratings and Electrical Characteristics@ T A = 25°C unless otherwise specifiedMechanical DataSingle phase, 60Hz, resistive or inductive load.For capacitive load, derate current by 20%.Notes:1. Non-repetitive, for t > 1.0ms and t < 8.3ms.2. Measured at 1.0MHz and applied reverse voltage of 4.0V DC.3. Thermal resistance junction to case mounted on heatsink.·Glass Passivated Die Construction ·Diffused Junction·Low Reverse Leakage Current ·Low Power Loss, High Efficiency ·Surge Overload Rating to 400A Peak·Electrically Isolated Metal Base for Maximum Heat Dissipation·Case to Terminal Isolation Voltage 1500V ·UL Listed Under Recognized Component Index, File Number E94661·Case: Molded Plastic with Heatsink Internally Mounted in the Bridge Encapsulation ·Terminals: Plated Leads Solderable per MIL-STD-202, Method 208·Polarity: As Marked on Case·Mounting: Through Hole for #10 Screw·Mounting Torque: 8.0 Inch-pounds Maximum ·GBPC Weight: 20 grams (approx.)·GBPC-W Weight: 14 grams (approx.)·Mounting Position: Any0.010.11.01010000.40.8 1.0 1.6 1.80.60.2 1.2 1.4I ,I N S T A N T A N E O U S F O R W A R D C U R R E N T (A )F V ,INSTANTANEOUS FORWARD VOLTAGE (V)Fig.2Typical Forward Characteristics (per element)F100200300400110100I ,P E A K F W D .S U R G E C U R R E N T (A )F S M NUMBER OF CYCLES AT 60Hz Fig.3Max Non-Repetitive Surge Current1010010000.11.010100C ,C A P A C I T A N C E (p F )j V ,REVERSE VOLTAGE (V)Fig.4TypicalJunction Capacitance (per element)R 0.010.11.01010040206080100120140I ,I N S T A N T A N E O U S R E V E R S E C U R R E N T (µA )R PERCENT OF RATED PEAK REVERSE VOLTAGE (%)Fig.5Typical Reverse Characteristics (per element)10200255075100125150I ,A V E R A G E F O R W A R D C U R R E NT (A )F T ,CASE TEMPERATURE (°C)Fig.1Forward Current Derating Curve C 3040。

睿英电气RM系列数字式电动机综合保护装置

睿英电气RM系列数字式电动机综合保护装置

RM030
RM050
RM100
RM150
RM200
型号
工作电压 频率 三相
功率因数保护
谐波测量保护
温度测量保护
功率保护
欠/过电流保护
保护功能
缺相保护 不平衡保护
逆相保护
堵转保护
短路保护
接地保护
失速保护
通讯MODBUS 4~20mA输出
产品概述,功能与特点·······················································································2 型号选择················································································································3 安装尺寸················································································································5 接线端子,指示灯说明·······················································································6 接线图····················································································································6 技术指标················································································································7

CJT长江连接器A3501系列

CJT长江连接器A3501系列

3.50±0.10 Circuit 1 7.53±0.25 3.21±0.25
10.70±0.25
2.40±0.25
Unit: mm
A3501HA-2P
3.50mm Pitch Housing
Ordering Information: A3501HA-2P - ** 1 2 1.Part No. 2.Color: (blank):White GY:Gray
Unit: mm CHANGJIANG CONNECTORS
A-325
2.35±0.20 3.00±0.20 9.51±0.20
3.50mm pitch wire to board connector
3.50mm Pitch 90° Wafer
6.65±0.10
9.80±0.10 9.80±0.10
Ø0.60±0.05
3.50±0.10
10.50±0.25
3.30±0.25
7.50±0.25 3.50±0.10
3.50mm Pitch Housing
Circuit 1
5.70
3.50±0.25
CHANGJIANG CONNECTORS
18.30±0.25
A-323
A3501 SERIES A3501WR-2P
Reference Informations: *Material:Pin:Barss/Tin over Nickel Solder Pin:Barss/Tin over Nickel Insulator:Nylon 6T , UL94V-0 *Mates with CJT A3501H series Housing *Color:White
A3501 SERIES

TLV3501高速比较器

TLV3501高速比较器

proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes couldPACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)TLV3501AID ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDBVR ACTIVE SOT-23DBV63000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDBVRG4ACTIVE SOT-23DBV63000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDBVT ACTIVE SOT-23DBV6250Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDBVTG4ACTIVE SOT-23DBV6250Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDG4ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3501AIDRG4ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AID ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDCNR ACTIVE SOT-23DCN83000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDCNRG4ACTIVE SOT-23DCN83000Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDCNT ACTIVE SOT-23DCN8250Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDCNTG4ACTIVE SOT-23DCN8250Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDG4ACTIVE SOIC D875Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDR ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEARTLV3502AIDRG4ACTIVE SOIC D82500Green(RoHS&no Sb/Br)CU NIPDAU Level-2-260C-1YEAR(1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-The planned eco-friendly classification:Pb-Free(RoHS),Pb-Free(RoHS Exempt),or Green(RoHS&no Sb/Br)-please check /productcontent for the latest availability information and additional product content details.TBD:The Pb-Free/Green conversion plan has not been defined.Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free(RoHS Exempt):This component has a RoHS exemption for either1)lead-based flip-chip solder bumps used between the die and package,or2)lead-based die adhesive used between the die and leadframe.The component is otherwise considered Pb-Free(RoHS compatible)as defined above.Green(RoHS&no Sb/Br):TI defines"Green"to mean Pb-Free(RoHS compatible),and free of Bromine(Br)and Antimony(Sb)based flame retardants(Br or Sb do not exceed0.1%by weight in homogeneous material)(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF TLV3502:•Automotive:TLV3502-Q1NOTE:Qualified Version Definitions:•Automotive-Q100devices qualified for high-reliability automotive applications targeting zero defectsTAPE AND REEL INFORMATION*All dimensions are nominal Device Package Type Package DrawingPinsSPQ Reel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant TLV3501AIDBVR SOT-23DBV 63000180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDBVT SOT-23DBV 6250180.08.4 3.2 3.1 1.39 4.08.0Q3TLV3501AIDR SOICD 82500330.012.4 6.4 5.2 2.18.012.0Q1TLV3502AIDCNR SOT-23DCN 83000179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDCNT SOT-23DCN 8250179.08.4 3.2 3.2 1.4 4.08.0Q3TLV3502AIDR SOIC D 82500330.012.4 6.4 5.2 2.18.012.0Q1*All dimensions are nominalDevice Package Type Package Drawing Pins SPQ Length(mm)Width(mm)Height(mm) TLV3501AIDBVR SOT-23DBV63000190.5212.731.8 TLV3501AIDBVT SOT-23DBV6250190.5212.731.8 TLV3501AIDR SOIC D8*******.0346.029.0 TLV3502AIDCNR SOT-23DCN83000195.0200.045.0 TLV3502AIDCNT SOT-23DCN8250195.0200.045.0 TLV3502AIDR SOIC D8*******.0346.029.0IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,modifications,enhancements,improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by government requirements,testing of all parameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design.Customers are responsible for their products and applications using TI components.To minimize the risks associated with customer products and applications,customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any TI patent right,copyright,mask work right, or other TI intellectual property right relating to any combination,machine,or process in which TI products or services are rmation published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents 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LT3501EFE#PBF资料

LT3501EFE#PBF资料

33501fbELECTRICAL CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: The LT3501EFE is guaranteed to meet performance specifi cations from 0°C to 125°C junction temperature. Specifi cations over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. TheLT3501IFE is guaranteed and tested over the full –40°C to 125°C operating junction temperature range.Note 3: Minimum input voltage is defi ned as the voltage where internal bias lines are regulated so that the reference voltage and oscillator remain PARAMETERCONDITIONSMIN TYP MAX UNITS Error Amplifi er Source Current Ch 1/2V FB1/2 = 0.6V, V VC1/2 = 1V 101525µA Error Amplifi er Sink Current Ch 1/2V FB1/2 = 1V, V VC1/2 = 1V 152030µA Error Amplifi er High Clamp Ch 1/2V FB1/2 = 0.7V1.752.0 2.25V Error Amplifi er Switching Threshold Ch 1/2V OUT1/2 = 5V, R T /SYNC = 133k 0.50.7 1.0V Soft-Start Source Current Ch 1/2V FB1/2 = 0.6V, V SS1/2 = 0.4V ●2.53.254µA Soft-Start V OH Ch 1/2V FB1/2 = 0.9V1.922.4V Soft-Start Sink Current Ch 1/2V FB1/2 = 0.6V, V SS1/2 = 1V 2006001000µA Soft-Start V OL Ch 1/2V FB1/2 = 0V5080125mV Soft-Start to Feedback Offset Ch 1/2V VC1/2 = 1V, V SS1/2 = 0.4V ●–16016mV Soft-Start Sink Current Ch 1/2 POR V SS1/2 = 0.4V (Note 4), V VC = 1V 0.5 1.52mA Soft-Start POR Threshold Ch 1/2V FB1/2 = 0V (Note 4)5580105mV Soft-Start Switching Threshold Ch 1/2V FB1/2 = 0V305070mV Power Good Leakage Ch 1/2V FB1/2 = 0.9V, V PG1/2 = 25V, V VIN1/2 = 25V 01µA Power Good Threshold Ch 1/2V FB1/2 Rising, PG1/2 = 20k to 5V ●879093%Power Good Hysteresis Ch 1/2V FB1/2 Falling, PG1/2 = 20k to 5V 203050mV Power Good Sink Current Ch 1/2V FB1/2 = 0.65V, V PG1/2 = 0.4V 4008001200µA Power Good Shutdown Sink Current Ch 1/2V VIN1/2 = 2V, V FB1/2 = 0V, V PG1/2 = 0.4V 1050100µA R T /SYNC Reference Voltage V FB1/2 = 0.9V, I RT/SYNC = –40µA0.930.9751V Switching FrequencyR T /SYNC = 133k, V FB1/2 = 0.6V, V BST1/2 = V SW + 3VR T /SYNC = 15.4k, V FB1/2 = 0.6V, V BST1/2 = V SW + 3V 2001.22501.53001.8kHz MHz Switching Phase Angle Ch A to Ch B R T /SYNC = 133k, V FB1/2 = 0.6V, V BST1/2 = V SW + 3V 120180210Deg Minimum Boost for 100% Duty Cycle Ch 1/2V FB1/2 = 0.7V, I RT/SYNC = –35µA (Note 5), V OUT = 0V 1.72V SYNC Frequency RangeV BST1/2 = V SW + 3V2501500kHz SYNC Switching Phase Angle Ch A to Ch B SYNC Frequency = 250kHz, V BST1/2 = V SW + 3V 120180210Deg IND + V OUT Current Ch 1/2V VOUT1/2 = 0V, V FB1/2 = 0.9V V VOUT1/2 = 5V407001001µA µA IND to V OUT Maximum Current Ch 1/2V VOUT1/2 = 0.5V (Note 6), V FB1/2 = 0.7V, V BST1/2 = 20V V VOUT1/2 = 5V (Note 6), R T /SYNC = 133k, V BST1/2 = 20V 3.253.54455A A Switch Leakage Current Ch 1/2V SW1/2 = 0V, V VIN1/2 = 25V●050µA Switch Saturation Voltage Ch 1/2I SW1/2 = 3A, V BST1/2 = 20V, V FB1/2 = 0.7V ●250600mV Boost Current Ch 1/2I SW1/2 = 3A, V BST1/2 = 20V, V FB1/2 = 0.7V 2560100mA Minimum Boost Voltage Ch 1/2I SW1/2 = 3A, V BST1/2 = 20V, V FB1/2 = 0.7V1.42.5Vconstant. Actual minimum input voltage to maintain a regulated output will depend upon output voltage and load current. See Applications Information.Note 4: An internal power-on reset (POR) latch is set on the positive transition of the SHDN pin through its threshold. The output of the latch activates current sources on each SS pin which typically sink 1.5mA, discharging the SS capacitor. The latch is reset when both SS pins are driven below the soft-start POR threshold or the SHDN pin is taken below its threshold.Note 5: To enhance dropout operation, the output switch will be turned off for the minimum off time only when the voltage across the boost capacitor drops below the minimum boost for 100% duty cycle threshold.The ● denotes the specifi cations which apply over the full operatingtemperature range, otherwise specifi cations are at T J = 25°C. V VIN1/2 = 15V, V BST1/2 = open, V RT/SYNC = 2V, V VOUT1/2 = open, unless otherwise specifi ed.This indicates that the output is overloaded and current is pulled from the SS pin, reducing the regulation point. FB1/FB2 (Pins 17, 14): The FB pin is the negative input to the error amplifi er. The output switches regulate this pin to 0.8V, with respect to the exposed ground pad. Bias current fl ows out of the FB pin.SHDN (Pin 15): The shutdown pin is used to turn off both channels and control circuitry to reduce quiescent current to a typical value of 9µA. The accurate 1.28V threshold and input current hysteresis can be used as an undervoltage lockout, preventing the regulator from operating until the input voltage has reached a predetermined level. Force the SHDN pin above its threshold or let it fl oat for normal operation.R T/SYNC (Pin 16): This R T/SYNC pin provides two modes of setting the constant switch frequency. Connecting a resistor from the R T/SYNC pin to ground will set the R T/SYNC pin to a typical value of 0.975V. The resultant switching frequency will be set by the resistor value. The minimum value of 15.4k and maximum value of 133k sets the switching frequency to 1.5MHz and 250kHz respectively.Driving the R T/SYNC pin with an external clock signal will synchronize the switch to the applied frequency. Synchro-nization occurs on the rising edge of the clock signal after the clock signal is detected, with switch 1 in phase with the synchronization signal. Each rising clock edge initiates an oscillator ramp reset. A gain control loop servos the oscillator charging current to maintain a constant oscillator amplitude. Hence, the slope compensation and channel phase relationship remain unchanged. If the clock signal is removed, the oscillator reverts to resistor mode and reapplies the 0.975V bias to the R T/SYNC pin after the synchronization detection circuitry times out. The clock source impedance should be set such that the current out of the R T/SYNC pin in resistor mode generates a frequency roughly equivalent to the synchronization frequency. BST1/BST2 (Pins 20, 11): The BST pin provides a higher than V IN base drive to the power NPN to ensure a low switch drop. A comparator to V IN imposes a minimum off time on the SW pin if the BST pin voltage drops too low. Forcing a SW off time allows the boost capacitor to recharge.Exposed Pad (Pin 21): GND. The Exposed Pad GND pin is the only ground connection for the device. The Exposed Pad should be soldered to a large copper area to reduce thermal resistance. The GND pin is common to both chan-nels and also serves as small-signal ground. For ideal operation all small-signal ground paths should connect to the GND pin at a single point, avoiding any high current ground returns.PIN FUNCTIONS83501fbwill be generated at the incoming frequency on the rising edge of the synchronization pulse with switch 1 in phase with the synchronization signal. In addition, the internal slope compensation will be automatically adjusted to pre-vent subharmonic oscillation during synchronization. The two regulators are constant frequency, current mode step-down converters. Current mode regulators are con-trolled by an internal clock and two feedback loops that control the duty cycle of the power switch. In addition to the normal error amplifi er, there is a current sense amplifi er that monitors switch current on a cycle-by-cycle basis. This technique means that the error amplifi er commands current to be delivered to the output rather than voltage.A voltage fed system will have low phase shift up to the resonant frequency of the inductor and output capacitor, then an abrupt 180°, shift will occur. The current fed sys-tem will have 90° phase shift at a much lower frequency, but will not have the additional 90° shift until well beyond the LC resonant frequency. This makes it much easier to frequency compensate the feedback loop and also gives much quicker transient response.The Block Diagram in Figure 1 shows only one of the switching regulators whose operation will be discussed below. The additional regulator will operate in a similar manner with the exception that its clock will be 180° out of phase with the other regulator.When, during power up, the POR signal sets the soft-start latch, both SS pins will be discharged to ground to ensure proper start-up operation. When the SS pin voltage drops below 80mV, the V C pin is driven low disabling switching and the soft-start latch is reset. Once the latch is reset the soft-start capacitor starts to charge with a typical value of 3.25µA.As the voltage rises above 80mV on the SS pin, the V C pin will be driven high by the error amplifi er. When the volt-age on the V C pin exceeds 0.7V, the clock set-pulse sets the driver fl ip-fl op which turns on the internal power NPN switch. This causes current from V IN, through the NPN switch, inductor and internal sense resistor, to increase. When the voltage drop across the internal sense resistor exceeds a predetermined level set by the voltage on the V C pin, the fl ip-fl op is reset and the internal NPN switch is turned off. Once the switch is turned off the inductor will drive the voltage at the SW pin low until the external Schottky diode starts to conduct, decreasing the current in the inductor. The cycle is repeated with the start of each clock cycle. However, if the internal sense resistor voltage exceeds the predetermined level at the start of a clock cycle, the fl ip-fl op will not be set resulting in a further decrease in inductor current. Since the output current is controlled by the V C voltage, output regulation is achieved by the error amplifi er continually adjusting the V C pin voltage.The error amplifi er is a transconductance amplifi er that compares the FB voltage to the lowest voltage present at either the SS pin or an internal 0.8V reference. Compensa-tion of the loop is easily achieved with a simple capacitor or series resistor/capacitor from the V C pin to ground. Since the SS pin is driven by a constant current source, a single capacitor on the soft-start pin will generate controlled linear ramp on the output voltage.If the current demanded by the output exceeds the maxi-mum current dictated by the V C pin clamp, the SS pin will be discharged, lowering the regulation point until the output voltage can be supported by the maximum current. When overload is removed, the output will soft-start from the overload regulation point.V IN1 undervoltage detection or thermal shutdown will set the soft-start latch, resulting in a complete soft-start sequence.The switch driver operates from either the V IN or BST volt-age. An external diode and capacitor are used to generate a drive voltage higher than V IN to saturate the output NPN and maintain high effi ciency. If the BST capacitor voltage is suffi cient, the switch is allowed to operate to 100% duty cycle. If the boost capacitor discharges towards a level insuffi cient to drive the output NPN, a BST pin compara-tor forces a minimum cycle off time, allowing the boost capacitor to recharge.A power good comparator with 30mV of hysteresis trips at 90% of regulated output voltage. The PG output is an open-collector NPN that is off when the output is in regu-lation allowing a resistor to pull the PG pin to a desired voltage.BLOCK DIAGRAM103501fbeither clamp the input voltage or dampen the tank circuit by adding a lossy capacitor in parallel with the ceramic capacitor. For details, see Application Note 88.Output Capacitor SelectionTypically step-down regulators are easily compensated with an output crossover frequency that is 1/10 of the switch-ing frequency. This means that the time that the output capacitor must supply the output load during a transient step is ~2 or 3 switching periods. With an allowable 5% drop in output voltage during the step, a good starting value for the output capacitor can be expressed by:CMax Load StepFrequency V VOUTOUT =•.•005Example:V OUT = 3.3V, Frequency = 1MHz, Max Load Step = 3ACe V FVOUT ==2160053312•.•.µThe calculated value is only a suggested starting value. Increase the value if transient response needs improvement or reduce the capacitance if size is a priority.The output capacitor fi lters the inductor current to generate an output with low voltage ripple. It also stores energy in order to satisfy transient loads and to stabilize the LT3501’s control loop. The switching frequency of the LT3501 deter-mines the value of output capacitance required. Also, the current mode control loop doesn’t require the presence of output capacitor series resistance (E SR). For these reasons, you are free to use ceramic capacitors to achieve very low output ripple and small circuit size.Estimate output ripple with the following equations:V RIPPLE = ∆I L/(8f C OUT) for ceramic capacitors,andV RIPPLE = ∆I L ESR for electrolytic capacitors (tantalum and aluminum)where ∆I L is the peak-to-peak ripple current in the inductor.The RMS content of this ripple is very low, and the RMS current rating of the output capacitor is usually not of concern.Another constraint on the output capacitor is that it must have greater energy storage than the inductor; if the stored energy in the inductor is transferred to the output, you would like the resulting voltage step to be small compared to the regulation voltage. For a 5% overshoot, this require-ment becomesC LIVOUTLIMOUT>⎛⎝⎜⎞⎠⎟102Finally, there must be enough capacitance for good transient performance. The last equation gives a good starting point. Alternatively, you can start with one of the designs in this data sheet and experiment to get the desired performance. This topic is covered more thoroughly in the section on loop compensation.The high performance (low E SR), small size and robustness of ceramic capacitors make them the preferred type for LT3501 applications. However, all ceramic capacitors are not the same. As mentioned above, many of the high value capacitors use poor dielectrics with high temperature and voltage coeffi cients. In particular, Y5V and Z5U types lose a large fraction of their capacitance with applied voltage and temperature extremes. Because the loop stability and transient response depend on the value of C OUT, you may not be able to tolerate this loss. Use X7R and X5R types. You can also use electrolytic capacitors. The ESRs of most aluminum electrolytics are too large to deliver low output ripple. Tantalum and newer, lower ESR organic electrolytic capacitors intended for power supply use, are suitable and the manufacturers will specify the ESR. The choice of capacitor value will be based on the ESR required for low ripple. Because the volume of the capacitor determines its ESR, both the size and the value will be larger than a ceramic capacitor that would give you similar ripple per-formance. One benefi t is that the larger capacitance may give better transient response for large changes in load current. Table 2 lists several capacitor vendors.APPLICATIONS INFORMATION153501fb163501fbTable 2VENDOR TYPE SERIESTaiyo Yuden Ceramic X5R, X7R AVX Ceramic X5R, X7RTantalum KemetTantalum TA Organic AL Organic T491, T494, T495T520A700Sanyo TA/AL Organic POSCAP Panasonic AL Organic SP CAP TDKCeramic X5R, X7RCatch DiodeThe diode D1 conducts current only during switch off time. Use a Schottky diode to limit forward voltage drop to increase effi ciency. The Schottky diode must have a peak reverse voltage that is equal to regulator input voltage and sized for average forward current in normal operation. Average forward current can be calculated from:I I V V V D AVG OUTININ OUT ()•–=()The only reason to consider a larger diode is the worst-case condition of a high input voltage and shorted output. With a shorted condition, diode current will increase to a typical value of 4A, determined by the peak switch current limit of the LT3501. This is safe for short periods of time, but it would be prudent to check with the diode manu-facturer if continuous operation under these conditions can be tolerated.BST Pin ConsiderationsThe capacitor and diode tied to the BST pin generate a voltage that is higher than the input voltage. In most cases a 0.47µF capacitor and fast switching diode (such as the CMDSH-3 or FMMD914) will work well. Almost any type of fi lm or ceramic capacitor is suitable, but the ESR should be <1Ω to ensure it can be fully recharged during the off time of the switch. The capacitor value can be approximated by: C I DCB V V fBST OUT MAX OUT BST MIN =()()()••–•where I OUT(MAX) is the maximum load current, and V BST(MIN) is the minimum boost voltage to fully saturate the switch.Figure 5 shows four ways to arrange the boost circuit. The BST pin must be more than 1.4V above the SW pin for full effi ciency. Generally, for outputs of 3.3V and higher the standard circuit (Figure 5a) is the best. For outputs between 2.8V and 3.3V, replace the D2 with a small Schottky diode such as the PMEG4005. For lower output voltages the boost diode can be tied to the input (Figure 5b). The circuit in Figure 5a is more effi cient because the BST pin current comes from a lower voltage source. Fig-ure 5c shows the boost voltage source from available DC sources that are greater than 3V. The highest effi ciency is attained by choosing the lowest boost voltage above 3V. For example, if you are generating 3.3V and 1.8V and the 3.3V is on whenever the 1.8V is on, the 1.8V boost diode can be connected to the 3.3V output. In any case, you must also be sure that the maximum voltage at the BST pin is less than the maximum specifi ed in the Absolute Maximum Ratings section.The boost circuit can also run directly from a DC voltage that is higher than the input voltage by more than 3V, as in Figure 5d. The diode is used to prevent damage to the LT3501 in case V X is held low while V IN is present. The circuit saves several components (both BST pins can be tied to D2). However, effi ciency may be lower and dissipa-tion in the LT3501 may be higher. Also, if V X is absent, the LT3501 will still attempt to regulate the output, but will do so with very low effi ciency and high dissipation because the switch will not be able to saturate, dropping 1.5V to 2V in conduction.The minimum input voltage of an LT3501 application is limited by the minimum operating voltage (<3V) and by the maximum duty cycle as outlined above. For proper start-up, the minimum input voltage is also limited by the boost circuit. If the input voltage is ramped slowly, or the LT3501 is turned on with its SS pin when the output is already in regulation, then the boost capacitor may not be fully charged. Because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. This minimum load will depend onAPPLICATIONS INFORMATIONAt power-up, a reset signal sets the soft-start latch and discharges both SS pins to approximately 0V to ensure proper start-up. When both SS pins are fully discharged the latch is reset and the internal 3.25µA current source starts to charge the SS pin.When the SS pin voltage is below 50mV, the V C pin is pulled low which disables switching. This allows the SS pin to be used as an individual shutdown for each channel.As the SS pin voltage rises above 50mV, the V C pin is re-leased and the output is regulated to the SS voltage. When the SS pin voltage exceeds the internal 0.8V reference, the output is regulated to the reference. The SS pin voltage will continue to rise until it is clamped at 2V.In the event of a V IN1 undervoltage lockout, the SHDN pin driven below 1.28V, or the internal die temperature exceeding its maximum rating during normal operation, the soft-start latch is set, triggering a start-up sequence.In addition, if the load exceeds the maximum output switch current, the output will start to drop causing the V C pin clamp to be activated. As long as the V C pin is clamped, the SS pin will be discharged. As a result, the output will be regulated to the highest voltage that the maximum output current can support. For example, if a 6V output is loaded by 1Ω the SS pin will drop to 0.53V, regulating the output at 4V ( 4A • 1Ω ). Once the overload condition is removed, the output will soft-start from the temporary voltage level to the normal regulation point.Since the SS pin is clamped at 2V and has to discharge to 0.8V before taking control of regulation, momentary overload conditions will be tolerated without a soft-start recovery. The typical time before the SS pin takes control is:tC VA SS CONTROLSS()•.=12700µPower Good IndicatorsThe PG pin is the open-collector output of an internal comparator. The comparator compares the FB pin voltage to 90% of the reference voltage with 30mV of hysterisis. The PG pin has a sink capability of 800µA when the FB pin is below the threshold and can withstand 25V when the threshold is exceeded. The PG pin is active (sink capability is reduced in shutdown and undervoltage lockout mode) as long as the V IN1 pin voltage exceeds 1V.Output Tracking/SequencingComplex output tracking and sequencing between chan-nels can be implemented using the LT3501’s SS and PG pins. Figure 9 shows several confi gurations for output tracking/sequencing for a 3.3V and 1.8V application. Independent soft-start for each channel is shown in Figure 9a. The output ramp time for each channel is set by the soft-start capacitor as described in the soft-start section.Ratiometric tracking is achieved in Figure 9b by connecting both SS pins together. In this confi guration, the SS pin source current is doubled (6.5µA) which must be taken into account when calculating the output rise time.By connecting a feedback network from V OUT1 to the SS2 pin with the same ratio that sets V OUT2 voltage, absolute tracking shown in Figure 9c is implemented. The minimum value of the top feedback resistor (R1) should be set such that the SS pin can be driven all the way to ground with 700µA of sink current when V OUT1 is at its regulated voltage. In addition, a small V OUT2 voltage offset will be present due to the SS2 3.25µA source current. This offset can be corrected for by slightly reducing the value of R2. Figure 9d illustrates output sequencing. When V OUT1 is within 10% of its regulated voltage, PG1 releases the SS2 soft-start pin allowing V OUT2 to soft-start. In this case PG1 will be pulled up to 2V by the SS pin. If a greater voltage is needed for PG1 logic, a pull-up resistor to V OUT1 can be used. This will decrease the soft-start ramp time and increase tolerance to momentary shorts.If precise output ramp up and down is required, drive the SS pins as shown in Figure 9e. The minimum value of resistor (R3) should be set such that the SS pin can be driven all the way to ground with 700µA of sink current during power-up and fault conditions.Multiple Input VoltagesFor applications requiring large inductors due to high V IN to V OUT ratios, a 2-stage step-down approach may reduceAPPLICATIONS INFORMATION203501fbSS1V OUT13.3V5ms/DIV 10ms/DIV 10ms/DIVSS1V OUT13.3VSS1V OUT1SS1V OUT1R325kSS1V OUT1PG2PG2PG110ms/DIV10ms/DIVPG1PG1PG2PG2PG1PG1SS1/2LT3501. Place additional vias near the catch diodes. Adding more copper to the top and bottom layers and tying this copper to the internal planes with vias can further reduce thermal resistance. With these steps, the thermal resistance from die (or junction) to ambient can be reduced to θJA = 45°C/W.The power dissipation in the other power components such as catch diodes, boost diodes and inductors, cause additional copper heating and can further increase what the IC sees as ambient temperature. See the LT1767 data sheet’s Thermal Considerations section.Single, Low Ripple 6A OutputThe LT3501 can generate a single, low ripple 6A output if the outputs of the two switching regulators are tied together and share a single output capacitor. By tying the two FB pins together and the two V C pins together, the two channels will share the load current. There are several advantages to this 2-phase buck regulator. Ripple currents at the input and output are reduced, reducing voltage ripple and allowing the use of smaller, less expensive capacitors. Although two inductors are required, each will be smaller than the inductor required for a single-phase regulator. This may be important when there are tight height restric-tions on the circuit. There is one special consideration regarding the 2-phase circuit. When the difference between the input voltage and output voltage is less than 2.5V, then the boost circuits may prevent the two channels from properly sharing current. If, for example, channel 1 gets started fi rst, it can supply the load current, while channel 2 never switches enough current to get its boost capacitor charged.In this case, channel 1 will supply the load until it reaches current limit, the output voltage drops, and channel 2 gets started. Two solutions to this problem are shown in the Typical Applications section.The single 3.3V/6A output converter generates a boost sup-ply from either SW that will service both switch pins. The synchronized 3.3V/12A output converter utilizes undervoltage lockout to prevent the start-up condition. Other Linear Technology PublicationsApplication notes AN19, AN35 and AN44 contain more detailed descriptions and design information for buck regulators and other switching regulators. The LT1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. Design Note DN100 shows how to generate a dual (+ and –) output supply using a buck regulator.APPLICATIONS INFORMATION243501fbInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.283501fbLinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com© LINEAR TECHNOLOGY CORPORA TION 2006LT 0507 REV B • PRINTED IN USAPART NUMBER DESCRIPTIONCOMMENTSLT176660V, 1.2A (I OUT ), 200kHz High Efficiency Step-Down DC/DC ConverterV IN : 5.5V to 60V, V OUT(MIN) = 1.20V, I Q = 2.5mA, I SD = 25µA, 16-Lead TSSOPE PackageLT1933500mA (I OUT ), 500kHz Step-Down Switching Regulator in SOT-23V IN : 3.6V to 36V, V OUT(MIN) = 1.2V, I Q = 1.6mA, I SD <1µA, ThinSOT TM PackageLT193636V, 1.4A (I OUT ), 500kHz High Efficiency Step-Down DC/DC ConverterV IN : 3.6V to 36V, V OUT(MIN) = 1.2V, I Q = 1.9mA, I SD <1µA, 8-Lead MS8E PackageLT1940Dual 25V, 1.4A (I OUT ), 1.1MHz High Efficiency Step-Down DC/DC ConverterV IN : 3.6V to 25V, V OUT(MIN) = 1.20V, I Q = 3.8mA, I SD <30µA, 16-Lead TSSOPE PackageLT1976/LT197760V, 1.2A (I OUT ), 200kHz/500kHz High Efficiency Step-Down DC/DC Converters with Burst Mode ® OperationV IN : 3.3V to 60V, V OUT(MIN) = 1.20V, I Q = 100µA, I SD <1µA, 16-Lead TSSOPE PackageLTC ®3407/LTC3407-2Dual 600mA/800mA, 1.5MHz/2.25MHz SynchronousStep-Down DC/DC Converters V IN : 2.5V to 5.5V, V OUT(MIN) = 0.6V, I Q = 40µA, I SD <1µA, 3mm × 3mm DFN and 10-Lead MSE PackagesLT3434/LT343560V, 2.4A (I OUT ), 200kHz/500kHz High Effi ciency Step-Down DC/DC Converters with Burst Mode OperationV IN : 3.3V to 60V, V OUT(MIN) = 1.20V, I Q = 100µA, I SD <1µA, 16-Lead TSSOPE PackageLT343760V, 400mA (I OUT ), Micropower Step-Down DC/DC Converter with Burst Mode Operation V IN : 3.3V to 60V, V OUT(MIN) = 1.25V, I Q = 100µA, I SD <1µA, DFN Package LT349336V, 1.4A (I OUT ), 750kHz High Effi ciency Step-Down DC/DC ConverterV IN : 3.6V to 36V, V OUT(MIN) = 0.8V, I Q = 1.9mA, I SD <1µA, DFN PackageLT350536V, 1.2A (I OUT ), 3MHz High Effi ciency Step-Down DC/DC ConverterV IN : 3.6V to 36V, V OUT(MIN) = 0.78V, I Q = 2mA, I SD <2µA, 3mm × 3mm DFN and 8-Lead MSE PackagesLT3506/LT3506A Dual 25V, 1.6A (I OUT ), 575kHz/1.1MHz High Effi ciency Step-Down DC/DC ConvertersV IN : 3.6V to 25V, V OUT(MIN) = 0.8V, I Q = 3.8mA, I SD <30µA, 4mm × 5mm DFN PackageLT3510Dual 25V, 3A (I OUT ), 1.5MHz High Effi ciency Step-Down DC/DC ConverterV IN : 3.3V to 25V, V OUT(MIN) = 0.8V, I Q = 3.5mA, I SD <1µA, 20-Lead TSSOPE PackageLTC3548Dual 400mA/800mA, 2.25MHz Synchronous Step-Down DC/DC ConvertersV IN : 2.5V to 5.5V, V OUT(MIN) = 0.6V, I Q = 40µA, I SD <1µA, 3mm × 3mm DFN and 10-Lead MSE PackagesBurst Mode is a registered trademark of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.RELATED PARTS。

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TLV3501AIDR
说明
TLV350x系列推挽输出比较器, 有来自快速延迟时间为4.5ns传播延迟和操作
+ 2.7V至+5.5V,由于超出摆幅输入共模范围使其非常适合低电压应用的理想选择。

轨对轨输出可直接驱动CMOS或TTL逻辑。

Microsize软件包提供的选项为便携式和空间受限的应用。

单(TLV3501)是提供SOT23-6和SO-8封装。

双(TLV3502)进来的SOT23-8和SO-8封装。

注意:“静电释放”可以对该集成电路造成损失,精密集成电路可能会更容易受到损害,所以尽量不要用手触摸。

最大额定值(1):
电源电压+5.5v
信号输入端电压(2)电压-0.3v到+0.3v
信号输入端电流(2)10mA
输出短路(3)74mA
工作温度-40度到+125度
存储温度-65度到+150度
结温150度
焊接温度(焊接10s)300度
ESD额定值(人体模型静电)3000v 资料查询:干燥环境下人体可产生几千到上万伏静电。

带电器件模型(CDM概念数据模型)500v
(1)上面这些额定值可能会造成永久性的损害。

暴露在绝对最大条件下长时间
可能会降低设备的可靠性。

不能让芯片工作在上述额定或超出其他条件的功能操作
模式下。

(2)输入端二极管钳位到电源控制线。

输入信号可以在正负0.3v摆动。

电源供电电流限制在10mA以下。

(3)短路到地,一个比较器的每个包。

引脚配置:
SO—8:脚1:NC
脚2:反相输入端
脚3:同向输入端
脚4:负电源输入端
脚5:NC
脚6:输出端
脚7:正电源输入端
脚8:关断信号控制端
对于SOT23-6封装由上图可以看出引脚1是由定向的包装标记。

SO-8比SOT23-6封装多了两个NC引脚,NC引脚为空脚,没有内部的电路连接。

电气特性
限额适用于在指定温度范围,TA = -40°C至+125°C。

一般情况下在TA=25°C和VS=+2.7V至+5.5 V,除非另有说明。

失调电压:在VCM=0V,IO=0mA条件下失调电压为正负1mv,最大为正负6.5mv 温度:-40度到125度偏移量保持在正负5uf/du
电源:供电电压保持在2.7v到5.5v偏移量一般保持在100uv/v最大400uv/v
输入滞后6mv
输入偏置电流:VCM= VCC/2一般偏移量保持在正负2pA最大量正负10pA。

输入失调电流:VCM= VCC/2一般偏移量保持在正负2pA最大量正负10pA。

共模电压范围:在-0.2V到+0.2V范围内,最小不超过-0.2V最大不超过-0.2V。

共模抑制共模抑制比:在-0.2V到+0.2V范围内,一般为70db最小55db。

输入阻抗共模:
差模:
开关特性:
传递延迟时间:在∆VIN= 100mV, Overdrive = 20mV条件下一般为4.5ns最大6.4ns。

∆VIN= 100mV, Overdrive = 5mV时,一般为7.5ns最大10ns。

传输延时差:在∆VIN= 100mV, Overdrive = 20mV时为0.5ns。

最大切换频率:高速=50mV 供电电压为5V时为80 MHz。

上升时间:1.5ns 下降时间:1.5ns。

电压输出浮动,在输出电流为正负1mA时为30mv最大50mV。

关闭:关闭时间30ns打开时间100ns 。

比较使能使能最大(V+)-1.7v,比较器被禁止最小(V+)-0.9V。

输入偏置电流关断引脚2pA。

停止工作时静态电流2uA。

电源
额定电压+2.7v到5.5V。

工作电压范围为2.2到5.5v。

静态电流在工作电压为5v输出比较高时为3.2mA最大为5mA。

温度范围:
指定范围是-40度到125度,工作温度范围-40度到125度
储存温度-65度到150度
热阻:SO-8 150度/瓦
备注:(1)失调电压是定义为正的平均和负开关阈值
(2)传播延迟与自动测试设备的低速超速不能被精确地测量。

此参数为通过表征和测试为100mV超速。

(3)当传递延迟之间的差变高时传递的延迟时间会变低
(4)上升和下降时间是额定输入电压的90%到10%时的测量
(5)当关断引脚是内部0.9v时芯片大部分被禁止,当其大于1.7v正电源时该部分使能。

典型特性:
在TA=25°C,VS=+5 V和输入100mV的,除非另有说明
输出响应上升下降
传递延时与温度:
传播延迟与容性负载
传播延迟与电源电压:唤醒延时与温度
响应至50MHz与100MHz正弦波
静态电流与电源电压,静态电流与温度
静态电流与关断电压,静态电流与频率
应用信息
该TLV3501和TLV3502均配备高速响应,包括内部的滞后,以提高抗噪性能与扩展0.2V超出电源轨的输入共模范围为6mV。

关断
一个停机引脚允许器件进入空闲状态时,它是不使用。

当关断引脚为高电平时,芯片的电流大约为2μA,输出变为高阻抗。

当关断引脚为低电平时,TLV3501是有效的。

当不使用TLV3501关机功能,只需连接关断引脚到最负电源,如图1。


约需要100ns的走出来的关断模式。

该TLV3502不具备关断功能。

TLV3501的基本连接图
工作电压
TLV3501比较器用于指定从+2.7V至+5.5 V单电源(或±1.35V双电源至±2.75V)在-40°C至+125°C的温度范围内时芯片运行低于这个范围时不是特定的性能。

增加外部迟滞
该TLV350x拥有强劲的性能与良好的布局使用性。

然而,比较器输入具有指定的偏移电压(±5mV的)范围内的小抗干扰能力。

对于缓慢移动的或有噪声的输入信号时,比较器输出可以显示多个开关作为输入信号移动的开关阈值。

在这种应用中,TLV350x的内部迟滞的可能为6mV或更大。

在更大的抗噪性需要的情况下,外部滞后可通过添连接少量的反馈到正输入。

图2显示了用于引入额外的滞后为25mV,共计31mV滞后5V单电源供电时的典型拓扑。

总滞后是由下式
切换比较器的输出所需要的转变电压的值,通过增大阈值区域,从而降低噪声干扰。

过电压保护
芯片的输入会通过“静电外释”二极管,如果输入电压超过电源约300mV时将受到保护。

瞬时电压大于电源300mV是可以的,可以通过串联一个小的电阻到芯片,将输入电流限制在10mA,如图3。

振荡器
TLV350x可以很容易地配置为简单和廉价的弛张振荡器。

在图4中,R2的网络设置在三分之一到三分之二的跳闸阈值。

因为这是一个高频电路,电阻器的值是
相当低,以最小化电容的影响。

三分之一的V +的三分之二之间的正输入端候补取决于输出是否低或高。

充电时间(或放电)是0.69R1C。

因此,该期间是1.38R1C。

为62pF和图4中所示1kΩas,输出被计算为10.9MHz。

这种电路的一个实施振荡在9.6MHz。

寄生电容和元件容差讲解理论与实际性能之间的差异
PCB布局
对于任何高速比较器或放大器,正确的设计和印刷电路板(PCB)布局可以让芯片达到最佳性能。

有源输入如果增加多余电容或不正确的接地,会限制高速比较器的最大性能。

从信号源到比较器的输入电阻最小化是必要的,以便最大限度地减少整个电路的传播延迟。

随着输入电容的源电阻产生的RC滤波器,延迟电压变化在输入,并降低了高频信号的振幅该TLV350x随着从输入引脚的电容至地的结果在几个电容皮法。

用于电源旁路电容的位置和类型是高速比较器的关键。

建议的2.2μF钽电容器不需要像靠近器件为0.1μF的电容,并且可以与其他设备共享。

该2.2μF电容缓冲对纹波电源线和0.1μF的电容提供高频时转换为比较器的开关。

在高频电路中,对于直流在相同的电位快速的上升和下降电压差可以看做一个瞬态开关,为了减少这种影响,一个接地平面通常被用来减小电路板内的电压电位差。

一个接地平面具有降低对电路板寄生电容的影响的优点,通过提供一种更可取的路径的电流流过。

有超过一个接地平面上的信号迹线,在高频率的返回电流(在接地平面)的倾向右下的信号路径流动。

接地平面(如简单的通孔引线和通孔)增加平面的电感,使得在较高频率上它不那么有效。

在地平面上进行必要的休息过孔应随机分布。

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