PS2562L1-4中文资料

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24lc256系列中文

24lc256系列中文

1.8-5.5V 400 kHz (2) 2.5-5.5V 400 kHz 1.8-5.5V 400 kHz(2) 2.5-5.5V 400 kHz 4.5V-5.5V 400 kHz
8 字节
16 字节 16 字节
整个阵列
整个阵列 无

A0, A1, A2 A0, A1, A2
I I, E
I I C, I, E
装。
封装类型 (1)
PDIP/SOIC
TSSOP/MSOP(2)
A0 1 A1 2 A2 3 VSS 4
8 VCC
A0 1
7 WP(3) A1 2
6 SCL
A2 3
5 SDA VSS 4
8 VCC
A0 A1
7 WP(3) NC NC
6 SCL NC
5
SDA
A2 VSS
TSSOP
1
14
2
13
3
12
4
11
1.8-5.5V 2.5-5.5V 1.8-5.5V
400 kHz (2)
400 kHz 1 MHz(3)
64 字节
整个阵列
A0, A1, A2(4)
I
P, SN, SM, ST, MS, MF,
I, E ST14
I
256 千位器件
24AA256
1.8-5.5V 400 kHz (2)
24LC256 24FC256
2005 Microchip Technology Inc.
DS21930A_CN 第 3 页
24AAXX/24LCXX/24FCXX
2.0 电气特性
绝对最大额定值 (†)
VCC.............................................................................................................................................................................6.5V 相对于 Vss 的所有输入和输出 ............................................................................................................ -0.6V 到 VCC +1.0V 存储温度 ................................................................................................................................................. -65°C 到 +150°C 环境温度 (使用电源时)........................................................................................................................ -40°C 到 +125°C 所有引脚静电保护 ....................................................................................................................................................................≥ 4 kV

PA2561L1-1(NEC)光耦规格书

PA2561L1-1(NEC)光耦规格书

DATA SHEETThe information in this document is subject to change without notice.©1992Document No. P12989EJ4V0DS00 (4th edition)(Previous No. LC-2225)Date Published August 1997 NS Printed in JapanPHOTOCOUPLERPS2561-1,-2, PS2561L-1,-2HIGH ISOLATION VOLTAGE SINGLE TRANSISTOR TYPE MULTI PHOTOCOUPLER SERIESThe mark shows major revised points.DESCRIPTIONThe PS2561-1, -2 and PS2561L-1, -2 are optically coupled isolators containing a GaAs light emitting diode and an NPN silicon phototransistor.PS2561-1, -2 are in a plastic DIP (Dual In-line Package) and PS2561L-1, -2 are lead bending type (Gull-wing) for surface mount.FEATURES•High isolation voltageBV = 5 000 Vr.m.s.: standard productsBV = 3 750 Vr.m.s.: VDE0884 approved products (Option)•High collector to emitter voltage (V CEO = 80 V)•High current transfer ratio (CTR = 200 % TYP.)•High-speed switching (t r = 3 µs TYP., t f = 5 µs TYP.)•UL approved (File No. E72422 (S) )•CSA approved (No. CA 101391)•BSI approved (BS415, BS7002) No. 7112•SEMKO approved (SS4410165) No. 9317144•NEMKO approved (NEK-HD 195S6) No. A21409•DEMKO approved (Section 101, 137) No. 300535•FIMKO approved (E69-89) No. 167265-08•VDE0884 approved (Option)APPLICATIONS•Power supply •Telephone/FAX.•FA/OA equipment•Programmable logic controller2PACKAGE DIMENSIONS (in millimeters)DIP Type5.1 MAX.6.53.8M A X .4.55M A X .2.8M I N .0.652.547.620.50 ± 0.100.25M4312PS2561-1 (New Package)10.2 MAX.1.25±0.156.53.8M A X .4.55M A X .2.8M I N .0.652.547.620.50 ± 0.100.25M871265340 to 15˚PS2561-20 to 15˚PS2561-14.6 ± 0.351.25±0.156.53.8M A X .4.55M A X .2.8M I N .0.650.50 ± 0.100.25M0 to 15˚7.622.5443121.25±0.15PS2561L1-15.1 MAX.6.53.8M A X .4.25M A X .2.8M I N .0.352.547.620.50 ± 0.100.25M0 to 15˚43121.25±0.1510.161. Anode 2. Cathode 3. Emitter 4. Collector 1, 3. Anode 2, 4. Cathode 5, 7. Emitter 6, 8. Collector1. Anode2. Cathode3. Emitter4. Collector 1. Anode 2. Cathode 3. Emitter 4. Collector Caution New package 1ch only3Lead Bending Type5.1 MAX.6.53.8M A X .2.547.620.25M4312PS2561L-1 (New Package)10.2 MAX.1.25±0.156.53.8M A X .2.547.6287126534PS2561L-2PS2561L-14.6 ± 0.351.25±0.156.53.8M A X .0.25M7.622.5443121.25±0.150.05 t o 0.29.60 ± 0.40.90 ± 0.250.05 t o 0.29.60 ± 0.40.90 ± 0.250.25M0.05 t o 0.29.60 ± 0.40.90 ± 0.255.1 MAX.6.53.8M A X .2.547.620.25MPS2561L2-143121.25±0.150.05 t o 0.210.160.9 ± 0.2512.0 MAX.1. Anode2. Cathode3. Emitter4. Collector1, 3. Anode 2, 4. Cathode 5, 7. Emitter 6, 8. Collector 1. Anode 2. Cathode 3. Emitter 4. Collector 1. Anode 2. Cathode 3. Emitter 4. Collector Caution New package 1ch only4ORDERING INFORMATIONPart NumberPackageSafety Standard ApprovalApplication partnumber *1PS2561-1PS2561L-1PS2561L1-1PS2561L2-14-pin DIP4-pin DIP (lead bending surface mount)4-pin DIP (for long distance)4-pin DIP (for long distance surfacemount)Standard products PS2561-1PS2561-2PS2561L-28-pin DIP8-pin DIP (lead bending surface mount)PS2561-2PS2561-1-V PS2561L-1-V PS2561L1-1-V PS2561L2-1-V 4-pin DIP4-pin DIP (lead bending surface mount)4-pin DIP (for long distance)4-pin DIP (for long distance surfacemount)VDE0884 approved products (Option)PS2561-1PS2561-2-V PS2561L-2-V8-pin DIP8-pin DIP (lead bending surface mount)PS2561-2*1 As applying to Safety Standard, following part number should be used.ABSOLUTE MAXIMUM RATINGS (T A = 25 °C, unless otherwise specified)ParameterSymbolRatingsUnitPS2561-1,PS2561L-1PS2561-2,PS2561L-2DiodeReverse Voltage V R 6V Forward Current (DC)I F80mAPower Dissipation Derating ∆P D /°C 1.5 1.2mW/°C Power Dissipation P D 150120mW/ch Peak Forward Current*1I FP 1A TransistorCollector to Emitter Voltage V CEO 80V Emitter to Collector Voltage V ECO 7V Collector CurrentI C50mA/chPower Dissipation Derating ∆P C /°C 1.5 1.2mW/°C Power DissipationP C 150120mW/ch Isolation Voltage*2BV5 0003 750*3Vr.m.s.Operating Ambient Temperature T A –55 to +100°C Storage TemperatureT stg–55 to +150°C*1PW = 100 µs, Duty Cycle = 1 %*2AC voltage for 1 minute at T A = 25 °C, RH = 60 % between input and output *3VDE0884 approved products (Option)•UL approved •CSA approved •BSI approved•NEMKO approved •DEMKO approved •SEMKO approved•FIMKO approved5ELECTRICAL CHARACTERISTICS (T A = 25 °C)ParameterSymbol Conditions MIN.TYP.MAX.Unit DiodeForward Voltage V F I F = 10 mA 1.171.4VReverse Current I R V R = 5 V5µA Terminal CapacitanceC t V = 0 V, f = 1.0 MHz 50pFTransistorCollector to Emitter Dark CurrentI CEOV CE = 80 V, I F = 0 mA100nACoupled Current Transfer Ratio *1CTR I F = 5 mA, V CE = 5 V 80200400%Collector Saturation VoltageV CE (sat)I F = 10 mA, I C = 2 mA0.3V Isolation Resistance R I-O V I-O = 1.0 kV 1011ΩIsolation Capacitance C I-O V = 0 V, f = 1.0 MHz0.5pFRise Time *2t r V CC = 10 V, I C = 2 mA, R L = 100 Ω3µsFall Time*2t f5*1CTR rank (only PS2561-1, PS2561L-1)*2Test circuit for switching timeL: 200 to 400 (%)M : 80 to 240 (%)D : 100 to 300 (%)H : 80 to 160 (%)W : 130 to 260 (%)V CCV OUTR L = 100 Ω50 ΩI F µPulse InputPW = 100 sDuty Cycle = 1/106TYPICAL CHARACTERISTICS (T A = 25 °C, unless otherwise specified)150100500255075100125150 1.5 mW/˚C1.2 mW/˚C15010050255075100125150010 0001001 000100101755025–25–50V CE = 80 V10 1.00.80.60.40.20510.50.110 m A401.5 mW/˚C1.2 mW/˚C20 m A 50 m A 2 m AI F = 1 mA5 m A 70260504030201004681020 m A I F = 5 mA10m A 50 m A 40 V 24 V 10 V 5 VPS2561-1PS2561L-1PS2561-2PS2561L-2PS2561-1PS2561L-1PS2561-2PS2561L-2100 1.51.41.31.21.11.00.90.80.75010510.50.10 ˚C –25 ˚C –55 ˚C+60 ˚C +25 ˚CT A = +100 ˚CD i o d e P o w e r D i s s i p a t i o n P D (m W )T r a n s i s t o r P o w e r D i s s i p a t i o n P C (m W )Ambient Temperature T A (˚C)F o r w a r d C u r r e n t I F (m A )Forward Voltage V F (V)C o l l e c t o r C u r r e n t I C (m A )Collector to Emitter Voltage V CE (V)C o l l e c t o r t o E m i t t e rD a r k C u r r e n t I CE O (n A )Collector Saturation Voltage V CE(sat) (V)Ambient Temperature T A (˚C)Ambient Temperature T A (˚C)DIODE POWER DISSIPATION vs.AMBIENT TEMPERATURETRANSISTOR POWER DISSIPATION vs. AMBIENT TEMPERATUREFORWARD CURRENT vs.FORWARD VOLTAGECOLLECTOR CURRENT vs.COLLECTOR TO EMITTER VOLTAGECOLLECTOR TO EMITTER DARKCURRENT vs. AMBIENT TEMPERATURECOLLECTOR CURRENT vs.COLLECTOR SATURATION VOLTAGEC o l l e c t o r C u r r e n t I C (m A )7PS2561-1,-2,PS2561L-1,-21.2–501.00.80.60.40.20–252550751004504003503002502001501005000.050.10.5151050501010.110 k5 k 1 k50010050101 000100101100 k50 k 10 k5 k 1 k5001000–5–10–15–200.5125102050100200500I C = 2 mA,V CC = 10 V,CTR = 290 %t f t rt dt sI F = 5 mA,V CC = 5 V,CTR = 290 %t st dt rt fI F = 5 mA,V CE = 5 V100 Ω300 ΩR L = 1 k ΩI F = 5 mA T A = 25 ˚CI F = 5 mA T A = 60 ˚C 1.21.00.80.60.40.2102103104105Normalized to 1.0at T A = 25 ˚C,I F = 5 mA, V CE = 5 VForward Current I F (mA)Ambient Temperature T A (˚C)Load Resistance R L (Ω)Frequency f (kHz)N o r m a l i z e d C u r r e n t T r a n s f e r R a t i o C T RC u r r e n t T r a n s f e r R a t i o C T R (%)N o r m a l i z e d G a i n G VLoad Resistance R L (Ω)S w i t c h i n g T i m e t ( s )µNORMALIZED CURRENT TRANSFER RATIO vs. AMBIENT TEMPERATURECURRENT TRANSFER RATIO vs.FORWARD CURRENTSWITCHING TIME vs.LOAD RESISTANCESWITCHING TIME vs.LOAD RESISTANCEFREQUENCY RESPONSELONG TIME CTR DEGRADATIONS w i t c h i n g T i m e t ( s )µTYP.Time (Hr)C T R (R e l a t i v e V a l u e )8TAPING SPECIFICATIONS (in millimeters)Taping DirectionPS2561L-1-E3PS2561L-1-F3PS2561L-1-E4PS2561L-1-F4Outline and Dimensions (Tape)1.55±0.12.0±0.14.0±0.11.55±0.11.75±0.14.3±0.210.3±0.10.37.5±0.116.0±0.35.6±0.18.0±0.1Outline and Dimensions (Reel)Packing: PS2561L-1-E3, E4 1 000 pcs/reel2.0±0.5R 1.013.0±0.5φ21.0±0.8φ16.4+2.0–0.0P S 2561L -1-E 3, E 4: 250P S 2561L -1-F 3, F 4: 330φ80.0±5.0φφPS2561L-1-F3, F4 2 000 pcs/reel9Taping DirectionPS2561L-2-E3PS2561L-2-E4Outline and Dimensions (Tape)1.55±0.12.0±0.14.0±0.11.55±0.11.75±0.14.3±0.210.3±0.10.37.5±0.116.0±0.310.4±0.112.0±0.1Outline and Dimensions (Reel)Packing: 1 000 pcs/reel16.4+2.0–0.080.0±5.0φ330φ2.0±0.5R 1.013.0±0.5φ21.0±0.8φ10RECOMMENDED SOLDERING CONDITIONS(1) Infrared reflow soldering • Peak reflow temperature235 °C (package surface temperature)• Time of temperature higher than 210 °C 30 seconds or less • Number of reflows Three• FluxRosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt % is recommended.)60 to 90 s (preheating)210 ˚C120 to 160 ˚CP a c k a g e S u r f a c e T e m p e r a t u r e T (˚C )Time (s)(heating)to 10 sto 30 s235 ˚C (peak temperature)Recommended Temperature Profile of Infrared ReflowPeak temperature 235 ˚C or belowCaution Please avoid to removed the residual flux by water after the first reflow processes.(2) Dip soldering • Temperature 260 °C or below (molten solder temperature)• Time10 seconds or less • Number of times One• FluxRosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt % is recommended.)11SPECIFICATION OF VDE MARKS LICENSE DOCUMENT (VDE0884)ParameterSymbolSpeckUnitApplication classification (DIN VDE 0109)for rated line voltages ≤ 300 Vr.m.s.for rated line voltages ≤ 600 Vr.m.s.IV III Climatic test class (DIN IEC 68 Teil 1/09.80)55/100/21Dielectric strength maximum operating isolation voltageTest voltage (partial discharge test procedure a for type test and random test)U pr = 1.2 × U IORM , P d < 5 pCU IORM U pr 8901 068V peak V peakTest voltage (partial discharge test procedure b for random test)U pr = 1.6 × U IORM , P d < 5 pC U pr 1 424V peakHighest permissible overvoltage U TR 6 000V peakDegree of pollution (DIN VDE 0109)2Clearance distance > 7.0mm Creepage distance> 7.0mmComparative tracking index (DIN IEC 112/VDE 0303 part 1)CTI 175Material group (DIN VDE 0109)III a Storage temperature range T stg –55 to +150°C Operating temperature rangeT A –55 to +100°C Isolation resistance, minimum value V IO = 500 V dc at T A = 25 °CV IO = 500 V dc at T A MAX. at least 100 °CRis MIN.Ris MIN.10121011ΩΩSafety maximum ratings (maximum permissible in case of fault, see thermal derating curve)Package temperatureCurrent (input current I F , Psi = 0)Power (output or total power dissipation)Isolation resistanceV IO = 500 V dc at T A = 175 °C (Tsi)Tsi Isi Psi Ris MIN.175********9°C mA mW ΩCAUTIONWithin this device there exists GaAs (Gallium Arsenide) material which is aharmful substance if ingested. Please do not under any circumstances break thehermetic seal.No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document.NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others.While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features.NEC devices are classified into the following three quality grades:"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application.Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronicequipment and industrial robotsSpecial: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designedfor life support)Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc.The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance.Anti-radioactive design is not implemented in this product.M4 96. 5。

富士通 PRIMERGY RX2530 M4 两路 1U 机架式服务器 数据手册

富士通 PRIMERGY RX2530 M4 两路 1U 机架式服务器 数据手册

数据手册 富士通PRIMERGY RX2530 M4两路1U 机架式服务器数据手册富士通PRIMERGY RX2530 M4 两路1U 机架式服务器在1U 外壳中实现最大生产率富士通PRIMERGY 服务器将为您提供应对任何工作负载以及不断变化的业务要求所需的服务器。

随着业务过程的扩张,对于应用的需求也不断提高。

每个业务过程都有各自的资源足迹,因此您需要寻求一种方式优化计算,以便更好地服务用户。

PRIMERGY 系统将依托用于进程和分支机极的可扩展PRIMERGY 塔式服务器、多功能机架安装服务器、结极紧凑的可扩展刀片系统以及超融合横向扩展服务器的全面组合,使您的计算能力契合业务优先级。

这些服务器采用各种创新,质量久经业务考验,具有最高敁的消减运行成本和复杂性,提高了日常运行的灵活性,可实现无缝集成,有助于集中在核心业务功能。

富士通PRIMERGY RX 机架式服务器作为机架优化的灵活服务器,具有一流的性能和能敁,从而成为各数据中心的“标准”。

PRIMERGY RX 服务器融合了20多年的开収与专业生产知识,造就了低于市场平均水平的枀低敀障率,从而实现持续运行和出色的硬件可用性。

PRIMERGY RX2530 M4富士通PRIMERGY RX2530 M4服务器是一款在节省空间的1U 外壳中提供高性能、可扩展性和能源敁率的机架式服务器。

PRIMERGY RX2530 M4采用最多28核的全新英特尔® 至强®处理器可扩展系列以及最新DDR4内存技术,性能强大,非常适于虚拟化、横向扩展场景、小型数据库以及高性能计算。

此外,RX2530 M4支持高达3,072 GB 主内存,具有强大的可扩展性,幵且支持M.2设备和最新iRMC S5,可适应未来需求,提供下一代服务器管理功能。

自2018年年中开始,将支持NV-DIMM 。

最多10个磁盘和可选的4个高速PCIe SSD 提供灵活的存储配置选择。

M25P32中文资料

M25P32中文资料

M25P3232Mbit,低电压,75MHZ,SPI串行接口的flash存储器特征:32Mbit的flash。

单电源供电2.7~3.6V。

SPI总线通讯。

75M时钟(最大)VPP=9V快速读写电压页操作时间0.6ms擦出一个扇区时间0.6s整块擦除时间:标准23s,快速17s睡眠模式电流1uABP0,BP1,BP2硬件写保护选择位擦写次数可达100000次数据可保存20年目录1描述2信号描述数据输出数据输入时钟片选保护写保护,提高编程电压工作电压电源地3SPI协议4操作方法和时序页操作扇区的擦除和整块的擦写写检测和循环擦除快速编程和擦除操作激活,正常工作,睡眠模式状态寄存器保护方法保持条件5存储组织结构6操作说明写操作使能使能复位读器件ID读状态寄存器WIP位WEL位BP2,BP1,BP0位SRWD位写状态寄存器读数据操作快速读数据操作页操作扇区擦除操作整个器件擦除睡眠模式激活器件78原始状态9极限参数10DC和AC参数11硬件结构12编号13修订记录1 描述M25P32是32Mbit(4M*8)的串行flash存储器,具有增强写保护结构。

存取采用SPI 总线协议。

一次性可编程1-256个字节(参考页编程操作说明)。

增强型快速编程、擦除模式可适用于需要快速存储的场合。

当V PPH 达到写保护或增强编程电压时即可进入此模式。

存储结构分为64个扇区,每个含有256页,每页256字节的宽度,所以整个器件可以看成有16384页组成(或者4194304个字节组成)整个器件的擦除(参考整块擦除说明),一次擦除一个扇区(参考扇区擦除说明)图1表1图22信号描述串行数据输出(Q)串行数据输入(D)图31.DU = Don’t use2.3 串行时钟信号2.4片选()当片选端输入为高时,那么取消选定器件,此时串行数据输出为高阻态,除非内部编程,循环对擦除、写寄存器进行操作,器件将工作在标准电源模式下(非睡眠模式)当器件片选信号拉低使能时,即器件进入正常工作模式。

EPM2210F256I5N中文资料(Altera)中文数据手册「EasyDatasheet - 矽搜」

EPM2210F256I5N中文资料(Altera)中文数据手册「EasyDatasheet - 矽搜」

100-Pin FineLine
BGA
100-Pin TQFP
0.5
0.5
1
0.5
25
36
121
256
5×5
6×6
11 × 11 16 × 16
144-Pin TQFP
0.5 484 22 × 22
144-Pin Micro FineLine BGA
256-Pin Micro FineLine BGA
参考文献
本章引用文件下列文件:
■ DC和开关特性
在本章
■ MAX II逻辑单元,以宏单元转换方法
MAX II器件手册
白皮书
文档修订历史记录
表1-6 显示修订历史本章.
表 1-6. 文档修订历史记录
日期和修订
所做更改
2009年8月, 1.9版
2008年10月, 1.8版
2007年12月, version1.7
每一个速度等级和密度范围内数字,指是
特点
在本章
MAX II器件手册.
表1-2 显示MAX II器件速度等级产品.
DC和开关
表 1-2. MAX II速度等级
速度等级

EPM240 EPM240G EPM570 EPM570G EPM1270 EPM1270G EPM2210 EPM2210G EPM240Z EPM570Z
特征
在MAX II CPLD具有以下特点: ■ 低成本,低功耗CPLD ■ 瞬时上电,非易失体系结构 ■ 待机电流低至25μA
■ 提供快速传播延迟和时钟到输出时间
■ 提供四个全局时钟有两个时钟可以从每个逻辑阵列模块(LAB) ■ UFM方框多达8 Kbits对非易失性存储

IIC-24LC256系列中文资料

IIC-24LC256系列中文资料

2005 Microchip Technology Inc.
Байду номын сангаас
DS21930A_CN 第 3 页
24AAXX/24LCXX/24FCXX
2.0 电气特性
绝对最大额定值 (†)
VCC.............................................................................................................................................................................6.5V 相对于 Vss 的所有输入和输出 ............................................................................................................ -0.6V 到 VCC +1.0V 存储温度 ................................................................................................................................................. -65°C 到 +150°C 环境温度 (使用电源时)........................................................................................................................ -40°C 到 +125°C 所有引脚静电保护 ....................................................................................................................................................................≥ 4 kV

PS2625L资料

PS2625L资料

Document No. P11293EJ3V0DS00 (3rd edition) (Previous No. LC-2125A)Date Published February 1996 P Printed in Japan ©1988PACKAGE DIMENSIONS (Unit: mm)DIP (Dual In-line Package)Lead Bending type (Gull-wing)2ABSOLUTE MAXIMUM RATINGS (T A = 25 ˚C)DiodeForward Current (DC)I F±150mAPower Dissipation Derating∆P D/˚C 2.0mW/˚CPower Dissipation P D200mWPeak Forward Current I F(Peak)±1A(PW = 100 µs, Duty Cycle 1 %)TransistorCollector to Emitter Voltage V CEO80VEmitter to Collector Voltage V ECO7VCollector Current I C50mAPower Dissipation Derating∆P C/˚C 1.5mW/˚CPower Dissipation P C150mWCoupledIsolation Voltage *1)BV 5 000V r.m.s.Storage Temperature T stg–55 to +150˚COperating Temperature T opt–55 to +100˚C*1)AC voltage for 1 minute at T A = 25 ˚C, RH = 60 % between input (Pin No. 1, 2, 3, Common) and output (Pin No.4, 5, 6 Common).ELECTRICAL CHARACTERISTICS (T A = 25 ˚C)34TYPICAL CHARACTERISTICS (T A = 25 ˚C)255075100050100150200T A – Ambient Temperature – ˚C DIODE POWER DISSIPATION VS .AMBIENT TEMPERATUREP D – D i o d e P o w e r D i s s i p a t i o n – m W255075100050100150200T A – Ambient Temperature – ˚C TRANSISTOR POWER DISSIPATION VS .AMBIENT TEMPERATUREP C – T r a n s i s t o r P o w e r D i s s i p a t io n – m W–1.5–150–100–50050100150V F – Forward Voltage – VI F – F o r w a r d C u r r e n t – m AFORWARD CURRENT vs.FORWARD VOLTAGE–1.0–0.500.5 1.0 1.50.60.01FORWARD CURRENT vs.FORWARD VOLTAGEI F –F o r w a r d C u r r e n t – m AV F – Forward Voltage – V0.11101000.81 1.2 1.4 1.6COLLECTOR TO EMITTER DARK CURRENT vs. AMBIENT TEMPERATUREI C E O – C o l l e c t o r t o E m i t t e r D a rk C u r r e n t – n AT A – Ambient Temperature – ˚C1000010001001010.1–60–40–20020406080100V CE(sat) – Collector Saturation Voltage – V1001010.10.01COLLECTOR CURRENT vs.COLLECTOR SATURATION VOLTAGEI C –C o l l e c t o r C u r r e n t – m A0.200.40.610.85NORMALIZED OUTPUT CURRENT vs.AMBIENT TEMPERATURET A – Ambient Temperature – ˚C∆C T R – N o r m a l i z e d O u t p u t C u r r e n tSWITCHING TIME vs.LOAD RESISTANCER L – Load Resistance – Ωt – S w i t c h i n g T i m e – sµf – Frequency – HzA V – V o l t a g e G a i n – d B5000.10.5151050100250200150100CURRENT TRANSFER RATIO (CTR) vs.FORWARD CURRENTIF – Forward Current – mAC T R – C u r r e n t T r a n s f e r R a t i o – %1021031041050.20.40.60.81.0CTR DEGRADATIONTime – Hr∆C T R – N o r m a l i z e dCOLLECTOR CURRENT vs.COLLECTOR TO EMITTER VOLTAGEV CE – Collector to Emitter Voltage – V 10406070I C – C o l l e c t o r C u r r e n t – m A2030505 The measurement of TYPICAL CHARACTERISTICS are only for reference, not guaranteed.6SOLDERING PRECAUTION(1)Infrared reflow soldering• Peak reflow temperature :235 ˚C or below (Plastic surface temperature)• Reflow time:30 seconds or less(Time period during which the plastic surface temperature is 210 ˚C)• Number of reflow processes : Three • Flux:Rosin flux containing small amount of chlorine(The flux with a maximum chlorine content of 0.2 Wt % is recommended.)INFRARED RAY REFLOW TEMPERATURE PROFILEP A C K A G E ’S S U R F A C E T E M (˚C )(2)Dip soldering• Peak temperature :260 ˚C or lower • Time :10 s or less • Flux:Rosin-base flux[MEMO]7CautionThe Great Care must be taken in dealing with the devices in this guide.The reason is that the material of the devices is GaAs (Gallium Arsenide), which isdesignated as harmful substance according to the law concerned.Keep the law concerned and so on, especially in case of removal.No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document.NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others.While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features.NEC devices are classified into the following three quality grades:“Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based ona customer designated “quality assurance program“ for a specific application. The recommended applicationsof a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application.Standard:Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronicequipment and industrial robotsSpecial:Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designedfor life support)Specific:Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc.The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books.If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact NEC Sales Representative in advance.Anti-radioactive design is not implemented in this product.M4 94.11。

256FBGA中文资料

256FBGA中文资料

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' ; !)5 ,*5* + ! & = & & !< & 3- 6 & ! + 3- - 3*. 6 83- 6 & = & = 0 * - 6 +!< & = & 6 & & & + = & 6 6 += & && & & > ! + = & 6 0 8 & 3- & + && & 6 ( ! ' && 6 > 1+!"; !)5 ,*5* !<+ < !< 6 6 " !" + ! = !< 6 ! = & 6 ! # & @; +& = ' A3+ 2!<*+ $ & )+ ! &2!< & 6 & 6 & 8 > & + & 2!< 3* 6 $ 3+4 6 $ + & 8 6 $ 5+4 6 $ + & & ..+*9<$ + 6 ! "< & !< 6 & & 0 & = A2!< E & & &! & &! & > & & = ! + 0 6 = 8 ! 6 & & ' 6 & = A2!< )F F ! & 5+,4F8 ! 6 & & ' 6 & = ,+,4F+& ! & 6 ' < & ' 6 + "< = 2!< 6 & & 6 +& "< < & + & = & > G > !<+ & !< > & & & ( & 6 & & 6 1+> & 6 "< 6 & & "< 6 = &$ !< " 7 "<+ ' & & "< 6 "!7# = + & & 6 "! < "< + "< && " & +?"< 6 & = & / % B3A5C ( 1 + !< 6 + 8 & < 7 ( = & "< 1 & ! 6 & < !< +! "& & 888 < " +# $ $%! & "< < & 6 & = "< 6 + / = & = "< 6 + = "< 6 & + & "< 6 & 7 8 .9<$ + E & & 7 +&$ &; !)5 ,*5* & & "< 6 & & 6 + (% 6 > & & +1# !"$ & % ' ( # ) *+ ' , - . $ &# ' % ( # ' # ' ( ) /'0 # ' 1 % # ' % 2#/0% $!" % 0 % % % 2#/0 . ( % $!"/ 3! % $!" /" ++45 ' % 2#/0 . ( % / 3! ! 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( % %$3 3 / $!" % $3 " / $!" % $ / $!" % $ /-@ H A / $!" % $ 0$ @ H A 0 $!" % % $3 " 0 $!" $" 0 $!" 8%2$"/-2 / $!" % * ( )% # $,/"3/-+/ / 3! ) % /"30$ +0 / 3! ) % % !$ &#!/0$ & !$ &-!/0$ & !C33$ &#$ & C 2!<!C $ &#$ & C元器件交易网3- # * <# * ((" #1 @+H A 0 #% % % % / 30 / % % / <50 / ( % %/ 1 0 / % % !/ =E <5/ / . ( %!- F@+H A 0 ! - ( % % % !-"F@+H A / ! - ( % 5 !-0@ H A 03 . ( % % 9 6 &5 !-/@ H A/ . ( % # 303 # "!$* # 503 # (300 % % 3// % <50 ( % %3@ H A /0 * 63 , 1#0 * 63 , 1=0 * 63 ,!<=0 * 63 , <=0 * 63 , 3/ * 63 , =0 * 63 , "=0 * 63 ,!! (! &1"&/ * 63 , "=!3G' &$ G ! F#/0 % F ! F-0 % F ! G#/0 % G ! G-0 % G !3/-@:H A !/!3 % / % !C33!3 #!3 C !C !3 #!3 C!C"=6!3 !/!3 !C333! #3! C !C 3! #3! C!3! "!0 % 3! % % *" ,!3! <!0 % 3! % % *< ,#<<C33@+H A ##<< C #<<C @+H A ##<< C"###<<6/< @ H A !/=. #<< % *+ #<<,#0" !@+4H A /0 2 % % ' % % #0" &@++H A /0 2 % % ' % % #0" @+ H A /0 2 % % ' % % #0" 3@;H A /0 2 % % ' % % ;"#0" =@ :H A/0 2 % % ' % %#0"/ # % % % %# 1!5=$#/ 1 ( )% > )( ? % < % # $ ."= = /0" % * % #0" % #<< ( ,# !3!#05/! 05!# &! 05/ 05" 0 /-/" % " 0 0$0" % % 0 /-/ % 0 0$ 0 % % " $; &C33 @ H A#C % *+ ;C,元器件交易网34- # * <# * ((C @ H A # C % C33@++H A #/0 C % * C,C @++H A #/0 C %C334@+H A #/0 C % 4C % * % C 4C % ,5/%I !2 % % ( " / I !2 % %/%I !2 % % 3//%I !2 % % % J ;300I !2 % % % %#<<=-!&<=/ < #<< #<< ( 0 /-=/%+ & $ )&< 3$ * -- 4-95 !-0 #0" ! 5 !-0+#0" !+;5 !-0 #0" ! B 5 !-0 / 3#0" ! + 5 !-0:/ <5#0" !:++5 !-04$ /- #0" !4+ 5 !-09$ 0$ #0" !9+ 5 !-0 /"30$ +#0" ! +:5 !-/ #0" !;+45 !-/+#0" !B +95 !-/ #0" !+ + 5 !-/ / 1 #0" !+++;5 !-/:/ =E <5#0" !+ +B 5 !-/4$ /- #0" !+ 5 !-/9$ 0$ #0" !+: +5 !-/ /"3/-+#0" !+49; $"/-2#0" & 9B $3 " #0" &+ $ #0" & + $" #0" & $3 " #0" &: $3 3 #0" &4;9 0% #0" ; !- F #0" + B !-"F #0" ; # 3#0" ;B # 5#0" :B+#1 #0" 4B #1 +#0" 9+ +3 !"=D #0" + 3 !! 5#0" ;+ : " #0" B + " #0" + 4+<3;#0" 3 4 <3B #0" 3+ :B <3+ #0" 3 :;<3++#0" 3 : <3+ #0" 3: :9<3+#0" 34元器件交易网3-< 3$ * -- 4-:4<3+:#0" 39 ::<3+4#0" 3 : <&<=-#0" 3;+ :"3+9#0" = + "3+ #0" =++ "3+;#0" = + +"3+B #0" = + B "3 #0" =:+ ;"3 +#0" =4+ 9"3 #0" =9+ 4"3 3 #0" = + :"3 : 39#0" =;+ "3 4 34#0" =B + "3 9 3:#0" =+ + +"3 3 #0" =+++ "3 ; 3 #0" =+ ++B "3 B 3+#0" =+ ++;"3 3 #0" =+:++ "3 + 1##0" =+4++ "1= 1=#0" =+9+++ "1=!<=#0" =+ B9 3* 3/, "= 3/#0" =+;B; 3! * 30, = 30#0" =+B BB 3* , 3- #0" = + <5* <5, <= <5#0" = +B: !-"F+ "&#0" = B !- F+#0" = +;:"! :#0" = :元器件交易网3,# -(& ,*5 ARM720T Data Sheet ( 55.,1+元器件交易网3.= & = & 6 3 = &&. * /'9: + ; +B 49 . . : . ; . .+ 49 "0 "0 +"0 "0 " 4+ . 4+ "+ : + 49 + ;; ++ ++4 .: .: .:: .:9 .:; ;B9 3"! 3"! +3"! 3"! +" :;.;95#&& *4- 6 > 6 8 + && )* 6 *4 8 && +8 - 6 ! + & ! & 6 & - 6 && & 6 = ! && +&& 6& = & & A !< "< & "<+ 6 && = 6 ) *A " 6 && +-. * !'.; 3"! & 3"! .; + # $ & # $'#<< .; " .; &$ & &% .; : 3 ! & 3 !! & #.; 4 " J .; 6666 .; + < 3< 3.; + + " .; + $ & & $ & .; + % & 0$-3 .; + : / & /.; + 4 & ' #/ .; + 9 &6 !#& #.; +" J .; + 66662 K .4+ " 2 K .4$ & & $ &) !" 3 ! %2 K .4 % & 0$-3 L !" 3 ! %2 K .4: & ) !"3 ! %3 !2 K .44 J :2 )+" .; $+ & $!" + .; + $ & $!" .; 5&3 & 5&3 .; 2#/0 & 2#/0 .; : /- & /- .;4 & / ="!#& #.; 9"J .; 666元器件交易网3?-. * ! ' .; ; " & " .; B !3 & !3.; ! " .; & 13 & 13 .; # & # .; 3 $!" & $!" .; = $!" & $!" .; 6 !- & !- .; !-+ & !-+.; +"J .; : 6666*5/ !)5 ,*5* & & /" & 6 + & & & 8 & 6 +" "$- ) * % #$) ( ," <01 ) ) % % * ," /3<= ) #$ % % * % % ," <==# M 3==# <==# ) N O % % 3"! ) ( %" % # * # )4, # $ # $ ! & % #$ ! & % !" O (,. ,) ## 9 & 6 "##K & ' "## & ' = 6 & & & & 7!7 > +- ) = ** * />= & "##) > 6 6 ?+,-- /0 & .*+? /0+ > - 6 +& & > & & 6 - ' ' ( ' , 331+ 6 - & 6 B4A5C ' & & "##) ' & #9+ & "##) > & ' & 6 & # ' 6 = + 6 - % / !)5 ,*5* 77" & 6 6 B4A5C ' & "##)+ 6 > 6 - A" ! = '" ! ' ' / !)5 ,*5* * & " 7 77" !#77" & 6 " 2 &" / !)5 ,*5* "##) > . )< ' & 6 " 2 6 & = & #9 6 *+5 )' # + > 6 6 )3+4 /0 5 /0+ @ #9 "## & 6 & < 7! = " 2 77" !#77" & + 8 & @ #9 "## 6 6 & 6 +> A3+ ! & 6 @ #9 6 L5K "##37 6 6 ' +*+ = "##3 > 6 +)+ 6 @ #9 6 3 "##37 6 6 + )' & 2!<+ % . /0+ #9 "## & 6 & < 7! = " 2 77" !#77" & + 8 & #9 "## 6 6 & 6 +"& 6 & 6 & 6 + "2*3" 2 & ( & & = 1 & & & & +% &# & & / " !- # 6 4 & # ## ! " ! & & &+ ' ( 8 & 1+ ! +) %"2 & < & & < #9 ( #9 1+**& & 8 !#77" & +)'& " 2 6 6 "2 > 6 +' "2 !< + 7 & 6 & 6 "2 " 2M #7 = " 2 & 2% !# & ' 2 6 = " 2 !#77" 77" !#77" &)''& ! & & ' & + & 6 & #7 & ( " 2 6 = !< 6 & 6 &1+ " 2 6 6 & & ! ( 8 1+ < @ & & ' & 6 & 6 &6 +2 & 6 & 6 77" !#77" & +'' )''77" !#77" & )+-.- /0 & "## & 6 &+ = 6 + )*9/0 + ' & " 2 ' & '+ ' & " 2 '/0 ( ' & = & & 6 .1+ 7= & & & ! & + N N & +!#77" & 77" !#77" & 8 & 6 ' = ( N N ' 1 6 ' 6 & & = + & " 2+# 0 * $ / ) 1 & $&' = & 6 & A7 = 6 ( 7!7 " 972" & & & " & & 1 & *45/0 ' & = & ( '/01 '+ > *45 /0 = & L ' K 6 + " 972" 8 6 & N %N ' +L ' K 6 6 6 = 6 6 "2+ & "##& ' ( 8 1 "2 6 & = = "## & ' 6 "2 & & 6 +" 972" & ' & " & & 6 & " 2 + 7 6 & = & 6 &+' " 972" ( 8 1 & ' A" 7 6 " 972" 6 6 5 6 ? ! +" & & 7!7 $ ! & ( 1 + " 972" = 5835+" L ' K 6 6 3 ( " 972" 6 5835+1+ % / ( ;" & " 972" && ' +7 " 6 & ' G 6 & !9 + ' $ & " ' &$ " 2 ! +6 2 ' 6 " + ! & ' 6 " > " 2 6 '+ " 2 & +&!)'.; +# $ 03=:# $ "*).; + + # $/3 # $ /3 ".; + +;# $&" # $ &% " ".; + # $ ! + # $ " '#<< % " .; + ;# $ <5+9 .+&# $ ( " .; + # $3& B# $ 3 % "# +, + 2 " & 3 +,+ /-4' #$ "$- <01 ) H 0 % "$- <01 % . . + 0 % ( ; 3 )+ H 3 " & ; )+:012131!5=$#03= =<' & +H:)""'11 N+O # $ . 3==# <==## &! 05 # !3!#05 1 N O # $ 3==# <==# # &! 05 # !3!#05 4$ $ . :/ 7 . +"$- .<01 ./3<= .<==# .3==# <==#! % %# +, 1/ 2 " & 3 +,1/4& > =+ = 5 / !)5 ,*5* & = ( = 1 = 5855,*5*55+0123.# +, 2 & )& 2 " & 3 +, 24*' & +H )"+"'1= %+H % +< 7% <#7 6 & 8 6 + 6 & 6 " " < 7O" P & = 6 8 6 ' & 6 < + 6 & & 6# +, 2 & 5 66 & & 2 " & 3 +, 4&$ = & & "## + 6 A ! < + 6 L ' K 6 + & ' 6 ' 6 & , ,+ ; 6 & 8 & & = & 8 & +151!" "= =1617101 111389 0 G- /- "!3!# 0"/- "" /- ""/-2/- "1!5=$#/- "0 G- ! $13 "1!" " ! $:5670 13!3!# 0" ! $ " ! $"/-2 ! $1!5=$# ! $#<< <0 5#<< <0 5#<<+<0 5#0" ! $' & +H + )"+911 "= = 1 N+O % "= = 1 N O P 3 % =. + P = % =. +:"'1- =. # / % ( 1P 3 # $ % # !3!#05 <01+ P = # $ % # !3!#05 <01+ "'1" = / % ( 1P 3 # $ % "+ P = # $ % "1P 3 # $ % "/-2+ P = # $ % "/-2++"'10 = / % ! 5 # $ / % = 1P 3 # $ % # 1!5=$#+ P = # $ % # 1!5=$#/ % N+O % #$ N O ( %% % % 1/<< * % , 1 P - Q + P %1 / % 1 N+O 1P - 1 %+ P ! 1 %1 1 " 1 N+O ;"'"= = = H 1 "= = = * % ,*41P - 1 "= = %+ P ! 1 "= = %1 1 " 1 N+O "'# 6 = H !3#! 0" -0 05 * % ,1P - # 6+ P ! # 6 %1 # 6 / % 1 N+O % 1P - " ( *" , ( )% + P " ( *" , ( )%1 " / % 1 N+O % 4"'"/= * % ,1P - " / ( )% + P " / ( )%1 "/ / % 1 N+O % 1 P - 0 ( Q + P 0 ( 1 0 = / % 1 N+O %"'#<<< ( 1P #<< ( + P #<< % (1 N+O % #<< $ ( "'#<<< ( 1P #<< ( + P #<< % (1 N+O % #<< $ ( 1P < 3 #<< ( +P < 3 #<< % (1 N+O % #<<+ $ ( "'#0" %1 P - #0" Q + P #0"1 N+O % #0"# # +, ( )* ( & 2 " & 3 +,(674& > "##) ' "## & "##3 # '+ ! 8 6 & & > #9 & 6 & > "##3 # '+ (" 1 = 5836+1617101 111389#<< =-!&<=#<<+=-!&<=#<<+ 6"=D:56713#<< $ =#<< 6"=D $#3! =#<< 6"=D' & +H +9)"+4"'1 #<< 0% % % #<< < ( 3 *<3, " #<<#<<+。

MEMORY存储芯片N25W032A11EF640F中文规格书

MEMORY存储芯片N25W032A11EF640F中文规格书

the WRITE diagrams show the nominal case, and where the two extreme cases (t DQSS[MIN] and t DQSS [MAX]) might not be intuitive, they have also been included. Figure 58(page 107) shows the nominal case and the extremes of t DQSS for BL = 4. Upon com-pletion of a burst, assuming no other commands have been initiated, the DQ will re-main High-Z and any additional input data will be ignored.Data for any WRITE burst may be concatenated with a subsequent WRITE command to provide continuous flow of input data. The first data element from the new burst is ap-plied after the last element of a completed burst. The new WRITE command should be issued x cycles after the first WRITE command, where x equals BL/2.Figure 59 (page 108) shows concatenated bursts of BL = 4 and how full-speed random write accesses within a page or pages can be performed. An example of nonconsecutive WRITEs is shown in Figure 60 (page 108). DDR2 SDRAM supports concurrent auto pre-charge options, as shown in Table 43.DDR2 SDRAM does not allow interrupting or truncating any WRITE burst using BL = 4operation. Once the BL = 4 WRITE command is registered, it must be allowed to com-plete the entire WRITE burst cycle. However, a WRITE BL = 8 operation (with auto pre-charge disabled) might be interrupted and truncated only by another WRITE burst as long as the interruption occurs on a 4-bit boundary due to the 4n -prefetch architecture of DDR2 SDRAM. WRITE burst BL = 8 operations may not be interrupted or truncated with any command except another WRITE command, as shown in Figure 61(page 109).Data for any WRITE burst may be followed by a subsequent READ command. To follow a WRITE, t WTR should be met, as shown in Figure 62 (page 110). The number of clock cycles required to meet t WTR is either 2 or t WTR/t CK, whichever is greater. Data for any WRITE burst may be followed by a subsequent PRECHARGE command. t WR must be met, as shown in Figure 63 (page 111). t WR starts at the end of the data burst, regardless of the data mask condition.Table 43: WRITE Using Concurrent Auto Precharge2Gb: x4, x8, x16 DDR2 SDRAM WRITEExtended Mode Register 2 (EMR2)The extended mode register 2 (EMR2) controls functions beyond those controlled by the mode register. Currently all bits in EMR2 are reserved, except for E7, which is used in commercial or high-temperature operations, as shown in Figure 41. The EMR2 is pro-grammed via the LM command and will retain the stored information until it is pro-grammed again or until the device loses power. Reprogramming the EMR will not alter the contents of the memory array, provided it is performed correctly.Bit E7 (A7) must be programmed as 1 to provide a faster refresh rate on IT and AT devi-ces if T C exceeds 85°C.EMR2 must be loaded when all banks are idle and no bursts are in progress, and the controller must wait the specified time t MRD before initiating any subsequent opera-tion. Violating either of these requirements could result in an unspecified operation.Figure 41: EMR2 DefinitionExtended mode register (Ex)Address bus21Notes: 1.E16 (BA2) is only applicable for densities ุ1Gb, reserved for future use, and must be pro-grammed to 0.2.Mode bits (E n ) with corresponding address balls (A n ) greater than E12 (A12) are re-served for future use and must be programmed to 0.2Gb: x4, x8, x16 DDR2 SDRAM Extended Mode Register 2 (EMR2)Figure 67: Data Input TimingDQSDQS#DM DQCKCK#T1T0T1n T2T2n T3T4T3n Don’t CareTransitioning Data Notes: 1.t DSH (MIN) generally occurs during t DQSS (MIN).2.t DSS (MIN) generally occurs during t DQSS (MAX).3.Subsequent rising DQS signals must align to the clock within t DQSS.4.WRITE command issued at T0.5.For x16, LDQS controls the lower byte and UDQS controls the upper byte.6.WRITE command with WL = 2 (CL = 3, AL = 0) issued at T0.PRECHARGEPrecharge can be initiated by either a manual PRECHARGE command or by an autopre-charge in conjunction with either a READ or WRITE command. Precharge will deacti-vate the open row in a particular bank or the open row in all banks. The PRECHARGE operation is shown in the previous READ and WRITE operation sections.During a manual PRECHARGE command, the A10 input determines whether one or all banks are to be precharged. In the case where only one bank is to be precharged, bank address inputs determine the bank to be precharged. When all banks are to be pre-charged, the bank address inputs are treated as “Don’t Care.”Once a bank has been precharged, it is in the idle state and must be activated prior to any READ or WRITE commands being issued to that bank. When a single-bank PRE-CHARGE command is issued, t RP timing applies. When the PRECHARGE (ALL) com-mand is issued, t RPA timing applies, regardless of the number of banks opened.2Gb: x4, x8, x16 DDR2 SDRAM PRECHARGE。

CC2541中文数据手册

CC2541中文数据手册
POWER-ON RESET BROWN OUT
VDD (2 V–3.6 V) DCOUPL
SFR bus
SLEEP TIMER
HIGH SPEED RC-OSC
32-kHz RC-OSC
POWER MGT. CONTROLLER
8051 CPU CORE
DMA
PDATA XRAM IRAM
SFR
UNIFIED
true
为片上系统(SoC)解决方案
蓝牙
low
能源和专有的2.4-GHz应用.它使建立强大的网络节点
,同时降低总体材料清单成本. CC2541结合了领先的
RF收发器,业界标准的增强型8051 MCU,性能优良的系统内可 编程闪存,8 KB RAM和许多其他强大的支持功能和外设
. CC2541是非常适合需要超低功耗的系统.这是指
ADC,转换时
MIN TYP MAX单位 17.9
20.2 mA
16.8
18.2
270
1
µA
0.5
6.7
mA
90
90
60
μA
70
0.6
1.2
mA
4
提交文档反馈
产品文件夹链接(s): CC2541
Copyright © 2012, Texas Instruments Incorporated
CC2541
1Mbps的GFSK,250 kHz的偏差,
蓝牙
A = 25°C和VDD = 3 V, 低能量模式,和0.1%BER
参数
测试条件
RX模式,标准模式,没有外设活跃,低MCU 活动
高增益模式下,RX模式,没有外设活跃,低MCU 活动

2P4M中文资料(nec)中文数据手册「EasyDatasheet - 矽搜」

2P4M中文资料(nec)中文数据手册「EasyDatasheet - 矽搜」

热阻
Rt h(j-c )
结到外壳DC


10 °C/W 参照图11
Rt h(j-a)
结到环境DC


75
Note 插入阻力门极和阴极之间的低于1kΩ,因为显示的项都受到保障
连接门极和阴极(R之间的短期阻力
GK = 1 kΩ).
2
Data Sheet D13531EJ5V0DS
芯片中文手册,看全文,戳

门非触发电压
Note
VGD VDM = 1/2 V DRM , Tj = 125°C,
0.2
TYP. MAX. UNIT 备注

10
μA


100


10
μA


100



V/μs 2P4M
10

2P6M

2.2
V 参照图1

200
μA 参照图5,
图. 7

0.8
V 参照图6,
图. 8


V

保持电流
“专业”:运输设备(汽车,火车,船舶等),交通控制系统,防灾 系统,反犯罪系统,安全设备和医疗设备(不包括专门为生命而设计的).
“特殊”:飞机,航空设备,水下中继器,核反应堆控制系统,生命
支持系统和生命支持等医疗设备
文所定义).
M8E 02. 11-1
典型特征(T
A = 25°C)
2P4M,2P6M
3
Data Sheet D13531EJ5V0DS
芯片中文手册,看全文,戳
2P4M,2P6M

VSP2566PTG4资料

VSP2566PTG4资料

P R O D U C T P R E V I E WFEATURESDESCRIPTIONVSP2560VSP2562VSP2566 SBES008–AUGUST 2008CCD ANALOG FRONT-END FOR DIGITAL CAMERAS•CCD Signal Processing:The VSP2560/62/66are a family of complete mixed-signal processing ICs for digital cameras that –36-MHz Correlated Double Sampling (CDS)provide correlated double sampling (CDS)and •Output Resolution:analog-to-digital conversion for the output of CCD –VSP2560(10-Bit)arrays.The CDS extracts the pixel video information –VSP2562(12-Bit)from the CCD signal,and the analog-to-digital converter (ADC)converts the digital signal.For –VSP2566(16-Bit)varying illumination conditions,a very stable gain •16-Bit Analog-to-Digital Conversion:control of –9dB to 44dB is provided.The gain –36-MHz Conversion Rate control is linear in dB.Input signal clamping and offset correction of the input CDS are also provided.–No Missing Codes Ensured•80-dB Input-Referred SNR (at Gain =12dB)Offset correction is performed by the optical black (OB)level calibration loop,and is held in calibrated •Programmable Black Level Clamping black level clamping for an accurate black level •Programmable Gain Amp (PGA):reference.Additionally,the black level is quickly ––9dB to +44dBrecovered after gain changes.The VSP2560/62/66are available in LQFP-48packages and operate from ––3dB to +18dB (Analog Front Gain)single +3V supplies.––6dB to +26dB (Digital Gain)•Portable Operation:–Low Voltage:2.7V to 3.6V–Low Power:86mW at 3.0V,36MHz –Low Power:6mW (Standby Mode)•Two-Channel,General-Purpose,8-Bit DAC •QFP-48PackageFEATURE COMPARISON BY DEVICETRANSFER CHARACTERISTICS(LSB)OB CLAMP LOOP (LSB)RESOLUTIONPROGRAMMABLEOBCLP DEVICE (Bits)DNL INL RANGELEVEL OB LEVELVSP256010±0.5±116to 78322VSP256212±0.5±264to 3121288VSP256616±2±321024to 49922048128Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.PRODUCT PREVIEW information concerns products in the Copyright ©2008,Texas Instruments Incorporatedformative or design phase of development.Characteristic data andPRODUCT PREVIEWABSOLUTE MAXIMUM RATINGS (1)VSP2560VSP2562VSP2566SBES008–AUGUST This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.ORDERING INFORMATION (1)SPECIFIED PACKAGE-PACKAGE TEMPERATUREPACKAGE ORDERING TRANSPORT MEDIA,PRODUCT LEAD DESIGNATORRANGE MARKING NUMBER QUANTITY VSP2560PT Tray,250Pieces VSP2560QFP-48PT –25°C to +85°C VSP2560VSP2560PTR Tape and Reel VSP2562PT Tray,250Pieces VSP2562QFP-48PT –25°C to +85°C VSP2562VSP2562PTR Tape and Reel VSP2566PT Tray,250Pieces VSP2566QFP-48PT–25°C to +85°CVSP2566VSP2566PTRTape and Reel(1)For the most current package and ordering information see the Package Option Addendum at the end of this document,or see the TI web site at .Over operating free-air temperature range,unless otherwise noted.VSP2560,VSP2562,VSP2566UNIT Supply voltage (VCC,VDD)+4V Supply voltage differences (among VCC pins)±0.1V Ground voltage differences (AGND,DGND)±0.1V Digital input voltage –0.3to (VCC +0.3)V Analog input voltage–0.3to (VCC +0.3)V Input current (all pins except supplies)±10mA Ambient temperature under bias –25to +85°C Storage temperature –55to +125°C Junction temperature+150°C Package temperature (IR reflow,peak)+260°C(1)Stresses above these ratings may cause permanent damage.Exposure to absolute maximum conditions for extended periods may degrade device reliability.These are stress ratings only,and functional operation of the device at these or any other conditions beyond those specified is not implied.2Submit Documentation Feedback Copyright ©2008,Texas Instruments IncorporatedP R O D U C T P R E V I E WELECTRICAL CHARACTERISTICS:VSP2560VSP2560VSP2562VSP2566 SBES008–AUGUST 2008All specifications at T A =+25°C,all power-supply voltages =+3.0V,and conversion rate =36MHz,no load,unless otherwise noted.VSP2560PTPARAMETERTEST CONDITIONSMINTYPMAXUNITRESOLUTION Resolution10BitsCONVERSION/CLOCK RATE Conversion/clock rate 36MHzANALOG INPUT (CCDIN)Input signal level for full-scale out CDS gain =0dB,DPGA gain =0dB 1000mV Maximum input range CDS gain =–3dB ,DPGA gain =0dB1300mV Input capacitance 15pF Input limit–0.33.3VTRANSFER CHARACTERISTICS Differential nonlinearity (DNL)CDS gain =0dB,DPGA gain =0dB ±0.5LSB Integral nonlinearity (INL)CDS gain =0dB,DPGA gain =0dB±1LSBNo missing codesEnsuredStep response settling time Full-scale step input 1Pixel Overload recovery time Step input from 1.8V to 0V 2Pixels Data latency6Clock Grounded input capacitor,PGA gain =0dB 76dB Signal-to-noise ratio (1)Grounded input capacitor,CDS gain =+12dB68dB CCD offset correction range –200200mV INPUT CLAMP Clamp on-resistance 400ΩClamp level1.25VPROGRAMMABLE ANALOG FRONT GAIN (CDS)Minimum gain Gain code =111–3dB Default gain Gain code =0000dB Medium gain 1Gain code =0016dB Medium gain 2Gain code =01012dB Maximum gain Gain code =01118dB Gain control error0.5dBPROGRAMMABLE DIGITAL GAIN (DPGA)Programmable gain range –626dB Gain step0.032dBOPTICAL BLACK CLAMP LOOP Control DAC resolution 10Bits Loop time constant OB loop IDAC is x140.7µs Programmable range of clamp level 1678LSB Optical black clamp levelOBCLP level at code =01000b32LSB OB level program step2LSB(1)SNR =20log (full-scale voltage/rms noise).Copyright ©2008,Texas Instruments Incorporated Submit Documentation Feedback 3PRODUCT PREVIEW ELECTRICAL CHARACTERISTICS:VSP2562VSP2560VSP2562VSP2566SBES008–All specifications at T A=+25°C,all power-supply voltages=+3.0V,and conversion rate=36MHz,no load,unless otherwise noted.VSP2562PTPARAMETER TEST CONDITIONS MIN TYP MAX UNIT RESOLUTIONResolution12Bits CONVERSION/CLOCK RATEConversion/clock rate36MHz ANALOG INPUT(CCDIN)Input signal level for full-scale out CDS gain=0dB,DPGA gain=0dB1000mV Maximum input range CDS gain=–3dB,DPGA gain=0dB1300mV Input capacitance15pF Input limit–0.3 3.3V TRANSFER CHARACTERISTICSDifferential nonlinearity(DNL)CDS gain=0dB,DPGA gain=0dB±0.5LSB Integral nonlinearity(INL)CDS gain=0dB,DPGA gain=0dB±2LSBNo missing codes EnsuredStep response settling time Full-scale step input1Pixel Overload recovery time Step input from1.8V to0V2Pixels Data latency6ClockGrounded input capacitor,PGA gain=0dB76dB Signal-to-noise ratio(1)Grounded input capacitor,CDS gain=+12dB68dB CCD offset correction range–200200mV INPUT CLAMPClamp on-resistance400ΩClamp level 1.25V PROGRAMMABLE ANALOG FRONT GAIN(CDS)Minimum gain Gain code=111–3dB Default gain Gain code=0000dB Medium gain1Gain code=0016dB Medium gain2Gain code=01012dB Maximum gain Gain code=01118dB Gain control error0.5dB PROGRAMMABLE DIGITAL GAIN(DPGA)Programmable gain range–626dB Gain step0.032dB OPTICAL BLACK CLAMP LOOPControl DAC resolution10Bits Loop time constant OB loop IDAC is x140.7µsProgrammable range of clamp level64312LSB Optical black clamp level OBCLP level at code=01000b128LSBOB level program step8LSB (1)SNR=20log(full-scale voltage/rms noise).4Submit Documentation Feedback Copyright©2008,Texas Instruments IncorporatedP R O D U C T P R E V I E WELECTRICAL CHARACTERISTICS:VSP2566VSP2560VSP2562VSP2566 SBES008–AUGUST 2008All specifications at T A =+25°C,all power-supply voltages =+3.0V,and conversion rate =36MHz,no load,unless otherwise noted.VSP2566PTPARAMETERTEST CONDITIONSMINTYPMAXUNITRESOLUTION Resolution16BitsCONVERSION/CLOCK RATE Conversion/clock rate 36MHzANALOG INPUT (CCDIN)Input signal level for full-scale out CDS gain =0dB,DPGA gain =0dB 1000mV Maximum input range CDS gain =–3dB ,DPGA gain =0dB1300mV Input capacitance 15pF Input limit–0.33.3VTRANSFER CHARACTERISTICS Differential nonlinearity (DNL)CDS gain =0dB,DPGA gain =0dB ±2LSB Integral nonlinearity (INL)CDS gain =0dB,DPGA gain =0dB±32LSBNo missing codesEnsuredStep response settling time Full-scale step input 1Pixel Overload recovery time Step input from 1.8V to 0V 2Pixels Data latency6Clock Grounded input capacitor,PGA gain =0dB 76dB Signal-to-noise ratio (1)Grounded input capacitor,CDS gain =+12dB68dB CCD offset correction range –200200mV INPUT CLAMP Clamp on-resistance 400ΩClamp level1.25VPROGRAMMABLE ANALOG FRONT GAIN (CDS)Minimum gain Gain code =111–3dB Default gain Gain code =0000dB Medium gain 1Gain code =0016dB Medium gain 2Gain code =01012dB Maximum gain Gain code =01118dB Gain control error0.5dBPROGRAMMABLE DIGITAL GAIN (DPGA)Programmable gain range –626dB Gain step0.032dBOPTICAL BLACK CLAMP LOOP Control DAC resolution 10Bits Loop time constant OB loop IDAC is x140.7µs Programmable range of clamp level 10244992LSB Optical black clamp levelOBCLP level at code =01000b2048LSB OB level program step128LSB(1)SNR =20log (full-scale voltage/rms noise).Copyright ©2008,Texas Instruments Incorporated Submit Documentation Feedback 5PRODUCT PREVIEW ELECTRICAL CHARACTERISTICS:GENERALVSP2560VSP2562VSP2566SBES008–All specifications at T A=+25°C,all power supply voltages=+3.0V,and conversion rate=36MHz,no load,unless otherwise noted.VSP2560PT,VSP2562PT,VSP2566PTPARAMETER TEST CONDITIONS MIN TYP MAX UNIT GENERAL-PURPOSE,8-BIT DAC(CHANNELS A,B)Minimum output voltage Input code=000000000.1V Maximum output voltage Input code=11111111 2.9V Differential nonlinearity(DNL)At input code=0Fh to E0h±0.25LSB Integral nonlinearity(INL)At input code=0F to E0h±1LSB Offset error±100mV Gain error±5% Monotonicity EnsuredMinimum load resistance10kΩMaximum load capacitance1000pF DIGITAL INPUTSLogic family CMOSV T+Low-to-high threshold voltage 1.7V Input voltageV T–High-to-low threshold voltage 1.0VI IH Logic high,V IN=+3V±20µA Input currentI IL Logic low,V IN=0V±20µA Input capacitance5pF Maximum input voltage–3.0V CC+0.3V DIGITAL OUTPUTSLogic family CMOSLogic coding Straight binaryV OH Logic high 2.4V Output voltageV OL Logic low0.4VOutput data delay code=000nsOutput data delay code=012ns Additional output data delayOutput data delay code=104nsOutput data delay code=116ns POWER SUPPLYVCCSupply voltage 2.7 3.0 3.6VVDDPower dissipation(at3.0V,36MHz)86mWClocks(SHP/SHD/ADCCK)Standby mode power dissipation6mWoff mode:(at3.0V)TEMPERATURE RANGEOperation temperature–25+85°C Thermal resistance,QFPθJA100°C/W6Submit Documentation Feedback Copyright©2008,Texas Instruments IncorporatedP R O D U C T P R E V I E WTIMING CHARACTERISTICSTG HIGH-SPEED PULSECCDSHPSHDADCCKB0B9-VSP2560VSP2562VSP2566 SBES008–AUGUST 2008Figure 1.TG High-Speed Pulse Timing TIMING CHARACTERISTICS FOR Figure 1PARAMETER (1)(2)MIN TYPMAXUNIT t CKP Clock period 27.7ns t ADC ADCCK high or low level13.8ns t WP SHP pulse width 6.9ns t WD SHD pulse width6.9ns t PD SHP trailing edge to SHD leading edge 6.9ns t DP SHD trailing edge to SHP leading edge6.9ns t S Sampling delay3ns Inhibited clock period (from rising edge of SHP tot INHIBIT –310ns rising edge of ADCCK)t OD Output delay (3)05ns DLData latency6Clocks(1)t PD +t WD should be nearly equal to t DP +t WP .(2)The t WP and t WD specifications assume a driving impedance of less than 30Ωat CCDIN.(3)Data output delay by AFE-ctrl(2)register is 0ns.Copyright ©2008,Texas Instruments Incorporated Submit Documentation Feedback 7PRODUCT PREVIEW SERIAL INTERFACE TIMINGSDATASCLKSLOADRLOADVSP2560VSP2562VSP2566SBES008–Figure2.Serial Interface TimingTIMING CHARACTERISTICS FOR Figure2(1)t PD+t WD should be nearly equal to t DP+t WP.(2)The t WP and t WD specifications assume a driving impedance of less than30Ωat CCDIN.The data shift operation should decode at the rising edges of SCLK while S LOAD is low.Furthermore,the input address and data of the serial data stream are loaded to the parallel latch in the VSP2560/62/66at the rising edge of S LOAD.8Submit Documentation Feedback Copyright©2008,Texas Instruments IncorporatedP R O D U C T P R E V I E WDEVICE INFORMATION363534333231302928272625NC COB BYPP BYP CCDGND CCDIN AGND AGND VCC VCC DACOUT B DACOUT AN CB 8N CB 9 (M S B )R L O A DV D DS C L KD G N DS D A T AA D C C KS L O A DV C CR E S E TC L PD MA G N DC L P O BV C CP B L KR E F PS H PR E F NS H DC MA G N D123456789101112NC NC NC NC B0 (LSB)B1B2B3B4B5B6B7484746454443424140393813141516171819202122233724VSP2560VSP2562VSP2566 SBES008–AUGUST 2008VSP2560PT PACKAGE (QFP-48)(TOP VIEW)TERMINAL FUNCTIONS (VSP2560)TERMINAL NAME PIN TYPE (1)DESCRIPTIONNC 1—No connection NC 2—No connection NC 3—No connection NC 4—No connection B05DO Data out bit 0(LSB)B16DO Data out bit 1B27DO Data out bit 2B38DO Data out bit 3B49DO Data out bit 4B510DO Data out bit 5B611DO Data out bit 6B712DO Data out bit 7B813DO Data out bit 8B914DO Data out bit 9(MSB)VDD 15P Digital power supply for data output DGND 16P Digital ground for data output ADCCK 17DI Clock for digital output buffer VCC 18P Analog power supply CLPDM 19DICLPDM signal(1)Designators in TYPE:P =power supply and ground;DI =digital input;DO =digital output;AI =analog input;and AO =analog output.Copyright ©2008,Texas Instruments IncorporatedSubmit Documentation Feedback9PRODUCT PREVIEW VSP2560VSP2562VSP2566SBES008–TERMINAL FUNCTIONS(VSP2560)(continued)TERMINALNAME PIN TYPE(1)DESCRIPTIONCLPOB20DI CLPOB signalPBLK21DI PBLK signalSHP22DI Sampling clock for reference level of CCD signalSHD23DI Sampling clock for data level of CCD signalAGND24P Analog groundDACOUT A25AO General-purpose8-bit DAC output ADACOUT B26AO General-purpose8-bit DAC output BVCC27P Analog power supplyVCC28P Analog power supplyAGND29P Analog groundAGND30P Analog groundCCDIN31AI CCD signal inputCCDGND32AI CCD signal input groundBYP33AO Internal reference bypass to ground(0.1µF)BYPP34AO Internal reference bypass to ground(1000pF)COB35AO OB loop feedback capacitorNC36—No connectionCM37AO Internal reference bypass to ground(0.1µF)REFN38AO Internal reference bypass to ground(0.1µF)REFP39AO Internal reference bypass to ground(0.1µF)VCC40P Analog power supplyAGND41P Analog groundRESET42DI System resetS LOAD43DI Serial data latch signalSDATA44DI Serial data inputSCLK45DI Serial data clockR LOAD46DI Serial data update control signalNC47—No connectionNC48—No connection10Submit Documentation Feedback Copyright©2008,Texas Instruments IncorporatedP R O D U C T P R E V I E W363534333231302928272625NC COB BYPP BYP CCDGND CCDIN AGND AGND VCC VCCDACOUT BDACOUT AN CB 10N CB 11 (M S B )R L O A DV D DS C L KD G N DS D A T AA D C C KS L O A DV C CR E S E TC L PD MA G N DC L P O BV C CP B L KR E F PS H PR E F NS H DC MA G N D123456789101112NC NC B0 (LSB)B1B2B3B4B5B6B7B8B9484746454443424140393813141516171819202122233724VSP2562PT PACKAGE (QFP-48)(TOP VIEW)TERMINAL FUNCTIONS (VSP2562)TERMINAL NAME PIN TYPE (1)DESCRIPTIONNC 1—No connection NC 2—No connection B03DO Data out bit 0(LSB)B14DO Data out bit 1B25DO Data out bit 2B36DO Data out bit 3B47DO Data out bit 4B58DO Data out bit 5B69DO Data out bit 6B710DO Data out bit 7B811DO Data out bit 8B912DO Data out bit 9B1013DO Data out bit 10B1114DO Data out bit 11(MSB)VDD 15P Digital power supply for data output DGND 16P Digital ground for data output ADCCK 17DI Clock for digital output buffer VCC 18P Analog power supply CLPDM 19DI CLPDM signal CLPOB 20DICLPOB signal(1)Designators in TYPE:P =power supply and ground;DI =digital input;DO =digital output;AI =analog input;and AO =analog output.TERMINAL FUNCTIONS(VSP2562)(continued) TERMINALNAME PIN TYPE(1)DESCRIPTIONPBLK21DI PBLK signalSHP22DI Sampling clock for reference level of CCD signalSHD23DI Sampling clock for data level of CCD signalAGND24P Analog groundDACOUT A25AO General-purpose8-bit DAC output ADACOUT B26AO General-purpose8-bit DAC output BVCC27P Analog power supplyVCC28P Analog power supplyAGND29P Analog groundAGND30P Analog groundCCDIN31AI CCD signal inputCCDGND32AI CCD signal input groundBYP33AO Internal reference bypass to ground(0.1µF)BYPP34AO Internal reference bypass to ground by(1000pF)COB35AO OB loop feedback capacitor PRODUCT PREVIEWNC36—Non connectionCM37AO Internal reference bypass to ground(0.1µF)REFN38AO Internal reference bypass to ground(0.1µF)REFP39AO Internal reference bypass to ground(0.1µF)VCC40P Analog power supplyAGND41P Analog groundRESET42DI System resetS LOAD43DI Serial data latch signalSDATA44DI Serial data inputSCLK45DI Serial data clockR LOAD46DI Serial data update control signalNC47—No connectionNC48—No connectionP R O D U C T P R E V I E W363534333231302928272625NC COB BYPP BYP CCDGND CCDIN AGND AGND VCC VCC DACOUT B DACOUT AB 1B 14B 0 (L S B )B 15 (M S B )R L O A DV D DS C L KD G N DS D A T AA D C C KS L O A DV C CR E S E TC L PD MA G N DC L P O BV C CP B L KR E F PS H PR E F NS H DC MA G N D123456789101112B2B3B4B5B6B7B8B9B10B11B12B13484746454443424140393813141516171819202122233724VSP2566PT PACKAGE (QFP-48)(TOP VIEW)TERMINAL FUNCTIONS (VSP2566)TERMINAL NAME PIN TYPE (1)DESCRIPTIONB21DO Data out bit 2B32DO Data out bit 3B43DO Data out bit 4B54DO Data out bit 5B65DO Data out bit 6B76DO Data out bit 7B87DO Data out bit 8B98DO Data out bit 9B109DO Data out bit 10B1110DO Data out bit 11B1211DO Data out bit 12B1312DO Data out bit 13B1413DO Data out bit 14B1514DO Data out bit 15(MSB)VDD 15P Digital power supply for data output DGND 16P Digital ground for data output ADCCK 17DI Clock for digital output buffer VCC 18P Analog power supply CLPDM 19DI CLPDM signal CLPOB 20DICLPOB signal(1)Designators in TYPE:P =power supply and ground;DI =digital input;DO =digital output;AI =analog input;and AO =analog output.TERMINAL FUNCTIONS(VSP2566)(continued) TERMINALNAME PIN TYPE(1)DESCRIPTIONPBLK21DI PBLK signalSHP22DI Sampling clock for reference level of CCD signalSHD23DI Sampling clock for data level of CCD signalAGND24P Analog groundDACOUT125AO General-purpose8-bit DAC(1)outputDACOUT226AO General-purpose8-bit DAC(2)outputVCC27P Analog power supplyVCC28P Analog power supplyAGND29P Analog groundAGND30P Analog groundCCDIN31AI CCD signal inputCCDGND32AI CCD signal input groundBYP33AO Internal reference bypass to ground(0.1µF)BYPP34AO Internal reference bypass to ground by(1000pF)COB35AO OB loop feedback capacitor PRODUCT PREVIEWNC36—Non connectionCM37AO Internal reference bypass to ground(0.1µF)REFN38AO Internal reference bypass to ground(0.1µF)REFP39AO Internal reference bypass to ground(0.1µF)VCC40P Analog power supplyAGND41P Analog groundRESET42DI System resetS LOAD43DI Serial data latch signalSDATA44DI Serial data inputSCLK45DI Serial data clockR LOAD46DI Serial data update control signalB047DO Data out bit0(LSB)B148DO Data out bit1P R O D U C T P R E V I E WFUNCTIONAL BLOCK DIAGRAMDigital OutputPRODUCT PREVIEWSYSTEM DESCRIPTIONOVERVIEWDigital Output10/12/16-BitThe VSP2560/62/66are a family of complete mixed-signal ICs that contain all of the key features associated with the processing of the charge-coupled device (CCD)imager output signal in a video camera,digital still camera,security camera,or other similar applications.Figure 3shows a simplified block diagram of the VSP2560/62/66.The VSP2560/62/66include a correlated double sampler (CDS),a programmable gain amplifier (PGA),an analog-to-digital converter (ADC),an input clamp,an optical black (OB)level clamp loop,a serial interface,timing control,and a reference voltage generator.It is recommend that an off-chip emitter follower be placed between the CCD output and the VSP2560/62/66CCDIN input.All of the functions and parameters (such as PGA gain control,operation mode,and other settings)can be changed through the serial interface.All parameters are reset to the default value when the RESET pin goes to low asynchronously from the clocks.The VSP2560/62/66also provide a two-channel,general-purpose,8-bit digital-to-analog converter (DAC).This DAC can be applied to various applications,such as CCD bias control,iris control,and so forth.Figure 3.Simplified Block DiagramP R O D U C T P R E V I E WCORRELATED DOUBLE SAMPLER (CDS)REFPCCD InputINPUT CLAMP16-BIT ADCThe output signal of a CCD image sensor is sampled twice during one pixel period:once at the reference interval,and again at the data interval.Subtracting these two samples extracts the pixel video information and removes any noise that is common (or correlated)to both intervals.Thus,it is very important to reduce the reset noise and low-frequency noises that are present on the CCD output signal through the CDS.Figure 4shows a block diagram of the CDS.Figure 4.CDS and Input Clamp Block DiagramThe buffered CCD output is capacitively coupled to the VSP2560/62/66.The purpose of the input clamp is to restore the dc component of the input signal that was lost with the ac coupling,and establish the desired dc bias point for the CDS.The block diagram of Figure 4also shows the input clamp.The input level is clamped to the internal reference voltage,REFP (1.5V),during the dummy pixel interval.More specifically,the clamping function becomes active when both CLPDM and SHP are active.Immediately after device power-on,the input capacitor clamp voltage is not charged.For fast charge-up of the clamp voltage,the VSP2560/62/66provide a boost-up circuit.The VSP2560/62/66include a high-speed,16-bit ADC.This ADC uses a fully-differential pipelined architecture with correction.This architecture,incorporating ADC correction,is very advantageous for realizing better linearity for a smaller signal level as a result of the large linearity errors that tend to occur at specific points in the full-scale range;linearity also improves for a signal level below that specific point.The ADC ensures 16-bit resolution across the entire full-scale range.PRODUCT PREVIEW OPTICAL BLACK LEVEL(OB)LOOP AND OB CLAMP LEVELOB ClampLevelT =C16384I´MIN(1) SR =IMAXC(2) The VSP2560/62/66have a built-in optical black(OB)offset self-calibration circuit(OB loop)that compensates the OB level by using OB pixels output from the CCD image sensor.A block diagram of the OB loop and OB clamp circuit is shown in D offset is compensated by converging this calibration circuit while activating the CLPOB pin during a period when the OB pixels are output from the CCD.Figure5.OB Loop and OB Level ClampAt the CDS circuit,the CCD offset is compensated as a difference between the reference level and the OB pixel data level.These compensated signal levels are recognized as actual OB levels,and the outputs are clamped to the OB levels set by the serial interface.These OB levels are the base of black for the effective pixel period thereafter.Because DPGA,which is a gain stage,is outside the OB loop,the OB levels are not affected even when the gain is changed.The converging time of the OB loop is determined based on the capacitor value connected to the COB terminal and output from the current output DAC(IDAC)of the loop.The time constant can be obtained from Equation1:Where:•C is the capacitor value connected to COB•I MIN is the minimum current(0.15µA)of the IDAC,which is the current equivalent to1LSB of the IDAC output.When C=0.1µF,T is40.7µs.Slew rate(SR)can be obtained from Equation2:Where:•C is the capacitor value connected to COB•I MAX is the maximum current(153µA)of the IDAC,which is the current equivalent to1023LSB of the IDAC output.IDAC output current multiplication is provided by the VSP2560/62/66.This function increases the IDAC output current through the serial interface in multiples of2,4,and8.Increased IDAC current shortens the time constant of the OB loop.In this case,the OB level is drastically changed and must quickly settle the OB loop;this function is effective.Immediately after power-on,the COB capacitor voltage is not charged.For fast start up,a COB voltage boost-up circuit is provided.P R O D U C T P R E V I E WPROGRAMMABLE GAIN1282561024Input Code for Gain Control (0 to 1023)302520151050-5-10G a i n (d B )384512640768896PRE-BLANKING AND DATA LATENCYThe OB clamp level (digital output value)can be externally set through the serial interface by inputting the digital code to the OB clamp level register.The digital codes to be input and the corresponding OB clamp levels are shown in Table 1.Table 1.Input Codes and OB Clamp Levels to be SetCLAMP LEVELCODE VSP2560(10-Bit)VSP2562(12-Bit)VSP2566(16-Bit)00000b 16LSB 64LSB 1024LSB 00001b 18LSB 72LSB 1152LSB————00110b 28LSB 112LSB 1792LSB 00111b 30LSB 120LSB 1920LSB 01000b (default)32LSB 128LSB 2048LSB 01001b 34LSB 136LSB 2176LSB————11110b 76LSB 304LSB 4864LSB 11111b78LSB312LSB4992LSBThe VSP2560/62/66have gains that range from –9dB to 44dB.The desired gain is set as a combination of CDS gain and the digital programmable gain amplifier (DPGA).The CDS gain can be programmed from 0dB to 18dB in 6-dB steps,and has a –3-dB gain for the large input signal (such as over 1V).Digital gain can be programmed from –6dB to 26dB in 0.032-dB steps.Both gain controls are managed through the serial interface.The digital gain changes linearly in proportion to the settling code.Figure 6shows the relationship of input code to digital gain.Figure 6.Settling Code versus Digital GainThe recommended usage of the combination of CDS and digital gain is to adjust the CDS gain first,primarily as an image signal amplification;afterwards,use the digital gain as an adaptive gain control.The wide range of digital gain covers the necessary gain range on most typical applications.If the CDS gain must be changed,however,it is recommended to change it during a period that does not affect picture quality (such as a blanking period).The VSP2560/62/66have a pre-blanking function.When PBLK is low,the digital outputs all become '0'at the eighth rising edge of ADCCK after PBLK goes low,to accommodate the clock latency of the VSP2560/62/66.The data latency of this family of devices is six clock cycles.The digital output data are transmitted at the rising edge of ADCCK with a delay of six clock cycles.。

HP RX2660服务器技术参数说明及详细列表

HP RX2660服务器技术参数说明及详细列表

HP RX2660服务器技术参数说明及详细列表HP Integrity rx2660动能服务器带来了全新的入门级价值。

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凭借可轻松处理繁重的应用层和事务工作负载的出色性能和容量,它将是您满足数据库、Java™、商务智能和技术计算需求的理想之选。

Integrityrx2660动能服务器提供了机架安装式和立式外形,具有标准3年保修支持,旨在提供关键业务计算能力和UNIX®的优势,可满足各种规模的企业的需要。

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DATALOCKER PS6500WC 商业级个人电脑说明书

DATALOCKER PS6500WC 商业级个人电脑说明书

Input voltage limits
18...31.2 Vdc
85...264 Vac
Voltage Drop Power Consumption*4
5 ms or less
Panel Unit Only: 47 W When power is not supplied to external devices (Max 65 W) Box Unit Only: 39 W When power is not supplied to external devices (Max 87 W)
Storage Temperature
-30...70 °C (-22...158 °F) - Box Type, -20...60 °C (-4...140 °F) - Panel Type
Certifications
UL 61010-2-201, cUL, Class 1 Division 2 Groups A, B, C and D Programmable Controllers for use in HazLoc, and CSA C22.2 N°61010-2-201, CE, RCM, RoHS, REACH, KC, WEEE
Display Type & Size
TFT Color LCD (10.1-inch) (wide)
Display Colors
16 million colors
PS6500WC
Model: PS6000 Series CPU: Core™ i3
Windows 10 AC or DC
Core™ i3
Power Supply............................. D: 24 Vdc for Advanced Box

PS21964-4中文资料

PS21964-4中文资料

APPLICATION AC100V~200V three-phase inverter drive for small power motor control.
Fig. 1 PACKAGE OUTLINES (PS21964-4)
38 ±0.5 20×1.778(=35.56) 35 ±0.3 A B TERMINAL CODE 3.5 16-0.5 1.5 ±0.05 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. NC VUFB VVFB VWFB UP VP WP VP1 VNC * UN VN WN VN1 FO CIN VNC * NC NC NC N W V U P NC
Fig. 2 LONG TERMINAL TYPE PACKAGE OUTLINES (PS21964-4A)
38 ±0.5 20×1.778(=35.56) 35 ±0.3 A B
Dimensions in mm
TERMINAL CODE 3.5 16-0.5
(1)
0.28 1.778 ±0.2
1.5 ±0.05
NC VUFB VVFB VWFB UP VP WP VP1 VNC * UN VN WN VN1 FO CIN VNC * NC NC NC N W V U P NC
14.4 ±0.5
29.4 ±0.5
24 ±0.5
(3.5)
(3.3)
0.5
2.5 MIN
(0~5°)
1.5 M
(2.656)
14±0.5
0.28 1.778 ±0.2

隔离芯片PS2811-4

隔离芯片PS2811-4

Packing Style
Pb-Free
Embossed Tape 3 500 pcs/reel
PS2811-1-V-F3
PS2811-1-V-F3-A
Embossed Tape 3 500 pcs/reel
PS2811-4-F3
PS2811-4-F3-A
PS2811-4-V-F3
PS2811-4-V-F3-A
PS2811-1,PS2811-4
LOW INPUT CURRENT, HIGH CTR 4, 16-PIN SSOP PHOTOCOUPLER
Data Sheet
R08DS0104EJ0500 Rev.5.00
Jan 23, 2013
DESCRIPTION
The PS2811-1 and PS2811-4 are optically coupled isolators containing a GaAs light emitting diode and an NPN silicon phototransistor in a plastic SSOP for high density applications.
100
Ambient Temperature TA (°C)
FORWARD CURRENT vs. FORWARD VOLTAGE
Collector to Emitter Dark Current
Current Transfer Ratio (IC/IF) *1
Collector Saturation Voltage
Isolation Resistance
Isolation Capacitance Rise Time *2 Fall Time *2 Turn-on Time *2 Turn-off Time *2

T E C P E L 数位

T E C P E L 数位

OSD-1102 / OSD-2102數位⽰波器中⽂說明⼿冊服務電話:(02)2218-3111服務網址:TE C P E L保修概要本公司保證,本產品從我公司最初購買之⽇起3年(配件1年)期間,不會出現材料和⼯藝缺陷。

配件如探頭、電池等保修期1年。

本有限保修僅適於原購買者且不得轉讓協⼒廠商。

如果產品在保修期內確有缺陷,則本公司將按照完整的保修聲明所述,提供修理或更換服務。

如果在適⽤的保修期內證明產品有缺陷,本公司可⾃⾏決定是修復有缺陷的產品且不收部件和⼈⼯費⽤,還是⽤同等產品(由本公司決定)更換有缺陷的產品。

本公司作保修⽤途的部件、模組和更換產品可能是全新的,或者經修理具有相當於新產品的性能。

所有更換的部件、模組和產品將成為本公司的財產。

為獲得本保證承諾的服務,“客⼾”必須在適⽤的保修期內向本公司通報缺陷,並為服務的履⾏做適當安排。

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本保證不適⽤於由於意外、機器部件的正常磨損、在產品規定的範圍之外使⽤或使⽤不當或者維護保養不當或不⾜⽽造成的任何缺陷、故障或損壞。

本公司根據本保證的規定無義務提供以下服務:a) 修理由非本公司服務代表⼈員對產品進⾏安裝、修理或維護所導致的損壞︔b) 修理由於使⽤不當或與不相容的設備連接造成的損壞︔c) 修理由於使⽤非本公司提供的電源⽽造成的任何損壞或故障︔d) 維修已改動或者與其他產品集成的產品(如果這種改動或集成會增加產品維修的時間或難度)。

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本公司對間接的,特殊的或由此產⽣的損壞概不負責。

TE C P E LE L T E C P⽬ 錄1.⼀一般安全要求 1............................................................2.安全術語和符號 3........................................................3.快速入⾨門 5.................................................................初步瞭解⽰示波器的結構 5.........................................................................前⾯面板 5......................................................................................後⾯面板 6......................................................................................按鍵控制區 7.................................................................................初步瞭解⽰示波器的使⽤用者介⾯面 8.................................................................如何進⾏行行⼀一般性檢查 9............................................................................如何進⾏行行功能檢查 10.............................................................................如何進⾏行行探頭補償 11.............................................................................如何進⾏行行探頭衰減係數設定 11..................................................................如何安全使⽤用探頭 12.............................................................................如何進⾏行行⾃自校正 12................................................................................初步瞭解垂直系統 13.............................................................................初步瞭解⽔水平系統 13.............................................................................初步瞭解觸發系統 14.............................................................................4.⽰示波器⾼高級使⽤用者指南 16................................................如何設置垂直系統 17.............................................................................數學運算功能的實現 18..........................................................................雙波形計算 18................................................................................使⽤用FFT 19...................................................................................垂直位移 旋鈕 和垂直檔位 旋鈕的應⽤用 22.....................................................如何設置⽔水平系統 22.............................................................................波形縮放 23..................................................................................如何設置觸發 23..................................................................................單觸觸發 24..................................................................................交替觸發(觸發模式為邊沿) 26..........................................................如何操作功能功能表 26.........................................................................如何設置採集/顯⽰示 27......................................................................如何進⾏行行儲存和調出 28.....................................................................如何進⾏行行輔助系統功能設置 35.............................................................如何更更新儀器韌體 37.......................................................................如何進⾏行行⾃自動測量量 38.......................................................................如何進⾏行行遊標測量量 42.......................................................................如何使⽤用執⾏行行按鍵 44 .......................................................................5.與電腦上位機軟體通訊 47 ................................................6.應⽤用實例例 48 ................................................................例例⼀一:測量量簡單信號 48 ..........................................................................例例⼆二:測量量電路路中放⼤大器的增益 49 .............................................................例例三:捕捉單次信號 49 ..........................................................................TE C P E L例例四:分析信號的細節51..............................................................................................................................................例例五:X-Y功能的應⽤用52..........................................................................例例六:--訊號觸發53 7.故障處理理55................................................................................................................................ 8.技術規格56..................................................................... 9.附錄60...................................................................................附錄A:附件60......................................................................附錄B:⽇日常保養和清潔60E L T E C P1.⼀般安全要求請閱讀下列安全注意事項,以避免⼈身傷害,並防⽌本產品或與其相連接的任何其他產品受到損壞。

PS2565L1-2资料

PS2565L1-2资料

DESCRIPTIONThe PS2565-1, -2, -4 are optically coupled isolators containing GaAs light emitting diodes and an NPN silicon phototransistor.The PS2565-1, -2, -4 are in a plastic DIP (Dual In-line Package) and the PS2565L-1, -2 -4 are lead bending type (Gull-wing) for surface mount.The PS2565L1-1, -2 -4 are lead bending type for long creepage distance.The PS2565L2-1, -2 -4 are lead bending type for long creepage distance (Gull-wing) for surface mount.FEATURES• AC input response• High Isolation voltage (BV = 5 000 Vr.m.s.) • High collector to emitter voltage (V CEO = 80 V) • High current transfer ratio (CTR = 200% TYP.) • High-speed switching (t r = 3 µs TYP., t f = 5 µs TYP.)• Ordering number of taping product: PS2565L-1-E3, E4, F3, F4, PS2565L-2-E3, E4, PS2565L2-1-E3, E4 • UL approved: File No. E72422 • CSA approved: No. CA 101391 • BSI approved: No. 7112/7420 • SEMKO approved: No. 0144211 • NEMKO approved: No. A21409 • DEMKO approved: No. 300535 • FIMKO approved: No. FI10620A1 • VDE approved (Option)APPLICATIONS• Telephone/FAX. • FA/OA equipment• Programmable logic controllerHIGH ISOLATION VOLTAGE AC INPUT RESPONSE TYPE MULTI PHOTOCOUPLER SERIES−NEPOC Series −The mark shows major revised points.Document No. PN10236EJ02V0DS (2nd edition) Date Published December 2003 CP(K)PHOTOCOUPLERPS2565-1,-2,-4,PS2565L-1,-2,-4PS2565L1-1,-2,-4,PS2565L2-1,-2,-4PACKAGE DIMENSIONS (UNIT : mm)DIP Type (New package)Caution New package 1-ch onlyDIP Type2Data Sheet PN10236EJ02V0DSLead Bending Type (New package)Caution New package 1-ch onlyLead Bending TypeData Sheet PN10236EJ02V0DS3Lead Bending Type For Long Creepage Distance (New Package)Lead Bending Type For Long Creepage Distance4Data Sheet PN10236EJ02V0DSLead Bending Type For Long Creepage Distance (Gull-Wing) (New Package)Lead Bending Type For Long Creepage Distance (Gull-Wing)Data Sheet PN10236EJ02V0DS5MARKING EXAMPLE6Data Sheet PN10236EJ02V0DSORDERING INFORMATION (Solder Contains Lead) (1/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2565-1 4-pin DIP Magazine case 100 pcs Standard products PS2565-1PS2565L-1 (UL, CSA, BSI,PS2565L1-1 NEMKO,SEMKO,PS2565L2-1 DEMKO,FIMKOPS2565L-1-E3 Embossed Tape 1 000 pcs/reel approved)PS2565L-1-E4PS2565L-1-F3 Embossed Tape 2 000 pcs/reelPS2565L-1-F4PS2565L2-1-E3 Embossed Tape 1 000 pcs/reelPS2565L2-1-E4PS2565-2 8-pin DIP Magazine case 45 pcs PS2565-2PS2565L-2PS2565L1-2PS2565L2-2PS2565L-2-E3 Embossed Tape 1 000 pcs/reelPS2565L-2-E4PS2565-4 16-pin DIP Magazine case 20 pcs PS2565-4PS2565L-4PS2565L1-4PS2565L2-4PS2565-1-V 4-pin DIP Magazine case 100 pcs VDE approved PS2565-1PS2565L-1-V products(Option)PS2565L1-1-VPS2565L2-1-VPS2565L-1-V-E3 Embossed Tape 1 000 pcs/reelPS2565L-1-V-E4PS2565L-1-V-F3 Embossed Tape 2 000 pcs/reelPS2565L-1-V-F4PS2565L2-1-V-E3 Embossed Tape 1 000 pcs/reelPS2565L2-1-V-E4*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10236EJ02V0DS7ORDERING INFORMATION (Solder Contains Lead) (2/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2565-2-V 8-pin DIP Magazine case 45 pcs VDE approved PS2565-2 PS2565L-2-V products(Option)PS2565L1-2-VPS2565L2-2-VPS2565L-2-V-E3 Embossed Tape 1 000 pcs/reelPS2565L-2-V-E4PS2565-4-V 16-pin DIP Magazine case 20 pcs PS2565-4 PS2565L-4-VPS2565L1-4-VPS2565L2-4-V*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10236EJ02V0DS8ORDERING INFORMATION (Pb-Free) (1/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2565-1-A 4-pin DIP Magazine case 100 pcs Standard products PS2565-1PS2565L-1-A (UL, CSA, BSI,PS2565L1-1-A NEMKO,SEMKO,PS2565L2-1-A DEMKO,FIMKOPS2565L-1-E3-A Embossed Tape 1 000 pcs/reel approved)PS2565L-1-E4-APS2565L-1-F3-A Embossed Tape 2 000 pcs/reelPS2565L-1-F4-APS2565L2-1-E3-A Embossed Tape 1 000 pcs/reelPS2565L2-1-E4-APS2565-2-A 8-pin DIP Magazine case 45 pcs PS2565-2PS2565L-2-APS2565L1-2-APS2565L2-2-APS2565L-2-E3-A Embossed Tape 1 000 pcs/reelPS2565L-2-E4-APS2565-4-A 16-pin DIP Magazine case 20 pcs PS2565-4PS2565L-4-APS2565L1-4-APS2565L2-4-APS2565-1-V-A 4-pin DIP Magazine case 100 pcs VDE approved PS2565-1PS2565L-1-V-A products(Option)PS2565L1-1-V-APS2565L2-1-V-APS2565L-1-V-E3-A Embossed Tape 1 000 pcs/reelPS2565L-1-V-E4-APS2565L-1-V-F3-A Embossed Tape 2 000 pcs/reelPS2565L-1-V-F4-APS2565L2-1-V-E3-A Embossed Tape 1 000 pcs/reelPS2565L2-1-V-E4-A*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10236EJ02V0DS9ORDERING INFORMATION (Pb-Free) (2/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2565-2-V-A 8-pin DIP Magazine case 45 pcs VDE approved PS2565-2 PS2565L-2-V-A products(Option)PS2565L1-2-V-APS2565L2-2-V-APS2565L-2-V-E3-A Embossed Tape 1 000 pcs/reelPS2565L-2-V-E4-APS2565-4-V-A 16-pin DIP Magazine case 20 pcs PS2565-4 PS2565L-4-V-APS2565L1-4-V-APS2565L2-4-V-A*1 For the application of the Safety Standard, following part number should be used.ABSOLUTE MAXIMUM RATINGS (T A = 25°C, unless otherwise specified)Parameter SymbolRatings UnitPS2565-1PS2565-2,-4 Diode Forward Current (DC) I F 80 mA Power Dissipation Derating ∆P D/°C 1.5 1.2 mW/°CPowerDissipation P D 150 120 mW/ch Peak Forward Current*1I FP 1 A Transistor Collector to Emitter Voltage V CEO 80 V Emitter to Collector Voltage V ECO 7 VCollectorCurrent I C 50 mA/ch Power Dissipation Derating ∆P C/°C 1.5 1.2 mW/°CPowerDissipation P C 150 120 mW/chIsolation Voltage*2BV 5000 Vr.m.s.Operating Ambient Temperature T A–55 to +100 °CStorage Temperature T stg–55 to +150 °C*1PW = 100 µs, Duty Cycle = 1%*2AC voltage for 1 minute at T A = 25°C, RH = 60% between input and outputData Sheet PN10236EJ02V0DS10ELECTRICAL CHARACTERISTICS (T A = 25°C)Parameter Symbol Conditions MIN.TYP.MAX.Unit Diode ForwardVoltage V F I F = ±10 mA 1.17 1.4 VTerminalCapacitanceC t V = 0 V, f = 1.0 MHz 100pFTransistor Collector to Emitter DarkCurrentI CEO V CE = 80 V, I F = 0 mA 100nACoupled Current Transfer Ratio(I C/I F)CTR I F = ±5 mA, V CE = 5 V 80 200 400 % CTRRatio*1CTR1/CTR2I F = 5 mA, V CE = 5 V 0.3 1.0 3.0CollectorSaturationVoltageV CE (sat)I F = ±10 mA, I C = 2 mA 0.3 V IsolationResistanceR I-O V I-O = 1.0 kV DC 1011Ω IsolationCapacitanceC I-O V = 0 V, f = 1.0 MHz 0.5 pF RiseTime*2t r V CC = 10 V, I C = 2 mA, R L = 100 Ω 3 µs FallTime*2t f 5 *1CTR1 = I C1/I F1, CTR2 = I C2/I F2I F1I F2V CE*2Test circuit for switching timeV CCOUTΩTYPICAL CHARACTERISTICS (T A = 25°C, unless otherwise specified)1501005015050255010012515000.80.60.40.20–1.080–1.5–40–80–600–0.50.5 1.51.00–20402060D i o d e P o w e r D i s s i p a t i o n P D (m W )T r a n s i s t o r P o w e r D i s s i p a t i o n P C (m W )Ambient Temperature T A (˚C)F o r w a r d C u r r e n t I F (m A )Forward Voltage V F (V)C o l l e c t o r t o E m i t t e r D a r k C u r r e n t I C E O (n A )Collector Saturation Voltage V CE(sat) (V)Ambient Temperature T A (˚C)Ambient Temperature T A (˚C)DIODE POWER DISSIPATION vs.AMBIENT TEMPERATURETRANSISTOR POWER DISSIPATION vs. AMBIENT TEMPERATUREFORWARD CURRENT vs.FORWARD VOLTAGECOLLECTOR TO EMITTER DARKCURRENT vs. AMBIENT TEMPERATURECOLLECTOR CURRENT vs.COLLECTOR SATURATION VOLTAGEC o l l e c t o r C u r r e n t I C (m A )F o r w a r d C u r r e n t I F (m A )Forward Voltage V F (V)FORWARD CURRENT vs.FORWARD VOLTAGE751Remark The graphs indicate nominal characteristics.2502001500C o l l e c t o r C u r r e n t I C (m A )COLLECTOR CURRENT vs.COLLECTOR TO EMITTER VOLTAGELoad Resistance R L (Ω)Frequency f (kHz)C u r r e n t T r a n s f e r R a t i o C T R (%)S w i t c h i n g T i m e t ( s )µNORMALIZED CURRENT TRANSFER RATIO vs. AMBIENT TEMPERATURERemark The graphs indicate nominal characteristics.101010Time (Hr)C T R (R e l a t i v e V a l u e )LONG TERM CTR DEGRADATIONRemark The graphs indicate nominal characteristics.TAPING SPECIFICATIONS (UNIT : mm)NOTES ON HANDLING1. Recommended soldering conditions(1) Infrared reflow soldering • Peak reflow temperature 260°C or below (package surface temperature) • Time of peak reflow temperature 10 seconds or less • Time of temperature higher than 220°C 60 seconds or less • Time to preheat temperature from 120 to 180°C 120±30 s• Number of reflows Three• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.)P a c k a g e S u r f a c e T e m p e r a tu r e T (˚C )Time (s)Recommended Temperature Profile of Infrared Reflow(2) Wave soldering • Temperature 260°C or below (molten solder temperature) • Time10 seconds or less• Preheating conditions 120°C or below (package surface temperature)• Number of times One (Allowed to be dipped in solder including plastic mold portion.)• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.)(3) Cautions • FluxesAvoid removing the residual flux with freon-based and chlorine-based cleaning solvent.2. Cautions regarding noiseBe aware that when voltage is applied suddenly between the photocoupler’s input and output or between collector-emitters at startup, the output side may enter the on state, even if the voltage is within the absolute maximum ratings.USAGE CAUTIONS1.Protect against static electricity when handling.2.Avoid storage at a high temperature and high humidity.SPECIFICATION OF VDE MARKS LICENSE DOCUMENTParameter SymbolSpeckUnit Application classification (DIN VDE 0109)for rated line voltages ≤ 300 Vr.m.s. for rated line voltages ≤ 600 Vr.m.s. IV IIIClimatic test class (DIN IEC 68 Teil 1/09.80) 55/100/21 Dielectric strengthmaximum operating isolation voltageTest voltage (partial discharge test, procedure a for type test and random test) U pr = 1.2 × U IORM, P d < 5 pC U IORMU pr8901 068V peakV peakTest voltage (partial discharge test, procedure b for all devices test) U pr = 1.6 × U IORM, P d < 5 pC U pr 1424 V peakHighest permissible overvoltage U TR 8000 V peak Degree of pollution (DIN VDE 0109) 2Clearance distance > 7.0 mm Creepage distance > 7.0 mm Comparative tracking index (DIN IEC 112/VDE 0303 part 1) CTI 175Material group (DIN VDE 0109) III aStorage temperature range T stg–55 to +150 °C Operating temperature range T A–55 to +100 °C Isolation resistance, minimum valueV IO = 500 V dc at T A = 25°CV IO = 500 V dc at T A MAX. at least 100°C Ris MIN.Ris MIN.10121011ΩΩSafety maximum ratings (maximum permissible in case of fault, see thermal derating curve)Package temperatureCurrent (input current I F, Psi = 0)Power (output or total power dissipation) Isolation resistanceV IO = 500 V dc at T A = 175°C (Tsi)TsiIsiPsiRis MIN.175400700109°CmAmWΩData Sheet PN10236EJ02V0DS21PS2565-1,-2,-4,PS2565L-1,-2,-4,PS2565L1-1,-2,-4,PS2565L2-1,-2,-44590 Patrick Henry DriveSanta Clara, CA 95054-1817Telephone: (408) 919-2500Facsimile: (408) 988-0279Subject: Compliance with EU DirectivesCEL certifies, to its knowledge, that semiconductor and laser products detailed below are compliant with the requirements of European Union (EU) Directive 2002/95/EC Restriction on Use of Hazardous Substances in electrical and electronic equipment (RoHS) and the requirements of EU Directive 2003/11/EC Restriction on Penta and Octa BDE.CEL Pb-free products have the same base part number with a suffix added. The suffix –A indicates that the device is Pb-free. The –AZ suffix is used to designate devices containing Pb which are exempted from the requirement of RoHS directive (*). In all cases the devices have Pb-free terminals. All devices with these suffixes meet the requirements of the RoHS directive.This status is based on CEL’s understanding of the EU Directives and knowledge of the materials that go into its products as of the date of disclosure of this information.Restricted Substanceper RoHS Concentration Limit per RoHS(values are not yet fixed)Concentration containedin CEL devices-A -AZLead (Pb) < 1000 PPMNot Detected (*) Mercury < 1000 PPM Not DetectedCadmium < 100 PPM Not Detected Hexavalent Chromium < 1000 PPM Not DetectedPBB < 1000 PPM Not DetectedPBDE < 1000 PPM Not DetectedIf you should have any additional questions regarding our devices and compliance to environmental standards, please do not hesitate to contact your local representative.Important Information and Disclaimer: Information provided by CEL on its website or in other communications concerting the substance content of its products represents knowledge and belief as of the date that it is provided. CEL bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. CEL has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. CEL and CEL suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall CEL’s liability arising out of such information exceed the total purchase price of the CEL part(s) at issue sold by CEL to customer on an annual basis.See CEL Terms and Conditions for additional clarification of warranties and liability.。

FPGA可编程逻辑器件芯片EPM2210GF256I4N中文规格书

FPGA可编程逻辑器件芯片EPM2210GF256I4N中文规格书

Timing Model PCI (5)2.97010 1.485PCI-X (5)2.97010 1.485SSTL-2 Class I2550 2.325 1.1230 1.1625SSTL-2 Class II2525 2.325 1.1230 1.1625SSTL-18 Class I2550 1.6600.79000.83SSTL-18 Class II2525 1.6600.79000.831.8-V HSTL Class I50 1.6600.79000.831.8-V HSTL Class II25 1.6600.79000.831.5-V HSTL Class I50 1.3750.64800.68751.5-V HSTL Class II25 1.3750.64800.68751.2-V HSTL with OCT1.14000.570Differential SSTL-2 Class I2550 2.325 1.1230 1.1625Differential SSTL-2 Class II2525 2.325 1.1230 1.1625Differential SSTL-18 Class I5050 1.6600.79000.83Differential SSTL-18 Class II2525 1.6600.79000.831.5-V differential HSTL Class I50 1.3750.64800.68751.5-V differential HSTL Class II25 1.3750.64800.68751.8-V differential HSTL Class I50 1.6600.79000.831.8-V differential HSTL Class II25 1.6600.79000.83LVDS100 2.3250 1.1625LVPECL1003.1350 1.5675Notes to Table 4–53:(1)Input measurement point at internal node is 0.5 V CCINT .(2)Output measuring point for V MEAS at buffer output is 0.5 V CCIO .(3)Input stimulus edge rate is 0 to V CC in 0.2ns (internal signal) from the driver preceding the I/O buffer.(4)Less than 50-mV ripple on V CCIO and V CCPD , V CCINT = 1.15 V with less than 30-mV ripple.(5)V CCPD = 2.97 V , less than 50-mV ripple on V CCIO and V CCPD , V CCINT = 1.15 V .Table 4–53.Output Timing Measurement Methodology for Output Pins (Part 2 of 2)Notes (1), (2), (3)I/O Standard Loading and TerminationMeasurement Point R S (Ω)R D (Ω)R T (Ω)V CCIO (V)V TT (V)C L (pF)V MEAS (V).Other Transceiver FeaturesOther important features of the Stratix II GX transceivers are the powerdown and reset capabilities, external voltage reference and bias circuitry,and hot swapping.Calibration BlockThe Stratix II GX device uses the calibration block to calibrate the on-chiptermination for the PLLs and their associated output buffers and theterminating resistors on the transceivers. The calibration block countersthe effects of process, voltage, and temperature (PVT). The calibrationblock references a derived voltage across an external reference resistor tocalibrate the on-chip termination resistors on the Stratix II GX device. Thecalibration block can be powered down. However, powering down thecalibration block during operations may yield transmit and receive dataerrors.Dynamic ReconfigurationThis feature allows you to dynamically reconfigure the PMA portion andthe channel parameters, such as data rate and functional mode, of theStratix II GX transceiver. The PMA reconfiguration allows you to quicklyoptimize the settings for the transceiver’s PMA to achieve the intendedbit error rate (BER). Table 2–15.Available Clocking Connections for Transceivers in 2SGX130GRegionClock ResourceTransceiver Global Clock Regional Clock Bank 138 Clock I/O Bank 148 Clock I/O Bank 158 clock I/O Bank 168 Clock I/O Bank 178 Clock I/O Region08 LRIO clockv RCLK 20-27v Region18 LRIO clockv RCLK 20-27v Region28 LRIO clockv RCLK 12-19v v Region38 LRIO clock v RCLK 12-19v vFigure2–73 shows the global and regional clocking from enhanced PLLoutputs and top and bottom CLK pins.Figure2–73.Global and Regional Clock Connections from Top and Bottom Clock Pins and Enhanced PLL Outputs Notes(1), (2)Notes to Figure2–73:(1)EP2SGX30C/D and EP2SGX60C/D devices only have two enhanced PLLs (5 and 6), but the connectivity from thesetwo PLLs to the global and regional clock networks remains the same as shown.(2)If the design uses the feedback input, you will lose one (or two, if FBIN is differential) external clock output pin.。

理光复印机参数

理光复印机参数
耗材描述黑色碳粉盒MP C2503C型
黄色、红色、蓝色碳粉盒MP C2503HC型
黄色、红色、蓝色碳粉盒MP C2503LC型纠错
双面器标配纠错
自动输稿器选配纠错
网络功能支持有线网络打印纠错
接口类型标准:
USB2.0 TypeA/TypeB
10Base-T/100Base-TX/1000Base-T(RJ-45网络接口)
打印语言标准:PCL5e,PCL6(XL),Adobe PDF Direct
选购:Adobe PostScript3,XPS,IPDS纠错
打印其它性能网络协议:TCP/IP(IP v4,IP v6),IPX/SPX(选购)纠错
扫描功能
扫描控制器标准配置纠错
扫描速度80ipm(200/300dpi)纠错
文件格式转换器
废粉盒MP C6003型
计数器界面卡纠错
保修信息
质保时间1年纠错
质保备注购机后1年或复印量达到规定条件先满足者为准纠错
客服电话800-820-3121;400-888-3121纠错
电话备注周一至周五:9:00-12:00,13:00-17:00纠错
详细内容理光始终坚持“设身处地为客户着想”,预期客户的需求,建立快速反应和值得信任的售后服务及技术支持。若按使用说明和操作指南正常使用情况下,本品发生故障,您可从指定的技术服务中心得到无偿的技术服务。我们公司除负责对故障的修理外,将不负责因本产品的故障引起的其他给客户带来的损害。具体请以购机保修卡为准
基本参数
产品类型数码复合机纠错
颜色类型彩色纠错
涵盖功能复印/打印/扫描纠错
速度类型中速纠错
最大原稿尺寸A3纠错
内存容量1.5GB纠错
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DESCRIPTIONThe PS2562-1, -2, -4 are optically coupled isolators containing a GaAs light emitting diode and an NPN silicon darlington connected phototransistor.The PS2562-1, -2, -4 are in a plastic DIP (Dual In-line Package) and the PS2562L-1, -2, -4 are lead bending type (Gull-wing) for surface mount.The PS2562L1-1, -2, -4 are lead bending type for long creepage distance.The PS2562L2-1, -2, -4 are lead bending type for long creepage distance (Gull-wing) for surface mount.FEATURES• High isolation voltage (BV = 5 000 Vr.m.s.) • High current transfer ratio (CTR = 2 000 % TYP.) • High-speed switching (t r , t f = 100 µs TYP.)• Ordering number of tape product: PS2562L-1-E3, E4, F3, F4, PS2562L-2-E3, E4, PS2562L2-1-E3, E4 • Safety standards • UL approved: File No. E72422 • BSI approved: No. 7112/7420 • CSA approved: No. CA 101391 • NEMKO approved: No. A21409 • SEMKO approved: No. 0144211 • DEMKO approved: No. 300535 • FIMKO approved: No. FI10620A1 • VDE approved (Option)APPLICATIONS• Power supply • Telephone/FAX. • FA/OA equipment• Programmable logic controllerHIGH ISOLATION VOLTAGE DARLINGTON TRANSISTOR TYPE MULTI PHOTOCOUPLER SERIES−NEPOC Series −The mark shows major revised points.Document No. PN10235EJ02V0DS (2nd edition) Date Published December 2003 CP(K)PHOTOCOUPLERPS2562-1,-2,-4,PS2562L-1,-2,-4PS2562L1-1,-2,-4,PS2562L2-1,-2,-4PACKAGE DIMENSIONS (UNIT : mm)DIP Type (New package)Caution New package 1-ch onlyDIP Type2Data Sheet PN10235EJ02V0DSLead Bending Type (New package)Caution New package 1-ch onlyLead Bending TypeData Sheet PN10235EJ02V0DS3Lead Bending Type For Long Creepage Distance (New Package)Lead Bending Type For Long Creepage Distance4Data Sheet PN10235EJ02V0DSLead Bending Type For Long Creepage Distance (Gull-Wing) (New Package)Lead Bending Type For Long Creepage Distance (Gull-Wing)Data Sheet PN10235EJ02V0DS5MARKING EXAMPLE6Data Sheet PN10235EJ02V0DSORDERING INFORMATION (Solder Contains Lead) (1/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2562-1 4-pin DIP Magazine case 100 pcs Standard products PS2562-1PS2562L-1 (UL, CSA, BSI,PS2562L1-1 NEMKO,SEMKO,PS2562L2-1 DEMKO,FIMKOPS2562L-1-E3 Embossed Tape 1 000 pcs/reel approved)PS2562L-1-E4PS2562L-1-F3 Embossed Tape 2 000 pcs/reelPS2562L-1-F4PS2562L2-1-E3 Embossed Tape 1 000 pcs/reelPS2562L2-1-E4PS2562-2 8-pin DIP Magazine case 45 pcs PS2562-2PS2562L-2PS2562L1-2PS2562L2-2PS2562L-2-E3 Embossed Tape 1 000 pcs/reelPS2562L-2-E4PS2562-4 16-pin DIP Magazine case 20 pcs PS2562-4PS2562L-4PS2562L1-4PS2562L2-4PS2562-1-V 4-pin DIP Magazine case 100 pcs VDE approved PS2562-1PS2562L-1-V products(Option)PS2562L1-1-VPS2562L2-1-VPS2562L-1-V-E3 Embossed Tape 1 000 pcs/reelPS2562L-1-V-E4PS2562L-1-V-F3 Embossed Tape 2 000 pcs/reelPS2562L-1-V-F4PS2562L2-1-V-E3 Embossed Tape 1 000 pcs/reelPS2562L2-1-V-E4*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10235EJ02V0DS7ORDERING INFORMATION (Solder Contains Lead) (2/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2562-2-V 8-pin DIP Magazine case 45 pcs VDE approved PS2562-2 PS2562L-2-V products(Option)PS2562L1-2-VPS2562L2-2-VPS2562L-2-V-E3 Embossed Tape 1 000 pcs/reelPS2562L-2-V-E4PS2562-4-V 16-pin DIP Magazine case 20 pcs PS2562-4 PS2562L-4-VPS2562L1-4-VPS2562L2-4-V*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10235EJ02V0DS8ORDERING INFORMATION (Pb-Free) (1/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2562-1-A 4-pin DIP Magazine case 100 pcs Standard products PS2562-1PS2562L-1-A (UL, CSA, BSI,PS2562L1-1-A NEMKO,SEMKO,PS2562L2-1-A DEMKO,FIMKOPS2562L-1-E3-A Embossed Tape 1 000 pcs/reel approved)PS2562L-1-E4-APS2562L-1-F3-A Embossed Tape 2 000 pcs/reelPS2562L-1-F4-APS2562L2-1-E3-A Embossed Tape 1 000 pcs/reelPS2562L2-1-E4-APS2562-2-A 8-pin DIP Magazine case 45 pcs PS2562-2PS2562L-2-APS2562L1-2-APS2562L2-2-APS2562L-2-E3-A Embossed Tape 1 000 pcs/reelPS2562L-2-E4-APS2562-4-A 16-pin DIP Magazine case 20 pcs PS2562-4PS2562L-4-APS2562L1-4-APS2562L2-4-APS2562-1-V-A 4-pin DIP Magazine case 100 pcs VDE approved PS2562-1PS2562L-1-V-A products(Option)PS2562L1-1-V-APS2562L2-1-V-APS2562L-1-V-E3-A Embossed Tape 1 000 pcs/reelPS2562L-1-V-E4-APS2562L-1-V-F3-A Embossed Tape 2 000 pcs/reelPS2562L-1-V-F4-APS2562L2-1-V-E3-A Embossed Tape 1 000 pcs/reelPS2562L2-1-V-E4-A*1 For the application of the Safety Standard, following part number should be used.Data Sheet PN10235EJ02V0DS9ORDERING INFORMATION (Pb-Free) (2/2)Part Number Package Packing Style Safety StandardApproval Application Part Number *1PS2562-2-V-A 8-pin DIP Magazine case 45 pcs VDE approved PS2562-2 PS2562L-2-V-A products(Option)PS2562L1-2-V-APS2562L2-2-V-APS2562L-2-V-E3-A Embossed Tape 1 000 pcs/reelPS2562L-2-V-E4-APS2562-4-V-A 16-pin DIP Magazine case 20 pcs PS2562-4 PS2562L-4-V-APS2562L1-4-V-APS2562L2-4-V-A*1 For the application of the Safety Standard, following part number should be used.ABSOLUTE MAXIMUM RATINGS (T A = 25 °C, unless otherwise specified)Parameter SymbolRatings UnitPS2562-1PS2562-2,-4 Diode ReverseVoltage V R 6 V Forward Current (DC) I F 80 mAPower Dissipation Derating ∆P D/°C 1.5 1.2 mW/°CPowerDissipation P D 150 120 mW/ch Peak Forward Current*1I FP 1 A Transistor Collector to Emitter Voltage V CEO 40 V Emitter to Collector Voltage V ECO 6 VCollectorCurrent I C 200 160mA/ch Power Dissipation Derating ∆P C/°C 2.0 1.6 mW/°CPowerDissipation P C 200 160 mW/chIsolation Voltage*2BV 5000 Vr.m.s.Operating Ambient Temperature T A–55 to +100 °CStorage Temperature T stg–55 to +150 °C*1PW = 100 µs, Duty Cycle = 1 %*2AC voltage for 1 minute at T A = 25 °C, RH = 60 % between input and outputData Sheet PN10235EJ02V0DS10ELECTRICAL CHARACTERISTICS (T A = 25 °C)Parameter Symbol Conditions MIN. TYP. MAX. UnitDiode Forward VoltageV FI F = 10 mA 1.17 1.4 VReverse Current I R V R = 5 V5 µATerminal Capacitance C t V = 0 V, f = 1.0 MHz 50 pF Transistor Collector to Emitter DarkCurrentI CEOV CE = 40 V, I F = 0 mA400nACoupledCurrent Transfer Ratio (I C /I F )*1CTR I F = 1 mA, V CE = 2 V DC 200 2 000 %Collector Saturation VoltageV CE(sat)I F = 1 mA, I C = 2 mA1.0 VIsolation Resistance R I-O V I-O = 1.0 kV DC 1011Ω Isolation Capacitance C I-O V = 0 V, f = 1.0 MHz0.5pFRise Time *2t r V CC = 10 V, I C = 10 mA, R L = 100 Ω 100 µsFall Time*2t f100*1 CTR rank (only PS2562-1, PS2562L-1, PS2562L1-1, PS2562L2-1) K : 2 000 to (%) L : 700 to 3 400 (%)M : 200 to 1 000 (%)*2 Test circuit for switching timeV CCOUTΩTYPICAL CHARACTERISTICS (T A = 25 °C, unless otherwise specified)15010050750.5100–50–25255075100D i o d e P o w e r D i s s i p a t i o n P D (m W )T r a n s i s t o r P o w e r D i s s i p a t i o n P C (m W )Ambient Temperature T A (˚C)F o r w a r d C u r r e n t I F (m A )Forward Voltage V F (V)C o l l e c t o r C u r r e n t IC (m A )C o l l e c t o r t o E m i t t e rD a r k C u r r e n t I CE O (n A )Collector Saturation Voltage V CE(sat) (V)Ambient Temperature T A (˚C)Ambient Temperature T A (˚C)DIODE POWER DISSIPATION vs.AMBIENT TEMPERATURETRANSISTOR POWER DISSIPATION vs. AMBIENT TEMPERATUREFORWARD CURRENT vs.FORWARD VOLTAGECOLLECTOR CURRENT vs.COLLECTOR TO EMITTER VOLTAGECOLLECTOR TO EMITTER DARKCURRENT vs. AMBIENT TEMPERATUREC o l l e c t o r C u r r e n t I C (m A )Remark The graphs indicate nominal characteristics.1.4251.21.00.80.60.40.2–50–25507510010 k50 k 500100 kNormalized to 1.0at T A = 25 ˚C,I F = 1 mA, V CE = 2 VAmbient Temperature T A (˚C)Load Resistance R L (Ω)Frequency f (kHz)N o r m a l i z e d C u r r e n t T r a n s f e r R a t i o C T RC u r r e n t T r a n s f e r R a t i o C T R (%)N o r m a l i z e d G a i n G VLoad Resistance R L (Ω)S w i t c h i n g T i m e t ( s )µNORMALIZED CURRENT TRANSFER RATIO vs. AMBIENT TEMPERATURECURRENT TRANSFER RATIO vs.FORWARD CURRENTSWITCHING TIME vs.LOAD RESISTANCESWITCHING TIME vs.LOAD RESISTANCES w i t c h i n g T i m e t ( s )µC u r r e n t T r a n s f e r R a t i o C T R (%)Remark The graphs indicate nominal characteristics.6Time (Hr)C T R(R e l a t i v e V a l u e )LONG TERM CTR DEGRADATIONRemark The graphs indicate nominal characteristics.TAPING SPECIFICATIONS (UNIT : mm)NOTES ON HANDLING1. Recommended soldering conditions(1) Infrared reflow soldering • Peak reflow temperature 260°C or below (package surface temperature) • Time of peak reflow temperature 10 seconds or less • Time of temperature higher than 220°C 60 seconds or less • Time to preheat temperature from 120 to 180°C 120±30 s• Number of reflows Three• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.)P a c k a g e S u r f a c e T e m p e r a tu r e T (˚C )Time (s)Recommended Temperature Profile of Infrared Reflow(2) Wave soldering • Temperature 260°C or below (molten solder temperature) • Time10 seconds or less• Preheating conditions 120°C or below (package surface temperature)• Number of times One (Allowed to be dipped in solder including plastic mold portion.)• Flux Rosin flux containing small amount of chlorine (The flux with a maximum chlorine content of 0.2 Wt% is recommended.)(3) Cautions • FluxesAvoid removing the residual flux with freon-based and chlorine-based cleaning solvent.2. Cautions regarding noiseBe aware that when voltage is applied suddenly between the photocoupler’s input and output or between collector-emitters at startup, the output side may enter the on state, even if the voltage is within the absolute maximum ratings.USAGE CAUTIONS1.Protect against static electricity when handling.2.Avoid storage at a high temperature and high humidity.SPECIFICATION OF VDE MARKS LICENSE DOCUMENTParameter SymbolSpeckUnit Application classification (DIN VDE 0109)for rated line voltages ≤ 300 Vr.m.s. for rated line voltages ≤ 600 Vr.m.s. IV IIIClimatic test class (DIN IEC 68 Teil 1/09.80) 55/100/21 Dielectric strength maximum operating isolation voltageTest voltage (partial discharge test procedure a for type test and random test) U pr = 1.2 × U IORM, P d < 5 pC U IORMU pr8901 068V peakV peakTest voltage (partial discharge test procedure b for all devices test) U pr = 1.6 × U IORM, P d < 5 pC U pr 1424 V peakHighest permissible overvoltage U TR 8000 V peak Degree of pollution (DIN VDE 0109) 2Clearance distance > 7.0 mm Creepage distance > 7.0 mm Comparative tracking index (DIN IEC 112/VDE 0303 part 1) CTI 175Material group (DIN VDE 0109) III aStorage temperature range T stg–55 to +150 °C Operating temperature range T A–55 to +100 °C Isolation resistance, minimum valueV IO = 500 V dc at T A = 25 °CV IO = 500 V dc at T A MAX. at least 100 °C Ris MIN.Ris MIN.10121011ΩΩSafety maximum ratings (maximum permissible in case of fault, see thermal derating curve)Package temperatureCurrent (input current I F, Psi = 0)Power (output or total power dissipation) Isolation resistanceV IO = 500 V dc at T A = 175 °C (Tsi)TsiIsiPsiRis MIN.175400700109°CmAmWΩData Sheet PN10235EJ02V0DS21PS2562-1,-2,-4,PS2562L-1,-2,-4,PS2562L1-1,-2,-4,PS2562L2-1,-2,-44590 Patrick Henry DriveSanta Clara, CA 95054-1817Telephone: (408) 919-2500Facsimile: (408) 988-0279Subject: Compliance with EU DirectivesCEL certifies, to its knowledge, that semiconductor and laser products detailed below are compliant with the requirements of European Union (EU) Directive 2002/95/EC Restriction on Use of Hazardous Substances in electrical and electronic equipment (RoHS) and the requirements of EU Directive 2003/11/EC Restriction on Penta and Octa BDE.CEL Pb-free products have the same base part number with a suffix added. The suffix –A indicates that the device is Pb-free. The –AZ suffix is used to designate devices containing Pb which are exempted from the requirement of RoHS directive (*). In all cases the devices have Pb-free terminals. All devices with these suffixes meet the requirements of the RoHS directive.This status is based on CEL’s understanding of the EU Directives and knowledge of the materials that go into its products as of the date of disclosure of this information.Restricted Substanceper RoHS Concentration Limit per RoHS(values are not yet fixed)Concentration containedin CEL devices-A -AZLead (Pb) < 1000 PPMNot Detected (*) Mercury < 1000 PPM Not DetectedCadmium < 100 PPM Not Detected Hexavalent Chromium < 1000 PPM Not DetectedPBB < 1000 PPM Not DetectedPBDE < 1000 PPM Not DetectedIf you should have any additional questions regarding our devices and compliance to environmental standards, please do not hesitate to contact your local representative.Important Information and Disclaimer: Information provided by CEL on its website or in other communications concerting the substance content of its products represents knowledge and belief as of the date that it is provided. CEL bases its knowledge and belief on information provided by third parties and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. CEL has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. CEL and CEL suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.In no event shall CEL’s liability arising out of such information exceed the total purchase price of the CEL part(s) at issue sold by CEL to customer on an annual basis.See CEL Terms and Conditions for additional clarification of warranties and liability.。

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