FPGA可编程逻辑器件芯片5CEFA9F23C7N中文规格书
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Chapter 6:I/O Features in Arria II Devices
Termination Schemes for I/O Standards Arria II Device Handbook Volume 1: Device Interfaces and Integration
Termination Schemes for I/O Standards
The following section describes the different termination schemes for I/O standards used in Arria II devices.
Single-Ended I/O Standards Termination
Voltage-referenced I/O standards require both an input reference voltage (V REF ) and a termination voltage (V TT ). The reference voltage of the receiving device tracks the termination voltage of the transmitting device.
Figure 6–11 shows the details of SSTL I/O termination on Arria II devices.
Figure 6–11.SSTL I/O Standard Termination for Arria II Devices
Note to Figure 6–11:
(1)Applicable to Arria II GZ devices only.SSTL Class I SSTL Class II
External
On-Board
Termination OCT
Transmit OCT
Receive (1)OCT
in Bi-
Directional
Pins (1)V TT
50 Ω25 Ω50 ΩV TT 50 Ω25 Ω50 Ω
V TT 50 ΩT ransmitter T ransmitter Receiver Receiver V TT 50 Ω50850 ΩT ransmitter Receiver Series OCT
50 Ω
V TT 50 Ω50 Ω
V TT 50 ΩT ransmitter Receiver
25 Series OCT V CCIO
100 Ω
25 Ω
50 ΩT ransmitter Receiver Parallel OCT
100 Ω
V CCIO 100 Ω25 Ω50 ΩT ransmitter Receiver
Parallel OCT 100 ΩV TT 50 Ω V CCIO 100 Ω50 100 Ω
V CCIO 100 Ω100 ΩV REF
V REF V REF REF
V V REF V REF
Termination Series OCT 50 ΩSeries
OCT 50 ΩV CCIO 100 Ω50 Ω100 ΩV CCIO 100 Ω100 ΩSeries OCT 25 ΩSeries OCT 25 Ω
Transmitter Receiver T ransmitter
Receiver
Chapter 6:I/O Features in Arria II Devices
Arria II OCT Calibration
Figure6–10 is a top view example of the Arria II GZ silicon die that corresponds to a
reverse view for flip chip packages. It is a graphical representation only. This figure
does not show transceiver banks and transceiver calibration blocks.
Figure6–10.Example of Calibrating Multiple I/O Banks with One Shared OCT Calibration Block in
Arria II GZ Devices
f For more information about the OCT calibration block, refer to the ALT_OCT
Megafunction User Guide.
Arria II Device Handbook Volume 1: Device Interfaces and Integration。