FPGA可编程逻辑器件芯片5SGXMA5H3F35I4N中文规格书

DDR SDRAM Memory Interface
Clock Frequency During Operation
This is not a recommended procedure. However, if the application
requires changing the clock frequency (SCLK) during operation, it can be done but only under the following conditions.
1.No memory accesses are in progress.
2.In the event SCLK frequency is being reduced, new control settings
have been made before the frequency change is initiated. DDR SDRAM Memory Interface
This is a DDR SDRAM compliant interface. None of the signals in this interface is multiplexed with any other signals on the chip. ADSP-BF54x processor products equipped with a standard DDR SDRAM controller support the standard DDR specification only. Similarly, ADSP-BF54x processor products equipped with a Mobile DDR SDRAM controller sup-port only low power mobile DDR devices. Refer to the product data sheet for actual specifications.
Table 5-4. DDR SDRAM Memory Interface
Name Type Description
DCLK1 / DCLK1O Output clock signals to DDR SDRAM chips.
Use as differential clock signals to DDR SDRAM.
DCLK2 / DCLK2O Output clock signals to DDR SDRAM chips.
Use as differential clock signals to DDR SDRAM. Same as DDR_CLK1.
DCKE O Clock enable
DCS1–0O Chip select: One chip select for each of the two external banks
DBA1–0O Chip select: One chip select for each of the two external banks
DCAS O Column address select
DRAS O Row address select
DWE O Write enable
ADSP-BF54x Blackfin Processor Hardware Reference
Memory Protection and Properties
ADSP-BF54x Blackfin Processor Hardware Reference To ensure proper behavior and future compatibility, all reserved
bits in this register must be set to 0 whenever this register is written.
Table 3-7. DCPLB Data Register Memory-Mapped Addresses Register Name
Memory-Mapped Address DCPLB_DATA0
0xFFE0 0200DCPLB_DATA1
0xFFE0 0204DCPLB_DATA2
0xFFE0 0208DCPLB_DATA3
0xFFE0 020C DCPLB_DATA4
0xFFE0 0210DCPLB_DATA5
0xFFE0 0214DCPLB_DATA6
0xFFE0 0218DCPLB_DATA7
0xFFE0 021C DCPLB_DATA8
0xFFE0 0220DCPLB_DATA9
0xFFE0 0224DCPLB_DATA10
0xFFE0 0228DCPLB_DATA11
0xFFE0 022C DCPLB_DATA12
0xFFE0 0230DCPLB_DATA13
0xFFE0 0234DCPLB_DATA14
0xFFE0 0238DCPLB_DATA150xFFE0 023C。