MULTI-Vt SCHEME WITH SAME DIPOLE THICKNESS FOR GAT
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专利名称：MULTI-Vt SCHEME WITH SAME DIPOLE
THICKNESS FOR GATE-ALL-AROUND
TRANSISTORS
发明人：Jingyun Zhang,Takashi Ando,Alexander
Reznicek
申请号：US16736873
申请日：20200108
公开号：US20210210388A1
公开日：
20210708
专利内容由知识产权出版社提供
专利附图：
摘要：A method is presented for attaining different gate threshold voltages across a
plurality of field effect transistor (FET) devices. The method includes forming first, second, and third nanosheet stacks, removing sacrificial layers of the first, second, and third nanosheet stacks, and depositing an interfacial layer and a high-k layer within the first, second, and third nanosheet stacks. The method further includes depositing a first work function metal (WFM) layer within the first nanosheet stack having a first thickness, depositing a second WFM layer within the second nanosheet stack having a second thickness, wherein the second thickness is greater than the first thickness, depositing a third WFM layer within the third nanosheet stack having a third thickness, wherein the third thickness is greater than the second thickness, depositing a dipole material, and diffusing the dipole material into the IL to provide different gate threshold voltages for the plurality of FET devices.
申请人：INTERNATIONAL BUSINESS MACHINES CORPORATION
地址：Armonk NY US
国籍：US
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