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Dell EMC PowerEdge R250 技术指南说明书

Dell EMC PowerEdge R250 技术指南说明书

Dell EMC PowerEdge R250技术指南2021 12注意、小心和警告:“注意”表示帮助您更好地使用该产品的重要信息。

:“小心”表示可能会损坏硬件或导致数据丢失,并告诉您如何避免此类问题。

:“警告”表示可能会导致财产损失、人身伤害甚至死亡。

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保留所有权利。

Dell、EMC 和其他商标是 Dell Inc. 或其附属机构的商标。

其他商标可能是其各自所有者的商标。

章 1: 系统概览 (5)新技术 (5)关键工作负载 (6)章 2: 系统功能和代际比较 (7)章 3: 机箱视图和功能部件 (9)机箱视图 (9)系统的前视图 (9)系统的后视图 (10)系统内部 (11)快速资源定位器 (13)章 4: 处理器 (14)处理器特性 (14)支持的处理器 (14)章 5: 内存子系统 (15)支持的内存 (15)内存速度 (15)章 6: 存储 (16)存储控制器 (16)存储控制器功能值表 (16)内部存储配置 (17)服务器存储控制器用户指南 (17)IDSDM (17)内置 USB (19)RAID - 独立磁盘冗余阵列 (19)数据表和 PERC 性能扩展平台 (19)Boot Optimized Storage Solution (20)支持的驱动器 (20)硬盘 (HDD) (21)固态硬盘 (SSD) (23)外部存储器 (25)章 7: 扩展卡和扩展卡转接卡 (26)扩展卡安装原则 (26)章 8: 功率、散热和声音 (28)功率 (28)散热 (29)声音 (29)声音性能 (29)目录3章 9: 机架、导轨和线缆管理 (31)机架导轨 (31)章 10: 支持的操作系统 (34)章 11: Dell EMC OpenManage 系统管理 (35)服务器和机箱管理器 (35)Dell EMC 控制台 (36)自动化启用程序 (36)集成第三方控制台 (36)连接第三方控制台的接口 (36)Dell EMC 更新公用程序 (36)戴尔资源 (36)章 12: Dell Technologies 服务 (38)Dell EMC ProDeploy Enterprise Suite (38)Dell EMC ProDeploy Plus (39)Dell EMC ProDeploy (39)基本部署 (39)Dell EMC 服务器配置服务 (39)Dell EMC 派驻服务 (39)Dell EMC 远程咨询服务 (39)Dell EMC 数据迁移服务 (39)Dell EMC ProSupport Enterprise Suite (39)面向企业的 Dell EMC ProSupport Plus (40)面向企业的 Dell EMC ProSupport (40)Dell EMC ProSupport One for Data Center (41)ProSupport for HPC (41)支持技术 (42)Dell Technologies Education Services (43)Dell Technologies 咨询服务 (43)Dell EMC 托管服务 (43)章 13: 附录 A:附加规格 (44)机箱尺寸 (44)机箱重量 (45)视频规格 (45)NIC 端口规格 (45)USB 端口 (46)内置 USB (46)电源装置 (46)环境规格 (47)微粒和气体污染规格 (48)散热限制 (48)章 14: 附录 B.标准遵从性 (50)章 15: 附录 C 其他资源 (51)4目录1系统概览Dell EMC™ PowerEdge™ R250 是戴尔最新的 1U 机架式服务器,旨在使用可高度扩展的内存运行复杂的工作负载。

ST500使用说明书

ST500使用说明书

ST500智能型电动机控制器的使用说明书调试手册苏州万龙集团有限公司2006年4月目录一、控制器面板及端子布置 (3)1.1 控制器正面布置 (3)1.2 控制器侧边端子的端子号布置图及功能说明 (4)1.3控制器端子号定义 (4)二、ST522显示模块功能介绍 (7)三、普通用户菜单功能介绍 (7)四、高级用户菜单功能介绍 (10)五、参数设置参考 (11)5.1各种保护特性说明k系数设置参照表 (11)5.2 系统参数设置 (12)5.3 电动机功率范围和额定电流关系5.4 控制权限设定表六、各种运行方式典型二次接线图 (18)6.1、直接起动典型接线图6.2、保护模式下的典型接线图6.3、双向/可逆启动模式的典型接线图6.4、星三角起动模式的典型接线图七、常见故障分析及排除方法 (18)八、安全事项 (17)一、控制器面板及端子布置1.1 控制器正面布置(控制器的DI/DO端子功能可编程,其不同功能见1.3定义)万龙电器图1 控制器面板布置图序1: 开关量输入公共端(对应端子号1)。

序2: DI1开关量,按逆时针顺序 DI1~DI9 共9个可编程光隔开关量输入端。

序3:开关量输出 DO1,DO2公共端。

序4:开关量输出DO1。

序5:开关量输出DO2。

序6:开关量输出 DO3,DO4公共端。

序7:开关量输出 DO3,一般为常闭,正常工作时为常开。

序8:开关量输出 DO4。

序9:电源输入端子(对应端子号17,18)。

序10:指示灯:故障指示灯,在故障报警延时过程中闪烁,发生故障跳闸后恒亮。

总线提示灯,在远程通讯建立后恒亮,未建立时不亮。

运行指示灯,在运行状态下闪烁,在停车时恒亮。

序11:复位按键,用于清除状态指示和故障报警接点信号。

序12:通讯接口,用于连接远程通讯网络。

序13:用于连接显示模块ST522接口。

插页:为增加继电器的容量,采用增加ST202模块的方法,具体接线图如下:101817B C COM DA DO2DO1DO4DO3A DCOMC B ST202模块1.3.2 控制器DI/DO端子的可编程功能编号说明见下表控制器光隔开关量输入端子最多同时用9个,继电器输出最多同时用4个。

世界钢号对照表

世界钢号对照表

[01] 一般结构用轧钢料( Rolled Steels for General Structure )[02] 焊接结构用轧钢料( Rolled Steels for Welded Structure)[03] 焊接结构用耐候性热轧钢料(Hot-Rolled Atmospheric Corrosion Resisting Steels for Welded Structu[04] 高耐候性轧钢钢料(Superior Atmospheric Corrosion Resisting Rolled Steels)[05] 热轧软钢板、钢片及钢带(Hot-Rolled Mild Steel Plates/ Sheets and Strips)[06] 冷轧钢板及钢带(Cold-Rolled Steel Plates and Strips)[07] 锅炉及压力容器用碳钢及钼合金钢钢板(Carbon Steel and Molybdenum Alloy Steel Plates for Boilers and Other Pressur[08] 压力容器用钢板(Steel Plates for Pressure Vessels)[09] 高压瓦斯容器用钢板及钢片(Steel Sheet/ Plates and Strips for Gas Cylinders)[10] 中常温压力容器用碳钢钢板(Carbon Steel Plate for Pressure Vessels for Intermediate and Moderate Tempera[11] 锅炉及压力容器用锰钼与锰钼镍合金钢板(Mn-Mo and Mn-Mo-Ni Alloy Steel Plates for Boilers and Other Pressure Ve[12] 压力容器用淬火及回火之锰钼钢及锰钼镍合金钢钢板(Mn-Mo and Mn-Mo-Ni Alloy Steel Plate Quenched and Tempered for Pressure[13] 中常温压力容器用高强度钢板gh Strength Steel Plates for Pressure Vessels for Intermediate and Moderate Temp[14] 低温压力容器用碳钢钢板(Carbon Steel Plates for Pressure Vessels for Low Temperature Servic[15] 低温压力容器用镍钢钢板(Nickel Steel Plates for Pressure Vessels for Low Temperature Service[16] 压力容器用铬钼合金钢钢板(Chromium-Molybdenum Alloy Steel Plates for Pressure Vessels)[17] 机械构造用碳钢(Carbon Steels for Machine Structural use)[18] 机械构造用碳钢及锰钢(Carbon Steels and Manganese Steels for Machine Structural use)[19] 保证硬化性能构造用钢 (H钢)(Structural Steels with Specified Hardenability Bands)[20] 机械构造用镍铬钢(Nickel Chromium Steels for Machine Structural use)[21] 机械构造用铬钢(Chromium Steels for Machine Structural use)[22] 机械构造用镍铬钼钢(Nickel Chromium Molybdenum Steels for Machine Structural use)[23] 机械构造用镍铬钼钢(Nickel Chromium Molybdenum Steels for Machine Structural use)[24] 机械构造用铬锰钢钢料(Manganese Chromium Steels for Machine Structural use)[25] 高温用合金钢螺栓材料( Alloy Steel Bolting Materials for High Temperature Service )[26] 特殊用途合金钢螺栓钢棒( Alloy Steel Bars for Special Application Bolting Materials )[27] 机械构造用铝铬钼钢(Aluminum Chromium Molybdenum Steels for Machine Structural use[28] 耐蚀不锈钢(Corrosion-Resisting Stainless Steels)[29] 耐热不锈钢(Heat-Resisting Stainless Steels)[30] 碳工具钢(Carbon Tool Steels)[31] 合金工具钢(1) (Alloy Tool Steels (1))[31] 合金工具钢(2) (Alloy Tool Steel (2))[31] 合金工具钢(3)(Alloy Tool Steel (3))[32] 高速工具钢(High Speed Tool Steels)[33] 弹簧钢(Spring Steels)[34] 弹簧不锈钢钢线(Stainless Steel Wire for Spring use)[35] 易削钢(Free Cutting Steels)[36] 轴承钢(Bearing Steels)[37] 耐蚀耐热超合金钢片钢板及棒(Corrosion-Resisting and Heat-Resisting Superalloy Sheets Plates and B[38] 一般用途之碳钢锻件(Carbon Steel Forgings for General use)[39] 压力容器用碳钢锻件(Carbon Steel Forgings for Pressure Vessels)[40] 压力容器用调质合金钢锻件(Quenched and Tempered Alloy Steel Forgings for Pressure Vessels)[41] 高温压力容器用合金锻件(Alloy Steel Forgings for Pressure Vessels for High Temperature Servic[42] 高温压力容器零件不锈钢锻件(Forged Stainless Steel Flanges/ Fittings/ Valves and Parts of Pressure Vessel for High Temperatur[43] 低温压力容器用碳钢及合金钢锻件(Carbon and Alloy Steel Forgings for Pressure Vessels for Low Temperature Service[44] 铬钼合金钢锻钢件(Chromium Molybdenum Steel Forgings for General use)[45] 镍铬钼合金钢锻件(Nickel Chromium Molybdenum Steel Forgings for General use)[46] 碳钢铸件(Carbon Steel Castings)[47] 焊接结构用铸件(Steel Castings for Welded Structure)[48] 结构用高强度碳钢及低合金铸件(High Tensile Strength Carbon Steel Castings and Low Alloy Steel Castings for Structu[49] 高锰钢铸件(High Manganese Steel Casting)[50] 高温高压用铸件(Steel Castings for High Temperature and High Pressure Service)[51] 低温高压用铸件(Steel Castings for Low Temperature and High Pressure Service)[52] 不锈钢铸件(Stainless Steel Castings)[53] 耐热铸件(Heat Resisting Steel Castings)[54] 灰口铸铁(Gray Iron Castings)[55] 球状石墨铸铁(Spheroidal Graphite Iron Castings)[56] 沃斯田铁片状石墨铸铁(Austenitic Cast Iron of Flake Graphite)[57] 沃斯田铁状石墨铸铁(Austenitic Cast Iron of Spheroidal Graphite)[58] 低合金及高合金耐磨铸铁(Abrasion Resisting Cast Iron Low Alloy and High Alloy Grade)ructure)essure Vessels)perature Service)re Vessels)钢钢板sure Vessels)Temperature Serviervice)ervice)els)use)use)use))l use)nd Bars)sels)ervice)erature Service)ervice)。

M25P32中文资料

M25P32中文资料

M25P3232Mbit,低电压,75MHZ,SPI串行接口的flash存储器特征:32Mbit的flash。

单电源供电2.7~3.6V。

SPI总线通讯。

75M时钟(最大)VPP=9V快速读写电压页操作时间0.6ms擦出一个扇区时间0.6s整块擦除时间:标准23s,快速17s睡眠模式电流1uABP0,BP1,BP2硬件写保护选择位擦写次数可达100000次数据可保存20年目录1描述2信号描述数据输出数据输入时钟片选保护写保护,提高编程电压工作电压电源地3SPI协议4操作方法和时序页操作扇区的擦除和整块的擦写写检测和循环擦除快速编程和擦除操作激活,正常工作,睡眠模式状态寄存器保护方法保持条件5存储组织结构6操作说明写操作使能使能复位读器件ID读状态寄存器WIP位WEL位BP2,BP1,BP0位SRWD位写状态寄存器读数据操作快速读数据操作页操作扇区擦除操作整个器件擦除睡眠模式激活器件78原始状态9极限参数10DC和AC参数11硬件结构12编号13修订记录1 描述M25P32是32Mbit(4M*8)的串行flash存储器,具有增强写保护结构。

存取采用SPI 总线协议。

一次性可编程1-256个字节(参考页编程操作说明)。

增强型快速编程、擦除模式可适用于需要快速存储的场合。

当V PPH 达到写保护或增强编程电压时即可进入此模式。

存储结构分为64个扇区,每个含有256页,每页256字节的宽度,所以整个器件可以看成有16384页组成(或者4194304个字节组成)整个器件的擦除(参考整块擦除说明),一次擦除一个扇区(参考扇区擦除说明)图1表1图22信号描述串行数据输出(Q)串行数据输入(D)图31.DU = Don’t use2.3 串行时钟信号2.4片选()当片选端输入为高时,那么取消选定器件,此时串行数据输出为高阻态,除非内部编程,循环对擦除、写寄存器进行操作,器件将工作在标准电源模式下(非睡眠模式)当器件片选信号拉低使能时,即器件进入正常工作模式。

2SC3356R25中文资料(NEC)中文数据手册「EasyDatasheet - 矽搜」

2SC3356R25中文资料(NEC)中文数据手册「EasyDatasheet - 矽搜」

–150˚ –120˚
–30˚ –150˚
–60˚ –90˚
–120˚
–30˚
–60˚ –90˚
Data Sheet PU10209EJ02V0DS
5
10
插入最功大率可增5用益功|率SV增益=M1A0GV(分贝)
I 能力= 20 mA
0 0.05 0.1 0.2
0.5
1
2
频率f(GHz)
5 插入功率增益| S
0
0.5 1
5
集电极电流I
10 (mA)
50 70
备注
该图表显示标称特性.
Data Sheet PU10209EJ02V0DS
3
芯片中文手册,看全文,戳
2%
2. 收藏家基地电容,当发射器接地
hFE 分类
秩 打标
h值
R23/Q R23
50至100
R24/R R24
80至160
R25/S R25
125至250
注意 旧规格/新规格
MIN.
TYP. MAX.
单元


1.0
µA


1.0
µA
50
120
250


7

GHz

11.5

dB

1.1
2.0
dB0.55订源自信息零件号2SC3356 2SC3356-T1B
数量
50只(不卷) 3千件/卷
供给方式
•8mm宽压花录音 •引脚3(集电极)面带穿孔方
备注
要订购评价样品,请联系您最近销售部门. 单位样品数量为50个.
绝对最大额定值(T

PMS5XXXST颗粒物传感器中文说明书V2.0

PMS5XXXST颗粒物传感器中文说明书V2.0

DSENSOR数字式通用颗粒物浓度传感器PMS5XXXST系列数据手册主要特性◆激光散射原理实现精准测量◆零错误报警率◆实时响应并支持连续采集◆最小分辨粒径0.3μm◆全新专利结构,六面全方位屏蔽,抗干扰性能更强◆进出风口方向可选,适用范围广,用户无需再进行风道设计◆可实时输出甲醛监测数据◆可实时输出温度及湿度数据概述PMS5XXXST系列是一款可以同时监测空气中颗粒物浓度、甲醛浓度及温湿度的三合一传感器。

其中颗粒物浓度的监测基于激光散射原理,可连续采集并计算单位体积内空气中不同粒径的悬浮颗粒物个数,即颗粒物浓度分布,进而换算成为质量浓度。

甲醛浓度的监测基于电化学原理,具有高精度、高稳定性的特点。

传感器同时内嵌瑞士生产的温湿度一体检测芯片。

颗粒物浓度数值、甲醛浓度数值及温度、湿度合并以通用数字接口形式输出。

本传感器可嵌入各种与空气质量监测和改善相关的仪器设备,为其提供及时准确的环境参数。

工作原理本传感器采用激光散射原理。

即令激光照射在空气中的悬浮颗粒物上产生散射,同时在某一特定角度收集散射光,得到散射光强随时间变化的曲线。

进而微处理器利用基于米氏(MIE)理论的算法,得出颗粒物的等效粒径及单位体积内不同粒径的颗粒物数量。

传感器各功能部分框图如图1所示图1 传感器功能框图甲醛监测功能采用电化学原理实现,加入数据处理算法,所获得的数据稳定、精确。

技术指标如表1所示表1 传感器技术指标数字接口定义PIN1图2 接口示意图输出结果1.颗粒物浓度:主要输出为单位体积内各浓度颗粒物质量以及个数,其中颗粒物个数的单位体积为0.1升,质量浓度单位为:微克/立方米(μg/m³)。

此外传感输出分为主动输出和被动输出两种状态。

传感器上电后默认状态为主动输出,即传感器主动向主机发送串行数据,时间间隔为200~800ms,空气中颗粒物浓度越高,时间间隔越短。

主动输出又分为两种模式:平稳模式和快速模式。

在空气中颗粒物浓度变化较小时,传感器输出为平稳模式,即每三次输出同样的一组数值,实际数据更新周期约为2s。

S450 L25塔式起重机使用说明书及安装手册.

S450 L25塔式起重机使用说明书及安装手册.

S450 L25 塔 式 起 重 机 使 用 说 明 书 ——安 装 手 册沈阳三洋建筑机械有限公司目 录整机外形及起重特性………………………………………………………… P5第一部分:场地准备………………………………………………………… P61.起重机性能、占地面积、部件重量……………………………………… P7 1.1整机布置图及主要尺寸…………………………………………… P71.2钢筋混凝土支脚图……………………………………………………… P81.3主要杆件和销轴规格…………………………………………………… P9-10 1.4空间要求和重量………………………………………………………… P11 1.5要组件的重量及起升高度汇总表……………………………………… P12-201.6吊臂、平衡重心位置…………………………………………………… P212.轨道………………………………………………………………………… P22 2.1轨道的选择……………………………………………………………… P22 2.2轨道的铺设……………………………………………………………… P22 2.3轨距和弯半径…………………………………………………………… P23 2.4混凝土轨枕轨道………………………………………………………… P24-27 2.5木枕轨道………………………………………………………………… P282.6轨道停止器…………………………………………………………… P29-303.固定支脚的混凝土块……………………………………………………… P31 3.1准备条件………………………………………………………………… P31 3.2力和反力………………………………………………………………… P32 3.3地面承压力和混凝土块的选择………………………………………… P33-34 3.4固定支脚的尺寸特性…………………………………………………… P353.5固定支脚的安装………………………………………………………… P36-384.电源安装…………………………………………………………………… P39 4.1引言……………………………………………………………………… P39 4.2电缆卷筒功率…………………………………………………………… P39 4.3电缆卷筒………………………………………………………………… P394.4接地……………………………………………………………………… P405.压重………………………………………………………………………… P415.2压重表…………………………………………………………………… P415.3压重块的参数………………………………………………………………P42-446.配重 …………………………………………………………………………P45 6.1说明…………………………………………………………………………P45 6.2配重表………………………………………………………………………P456.3配重图………………………………………………………………………P45-487.附着示意图…………………………………………………………………P49-50 第二部分:立塔…………………………………………………………………P511.一般安装说明………………………………………………………………P512.安装台车和横梁……………………………………………………………P52-553.安装基础塔身节……………………………………………………………P56-584.下十字梁的安装……………………………………………………………P595.内塔身安装…………………………………………………………………P59-606.回转机构及司机室(太空舱)的安装……………………………………P617.平衡臂安装…………………………………………………………………P61-628.撑架安装……………………………………………………………………P639.安装吊臂……………………………………………………………………P64-6710.配重的安装…………………………………………………………………P6811.吊臂和平衡臂的组装………………………………………………………P69-7012.起重小车和滑轮组的安装…………………………………………………P73-7913.塔身加节……………………………………………………………………P80-8314.标准节安装…………………………………………………………………P84-8515.顶升平衡……………………………………………………………………P86-8716.顶升…………………………………………………………………………P88-8917.风速仪的安装方法…………………………………………………………P9018.障碍警号标志灯安装方法…………………………………………………P91-9319.立塔后进行检查……………………………………………………………P9420.投入使用……………………………………………………………………P95第三部分:拆塔……………………………………………………………… P96S450 L25自升塔式起重机 GB/T13752-92 外形尺寸起重特性如果需要45m臂长及35m臂长组合时,请与供应商联系,需要特殊定制。

ST SG2525A SG3525A 数据手册

ST SG2525A SG3525A 数据手册

SG2525ASG3525AREGULATING PULSE WIDTH MODULATORS .8 TO 35 V OPERATION.5.1 V REFERENCE TRIMMED TO ± 1 %.100 Hz TO 500 KHz OSCILLATOR RANGE.SEPARATE OSCILLATOR SYNC TERMINAL.ADJUSTABLE DEADTIME CONTROL.INTERNAL SOFT-START.PULSE-BY-PULSE SHUTDOWN.INPUT UNDERVOLTAGE LOCKOUT WITHHYSTERESIS.LATCHING PWM TO PREVENT MULTIPLEPULSES.DUAL SOURCE/SINK OUTPUT DRIVERSDESCRIPTIONThe SG3525A series of pulse width modulator inte-grated circuits are designed to offer improved per-formance and lowered external parts count when used in designing all types of switching power sup-plies. The on-chip + 5.1 V reference is trimmed to ±1 % and the input common-mode range of the error amplifier includes the reference voltage eliminating external resistors. A sync input to the oscillator al-lows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the C T and the discharge terminals provide a wide range of dead time ad- justment. These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circu-ity and the output stages, providing instantaneousturn off through the PWM latch with pulsed shut-down, as well as soft-start recycle with longer shut-down commands. These functions are also control-led by an undervoltage lockout which keeps the out-puts off and the soft-start capacitor discharged for sub-normal input voltages. This lockout circuitry in-cludes approximately 500 mV of hysteresis for jitter-free operation. Another feature of these PWM cir-cuits is a latch following the comparator. Once a PWM pulses has been terminated for any reason, the outputs will remain off for the duration of the pe-riod. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200 mA. The SG3525A output stage features NOR logic, giving a LOW output for an OFF state.DIP16 16(Narrow)Type Plastic DIP SO16SG2525A SG2525AN SG2525APSG3525A SG3525AN SG3525APPIN CONNECTIONS AND ORDERING NUMBERS (top view)®June 20001/12ABSOLUTE MAXIMUM RATINGSSymbol Parameter Value Unit V i Supply Voltage40V V C Collector Supply Voltage40VI OSC Oscillator Charging Current5mAI o Output Current, Source or Sink500mAI R Reference Output Current50mAI T Current through C T TerminalLogic InputsAnalog Inputs5– 0.3 to + 5.5– 0.3 to V imAVVP tot Total Power Dissipation at T amb = 70 °C1000mW T j Junction Temperature Range– 55 to 150°C T stg Storage Temperature Range– 65 to 150°CT op Operating Ambient Temperature : SG2525A SG3525A – 25 to 850 to 70°C°CTHERMAL DATASymbol Parameter SO16DIP16UnitR th j-pins R th j-amb R th j-alumina Thermal Resistance Junction-pins MaxThermal Resistance Junction-ambient MaxThermal Resistance Junction-alumina (*) Max505080°C/W°C/W°C/W*Thermal resistance junction-alumina with the device soldered on the middle of an alumina supporting substrate measuring 15 × 20 mm ; 0.65 mm thickness with infinite heatsink.BLOCK DIAGRAMELECTRICAL CHARACTERISTICS(V# i = 20 V, and over operating temperature, unless otherwise specified)Symbol Parameter TestConditions SG2525A SG3525AUnitMin. Typ. Max. Min. Typ. Max. REFERENCE SECTIONV REF Output Voltage T j = 25 °C 5.05 5.1 5.155 5.1 5.2V ∆V REF Line Regulation V i = 8 to 35 V10201020mV ∆V REF Load Regulation I L = 0 to 20 mA20502050mV ∆V REF/∆T*Temp. Stability Over Operating Range20502050mV*Total Output Variation Line, Load andTemperature5 5.2 4.95 5.25VShort Circuit Current V REF = 0 T j = 25 °C8010080100mA *Output Noise Voltage10 Hz ≤f ≤ 10 kHz,T j = 25 °C4020040200µVrms∆V REF*Long Term Stability T j = 125 °C, 1000 hrs20502050mV OSCILLATOR SECTION * **, •Initial Accuracy T j = 25 °C± 2± 6± 2±6% *, •Voltage Stability V i = 8 to 35 V± 0.3± 1± 1±2%∆f/∆T*Temperature Stability Over Operating Range± 3± 6± 3±6%f MIN Minimum Frequency R T = 200 KΩ C T = 0.1 µF120120Hzf MAX Maximum Frequency R T = 2 KΩ C T = 470 pF400400KHzCurrent Mirror I RT = 2 mA 1.72 2.2 1.72 2.2mA *, •Clock Amplitude3 3.53 3.5V *, •Clock Width T j = 25 °C0.30.510.30.51µs Sync Threshold 1.22 2.8 1.22 2.8VSync Input Current Sync Voltage = 3.5 V1 2.51 2.5mA ERROR AMPLIFIER SECTION (V CM = 5.1 V)V OS Input Offset Voltage 0.55210mVI b Input Bias Current110110µAI os Input Offset Current11µADC Open Loop Gain R L≥ 10 MΩ60756075dB *Gain BandwidthProductG v = 0 dB T j = 25 °C1212MHz*, DC Transconduct.30 KΩ≤ R L≤ 1 MΩT j = 25 °C1.1 1.5 1.1 1.5msOutput Low Level0.20.50.20.5VOutput High Level 3.8 5.6 3.8 5.6V CMR Comm. Mode Reject.V CM = 1.5 to 5.2 V60756075dB PSR Supply VoltageRejectionV i = 8 to 35 V50605060dBELECTRICAL CHARACTERISTICS (continued)Symbol Parameter TestConditions SG2525A SG3525AUnitMin. Typ. Max. Min. Typ. Max.PWM COMPARATORMinimum Duty-cycle00%•Maximum Duty-cycle45494549%•Input Threshold Zero Duty-cycle0.70.90.70.9VMaximum Duty-cycle 3.3 3.6 3.3 3.6V *Input Bias Current0.0510.051µA SHUTDOWN SECTIONSoft Start Current V SD = 0 V, V SS=0V255080255080µASoft Start Low Level V SD = 2.5 V0.40.70.40.7VShutdown Threshold To outputs, V SS = 5.1 VT j = 25 °C0.60.810.60.81VShutdown Input Current V SD = 2.5 V0.410.41mA *Shutdown Delay V SD = 2.5 V T j = 25 °C0.20.50.20.5µs OUTPUT DRIVERS (each output) (V C = 20 V)Output Low Level I sink = 20 mA0.20.40.20.4VI sink = 100 mA1212VOutput High Level I source = 20 mA18191819VI source = 100 mA17181718VUnder-Voltage Lockout V comp and V ss=High678678VI C Collector Leakage V C = 35 V200200µAt r*Rise Time C L = 1 nF, T j = 25 °C100600100600ns t f*Fall Time C L = 1 nF, T j = 25 °C5030050300ns TOTAL STANDBY CURRENTI s Supply Current V i = 35 V14201420mA*These parameters, although guaranteed over the recommended operating conditions, are not 100 % tested in production.•Tested at f osc = 40 KHz (R T = 3.6 KΩ, C T = 10nF, R D = 0 Ω). Approximate oscillator frequency is defined by :1f =C T (0.7 R T + 3 R D).DC transconductance (g M) relates to DC open-loop voltage gain (G v) according to the following equation : G v = g M R L where R L is the resistance from pin 9 to ground. The minimum g M specification is used to calculate minimum G vwhen the error amplifier output is loaded.TEST CIRCUITFigure 1 : Oscillator Charge Time vs. R T and C T .Figure 2 : Oscillator Discharge Time vs. R D and C T.RECOMMENDED OPERATING CONDITIONS (•)ParameterValue Input Voltage (V i )8 to 35 V Collector Supply Voltage (V C )4.5 to 35 V Sink/Source Load Current (steady state)0 to 100 mA Sink/Source Load Current (peak)0 to 400 mA Reference Load Current 0 to 20 mA Oscillator Frequency Range 100 Hz to 400 KHz Oscillator Timing Resistor 2 K Ω to 150 K ΩOscillator Timing Capacitor 0.001 µF to 0.1 µFDead Time Resistor Range0 to 500 Ω(⋅)Range over which the device is functional and parameter limits are guaranteed.Figure 3 : Output Saturation Characteristics.Figure 4 : Error Amplifier Voltage Gain andPhase vs. Frequency.SHUTDOWN OPTIONS (see Block Diagram) Since both the compensation and soft-start termi-nals (Pins 9 and 8) have current source pull-ups, either can readily accept a pull-down signal which only has to sink a maximum of 100 µA to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins.An alternate approach is the use of the shutdown cir-cuitry of Pin 10 which has been improved to en-hance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions : the PWM latch is immedi-ately set providing the fastest turn-off signal to the outputs ; and a 150 µA current sink begins to dis-charge the external soft-start capacitor. If the shut-down command is short, the PWM signal is termi-nated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this external capacitor, re-cycling slow turn-on upon release.Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation.Figure 5: Error Amplifier.PRINCIPLES OF OPERATIONFigure 6: Oscillator Schematic.Figure 7 : Output Circuit (1/2 circuit shown).Figure 10.Figure 11.For single-ended supplies, the driver outputs are grounded. The V C terminal is switched to ground by the totem-pole source transistors on alternate oscil-lator cycles.In conventional push-pull bipolar designs, forward base drive is controlled by R 1 - R 3. Rapid turn-off times for the power devices are achieved with speed-up capacitors C 1 and C 2.The low source impedance of the output drivers pro-vides rapid charging of Power Mos input capaci-tance while minimizing external components.Low power transformers can be driven directly.Automatic reset occurs during dead time, when both ends of the primary winding are switched to ground.Figure 8.Figure 9.DIP16DIM.mm inch MIN.TYP.MAX.MIN.TYP.MAX.a10.510.020B 0.771.650.0300.065b 0.50.020b10.250.010D 200.787E 8.50.335e 2.540.100e317.780.700F 7.10.280I 5.10.201L 3.30.130Z1.270.050OUTLINE ANDMECHANICAL DATASO16 NarrowDIM.mm inch MIN.TYP.MAX.MIN.TYP.MAX.A1.750.069a10.10.250.0040.009a21.60.063b0.350.460.0140.018b10.190.250.0070.010C0.50.020c145˚ (typ.)D (1)9.8100.3860.394E5.86.20.2280.244e1.270.050e38.890.350F (1)3.840.1500.157G4.65.30.1810.209L0.4 1.270.0160.050M0.620.024S (1) D and F do not include mold flash or protrusions. Mold flash or potrusions shall not exceed 0.15mm (.006inch).OUTLINE AND MECHANICAL DATA8˚(max.)Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse-quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi-croelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronics© 2000 STMicroelectronics – Printed in Italy – All Rights ReservedSTMicroelectronics GROUP OF COMPANIESAustralia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.。

A555A555M

A555A555M

Designation:A555/A555M–05Standard Specification forGeneral Requirements for Stainless Steel Wire and Wire Rods1This standard is issued under thefixed designation A555/A555M;the number immediately following the designation indicates the year of original adoption or,in the case of revision,the year of last revision.A number in parentheses indicates the year of last reapproval.A superscript epsilon(e)indicates an editorial change since the last revision or reapproval.This standard has been approved for use by agencies of the Department of Defense.1.Scope*1.1This specification covers general requirements that shall apply to stainless wire and wire rods.Wire rods are a semifinished product intended primarily for the manufacture of wire.Wire is intended primarily for cold forming,including coiling,stranding,weaving,heading and machining as covered under the latest revision of each of the following ASTM specifications:A313/A313M,A368,A478,A492,A493, A580/A580M and A581/A581M.1.2In case of conflicting requirements,the individual ma-terial specification and this general requirement specification shall prevail in the order named.1.3General requirements forflat products other than wire are covered in Specification A480/A480M.1.4General requirements for bar and billet products are covered in Specification A484/A484M.1.5The values stated in inch-pound units or SI(metric) units are to be regarded separately as standard;within the text and tables,the SI units are shown in brackets([]).The values stated in each system are not exact equivalents;therefore,each system must be used independent of the bining values from the two systems may result in nonconformance with the specification.1.6Unless the order specifies the applicable metric specifi-cation designation,the material shall be furnished in the inch-pound units.2.Referenced Documents2.1ASTM Standards:2A262Practices for Detecting Susceptibility to Intergranu-lar Attack in Austenitic Stainless SteelsA313/A313M Specification for Stainless Steel Spring WireA368Specification for Stainless Steel Wire StrandA370Test Methods and Definitions for Mechanical Testing of Steel ProductsA478Specification for Chromium-Nickel Stainless Steel Weaving and Knitting WireA480/A480M Specification for General Requirements for Flat-Rolled Stainless and Heat-Resisting Steel Plate, Sheet,and StripA484/A484M Specification for General Requirements for Stainless and Heat-Resisting Bars,Billets,and Forgings A492Specification for Stainless Steel Rope WireA493Specification for Stainless Steel Wire and Wire Rods for Cold Heading and Cold ForgingA580/A580M Specification for Stainless Steel WireA581/A581M Specification for Free-Machining Stainless and Heat-Resisting Steel Wire and Wire RodsA700Practices for Packaging,Marking,and Loading Methods for Steel Products for Domestic ShipmentA751Test Methods,Practices,and Terminology for Chemical Analysis of Steel ProductsE112Test Methods for Determining Average Grain Size 2.2Federal Standard:3Fed.Std.No.123Marking for Shipment(Civil Agencies) 2.3Military Standards:3MIL-STD-129Marking for Shipment and StorageMIL-STD-163Preservation of Steel Products for Domestic Shipment2.4Other Standard:4Primary Metals Bar Code Standard1This specification is under the jurisdiction of ASTM Committee A01on Steel, Stainless Steel,and Related Alloys and is the direct responsibility of Subcommittee A01.17on Flat-Rolled and Wrought Stainless Steel.Current edition approved Sept.1,2005.Published September2005.Originally approved st previous edition approved in2002as A555/A555M–97 (2002).2For referenced ASTM standards,visit the ASTM website,,or contact ASTM Customer Service at service@.For Annual Book of ASTM Standards volume information,refer to the standard’s Document Summary page on the ASTM website.3Available from Standardization Documents Order Desk,DODSSP,Bldg.4, Section D,700Robbins Ave.,Philadelphia,PA19111-5098.4Available from Automotive Industry Action Group(AIAG),26200Lahser Rd., Suite200,Southfield,MI48034.*A Summary of Changes section appears at the end of this standard. Copyright©ASTM International,100Barr Harbor Drive,PO Box C700,West Conshohocken,PA19428-2959,United States.3.Terminology3.1Definitions of Terms Specific to This Standard:3.1.1bar—wire that has been straightened and cut(see Specification A484/A484M).However,a straightened and cut small diameter product is often called straightened and cut wire.3.1.2wire—as covered by this specification and the speci-fications itemized in1.1,is any round or shaped cold-reduced product,in coils only,produced by cold-finishing coiled wire rod.3.1.3wire rods—semifinished product intended primarily for the manufacture of wire.They are hot rolled generally to an approximate round cross section in continuous length coils.4.Materials and Manufacture4.1The material may be furnished in one of the conditions detailed in the applicable material specification,that is,an-nealed,bright annealed,cold worked,or as otherwise specified on the purchase order.4.2A variety offinishes,coatings,and lubricants are avail-able.The particular type used is dependent upon the specific end use.Unless otherwise specified,thefinish,coating,and lubricant will be furnished as required by the individual material specification or purchase order.5.Chemical Composition5.1Heat or Cast Analysis—The chemical analysis of each heat shall be determined in accordance with the applicable material specification and Test Methods,Practices,and Termi-nology A751.5.1.1The analysis of each heat shall be made from a test sample taken during the pouring of the melt,or from the in-process product later in the manufacturingflow.5.1.2The heat analysis shall conform to the chemical requirements for each of the specified elements for the grade ordered,as listed in the applicable product specification.5.1.3All commercial metals contain small amounts of elements other than those which are specified.It is neither practical nor necessary to specify limits for unspecified ele-ments,whether intentionally added unspecified elements,re-sidual elements,or trace elements,that can be present.The producer is permitted to analyze for unspecified elements and is permitted to report such analyses.The presence of an unspecified element and the reporting of an analysis for that element shall not be a basis for rejection unless the presence of that element causes the loss of a property typically expected for that metal for the type and quality ordered.5.1.4The purchaser is permitted to require in the purchase order a maximum limit for an individual element not specified in the product specification.Such a requirement for an element not listed in the product specification,when acknowledged in the order acceptance,shall be treated as a specified element, with determination of chemical analysis and reporting of that analysis.5.1.5The purchaser is permitted to make the requirements for any element more stringent,that is,require higher mini-mums for elements having minimum requirements or ranges with minimum requirements,or requiring lower maximums for elements having specified maximums,or ranges with maxi-mums.The purchaser is not permitted to make chemical requirements less stringent.5.1.6Analysis limits shall be established for specific elements rather than groups of elements,including but not limited to“all others,”“rare earths,”and“balance,”unless all elements in such a group are similar in technical effect and are associated in typical methods of chemical analysis.5.2Product Analysis—When required,a product analysis shall be determined in accordance with Test Methods,Prac-tices,and Terminology A751.The chemical composition thus determined shall conform to the tolerances shown in Table1.5.3The steel shall not contain an unspecified element for the ordered grade to the extent that the steel conforms to the requirements of another grade in the referencing product specification,and any of the product specifications within the scope of this general specification,for which that element hasa specified minimum.6.Permissible Variations in Dimensions6.1Unless otherwise specified in the purchase order,the product shall conform to the permissible variations in dimen-sions as specified in Tables2-5of this specification.7.Workmanship,Finish,and Appearance7.1The material shall be of uniform quality consistent with good manufacturing and inspection practices.Imperfections that may be present shall be of such a nature or degree,for the type and quality ordered,that they will not adversely affect the forming,machining,or fabrication offinished parts.8.Lot Size8.1A lot for product analysis shall consist of all wire made from the same heat.8.2For other tests required by the product specification,a lot shall consist of all product of the same size,same heat,and produced under the same processing conditions.All austenitic, ferritic,and free-machining stainless steels,as well as marten-sitic grades when annealed to Condition A and precipitation or age hardening grades when solution treated,may be heat treated in more than one charge in the same furnace or in several furnaces,utilizing controlled processing and equipment (see appendix).However,when heat treating martensitic stain-less steels to Condition T or H and when age hardening the precipitation hardening stainless steels,a lot shall consist of the same size,same heat,and the same heat treat charge in a batch-type furnace or under the same conditions in a continu-ous furnace.9.Number of Tests and Retests9.1Unless otherwise specified in the product specification, one sample per heat shall be selected for chemical analysis and one mechanical test sample shall be selected from each lot of wire.All tests shall conform to the chemical and mechanical requirements of the material specification.9.2One intergranular corrosion test,when required,and one grain size test,when required,shall be made from each lot.It is often convenient to obtain test material from the specimen selected for mechanicaltesting.9.3If any test specimen shows imperfections that may affect the test results,it may be discarded and another specimen substituted.9.4If the results of any test lot are not in conformance with the requirements of this specification and the applicable product specification,a retest sample of two specimens may be tested to replace each failed specimen of the original sample.If one of the retest specimens fails,the lot shall be rejected.TABLE 1Product Analysis TolerancesN OTE —This table specifies tolerances over the maximum limits or under the minimum limits of the chemical requirements of the applicable material specification (see 1.1);it does not apply to heat analysis.Element Upper Limit or Maximum of Specified Range,%Tolerances over the Maximum (Upper Limit)or Under the Minimum (LowerLimit)ElementUpper Limit or Maximum of Specified Range,%Tolerances over the Maximum (Upper Limit)or Under the Minimum (LowerLimit)Carbonto 0.010,incl0.002Cobaltover 0.05to 0.50,incl 0.01over 0.010to 0.030,incl 0.005over 0.50to 2.00,incl 0.02over 0.030to 0.20,incl 0.01over 2.00to 5.00,incl 0.05over 0.20to 0.60,incl 0.02over 5.00to 10.00,incl 0.10over 0.60to 1.20,incl 0.03over 10.00to 15.00,incl 0.15over 15.00to 22.00,incl 0.20Manganeseto 1.00,incl0.03over 22.00to 30.00,incl0.25over 1.00to 3.00,incl 0.04over 3.00to 6.00,incl 0.05Columbium to 1.50,incl0.05over 6.00to 10.00,incl 0.06+over 1.50to 5.00,incl 0.10over 10.00to 15.00,incl 0.10tantalum over 5.000.15over 15.00to 20.00,incl 0.15Phosphorus to 0.040,inclover 0.040to 0.20,incl 0.0050.010Tantalum to 0.10,incl 0.02Sulfurto 0.040,inclover 0.040to 0.20,incl over 0.20to 0.50,incl0.0050.0100.020Copperto 0.50,incl over 0.50to 1.00,incl 0.030.05over 1.00to 3.00,incl over 3.00to 5.00,incl over 5.00to10.00,incl0.100.150.20Silicon to 1.00,inclover 1.00to 3.00,incl 0.050.10Chromiumover 4.00to 10.00,incl over 10.00to 15.00,incl over 15.00to 20.00,incl over 20.00to 30.00,incl 0.100.150.200.25Aluminum to 0.15,inclover 0.15to 0.50,incl −0.005,+0.010.05over 0.50to 2.00,incl over 2.00to 5.00,incl over 5.00to 10.00,incl 0.100.200.35Nickelto 1.00,incl0.03Nitrogento 0.02,incl 0.005over 1.00to 5.00,incl 0.07over 0.02to 0.19,incl 0.01over 5.00to 10.00,incl 0.10over 0.19to 0.25,incl 0.02over 10.00to 20.00,incl 0.15over 0.25to 0.35,incl 0.03over 20.00to 30.00,incl 0.20over 0.35to0.45,incl0.04over 30.00to 40.00,incl 0.25over 40.000.30Tungstento 1.00,incl0.03over 1.00to 2.00,incl 0.05Molybdenumover 0.20to 0.60,incl 0.03over 2.00to 5.00,incl 0.07over 0.60to 2.00,incl 0.05over 5.00to 10.00,incl 0.10over 2.00to 7.00,incl 0.10over 10.00to20.00,incl 0.15over 7.00to 15.00,incl 0.15over15.00to 30.00,incl0.20Vanadiumto 0.50,incl0.03over 0.50to 1.50,incl0.05Titaniumto 1.00,inclover 1.00to 3.00,incl over 3.000.050.070.10Selenium all 0.0310.Retreatment10.1Where failure of any lot is due to inadequate heat treatment,the material may be reheat treated and resubmitted for test.11.Test Methods11.1The properties enumerated in applicable specifications shall be determined in accordance with the following ASTM methods:11.1.1Chemical Analysis—Test Methods,Practices,and Terminology A751.11.1.2Tension Test—Test Methods and Definitions A370.11.1.3Intergranular Corrosion(when required)—PracticeE of Practices A262.11.1.4Grain Size(when required)—Test Methods E112.12.Inspection12.1For Civilian Procurement—Inspection of the material shall be as agreed upon between the purchaser and the supplier as part of the purchase contract.12.2For Government Procurement—Unless otherwise specified in the contract or purchase order:(1)the seller is responsible for the performance of all inspection and test requirements in this specification,(2)the seller may use his own or other suitable facilities for the performance of the inspection and testing,and(3)the purchaser shall have the right to perform any of the inspection and tests set forth in this specification.The manufacturer shall afford the purchaser’s inspector all reasonable facilities necessary to satisfy him that the material is being furnished in accordance with the inspec-tion.Inspection by the purchaser shall not interfere unneces-sarily with the manufacturer.13.Rejection and Rehearing13.1Material that fails to conform to the requirements of this specification may be rejected.Rejection should be reported to the producer or supplier promptly,preferably in writing.In case of dissatisfaction with the results of the test,the producer or supplier may make claim for a rehearing.14.Certification14.1A certified report of the test results shall be furnished at the time of shipment.The report shall include the ASTM designation,year date,and revision letter,if any.14.2A document printed from or used in electronic form from an electronic data interchange(EDI)transmission shall be regarded as having the same validity as a counterpart printed in the certifiers’facility.The content of the EDI transmitted document must meet the requirements of the invoked ASTM standard(s)and conform to any existing EDI agreement be-tween the purchaser and the supplier.Notwithstanding theTABLE2Permissible Variations in Size of Hot Finished RoundWire RodsSpecified Size, in.[mm]Permissible Variations SpecifiedSize,in.[mm]Out-of-Round,Ain.[mm] Over Underunder1⁄4[6.35]0.008[0.20]0.008[0.20]0.011[0.28] 1⁄4[6.35]to7⁄16[10]0.006[0.15]0.006[0.15]0.009[0.23] over7⁄16[10]to5⁄8[16]0.007[0.18]0.007[0.18]0.010[0.25] over5⁄8[16]to7⁄8[22]0.008[0.20]0.008[0.20]0.012[0.30] over7⁄8[22]to1-1⁄8[28]0.010[0.25]0.010[0.25]0.015[0.38] over1-1⁄8[28]to1-3⁄8[34]0.012[0.30]0.012[0.30]0.018[0.45] A Out-of-round is the difference between the maximum and minimum diameters of the wire rod measured at the same cross section.TABLE3Permissible Variations in Diameter and Out-of-Roundfor Round Wire A,B,C,DSpecified Diameter,in.[mm]Diameter Tolerances,in.[mm] Over Under1.000[25.00]and over0.0025[0.06]0.0025[0.06] Under1.000[25.00]to0.500[13.00]0.002[0.05]0.002[0.05]Under0.5000[13.00]to0.3125[8.00]incl0.0015[0.04]0.0015[0.04]Under0.3125[8.00]to0.0440[1.00]incl0.001[0.03]0.001[0.03]Under0.0440[1.00]to0.0330[0.80]incl0.0008[0.02]0.0008[0.02]Under0.0330[0.80]to0.0240[0.60]incl0.0005[0.015]0.0005[0.015]Under0.0240[0.60]to0.0120[0.30]incl0.0004[0.010]0.0004[0.010]Under0.0120[0.30]to0.0080[0.20]incl0.0003[0.008]0.0003[0.008]Under0.0080[0.20]to0.0048[0.12]incl0.0002[0.005]0.0002[0.005]Under0.0048[0.12]to0.0030[0.08]incl0.0001[0.003]0.0001[0.003]A The maximum out-of-round for round wire is one half of the total size tolerance given in this table.B When it is necessary to heat treat or heat treat and pickle after coldfinishing, size tolerances are double those shown above for sizes0.024in.[0.60mm]and over.C Size tolerances have not been evolved for wire produced by cold rolling.D These tolerances apply to small diameter straightened and cut wire(sizes below approximately1⁄16in.).Refer to Table5in Specification A484/A484M for bars(greater than approximately1⁄16in.).TABLE4Permissible Variations in Size for Drawn Wire inHexagons,Octagons,and Squares ASpecified Size B in.[mm]Size Tolerance,in.[mm] Over Under1.000[25.00]and over00.005[0.12] Under1.000[25.00]to0.500[13.00]incl00.004[0.10] Under1⁄2[13.00]to5⁄16[8.00]incl00.003[0.08] Under5⁄16[8.00]to1⁄8[3.00]incl00.002[0.05]A When it is necessary to heat treat or heat treat and pickle after coldfinishing, size tolerances are double those shown above.B Distance acrossflats.TABLE5Permissible Variations in Thickness and Width for FlatWireWidth,in.[mm]Permissible Variations in Width,Over andUnder,in.[mm]AFor Thicknesses1⁄4in.[6.5mm]andUnderFor ThicknessesOver1⁄4in.[6.5mm]1⁄16[1.50]to3⁄8[9.0]0.005[0.12]0.005[0.12] over3⁄8[9.0]to1.0[25.00]0.004[0.10]0.004[0.10] over1.0[25.00]0.006[0.15]0.004[0.10] Thickness,in.[mm]Permissible Variations in Thickness,Overand Under,in.[mm]AUp to0.029[0.70],incl0.001[0.03]Over0.029[1.70]to0.035[1.00],incl0.0015[0.04]Over0.035[1.00]0.002[0.05]A When it is necessary to heat treat or heat treat and pickle after coldfinishing, size tolerances are double those shown in the table.absence of a signature,the organization submitting the EDI transmission is responsible for the content of the report. 15.Identification of Material15.1For Civilian Procurement—Each lift,bundle,or box shall be marked using durable tags(metal,plastic,or equiva-lent)showing heat number,type,condition,product specifica-tion number,and size.15.2For ernment Procurement—In addition to any requirements specified in the contract or order,marking shall be in accordance with MIL-STD-129for military agencies and in accordance with Fed.Std.No.123for civil agencies.16.Preparation for Delivery16.1Unless otherwise specified,the wire shall be packaged and loaded in accordance with Practices A700.16.2When specified in the contract or order,and for direct procurement by or direct shipment to the Government,when Level A is specified,preservation,packaging,and packing shall be in accordance with the Level A requirements of MIL-STD-163.17.Keywords17.1general delivery requirements;stainless steel wire; stainless steel wire rodsANNEX(Mandatory Information)A1.REQUIREMENTS FOR THE INTRODUCTION OF NEW MATERIALSA1.1New materials may be proposed for inclusion in specifications referencing this specification subject to the following conditions:A1.1.1Application for the addition of a new grade to a specification shall be made to the chairman of the subcommit-tee which has jurisdiction over that specification.A1.1.2The application shall be accompanied by a statement from at least one user indicating that there is a need for the new grade to be included in the applicable specification.A1.1.3The application shall be accompanied by test data as required by the applicable specification.Test data from a minimum of three test lots,as defined by the specification,each from a different heat,shall be furnished.A1.1.4The application shall provide recommendations for all requirements appearing in the applicable specification.A1.1.5The application shall state whether the new grade is covered by patent.APPENDIXES(Nonmandatory Information)X1.RATIONALE REGARDING DEFINITION OF LOT FOR MECHANICAL PROPERTIES AND CORROSION TESTINGX1.1It is generally recognized that material described as a lot must be“produced under the same processing conditions,”which means the same manufacturing order number,same size, same heat,same heat treating procedure,and same subsequent processing.Under those conditions,single samples can be selected to be representative of the total lot,with at least one sample for each20000pounds of material.X1.2Following the principle described in X1.1generally requires that the producer control each of several furnace loads constituting the same lot so thatX1.2.1Set point temperature and process tolerance match, X1.2.2Time at temperature for all thermal treatment shall match within10%,X1.2.3All furnaces used be similar in size and meet the uniformity requirements of a documented furnace quality assurance program,andX1.2.4The quench systems are the same with respect to volume,type of quenchant,and circulation rate.X1.2.5Further,it would be expected that grouped loads be handled within a relatively short time period,and that hardness testing be performed on at least one sample per charge.X1.3The old definition of a lot for mechanical testing based on simply the words“same size,heat,and heat treatment charge in a batch furnace”assumes that heat treating is the only process affecting properties.This kind of definition ignores the effects of other processing,prior to and subsequent to heat treating.Moreover,it assumes that each heat treat batch will be uniform and unique rather than reproducible.In reality,heat treating is a process which can be controlled easily throughout a batch and from batch to batch,with the net result that multiple batches can be considered part of a single lot if equipment and processing parameters meet the mandates of X1.1and X1.2.X1.4The sampling specified for mechanical properties isnot a statistical sampling plan.Therefore,it provides onlytypical data.Assurance of uniformity within the lot can beobtained only by the producer adequately controlling the processing parameters.X2.BAR CODINGX2.1Bar coding to identify steel is not specifically ad-dressed in Committee A01specifimittee A01 endorses the AIAG Bar Code Standard for primary metals for steel products and proposes that this bar coding standard be considered as a possible auxiliary method of identification.SUMMARY OF CHANGESCommittee A01has identified the location of selected changes made to this standard since the last issue, A555/A555M–97(2002),that may impact the use of this standard.(Approved Sept.1,2005.)(1)Revised Section5to address chemical requirements asapplicable to different categories of elements.ASTM International takes no position respecting the validity of any patent rights asserted in connection with any item mentioned in this ers of this standard are expressly advised that determination of the validity of any such patent rights,and the riskof infringement of such rights,are entirely their own responsibility.This standard is subject to revision at any time by the responsible technical committee and must be reviewed everyfive years and if not revised,either reapproved or withdrawn.Your comments are invited either for revision of this standard or for additional standardsand should be addressed to ASTM International Headquarters.Your comments will receive careful consideration at a meeting of theresponsible technical committee,which you may attend.If you feel that your comments have not received a fair hearing you shouldmake your views known to the ASTM Committee on Standards,at the address shown below.This standard is copyrighted by ASTM International,100Barr Harbor Drive,PO Box C700,West Conshohocken,PA19428-2959, United States.Individual reprints(single or multiple copies)of this standard may be obtained by contacting ASTM at the aboveaddress or at610-832-9585(phone),610-832-9555(fax),or service@(e-mail);or through the ASTM website().。

MX25L512中文资料

MX25L512中文资料

MX25L512512K-BIT [x 1] CMOS SERIAL FLASH FEATURESGENERAL• Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3• 524,288 x 1 bit structure• 16 Equal Sectors with 4K byte each- Any Sector can be erased individually• S ingle Power Supply Operation- 2.7 to 3.6 volt for read, erase, and program operations• L atch-up protected to 100mA from -1V to Vcc +1VPERFORMANCE• H igh Performance- Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)- Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb)• L ow Power Consumption- Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz- Low active programming current: 15mA (max.)- Low active erase current: 15mA (max.)- Low standby current: 10uA (max.)- Deep power-down mode 1uA (typical)• M inimum 100,000 erase/program cyclesSOFTWARE FEATURES• Input Data Format- 1-byte Command code• Block Lock protection- The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase in-structions.• Auto Erase and Auto Program Algorithm- Automatically erases and verifies data at selected sector- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)• Status Register Feature• Electronic Identification- JEDEC 2-byte Device ID- RES command, 1-byte Device IDHARDWARE FEATURES• SCLK Input- Serial clock input• SI Input- Serial Data Input• SO Output- Serial Data Output• WP# pin- Hardware write protection• HOLD# pin- pause the chip without diselecting the chip• PACKAGE- 8-pin SOP (150mil)- 8-USON (2x3mm)- All Pb-free devices are RoHS CompliantGENERAL DESCRIPTIONMX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. MX25L512 features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input.MX25L512 provide sequential read operation on whole chip.After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the spec-ified page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase command is executes on chip or sector (4K-bytes).To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC cur-rent.The MX25L512 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.PIN CONFIGURATIONSSYMBOL DESCRIPTION CS#Chip SelectSI Serial Data Input SO Serial Data Output SCLK Clock InputHOLD#Hold, to pause the device without deselecting the device WP#Write ProtectionVCC + 3.3V Power Supply GNDGroundPIN DESCRIPTION8-PIN SOP (150mil)CS#SO WP#GND VCC HOLD#SCLK SI8-LAND USON (2x3mm)CS#SO WP#GND VCC HOLD#SCLK SIBLOCK DIAGRAMDATA PROTECTIONMX25L512 is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transition. During power up the device automatically resets the state ma-chine in the standby mode. In addition, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific command sequences. The device also incorporates several features to prevent inadvertent write cycles resulting from VCC power-up and power-down transition or system noise.• Valid command length checking: The command length will be checked whether it is at byte base and completed on byte boundary.• Write Enable (WREN) command: WREN command is required to set the Write Enable Latch bit (WEL) before other command to change data. The WEL bit will return to reset stage under following situation:- Power-up- Write Disable (WRDI) command completion- Write Status Register (WRSR) command completion- Page Program (PP) command completion- Sector Erase (SE) command completion- Block Erase (BE) command completion- Chip Erase (CE) command completion• Software Protection Mode (SPM): by using BP0-BP1 bits to set the part of Flash protected from data change.• Hardware Protection Mode (HPM): by using WP# going low to protect the BP0-BP1 bits and SRWD bit from data change.• Deep Power Down Mode: By entering deep power down mode, the flash device also is under protected from writing all commands except Release from deep power down mode command (RDP) and Read Electronic Sig-nature command (RES).Table 1. Protected Area SizesStatus bitProtect level 512b BP1 BP00 0 0 (none) None 0 1 1 (All)All 1 0 2 (All)All 113 (All)AllHOLD FEATUREHOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the operation of write status register, programming, or erasing in progress.The operation of HOLD requires Chip Select(CS#) keeping low and starts on falling edge of HOLD# pin signal while Serial Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Se-rial Clock(SCLK) signal is being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1.The Serial Data Output (SO) is high impedance, both Serial Data Input (SI) and Serial Clock (SCLK) are don't care during the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of the device. To re-start communication with chip, the HOLD# must be at high and CS# must be at low.Figure 1. Hold Condition OperationTable 2. COMMAND DEFINITION(1) ADD=00H will output the manufacturer's ID first and ADD=01H will output device ID first.(2) BE command may erase whole 512Kb chip.(3) It is not recommended to adopt any other code which is not in the above command definition table.COMMAND (byte)WREN (write enable)WRDI (write disable)RDID (readidentification)RDSR (read status register)WRSR (write status register)READ(read data)Fast Read(fast readdata)1st 06 (hex)04 (hex)9F (hex)05 (hex)01 (hex)03 (hex)0B (hex)2nd AD1AD13rd AD2AD24th AD3AD35th xActionsets the (WEL) write enable latch bit resets the (WEL) write enable latchbit outputs manufacturer ID and 2-byte device IDto read out the status register to write new values to the status register n bytes read out until CS# goes highCOMMAND (byte)SE(Sector Erase)BE (2)(Block Erase)CE (Chip Erase)PP(Page Program)DP(Deep Power Down) RDP(Release from Deep Power-down) RES (ReadElectronicID)REMS (ReadElectronicManufacturer& Device ID)1st 20 (hex)52 or D8 (hex)60 or C7 (hex)02 (hex) B9 (hex)AB (hex)AB (hex)90 (hex)2nd AD1AD1AD1x x 3rd AD2AD2AD2x x 4th AD3AD3AD3xADD(1)5th ActionOutput the manufacturer ID and deviceIDDEVICE OPERATION1. Before a command is issued, status register should be checked to ensure device is ready for the intended op-eration.2. When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby modeuntil next CS# falling edge. In standby mode, SO pin of this LSI should be High-Z.3. When correct command is inputted to this LSI, this LSI becomes active mode and keeps the active mode until next CS# rising edge.4. Input data is latched on the rising edge of Serial Clock(SCLK) and data shifts out on the falling edge of SCLK. The difference of SPI mode 0 and mode 3 is shown as Figure 2.Figure 2. SPI Modes SupportedSCLKMSBCPHA shift inshift outSI 01CPOL(Serial mode 0)(Serial mode 3)1SO SCLKMSB5. For the following instructions: RDID, RDSR, READ, FAST_READ, RES and REMS the shifted-in instruction se-quence is followed by a data-out sequence. After any bit of data being shifted out, the CS# can be high. For the following instructions: WREN, WRDI, WRSR, SE, BE, CE, PP , RDP and DP the CS# must go high exactly at the byte boundary; otherwise, the instruction will be rejected and not executed.6. During the progress of Write Status Register, Program, Erase operation, to access the memory array is neglect-ed and not affect the current operation of Write Status Register, Program, Erase. Table 3. Memory OrganizationNote:CPOL indicates clock polarity of SPI master, CPOL=1 for SCLK high while idle, CPOL=0 for SCLK low while not transmitting. CPHA indicates clock phase. The combination of CPOL bit and CPHA bit decides which SPI mode is supported.Sector Address Range1500F000h 00FFFFh:::3003000h 003FFFh 2002000h 002FFFh 1001000h 001FFFh 0000000h 000FFFhCOMMAND DESCRIPTION(1) Write Enable (WREN)The Write Enable (WREN) instruction is for setting Write Enable Latch (WEL) bit. For those instructions like PP, SE, BE, CE, and WRSR, which are intended to change the device content, should be set every time after the WREN in-struction setting the WEL bit.The sequence of issuing WREN instruction is: CS# goes low-> sending WREN instruction code-> CS# goes high. (see Figure 11)(2) Write Disable (WRDI)The Write Disable (WRDI) instruction is for resetting Write Enable Latch (WEL) bit.The sequence of issuing WRDI instruction is: CS# goes low-> sending WRDI instruction code-> CS# goes high. (see Figure 12)The WEL bit is reset by following situations:- Power-up- Write Disable (WRDI) instruction completion- Write Status Register (WRSR) instruction completion- Page Program (PP) instruction completion- Sector Erase (SE) instruction completion- Block Erase (BE) instruction completion- Chip Erase (CE) instruction completion(3) Read Identification (RDID)RDID instruction is for reading the manufacturer ID of 1-byte and followed by Device ID of 2-byte. The MXIC Manu-facturer ID is C2(hex), the memory type ID is 20(hex) as the first-byte device ID, and the individual device ID of second-byte ID is as followings: 10(hex) for MX25L512.The sequence of issuing RDID instruction is: CS# goes low→sending RDID instruction code→24-bits ID data out on SO→to end RDID operation can use CS# to high at any time during data out. (see Figure. 13)While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cy-cle of program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage.(4) Read Status Register (RDSR)The RDSR instruction is for reading Status Register Bits. The Read Status Register can be read at any time (even in program/erase/write status register condition) and continuously. It is recommended to check the Write in Progress (WIP) bit before sending a new instruction when a program, erase, or write status register operation is in progress. The sequence of issuing RDSR instruction is: CS# goes low→sending RDSR instruction code→Status Register data out on SO (see Figure. 14)The definition of the status register bits is as below:WIP bit. The Write in Progress (WIP) bit, a volatile bit, indicates whether the device is busy in program/erase/write status register progress. When WIP bit sets to 1, which means the device is busy in program/erase/write status register progress. When WIP bit sets to 0, which means the device is not in progress of program/erase/write status register cycle.WEL bit. The Write Enable Latch (WEL) bit, a volatile bit, indicates whether the device is set to internal write enable latch. When WEL bit sets to 1, which means the internal write enable latch is set, the device can accept program/erase/write status register instruction. When WEL bit sets to 0, which means no internal write enable latch; the de-vice will not accept program/erase/write status register instruction.BP1, BP0 bits. The Block Protect (BP1, BP0) bits, non-volatile bits, indicate the protected area(as defined in table 1) of the device to against the program/erase instruction without hardware protection mode being set. To write the Block Protect (BP1, BP0) bits requires the Write Status Register (WRSR) instruction to be executed. Those bits define the protected area of the memory to against Page Program (PP), Sector Erase (SE), Block Erase (BE) and Chip Erase(CE) instructions (only if all Block Protect bits set to 0, the CE instruction can be executed)SRWD bit. The Status Register Write Disable (SRWD) bit, non-volatile bit, is operated together with Write Protec-tion (WP#) pin for providing hardware protection mode. The hardware protection mode requires SRWD sets to 1 and WP# pin signal is low stage. In the hardware protection mode, the Write Status Register (WRSR) instruction is no longer accepted for execution and the SRWD bit and Block Protect bits (BP1, BP0) are read only.Note: 1. See the table "Protected Area Sizes".2. The endurance cycles of protect bits are 100,000 cycles; however, the tW time out spec of protect bits isrelaxed as tW = N x 15ms (N is a multiple of 10,000 cycles, ex. N = 2 for 20,000 cycles) after 10,000 cycles on those bits.bit7bit6bit5bit4bit3bit2bit1bit0SRWD (status register write protect)0BP1 (level of protected block)BP0 (level of protected block)WEL (write enable latch)WIP (write inprogress bit)1=status register write disable(note 1)(note 1)1=write enable 0=not write enable 1=write operation 0=not in write operation(5) Write Status Register (WRSR)The WRSR instruction is for changing the values of Status Register Bits. Before sending WRSR instruction, the Write Enable (WREN) instruction must be decoded and executed to set the Write Enable Latch (WEL) bit in ad-vance. The WRSR instruction can change the value of Block Protect (BP1, BP0) bits to define the protected area of memory (as shown in table 1). The WRSR also can set or reset the Status Register Write Disable (SRWD) bit in accordance with Write Protection (WP#) pin signal. The WRSR instruction cannot be executed once the Hardware Protected Mode (HPM) is entered.The sequence of issuing WRSR instruction is: CS# goes low-> sending WRSR instruction code-> Status Register data on SI-> CS# goes high. (see Figure 15)The WRSR instruction has no effect on b6, b5, b4, b1, b0 of the status register.The CS# must go high exactly at the byte boundary; otherwise, the instruction will be rejected and not executed. The self-timed Write Status Register cycle time (tW) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Write Status Register cycle is in progress. The WIP sets 1 during the tW timing, and sets 0 when Write Status Register Cycle is completed, and the Write Enable Latch (WEL) bit is reset.Table 4. Protection ModesNote:1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in Table 1.As the table above showing, the summary of the Software Protected Mode (SPM) and Hardware Protected Mode (HPM). Software Protected Mode (SPM):- When SRWD bit=0, no matter WP# is low or high, the WREN instruction may set the WEL bit and can changethe values of SRWD, BP1, BP0. The protected area, which is defined by BP1, BP0, is at software protected mode (SPM).- When SRWD bit=1 and WP# is high, the WREN instruction may set the WEL bit can change the values ofSRWD, BP1, BP0. The protected area, which is defined by BP1, BP0, is at software protected mode (SPM)ModeStatus register condition WP# and SRWD bit status Memory Software protectionmode (SPM)Status register can be written in (WEL bit is set to "1") andthe SRWD, BP0-BP1bits can be changed WP#=1 and SRWD bit=0, or WP#=0 and SRWD bit=0, or WP#=1 and SRWD=1The protected areacannotbe program or erase.Hardware protectionmode (HPM)The SRWD, BP0-BP1 of status register bits cannot bechangedWP#=0, SRWD bit=1The protected areacannotbe program or erase.Note: If SRWD bit=1 but WP# is low, it is impossible to write the Status Register even if the WEL bit has previously been set. It is rejected to write the Status Register and not be executed.Hardware Protected Mode (HPM):- When SRWD bit=1, and then WP# is low (or WP# is low before SRWD bit=1), it enters the hardware protected mode (HPM). The data of the protected area is protected by software protected mode by BP1, BP0 and hard-ware protected mode by the WP# to against data modification.Note: to exit the hardware protected mode requires WP# driving high once the hardware protected mode is entered. If the WP# pin is permanently connected to high, the hardware protected mode can never be entered; only can use software protected mode via BP1, BP0.(6) Read Data Bytes (READ)The read instruction is for reading data out. The address is latched on rising edge of SCLK, and data shifts out on the falling edge of SCLK at a maximum frequency fR. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single READ instruction. The address counter rolls over to 0 when the highest address has been reached.The sequence of issuing READ instruction is: CS# goes low→ sending READ instruction code→ 3-byte address on SI→ data out on SO→ to end READ operation can use CS# to high at any time during data out. (see Figure. 16) (7) Read Data Bytes at Higher Speed (FAST_READ)The FAST_READ instruction is for quickly reading data out. The address is latched on rising edge of SCLK, and data of each bit shifts out on the falling edge of SCLK at a maximum frequency fC. The first address byte can be at any location. The address is automatically increased to the next higher address after each byte data is shifted out, so the whole memory can be read out at a single FAST_READ instruction. The address counter rolls over to 0 when the highest address has been reached.The sequence of issuing FAST_READ instruction is: CS# goes low→ sending FAST_READ instruction code→ 3-byte address on SI→ 1-dummy byte address on SI→data out on SO→ to end FAST_READ operation can use CS# to high at any time during data out. (see Figure. 17)While Program/Erase/Write Status Register cycle is in progress, FAST_READ instruction is rejected without any im-pact on the Program/Erase/Write Status Register current cycle.(8) Sector Erase (SE)The Sector Erase (SE) instruction is for erasing the data of the chosen sector to be "1". A Write Enable (WREN) in-struction must execute to set the Write Enable Latch (WEL) bit before sending the Sector Erase (SE). Any address of the sector (see table 3) is a valid address for Sector Erase (SE) instruction. The CS# must go high exactly at the byte boundary (the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed.Address bits [Am-A12] (Am is the most significant address) select the sector address.The sequence of issuing SE instruction is: CS# goes low → sending SE instruction code→ 3-byte address on SI → CS# goes high. (see Figure 19)The self-timed Sector Erase Cycle time (tSE) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Sector Erase cycle is in progress. The WIP sets 1 during the tSE timing, and sets 0 when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the page is protected by BP1, BP0 bits, the Sector Erase (SE) instruction will not be executed on the page.(9) Block Erase (BE)The Block Erase (BE) instruction is for erasing the data of the chosen block to be "1". A Write Enable (WREN) in-struction must execute to set the Write Enable Latch (WEL) bit before sending the Block Erase (BE). Any address of the block (see table 3) is a valid address for Block Erase (BE) instruction. The CS# must go high exactly at the byte boundary (the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed.The sequence of issuing BE instruction is: CS# goes low → sending BE instruction code→ 3-byte address on SI → CS# goes high. (see Figure 20)The self-timed Block Erase Cycle time (tBE) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Sector Erase cycle is in progress. The WIP sets 1 during the tBE timing, and sets 0 when Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the page is protected by BP1, BP0 bits, the Block Erase (BE) instruction will not be executed on the page.(10) Chip Erase (CE)The Chip Erase (CE) instruction is for erasing the data of the whole chip to be "1". A Write Enable (WREN) instruc-tion must execute to set the Write Enable Latch (WEL) bit before sending the Chip Erase (CE). Any address of the sector (see table 3) is a valid address for Chip Erase (CE) instruction. The CS# must go high exactly at the byte boundary( the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not ex-ecuted.The sequence of issuing CE instruction is: CS# goes low→ sending CE instruction code→ CS# goes high. (see Figure 20)The self-timed Chip Erase Cycle time (tCE) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Chip Erase cycle is in progress. The WIP sets 1 during the tCE timing, and sets 0 when Chip Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the chip is protected by BP1, BP0 bits, the Chip Erase (CE) instruction will not be executed. It will be only executed when BP1, BP0 all set to "0".(11) Page Program (PP)The Page Program (PP) instruction is for programming the memory to be "0". A Write Enable (WREN) instruction must execute to set the Write Enable Latch (WEL) bit before sending the Page Program (PP). If the eight least sig-nificant address bits (A7-A0) are not all 0, all transmitted data which goes beyond the end of the current page are programmed from the start address if the same page (from the address whose 8 least significant address bits (A7-A0) are all 0). The CS# must keep during the whole Page Program cycle. The CS# must go high exactly at the byte boundary( the latest eighth of address byte been latched-in); otherwise, the instruction will be rejected and not executed. If more than 256 bytes are sent to the device, the data of the last 256-byte is programmed at the request page and previous data will be disregarded. If less than 256 bytes are sent to the device, the data is programmed at the request address of the page without effect on other address of the same page.The sequence of issuing PP instruction is: CS# goes low→ sending PP instruction code→ 3-byte address on SI→at least 1-byte on data on SI→ CS# goes high. (see Figure 18)The self-timed Page Program Cycle time (tPP) is initiated as soon as Chip Select (CS#) goes high. The Write in Progress (WIP) bit still can be check out during the Page Program cycle is in progress. The WIP sets 1 during the tPP timing, and sets 0 when Page Program Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the page is protected by BP1, BP0 bits, the Page Program (PP) instruction will not be executed.(12) Deep Power-down (DP)The Deep Power-down (DP) instruction is for setting the device on the minimizing the power consumption (to enter-ing the Deep Power-down mode), the standby current is reduced from ISB1 to ISB2). The Deep Power-down mode requires the Deep Power-down (DP) instruction to enter, during the Deep Power-down mode, the device is not ac-tive and all Write/Program/Erase instruction are ignored. When CS# goes high, it's only in standby mode not deep power-down mode. It's different from Standby mode.The sequence of issuing DP instruction is: CS# goes low→ sending DP instruction code→ CS# goes high. (see Fig-ure 22)Once the DP instruction is set, all instruction will be ignored except the Release from Deep Power-down mode (RDP) and Read Electronic Signature (RES) instruction. (RES instruction to allow the ID been read out). When Power-down, the deep power-down mode automatically stops, and when power-up, the device automatically is in standby mode. For RDP instruction the CS# must go high exactly at the byte boundary (the latest eighth bit of instruction code been latched-in); otherwise, the instruction will not executed. As soon as Chip Select (CS#) goes high, a delay of tDP is required before entering the Deep Power-down mode and reducing the current to ISB2.(13) Release from Deep Power-down (RDP), Read Electronic Signature (RES)The Release from Deep Power-down (RDP) instruction is terminated by driving Chip Select (CS#) High. When Chip Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device was not previously in the Deep Power-down mode, the transition to the Stand-by Power mode is immediate. If the device was previously in the Deep Power-down mode, though, the transition to the Stand-by Power mode is delayed by tRES2, and Chip Select (CS#) must remain High for at least tRES2(max), as specified in Table 6. Once in the Stand-by Power mode, the device waits to be selected, so that it can receive, decode and execute instructions.RES instruction is for reading out the old style of 8-bit Electronic Signature, whose values are shown as table of ID Definitions. This is not the same as RDID instruction. It is not recommended to use for new design. For new deisng, please use RDID instruction. Even in Deep power-down mode, the RDP and RES are also allowed to be executed, only except the device is in progress of program/erase/write cycle; there's no effect on the current program/erase/ write cycle in progress.The sequence is shown as Figure 23,24.The RES instruction is ended by CS# goes high after the ID been read out at least once. The ID outputs repeat-edly if continuously send the additional clock cycles on SCLK while CS# is at low. If the device was not previously in Deep Power-down mode, the device transition to standby mode is immediate. If the device was previously in Deep Power-down mode, there's a delay of tRES2 to transit to standby mode, and CS# must remain to high at least tRES2(max). Once in the standby mode, the device waits to be selected, so it can be receive, decode, and execute instruction.The RDP instruction is for releasing from Deep Power Down Mode.(14) Read Electronic Manufacturer ID & Device ID (REMS)The REMS instruction is an alternative to the Release from Power-down/Device ID instruction that provides both the JEDEC assigned manufacturer ID and the specific device ID.The REMS instruction is very similar to the Release from Power-down/Device ID instruction. The instruction is initi-ated by driving the CS# pin low and shift the instruction code "90h" followed by two dummy bytes and one bytes address (A7~A0). After which, the Manufacturer ID for MXIC (C2h) and the Device ID are shifted out on the falling edge of SCLK with most significant bit (MSB) first as shown in figure 25. The Device ID values are listed in Table of ID Definitions on page 16. If the one-byte address is initially set to 01h, then the device ID will be read first and then followed by the Manufacturer ID. The Manufacturer and Device IDs can be read continuously, alternating from one to the other. The instruction is completed by driving CS# high.Table of ID Definitions:RDID Command manufacturer ID memory type memory density C22010RES Command electronic ID05REMS Command manufacturer ID device ID C205。

ST510中文技术手册

ST510中文技术手册
Flex Instrument
ST510
称重显示控制器 用户手册
---基本应用版本
Rev0.7 2011/11
S ........................................................................................................................................................... 4 1.1 性能指标 ........................................................................................................................................ 4 1.2 采购型号选择 ................................................................................................................................ 5 2 键盘菜单 ................................................................................................................................................... 6 2.1 键盘操作说明 .....................................................................................................................

NFR25中文资料

NFR25中文资料

NFR25/25HVishay BCcomponentsFusible, Non-Flammable ResistorsFEATURES• Overload protection without risk of fire • Wide range of overload currents.APPLICATIONS• Audio •Video.A homogeneous film of metal alloy is deposited on a high grade ceramic body. After a helical groove has been cut in the resistive layer, tinned connecting wires of electrolytic copper are welded to the end-caps. The resistors are coated with a grey, flame retardant lacquer which provideselectrical, mechanical, and climatic protection. The encapsulation is resistant to all cleaning solvents in accordance with “MIL-STD-202E, method 215”, and “IEC 60068-2-45”.Note1.Ohmic values (other than resistance range) are available on request.元器件交易网NFR25/25HVishay BCcomponentsFusible, Non-Flammable ResistorsORDERING INFORMATIONNumeric Ordering Code (12NC)• The resistors have a 12-digit ordering code starting with 23 • The subsequent 7 digits indicate the resistor type and packaging.• The remaining 3 digits indicate the resistance values:–The first 2 digits indicate the resistance value.–The last digit indicates the resistance decade.Last Digit of 12NC Indicating Resistance DecadeOrdering ExampleThe ordering code for a NFR25 resistor with value 750 Ω ,supplied on a bandolier of 1000 units in ammopack is:2322 205 13751.RESISTANCE DECADELAST DIGIT0.22 to 0.91 Ω 71 to 9.1 Ω 810 to 91 Ω 9100 to 910 Ω 11 to 9.1 k Ω 210 to 15 k Ω3DIMENSIONSOutline.MARKINGThe nominal resistance and tolerance are marked on the resistor using four coloured bands in accordance with IEC publication 60062 “Colour codes for fixed resistors”.For ease of recognition a fifth ring is added, which is violet for type NFR25 and white for type NFR25H.OUTLINESThe length of the body (L 1 ) is measured by inserting the leads into holes of two identical gauge plates and moving these plates parallel to each other until the resistor body is clamped without deformation (“IEC publication 60294”).FUNCTIONAL PERFORMANCE PRODUCT CHARACTERIZATIONStandard values of nominal resistance are taken from the E24 series for resistors with a tolerance of ±5%. The values of the E24 series are in accordance with “IEC publication 60063”.Note1.The maximum voltage that may be continuously applied to the resistor element, see “IEC publication 60115-1”.元器件交易网NFR25/25HFusible, Non-Flammable ResistorsVishay BCcomponentsThe power that the resistor can dissipate depends on the operating temperature.The resistors will fuse without the risk of fire and within an indicated range of overload. Fusing means that the resistive value of the resistor increases at least 100 times.The fusing characteristic is measured under constant voltage.DeratingMaximum dissipation (P max ) in percentage of rated power asa function of the ambient temperature (T amb ).NFR25according to the application. Fusing Characteristics: ≤ 1 Ω.NFR25 according to the application. Fusing Characteristics: 1 Ω ≤ R ≤ 15 Ω.NFR25 This graph is based on measured data which may deviate according to the application. Fusing Characteristics: 15 Ω ≤ R ≤ 15 Ω.NFR25H This graph is based on measured data which may deviateaccording to the application. Fusing Characteristics: ≤ 1 Ω.NFR25H This graph is based on measured data which may deviate according to the application. Fusing Characteristic.元器件交易网NFR25/25HVishay BCcomponentsFusible, Non-Flammable ResistorsNFR25 Pulse on a regular basis; maximum permissible peak pulse power as a functionof pulse duration (t i ), 0.22 Ω≤ R < 15 Ω.P max ()NFR25 Pulse on a regular basis; maximum permissible peak pulse power as a functionof pulse duration (t i ), 15 Ω< R ≤ 15 k Ω.P max ()a function of pulse duration (t i ).max 元器件交易网NFR25/25HFusible, Non-Flammable ResistorsVishay BCcomponentsPulse on a regular basis; maximum permissible peak pulse poweras a function of pulse duration (t i ).P max ()Pulse Loading CapabilitiesPulse on a regular basis; maximum permissible peak pulsevoltage as a function of pulse duration (t i ).V max ()Application InformationNFR25 Hot-spot temperature rise (∆T) as a function of dissipated power.NFR25/25HVishay BCcomponentsFusible, Non-Flammable ResistorsNFR25 Temperature rise (∆T) at the lead end (soldering point) as a function of dissipated powerat various lead lengths after mounting.Minimun distance from resistor body to PCB = 1 mm.NFR25H Hot-spot temperature rise (∆T) as a functionof dissipated power.NFR25H Temperature rise (∆T) at the lead end (soldering point) as a function of dissipated power atvarious lead lengths after mounting.Minimun distance from resistor body to PCB = 1 mm.TESTS AND REQUIREMENTSEssentially all tests are carried out in accordance with the schedule of “IEC publication 60115-1”, category LCT/UCT/56 (rated temperature range: Lower Category Temperature, Upper Category Temperature; damp heat, long term, 56 days). The testing also covers the requirements specified by EIA and EIAJ.The tests are carried out in accordance with IEC publication 60068-2, “Recommended basic climatic and mechanical robustness testing procedure for electronic components” and under standard atmospheric conditions according to “IEC 60068-1”, subclause 5.3.In the Test Procedures and Requirements table the tests and requirements are listed with reference to the relevant clauses of “IECpublications 60115-1and60068-2”; a short description of the test procedure is also given. In some instances deviations from the IEC recommendations were necessary for our method of specifying. For inflammability requirements reference is made to “IEC 60115-1” and to “EN 140000, appendix D”.All soldering tests are performed with mildly activated flux.。

起重机用385

起重机用385

起重机用385/95R25无内胎全钢子午线轮胎的轻量化设计陈 宇,李晓明,刘 涛,周亚兵,娄召阳,崔志武(风神轮胎股份有限公司,河南焦作 454003)摘要:介绍起重机用385/95R25无内胎全钢子午线轮胎的轻量化设计。

轻量化设计如下:1#—3#带束层由使用3+9+15×0.225钢丝帘线调整为使用3+9+15×0.22+0.15钢丝帘线,2#—4#带束层宽度减小,钢丝圈钢丝排列形式由9-13-9调整后为7-12-8,减小防水线位置处的耐磨胶厚度和三角胶整体厚度。

与正常轮胎相比,轻量化轮胎在负荷状态下各部位的应变能密度均有所降低,在行驶过程中整体生热降低,总质量减小10.67 kg,强度性能满足客户要求,耐久性能提高15.7%,高速性能提高106.4%,有利于延长轮胎的使用寿命。

关键词:无内胎全钢子午线轮胎;轻量化;带束层;胎圈;成品轮胎性能;使用寿命中图分类号:U463.341+.5 文章编号:1006-8171(2023)09-0535-04文献标志码:A DOI:10.12135/j.issn.1006-8171.2023.09.0535近年来,随着市场对起重机需求的不断增加,我国起重机的出口量也日益增大,但是与国外起重机相比,国内起重机在质量上仍有一定的差距。

此外,由于碳中和和碳达峰政策的实行以及国家法规的最新要求,整车轻量化已经成为国内各大主机厂的发展目标。

轮胎作为汽车起重机的主要配件之一,它的轻量化势必成为一种趋势。

轮胎的轻量化对于减少胶料使用、降低生产成本、减少碳排放、保护环境、推进绿色制造起到重要作用[1-4]。

我公司针对起重机用385/95R25无内胎全钢子午线轮胎,在原结构设计的基础上调整带束层和胎圈结构等,实现轮胎的轻量化以及产品性能的提高,现将轮胎的轻量化设计情况介绍如下。

1 技术要求起重机用385/95R25无内胎全钢子午线轮胎的技术参数如下:星级 3星,推荐轮辋 10.00/1.5-25,充气外直径 1 347~1 392 mm,充气断面宽 365~414 mm,标准负荷 6 000 kg,标准充气压力 900 kPa。

PHOENIX CONTACT -MSTBT 2,5 5-ST 数据手册

PHOENIX CONTACT -MSTBT 2,5 5-ST 数据手册

Extract from the onlinecatalogMSTBT 2,5/ 5-STOrder No.: 1779864The figure shows a 10-position version of the product/phoenix/treeViewClick.do?UID=1779864Plug component, Nominal current: 12 A, Nom. voltage: 250 V, Pitch:5 mm, Number of positions: 5, Connection type: Screw connection, Color: greenhttp://Please note that the data givenhere has been taken from theonline catalog. For comprehensiveinformation and data, please referto the user documentation. TheGeneral Terms and Conditions ofUse apply to Internet downloads. Technical dataDimensions / positionsPitch 5 mmDimension a20 mmNumber of positions5Screw thread M3Tightening torque, min0.5 NmTightening torque max0.6 NmTechnical dataInsulating material group IRated surge voltage (III/3) 4 kVRated surge voltage (III/2) 4 kVRated surge voltage (II/2) 4 kVRated voltage (III/2)320 VRated voltage (II/2)630 VConnection in acc. with standard EN-VDENominal current I N12 ANominal voltage U N250 VNominal cross section 2.5 mm²Maximum load current12 A (with 2.5 mm2 conductor cross section) Insulating material PAInflammability class acc. to UL 94V0Internal cylindrical gage A3Stripping length7 mmConnection dataConductor cross section solid min.0.2 mm²Conductor cross section solid max. 2.5 mm²Conductor cross section stranded min.0.2 mm²Conductor cross section stranded max. 2.5 mm²0.25 mm²Conductor cross section stranded, with ferrulewithout plastic sleeve min.Conductor cross section stranded, with ferrule2.5 mm²without plastic sleeve max.0.25 mm²Conductor cross section stranded, with ferrulewith plastic sleeve min.1.5 mm²Conductor cross section stranded, with ferrulewith plastic sleeve max.Conductor cross section AWG/kcmil min.24Conductor cross section AWG/kcmil max122 conductors with same cross section, solid min.0.2 mm²2 conductors with same cross section, solid max. 1 mm²2 conductors with same cross section, strandedmin.0.2 mm²2 conductors with same cross section, strandedmax.1.5 mm²2 conductors with same cross section, stranded,ferrules without plastic sleeve, min.0.25 mm²2 conductors with same cross section, stranded,ferrules without plastic sleeve, max.1 mm²2 conductors with same cross section, stranded,TWIN ferrules with plastic sleeve, min.0.5 mm²2 conductors with same cross section, stranded,TWIN ferrules with plastic sleeve, max.1.5 mm²Certificates / ApprovalsCertification CB, CSA, CUL, GOST, UL, VDE-PZICSANominal voltage U N300 VNominal current I N10 AAWG/kcmil28-12CULNominal voltage U N300 VNominal current I N10 AAWG/kcmil30-12ULNominal voltage U N300 VNominal current I N10 AAWG/kcmil30-12AccessoriesItem Designation DescriptionGeneral1733169EBP 2- 5Insertion bridge, fully insulated, for plug connectors with 5.0 or5.08 mm pitch, no. of positions: 21803895KGG-MSTB 2,5/ 5Cable housing, Number of positions: 5, Dimension a: 25 mm,Color: greenMarking0804183SK 5/3,8:FORTL.ZAHLEN Marker card, printed horizontally, self-adhesive, 12 identicaldecades marked 1-10, 11-20 etc. up to 91-(99)100, sufficient for120 terminal blocksPlug/Adapter1734634CP-MSTB Keying profile, is inserted into the slot on the plug or invertedheader, red insulating materialTools1205053SZS 0,6X3,5Screwdriver, bladed, matches all screw terminal blocks up to 4.0mm² connection cross section, blade: 0.6 x 3.5 mm, without VDEapprovalAdditional productsItem Designation DescriptionGeneral0707138DFK-MSTB 2,5/ 5-G Plug component, Nominal current: 12 A, Nom. voltage: 320 V,Nom. voltage: 320 V, Pitch: 5 mm, Number of positions: 5, Color:green, Assembly: Direct mounting1899870EMSTBA 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Press-in 1914881EMSTBVA 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 200 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Press-in 1846548MDSTBA 2,5/ 5-G Header, Nominal current: 10 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1845811MDSTBVA 2,5/ 5-G Header, Nominal current: 10 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1754494MSTB 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1768215MSTB 2,5/ 5-G-LA Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Assembly: Soldering1757501MSTBA 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1770517MSTBA 2,5/ 5-G-LA Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Assembly: Soldering1753495MSTBV 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1755545MSTBVA 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1736085MSTBW 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1769269SMSTB 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering 1769832SMSTBA 2,5/ 5-G Header, Nominal current: 12 A, Nom. voltage: 250 V, Pitch: 5 mm,Number of positions: 5, Color: green, Assembly: Soldering Diagrams/DrawingsDiagramDimensioned drawingAddressPHOENIX CONTACT GmbH & Co. KGFlachsmarktstr. 832825 Blomberg,GermanyPhone +49 5235 3 00Fax +49 5235 3 41200© 2010 Phoenix ContactTechnical modifications reserved;。

市场锻造 ST-5G 炉锅蒸汽煮沸指南说明书

市场锻造 ST-5G 炉锅蒸汽煮沸指南说明书

EFFECTIVE JUNE 12, 2015ST-5GGAS COUNTERTOP CONVECTION STEAMERPARTS AND SERVICE MANUALMARKET FORGETelephone: (802) 658-6600 Fax: (802) 860-3732Superseding All Previous Parts Lists.The Company reserves the right to make substitution in the event that items specified are not available.ERRORS: Descriptive and/or typographic errors are subject to correction.TABLE OF CONTENTSGENERAL TROUBLESHOOTING GUIDE (3)TROUBLESHOOTING (5)ELECTRICAL FAULT ISOLATION GUIDE (6)WIRING DIAGRAMS (7)ILLUSTRATED PARTS LISTMAIN ASSEMBLY (9)DOOR ASSEMBLY (12)BURNER, PROPANE AND NATURAL GAS ASSEMBLY (13)GAS PLUMBING AND VALVE ASSEMBLY (14)IMPORTANT NOTICE: AT LEAST TWICE A YEAR, HAVE AN AUTHORIZED SERVICE PERSON CLEAN AND ADJUST THE UNIT FOR MAXIMUM PERFORMANCE.ADJUSTMENTS AND SERVICE WORK MAY BE PERFORMED ONLY BY A QUALIFIED TECHNICIAN WHO IS EX-PERIENCED IN AND KNOWLEDGEABLE WITH THE OPERATION OF COMMERCIAL GAS COOKING EQUIPMENT. HOWEVER, TO ASSURE YOUR CONFIDENCE, CONTACT YOUR AUTHORIZED SERVICE AGENCY FOR RELIABLESERVICE, DEPENDABLE ADVICE OR OTHER ASSISTANCE AND FOR GENUINE FACTORY PARTS.FINDING, UNDERSTANDING AND FIXING THE PROB-LEMTimer Contacts (60 Minute Timer)Defective timer contacts will result in failure of cooker compartment to operate. When this occurs, remove the control pan and proceed as follows:1. Turn off power to the cooker at external circuit break-er.2. Disconnect all five wires from timer terminals.3. Connect an ohmmeter terminals 1 and 3.4. Rotate timer dial beyond the “0 minute” point (anysetting) to obtain a reading of zero ohms on the ohmmeter. If zero ohm reading cannot be obtained, timer contacts are defective and the timer must be replaced.5. Move ohmmeter leads to terminals 1 and 4.6. Rotate timer dial to “0 minute” position (an audibleclick indicates correct position). If zero ohm reading cannot be obtained, timer contacts are defective and the timer must be replaced.7. Remove ohmmeter and replace all five leads on timerterminals.Timer Motor (60 Minute Timer)A defective timer motor will cause continuous operation in the TIME mode, with the timer dial failing to return to the “0 minute” position. Carefully check motor condition, proceed as follows:1. Carefully check motor wire leads and tighten loseconnections. !! WARNING: !! USE CARE WHILE WORKING WITH CONTROL PANEL. TERMINALS CARRY 120 VOLTS.2. Turn on power to the steamer.’3. Set timer dial (any setting beyond “0 minute”). If opera-tion s correct, the motor will turn the dial toward “0 minute”. If the motor fails to operate, it is defective and the entire timer must be replaced.4. Shut off power to the cooker.Door Interlock SwitchMalfunction of the cooker door interlock switch prevents timer indicator light from turning on and steam solenoid from opening when the timer dial is set. If steam does not enter the compartment and the cooking indicator light fails to turn on with the door latch securely engaged, the fault may be in the door interlock switch. Proceed as follows:1. Turn off power to the cooker.2. Disconnect wire to the door switch terminals.3. Connect an ohmmeter between the terminals of theswitch.4. Actuate the switch by closing the cooking compart-ment door. If zero ohm reading cannot be obtained, timer contacts are defective and the timer must be replaced.5. Remove the ohmmeter and replace the leads onswitch terminals.Indicator LightsIf the cooker compartment functions correctly, with the single exception that the indicator light fails to light during operation, the fault is a defective indicator light. A “burned out” or defective light is verified by using a AC volt-meter at the leads, with input power on the selector switch in correct position for that timer, the timer set, and the door latches closed. If 120 volts is present, the fault is in the indicator light and requires replacement. If 120 volts is not present, the fault is in the wiring control components (selector switch, timer or door switch).BuzzerIf the buzzer does not sound at the termination of the op-erator-selected timer setting (timer dial returned to “0 min-ute” position), the fault may be a defective buzzer. Buzzer operation os verified using an AC volt-meter at buzzer coil connections with input power on a selector switch and co-inciding timer dial set at the “0 minute” position. If voltage is 120 volts, the fault is in the buzzer, which must be re-placed. If 120 volts is not present, the fault is in the wiring control components (selector switch or timer).WiringUsing an ohmmeter, wiring continuity between the con-nections shown on the wiring diagram is readily verified. This is best done in stages, removing only those wires required for each continuity check. As each lead is re-placed, it should be checked for evidence of corrosion and cleaned if necessary. All leads must be tightly attached so as to provide a good electrical connection.Door Gasket ReplacementThe cooking compartment door gaskets are made of sili-cone-type rubber material that is very durable, but subject to wear during normal operation. Should the gasket leak replace it as follows:1. Open the cooking compartment door.2. Remove the four screw on the outside of the doorframe and remove the door panel assembly.3. Remove the six screw from the gasket plate in thedoor panel assembly.4. Remove the gasket plate and the door gasket fromthe door panel.5. Install the new door gasket to the door panel. Replacethe gasket plate and six screws.6. Reassembly the door panel assembly in the doorframe using the four screws.7. Gasket replacement is now complete.Door may be difficult to close until the gasket has com-pressed to conform to the door opening. Leaving door closed overnight will compress gasket.Exterior Panel RemovalWARNINGTO PREVENT HAZARD IN SERVICING THECOOKER, BE CERTAIN THAT THE STEAMSUPPLY BOILER IS SHUT DOWN, THE COLDWATER SHUT-OFF VALVE IS CLOSED, ANDTHE ELECTRICAL DISCONNECT CIRCUITBREAKER FOR THE COOKER/BOILER UNIT IFOFF BEFORE REMOVING SIDE PANELS. Access to all internal plumbing and electrical assemblies is from the right side. The right side panel is removed by removing the bottom screws and pushing up on the panel until the lower lip disengages from the frame. Gas control is located on the right side behind the bottom panel. Re-move the four screws.* Not Shown.** Select as Required.BURNER, PROPANE AND NATURAL GAS ASSEMBLY* Not Shown.** Select as Required.GAS PLUMBING AND VALVE ASSEMBLY** Select as Required.。

R25_sam说明书

R25_sam说明书

第 7 章 附录
使用 McAfee SecurityCenter(可选) Samsung Magic Doctor(可选) 重新安装软件 运行系统软件媒体 安装驱动程序和程序 重新安装Windows XP 重新安装Windows 在 Windows 无法启动时重新安装 Q&A常见问题 关于Window 关于显示 与声音有关的问题 相关的调制解调器 相关的有线LAN 无线LAN 相关问题 与游戏和程序相关的问答 Bluetooth 安全中心 其它 产品规格 词汇表 索引 Samsung Notebook Computer 全球保修 129 130 131 131 132 133 133 135 136 136 136 138 139 140 141 144 146 147 149 150 158 162 163
开始使用产品功能操作计算机的正确姿势15重要安全信息18更换零件和配件20法规符合性声明22weee符号信息32概览33前视图33状态指示灯34右视图35左视图36后视图37底视图38打开和关闭计算机39打开计算机39关闭计算机39使用计算机键盘41触摸板44cd驱动器47插入和弹出cd47刻录cd48多卡插槽49pciexpress卡插槽52连接显示器53连接显示器53通过显示器53调节音量54使用刻录机55使用microsoftwindowsxpwindows基础57windows57了解桌面58了解开始菜单59了解窗口61帮助和支持中心简介63配置分辩率和颜色深度64使用网络有线网络66同时使用dhcp和静态ip68无线网络69连接到访问点ap70连接到计算机到计算机网络对等网络或特定网络71使用无线lan设置程序来设置无线网络74使用samsung网络管理器75使用网络75共享互联网访问78网络状态诊断81用调制解调器进行连接82使用蓝牙设备83蓝牙软件设置84使用蓝牙85使用应用程序程序简介90samsungupdateplus可选93要更新samsung软件和驱动程序请执行以下操作

stm5螺纹参数

stm5螺纹参数

stm5螺纹参数STM5螺纹参数螺纹是一种常用的机械连接方式,广泛应用于各个行业。

而STM5螺纹作为一种具有特殊特性的螺纹,其参数也有着一些独特之处。

本文将就STM5螺纹的参数进行详细介绍,帮助读者更好地了解和应用这种螺纹。

我们来看看STM5螺纹的外径。

外径是螺纹的最大直径,它决定了螺纹的整体尺寸。

对于STM5螺纹而言,其外径为5mm,这意味着它适用于一些小型装置或部件的连接。

我们来看看STM5螺纹的螺距。

螺距是指螺纹上相邻两个螺纹峰或螺纹谷之间的距离,它决定了螺纹的紧密程度。

对于STM5螺纹而言,其螺距为0.8mm,这意味着每旋转一周,螺纹的前进距离是0.8mm,这样的螺距适用于一些需要较高紧固力的场合。

除了外径和螺距,STM5螺纹还有一个重要参数是螺纹的螺旋方向。

在常见的螺纹中,螺旋方向有两种,即左旋和右旋。

而STM5螺纹则采用了右旋的螺旋方向,这意味着当我们顺时针旋转螺纹时,螺纹会向前进去。

STM5螺纹还有一个关键的参数是螺纹的牙型。

螺纹的牙型决定了螺纹的接触面积和紧固力的分布情况。

对于STM5螺纹而言,它采用的是三角形牙型,这是一种常见且经济实用的牙型,适用于大多数机械连接。

我们来看看STM5螺纹的公差。

公差是指螺纹尺寸允许的最大误差范围,它决定了螺纹的加工和配合要求。

对于STM5螺纹而言,其公差为6H,这是一种常见的公差等级,适用于大多数一般要求。

STM5螺纹的参数包括外径、螺距、螺旋方向、牙型和公差。

了解这些参数可以帮助我们正确选择和应用STM5螺纹,确保机械连接的质量和可靠性。

当然,在实际应用中,我们还需根据具体需求考虑其他因素,如材料选择、紧固力要求等。

希望本文对读者对STM5螺纹有所帮助。

五轴二层模弯管机软件操作说明书教材

五轴二层模弯管机软件操作说明书教材

五轴二层模弯管机控制软件使用说明书(V2.0-3)目录第一章适用范围与功能介绍第二章系统登录第三章软件主界面操作第四章程式编辑第五章手动操作第六章自动操作第七章高级参数第八章系统诊断第九章开机操作第十章报警信息第十一章提示信息第十二章弯管机系统的G、M代码指令表第一章适用范围与功能介绍一、适用范围本弯管机软件(V2.0-3)版本是用于五轴二层模数控弯管机的控制软件。

软件在安装有WINDOWS系统(WINDOWS 98、WINOWS 2000、WINOWS XP及更高版本)的PC机或嵌入式平台上运行。

为保证本控制软件的正确使用,需配置相应的硬件并且完成电气连线。

二、功能介绍本软件具有如下功能:1.多种编程方式,支持YBC输入、坐标数据输入、G代码编程、DXF文件导入。

2.弯管机模型与管子造型的三维显示与管子加工过程模拟3.多种格式文件保存与配方参数输入及保存。

4.自动模位干涉计算与G码指令生成。

5.完善的诊断功能与报警处理功能。

6.弯管操作的手动功能与自动功能第二章系统登录计算机开机引导成功后,直接出现系统登录界面,如下:点击用户登录按钮,出现登录密码框,如下:“66666666”,然后按“确认”键就可以登录到系统操作界面。

用户也可以在登录界面选择登录时的界面,如“手动控制”、“文件管理”等,登录后自动进入相应操作界面。

第三章软件主界面操作软件分为程式设计、文件管理、手动控制、自动控制、报警信息、参数管理、系统诊断、高级参数等操作界面。

一、程式设计打开软件后,点主窗口界面的“程式设计”按钮,打开程式设计界面,可以作编辑YBC程序、XYZ坐标,设置“管子配方”、查看“管件模拟”等。

如下:1.编辑程序YBC程序:点击“YBC程序”按钮,该按钮会变成红色,同时程序列表显示窗口会切换为YBC列表。

在YBC程序列表下选择编辑输入框内,会自动弹出数字键盘,可以程序编辑。

输入数据时,先选中要修改的项,然后才能够输入数据。

Marshall DSL5C 5 Watt 全值机组合电钢说明书

Marshall DSL5C 5 Watt 全值机组合电钢说明书

DSL5C5 Watt ComboSincere thanks and congratulations for selecting this Dual Super Lead, all-valve DSL5C combo.As you may know, when the JCM2000 Dual Super Lead series of amps was first introduced in 1997, we were delighted to see them get a fantastic reaction from guitar players and also the press. In fact one of the biggest American guitar magazines described the DSL100 as “The best Marshall ever? It combines the best tonal qualities and features of both modern and vintage Marshall amps in one pack-age.” Better still, when the world renowned magazine, Guitar Player, reviewed the DSL100 it printed “The Ultimate Marshall?” as a subheading on their June 1997 cover. After a very successful life, the JCM2000 series was replaced by the JVM series in 2007, which has also gone onto great success and critical acclaim. That said, there is still a great deal of respect and demand for the DSL’s with one of the UK’s most popular guitar magazines recently referring to the DSL100 as “the go-to rock amp.”As a result of public demand for the DSL’s tonal palate the late, great Jim Marshall decided to intro-duce a range of affordable amps based on the popular DSL100, one of them being your DSL5C.We would like to wish you every success with all of your musical endeavours and also your DSL amp, which We know will provide you with great tones and playing pleasure for many years to come. Welcome to the Marshall family!Yours Sincerely,The Marshall Team(Environments E1, E2, and E3 EN 55103-1/2) and the Low Voltage Directive in the E.U.The average half-cycle r.m.s. inrush current, on initial switch-on, is current after a supply interruption of 5 s is1243567891. INPUTInput jack socket for guitar cable.CLASSIC GAIN CHANNEL ––––––––––––––––––––––––TONAL NOTE: This channel is based on the“Clean” mode of the DSL100H’s Classic Gainchannel – producing a tone reminiscent of an early1959 Plexi Super Lead head.2. CLASSIC GAIN CHANNEL VOLUME CONTROLControls the volume level for the Classic Gainchannel. There is a level where the maximum clean volume level is achieved, after this, the sound willstart to overdrive.3. CLASSIC GAIN CHANNEL LEDThis LED lights-up green to indicate that the Classic Gain channel has been selected.4. CHANNEL SELECTION BUTTONSelects Ultra Gain channel when pushed in, and the Classic Gain channel when out.7. ULTRA GAIN CHANNEL VOLUME CONTROLControls the volume level for the Ultra Gain channel. EQUALISATION SECTION –––––––––––––––––––––––––8. TONE SHIFT BUTTONThe Tone Shift reconfigures the tone network addinga new dimension to passive tone shaping. When the910111213DSL5C Rear Panel Features423567181. MAINS INPUT SOCKET WITH MAINS FUSEYour amp is provided with a detachable mains (power) lead, which is connected here. The specifi c mains input voltage rating that your amplifi er has been manufactured for is indicated on the rear panel. Before connecting for the fi rst time, please ensure that your amplifi er is compatible with your electricity supply. If you have any doubt, please seek advice from a qualifi ed technician. Your Marshall dealer willheadphones to this jack when the power switch is set to low, will mute the speaker for private practice.6. AUDIOEnables the connection of an MP3 player or any similar source for practicing BUT ONLY when the amp is in headphone mode (Low Power). The signals are mixed using a HiFi mixer for high-quality, backing-track audio quality - this does not effect the tone of the guitar signal.。

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1/15June 2005I VERY LOW SUPPLY CURRENT I REGULATED OUTPUT VOLTAGEIWIDE RANGE OF OUTPUT VOLTAGE AVAILABLE (2.5V, 2.8V, 3.0V, 3.3V, 5.0V)I OUTPUT VOLTAGE ACCURACY ±5%I OUTPUT CURRENT UP TO 100mA I LOW RIPPLE AND LOW NOISE I VERY LOW START-UP VOLTAGEI HIGH EFFICIENCY (V OUT = 5V TYP. 87%)I FEW EXTERNAL COMPONENTS IVERY SMALL PACKAGE: SOT23-5LDESCRIPTIONThe ST5R00 is an high efficiency VFM Step-up DC/DC converter for small, low input voltage or battery powered systems with ultra low quiescent supply current. The ST5Rxx accept a positive input voltage from start-up voltage to V OUT and convert it to a higher output voltage in the 2.5 to 5V range.The ST5R00 combine ultra low quiescent supply current and high efficiency to give maximum battery life. The high switching frequency and the internally limited peak inductor current, permits the use of small, low cost inductors. Only three external components are needed: an inductor a diode and an output capacitor.The ST5R00 is suitable to be used in a battery powered equipment where low noise, low ripple and ultra low supply current are required. The ST5R00 is available in very small packages:SOT23-5L.Typical applications are pagers, cameras & video camera, cellular telephones, wireless telephones,palmtop computer, battery backup supplies,battery powered equipment.ST5R00SERIESMICROPOWER VFM STEP-UP DC/DC CONVERTERFigure 1: Schematic DiagramST5R00 SERIES2/15Table 1: Absolute Maximum Ratings(*) Reduced by 1.7 mW for increasing in T A of 1°C over 25°CAbsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.Table 2: Thermal DataFigure 2: Connection Diagram (top view)Table 3: Order CodesSymbol ParameterValue Unit V OUT Output Voltage 5.5V V IN Input Voltage 5.5V V LX LX Pin Voltage 5.5VI LX LX Pin Output Current Internally limitedP TOT Power Dissipation at 25°C 170 (*)mW T STG Storage Temperature Range-55 to 125°C T OPOperating Junction Temperature Range-25 to 85°CSymbol ParameterSOT23-5LUnit R thj-caseThermal Resistance Junction-case63°C/WSOT23-5L OUTPUT VOLTAGESST5R25MTR 2.5 V ST5R28MTR 2.8 V ST5R30MTR 3.0 V ST5R33MTR 3.3 V ST5R50MTR5.0 VST5R00 SERIES OPERATIONThe ST5Rxx architecture is built around a VFM CONTROL logic core: switching frequency is set through a built in oscillator: T ON time is fixed (Typ. 5ms) while T OFF time is determined by the error amplifier output, a logic signal coming from the comparison made by the Error Amplifier Stage between the signal coming from the output voltage divider network and the internal Band-Gap voltage reference (V ref). T OFF reaches a minimum (Typ. 1.7ms) when heavy load conditions are met (Clock frequency 150KHz). An over current conditions, through the internal power switch, causes a voltage drop V LX=R DSON xI SW and the V LX limiter block forces the internal switch to be off, so narrowing T ON time and limiting internal power dissipation. In this case the switching frequency may be higher than the 150KHz set by the internal clock generator.VFM control ensures very low quiescent current and high conversion efficiency even with very light loads. Since the Output Voltage pin is also used as the device Supply Voltage, the versions with higher output voltage present an higher internal supply voltage that results in lower power switch R DSON, slightly greater output power and higher efficiency. Moreover, bootstrapping allows the input voltage to sag to 0.6V (at I OUT=1mA) once the system is started.If the input voltage exceeds the output voltage, the output will follow the input, however, the input or output voltage must not be forced above 5.5V.Figure 3: Typical Application Circuit(*) See application info.Figure 4: Typical Application Efficiency3/15ST5R00 SERIES4/15Figure 5: Typical DemoboardNote: drawing not in scale.Table 4: Electrical Characteristics For ST5R25(V IN = 1.5V, I OUT = 10mA, T A = 25°C, unless otherwise specified. For external components value, unless otherwise notes, refer to the typical operating circuit.)(1): The minimum input voltage for the IC start-up is strictly a function of the V F catch diode.Table 5: Electrical Characteristics For ST5R28(V IN = 1.7V, I OUT = 10mA, T A = 25°C, unless otherwise specified. For external components value, unless otherwise notes, refer to the typical operating circuit.)(1): The minimum input voltage for the IC start-up is strictly a function of the V F catch diode.Symbol ParameterTest ConditionsMin.Typ.Max.Unit V OUT Output Voltage2.3752.5 2.625V V START-UP Start-up Voltage (V IN -V F ) (1)IOUT = 1mA, V IN= rising from 0 to 2V 0.81.2V V HOLD Hold-on Voltage I OUT = 1mA, V IN = falling from 2 to 0V 0.6V I SUPPLYSupply CurrentTo be measured at V IN , no load 16µA R LX(DSON)Internal Switch R DSON I LX = 150mA850m ΩI LX(leak)Internal Leakage Current V LX = 4V, forced V OUT = 3V0.5µA f OSC Maximum oscillator Frequency 150KHz D ty Oscillator Duty Cycle to be measure on LX pin 77%νEfficiencyI OUT = 50mA82%Symbol ParameterTest ConditionsMin.Typ.Max.Unit V OUTOutput Voltage2.662.8 2.94V V START-UP Start-up Voltage (V IN -V F ) (1)I OUT = 1mA, V IN = rising from 0 to 2V 0.81.2V V HOLD Hold-on Voltage I OUT = 1mA, V IN = falling from 2 to 0V 0.6V I SUPPLYSupply CurrentTo be measured at V IN , no load 16µA R LX(DSON)Internal Switch R DSONI LX = 150mA850m ΩI LX(leak)Internal Leakage Current V LX = 4V, forced V OUT = 3.3V0.5µA f OSC Maximum oscillator Frequency 150KHz D ty Oscillator Duty Cycle to be measure on LX pin 77%νEfficiencyI OUT = 50mA82%ST5R00 SERIES Table 6: Electrical Characteristics For ST5R30(V IN = 1.8V, I OUT = 10mA, T A = 25°C, unless otherwise specified. For external components value, unless otherwise notes, refer to the typical operating circuit.)Symbol Parameter Test Conditions Min.Typ.Max.Unit V OUT Output Voltage 2.853 3.15VV START-UP Start-up Voltage (V IN-V F) (1)I OUT = 1mA, V IN = rising from 0 to 2V0.8 1.2V V HOLD Hold-on Voltage I OUT = 1mA, V IN = falling from 2 to 0V0.6VI SUPPLY Supply Current To be measured at V IN, no load17µAR LX(DSON)Internal Switch R DSON I LX = 150mA850mΩI LX(leak)Internal Leakage Current V LX = 4V, forced V OUT = 3.5V0.5µAf OSC Maximum oscillator Frequency150KHzD ty Oscillator Duty Cycle to be measure on LX pin77%νEfficiency I OUT = 50mA82% (1): The minimum input voltage for the IC start-up is strictly a function of the V F catch diode.Table 7: Electrical Characteristics For ST5R33(V IN = 2V, I OUT = 10mA, T A = 25°C, unless otherwise specified. For external components value, unless otherwise notes, refer to the typical operating circuit.)Symbol Parameter Test Conditions Min.Typ.Max.Unit V OUT Output Voltage 3.135 3.3 3.465VV START-UP Start-up Voltage (V IN-V F) (1)I OUT = 1mA, V IN = rising from 0 to 2V0.8 1.2V V HOLD Hold-on Voltage I OUT = 1mA, V IN = falling from 2 to 0V0.6VI SUPPLY Supply Current To be measured at V IN, no load17µAR LX(DSON)Internal Switch R DSON I LX = 150mA850mΩI LX(leak)Internal Leakage Current V LX = 4V, forced V OUT = 3.8V0.5µAf OSC Maximum oscillator Frequency150KHzD ty Oscillator Duty Cycle to be measure on LX pin77%νEfficiency I OUT = 50mA83% (1): The minimum input voltage for the IC start-up is strictly a function of the V F catch diode.Table 8: Electrical Characteristics For ST5R50(V IN = 3V, I OUT = 10mA, T A = 25°C, unless otherwise specified. For external components value, unless otherwise notes, refer to the typical operating circuit.)Symbol Parameter Test Conditions Min.Typ.Max.Unit V OUT Output Voltage 4.75 5.0 5.25VV START-UP Start-up Voltage (V IN-V F) (1)I OUT = 1mA, V IN = rising from 0 to 2V0.8 1.2V V HOLD Hold-on Voltage I OUT = 1mA, V IN = falling from 2 to 0V0.6VI SUPPLY Supply Current To be measured at V IN, no load18µAR LX(DSON)Internal Switch R DSON I LX = 150mA700mΩI LX(leak)Internal Leakage Current V LX = 4V, forced V OUT = 3.8V0.5µAf OSC Maximum oscillator Frequency160KHzD ty Oscillator Duty Cycle to be measure on LX pin77%νEfficiency I OUT = 50mA87% (1): The minimum input voltage for the IC start-up is strictly a function of the V F catch diode.5/15ST5R00 SERIES6/15TYPICAL PERFORMANCE CHARACTERISTICS (the following plots are referred to the typical application circuit and, unless otherwise noted, at T A = 25°C)Figure 6: Output Voltage vs Output CurrentFigure 7: Output Voltage vs Output Current Figure 8: Output Voltage vs Temperature Figure 9: Output Voltage vs TemperatureFigure 10: Efficiency vs TemperatureFigure 11:Efficiency vs TemperatureST5R00 SERIES7/15Figure 12: Efficiency vs Output CurrentFigure 13: Efficiency vs Output Current Figure 14: Maximum Oscillator Frequency vs Temperature Figure 15: Maximum Oscillator Frequency vs TemperatureFigure 16: Oscillator Duty Cycle (@ MAX Freq.)vs TemperatureFigure 17: Oscillator Duty Cycle (@ MAX Freq.)vs TemperatureST5R00 SERIES8/15Figure 18: LX Switching Current Limit vs TemperatureFigure 19: LX Switching Current Limit vs TemperatureFigure 20: Start-up Voltage (V IN - V F ) vs Temperature Figure 21: Start-up Voltage (V IN - V F ) vs TemperatureFigure 22: Start-up Voltage (V IN - V F ) vs Output CurrentFigure 23: Start-up Voltage (V IN - V F ) vsOutput CurrentST5R00 SERIES9/15Figure 24: Minimum Input Voltage vs Output CurrentFigure 25: Minimum Input Voltage vs Output CurrentFigure 26: Internal Switch R DSON vs TemperatureFigure 27: Internal Switch R DSON vs TemperatureFigure 28: Hold-on Voltage vs TemperatureFigure 29: Hold-on Voltage vs TemperatureST5R00 SERIES10/15Figure 30: No Load Input Current vs TemperatureFigure 31: No Load Input Current vs TemperatureAPPLICATION INFORMATIONPC LAYOUT AND GROUNDING HINTSThe ST5R00 high frequency operation makes PC layout important for minimizing ground bounce and noise. Place external components as close as possible to the device pins. Take care to the Supply Voltage Source connections that have to be very close to the Input of the application. Set the Output Load as close as possible to the output capacitor. If possible, use a Star ground connection with the centre point on the Device Ground pin. To maximize output power and efficiency and minimize output ripple voltage,use a ground plane and solder the ICs ground pin directly to the ground plane.Remember that the LX Switching Current flows through the Ground pin, so, in order to minimize the series resistance that may cause power dissipation and decrease of the Efficiency conversion, the Ground pattern has to be as large as possible.INDUCTOR SELECTIONAn inductor value of 47µH performs well in most ST5R00 applications. However, the inductance value is not critical, and the ST5R00 will work with inductors in the 33µH to 120µH. Smaller inductance values typically offer a smaller physical size for a given series resistance, allowing the smallest overall circuit dimensions. However, due to higher peak inductor currents, the output voltage ripple (Ipeak x output filter capacitors ESR) also tends to be higher. Circuits using larger inductance values exhibit higher output current capability and larger physical dimensions for a given series resistance.In order to obtain the best application performances the inductor must respect the following condition:- The DC resistance has to be as little as possible, a good value is <0.25Ω. This choice will reduce the lost power as heat in the windings.- The inductor core must not saturate at the forecast maximum LX current. This is mainly a function of the Input Voltage, Inductor value and Output Current. However, it is generally acceptable to bias the inductor into saturation by as much as 20%, although this will slightly reduce efficiency. In order to calculate this parameter we have to distinguish two cases:1) When a light load is applied on the output (discontinuous mode operation) the inductor core must not saturate atI LX(max)= (V IN x T ON )/L.2) For heavy load (continuos mode operation) the inductor core must not saturate at I LX(max)= (I OUT x T)/T OFF(min) + (V IN x T ON )/2LWhere: V IN is the Input Voltage, Ton is the switch on period (typ. 5ms), L is the inductance value,I OUT is the maximum forecast Output Current, T = T ON +T OFF(min) and T OFF(min) is the minimum switch off period (typ. 1.7µs),- Choose an inductance value in the 47µH to 82µH range.- For application sensitive to Electromagnetic Interference (EMI), a pot core inductor is recommended.DIODE SELECTIONA Schottky diode with an high switching speed and a very low Forward Voltage (V F) is needed. Higher V F may cause lost power as heat in the diode, with a decrease of the Efficiency. Moreover, since the Output Voltage pin is also used as the device Supply Voltage, the Start-up Voltage (see related plots) is strictly due to the diode Forward Voltage at the rated Forward Current. A good diode choice is a STPS1L30A. INPUT/OUTPUT CAPACITORS SELECTIONThe Output Ripple Voltage, as well as the Efficiency, is strictly related to the behavior of these elements. The output ripple voltage is the product of the peak inductor current and the output capacitor Equivalent Series Resistance (ESR). Best performances are obtained with good high frequency characteristics capacitors and low ESR. The best compromise for the value of the Output Capacitance is 47µF Tantalum Capacitor, Lower values may cause higher Output Ripple Voltage and lower Efficiency without compromising the functionality of the device.An Input Capacitor is required to compensate, if present, the series impedance between the Supply Voltage Source and the Input Voltage of the Application.A value of 4.7µF is enough to guarantee stability for distances less than 2". It could be necessary (depending on V IN, V OUT, I OUT values) to proportionally increase the input capacitor value up to 100µA for major distances.In any case we suggest to connect both capacitors, C IN and C OUT, as close as possible to the device pins.SOT23-5L MECHANICAL DATAsDIM.MIN.TYP MAX.MIN.TYP.MAX. A0.90 1.4535.457.1 A10.000.100.0 3.9 A20.90 1.3035.451.2 b0.350.5013.719.7 C0.090.20 3.57.8D 2.80 3.00110.2118.1E 1.50 1.7559.068.8 e0.9537.4H 2.60 3.00102.3118.1 L0.100.60 3.923.6.7049676CTable 9: Revision HistoryDate Revision Description of Changes14-Jun-20056The SOT-89 package has been removed, mistake on Fig. 3 IN ==> LX, on Tables 4, 5, 6, 7, 8 Output Noise Voltage ==> Efficiency.Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.The ST logo is a registered trademark of STMicroelectronicsAll other names are the property of their respective owners© 2005 STMicroelectronics - All Rights ReservedSTMicroelectronics group of companiesAustralia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America。

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