DIOLINE L-Bus 扩展模块(带16个数字输出端)
K-BUS02 8通道星型IO-BUS模块使用说明书
HOLLiAS MACS -K系列模块2014年5月B版HOLLiAS MAC-K系列手册- K-BUS02 8通道星形IO-BUS模块重要信息危险图标：表示存在风险，可能会导致人身伤害或设备损坏件。
警告图标：表示存在风险，可能会导致安全隐患。
提示图标：表示操作建议，例如，如何设定你的工程或者如何使用特定的功能。
目录1.概述 (1)2.接口说明 (2)2.1模块单元结构 (2)2.2多功能总线扩展 (5)2.3IO-BUS连接 (6)2.4多功能总线预制电缆 (7)2.5地址跳线 (8)2.6IO-BUS级联 (9)2.7直流电源监测报警 (9)3.指示灯说明 (10)4.工程应用 (12)4.1配套底座说明 (12)4.2K-BUST02星形多功能总线终端匹配器 (12)5.尺寸图 (16)5.1K-BUS02尺寸图 (16)5.2K-BUST02尺寸图 (17)6.技术指标 (18)K-BUS028通道星形IO-BUS模块1.概述K-BUS02 模块是K系列8通道星形IO-BUS模块，同时作为IO-BUS从站，将直流电源状态、IO-BUS链路故障、机柜温度等信息上报给控制器。
可改变IO-BUS网络的拓扑结构，实现网络拓扑结构由总线型网到星形、树形等复杂网络结构的转变，并预留柜外扩展口。
K-BUS02模块兼具中继器的功能，每个通信端口可以独立驱动一个段，段间逻辑隔离，每个段上可以连接10个I/O模块，本地有6个IO总线段，最多共可连接10×6= 60个IO模块。
同时支持柜外扩展，最多3级级联，在3级级联情况下，最高可支持波特率1.5Mbps。
K-BUS02模块支持带电热插拔，支持冗余配置，支持多种故障检测功能，能够检测出8通道总线的断路、总线差分线之间短路等故障，并上报主控制器，且单通道故障不影响其他通道通信。
通讯状态指示灯可以监视各总线段的工作状态，并为网络诊断提供参考。
K-BUS02模块支持检测机柜温度，测温范围为-20℃~60℃，温度数据上报主控制器。
美灵IO扩展板使用说明说明书
美灵IO扩展板使用说明型号：：M8TA9/A/D型号版本号：Vel 1.0M8TA9(/A/D) IO 扩展板美灵系统 汪秀文关键字：PLC 单片机 IO 口 扩展 工控机 RS485 Moudbus AD本扩展板用于PLC 的输入输出扩展，基于一般PLC 的RS485串行通讯介面，通用PLC 控制器仅使用一个RS485接口就可以方便的扩展出多个IO 口。
如通过设置不同的板内地址，可以级连成IO 扩展网络，大大的提高IO 数量，最大可达5334点。
IBM 兼容机通过RS232转RS485转换后也可以联接本扩展板。
型号型号：：M8TA9 /A/D产品特点※ 输入、输出全光耦隔离※ 大功率晶体管输出，极限2A，可直接驱动接触器、电磁阀 ※ 安装方便，可带外壳轨道安装※ 性能稳定可靠，采用进口CPU ※ 单板最大10路数字输入口 ※ 单板最大9路数字输出口※ 单板可选的2路10位AD 模拟输入口(/A) ※ IO 口数据灵活可定制※ 可定制成全输入或全输出型扩展板 ※ 可定制成内含逻辑功能的系统板电气参数工作电压 直流12～36V 输入(极限)、推荐+24V主板功率 2W工作温度 -20～55℃； 存放温度 -40℃～125℃ 湿 度 不能结露，不能有水珠 气 体 禁止有可燃气体和导电灰尘 安装尺寸80mm *115mm 或标准轨道安装输入端接线说明① AD0、AD1:0-10V 模拟量输入接口（型号带A 的才有）； ② GND:模拟量、数字量公共地端；③ I0、I1、I2…I8、I9：数字量输入端口，接NPN，有效时拉低电平； ④ +24V：电源输出，可作输入端传感器电源。
详见附录接线图输出端接线说明⑤ +24V：输出公共端；⑥ Q0、Q1…Q7、Q8：输出端口。
详见附录接线图参数设置地址：默认地址为1；可通过《IO设置者》设为其它非零的地址1-255；通讯波特率为9600，1停止位，8位数据，无校验通过RS232转RS485联接好待设地址的扩展板和电脑的COM口后，打开IO设置者：输入新的“从机站号”后，点击“保存设置”当程序提示保存成功时，即把新的地址写进与本机相联的IO扩展板了；您还可以：1.点“读取设置”，读取当前板的地址；2.点“恢复出厂”，当不知道相联的IO扩展地址是多少时，把当前板的的地址恢复成出厂态，即地址为“1”；3.点“测试”，出现测试介面，用以测试当前的输入、输出和AD值，“测试”按键仅在板内地址读取成功时才有效。
信捷plc说明书
4、简单功能的实现...............................................................................................................25 4-1. 联机 ........................................................................................................................26 4-2. 程序的上载、下载及PLC状态控制 .....................................................................27 4-3. PLC初值设定及数据的上传、下载 ...................................................................28 4-3-1. 初值设定 .............................................................................................................28 4-3-2. 数据的上传、下载 .............................................................................................29 4-4. PLC以及模块信息的查询 ...................................................................................29 4-4-1. PLC本体信息....................................................................................................29 4-4-2. BD板信息 .........................................................................................................30 4-4-3. 扩展模块信息 .....................................................................................................30 4-4-4. 扫描周期 .............................................................................................................30 4-4-5. 时钟信息 .............................................................................................................31 4-4-6. 错误信息 .............................................................................................................31 4-5. PLC的初始化 .......................................................................................................31 4-6. 程序加锁/解锁 .......................................................................................................32 4-6-1. 密码设置 .............................................................................................................32
【正运动】ZMIO310系列立式总线扩展模块用户手册
正运动技术ZMIO310系列立式总线扩展模块用户手册V1.0运动控制器提供丰富的接口，具有优良的运动控制性能，可以满足各种项目的扩展需求。
本手册介绍了产品的安装、接线、接口定义和操作说明等相关内容。
本手册版权归深圳市正运动技术有限公司所有，在未经本公司书面授权的情况下，任何人不得翻印、翻译和抄袭本手册中的任何内容。
前述行为均将构成对本公司手册版权之侵犯，本司将依法追究其法律责任。
涉及本产品控制器软件的详细资料以及每个指令的介绍和例程，请参阅ZBASIC软件手册。
本手册中的信息资料仅供参考。
由于改进设计和功能等原因，正运动公司保留对本资料的最终解释权！内容如有更改，恕不另行通知！调试机器要注意安全！请务必在机器中设计有效的安全保护装置，并在软件中加入出错处理程序，否则所造成的损失，本公司没有义务或责任对此负责。
为了保证产品安全、正常、有效的使用，请您务必在安装、使用产品前仔细阅读本产品手册。
产品型号：ZMIO310系列立式总线扩展模块文件名版本号版本（更改）说明更新日期更改人用户手册V1.01.模块都增加了固件升级功能2.相对ZMIO300系列，优化了内部通讯协议2023/2/25xcx●本章对正确使用本产品所需关注的安全注意事项进行说明。
在使用本产品之前，请先阅读使用说明并正确理解安全注意事项的相关信息。
●本产品应在符合设计规格要求的环境下使用，否则可能导致设备损坏，或者人员受伤，因未遵守相关规定引发的功能异常或部件损坏等不在产品质量保证范围之内。
●因未遵守本手册的内容、违规操作产品引发的人身安全事故、财产损失等，我司将不承担任何法律责任。
按等级可分为“危险”、“注意”。
如果没有按要求操作，可能会导致中度伤害、轻伤及设备损伤的情况。
请妥善保管本指南以备需要时阅读，并请务必将本手册交给最终用户。
危险注意危险注意目录第一章产品信息 (1)1.1产品简介 (1)1.2功能特点 (1)1.3系统框图 (1)第二章产品信息 (2)2.1铭牌信息 (2)2.2订货信息 (2)2.3供电需求 (3)2.4工作环境 (3)第三章耦合器模块 (4)3.1ZMIO310-ECAT通讯模块 (4)3.1.1接口定义 (4)3.1.2性能规格 (5)3.1.3安装尺寸 (5)3.1.4EtherCAT总线接口说明 (5)3.1.5端子定义 (7)3.1.6故障指示与处理对策 (8)3.2ZMIO310-CAN通讯模块 (8)3.2.1接口定义 (8)3.2.2性能规格 (9)3.2.3安装尺寸 (9)3.2.4拨码开关说明 (10)3.2.5端子定义 (10)3.2.6故障指示与处理对策 (11)第四章扩展子模块 (12)4.1ZMIO310-16DI数字量输入模块 (12)4.1.1接口定义 (12)4.1.2性能说明 (12)4.1.3安装尺寸 (13)4.1.4端子定义 (13)4.1.5接线方式 (14)4.1.6故障指示与处理对策 (15)4.2ZMIO310-16DO/DOP数字量输出模块 (15)4.2.1接口定义 (15)4.2.2性能规格 (16)4.2.3安装尺寸 (17)4.2.4端子定义 (17)4.2.5接线方式 (18)4.2.6故障指示与处理对策 (19)4.3ZMIO310-4AD模拟量输入模块 (19)4.3.1接口定义 (19)4.3.2性能规格 (20)4.3.3安装尺寸 (20)4.3.4端子定义 (21)4.3.5接线方式 (22)4.3.6故障指示与处理对策 (22)4.4ZMIO310-4DA模拟量输出模块 (22)4.4.1接口定义 (22)4.4.2性能规格 (23)4.4.3安装尺寸 (24)4.4.4端子定义 (24)4.4.5接线方式 (25)4.4.6故障指示与处理对策 (25)4.5接线说明 (26)4.5.1ECAT耦合器+扩展子模块接线参考 (26)4.5.2CAN耦合器+扩展子模块接线参考 (26)第五章使用说明 (28)5.1功耗计算示例 (28)5.2IO起始编号设置 (28)5.2.1EtherCAT总线扩展 (28)5.2.2CAN总线扩展 (29)5.3数字及模拟量监控 (30)5.4本地后级扩展地址说明 (31)5.5配置功能 (31)第六章数据字典说明 (33)6.1格式说明 (33)6.2数据字典概览 (33)6.3数据字典详细说明 (34)6.4扩展案例 (42)6.4.1扩展子模块地址分配 (42)6.4.2通讯中断后输出状态配置 (42)6.4.3通道使能配置 (43)6.4.4量程切换配置 (43)6.4.5获取AD模块的通道输入状态值 (44)6.4.6获取DI模块的通道输入状态值 (45)6.4.7配置DO模块的通道输出值 (45)第七章运行与维护 (47)7.1定期检查与维护 (47)7.2常见问题 (48)第八章售后服务 (49)1.1产品简介ZMIO310系列扩展模块是立式总线扩展模块，可支持EtherCAT和CAN两种总线方式扩展数字量IO、模拟量AD和DA。
AELTA DOP 数字IO拓展模块 安装说明
请在使用之前，详细阅读本使用说明书。
本扩展模块须搭配本公司DOP-AE 系列人机产品进行使用，实施配线时，务必拔除／切断人机电源。
使用者使用本扩展模块时，必须将之安装于具防尘、防潮及免于电击／冲击意外之外壳配线箱内。
另必须具备保护措施（如: 特殊的工具或钥匙才可打开）防止非维护人员操作或意外冲击本体，造成危险及损坏。
交流输入电源不可连接于输入／出信号端，否则可能造成严重的损坏，因此请在上电之前再次确认电源配线。
输入电源切断后，一分钟之内，请勿触摸内部电路。
请勿在上电时触摸任何端子。
搭配使用的人机本体上的接地端子务必正确的接地，可提高产品抗干扰能力。
扩展模块连接口的端子禁止外力重压，避免导致产品损坏。
யݡᖎ̬1.1 型号说明 DOP － EXIO 14R AE （1）（2）（3）（4）（5）（1）产品名称DOP ：Delta Operation Panel（2）机种名称 EXIO ：Extension DIO （3）点数 14：8 输入点／6 输出点 28：16 输入点／12 输出点 （4）输出接点形式 R ：继电器（5）适用机型AE ：DOP-AE 系列人机1.2 产品外观及各部介绍1. 扩展模块连接口2. 扩展模块螺丝固定孔3. 输出／入端子4. 铭牌1.3 机种型号输入／输出规格 输入单元 输出单元 机种电源点数 形式 点数 形 式 DOP-EXIO14RAE8 6继电器RelayDOP-EXIO28RAE5VDC人机供应16 直流Sink 或Source12继电器RelayΑਕఢॾ项目 规格备注演算控制方式内存程序．往返式来回扫描方式 -输入／输出控制方式结束再生方式（当执行至END 指令）仅主机的输入／输出有立即刷新指令演算处理速度基本指令 （30 us ） 应用指令（30 ~ 数百 us ）程序语言指令 + 梯形图 + SFC含有步进指令 程序容量999 Steps具有内藏EEPROM 指令种类基本顺序指令32个（含步进梯形图指令）应用指令59种步进继电器 （停电保持用） 一般步进点128点 S10 ~ S127一般用1280点 M0 ~ M511 + M768 ~ M999 + M1000~ M1279辅助 继电器停电保持用256点M512 ~ M76764点 T0~T63（100 ms 时基） 63 点 T64~T126（10 ms 时基） 定时器数字式 1 点 T127（1 ms 时基） 一般用112 点 C0 ~ C111 停电保持用16 点 C112 ~ C127计数器32b i t 用13 点 C235 ~ C254（全部为停电保持）一般用408 点 D0 ~ D407 数据 寄存器 停电保持用192 点 D408 ~ D599 指针 P 64点 P0 ~ P63 变址 寄存器 E／F 2个E ，F10进位K 16 位：-32768 ~ +32767 32位：-2147483648 ~ +2147483647常量16进位H16 位：0000 ~ FFFF 32位：00000000 ~ FFFFFFFF自 我 诊 断／保护输出／入检查、系统执行时间超时检查、不合法指令检查、程序语法检查及密码设置监测／除错程序执行时间显示、位／字、元件设置ঈఢॾ项目／机型DOP-EXIO14RAEDOP-EXIO28RAE电源电压 5VDC ，1A （人机提供） 消耗电力 0.25W 0.5W干扰免疫力RS: Frequency: 80MHz ~ 1GHz, 1.4GHz ~ 2.0GHz, Test level 10V/mCS: Frequency: 0.15MHz ~ 80MHz, Test level 10V (HMI power port & I/O line)ESD: Air discharge ±8KV EFT: ±1.5KV (HMI power port)±1KV (I/O line)Surge: ±2KV (HMI power port)操作／储存环境操作：0 ~ 50℃℃（温度），10 ~ 90%（湿度）； 储存：-40 ~ 85℃℃（温度），10 ~ 90%（湿度）耐振动／冲击 IEC 61131-2规定 不连续振动5Hz-9Hz 3.5mm ，9Hz-150Hz 1G连续振动 5Hz-9Hz 1.75mm ，9Hz-150Hz 0.5GX, Y , Z 各方向 10 次重量约95.5g 约116g输入点电气规格输入形式 直 流（SINK 或SOURCE ）输入电压 24VDC （5mA ） Off→On 16VDC 以上 动作准位 On →Off 14.4VDC 以下反应时间约10ms输出点电气规格输出点形式继电器-R 电流规格 1.5A ／1点（5A ／COM ） 电压规格 250VAC ，30VDC 以下75VA （电感性）最大负载90 W （电阻性）反应时间 约10 ms 機械壽命 2 × 107次 (無負載)接點壽命100,000次 (3A 250VAC/30VDC) 6,000次 (5A 250VAC/30VDC)щ྅̈́੨ቢ4.1 配线1. 输出／入配线端请使用28-16AWG （1.5mm 2）单芯祼线或多芯线，剥线长度6-7mm ，端子规格如左所示。
Fosboro硬件
输入电压范围（冗余）
功耗
热耗散
24V dc+5%,-10%
7W(最大)
在24V dc时，3W（最大）
所有输入信号为20.4mA（内部供电），在24V dc时，11W（最大值）
回路电源保护
每个通道均为通道与通道之间的电流隔离、电流限制与电压调节。
FBM212
热电偶/mV输入接口组件
性能指标
输入通道
电源要求
输入电压范围（冗余）
功耗
热耗散
24Vdc+5%,-10%
7 W（最大值）
3W（最大值）
FBM203
RTD输入接口组件
输入通道
8路独立的隔离通道
输入范围（每一通道）
0~320Ω
精度（含线性）
量程的±0.03%
精度温度系数±50ppm/℃
通讯
通过现场总线组件与相应现场总线通讯软件（FCM）进行通讯
FBM207b，24V dc±15%；FBM207c，48 V dc±15%
2.5ｍA(最大值)
1.0 KΩ（最大值）
100KΩ（最大值）
通到隔离
每一通道与所有的其他通道和接地（地线）电流隔离。600 Vac,任何通道与接地（地线）之间或给定的通道与任何其它通道之间。
FBM211
0至20mA输入接口组件
FBM202
热电偶/mV输入接口组件
性能指标
输入通道
8路独立的隔离热电偶/MV输入通道，另有一路隔离的冷端参考温度补偿通道
输入范围（每一通道）
-10.5~+64.9MVdc(a)_
参考冷端
由接线端电缆部件内部提供3线100Ω铂RTD（IEC751，等级B，作为冷端参考温度补偿。）
1794各模块介绍
、处理器1794-TBNF带接线端子的底座现货1794-TB32带接线端子的底座现货1794-TB3带接线端子的底座现货1794-PS3电源(220VAC3A)现货1794-PS13电源(220VAC1.3A)现货1794-OW88点继电器输出模块现货1794-OE44点模拟量输出模块现货1794-OB824VDC8点输出模块现货1794-OB32P24VDC32点输出模块现货1794-OB1624VDC16点输出模块现货1794-IT88点温度输入模块现货1794-IR88点RTD输入模块现货1794-IE88点模拟量输入模块现货1794-IB824VDC8点输入模块现货1794-IB3224VDC32点输入模块现货1794-IB1624VDC16点输入模块现货1794-AENTEtherNet网络适配器现货1794-ADNDeviceNet网络适配器现货1794-ACNR15ControlNet网络冗余适配器现货1794-ACN15ControlNet网络适配器现货FLEX数字量直流输出模块*舉洁佶n率之空仙陽工苴rttFLEX数字量直流输入模块FLEX数字量直流组合模块目鵜输入输出输入点数导通状态输入电压工作电压范围缺省信号延迟断开状态输出点数每个模块的最大电流端子基座*Flexbus总线电流(mA)外接H流毓最大功耗1794-IB10xOB6 5路灌入型24V宣流19.2-3X2V直流0.25ms1.5mA6路拉出型200mA 1794-TB3,1794-35mA 24V直流时31.2V直流1794-IB16xOB16P 16路灌入型24V宜流10-3他直流0.25ms1.5mA16路拉出型,带保500mA 1794-TB32,-TB32S80mA 24V直流时31.2VA流W7.0W擋存使用黒体文宁的端于*座FLEX数字量触点式输出模块目鵜输出点数工作电压范围每路输出的最大电流每个模块的最大电流端子基座*Flexbus总线电流(mA)外接直流畅最大电流最大功耗1794-OW8 8路隔高常开型继5-240V直流2測交能时3A带电阻16A1794-TBNF 70mA 125mA 31.2VX流讨5.0W整个系统中分布式I/O采用Rockwell公司生产的FlexLogix系列模块，分布式I/O系统由控制器、I/O模块、通信模块、电源、端子型I/O基座、安装导轨组成。
KL2408 8通道数字输出模块说明书
Signal LED 2Signal LED 1 Output 1Output 3Output 5Output 7 KL2408 | 8-channel digital output terminal 24 V DCT he KL2408 digital output terminal connects the binary control signals from the automation unit on to the actuators at the process level with electrical isolation. It is protected against reverse polarity connection and handles load currents with outputs that are protected against overload and short-circuit. T he Bus Terminal contains eight channels which indicate their signal state by means of light emitting diodes. It is particularly suitable for space-saving use in control cabinets. The connection technology is optimised for single-ended inputs. All components have to use the same reference point as the KL2408. The power contacts are looped through. The outputs are supplied by the 24 V power contact.KL2408 | KS2408Connection technology1-wire Number of outputs8Nominal voltage24 V DC (-15 %/+20 %)Load typeohmic, inductive, lamp load Max. output current0.5 A (short-circuit proof) per channel Short-circuit current< 2 A Breaking energy< 150 mJ/channel Reverse voltage protectionyes Electrical isolation500 V (K-bus/field potential)Current consumption power contactstyp. 60 mA + load Current consumption K-bustyp. 18 mA Bit width in the process image8 outputs Configurationno address or configuration setting Weightapprox. 70 g Operating/storage temperature-25…+60 °C/-40…+85 °C Relative humidity95 %, no condensation Vibration/shock resistanceconforms to EN 60068-2-6/EN 60068-2-27EMC immunity/emissionconforms to EN 61000-6-2/EN 61000-6-4Protect. class/installation pos.IP 20/variable Pluggable wiringfor all KSxxxx Bus Terminals Approvals/markingsCE, UL, ATEX, GL, IECEx Ex-Marking II 3 G Ex nA IIC T4 Gc Ex nA IIC T4 Gc Ex tc IIIC T135 °C DcSignal LED 8Signal LED 6Signal LED 4Signal LED 7 Signal LED 5 Signal LED 3 Power contact +24 VPower contact 0 V Output 2Output 4Output 6Output 8Top view Contact assemblyKL2408BECKHOFF New Automation Technology We reserve the right to make technical changes.。
梅特勒-托利多 ACT350 ACT350xx POWERCELL 变送器用户手册说明书
3.6.6.
清皮 ................................................................ 21
3.6.7.
10 倍扩展显示..................................................................................21
2.3.2.
接地 ................................................................................................. 10
2.3.3.
数字传感器 ...................................................................................... 11
3.6.4.
清零 ................................................................................................. 20
3.6.5.
去皮 ................................................................................................. 21
3.6. 基本功能.................................................................................................... 19
3.6.1.
网页（Webserver）菜单 .................................................................... 20
亿维自动化 X系列BD扩展板使用说明书
3.4. X-2AO-BD 产品说明书 ............................................................................................................ 19
3.4.1. 产品概述 ............................................................................................................................ 19
2.1.4. 模拟量 BD 扩展板地址对照表........................................................................................... 7
3. BD 扩展板详细参数..................................................................................................................................... 9
服务热线：4000 300 890
3.1.4. 安装及接线图 .................................................................................................................... 10
3.1.5. 应用说明 .............................................................................................................................11
数字系统平台 - Digilent DIO4 输入 输出模块说明书
D i g i l e n t D I O4P e r i p h e r a l B o a r d R e f e r e n c e M a n u a lRevision: August 11, 2004 246 East Main | Pullman, WA 99163(509) 334 6306 Voice and FaxOverviewThe DIO4 circuit board provides a low-cost, ready-made source for many of the most common I/O devices found in digital systems. It can be attached to a Digilent system board to create a circuit design platform capable of hosting a wide array of circuits. DIO4 features include:• A 4-digit seven segment LED display; •8 individual LEDs;• 4 pushbuttons;•8 slide switches;•3-bit VGA port;•PS/2 mouse or keyboard port. Functional DescriptionThe DIO4 can be attached to Digilent system boards to quickly and easily add several useful I/O devices. The DIO4 draws power from the system board, and signals from all I/O devices are routed to individual pins on the system board connectors. These features allow the DIO4 to be incorporated into system-board circuits with minimal effort.All devices on the DIO4 use the 3.3V supply from the system board, except for the PS/2 port which needs a 5VDC supply (the DIO4 contains a 5VDC regulator). Signals coming from the PS/2 port are routed through level-shifting buffers to protect system boards that do not have 5V tolerant inputs.Power SuppliesThe DIO4 draws power from three pins on the 40-pin connectors: pin 37 supplies 3.3V; pin 39unregulated voltage (VU). VU is connected to a 5VDC LDO regulator to produce a 5VDC supply for the PS/2 interface. The 3.3V supply is used to drive all other I/O devices on the board. The DIO4 consumes 5-10mA from the VU supply, and 10-50mA from the 3.3V supply (depending on how many LEDs are illuminated).Seven-Segment LED displayThe DIO4 board contains a modular 4-digit, common anode seven-segment LED display. In a common anode display, the seven anodes of the LEDs forming each digit are connected to four common circuit nodes (labeled AN1 through AN4 on the DIO4). Each anode, and therefore each digit, can be independently turned on and off by driving these signals to a ‘0’ (on) or a ‘1’ (off). The cathodes of similar segments on all four displays are also connected together into seven common circuit nodes labeled CA through CG. Thus, each cathode for all four displays can be turned on (‘0’) and off (‘1’) independently.This connection scheme creates a multiplexed display, where driving the anode signals and corresponding cathode patterns of each digit in a repeating, continuous succession can create a 4-digit display. In order for each of the four digits to appear bright and continuously illuminated, all four digits should be driven once every 1 to 16ms (for a refresh frequency of 1KHz to 60Hz). For example, in a 60Hz refresh scheme, each digit would be illuminated for ¼ of the refresh cycle, or 4ms. The controller must assure that the correct cathode pattern is present when the corresponding anode signal is driven. To illustrate the process, if AN1 is driven low while CB and CC are driven low, then a “1” will be displayed in digit position 1. Then, if AN2 is driven low while CA, CB and CC are driven low, then a “7” will be displayed in digit position 2. If AN1 and CB, CC are driven for 4ms, and then AN2 and CA, CB, CC are driven for 4ms in an endless succession, the display will show “17” in the first two digits. An example timing diagram is provided below.Discrete LEDsEight individual LEDs are provided for circuit outputs. The LED cathodes are tied to GND via 270-ohm resistors, and the LED anodes are driven from a 74HC373. The ‘373 allows LED data to be latched on the DIO4, so that theLD# signals from the system board do not need to be driven continuously (the LD# signals use connector pins that are used in the “system bus” on some Digilent boards). If the system bus is not needed, then the LDG signal can be tied high.LD #LDGButton InputsThe DIO4 contains 4 N.O. (normally open) pushbuttons. Button outputs are connected to Vdd via a 4.7K resistor. When the button is pressed, the output is connected directly to GND. This results in a logic signal that is low only while the button is actively pressed, and high at all other times. The buttons are debounced with an RC filter and Schmidt-trigger inverter as shown in the figure below. This circuit creates a logic high signal when the button is pressed. The debounce circuit provides ESD protection and creates a signal with clean edges, so the BTN# signals can be used as clock signals if desired.BTN#Switch InputsThe eight slide switches on the DIO4 can be used to generate logic high or logic low inputs to the attached system board. The switches exhibit about 2ms of bounce, and no active debouncing circuit is employed. A 4.7K-ohm series resistor is used for nominal input protection.PS2 PortThe DIO4 board includes a 6-pin mini-DIN connector that can accommodate a PS2 mouse or PS2 keyboard connection. A 5VDC regulator and voltage-mapping buffers are provided on the board to interface lower voltage system boards with keyboards and/or mice.PS2 ConnectorBottom-uphole patternPin DefinitionsPin Function1 Data2 Reserved3 GND4 Vdd5 Clock6 ReservedBoth the mouse and keyboard use a two-wire serial bus (including clock and data) to communicate with a host device, and both drive the bus with identical signal timings. Both use11-bit words that include a start, stop and odd parity bit, but the data packets are organized differently, and the keyboard interface allows bi-directional data transfers (so the host device can illuminate state LEDs on the keyboard). Bus timings are shown below. The clock and data signals are only driven when data transfers occur, and otherwise they are held in the “idle” state at logic ‘1’. The timings define signal requirements for mouse-to-host communications and bi-directional keyboard communications.TCLKTKeyboardThe keyboard uses open collector drivers so that either the keyboard or an attached host device can drive the two-wire bus (if the host device will not send data to the keyboard, then the host can use simple input-only ports).PS2-style keyboards use scan codes to communicate key press data (nearly all keyboards in use today are PS2 style). Each key has a single, unique scan code that is sent whenever the corresponding key is pressed. If the key is pressed and held, the scan code will be sent repeatedly once every 100ms or so. When a key is released, a “F0” key-up code is sent, followed by the scan code of the released key. If a key can be “shifted” to produce a new character (like a capital letter), then a shift character is sent in addition to the original scan code, and the host device must determine which character to use. Some keys, called extended keys, send an “E0” ahead of the scan code (and they may send more than one scan code). When an extended key is released, an “E0 F0” key-up code is sent, followed by the scan code. Scan codes for most keys are shown in the figure below.A host device can also send data to the keyboard. Below is a short list of some often-used commands.ED Set Num Lock, Caps Lock, and Scroll Lock LEDs. After receiving an “ED”, the keyboardreturns an “FA”; then the host sends a byte toset LED status: Bit 0 sets Scroll Lock; bit 1 setsNum Lock; and Bit 2 sets Caps lock. Bits 3 to 7are ignored.EE Echo. Upon receiving an echo command, the keyboard replies with “EE”.F3 Set scan code repeat rate. The keyboard acknowledges receipt of an “F3” by returning an“FA”, after which the host sends a second byteto set the repeat rate.FE Resend. Upon receiving FE, the keyboard re-sends the last scan code sent.FF Reset. Resets the keyboard.The keyboard should send data to the host only when both the data and clock lines are high (or idle). Since the host is the “bus master”, the keyboard should check to see whether the host is sending data before driving the bus. To facilitate this, the clock line can be used as a “clear to send” signal. If the host pulls the clock line low, the keyboard must not send any data until the clock is released (host-to-keyboard data transmission will not be dealt with further here).The keyboard sends data to the host in 11-bit words that contain a ‘0’ start bit, followed by 8-bits of scan code (LSB first), followed by an odd parity bit and terminated with a ‘1’ stop bit. The keyboard generates 11 clock transitions (at around 20 - 30KHz) when the data is sent, and data is valid on the falling edge of the clock.MouseThe mouse outputs a clock and data signal when it is moved; otherwise, these signals remain at logic ‘1’. Each time the mouse is moved, three 11-bit words are sent from the mouse to the host device. Each of the 11-bit words contains a ‘0’ start bit, followed by 8 bits of data (LSB first), followed by an odd parity bit, and terminated with a ‘1’ stop bit. Thus, each data transmission contains 33 bits, where bits 0, 11, and 22 are ‘0’ start bits, and bits 11, 21, and 33 are ‘1’ stop bits. The three 8-bit data fields contain movement data as shown below. Data is valid at the falling edge of the clock, and the clock period is 20 to 30KHz.The mouse assumes a relative coordinate system wherein moving the mouse to the right generates a positive number in the X field, and moving to the left generates a negative number. Likewise, moving the mouse up generates a positive number in the Y field, and moving down represents a negative number (the XS and YS bits in the status byte are the sign bits – a ‘1’ indicates a negative number). The magnitude of the X and Y numbers represent the rate of mouse movement – the larger the number, the faster the mouse is moving (the XV and YV bits in the status byte are movement overflow indicators – a ‘1’ means overflow has occurred). If the mouse moves continuously, the 33-bit transmissions are repeated every 50ms or so. The L and R fields in the status byte indicate Left and Right button presses (a ‘1’ indicates the button is being pressed).timing information is provided as an example of how a VGA monitor might be driven in 640 by 480 mode. For more precise information, or for information on higher VGA frequencies, refer to document available at the VESA website (or experiment!).VGA system timingCRT-based VGA displays use amplitude modulated, moving electron beams (or cathode rays) to display information on a phosphor-coated screen. LCD displays use an array of switches that can impose a voltage across a small amount of liquid crystal, thereby changing light permitivity through the crystal on a pixel-by-pixel basis. Although the following description is limited to CRT displays, LCD displays have evolved to use the same signal timings as CRT displays (so the “signals” discussion below pertains to both CRTs and LCDs).CRT displays use electron beams (one for red, one for blue and one for green) to energize the phosphor that coats the inner side of the display end of a cathode ray tube (see drawing below). Electron beams emanate from “electron guns”, which are a finely pointed, heated cathodes placed in close proximity to a positively charged annular plate called a “grid”. The electrostatic force imposed by the grid pulls away rays of energized electrons as current flows into the cathodes. These particle rays are initially accelerated towards the grid, but they soon fall under the influence of the much larger electrostatic force that results from the entire phosphor coated display surface of the CRT being charged to 20kV (or more). The rays are focused to a fine beam as they pass through the center of the grids, and then they accelerate to impact on the phosphor coated display surface. The phosphor surface glows brightly at the impact point, and the phosphor continues to glow for several hundred microseconds after the beam is removed. The larger the current fed into the cathode, the brighter the phosphor will glow. Between the grid and the display surface, the beam passes through the neck of the CRT where two coils of wire produce orthogonal electromagnetic fields. Because cathode rays are composed of charged particles (electrons), they can be deflected by these magnetic fields. Current waveforms are passed through the coils to produce magnetic fields that interact with the cathode rays and cause them to transverse the display surface in a “raster” pattern, horizontally from left to right and vertically from top to bottom. As the cathode ray moves over the surface of the display, the current sent to the electron guns can be increased or decreased to change the brightness of the display at the cathode ray impact point.Information is only displayed when the beam is moving in the “forward” direction (left to right and top to bottom), and not during the time the beam is reset back to the left or top edge of the display. Much of the potential display time is therefore lost in “blanking” periods when the beam is reset and stabilized to begin a new horizontal or vertical display pass.The size of the beams, the frequency at which the beam can be traced across the display, and the frequency at which the electron beam can be modulated determine the display resolution. Modern VGA displays can accommodate different resolutions, and a VGA controller circuit dictates the resolution by producing timing signals to control the raster patterns. The controller must produce synchronizing pulses at 3.3V (or 5V) to set the frequency at which current flows through the deflection coils, and it must ensure that video data is applied to the electron guns at the correct time. Raster video displays define a number of “rows” that corresponds to the number of horizontal passes the cathode makes over the display area, and a number of “columns” that corresponds to an area on each row that is assigned to one “picture element” or pixel. Typical displays use from 240 to 1200 rows, and from 320 to 1600 columns. The overall size of a display, and the number of rows and columns determines the size of each pixel. Video data typically comes from a video refresh memory, with one or more bytes assigned to each pixel location (the DIO4 board uses 3-bits per pixel). The controller must index into video memory as the beams move across the display, and retrieve and apply video data to the display at precisely the time the electron beam is moving across a given pixel.A VGA controller circuit must generate the HS and VS timings signals and coordinate the delivery of video data based on the pixel clock. The pixel clock defines the time available to display 1 pixel of information. The VS signal defines the “refresh” frequency of the display, orthe frequency at which all information on the display is redrawn. The minimum refresh frequency is a function of the display’s phosphor and electron beam intensity, with practical refresh frequencies falling in the 50Hz to 120Hz range. The number of lines to be displayed at a given refresh frequency defines the horizontal “retrace” frequency. For a 640-pixel by 480-row display using a 25MHz pixel clock and 60 +/-1Hz refresh, the signal timings shown in the table below can be derived. Timings for sync pulse width and front and back porch intervals (porch intervals are the pre- and post-sync pulse times during which information cannot be displayed) are based on observations taken from VGA displays. A VGA controller circuit decodes the output of a horizontal-sync counter driven by the pixel clock to generate HS signal timings. This counter can be used to locate any pixel location on a given row. Likewise, the output of a vertical-sync counter that increments with each HS pulse can be used to generate VS signal timings, and this counter can be used to locate any given row. These two continually running counters can be used to form an address into video RAM. No time relationship between the onset of the HS pulse and the onset of the VS pulse is specified, so the designer can arrange the counters to easily form video RAM addresses, or to minimize decoding logic for sync pulse generation.Connector pinouts are shown below. Separately available tables show pass-through connections for the devices on the DIO4 board when it is attached to various system boards. Note that connectors on system boards and peripheral boards use the same numbering scheme – that is, if the board is held with the component side towards you and the connectors pointing up, then pin #1 is always on the bottom left corner of the connector. This means that when a peripheral board is plugged into a system board, the numbering patterns are mirrored. Pin #1 on the peripheral board mates with pin #39 on the system board, peripheral board pin #2 mates with system pin #40, etc. Note that odd pin number mating pairs add to 40, and even pin number mating pairs add to 42 (so pin 36 mates with pin 6, pin 27 mates with pin 13, etc.).DIO4 Expansion Connector PinoutP1 Signal Dir P2 Signal Dir1 nc 1 nc2 nc 2 nc3 nc 3 nc4 nc 4 nc5 nc 5 nc6 nc 6 nc7 nc 7 nc8 nc 8 nc9 nc 9 nc10 nc 10 nc11 nc 11 nc12 nc 12 nc13 AN3 in 13 VS in14 AN4 in 14 HS in15 AN1 in 15 GRN in16 AN2 in 16 RED in17 BTN4 out 17 PS2D bidi18 BTN5 out 18 BLU in19 nc 19 BTN2 out20 BTN3 out 20 PS2C bidi21 LED8 in 21 DP in22 LEDG in22 BTN1 out23 LED7 in23 CG in24 nc 24 SW8 out25 LED6 in 25 CF in26 nc 26 SW7 out27 LED5 in 27 CE in28 nc 28 SW6 out29 LED4 in 29 CD in30 nc 30 SW5 out31 LED3 in 31 CC in32 nc 32 SW4 outout33 LED2 in 33 CB in34 nc 34 SW3 out35 LED1 in 35 CA in36 nc 36 SW2 out37 VCC33 37 VCC3338 nc 38 SW139 GND 39 GND40 VU 40 VU。
DIOLINE L-Bus 扩展模块(带4个模拟输入端)
安装所需空间：上面预留：5mm（安装用） 下面预留：5mm（安装用） 两边预留：0mm
-40°C — +70°C（+85°C 10 分钟）对应 EN 50155 Tx 类 -40 — 85 °C
标准
机车用电子设备：EN 50155 电磁兼容：EN 50121-3-2 绝缘配合：EN 50124-1 震动和撞击：EN 61373
PT 100：-60...300°C 2-，3-，4-线制连接 4 X 16 Bit 模拟输入信号 16 Bit，1 LSB = 0.0244 K -60°C...0°C ±1.8 K 0...100°C ±0.9 K 100°C...300°C ±1.8K
采样频率
10 Hz (100 ms)
输入电压
PE‐接头
插簧
6.3 mm × 0.8 mm
标准
机车用电子设备：EN 50155 电磁兼容：EN 50121-3-2 绝缘配合：EN 50124-1 震动和撞击：EN 61373
外形尺寸图
DIOLINE L-Bus 扩展模块（带4个模拟输入端）
标识
应用范围 说明
总线接口 总线系统 模块类型 数据宽度 适用线缆 总线进线接头类型 总线出线接头类型
DIOLINE L-Bus 扩展模块（带4个模拟输入端）
标识
应用范围 说明
总线接口 总线系统 模块类型 数据宽度 适用线缆 总线进线接头类型 总线出线接头类型
输入端 数量 模拟输入端 1 接线方式 模拟输入端 2 接线方式 模拟输入端 3 接线方式 模拟输入端 4 接线方式 电势隔离 电压输入端 输入信号 输入电阻 数据宽度 分辨率 精确度
0 mA
0000 hex
开关量输入输出模块(EDPF-DIO)
开关量输入/输出模块（EDPF-DIO）1.1概述EDPF－DIO将16路DI和16路DO集成在一个模块上，其输入/输出方式设置分如下：输入方式：1.2.1信号端子开关量信号输入采用差分输入方式，16路模拟信号共32线，分别对应信号输入端子1－1.2.2 开关量输入方式选择16路开关量依靠16组跳线开关DIX1、DIX2选择；用户可独立地设置为有源输入或无源输入。
跳线开关DIXY，X为开关量序号，Y为功能号。
两种输入方式跳线开关状态如下：a)有源输入（24VDC）1 2 3 1 2 3DIX2 DIX1 DIX1、DIX2的1、2脚短路b）无源输入（干接点）1 2 3 1 2 3DIX2 DIX1DIX1、DIX2的2、3脚短路注：DIX1、DIX2其它组合无意义例如：若第5路置为无源输出（DI4）则：DI41、DI42的2、3短路，1、2断开DI模块出厂时缺省设置为无源输入方式。
注意：当为无源输入方式时，24V电源由DI卡提供，24V电源共负端，其负端为奇数端子，因此当输入开关量采用有公共端方式接线时，其公共端应接到奇数端子上。
模块使用说明输出方式1.3.1 16路开关量采用差分输出，共32线，分别对应端子1～32，奇数端子为正，偶数端为负，16路信号按顺序依次排列，端子安排如下：1.3.2输出方式选择：a.无源: 干接点输出b.有源:＋24V电压输出16路开关量依靠16组跳线开关DOX1、DOX2选择；用户可独立地设置为有源输出或无源输出。
跳线开关DOXY，X为开关量序号，Y为功能号。
两种输出方式跳线开关状态如下：a）无源输出（干接点）1 2 3 1 2 3DOX2 DOX1 DOX1、DOX2的1、2脚短路b）有源输出（24VDC）1 2 3 1 2 3DOX2 DOX1 DOX1、DOX2的2、3脚短路注：DOX1、DOX2的其它组合无意义例如：若第5路置为有源输出（DO4）则：DO41、DO42的2、3短路，1、2断开1.4模块使用说明接线端子1~32用于16路开关量信号的输入，接线端子33~64用于16路开关量信号的输出。
VIAVI MTS-5800 数据通信扩展模块用户手册说明书
手册VIAVI MTS-5800数据通信扩展模块VIAVI 数据通信扩展模块 (DEM) 和 MTS-5800 的组合为电力运营商提供了广泛的测试能力，可用于测量传统网络技术（数据通信、SONET/SDH、T1/E1 等） 和新技术（以太网、C37.94 等）。
DEM 扩展了已 经用途广泛的 MTS-5800 的测试范围，允许技术人员和工程师用最少的设备进行最广泛的测试。
支持的串行接口RS-232/V.28标准 V.28 串行数据接口，用于连接 DTE 或 DCE 计算机串行端口。
RS-530/RS-530A高速串行数据通信接口，使用一个平衡的 V.11 信号为 DTE 或 DCE 发送和接收时钟和数据。
RS-449高速 V.11 串行数据通信接口，使用平衡的成对信号为 DTE 或 DCE 发送和接收时钟和数据。
V.35高速数据通信接口，可以使用平衡的信号为 DTE 或 DCE进行发送和接收。
RS-485高速串行数据通信 V.11 接口，使用平衡的成对信号为 DTE或 DCE 的单点对点通信发送和接收时钟和数据。
使用RS-449 设置支持此接口。
X.21串行数据通信 V.11 接口，为 DTE 或 DCE 使用平衡的时钟和数据。
同步模式数据与时钟信号一起传输，发射机和接收机共用一个时钟。
异步模式在没有时钟信号的情况下发送数据。
向信号中添加起始位、停止位和奇偶校验位，并且这些位是可调整的。
发射机和接收机使用各自独立的时钟。
频率范围BERT 码型支持的比特误码率测试 (BERT) 码型包括：QRSS2^6-12^9-12^11-12^15-12^20-12^23-1CSU 向上循环和向下循环码NIU 向上循环和向下循环码全 1全 01:11:724 选 3延迟码型可通过用户界面手动插入单个错误。
可通过用户界面调整 1E-3 到 1E-9 范围内的线性错误率。
串行编码曼彻斯特编码NRZIFM0FM1差分曼彻斯特异步编码时钟定时内部随数据一起发送用于定时的内部时钟。
DEII扩展板使用说明
图1
该扩展板的低频时钟主要用于数字频率计和数字钟的设计。当用于数字频率计时，CLK1作为控制器基准时钟，CLKIN作为被测频率信号。当短路块选择的频率与数码管显示的值一致时，频率计工作正常。当用于数字钟时，1Hz的秒信号可以从CLK1或CLKIN分频得到。
（3）单击“Unused Pins”，在对话框中选择“As input tri-stated”，按“确定”键后对项目重新编译即可。
图2
图3
扩展板上蜂鸣器电路的控制端直接与FPGA的I/O引脚连接，如果一个设计中没有用到蜂鸣器，为了避免发出声音，在编译之前应将FPGA的未用引脚设为“输入高阻”。具体操作介绍如下：
（1）选择Assignments→Device，进入图2所示界面。
（2）单击“Device&Pin Option”按钮，进入图3所示界面。
DE2扩展板使用说明
DEII扩展板原理图如图1所示。扩展板包括两部分电路：一部分为低频时钟产生电路，可产生两路低频时钟信号CLK1和CLKIN，其中CLK1频率固定为8Hz，CLKIN的频率可通过短路块选择；另一部分为蜂鸣器电路，由BUZ引脚控制。当BUZ为低电平时，蜂鸣器发出响声，蜂鸣器上的不干胶不能揭开，否则声音太响。扩展板中有3关系如下：
PI4IOE5V96248 48位I2C总线I O扩展器说明书
48-bit I 2C-bus I/O ExpanderFeatures→ Operation power supply voltage from 2.3V to 5.5V → 48-bit remote I/O pins that default to inputs at power-up → 1MHz I 2C-bus interface→ Compliant with the I 2C-bus Fast and Standard modes → 5.0V tolerant I/Os→ SDA with 30 mA sink capability for 4000 pF buses → Latched outputs with 25 mA sink capability for directly driving LEDs → Total package sink capability of 1200 mA → Active LOW open-drain interrupt output → Low standby current→ 64 programmable slave addresses using 3 address pins → ESD protection (4KV HBM and 1KV CDM) → Latch-up tested (exceeds 100mA)→ Offered in TQFN-56 7mm x 7mm( ZL 56) package.DescriptionThe PI4IOE5V96248 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I 2C-bus) and is a part of the Fast-mode Plus family.The PI4IOE5V96248 supports high I 2C-bus drive (25 mA) so that many more devices can be on the bus without the need for bus buffers, high total package sink capacity (1200 mA) that supports having all 25 mA LEDs on at the same time and more device addresses (64) are available to allow many more devices on the bus without address conflicts.The device consists of a 48-bit quasi-bidirectional port and an I 2C-bus interface. The PI4IOE5V96248 has a low current consumption and includes latched outputs with high current drive capability for directly driving LEDs.It also possesses an interrupt line (IN T) which can be connected to the interrupt logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via the I 2C-bus. The internal Power-On Reset (POR) or software reset sequence initializes the I/Os as inputs.Pin ConfigurationFig 1 Pin Assignment of ZL 56Pin DescriptionMaximum RatingsPower supply ......................................................................................................... -0.5V to +6.0V Voltage on an I/O pin ............................................................................. G ND-0.5V to +6.0V Input current ......................................................................................................................... ±20mA Output current on an I/O pin .......................................................................................... ±50mA Supply current .................................................................................................................. ±160mA Ground supply current ....................................................................................................1500mA Total power dissipation .................................................................................................... 600mW Operation temperature ................................................................................................... -40~85℃ Storage temperature ................................................................................................... -65~150℃ Maximum Junction temperature ,T j(max) .................................................................. 125℃Static CharacteristicsVCC = 2.3 V to 5.5 V; GND = 0 V; Tamb= -40 °C to +85 °C; unless otherwise specified. Table 2: Static characteristics Symbol Parameter Conditions Min. Typ. Max. UnitPower supplyV C C Supply voltage2.3- 5.5 VI CC Supply current Operating mode; V CC = 5.5 V; no load;f SCL = 1MHz-250 500 μA I s tb Standby current Standby mode; V CC = 5.5 V; no load; V I = V CC ; f SCL = 0 kHz; I/O = inputs-0.25 1 uAV P ORPower-on reset voltage [1]- 1.16 1.41 VInput SCL, input/output SDAV I L Low level input voltage-0.5-+0.3V CCVV IHHigh level input voltage0.7V CC - 5.5 VI O L Low level output current V O L =0.4V 20 - - mAI L Leakage current V I =V CC =GND -1 - 1 μA C i Input capacitance V I =GND-510pFI/OsI OLLow level output currentVCC = 2.3 V; V OL = 0.5 V [2] 1228 mA VCC=3.0V; V OL = 0.5 V [2] 17 35 mAVCC=4.5V; V OL = 0.5 V [2] 25 42 mAI OL (tot) total LOW-level outputcurrentVOL =0.5V;VCC = 4.5V 600 mAI OH HIGH-level output current VOH = GND -30 -359 -480 uA Itrt(pu)transient boosted pull-up currentVOH= GND-0.5-1.0mAC i Off-state Input capacitance [3]- 9 10 pF C o Off-state Output capacitance[3] - 9 10 pFNote:Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability .[1]:VCC must be lowered to 0.2 V for at least 20us in order to reset part.[2]:Each I/O must be externally limited to a maximum of 25 mA and the total package limited to 1200 mA due to internal busing limits. [3]: The value is not tested, but verified on sampling basis.Dynamic CharacteristicsTable 3: Dynamic characteristicsSymbol Parameter Standard modeI 2CFast mode I 2C Fast mode Plus I 2C UnitMin Max Min Max Min Max f SCL SCL clock frequency 0 100 0 400 0 1000 kHz t BUF bus free time between a STOP andSTART condition4.7 - 1.3 - 0.5 μs t HD;STA hold time (repeated) START condition4.0 - 0.6 - 0.26 μs t SU;STA set-up time for a repeated START condition4.7 - 0.6 - 0.26 μs t SU;STO set-up time for STOP condition 4.0 - 0.6 - 0.26 μs t VD;ACK [1] data valid acknowledge time - 3.45 - 0.9 - 0.45 μs t HD;DAT [2] data hold time 0 - 0 - 0 ns t VD;DAT data valid time - 3.45 - 0.9 - 0.45 ns t SU;DAT data set-up time250 - 100 - 50 ns t LOW LOW period of the SCL clock 4.7 - 1.3 - 0.5 μs t HIGH HIGH period of the SCL clock 4.0-0.6-0.26μst f fall time of both SDA and SCL signals- 300 300 - 120 ns t r rise time of both SDA and SCL signals- 1000 300 - 120 ns t SPpulse width of spikes that must be suppressed by the input filter- 50 - 50 50 nsPort timing C L ≤100pF t v(Q) Data output valid time [3] 200 200 200 ns t su(D)Data input set-up timens[1]: t VD;ACK = time for acknowledgement signal from SCL LOW to SDA (out) LOW.[2]: t VD;DAT = minimum time for SDA data out to be valid following SCL LOW.[3]: t v(Q)measured from 0.7VCC on SCL to 50% I/O output.Fig 2: timing parameters for INT signalBlock DiagramFig 3: Block diagramDetails Descriptiona. Device addressFollowing a START condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). The address of the PI4IOE5V96248 is shown in below. Slave address pins AD2, AD1, and AD0 choose 1 of 64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in Table 4 “PI4IOE5V96248 address map”.PI4IOE5V96248 Addressb6 b5 b4 b3 b2 b1 b0b7(MSB)Byte A6 A5 A4 A3 A2 A1 A0 R/WAddressThe last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation.Table 4 PI4IOE5V96248Address mapsAD2 AD1 AD0 A6 A5 A4 A3 A2 A1 A0Address (Write) Address (Read)GND SCL GND 0 0 1 0 0 0 0 20h 21h GND SCL VDD 0 0 1 0 0 0 1 22h 23h GND SDA GND 0 0 1 0 0 1 0 24h 25h GND SDA VDD 0 0 1 0 0 1 1 26h 27h VDD SCL GND 0 0 1 0 1 0 0 28h 29h VDD SCL VDD 0 0 1 0 1 0 1 2Ah 2Bh VDD SDA GND 0 0 1 0 1 1 0 2Ch 2Dh VDD SDA VDD 0 0 1 0 1 1 1 2Eh 2Fh GND SCL SCL 0 0 1 1 0 0 0 30h 31h GND SCL SDA 0 0 1 1 0 0 1 32h 33h GND SDA SCL 0 0 1 1 0 1 0 34h 35h GND SDA SDA 0 0 1 1 0 1 1 36h 37h VDD SCL SCL 0 0 1 1 1 0 0 38h 39h VDD SCL SDA 0 0 1 1 1 0 1 3Ah 3Bh VDD SDA SCL 0 0 1 1 1 1 0 3Ch 3Dh VDD SDA SDA 0 0 1 1 1 1 1 3Eh 3Fh GND GND GND 0 1 0 0 0 0 0 40h 41h GND GND VDD 0 1 0 0 0 0 1 42h 43h GND VDD GND 0 1 0 0 0 1 0 44h 45h GND VDD VDD 0 1 0 0 0 1 1 46h 47h VDD GND GND 0 1 0 0 1 0 0 48h 49h VDD GND VDD 0 1 0 0 1 0 1 4Ah 4Bh VDD VDD GND 0 1 0 0 1 1 0 4Ch 4Dh VDD VDD VDD 0 1 0 0 1 1 1 4Eh 4Fh GND GND SCL 0 1 0 1 0 0 0 50h 51h GND GND SDA 0 1 0 1 0 0 1 52h 53h GND VDD SCL 0 1 0 1 0 1 0 54h 55h GND VDD SDA 0 1 0 1 0 1 1 56h 57h VDD GND SCL 0 1 0 1 1 0 0 58h 59h VDD GND SDA 0 1 0 1 1 0 1 5Ah 5Bh VDD VDD SCL 0 1 0 1 1 1 0 5Ch 5Dh VDD VDD SDA 0 1 0 1 1 1 1 5Eh 5Fh SCL SCL GND 1 0 1 0 0 0 0 A0h A1h SCL SCL VDD 1 0 1 0 0 0 1 A2h A3h SCL SDA GND 1 0 1 0 0 1 0 A4h A5h SCL SDA VDD 1 0 1 0 0 1 1 A6h A7h SDA SCL GND 1 0 1 0 1 0 0 A8h A9h SDA SCL VDD 1 0 1 0 1 0 1 AAh ABh SDA SDA GND 1 0 1 0 1 1 0 ACh ADh SDA SDA VDD 1 0 1 0 1 1 1 AEh AFh SCL SCL SCL 1 0 1 1 0 0 0 B0h B1h SCL SCL SDA 1 0 1 1 0 0 1 B2h B3hSCL SDA SCL 1 0 1 1 0 1 0 B4hB5h SCL SDA SDA 1 0 1 1 0 1 1 B6h B7h SDA SCL SCL 1 0 1 1 1 0 0 B8h B9h SDA SCL SDA 1 0 1 1 1 0 1 BAh BBh SDA SDA SCL 1 0 1 1 1 1 0 BCh BDh SDA SDA SDA 1 0 1 1 1 1 1 BEh BFh SCL GND GND 1 1 0 0 0 0 0 C0h C1h SCL GND VDD 1 1 0 0 0 0 1 C2h C3h SCL VDD GND 1 1 0 0 0 1 0 C4h C5h SCL VDD VDD 1 1 0 0 0 1 1 C6h C7h SDA GND GND 1 1 0 0 1 0 0 C8h C9h SDA GND VDD 1 1 0 0 1 0 1 CAh CBh SDA VDD GND 1 1 0 0 1 1 0 CCh CDh SDA VDD VDD 1 1 0 0 1 1 1 CEh CFh SCL GND SCL 1 1 1 0 0 0 0 E0h E1h SCL GND SDA 1 1 1 0 0 0 1 E2h E3h SCL VDD SCL 1 1 1 0 0 1 0 E4h E5h SCL VDD SDA 1 1 1 0 0 1 1 E6h E7h SDA GND SCL 1 1 1 0 1 0 0 E8h E9h SDA GND SDA 1 1 1 0 1 0 1 EAh EBh SDA VDD SCL 1 1 1 0 1 1 0 ECh Edh SDA VDD SDA 1 1 1 0 1 1 1EEhEFhQuasi-bidirectional I/O ArchitectureThe PI4IOE5V96248’s 48 ports (see Figure 4) are entirely independent and can be used either as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode. Output data is transmitted to the ports in the Write mode. Every data transmission from the PI4IOE5V96248 must consist of a multiple of six bytes, the first byte will be referred to as IO_7 to IO_0, and the second byte as IO_15 to IO_8. The third will be referred to as P_23 to IO_16, and so on.This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions. At power-on the I/Os are HIGH. In this mode only a current source (I OH) to VCC is active. An additional strong pull-up to VCC (Itrt(pu)) allows fast rising edges into heavily loaded outputs. These devices turn on when an output is written HIGH, and are switched off by the negative edge of SCL. The I/Os should be HIGH before being used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the write mode. Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large current (I OL) will flow to GND.Fig 4.Simplified schematic diagram of IOX_0 to IOX_7Writing to the Port (Output Mode)To write, the master (microcontroller) first addresses the slave device. By setting the last bit of the byte containing the slave address to logic 0 the Write mode is entered. The PI4IOE5V96248 acknowledges and the master sends the first data byte for IO0_7 to IO0_0. After the first data byte is acknowledged by the PI4IOE5V96248, the second data byte IO1_7 to IO1_0 is sent by the master. After the second data byte is acknowledged by the PI4IOE5V96248, the three data byte IO2_7 to IO2_0 is sent by the master and so on. Once again, the PI4IOE5V96248 acknowledges the receipt of the data. Each 8-bit data is presented on the port lines after it has been acknowledged by the PI4IOE5V96248.The number of data bytes that can be sent successively is not limited. After every six bytes, the previous data is overwritten.…Fig 5. Write ModeReading from a Port (Input Mode)All ports programmed as input should be set to logic 1. To read, the master (microcontroller) first addresses the slave device after it receives the interrupt. By setting the last bit of the byte containing the slave address to logic 1 the Read mode is entered.The data bytes that follow on the SDA are the values on the ports.If the data on the input port changes faster than the master can read, this data may be lost.Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge phase is valid.Fig 6.Read input port registerPower-on ResetWhen power is applied to VCC, an internal Power-On Reset (POR) holds the PI4IOE5V96248 in a reset condition until VCC has reached VPOR. At that point, the reset condition is released and the PI4IOE5V96248 registers and I2C-bus state machine will initialize to their default states. Thereafter VCC must be lowered below 0.2 V to reset the device.Interrupt Output (INT )The PI4IOE5V96248 provides an open-drain interrupt (INT) which can be fed to a corresponding input of the microcontroller. This gives these chips a kind of master function which can initiate an action elsewhere in the system.An interrupt is generated by any rising or falling edge of the port inputs. After time t(V)D the signal INT is valid.The interrupt disappears when data on the port is changed to the original setting or data is read from or written to the device which has generated the interrupt.In the write mode, the interrupt may become deactivated (HIGH) on the rising edge of the write to port pulse. On the falling edge of the write to port pulse the interrupt is definitely deactivated (HIGH).The interrupt is reset in the read mode on the rising edge of the read from port pulse.During the resetting of the interrupt itself, any changes on the I/Os may not generate an interrupt. After the interrupt is reset any change in I/Os will be detected and transmitted as an INT.RESET InputA reset can be accomplished by holding the RESET pin LOW for a minimum of t w(rst). The PI4IOE5V96248 registers and I2C-bus state machine will be held in their default state until the RESET input is once again HIGH.Part MarkingPackaging MechanicalFor latest package info.please check: /design/support/packaging/pericom-packaging/packaging-mechanicals-and-thermal-characteristics/Ordering InformationPart Number Package Code PackagePI4IOE5V96248ZLEX ZL 56-Contact, Very Thin Quad Flat No-Lead (TOFN)Notes:●Thermal characteristics can be found on the company web site at /design/support/packaging/● E = Pb-free and Green●X suffix = Tape/ReelIMPORTANT NOTICEDIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages.Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks.This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated.LIFE SUPPORTDiodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:A. Life support devices or systems are devices or systems which:1. are intended to implant into the body, or2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user.B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause thefailure of the life support device or to affect its safety or effectiveness.Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2016, Diodes Incorporated。
上海艾为电子技术 IC 接口、16路呼吸灯、扩展 GPIO 控制器 AW9523A 产品手册
ISOURCE – I/O Source Current – mA
ISINK – I/O Sink Current – mA
AW9523A 产品手册 2010 年 11 月 V1.3
GPIO SINK CURRENT vs
OUTPUT LOW VOLTAGE 80
70 TA=25℃
60 TA=-40℃
输出低电平 （P0_7~P0_0，
P1_7~P1_0）
VOL
输出低电平 （SDA，INTN）
数字输入
逻辑高电平（SCL，
SDA，RSTN，AD0，
VIH
AD1，P0_7~P0_0，
P1_7~P1_0）
逻辑低电平（SCL，
VIL
SDA，RSTN，AD0， AD1，P0_7~P0_0，
P1_7~P1_0）
70
60 TA=25℃
50 TA=-40℃
40
30
TA=85℃
20
10
VCC=2.5V
0 0 0.04 0.08 0.12 0.16 0.2 0.24 0.28 0.32 0.36
VOL – Output Low Voltage – V
GPIO SINK CURRENT vs
OUTPUT LOW VOLTAGE 80
VI=VCC 或 GND
VI=VCC 或 GND RSTN=VCC
ISEL<1:0>=0，DIMx=FFH IOUT=20mA
0.1
2
μA
VCC-170
mV
VCC-250
mV
VCC-200
mV
90
mV
70
mV
60
mV
DIOLINE L-Bus 扩展模块(带16个数字输出端)
DIOLINE L-Bus 扩展模块（带16个数字输出端）标识型号DL ‐LB ‐DO产品编码 746401 应用范围说明DIOLINE L-Bus 扩展模块（带16个数字输出端）广泛应用于机车 总线接口总线系统模块类型数据宽度适用线缆总线进线接头类型总线出线接头类型Lütze ‐Bus （Slave ）I/O 模块 2 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（母） 输出端数量输出电压输出电流通道类型保护措施外部保护接通延时关断延时接线方式16（1-8 电势A ，9-16 电势B ） DC 16.8-30 V 带防反接设计 环境温度<50°C ：每通道最大2A ，每组最大8A ，每模块最大16A 环境温度>50°C ：每通道最大1.25A ，每组最大5A ，每模块最大10A N-MOS FET 防错接 防短接 防过温 B10 额定7ms （包含CAN-电报处理时间） 额定8ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口诊断诊断显示说明 内部总线激活（LB A）LED 绿内部总线错误（LB ERR）LED 红输入端 16 LED 桔色DIOLINE L-Bus 扩展模块（带16个数字输出端）US A，US B 2 LED 绿电源OVL 2 LED 红过流电势隔离隔离电压 AC 1500 V 输出端和内部电路AC 1500 V 电势A和电势B技术参数电压范围电压波动额定电流（U N时）外形尺寸（宽x高x深） 重量（kg/个）保护等级安装方式安装要求工作温度库存温度 DC 16.8 — 30V最大10%额定电流10mA57.0x141.5x48.0 mm0.200 kg/个IP 20卡轨式安装安装所需空间：上面预留：5mm（安装用）下面预留：5mm（安装用）两边预留：0mm-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °CPE‐接头插簧 6.3 mm × 0.8 mm标准 机车用电子设备：EN 50155电磁兼容：EN 50121-3-2绝缘配合：EN 50124-1震动和撞击：EN 61373附件 EMV 屏蔽架组（产品编号：746894）DIOLINE L-Bus 扩展模块（带16个数字输入端）外形尺寸图DIOLINE L-Bus 扩展模块（带16个数字输出端）标识型号DL ‐LB ‐DO产品编码 746412 应用范围说明带16个数字输出端DIOLINE L-Bus 扩展模块（输出端1-4和9-12可输出冗余数据），广泛应用于机车 总线接口总线系统模块类型数据宽度适用线缆总线进线接头类型总线出线接头类型Lütze ‐Bus （Slave ）I/O 模块 2 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（母） 输出端数量输出电压输出电流通道类型保护措施外部保护接通延时关断延时接线方式16（1-8 电势A ，9-16 电势B ） DC 16.8-30 V 带防反接设计 环境温度<50°C ：每通道最大2A ，每组最大8A ，每模块最大16A 环境温度>50°C ：每通道最大1.25A ，每组最大5A ，每模块最大10A N-MOS FET 防错接 防短接 防过温 输出端1-4和9-12可适于冗余操作（二极管退耦） B10 额定7ms （包含CAN-电报处理时间） 额定8ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口诊断诊断显示说明 内部总线激活（LB A）LED 绿内部总线错误（LB ERR）LED 红输出端 16 LED 桔色DIOLINE L-Bus 扩展模块（带16个数字输出端）US A，US B 2 LED 绿电源OVL 2 LED 红过流电势隔离隔离电压 AC 1500 V 输出端和内部电路AC 1500 V 电势A和电势B技术参数电压范围电压波动额定电流（U N时）外形尺寸（宽x高x深） 重量（kg/个）保护等级安装方式安装要求工作温度库存温度 DC 16.8 — 30V最大10%额定电流10mA57.0x141.5x48.0 mm0.200 kg/个IP 20卡轨式安装安装所需空间：上面预留：5mm（安装用）下面预留：5mm（安装用）两边预留：0mm-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °CPE‐接头插簧 6.3 mm × 0.8 mm标准 机车用电子设备：EN 50155电磁兼容：EN 50121-3-2绝缘配合：EN 50124-1震动和撞击：EN 61373附件 EMV 屏蔽架组（产品编号：746894）DIOLINE L-Bus 扩展模块（带16个数字输入端）外形尺寸图DIOLINE L-Bus 扩展模块（带6个继电器输出端）标识型号DL ‐LB ‐DO产品编码 746415 应用范围说明带6个继电器输出端DIOLINE L-Bus 扩展模块广泛应用于机车 总线接口总线系统模块类型数据宽度适用线缆总线进线接头类型总线出线接头类型Lütze ‐Bus （Slave ）I/O 模块 1 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（公） 输出端数量输出电压输出电流接通延时关断延时接线方式6个触点继电器 DC 150 V ，AC 250 V DC150V ，阻性负载：DC0.4A DC 30V ，阻性负载：DC6A DC250V ，阻性负载：AC6A 额定28ms （包含CAN-电报处理时间） 额定12ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口 诊断诊断显示说明 内部总线激活（LB A ）LED 绿内部总线错误（LB ERR ）LED 红输出端 16 LED 桔色电势隔离隔离电压AC 1500 V 输出端和内部电路AC 1500 V 通道和通道DIOLINE L-Bus 扩展模块（带6个继电器输出端）技术参数电压范围电压波动额定电流（U N时）外形尺寸（宽x高x深） 重量（kg/个）保护等级安装方式安装要求工作温度库存温度 DC 16.8 — 30V最大10%额定电流90mA57.0x141.5x48.0 mm0.300 kg/个IP 20卡轨式安装安装所需空间：上面预留：5mm（安装用）下面预留：5mm（安装用）两边预留：0mm-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °CPE‐接头插簧 6.3 mm × 0.8 mm标准 机车用电子设备：EN 50155电磁兼容：EN 50121-3-2绝缘配合：EN 50124-1震动和撞击：EN 61373附件 EMV 屏蔽架组（产品编号：746894）外形尺寸图。
Tripp Lite P568-Series HDMI 信号扩展器说明说明书
Tripp Lite P568-Series HDMI cabling recommended for maximum distance and best performanceqAlthough most installations will not require power, a USB Micro-B port is featured in the event power is needed. Connect a USB Micro-B cable between the port and a USB wall charger, monitor or computer. qHDMI In-Line Signal Booster (F/F), 4K @ 60 Hz, Up to 50 ft., TAAMODEL NUMBER:B122-000-4K6In-line HDMI signal extender boosts a high-quality 4K HDMI audio/video transmission up to 50 ft. from the source device.FeaturesHDMI Booster Extends High-Definition 4K Video and Digital Audio Signals up to 50 ft.Don’t let HDMI’s 16-foot distance limitation limit your audio/video application. This in-line HDMI signal extender boosts your 4K transmission up to 50 feet from the source device without a drop in signal quality. This gives you the flexibility to hide your Blu-ray player or media server away in a secure, remote location for controlled access, while delivering video to an HDMI display somewhere else. The B122-000-4K6 is recommended for digital signs or video presentations in schools, conference rooms, retail displays, trade show booths and anywhere else you need to display high-definition video.Meets HDMI Industry Standards to Deliver High-Definition Results This HDMI signal booster supports computer video resolutions up to 3840 x 2160 (4K x 2K) at 60 Hz, as well as 36-bit Deep Color (12 bits per channel). It also supports DTS-HD, Dolby TrueHD and 7.1-channel surround sound to ensure your speakers deliver rich, clear audio to match the video quality. It also supports 4:4:4 chroma subsampling for top-level PC gaming or using your HDTV as a PC monitor.Greater Distance Gives You More Freedom in Placing Your Source and Display Devices This low-profile HDMI booster is designed for use with Tripp Lite P568-Series HDMI cables (sold separately). Connect one cable (up to 25 feet) to your source device, such as a Blu-ray player or computer, to transmit a 4K (60 Hz) signal. The second cable connects the B122-000-4K6 and the HDMI display device, and must be no longer than 25 feet. This unit can also extend a 3D signal up to 50 feet. For best results, 24 AWG HDMI cable, such as Tripp Lite P568-100-HD (sold separately), is required.Ready to Use Right from the Package, So You Can Plug and Play Immediately The plug-and-play unit requires no software, drivers or (usually) external power. In the extreme case that external power is needed, connect a USB Micro-B cable (such as Tripp Lite’s UR050-Series) between the unit’s USB Micro-B port and a USB wall charger or USB port on your monitor or computer (cable and charger sold separately). With its low-profile design, the B122-000-4K6 is easy to stow in your laptop bag and carry to school, the office or the latest trade show.TAA-Compliant for GSA Schedule Purchases The B122-000-4K6 is compliant with the Federal Trade Agreements Act (TAA), which makes it eligible for GSA (General Services Administration) Schedule and other federal procurement contracts.HighlightsAllows you to store expensivesource device in a securelocation for controlled accessqDelivers HD picture quality atresolutions up to 3840 x 2160(4K x 2K) @ 60 HzqSupports DTS-HD, DolbyTrueHD and 7.1 surround sound for rich, clear audioqCompact unit fits easily intobriefcase or laptop bag forinstant use anywhereqPlug-and-play operation with no software required for easy,immediate installationqApplicationsDigital signage in office lobbies, churches, retail stores,restaurants and hotelsqVideo presentations inconference rooms, lecture halls, classrooms and trade showsqHome theater systems wherethe source devices are securedin a closet or other roomqSystem RequirementsSource device with HDMI output qDisplay device with HDMI input q24 AWG HDMI cable requiredfor full 4K @ 60 Hz quality(Tripp Lite P568-Series)qPackage IncludesB122-000-4K6 HDMI SignalBoosterqOwner’s manualqSpecifications© 2020 Tripp Lite. All rights reserved. All product and company names are trademarks or registered trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them. Tripp Lite has a policy of continuous improvement. Specifications are subject to change without notice.Tripp Lite uses primary and third-party agencies to test its products for compliance with standards. See a list of Tripp Lite's testing agencies: https:///products/product-certification-agencies。
节省空间＋快速配线＋简单操作 台达HHI新品DIO扩充模块曝光
节省空间＋快速配线＋简单操作台达HHI新品DIO扩充模
块曝光
佚名
【期刊名称】《《可编程控制器与工厂自动化(PLC FA)》》
【年(卷),期】2007(000)009
【摘要】为了满足用户对技术上多方面的需求，经过台达研发团队严格的品质研发，一款节省空间、快速配线且简单操作的HMI新品——DIO扩充模块已于日前震撼上市! DIO扩充模块整合了显示、控制、操作三大方面的特点，除了可搭配全系列AE型号人机界面使用，还可依据不同应用场合的需求，提供14点
（8DI/6DO）及28点（16DI/12DO）两款不同扩充点数模块。
【总页数】1页(P27)
【正文语种】中文
【中图分类】TP274.2
【相关文献】
1.台达HMI新品DIO扩充模块 [J],
2.台达通讯模块新品助力智能建筑 [J], 无
3.台达HMI新品DIO扩充模块曝光 [J],
4.台达通讯模块新品助力智能建筑 [J],
5.台达AH系列底板专用光纤模块新品上市 [J],
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DIOLINE L-Bus 扩展模块（带16个数字输出端）
标识
型号
DL ‐LB ‐DO
产品编码 746401 应用范围
说明
DIOLINE L-Bus 扩展模块（带16个数字输出端）广泛应用于机车 总线接口
总线系统
模块类型
数据宽度
适用线缆
总线进线接头类型
总线出线接头类型
Lütze ‐Bus （Slave ）I/O 模块 2 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（母） 输出端
数量
输出电压
输出电流
通道类型
保护措施
外部保护
接通延时
关断延时
接线方式
16（1-8 电势A ，9-16 电势B ） DC 16.8-30 V 带防反接设计 环境温度<50°C ：每通道最大2A ，每组最大8A ，每模块最大16A 环境温度>50°C ：每通道最大1.25A ，每组最大5A ，每模块最大10A N-MOS FET 防错接 防短接 防过温 B10 额定7ms （包含CAN-电报处理时间） 额定8ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口
诊断
诊断显示说明 内部总线激活（LB A）LED 绿
内部总线错误（LB ERR）LED 红
输入端 16 LED 桔色DIOLINE L-Bus 扩展模块（带16个数字输出端）
US A，US B 2 LED 绿电源
OVL 2 LED 红过流
电势隔离
隔离电压 AC 1500 V 输出端和内部电路
AC 1500 V 电势A和电势B
技术参数
电压范围
电压波动
额定电流（U N时）
外形尺寸（宽x高x深） 重量（kg/个）
保护等级
安装方式
安装要求
工作温度
库存温度 DC 16.8 — 30V
最大10%
额定电流10mA
57.0x141.5x48.0 mm
0.200 kg/个
IP 20
卡轨式安装
安装所需空间：上面预留：5mm（安装用）
下面预留：5mm（安装用）
两边预留：0mm
-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °C
PE‐接头
插簧 6.3 mm × 0.8 mm
标准 机车用电子设备：EN 50155
电磁兼容：EN 50121-3-2
绝缘配合：EN 50124-1
震动和撞击：EN 61373
附件 EMV 屏蔽架组（产品编号：746894）
DIOLINE L-Bus 扩展模块（带16个数字输入端）
外形尺寸图
DIOLINE L-Bus 扩展模块（带16个数字输出端）
标识
型号
DL ‐LB ‐DO
产品编码 746412 应用范围
说明
带16个数字输出端DIOLINE L-Bus 扩展模块（输出端1-4和9-12可输出冗余数据），广泛应用于机车 总线接口
总线系统
模块类型
数据宽度
适用线缆
总线进线接头类型
总线出线接头类型
Lütze ‐Bus （Slave ）I/O 模块 2 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（母） 输出端
数量
输出电压
输出电流
通道类型
保护措施
外部保护
接通延时
关断延时
接线方式
16（1-8 电势A ，9-16 电势B ） DC 16.8-30 V 带防反接设计 环境温度<50°C ：每通道最大2A ，每组最大8A ，每模块最大16A 环境温度>50°C ：每通道最大1.25A ，每组最大5A ，每模块最大10A N-MOS FET 防错接 防短接 防过温 输出端1-4和9-12可适于冗余操作（二极管退耦） B10 额定7ms （包含CAN-电报处理时间） 额定8ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口
诊断
诊断显示说明 内部总线激活（LB A）LED 绿
内部总线错误（LB ERR）LED 红
输出端 16 LED 桔色DIOLINE L-Bus 扩展模块（带16个数字输出端）
US A，US B 2 LED 绿电源
OVL 2 LED 红过流
电势隔离
隔离电压 AC 1500 V 输出端和内部电路
AC 1500 V 电势A和电势B
技术参数
电压范围
电压波动
额定电流（U N时）
外形尺寸（宽x高x深） 重量（kg/个）
保护等级
安装方式
安装要求
工作温度
库存温度 DC 16.8 — 30V
最大10%
额定电流10mA
57.0x141.5x48.0 mm
0.200 kg/个
IP 20
卡轨式安装
安装所需空间：上面预留：5mm（安装用）
下面预留：5mm（安装用）
两边预留：0mm
-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °C
PE‐接头
插簧 6.3 mm × 0.8 mm
标准 机车用电子设备：EN 50155
电磁兼容：EN 50121-3-2
绝缘配合：EN 50124-1
震动和撞击：EN 61373
附件 EMV 屏蔽架组（产品编号：746894）
DIOLINE L-Bus 扩展模块（带16个数字输入端）
外形尺寸图
DIOLINE L-Bus 扩展模块（带6个继电器输出端）
标识
型号
DL ‐LB ‐DO
产品编码 746415 应用范围
说明
带6个继电器输出端DIOLINE L-Bus 扩展模块广泛应用于机车 总线接口
总线系统
模块类型
数据宽度
适用线缆
总线进线接头类型
总线出线接头类型
Lütze ‐Bus （Slave ）I/O 模块 1 Byte 输出端 十针扁带电缆 IDE10针接头（母） IDE10针接头（公） 输出端
数量
输出电压
输出电流
接通延时
关断延时
接线方式
6个触点继电器 DC 150 V ，AC 250 V DC150V ，阻性负载：DC0.4A DC 30V ，阻性负载：DC6A DC250V ，阻性负载：AC6A 额定28ms （包含CAN-电报处理时间） 额定12ms （包含CAN-电报处理时间） X1，X2 弹簧夹紧结构 每个10口 诊断
诊断显示说明 内部总线激活（LB A ）LED 绿
内部总线错误（LB ERR ）LED 红
输出端 16 LED 桔色
电势隔离
隔离电压
AC 1500 V 输出端和内部电路
AC 1500 V 通道和通道
DIOLINE L-Bus 扩展模块（带6个继电器输出端）技术参数
电压范围
电压波动
额定电流（U N时）
外形尺寸（宽x高x深） 重量（kg/个）
保护等级
安装方式
安装要求
工作温度
库存温度 DC 16.8 — 30V
最大10%
额定电流90mA
57.0x141.5x48.0 mm
0.300 kg/个
IP 20
卡轨式安装
安装所需空间：上面预留：5mm（安装用）
下面预留：5mm（安装用）
两边预留：0mm
-40°C — +70°C（+85°C 10 分钟）对应EN 50155 Tx 类-40 — 85 °C
PE‐接头
插簧 6.3 mm × 0.8 mm
标准 机车用电子设备：EN 50155
电磁兼容：EN 50121-3-2
绝缘配合：EN 50124-1
震动和撞击：EN 61373
附件 EMV 屏蔽架组（产品编号：746894）外形尺寸图。