MURC440中文资料
BOSCH MIC440防爆PTZ摄像机 说明书
MIC440 防爆系列摄像机旨在提供极其可靠、功能强大且高超品质的监控解决方案，非常适合对性能有着极高要求的安防应用领域。
该系列按照专业标准进行制造，符合 ATEX Directive 94/9/ EC Exd IIC T6、CSA Class 1, Division 1, Groups CD、Class 11, Division 1, Groups EFG 和 T6 标准的严格要求，能够在油气化工厂和石化炼油厂等易爆环境中安全地工作。
摄像机的铝质防护罩采用专门设计，符合业界领先的 IP68 标准，适合安装在极其苛刻的环境中。
另外，凭借视觉效果优异的平视窗口和集成的刮水器，即使在最严格的条件下，它也能确保拍摄清晰无比的图像。
这使得 MIC440 防爆系列摄像机可以在海上石油钻井平台等高腐蚀环境中正常运行。
采用高规格马达确保极其可靠的操作，而划时代的解析技术提供优异的准确性，允许用户进行 360° 的连续水平旋转和无可匹敌的 320° 俯仰控制。
作为一款真正的日夜两用型摄像机模块，它可以提供高达 36 倍的光学变焦和 12 倍数字变焦，同时结合灵活的竖直或倒挂安装功能，可在任何时候都能获得极佳的视场。
基本功能ATEX 和 CSA 认证符合 ATEX Directive 94/9/EC Exd IIC T6、CSA Class 1, Division 1, Groups CD、Class 11, Division 1, Groups EFG和 T6 标准的严格要求，能够在易爆环境中安全地工作符合业界领先的 IP68 标准MIC440 防爆系列摄像机不仅能有效防止灰尘的进入，而且还可以在水中浸没一段时间，是那些有着最苛刻要求的应用环境的绝佳之选。
集成刮水器凭借集成的刮水器，无论天气如何，MIC440 防爆系列摄像机一年四季都能捕获最高品质的图像。
证书与认可认证地区认证欧洲CE Sira Examination, Issue 8加拿大CSAATEX 认证Directive 94/9/EC Exd IIC T6CSA C/US Class 1, Division 1, Groups CDClass 11, Division 1, Groups EFGTemperature Code T6MIC440 防爆 PTZ 摄像机▶经认证符合 ATEX Directive 94/9/EC Exd IIC T6 的双光谱摄像装置▶CSA 和 Inmetro 认证▶业界领先的 IP68 和 NEMA4X 规格认证▶集成刮水器2安装/配置订购指南1 颜色B黑色2 配置U竖直安装3 协议P博世D Pelco P/DW Forward Vision4 刮水器1刮水器已安装5 加热器4无加热器6 隐私遮挡6无隐私遮挡7 摄像机变焦倍率1818:13636:18 视频标准P PALN NTSC技术规格摄像机模块图像感应器1/4 英寸 EXview CCD有效图元380 K NTSC / 440 K PAL（广角）水平清晰度470 电视线 NTSC/460 电视线PAL（广角）滤镜自动机械红外滤镜对焦系统自动或手动光圈自动或手动，具有慢快门集成模式同步内部 / 外部（垂直锁定）推荐照明100 至 100,000 lx信噪比50 dB 或更多逆光补偿 (BLC)开/关白平衡自动自动增益控制 (AGC)-3 至 +28 dB，每步 2 dB孔径控制16 步18 倍光学变焦模块镜头F=4.1 毫米（广角）至 73.8 毫米（远焦），F1.4- F3.0变焦18 倍光学（12 倍数字）视角48º（广角端）至 2.8º（远焦端）最低照度0.7 lux（F1.4, 1/60 秒 NTSC，1/50 秒 PAL），0.11 lux（F1.4, 1/4 秒 NTSC，1/3 秒 PAL），0.01 lux 或更低（F1.4，1/4 秒 NTSC，1/3 秒 PAL，ICR ON）快门速度1/1 至 1/10,000 秒（22 步）NTSC, PAL36 倍光学变焦模块镜头F=3.4 毫米（广角）至 122.4 毫米（远焦），F1.6 - F4.5变焦36 倍光学（12 倍数字）视角57.8º（广角端）至 1.7º（远焦端）最低照度 1.4 lux（1/60 秒 NTSC，1/50 秒 PAL），0.1 lux（1/4 秒 NTSC，1/3 秒 PAL），0.01 lux 或更低（1/4 秒 NTSC，1/3 秒 PAL，ICR ON）快门速度1/4 至 1/10,000 秒（20 步）NTSC，1/3 至1/10,000 秒（20 步）PAL操作*自动翻转是手动翻转是预置位64 个预置位（FV 协议，10 个摄像机预置位，允许 ANPR、色彩纠正等）预设巡视路线每个可以预设 6 条巡视路线，最多预设 32 条分区标题支持（64 个分区）每个标题最多允许包含 20 个字符预置位标题对于所有 64 个预置位，每个预置位均可以具有字符数不超过20 个的标题原始位置支持（预设 1 或巡视路线）3通信和协议通信RS485 / RS422控制协议提供博世、Pelco P/D 或 FV 协议摄像机。
MICROMASTER 440通用变频器
目录1 MICROMASTER 440 变频器的参数.................................................................... ................................... 1-1 1.1 MICROMASTER 440 变频器的系统参数.................简介.......................................................................1-2 1.2 快速调试(P0010=1)..... ................... ....................................................................................................1-4 1.3 命令和驱动数据组一概览........ ............. ......................... ......................................................................1-51.4 参数的说明......................................... .................................................................................................1-62 功能框图.............................................. .................................................................................................... 2-13 二进制互联连接（BiCo）功能................................................................................................................ 3-1 3.1 概述..................................................................................................................................................... 3-2 3.2 怎样进行BiCo 设置？......................................................................................................................... 3-2 3.3 BiCo 控制字和状态字的用法................................................................................................................. 3-43.4 BiCo 的连接............................................................ ............................................................................. 3-54 通讯....................................................................... .................................................................................. 4-1 4.1 采用的串行通讯接口............................................................................................................................ 4-2 4.2 串行通讯的工作情况............................ ................................................................................................. 4-2 4.2.1 概述.................................................................................................................................................... 4-2 4.2.2 RS485 的排障..................................................................................................................................... 4-3 4.3 采用通用的串行接口协议................................................................................ ................... ...................4-3 4.3.1 通讯报文的结构............................................................ ...................................................................... 4-4 4.3.2 USS 协议有关信息的详细说明........................................... .............................................................. 4-4 4.3.3 有效的数据字符.................................................................... .............................................................. 4-5 4.3.4 USS 的任务和应答.............................................................................................................................. 4-7 4.3.5 PKW 举例：..................................................................... .................................................................4-10 4.3.6 PZD 区域（过程数据区）................................................... .................................................................4-12 4.3.7 任务报文（主站→MICROMASTER4）................................................................................................4-12 4.3.8 应答报文（MICROMASTER4→主站）............................. ..................................................................4-13 4.3.9 MICROMASTER4 有关USS 通讯的参数设置.................. ..................................................................4-15 4.3.10 基本设定................................................................................................................... ........................4-16 4.3.11 一般的高级设置.................................................................................................................................4-16 4.3.12 较复杂的高级设置.............................................................................................................................4-17 4.3.13 与早期MICROMASTER 产品的兼容性....... . ...................................................................................4-17 4.3.14 读出和写入参数............................................... .................................................................................4-18 4.3.15 广播方式............................................................................................................................................4-19 4.3.16 通过USS 利用BiCo（二进制互联连接）...... . ....................................................................................4-19 4.4 PROFIBUS....................................................... . .................................................................................. 4-20 4.4.1 概况............................................................... . .................................................................................. 4-20 4.4.2 PROFIBUS 的使用........................................ .................................................................................... 4-20 4.5 PROFIBUS 模板............................................. . .................................................................................... 4-214.5.1 PROFIBUS 模板的特点................................. . .................................................................................. 4-215 高级操作板（AOP）..................................................... . .......................................................................... 5-1 5.1 警告和说明........................................................................ .................................................................... 5-4 5.1.1 特殊键的功能...................................................................................................................................... 5-4 5.2 应用举例............................................................................... . .............................................................. 5-5 5.2.1 采用AOP 控制单台变频器.......................................................... ....................................................... 5-55.2.2.3 网络控制－PC 方式.................................................................................................................... 5-7 5.2.3 参数的“读出”.............................................................. ................................................................. 5-8 5.2.4 参数的“下载”.................................................................. ............................................................... 5-9 5.2.5 AOP 的参数.................................................................... . ..................................................................5-10 5.2.6 从站方式和DriveMonitor 的操作................ . ....................................................................................5-10 5.2.7 MM3 参数的读出..................................... . .........................................................................................5-11 5.2.8 定时器的操作........................................... . .........................................................................................5-11 5.3 AOP 开始工作........................................................................................................................................5-14 5.3.1 接通电源和初始化............. . ...............................................................................................................5-14 5.3.2 语言文本的选择...................................... . ..........................................................................................5-15 5.3.3 开机“帮助”............................... . .....................................................................................................5-15 5.3.4 常规的操作屏幕.............................. . ..................................................................................................5-15 5.3.5 主菜单（机旁操作方式）.................................... . ..............................................................................5-16 5.3.6 请求等待................................................................ ............................................................................5-17 5.4 操作菜单................................................................................................................................................5-17 5.4.1 机旁操作方式下的操作........................................................................................................................5-17 5.4.1.1 通讯故障..........................................................................................................................................5-18 5.4.1.2 显示变频器的状态............... ............................................................................................................5-18 5.4.1.3 变频器类型的检验..................... ......................................................................................................5-18 5.4.2 主站方式下的操作................ . ............................................................................................................5-18 5.4.2.1 广播操作方式........................................... . .....................................................................................5-19 5.4.2.2 通讯故障..........................................................................................................................................5-19 5.5 选择操作方式.........................................................................................................................................5-19 5.5.1 机旁操作方式........................................................................................................... ......................... 5-20 5.5.2 主站方式................................................................................................................... ......................... 5-20 5.5.3 内部方式................................................................................................................... .........................5-20 5.5.4 从站方式.............................................................................................. ............................................. 5-20 5.5.5 PC 方式..................................................................................................... ........................................ 5-21 5.6 参数的访问............................................................................................................................................ 5-21 5.6.1 标准访问级的参数....................................................................... ...................................................... 5-21 5.6.2 功能键的使用................................................................................ .................................................... 5-22 5.6.2.1 屏幕显示滚动功能................................................................ .......................................................... 5-22 5.6.2.2 修改参数数值的某一位数字................................................ ............................................................ 5-22 5.6.2.3 跳转功能.......................................................................................................................................... 5-22 5.6.3 专家级参数................................................................................. ....................................................... 5-23 5.6.3.1 下标参数.............................................................................. ........................................................... 5-23 5.6.4 AOP 存储的参数组................................................................... ......................................................... 5-24 5.6.5 工程设计.................................................................................... ........................................................ 5-24 5.7 AOP 设定和组态.................................................................................................................................... 5-25 5.7.1 设定菜单..................................................................... ....................................................................... 5-25 5.7.1.1 背景亮度......................................................................................................................................... 5-25 5.7.1.2 屏幕对比度............................................................. ....................................................................... 5-26 5.7.1.3 用大字符显示.................................................................................................................................. 5-265.7.1.7 参数组的名称..................................................................................... ........................................... 5-27 5.7.1.8 设定时间/日期.......................................... ..................................................................................... 5-28 5.7.1.9 AOP 复位....................................................................................................................................... 5-28 5.8 故障指示............................................................................................................................................... 5-29 5.8.1 故障屏幕...................................................................................... ..................................................... 5-29 5.8.2 报警屏幕............................................................................................................................................ 5-30 5.8.3 多重故障................................................................................. .......................................................... 5-30 5.8.4 多重报警................................................................................. .......................................................... 5-30 5.8.5 故障和报警同时发生............................................................... .......................................................... 5-31 5.8.6 变频器的故障码....................................................................... ......................................................... 5-31 5.8.7 变频器的报警码........................................................................................ ........................................ 5-315.8.8 变频器的故障/ 报警记录（P0947）.............................................................................................. 5-316 编码器模板.............................................................................................................................................. 6-1 6.1 前言...................................................................................................................................................... 6-2 6.2 一般情况............................................................................................................................................... 6-3 6.3 安装...................................................................................................................................................... 6-4 6.3.1 准备工作................................................................................... ........................................................ 6-4 6.3.1.1 变频器的准备工作........................................................................................................................... 6-4 6.3.1.2 编码器模板的准备工作.......................................................... ......................................................... 6-5 6.3.2 接线方法的举例.................................................................................................................................. 6-8 6.4 调试................................................................................................................................................................. 6-9 6.4.1 TTL 编码器............................................................. ...........................................................................6-10 6.4.2 HTL 编码器................................................................... .....................................................................6-11 6.4.3 外接电源......................................................................... ...................................................................6-11 6.4.4 编码器模板的参数化........................................................ ..................................................................6-12 6.5 故障的排除............................................................................................................................................6-14 6.5.1 LED 指示灯............................................................ ...........................................................................6-14 6.5.2 故障码....................................................................... ........................................................................6-156.6 编码器模板的技术规格................................................... ......................................................................6-157 MICROMASTER 440 变频器的制动电阻..................................... ...........................................................7-1 7.1 技术数据...................................................................................... .........................................................7-2 7.2 安装.......................................................................................................................................................7-2 7.3 接线.......................................................................................................................................................7-2 7.4 制动电阻的接线和外形尺寸...................................................................................................................7-37.5 制动电阻的选型........................................................... .........................................................................7-48 选件安装图............................................................................................................................................... 8-1插图图4-1 典型的RS485 多站接口.................................................................................................................... 4-3 图4-2 通讯报文的结构................................................................................................................................. 4-4 图4-3 地址（ADR）的位号......................................................................................................................... 4-4图6-1 编码器模板的外观........................................................................................ .................................... 6-3 图6-2 变频器的铭牌........................................................................................................... ........................ 6-4 图6-3 选件的安装顺序........................................................................................................ ....................... 6-5图6-4 屏蔽接线端和PE 端子.......................................................................................... ......................... 6-5 图6-5 编码器模板上的LED 指示灯................................................................................. ......................... 6-6 图6-6 编码器模板的DIP 开关................................................................................................ .................... 6-7 图6-7 TTL 编码器的接线(5V DC) ................................................................................ ............................ 6-8 图6-8 HTL 编码器的接线(18V DC) .................................................................................. ........................ 6-8 图6-9 具有外接电源的编码器............................................................................................. ........................ 6-9 图6-10 编码器模板的安装方法....................................................................................... ............................ 6-9 图6-11 编码器模板上的LED 指示灯..........................................................................................................6-14表格表3-1 BiCo 的连接（r0019 至r0054）..................................... ................................................................. 3-5 表3-2 BiCo 的连接（r0055 至r1119）....................................... ............................................................. 3-6 表3-3 BiCo 的连接（r1170 至r2050）.......................................... .......................................................... 3-7 表3-4 BiCo 的连接（r2053 至r2294）............................................ ........................................................ 3-8 表4-1 任务识别标记ID 的定义............................................................ ....................................................... 4-7 表4-2 应答识别标记ID 的定义............................................................ ....................................................... 4-8 表4-3 对应答识别标记ID 的错误数值=“任务不能执行”的定义............... .................................................. 4-9 表4-4 PZD 区的结构..................................................................................... ..............................................4-12 表4-5 变频器的控制字（STW）................................................................ ................................................4-12 表4-6 变频器的状态字（PZD）.................................................................. ...............................................4-13 表4-7 实际例子........................................................................................ ....................................................4-14 表4-8 比较表（MICROMASTER4/早期生产的MIsCROMASTER 变频器）. ............................................4-18 表4-9 PROFIBUSSUB-D 插座的插针功能分配.............................................. ............................................ 4-23 表4-10 与数据传输速率相应的最大电缆长度................................................. ............................................ 4-23 表4-11 插头/座和电缆的订货号........................................................................ ............................. ........... 4-23 表4-12 技术数据.............................................................................................. ........................... .............. 4-24 表4-13 有关PROFIBUS 的订货资料................................................................... ...................................... 4-241 MICROMASTER 440 变频器的参数1.1 MICROMASTER 440 变频器的系统参数简介“参数说明”的编排格式如下。
SLC440COM安全光门产品说明书
DataOrdering dataProduct type description SLC440COM-ER-1530-30 Article number (order number)103003955EAN (European Article Number)4030661435343eCl@ss number, Version 9.027-27-27-04 CertificationsCertificates TÜV cULus EACGeneral dataProduct name SLC440COM Safety light curtainStandards EN 61496-1 EN 61496-2Enclosure material AluminiumGross weight2,300 gReaction time, maximum20 msGeneral data - FeaturesRestart interlock (manual reset)YesIntegral System Diagnostics, status YesIntegral System Diagnostics YesNumber of beams76Number of fail-safe digital outputs 2SLC440COM-ER-1530-30Safety appraisalStandards ISO 13849-1 EN 62061Performance Level eControl category to EN138494PFH-value8.05 x 10-9 /hSafety Integrity Level (SIL)3Mission Time20 Year(s)Safety type in accordance with IEC61496-14Mechanical dataDetection ability for test bodies at v =1.6 m/s30 mmRange, protection field, minimum300 mmRange, protection field, maximum10,000 mmHeight of the protection field1,530 mmWave length of the sensor880 nmMechanical data - Connection techniqueTerminal Connector ConnectorTerminal connector, Recipient Connector plug M12, 5-pole Terminal, Connector, Transmitter Connector plug M12, 4-pole Length of the connectable cable,maximum100 mMechanical data - DimensionsHeight of sensor1,571 mmLength of sensor33 mmWidth of sensor27.8 mmAmbient conditionsProtection class IP 67 to IEC/EN 60529 Ambient temperature, minimum-10 °CAmbient temperature, maximum+50 °CStorage and transport temperature,minimum-25 °CStorage and transport temperature,maximum+70 °CIIIElectrical dataVoltage type DC (direct current) Switching voltage OSSD, HIGH signal24 VElectrical power consumption of thereceiver, maximum10 WElectrical power consumption of thetransmitter, maximum5 WElectrical data - Fail-safe digital outputsOutput current, (fail-safe output),maximum0.25 AP-typeScope of deliveryIncluded in delivery Kit with 2 mounting angles AccessorySRB-E 301NotesNote (General)I<sub>m</sub> In case of failure (interruption of the 0 V supply) the maximum leakage current is 1 mA.Ordering codeProduct type description:SLC440COM-ER(1)-(2)(1)0330Protection field height 330 mm 0410Protection field height 410 mm 0490Protection field height 490 mm 0570Protection field height 570 mm 0650Protection field height 650 mm 0730Protection field height 730 mm 0810Protection field height 810 mm 0890Protection field height 890 mm 0970Protection field height 970 mm 1050Protection field height 1050 mm 1130Protection field height 1130 mm1210Protection field height 1210 mm1290Protection field height 1290 mm1370Protection field height 1370 mm1450Protection field height 1450 mm1530Protection field height 1530 mm (only for resolution 30 mm, 35 mm)1610Protection field height 1610 mm (only for resolution 30 mm, 35 mm)1690Protection field height 1690 mm (only for resolution 30 mm, 35 mm)1770Protection field height 1770 mm (only for resolution 30 mm, 35 mm)(2)14Resolution 14 mm (Range 0.3 …) 7 m30Resolution 30 mm (Range 0.3 …) 10 m35Resolution 35 mm (Range 0.3 …) 7 mPicturesProduct picture (catalogue individual photo)ID: kslc4f67| 66,6 kB | .png | 74.083 x 254.353 mm - 210 x 721Pixel - 72 dpi| 138,7 kB | .jpg | 23.223 x 79.756 mm - 320 x 1099Pixel - 350 dpi| 1.005,9 kB | .jpg | 352.778 x 1212.144 mm - 1000 x3436 Pixel - 72 dpi| 16,9 kB | .jpg | 79.728 x 273.756 mm - 226 x 776Pixel - 72 dpiDimensional drawing basic componentID: 5slc4g23| 196,0 kB | .jpg | 352.778 x 757.061 mm - 1000 x2146 Pixel - 72 dpi| 5,0 kB | .png | 74.083 x 158.75 mm - 210 x 450 Pixel- 72 dpi| 45,5 kB | .jpg | 112.889 x 242.006 mm - 320 x 686Pixel - 72 dpiK.A. Schmersal GmbH & Co. KG, Möddinghofe 3, D-42279 WuppertalThe details and data referred to have been carefully checked. Images may diverge from original. Further technical data can be found in the manual. Technical amendments and errors possible.Generated on 08.07.2020 17:15:50。
CM44中文技术资料
通信和数据处理 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 可靠性 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
通信规范参数 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
HART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PROFIBUS DP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modbus RS485 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modbus TCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Web 服务器 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 23 23 24 24
有源电流输出 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
西门子MM440使用大全
235 mm 9.25"
235 mm 9.25"
图 2-4 MICROMASTER 440 (A 至 F)的安装钻孔图
810 mm 31.89" with filter 1110 mm 43.70"
3ROMASTER 440 使用大全
2-7
安装 外形尺寸 FX
图 2-5 外形尺寸为 FX 的 MICROMASTER 440 变频器的安装钻孔尺寸
♦ 即使变频器处于不工作状态，以下端子仍然可能带有危险电压： - 电源端子 L/L1，N/L2，L3。 - 连接电动机的端子 U，V，W
♦ - 此外，还有端子：DC+/B+，DC-，B-和 DC/R+ ♦ 在电源开关断开以后，必须等待 5 分钟，使变频器放电完毕，才允许开始安装作业 ♦ 本设备不可作为‘紧急停车机构’使用 (参看 EN 60204，9.2.5.4) ♦ 接地导体的最小截面积必须等于或大于供电电源电缆的截面积 ♦ 如果卸下了前面的盖板(仅指外形尺寸为 FX 和 GX 的 MM440 变频器)，风机的叶片便
上部和下部：350 mm
> 外形尺寸为 FX 和 GX 时
上部： 250 mm
下部： 150 mm
前面： 100 mm 在变频器的附近不要安装有对冷却空气流通造成负面影响的其它设备。确认变频器的冷却风口处 于正确的位置，不妨碍空气的流通。
2.3 机械安装
警告
♦ 为了保证变频器的安全运行，必须由经过认证合格的人员进行安装和调试，这 些人员 应完全按照本操作说明书在下面提出的警告进行操作。
安装和冷却 注意 变频器不得卧式安装（水平位置）。
变频器可以一个挨一个地并排安装，中间不需要空隙。当一台变频器安装在另一台变频器之上 时，必须保证规定的环境条件。因此，至少要留有下面规定的间隙：
MURC1515中文资料
SENSITRONSEMICONDUCTORMURC1510-MURC1560Technical DataData Sheet 4861, Rev.-MURC1510-MURC1560 Ultrafast Silicon DieApplications:• Switching Power Supply • General Purpose • Free-Wheeling Diodes • Polarity Protection DiodeFeatures:• Glass-Passivated• Epitaxial Construction.• Low Reverse Leakage Current • High Surge Current Capability • Low Forward Voltage Drop• Fast Reverse-Recovery BehaviorMaximum Ratings:Characteristics Symbol MURC 1510 MURC 1515 MURC 1520 MURC1540MURC 1560 Unit Peak Inverse Voltage V RWM 100 150 200 400 600 V Average Rectified Forward Current(Rated V R )I F(AV) 15 @ T C = 150°C 15 @ T C = 145°C A Peak Rectified ForwardCurrent(Rated V R , Square Wave, 20 kHz)I FRM30 @ T C = 150°C30 @ T C = 145°CAMax. Peak One Cycle Non-Repetitive Surge Current8.3 ms, half Sine pulseI FSM 200 150 AOperating JunctionTemperature and Storage TemperatureT J, T stg -65 to +175 °CElectrical Characteristics:Characteristics Symbol MURC 1510 MURC 1515 MURC 1520 MURC1540MURC1560UnitMax. Instantaneous Forward Voltage (Note1)(I F = 15 Amp, T J = 150 °C) (I F = 15 Amp, T J = 25 °C)V F0.85 1.05 1.12 1.25 1.20 1.50 V Max. Instantaneous Reverse Current (Note1)(Rated DC Voltage, T C = 150 °C) (Rated DC Voltage, T C = 25 °C) I R 500 10500 10 1000 10 µAMax. Junction Capacitance @V R = 5V, T C = 25 °Cf SIG = 1MHz, V SIG = 50mV (p-p) C T 240 pF Max Reverse Recovery Time (I F = 1.0 Amp, di/dt = 50 A/µs)(I F = 0.5 Amp, I R = 1.0 A, I REC =0.25A)t rr352560 50nS1. Pulse Test: Pulse Width = 300µs, Duty Cycle ≤2%SENSITRONSEMICONDUCTORMURC1510-MURC1560Data Sheet 4861, Rev.- Dimensions in inches (mm)Bottom side metalization:Ti/Ni/Ag - 30 kÅ minimum.Top side metalization:Al - 25 kÅ minimum or Ti/Ni/Ag - 30 kÅ minimum Bottom side is cathode, top side is anode.Die typeArea (mil 2) DimensionA (1)Inch (millimeter) Dimension B (1) Inch (millimeter)Dimension C (2) Inch (millimeter) Si p-n die 120 x 120 0.120 (3.048) 0.094 (2.388) 0.010 (0.254)(1)Tolerance is ± 0.003” (0.076 mm) (2)Tolerance is ± 0.001” (0.025 mm)DISCLAIMER:1- The information given herein, including the specifications and dimensions, is subject to change without prior notice to improve product characteristics. Before ordering, purchasers are advised to contact the Sensitron Semiconductor sales department for the latest version of the datasheet(s).2- In cases where extremely high reliability is required (such as use in nuclear power control, aerospace and aviation, traffic equipment, medical equipment , and safety equipment) , safety should be ensured by using semiconductor devices that feature assured safety or by means of users’fail-safe precautions or other arrangement .3- In no event shall Sensitron Semiconductor be liable for any damages that may result from an accident or any other cause during operation of the user’s units according to the datasheet(s). Sensitron Semiconductor assumes no responsibility for any intellectual property claims or any other problems that may result from applications of information, products or circuits described in the datasheets.4- In no event shall Sensitron Semiconductor be liable for any failure in a semiconductor device or any secondary damage resulting from use at a value exceeding the absolute maximum rating.5- No license is granted by the datasheet(s) under any patents or other rights of any third party or Sensitron Semiconductor.6- The datasheet(s) may not be reproduced or duplicated, in any form, in whole or part, without the expressed written permission of Sensitron Semiconductor.7- The products (technologies) described in the datasheet(s) are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety nor are they to be applied to that purpose by their direct purchasers or any third party. When exporting these products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations.SENSITRONMURC1510-MURC1560 SEMICONDUCTORData Sheet 4861, Rev.-MURC1510, MURC1515, MURC1520SENSITRONMURC1510-MURC1560 SEMICONDUCTORData Sheet 4861, Rev.-MURC1540SENSITRONMURC1510-MURC1560 SEMICONDUCTORData Sheet 4861, Rev.-MURC1560SENSITRONMURC1510-MURC1560 SEMICONDUCTORData Sheet 4861, Rev.-MURC1510, MURC1515, MURC1520, MURC1540, MURC1560。
MM440_[Chinese]
![MM440_[Chinese]](https://img.taocdn.com/s3/m/4755b49cdd88d0d233d46ac2.png)
矢 量 型
MM440
Standard Drives A&D SD
A&D SD PRODUCT 4
1
MICROMASTER 440 - 技 术 性 能 概 要
有 A, B, C, D, E, F 六 种 外 形 结 构 的 机 壳 输 出 功 率 可 达 75 kW (恒 力 矩 )或 90 kW ( 变 力 矩) 矢 量 控 制 (无 编 码 器 ) 6 DI, 2 AI, 3 DO (继 电 器 ), 2 AO 集成的制动斩波器 恒 力 矩 方 式 下 过 载 能 力 为 200% 额 定 电 流 ，持 续 时 间 3 秒； 150% 额 定 电 流 ，持 续 时 间 60 秒；过 载 间 隔 时 间 5 分 钟 集 成 的 高 性 能 PID 控 制 器 (参 数 自 动 整 定 ) 通 过 了 CE, UL, CUL和 c-tick 的 认 证 防 护 等 级 为 IP20 / NEMA 1 输 出 频 率 0 - 650Hz 直流制动和复合制动功能 工 作 环 境 温 度 -10°C to 50°C 内 部 互 连 采 用 BiCo 技 术
Standard Drives A&D SD
A&D SD PRODUCT 4
6
MICROMASTER 440
矢量控制
输出频率 输 出 频 率 不 超 过 200 Hz ( V/ ｆ工 作 方 式 时 可 达 650 Hz)
具有磁通监控的完整电动机模型 甚 至 在 频 率 < 2 Hz 和反 转 时 也 有 优 良 的 力 矩 输 出 特 性
电 动 机 识 别 程序 监 测 电 动 机 的 全 部 电 抗 ,实 现 可 靠 的 闭 环 控 制[或 :调 节]
THFCSM-1型实训指导书
目录第一章西门子通用型变频器MM440概述 (2)第二章实训项目 (4)一、三相异步电动机控制实训 (4)实训一三相异步电动机点动控制和自锁控制 (4)实训二三相异步电机联锁正反转控制 (6)实训三三相异步电动机的顺序控制 (8)二、变频调速技能实训 (10)实训一变频器功能参数设置与操作实训 (10)实训二多段速度选择变频调速实训 (15)实训三外部端子点动控制 (17)实训四变频器无级调速 (19)实训五变频器控制电机正反转 (21)实训六外部模拟量（电压/电流）方式的变频调速控制 (23)实训七 PID变频调速控制 (25)第一章西门子通用型变频器MM440概述1.MICROMASTER 440 通用型变频器MICROMASTER 440 是适合用于三相电动机速度控制和转矩控制的变频器系列。
本变频器由微处理器控制并采用具有现代先进技术水平的绝缘栅双极型晶体管IGBT 作为功率输出器件。
因此，它们具有很高的运行可靠性和功能的多样性其脉冲宽度调制的开关频率是可选的，因而降低了电动机运行的噪声。
全面而完善的保护功能为变频器和电动机提供了良好的保护。
MICROMASTER440 变频器具有缺省的工厂设置参数时，它是为简单电动机变速驱动系统供电的理想变频驱动装置。
由于MICROMASTER440 具有全面而完善的控制功能，在设置相关参数以后，它也适合用于需要多种功能的电动机控制系统。
MICROMASTER 440 既可用于单机驱动系统，也可集成到“自动化系统”中。
2.特点2.1主要特性易于安装易于调试牢固的EMC 设计可由IT 中性点不接地电源供电对控制信号的响应是快速和可重复的参数设置的范围很广确保它可对广泛的应用对象进行配置电缆连接简便具有多个继电器输出具有多个模拟量输出0 - 20mA6 个带隔离的数字输入并可切换为NPN/PNP 接线2 个模拟输入♦AIN1 0 - 10 V 0 - 20mA 和-10 至 +10 V♦AIN2 0 - 10 V 0 - 20mA2 个模拟输入可以作为第7 和第8 个数字输入BiCo 二进制互联连接技术模块化设计配置非常灵活脉宽调制的频率高因而电动机运行的噪音低内置的RS485 串行通讯接口详尽的变频器状态信息和全面的信息功能2.2性能特征矢量控制♦无传感器矢量控制 (SLVC)♦带编码器的矢量控制 (VC)V/f 控制♦磁通电流控制 (FCC) 改善了动态响应和电动机的控制特性♦多点 V/f 特性自动再起动捕捉再起动滑差补偿快速电流限制 (FCL)功能避免运行中不应有的跳闸电动机的抱闸制动内置的直流注入制动复合制动功能改善了制动特性供电阻制动(动力制动)用的内置制动单元(仅限外形尺寸为A 至F 的MM440 变频器)设定值输入:♦模拟输入♦串行通讯接口♦点动(JOG) 功能♦电动电位计♦固定频率设定值斜坡函数发生器♦起始和结束段带平滑圆弧♦起始和结束段不带平滑圆弧具有比例积分和微分特性的 PID 控制器各组参数的设定值可以相互切换♦电动机数据组 (DDS)♦命令数据组和设定值信号源 (CDS)自由功能块直流回路电压控制器动力制动的缓冲功能定位控制的斜坡下降曲线2.3保护特性过电压 / 欠电压保护变频器过热保护接地故障保护短路保护I2t 电动机过热保护PTC / KTY84 温度传感器的电动机保护使用注意事项：1.防止触电：当通电或正在运行时，请不要打开前盖板；不要用湿手操作变频器。
PowerPC 440中文资料
The PowerPC® 440 Core A high-performance, superscalar processor core for embedded applicationsIBM Microelectronics DivisionResearch Triangle Park, NC09/21/1999OverviewThe PowerPC 440 CPU core is the latest addition to IBM’s family of 32-bit RISC PowerPC embedded processor cores. The PPC440’s high-speed, superscalar design and Book E Enhanced PowerPC Architecture™ put it at the leading edge for high performance system-on-a-chip (SOC) designs. The PPC440 core marries the performance and features of standalone microprocessors with the flexibility, low power, and modularity of embedded CPU cores.Target ApplicationsThe PPC440 Core is primarily designed for applications in which maximum performance and extensive peripheral integration are the critical selection criteria.Target market segments for the PPC440 core include:•Consumer applications including digital cameras, video games, set-top boxes, and internet appliances •Office automation products such as laser printers, thin-client systems, and sub-notebooks •Storage and networking products such as RAID controllers, routers, ATM switches, cellular basestations, and network cardsFeatures•2-way superscalar design•Out-of-order issue, execution, and completion•Dynamic branch prediction•Single-cycle branch latency•Three execution pipelines•Single-cycle throughput on 32x32 multiply•24 DSP operations (16x16+32->32, MAC with single-cycle throughput)•Real-time non-invasive instruction traceTypical ApplicationA typical system on a chip design with the PPC440 Core uses the CoreConnect TM bus structure for system level communication. High bandwidth peripherals and the PPC440 core communicate with one another over the processor local bus (PLB). Less demanding peripherals share the on-chip peripheral bus (OPB) and communicate to the PLB through the OPB Bridge. The PLB and OPB provide common interfaces for peripherals and enable quick turnaround, custom solutions for high volume applications.F igure 1 shows an example PPC440 Core-based system on a chip, illustrating the two-level bus structure and modular core-based design.Figure 1. Example PPC440 Core + ASIC SpecificationsPerformance (Dhrystone 2.1)1000 MIPS @ 555MHz (est.), Nominal silicon, 1.8V, 55°C 720 MIPS @ 400MHz (est.), Slow silicon, 1.65V, 85°CFrequency0 – 400MHz , Slow silicon, 1.65V, 85°C555MHz nominalPower Dissipation 2.5mW / MHz @ 1.8V (est.), hard core with 32KI / 32KD cachesArchitecture32-bit PowerPC Book E compliant, application code compatible withall PowerPC processorsDie Size 4.0 mm2 for CPU only (est.)Caches0-64KB, 32-way to 128-way associativeTechnology0.18 µm CMOS copper technology0.12 µm L eff , 4 levels of metalPower Supply 1.8 VoltsTransistors 5.5M, hard core with 32KI / 32KD cachesOperating Range-40°C to 125°C, 1.6V to 1.9VData Bandwidth Up to 6.4 GB/sec via three 128-bit, 200MHz CoreConnect businterfacesTable 1- 440 CPU Core SpecificationsEmbedded Design SupportThe PPC440 Core, as a member of the PowerPC 400 Family, is supported by the IBM PowerPC Embedded Tools TM program, in which over 80 third party vendors have combined with IBM to provide a complete tools solution. Development tools for the PPC440 include C/C++ compilers, debuggers, bus functional models, hardware/software co-simulation environments, and real-time operating systems. As part of the tools program, IBM maintains a complete set of development tools by offering the High C/C++ Compiler, RISCWatch TM debugger with RISCTrace TM trace interface, VHDL and Verilog simulation models and a PPC440 Core Superstructure development kit.PPC440 CPU Core OrganizationPPC440 CPUThe PPC440 CPU operates on instructions in a dual issue, seven stage pipeline, capable of dispatching two instructions per clock to multiple execution units and to optional Auxiliary Processor Units (APUs). The PPC440 core is shown in Figure 2.Figure 2 - PPC440 Core Block DiagramThe pipeline contains the following stages, as shown in Figure 3:1.IFTH – Fetch instructions from instruction cache2.PDCD – Pre-decode; partial instruction decode3.DISS – Decode/Issue; final decode and issue to units4.RACC – Register Access; read from multi-ported General Purpose Register (GPR) file5.EXE1/AGEN – Execute stage 1; complete simple arithmetics, generate load/store address6.EXE2/CRD – Execute stage 2; multiplex in results from units in preparation for writing into GPRfile, Data Cache access7.WB – Writeback; write results into GPR file from integer operation or load operationFigure 3 - PPC440 CPU PipelineInstruction Fetch and Pre-decodeDuring the Instruction Fetch stage (IFTH), an entire cache line (eight words) is read into the instruction cache line read buffer. From there, the next two instructions in the pre-decode buffers PDCD0 and PDCD1 during the PDCD stage. The instruction cache is virtually indexed and tagged, and translation is performed in parallel with the cache access.Branch UnitThe PPC440 uses a Branch History Table (BHT) to maintain dynamic branch prediction of conditional branches. To perform dynamic branch prediction, a 2-bit counter in the BHT is used to decide whether prediction should agree or disagree with the normal PowerPC static branch prediction. The counter counts up if branch determination agrees, and down if it disagrees. Once the counter saturates, it can only count away from saturation. Therefore, four valid states exist: “Strongly agree”, “Agree”, “Disagree”, and “Strongly disagree”. By agreeing or disagreeing with static branch prediction, different branches can use the same counter in the BHT and have opposite static predictions, without the machine necessarily mispredicting a branch.The Branch Target Address Cache (BTAC) is used to predict branches and deliver their target addresses before the instruction cache can deliver the same data. It is accessed during IFTH, whereas normal branch prediction would not occur until PDCD, and therefore avoids a one cycle penalty. The BTAC is made up of an odd and even BTAC containing eight entries each. Only unconditional branches and bdnzinstructions are stored, which gives a significant performance boost while keeping the design straightforward.Decode and IssueThe four-entry decode queue accepts up to two instructions per clock submitted from the pre-decode buffers. Instructions always enter the lowest empty or emptying queue position, behind any instructions already in the queue. Therefore, the queue fills from the bottom up, instructions stay in order, and no bubbles exist in the queue. A significant portion of decode is performed in the lowest two positions (DISS0 and DISS1). Up to two instructions exit the queue based on the instructions’ decode and pipeline availability, and are issued to the RACC stage. DISS1 can issue out of order with respect to DISS0. Register AccessConceptually, the GPR file consists of thirty-two, 32-bit general purpose registers. It is implemented as two 6-port arrays, (one array for LRACC, one for IRACC) each with thirty-two, 32-bit registers containing three write ports and three read ports. On all GPR updating instructions, the appropriate GPR write ports will be written in order to keep the contents of the files the same. On GPR reads, however, the GPR read ports are dedicated to instructions that are dispatched to a RACC’s associated pipe(s). Execution PipelinesThe PPC440 contains three execution pipes: a load/store pipe (“L-pipe”), a simple integer pipe (“J-pipe”), and a complex integer pipe (“I-pipe”). The L-pipe and J-pipe instructions are dispatched from the LRACC; I-pipe instructions are dispatched from IRACC. The three pipes together perform all 32-bit PowerPC integer instructions in hardware compliant with the PowerPC Book E specification. Table 2 lists the rules for dispatching to each of the three execution pipes.L-pipe only Loads/stores1, cache instructions, mbar, msyncI-pipe or J-pipe2Add, addi, addis, and, andc, cntlzw, eqv, extsb, extsh, nand, neg, nor, or, orc, ori, oris, xori, xoris, rlwimi, rlwinm, rlwnm, slw, srw, subfI-pipe only Branches, multiplies, divides, move to/from DCR/SPR, indirect XER updates,indirect LR/CTR updates, indirect CR updates, CR-logicals, MAC instructions,mcrf, mcrxr, mtcrf, mfcr, compares, dlmzb, isync, rfi, rfci, sc, wrtee, wrteei,mtmsr, mfmsr, trapsTable 2 – Rules for Instruction IssueThe MAC unit is an auxiliary processor unit (APU) which adds 24 operations to the PPC440 instruction set. MAC instructions operate on either signed or unsigned 16 bit operands and accumulate the results in a 32-bit GPR. All MAC unit instructions have single cycle throughput. The MAC unit is contained within the I-pipe.1 The stwcx. instruction goes down both the L-pipe as well as the I-pipe, in order to update the CR.2 Instructions which update the CR or XER are not issued to the J-pipe.Instruction and Data CachesProcessor Local Bus (PLB) Memory AccessThe PPC440 has three independent 128-bit Processor Local Bus (PLB) master interfaces, one for instruction fetches, one for data reads, and a third for data writes. Memory accesses are performed through the PLB interfaces to/from the instruction cache (I-Cache) or data cache (D-Cache) units. Having three independent bus interfaces for the cache units provides maximum flexibility for designs to optimize system throughput. Memory accesses (loads/stores) which hit in the cache achieve single-cycle throughput.Cache ConfigurationThe PPC440 has separate instruction and data caches with 8 word (32 byte) cache lines. Instruction and data cache sizes are factory-configurable to any combination of 0KB, 8KB, 16KB, 32KB, or 64KB cache sizes. Configurable cache sizes provide designers with a parameter for optimizing the PPC440 to a desired price-performance for a particular application. The caches are highly associative, with associativity varying with cache size as shown in Table 3. High associativity enables advanced cache functions such as locking and transient memory regions (see “Cache Partitioning” below).Cache Size Ways8 KB3216KB6432KB6464KB128Table 3 – Number of Ways for Different PPC440 Cache SizesThe cache arrays are non-blocking. Non-blocking caches allow the PPC440 to overlap execution ofload/store instructions while instruction fetches take place over the PLB. The caches, therefore, continue supplying data and instructions without interruption to the pipeline. The PPC440 replaces cache lines according to a round-robin replacement policy.The initial PPC440A4 core offering will include a 32KB instruction cache and 32KB data cache. These caches are physically constructed using two, 16KB CAMRAM macros, each consisting of 8, 2KB sub-banks (or “sets”). This organization facilities low-power operation and fast hit/miss determination. Cache PartitioningThe PPC440 caches have the ability to be separated into “normal”, “transient”, and “locked” regions. Normal regions are what is traditionally thought of regarding cache replacement. Transient regions are used for data that is used temporarily and then not needed again, such as the data in a particular JPEG image. A separate transient region avoids castouts of more commonly accessed code in the normal region. The locked region is for code that is not to be cast out of the cache, and is the resulting region not included in the normal and transient regions. The regions are set via “victim” ceiling and floor pointers, as shown in Figure 4. Figure 4 shows two examples of cache partitioning, the left side shows separate transient and normal regions, and the right side shows part of the normal region overlapping with the transient region. The normal ceiling is defined as the top of the cache.Figure 4 – Two Examples of Cache PartitioningI-Cache Speculative Pre-fetchingThe I-Cache utilizes a programmable speculative pre-fetch mechanism to enhance performance. Software can enable up to three additional lines to be speculatively pre-fetched, using a burst protocol, upon any instruction cache miss. When this mode is enabled, the I-Cache controller will automatically inspect the I-Cache on a miss to see if any of up to the next three lines are also misses. If so, the hardware will present a burst request to the PLB immediately after the original line fill request. This speculative burst request takes advantage of the throughput capability of standard memory architectures such as SDRAM and brings in anticipated subsequent instructions after a miss. Furthermore, if the instruction stream branches away from the lines which are being speculatively filled, the burst request which is filling the speculative lines can be abandoned in the middle, and a new fill request at the branch target location immediately initiated. There is a programmable "threshold" to determine when to abandon a speculative line fill that may have been in progress at the time of a branch redirection. This threshold designates how many doublewords of the speculative cache line must be received to not abandon a current line fill. In this fashion, the speculative pre-fetch mechanism can be carefully tailored to provide optimum performance for specific applications and memory subsystems.D-Cache Line FillsThe D-Cache contains three line fill buffers and can queue up to four load misses to three separate cache lines. The PPC440 will then execute past these load misses, until the queue is full or the pipes are held waiting for a load value. The D-Cache controller places the target word on the bypass path as the fill buffer captures data words off the PLB. Additional requests of the cache line held in the fill buffer are also forwarded directly to the operand registers in the execute unit.D-Cache Non-cacheable Store GatheringThe D-Cache “gathers” up to 16 bytes for non-cacheable, write-through, and w/o allocate stores, and will burst the quadword to the PLB for fast writes to non-cacheable memory.D-Cache Write-Back and Write-Through ModesThe D-Cache supports write-back or write-through mode. In write-back mode, store hits are written to the cache and not to main memory. Main memory is later modified if and when the line is flushed from the cache. In write-through mode, the data cache controller writes main memory for store misses as well asstore hits; every store operation generates a PLB write request. (Although write-through requests to non-cacheable memory can be gathered as previously mentioned).D-Cache Store AllocationThe D-Cache can be programmed whether or not to allocate a line on a D-Cache store miss. Write-on-allocate is enabled by default. In this mode, a store miss to cacheable memory forces the data cache controller to allocate a line in the data cache and generate a line fill. In contrast, when “without allocate”is enabled, a store miss to cacheable memory will not allocate a line data cache and will simply write the data to memory.Big Endian and Little Endian SupportThe PPC440 supports big endian or little endian byte ordering for instructions and data stored in external memory. The PowerPC Book E architecture is endian neutral; each page in memory can be configured for big or little endian byte ordering via a storage attribute contained in the TLB entry for that region. Strapping signals on the PPC440 core initialize the beginning TLB entry’s endian attribute, so thePPC440 can boot from little or big endian memory.Memory Management Unit (MMU)The MMU supports multiple page sizes as well as a variety of storage protection attributes and access control options. Multiple page sizes improve TLB efficiency and minimize the number of TLB misses. The PPC440 gives programmers the flexibility to have any combination of the following eight possible page sizes in the translation look-aside buffer (TLB) simultaneously: 1KB, 4KB, 16KB, 64KB, 256KB,1MB, 16MB and 256MB. Having an extremely large page size allows users to define system memory with a minimal number of TLB entries, thereby simplifying TLB allocation and replacement. Small page sizes prevent the wasting of memory when allocating small areas of data.Each page of memory is accompanied by a set of storage attributes. These attributes include cacheability, write through/write back mode, big/little endian, guarded and four user-defined attributes. The user-defined attributes can be used to mark a memory page with an application-specific meaning. The guarded attribute controls speculative accesses. The big/little endian attribute marks a memory page as having big or little endian byte ordering. Write through/write back specifies whether memory is updated in addition to the cache during store operations.Two of the user-defined storage attributes can be programmed for special functions inside the core. One can be enabled to designate normal or transient cache regions. Another can be enabled to control whether or not store misses allocate a line in the D-Cache.Access control bits in the TLB entries enable system software to control read, write, and execute access for programs in both user and supervisor states.The MMU includes a 64-entry fully-associative unified TLB to reduce the overhead of address translation. Contention for the main TLB between data address and instruction address translation is minimized through the use of a four-entry instruction shadow TLB (ITLB) and an eight-entry data shadow TLB (DTLB). The ITLB and DTLB shadow the most recently used entries in the unified TLB. The MMU manages the replacement strategy of the ITLB and DTLB leaving the unified TLB to software control. Real-time operating systems are free to implement their own replacement algorithm for the unified TLB.Interrupt Handling LogicThe PPC440 services exceptions generated by error conditions, the internal timer facilities, debug events, and the external interrupt controller (EIC) interface. Altogether, there are sixteen different interrupt types supported.Interrupts are divided into two classes, critical and non-critical. Each class of interrupt has its own pair of save/restore registers for holding the program counter and machine state. Separate save/restore registers allow the PPC440 to quickly handle critical interrupts even within a non-critical interrupt handler. When an interrupt is taken, the PPC440 automatically writes the program counter and machine state to save/restore register SRR0 and SRR1 respectively for non-critical interrupts, or CSRR0 and CSRR1 respectively for critical interrupts. The machine status and program counter are automatically restored at the end of an exception handler when the return from interrupt (rfi) or return from critical interrupt (rfci) instruction is executed.TimersThe PPC440 contains a 64-bit time base and three timers: the Decrementer (DEC), the Fixed Interval Timer (FIT), and the WatchDog Timer (WDT). The time base counter increments synchronously with the CPU clock or an external clock source. The three timers are synchronous with the time base.The DEC is a 32-bit register that decrements at the time base increment rate. The user loads the DEC register with a value to create the desired delay. When the register reaches zero, the timer stops decrementing and generates a decrementer interrupt. Optionally, the DEC can be programmed to auto-reload the value last written to the DEC auto-reload register, after which the DEC continues to decrement.The FIT generates periodic interrupts based on one of four selectable bits in the time base. When the selected bit changes from 0 to 1, the PPC440 generates a FIT exception.The watchdog timer provides a periodic critical-class interrupt based on a selected bit in the time base. This interrupt can be used for system error recovery in the event of software or system lockups. Users may select one of four time periods for the interval and the type of reset generated if the watchdog timer expires twice without an intervening clear from software. If enabled, the watchdog timer generates a reset unless an exception handler updates the watchdog timer status bit before the timer has completed two of the selected timer intervals.Debug LogicAll architected resources on the PPC440 can be accessed through the debug logic. Upon a debug event, the PPC440 provides debug information to an external debug tool. Three different types of tools are supported depending on the debug mode: ROM Monitors, JTAG debuggers and instruction trace tools. Internal Debug ModeIn internal debug mode, a debug event enables exception-handling software at a dedicated interrupt vector to take over the PPC440 and communicate with a debug tool. Exception-handling software has read-write access to all registers and can set hardware or software breakpoints. ROM monitors typically use the internal debug mode.External Debug ModeIn external debug mode, the PPC440 enters stop state (i.e., stops instruction execution) when a debug event occurs. This mode offers a debug tool non-invasive read-write access to all registers in the PPC440 via the JTAG interface. Once the PPC440 is in stop state, the debug tool can start the PPC440, step an instruction, freeze the timers or set hardware or software break points. In addition to PPC440 control, the debug logic is capable of writing instructions into the instruction cache, eliminating the need for external memory during initial board bring up.Debug Wait ModeDebug wait mode offers the same functionality as external debug mode with one difference; in debug wait mode, the PPC440 will respond to interrupts and temporarily leave stop state to service them before returning to debug wait mode. In external debug mode, by contrast, interrupts are disabled while in stop state. Debug wait mode is particularly useful when debugging real-time control systems.Real-Time Trace Debug ModeIn real-time trace debug mode, instruction trace information is continuously broadcast to the trace port. When a debug event occurs, an external debug tool saves instruction trace information before and after the event. The number of traced instructions depends only on the memory buffer depth of the trace tool. Debug EventsDebug events signal the debug logic to either stop the PPC440, put the PPC440 in debug wait state, cause a debug exception, or save instruction trace information, depending on the debug mode. Table 4 on the following page lists the possible debug events and their description.Debug Event DescriptionBranch Taken A Branch Taken debug event occurs prior to the execution ofa taken branch instruction.Instruction Completion The Instruction Completion debug event occurs after thecompletion of any instruction.Return from Interrupt The Return From Interrupt debug event occurs after thecompletion of an rfi or rfci instruction.Interrupt The Interrupt debug event occurs after an interrupt is taken. Trap The Trap debug event occurs prior to the execution of a trapinstruction, where the trap condition is met.Instruction Address Compare (IAC)The IAC debug event occurs prior to the execution of aninstruction at an address that matches the contents of one offour IAC registers (IAC1, IAC2, IAC3, and IAC4).Alternatively, the registers can be combined to cause an IACdebug event prior to the execution of an instruction at anaddress contained in one of the following ranges as specifiedby the four IAC registers:IAC1 <= range < IAC2 (inclusive),IAC3 <= range < IAC4 (inclusive),range low < IAC1 < IAC2 <= range high (exclusive), orrange low < IAC3 < IAC4 <= range high (exclusive).Data Address Compare (DAC)The DAC debug event occurs prior to the execution of aninstruction that accesses a data address matching the contentsof one of the two DAC registers (DAC1 and DAC2).Alternatively, the registers can be combined to cause a DACdebug event occurs prior to the execution of an instructionthat accesses a data address within one of the followingranges specified by the two DAC registers:DAC1 <= range < DAC2 (inclusive), orrange low < DAC1 < DAC2 <= range high (exclusive). Data Value Compare (DVC)The Data Value Compare debug event occurs prior to theexecution of an instruction that accesses a data addressmatching one of the two DAC registers (or within a DACrange) and containing a particular data value as specified byone of the two DVC registers. The DVC debug event mayoccur when a selected data byte, half-word or word matchesthe corresponding element in DVC1 or DVC2. Unconditional Event An unconditional debug event is set by a debug tool throughthe JTAG port or by ASIC logic external to the PPC440.Table 4 - Debug EventsPower ManagementThe PPC440 core, in keeping with the IBM PowerPC 400 family tradition, utilizes aggressive power management techniques for minimizing power. The PPC440 utilizes three key techniques: redundant operand registers, half-cycle latch stabilization, and dynamic clock gating.Redundant Operand RegistersRedundant operand registers are used at various pipeline stages for feeding operands to each of the execution units. This saves power by preventing unused units from seeing the operand values being used by other units and improves performance by reducing loading and wire length in critical stages.Half-Cycle Latch StabilizationHalf-cycle stabilization latches minimize the propagation of glitches to downstream logic. This is easily employed since the PPC440 core contains a master/slave latch arrangement for scan-test purposes. Therefore, a master-only latch is simply needed in the logic path that is switching in the first half of a cycle. For example, if the select lines for a mux are being determined in the first half of a cycle, then by putting a master-only latch on these select lines before delivering them to the mux, the mux outputs are prevented from glitching while the select lines are being determined. Conversely, if the data lines are unstable in the first half of a cycle, a stabilization latch may be used on the data inputs, while leaving the select lines alone.Dynamic Clock GatingThe most important feature of the PPC440’s dynamic power management is the extensive use of clock gating. Given the PPC440’s master/slave latch organization, there are two possible gates that can be used. The relationship between them, and their relative affect on the clock splitter and hence power are shown in Figure 5.Figure 5 - PPC440 Clock GatingIn this figure, the early gate blocks the phase 1 clock and prevents the master latch from loading, while the late gate blocks the phase 2 clock and prevents the slave latch from loading. As illustrated in the simplified block diagram of the clock splitter, the early gate must arrive by mid-cycle -- which is when the system clock falls. If the gate is activated by this point, then the net effect is that internal to the clock splitter the fall on the system clock is never observed, and both the phase 1 and the phase 2 clock splitteroutputs remain stable, preventing any downstream master latches from loading, and hence their associated slave latches will not change either. This affords the maximum power savings, with the downstream logic dissipating no power other than leakage, and the clock splitter itself using almost zero power.In the event that the gate for a given latch cannot be determined by mid-cycle, the late gate can be used, which does not prevent the system clock fall and consequent phase 1 clock rise, but does prevent the corresponding next phase 2 clock rise. This does not save as much power, but the timing is much more relaxed and the power savings are still considerable.。
550C中文资料
550C中文资料关键信息项：1、资料名称：550C 中文资料2、资料用途：＿___________________________3、资料提供方：＿___________________________4、资料接收方：＿___________________________5、资料使用期限：＿___________________________6、资料保密要求：＿___________________________7、违约责任：＿___________________________8、争议解决方式：＿___________________________11 协议背景本协议旨在规范550C 中文资料的相关事宜，确保资料的合理使用、保护和传播。
111 资料的定义和范围本协议中所提及的550C 中文资料包括但不限于文字、图表、图像、音频、视频等与 550C 相关的各类中文形式的信息。
112 资料的用途资料接收方应仅将 550C 中文资料用于具体合法且明确的用途，不得用于其他任何未经授权的目的。
12 资料提供方的权利和义务121 提供方应确保所提供的 550C 中文资料的真实性、准确性和完整性。
122 提供方有权对资料接收方的使用情况进行监督和检查。
13 资料接收方的权利和义务131 接收方应按照协议约定的用途使用 550C 中文资料。
132 接收方有义务对资料进行妥善保管，采取合理的安全措施防止资料泄露、丢失或损坏。
133 未经提供方书面同意，接收方不得将资料转让、出售、出租或提供给任何第三方。
14 资料使用期限141 双方约定 550C 中文资料的使用期限为具体时间段。
142 在使用期限届满后，接收方应立即停止使用并按照提供方的要求归还或销毁资料。
15 资料保密要求151 接收方应对 550C 中文资料予以保密，不得向任何无关人员透露资料的内容。
152 接收方应采取必要的保密措施，如限制访问、加密存储等，以确保资料的保密性。
西门子变频器产品样本
本产品样本中包含的产品已录入产品样本光盘 CA01 中 订货号： E86060-D4001-A110-B4-7600
订货时请与您当地的西门子办事处联系
本样本中列出的产品和 系统在制造和销售中通 过了 DIN EN ISO 9001 ( 认证号：N o . D E 000357 QM))和DIN EN ISO 14001(认证号：No. 0813420 UM 和 EMS 57390)。认证证书在所 有的 IQNet 国家都已注 册。
主要特征
调试简单
模块化的结构，因而组态 具有最大的灵活性
具有三个完全可编程的隔 离的数字输入
一个可标定的模拟输入 (0V 至 10V) ；它也可以作为第 4 个数字输入来使用。
一个可编程的模拟输出 (0mA 至 20mA)
一个完全可编程的继电器 输出 (30V ，直流 /5A，电阻 负载或 250V，交流 /2A， 感 性负载)
3
MICROMASTER420/430/440
一般介绍
选件
MICROMASTER 4 系列变频 器有以下选件可供用户选用:
滤波器 电抗器 操作面板 PROFIBUS 通讯模块 DeviceNet 通讯模块 CAN open 通讯模块 脉冲编码器脉冲计数模块 密封盖板 安装组合件等
变频器各个系列适用的操作面板和功能模块的配置
节能运行方式 负载转矩监控 ( 水泵的无水空转运行检测) 电动机的分级 (多泵循环) 控制
有 3 组驱动数据可供选择 集成的制动斩波器 (75 kW 以下) 转矩控制 具有二进制互联连接（BiCo）功能
MM430 变频器
110kW 至 250kW（VT）MM430 变频器是 MICROMASTER 变频器系列新的扩展型号。它的主要特点有：
MUR6020PT中文资料
MUR15100
Ultra Fast Recovery Diodes
Fig. 1 Forward current versus voltage drop.
Fig. 2 Recovery charge versus -diF/dt.
Fig. 3 Peak reverse current versus -diF/dt.
MUR15100
Ultra Fast Recovery Diodes
Dimensions TO-220AC A C(TAB) A C C
Dim. A B C D E F G H J K L M N Q
A=Anode, C=Cathode, TAB=Cathode
MUR15100
VRSM V 1000
Fig. 4 Dynamic parameters versus junction temperature.
Fig. 5 Recovery time versus -diF/dt.
Fig. 6 Peak forward voltage versus diF/dt.
Fig. 7 Transient thermal impedance junction to case.
ADVANTAGES
* High reliability circuit operation * Low voltage peaks for reduced protection circuits * Low noise switching * Low losses * Operating at lower temperature or space saving by reduced cooling
VRRM V 1000
MUR30120PT中文资料
Inches Min. Max. 0.780 0.819 0.610 0.140 0.170 0.212 0.065 0.040 0.426 0.185 0.016 0.087 0.800 0.845 0.640 0.144 0.216 0.244 0.084 0.177 0.055 0.433 0.209 0.031 0.102
A=Anode, C=Cathode, TAB=Cathode
MUR30120PT
VRSM V 1200
VRRM V 1200
J K L M N
Symbol IFRMS IFAVM IFRM
Test Conditions TVJ=TVJM TC=100oC; rectangular, d=0.5 tp<10us; rep. rating, pulse width limited by TVJM TVJ=45oC t=10ms (50Hz), sine t=8.3ms (60Hz), sine t=10ms(50Hz), sine t=8.3ms(60Hz), sine t=10ms (50Hz), sine t=8.3ms (60Hz), sine t=10ms(50Hz), sine t=8.3ms(60Hz), sine
30
TVJ=100°C A V =540V R 25 max. 20 15 10 5 0 0 100 200
-diF/dt
IF
Qr
IF=11A IF=22A IF=11A IF=5.5A
IF=11A IF=22A IF=11A IF=5.5A
typ.
300 A/µs
400
Fig. 1 Forward current versus voltage drop.
Alarmtech VMC 440 磁感应门窗传感器说明书
VMC 440 Instruction Manual 4-VMC440-01© 2015 Alarmtech Rev. VMC440 1511en Page 1 of 2Magnetic ContactDESCRIPTIONMC 440 is a magnetic contact with opening contact for surface mount. It can be used in security system and industrial control systems for protection of doors and windows against unauthorized opening. It is easy to mount and has screw terminals with wire guards. It is available with build in resistors of any value and configuration on customer request. With enclosed plastic distances and separate accessories like Z-bracket and L-bracket it is possible to mount the contact on steel.CIRCUIT DIAGRAM (SHOWN WITHOUT MAGNET FIELD)Fig 1.MC 440 with configuration for separate sabotage loop:Fig.2. MC 440 with one resistor Rp parallel over reed mounted in the terminals with many contacts in a loop:Fig 3. MC 440 with two resistor mounted in the terminals for a end of line contact when only one contact used in the loop:Fig. 4. MC 440-PRpSRs with build in resistors:A = End Of Line using 2 resistors.B = using only the Rp resistor to mount more contacts on one loop.TECHNICAL DATASwitching voltage max. 48 V DC/ACSwitching current max. 400 mA DC/peak AC Contact rating max.10 WVMC 440 Instruction Manual4-VMC440-01© 2015 AlarmtechRev. VMC440 1511enPage 2 of 2OPERATING PRINCIPLEMC 440 magnetic contact has two parts: the contact part with a reed switch and the magnet part. In its neutral position the reed switch remains closed under the force of the magnetic field. Opening the monitored object increases the distance between the reed switch and the magnet. This reduces the influence of the magnetic field on the reed switch until it opens and activates an alarm.Magnetic contacts should not be installed in the vicinity of strong magnetic fields.INSTALLATIONContact and magnet should be installed in parallel, above or besides each other corresponding to each other. Offset will reduce the working distances. The contact should be mounted on the stationary part of the monitored object (ex. door frame) and the magnet on the movable part (ex. door leaf).For sites where it is impossible to mount the contact directly, spacers and aluminium brackets are available. Spacers enable installation of the contact on ferromagnetic surfaces. Brackets can be used to mount the contact parts away from a ferromagnetic surface or to solve problems with aligning the contact with the magnet. Contact and/or magnet should be screwed to the oval slots in the brackets and adjusted to a suitable position.Only non-ferromagnetic screws may be used for mounting the contact.After the installation, use an ohmmeter to check the electrical connections and test the operation of the magnetic contact.Warning: applying excessive force to the housing of the contact may damage the glass body of the reed switches inside.Warning: appropriate accessories must be used for installation in ferromagnetic environment.ORDER INFORMATIONMC 440 is standard available with build in resistors 1% tolerance of any chosen value.For model MC 400 the resistors can be self-mounted to the terminals of the product of any chosen value by installer. MC 440 is universal and can be used with one resistor parallel to the alarm switch mounted on terminal 1 and 2 and with two resistors one in parallel mounted on terminal 1 and 2 and one in series to the reed mounted on terminal 3 and 4.MC 400-PRpSRs is the universal contact with build in resistor. It is universal for one and two resistor by connecting the the loop either A to terminal 1and 2 for a parallell resistor to reed or B connected to terminal 1 and 3 for two resistors Rp and Rs. We keep stock of some units with build in standard resistor values. If in this case the two resistors have different value use S in front of the value in series and P for parallel to the reed contact when ordering. Any resistance values with tolerance 1% can be ordered with min. quantity of 100pcs.For special orders of build in resistors use the following ordering information MC 440-PRpSRs∙ Parallel to reed use prefix P and resistor value ∙ In series to reed use prefix S and resistor value ∙With the same value of Rp and Rs use MC 440-2xRORDER INFORMATIONUniversal contact with 2 resistors build in as we keep in stock. The design allows installer to use one or both.AccessoriesWe reserve the right to changes without notice.。
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SENSITRONSEMICONDUCTORMURC405-MURC460Technical DataData Sheet 4855, Rev.-MURC405-MURC460 Ultrafast Silicon DieApplications:• Switching Power Supply • General Purpose • Free-Wheeling Diodes • Polarity Protection DiodeFeatures:• Glass-Passivated• Epitaxial Construction.• Low Reverse Leakage Current • High Surge Current Capability • Low Forward Voltage Drop• Fast Reverse-Recovery BehaviorMaximum Ratings:Characteristics Symbol MURC 405 MURC 410 MURC 415 MURC 420 MURC 440 MURC460Unit Peak Repetitive Reverse Voltage Working Peak Reverse Voltage DC Blocking Voltage V RRM V RWM V R 50 100 150 200 400 600 V Average Rectified Forward Current(Square Wave)I F(AV) 4.0 @ T A = 80°C 4.0 @ T A = 40°C ANon-Repetitive Peak Surge Current(Surge applied at rated load conditions, half wave, single phase, 60Hz)I FSM 125110 AMax. Junction Capacitance @V R = 5V, T C = 25 °C, f SIG = 1MHz, V SIG = 50mV (p-p) C T 100 40 pFOperating JunctionTemperature and Storage TemperatureT J, T stg-65 to +175°CElectrical Characteristics:Characteristics Symbol MURC 405 MURC 410 MURC 415 MURC 420 MURC 440 MURC 460UnitMax. Instantaneous Forward Voltage (Note1) (I F = 3.0 Amp, T J = 150 °C)(I F = 3.0 Amp, T J = 25 °C)(I F = 4.0 Amp, T J = 25 °C)V F0.71 0.88 0.89 1.05 1.25 1.28 V Max. Instantaneous Reverse Current (Note1) (Rated DC Voltage, T J = 150 °C) (Rated DC Voltage, T J = 25 °C)I R 150 5 250 10 µAMax. Reverse Recovery Time (I F = 1.0 Amp, di/dt = 50 A/µs)(I F = 0.5 Amp, I R = 1.0 A, I REC =0.25A)t rr35 25 75 50 nS Max. Forward Recovery Time (I F = 1.0 Amp, di/dt = 100 A/µs, Recover to 1.0 V)T fr 2550 nS 1. Pulse Test: Pulse Width = 300µs, Duty Cycle ≤2%SENSITRONSEMICONDUCTORMURC405-MURC460Data Sheet 4855, Rev.- Dimensions in inches (mm)Bottom side metalization:Ti/Ni/Ag - 30 kÅ minimum.Top side metalization:Al - 25 kÅ minimum or Ti/Ni/Ag - 30 kÅ minimumBottom side is cathode, top side is anode.Die typeArea (mil 2) DimensionA (1)Inch (millimeter) Dimension B (1) Inch (millimeter)Dimension C (2) Inch (millimeter) Si p-n die 65 x 65 0.065 (1.651) 0.049 (1.254) 0.009 (0.229)(1)Tolerance is ± 0.003” (0.076 mm) (2)Tolerance is ± 0.001” (0.025 mm)DISCLAIMER:1- The information given herein, including the specifications and dimensions, is subject to change without prior notice to improve product characteristics. Before ordering, purchasers are advised to contact the Sensitron Semiconductor sales department for the latest version of the datasheet(s).2- In cases where extremely high reliability is required (such as use in nuclear power control, aerospace and aviation, traffic equipment, medical equipment , and safety equipment) , safety should be ensured by using semiconductor devices that feature assured safety or by means of users’fail-safe precautions or other arrangement .3- In no event shall Sensitron Semiconductor be liable for any damages that may result from an accident or any other cause during operation of the user’s units according to the datasheet(s). Sensitron Semiconductor assumes no responsibility for any intellectual property claims or any other problems that may result from applications of information, products or circuits described in the datasheets.4- In no event shall Sensitron Semiconductor be liable for any failure in a semiconductor device or any secondary damage resulting from use at a value exceeding the absolute maximum rating.5- No license is granted by the datasheet(s) under any patents or other rights of any third party or Sensitron Semiconductor.6- The datasheet(s) may not be reproduced or duplicated, in any form, in whole or part, without the expressed written permission of Sensitron Semiconductor.7- The products (technologies) described in the datasheet(s) are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety nor are they to be applied to that purpose by their direct purchasers or any third party. When exporting these products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations.SENSITRONMURC405-MURC460 SEMICONDUCTORData Sheet 4855, Rev.-MURC405, MURC410, MURC415, MURC420SENSITRONMURC405-MURC460 SEMICONDUCTORData Sheet 4855, Rev.-MURC440, MURC460。