FDB045AN08A0_06中文资料

tmMay 2006FDB045AN08A0 N-Channel PowerTrench ® MOSFETFDB045AN08A0N-Channel PowerTrench ® MOSFET 75V, 80A, 4.5m ΩFeatures•r DS(ON) = 3.9m Ω (Typ.), V GS = 10V, I D = 80A •Q g (tot) = 92nC (Typ.), V GS = 10V •Low Miller Charge •Low Q RR Body Diode•UIS Capability (Single Pulse and Repetitive Pulse)•Qualified to AEC Q101Formerly developmental type 82684Applications•42V Automotive Load Control •Starter / Alternator Systems •Electronic Power Steering Systems •Electronic Valve Train Systems •DC-DC converters and Off-line UPS •Distributed Power Architectures and VRMs •Primary Switch for 24V and 48V systemsMOSFET Maximum Ratings T C = 25°C unless otherwise notedSymbol ParameterRatings Units V DSS Drain to Source Voltage 75V V GS Gate to Source Voltage ±20V I D Drain Current90A Continuous (T C < 137o C, V GS = 10V) Continuous (T amb = 25o C, V GS = 10V, with R θJA = 43o C/W)19A PulsedFigure 4A E AS Single Pulse Avalanche Energy (Note 1)600mJ P D Power dissipation 310W Derate above 25oC2.0W/o CT J , T STGOperating and Storage Temperature-55 to 175oCThermal CharacteristicsR θJC Thermal Resistance Junction to Case TO-2630.48o C/W R θJA Thermal Resistance Junction to Ambient TO-263 (Note 2)62o C/W R θJAThermal Resistance Junction to Ambient TO-263, 1in 2copper pad area43oC/WThis product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For acopy of the requirements, see AEC Q101 at: /Reliability data can be found at: /products/discrete/reliability/index.html.All Fairchild Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systemscertification.DGSTO-263AB FDB SERIESGATESOURCEDRAIN (FLANGE)FDB045AN08A0 N-Channel PowerTrench ® MOSFEPackage Marking and Ordering InformationDevice Marking DevicePackage Reel Size Tape Width Quantity FDB045AN08A0FDB045AN08A0TO-263AB330mm24mm800 unitsElectrical Characteristics T C = 25°C unless otherwise notedSymbolParameterTest ConditionsMinTypMaxUnitsOff CharacteristicsB VDSS Drain to Source Breakdown Voltage I D = 250μA, V GS = 0V 75--V I DSS Zero Gate Voltage Drain Current V DS = 60V --1μA V GS = 0V TC = 150o C--250I GSSGate to Source Leakage CurrentV GS = ±20V--±100nAOn CharacteristicsV GS(TH)Gate to Source Threshold Voltage V GS = V DS , I D = 250μA 2-4Vr DS(ON)Drain to Source On ResistanceI D = 80A, V GS = 10V -0.00390.0045ΩI D = 37A, V GS = 6V -0.00560.0084I D = 80A, V GS = 10V, T J = 175o C-0.0080.011Dynamic CharacteristicsC ISS Input Capacitance V DS = 25V, V GS = 0V,f = 1MHz -6600-pF C OSS Output Capacitance-1000-pF C RSS Reverse Transfer Capacitance -240-pF Q g(TOT)Total Gate Charge at 10V V GS = 0V to 10V V DD = 40V I D = 80A I g = 1.0mA92138nC Q g(TH)Threshold Gate Charge V GS = 0V to 2V-1117nC Q gs Gate to Source Gate Charge -27-nC Q gs2Gate Charge Threshold to Plateau -16-nC Q gdGate to Drain “Miller” Charge-21-nCSwitching Characteristics (V GS = 10V)t ON Turn-On Time V DD = 40V, I D = 80A V GS = 10V, R GS = 3.3Ω--160ns t d(ON)Turn-On Delay Time -18-ns t r Rise Time-88-ns t d(OFF)Turn-Off Delay Time -40-ns t f Fall Time -45-ns t OFFTurn-Off Time--128nsDrain-Source Diode CharacteristicsV SD Source to Drain Diode Voltage I SD = 80A -- 1.25V I SD = 40A-- 1.0V t rr Reverse Recovery Time I SD = 75A, dI SD /dt = 100A/μs --53ns Q RRReverse Recovered ChargeI SD = 75A, dI SD /dt = 100A/μs--54nCNotes:1:Starting T J = 25°C, L = 0.48mH, I AS = 50A.2:Pulse Width = 100sFDB045AN08A0 N-Channel PowerTrench ® MOSFETypical Characteristics T C = 25°C unless otherwise notedFigure 1. T C , CASE TEMPERATURE (o C)P O W E R D I S S I P A T I O N M U L T I P L I E R002550751001750.20.40.60.81.01.2125150Normalized Power Dissipation vsAmbient TemperatureFigure 2. 04080120160200255075100125150175I D , D R A I N C U R R E N T (A )T C , CASE TEMPERATURE (oC)CURRENT LIMITED BY PACKAGEMaximum Continuous Drain Current vsCase TemperatureFigure 3. 0.1110-510-410-310-210-11001010.012t, RECTANGULAR PULSE DURATION (s)Z θJ C , N O R M A L I Z E D T H E R M A L I M P E D A N C ENOTES:DUTY FACTOR: D = t 1/t 2PEAK T J = P DM x Z θJC x R θJC + T CP DMt 1t 20.50.20.10.050.010.02DUTY CYCLE - DESCENDING ORDER SINGLE PULSENormalized Maximum Transient Thermal ImpedanceFigure 4. 1001000200050I D M , P E A K C U R R E N T (A )t, PULSE WIDTH (s)10-510-410-310-210-1100101TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGIONV GS = 10VT C = 25o CI = I 25175 - T C 150FOR TEMPERATURESABOVE 25o C DERATE PEAK CURRENT AS FOLLOWS:Peak Current Capability® MOSFEFigure 7. 03060901204.04.55.0 5.56.0I D , D R A I N C U R R E N T (A )V GS , GATE TO SOURCE VOLTAGE (V)V DD = 15VT J = 175o CT J = 25o CT J = -55o CTransfer CharacteristicsFigure 8. Saturation Characteristics3060901200.5 1.01.5I D , D R A I N C U R R E N T (A )V DS , DRAIN TO SOURCE VOLTAGE (V)V GS = 6VPULSE DURATION = 80μs DUTY CYCLE = 0.5% MAXV GS = 5VT C = 25o CGS GS Figure 9. 34567020406080I D , DRAIN CURRENT (A)V GS = 6VV GS = 10VD R A I N T O S O U R CE O N R E S I S T A N C E (m Ω)PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAXDrain to Source On Resistance vs DrainCurrent Figure 10. 0.51.01.52.02.5-80-4004080120160200N O R M A L I Z E D D R A I N T O S O U R C E T J , JUNCTION TEMPERATURE (o C)O N R E S I S T A N C EV GS = 10V, I D =80APULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX Normalized Drain to Source On Resistance vs Junction Temperature® MOSFEFigure 13. 10010000.111075C , C A P A C I T A N C E (p F )V DS , DRAIN TO SOURCE VOLTAGE (V)V GS = 0V, f = 1MHzC OSS ≅ C DS + C GDC RSS = C GDCapacitance vs Drain to SourceVoltage Figure 14. 02468255075100V G S , G A T E T O S O U R C E V O L T A G Q g , GATE CHARGE (nC)I D = 80A I D = 10AWAVEFORMS INDESCENDING ORDER:Gate Charge Waveforms for ConstantGate CurrentsMOSFEFDB045AN08A0 N-Channel PowerTrench ® MOSFEThermal Resistance vs. Mounting Pad AreaThe maximum rated junction temperature, T JM , and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, P DM , in an application. Therefore the application’s ambient temperature, T A (o C), and thermal resistance R θJA (o C/W) must be reviewed to ensure that T JM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.(EQ. 1)P DM T JM T A –()R θJA--------------------------=In using surface mount devices such as the TO-263 package, the environment in which it is applied will have a significant influence on the part’s current and maximum power dissipation ratings. Precise determination of P DM is complex and influenced by many factors:1. Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board.2. The number of copper layers and the thickness of the board.3. The use of external heat sinks.4. The use of thermal vias.5. Air flow and board orientation.6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in.Fairchild provides thermal information to assist the designer’s preliminary application evaluation. Figure 21 defines the R θJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Fairchild device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve.Thermal resistances corresponding to other copper areas can be obtained from Figure 21 or by calculation using Equation 2 or 3. Equation 2 is used for copper area defined in inches square and equation 3 is for area in centimeters square. The area, in square inches or square centimeters is the top copper area including the gate and source pads.Area in Inches Squared(EQ. 2)R θJA 26.5119.840.262Area +()--------------------------------------+=(EQ. 3)R θJA 26.511281.69Area +()-----------------------------------+=Area in Centimeter SquaredFigure 21. Thermal Resistance vs MountingPad Area204060801100.1R θJA = 26.51+ 19.84/(0.262+Area) EQ.2R θJ A (o C /W )AREA, TOP COPPER AREA in 2 (cm 2)(0.645)(6.45)(64.5)R θJA = 26.51+ 128/(1.69+Area) EQ.3® MOSFE68-58+VBAT RVTHRES22EGSEDS8-RLDRAIN 2 5 10RLGATE 1 9 48.1 RLSOURCE 3 7 46.3RSLC1 5 51 RSLCMOD 1e-6RSLC2 5 50 1e3RSOURCE 8 7 RSOURCEMOD 2.3e-3 RVTHRES 22 8 RVTHRESMOD 1RVTEMP 18 19 RVTEMPMOD 1S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 22 19 DC 1ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*250),10))}.MODEL DBODYMOD D (IS = 2.4e-11 N = 1.04 RS = 1.76e-3 TRS1 = 2.7e-3 TRS2 = 2e-7 XTI=3.9 CJO = 4.35e-9 TT = 1e-8 M = 5.4e-1).MODEL DBREAKMOD D (RS = 1.5e-1 TRS1 = 1e-3 TRS2 = -8.9e-6).MODEL DPLCAPMOD D (CJO = 1.35e-9 IS = 1e-30 N = 10 M = 0.53).MODEL MMEDMOD NMOS (VTO = 3.7 KP = 9 IS =1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1.36).MODEL MSTROMOD NMOS (VTO = 4.4 KP = 250 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u).MODEL MWEAKMOD NMOS (VTO = 3.05 KP = 0.03 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 1.36e1 RS = 0.1).MODEL RBREAKMOD RES (TC1 = 1.05e-3 TC2 = -9e-7) .MODEL RDRAINMOD RES (TC1 = 1.9e-2 TC2 = 4e-5).MODEL RSLCMOD RES (TC1 = 1.3e-3 TC2 = 1e-5).MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6).MODEL RVTHRESMOD RES (TC1 = -6e-3 TC2 = -1.9e-5) .MODEL RVTEMPMOD RES (TC1 = -2.4e-3 TC2 = 1e-6).MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.0 VOFF= -1.5) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.5 VOFF= -4.0) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.0 VOFF= 0.5) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.5 VOFF= -1.0) .ENDSNote: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options ; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.® MOSFE22171868+-58+-RBREAK RVTEMPVBAT RVTHRESIT17181922121315S1AS1BS2A S2BCACB EGSEDS1481381413RSOURCESOURCE73LSOURCE RLSOURCE CIN8MSTRO 19RLGATE20+-+-l.lsource n3 n7 = 4.63e-9m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1 = 1.05e-3, tc2 = -9e-7res.rdrain n50 n16 = 9e-4, tc1 = 1.9e-2, tc2 = 4e-5res.rgate n9 n20 = 1.36res.rldrain n2 n5 = 10res.rlgate n1 n9 = 48.1res.rlsource n3 n7 = 46.3res.rslc1 n5 n51= 1e-6, tc1 = 1e-3, tc2 =1e-5res.rslc2 n5 n50 = 1e3res.rsource n8 n7 = 2.3e-3, tc1 = 1e-3, tc2 =1e-6res.rvtemp n18 n19 = 1, tc1 = -2.4e-3, tc2 = 1e-6res.rvthres n22 n8 = 1, tc1 = -6e-3, tc2 = -1.9e-5spe.ebreak n11 n7 n17 n18 = 82.3spe.eds n14 n8 n5 n8 = 1spe.egs n13 n8 n6 n8 = 1spe.esg n6 n10 n6 n8 = 1spe.evtemp n20 n6 n18 n22 = 1spe.evthres n6 n21 n19 n8 = 1sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1equations {i (n51->n50) +=iscliscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/250))** 10))}}® MOSFEctherm.ctherm6 2 tl = 1e-1rtherm.rtherm1 th 6 = 3.24e-3rtherm.rtherm2 6 5 = 8.08e-3rtherm.rtherm3 5 4 = 2.28e-2rtherm.rtherm4 4 3 = 1e-1rtherm.rtherm5 3 2 = 1.1e-1rtherm.rtherm6 2 tl = 1.4e-1}RTHERM6RTHERM5CTHERM6CTHERM5tl 23CASEFDB045AN08A0 Rev. A1Rev. I19TRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONS Definition of TermsACEx™ActiveArray™Bottomless™Build it Now™CoolFET™CROSSVOLT ™DOME™EcoSPARK™E 2CMOS™EnSigna™FACT™FACT Quiet Series™FAST ®FASTr™FPS™FRFET™GlobalOptoisolator™GTO™HiSeC™I 2C™i-Lo ™ImpliedDisconnect ™IntelliMAX™ISOPLANAR™LittleFET™MICROCOUPLER™MicroFET™MicroPak™MICROWIRE™MSX ™MSXPro ™OCX ™OCXPro ™OPTOLOGIC ®OPTOPLANAR™PACMAN™POP™Power247™PowerEdge™PowerSaver™PowerTrench ®QFET™QS™QT Optoelectronics™Quiet Series™RapidConfigure ™RapidConnect ™µSerDes ™ScalarPump ™SILENT SWITCHER ®SMART START™SPM™Stealth™SuperFET™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TCM™TinyLogic ®TINYOPTO™TruTranslation™UHC™UltraFET ®UniFET™VCX™Wire™Across the board. Around the world.™The Power Franchise ®Programmable Active Droop™Datasheet Identification Product Status DefinitionAdvance InformationFormative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.PreliminaryFirst ProductionThis datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.No Identification Needed Full ProductionThis datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In ProductionThis datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.FDB045AN08A0 N-Channel PowerTrench ® MOSFET元器件交易网。