03_Quantization_Lab

Quantization LabQuantization LabIntroductionThis lab will introduce you to floating- to fixed-point conversion features of the AccelDSP™synthesis tool. The AccelDSP synthesis tool will automatically generate a fixed-pointrepresentation of a floating-point design. This process is controllable by using quantize directives. ObjectivesAfter completing this lab, you will be able to:Use the accel_probe feature to analyze a quantization errorReduce hardware resources while maintaining the design’s signal-to-noise ratio Proceduren Copy all the files from the filter project created in folderSynthesizableMATLAB/part_b/solution to the lab folder named Quantization. There shouldbe no quantization directives on this filter at this point1.What are the source files for the AccelDSP synthesis tool project??_______________________________________________________________o Invoke the AccelDSP synthesis tool and load the project file proj.acc for this design. Once loaded, perform the Verify Floating Point, Analyze, Generate Fixed Point, and Verify Fixed Point steps? 2.What information do the Overflows and Underflows (rounded to zero) fields in the Verify Fixed Point Report give you to help in selecting the correctquantization?________________________________________________________________________________________________________________________________________________________________________________________________ p Set an accel_probe on the Ports of the design function. This will give you more insight into the nature of the quantization error and will also help you determine more efficientquantization values. The accel_probe function is ignored for synthesisfunction FilterOut = synth_filter(FilterIn)accel_probe(FilterIn,'FilterIn',2050);coeff = load('b.txt');|persistent tap_delayif isempty(tap_delay)tap_delay = zeros(1,length(coeff));end% Shift tap delay linetap_delay = [tap_delay(2:length(coeff)) FilterIn];% Perform sum of productsFilterOut = tap_delay * coeff(end:-1:1)';accel_probe(FilterOut,'FilterOut',2050);Add a call to the accel_probe_plot function at the bottom of the top-level script file.r Perform the Verify Floating Point step again. You will notice two new waveforms being generated by accel_probe. These are showing the dynamic range of the floating-pointsimulationNote: In the accel_probe plot windows, you can select Tools → Data Statistics from the pull-down menu to observe the max and min values of a plot.Variable Most positive value Most Negative ValueFilterInFilterOuts Perform the Analyze, Generate Fixed Point, and Verify Fixed Point steps. accel_probe will generate the two plots again during the Verify Fixed Point step, but now it shows the fixed-point simulation values superimposed on top of the floating-point values. The top of each plot will also list the max error and signal-to-noise ratioVariable Largest Error Signal-to-Noise RatioFilterInFilterOutt Adjust the quantization values to achieve a signal-to-noise ratio greater than 75 for the output variable FilterOut. Record the bit width used:Variable QuantizationFilterInFilterOutcoefftap_delayu Take the design through Synthesize RTL and record the following results:SlicesSlice Flip-Flops4 input LUTsbonded IOBsGCLKsDSP48sEstimated FrequencyInput Samplingv Reduce the bit widths as much as possible while maintaining a signal-to-noise ratio greater then 75 for the output variable FilterOut. Record the bit widths used:Variable QuantizationFilterInFilterOutcoefftap_delayw Take the design through Synthesize RTL and record the following results:SlicesSlice Flip-Flops4 input LUTsbonded IOBsFIFO16/RAMB16sGCLKsDSP48sEstimated FrequencyInput SamplingConclusionThe auto-quantizer is a very powerful feature that allows you to quickly generate informationabout fixed-point behavior. Directives can be applied to override decisions made by the auto-quantizer. Reports are generated to aid you in analyzing the floating- to fixed-point conversionresults. In addition, the accel_probe function gives you comparison plots on the amount ofquantization noise that was introduced into the design.。