[定稿]DSP28035的GPIO配置流程

To plan configuration of the GPIO module, consider the following steps: Step 1. Plan the device pin-out:
Through a pin multiplexing scheme, a lot of flexibility is provided for assigning functionality to the GPIO-capable pins. Before getting started, look at the peripheral options available for each pin, and plan pin-out for your specific system. Will the pin be used as a general purpose input or output (GPIO) or as one of up to three available peripheral functions? Knowing this information will help determine how to further configure the pin.
通过一个管脚复用的计划，可以给GPIO管脚组的功能赋予更多灵活性。

在开始之前，先查看每个管脚的外设可用的选项，然后为你特定的系统计划管脚的用途。

管脚是被用于输入输出的通用用途还是用作三个外设功能中的一个？搞清楚信息能够帮助你更好的配置管脚。

Step 2. Enable or disable internal pull-up resistors:
To enable or disable the internal pullup resistors, write to the respective bits in the GPIO pullup disable (GPAPUD and GPBPUD) registers. For pins that can function as ePWM output pins, the internal pullup resistors are disabled by default. All other GPIO-capable pins have the pullup enabled by default. The AIOx pins do not have internal pull-up resistors.
通过向GPIO取消上拉寄存器（GPAPUD和GPBPUD）特定为写0/1，来使能或者取消内部上拉电阻。

对于可以用作ePWM输出的管脚，默认取消内部上拉电阻。

所有其他的GPIO管脚都默认使能内部上拉。

AIO口没有内部上拉电阻。

Step 3. Select input qualification:
If the pin will be used as an input, specify the required input qualification, if any. The input qualification is specified in the GPACTRL, GPBCTRL, GPAQSEL1, GPAQSEL2, GPBQSEL1, and GPBQSEL2 registers. By default, all of the input signals are synchronized to SYSCLKOUT only.
如果管脚被用作输入口，如果有的话，必须指定所要求的输入条件。

输入条件在寄存器GPACTRL, GPBCTRL, GPAQSEL1, GPAQSEL2, GPBQSEL1, 和GPBQSEL2中被指定。

所有的输入信号都默认只能和SYSCLKOUT同步。

Step 4. Select the pin function:
Configure the GPxMUXn or AIOMUXn registers such that the pin is a GPIO or one of three available peripheral functions. By default, all GPIO-capable pins are configured at reset as general purpose input pins.
像配置管脚作为通用输入输出口还是3个外设功能中的一个那样，来配置GPxMUXn 或者AIOMUXn寄存器。

默认的，所有GPIO的管脚在复位时都被配置为通用输入管脚。

Step 5. For digital general purpose I/O, select the direction of the pin:
If the pin is configured as an GPIO, specify the direction of the pin as either input or output in the GPADIR, GPBDIR, or AIODIR registers. By default, all GPIO
pins are inputs. To change the pin from input to output, first load the output latch with the value to be driven by writing the appropriate value to the GPxCLEAR, GPxSET, or GPxTOGGLE (or AIOCLEAR, AIOSET, or AIOTOGGLE) registers. Once the output latch is loaded, change the pin direction from input to output via the GPxDIR registers. The output latch for all pins is cleared at reset.
如果一个管脚被配置为通用输入输出口，在寄存器GPADIR, GPBDIR或者AIODIR中指定管脚的方向（不管输入还是输出）。

默认的，所有的GPIO口都被用作输入口。

要将一个管脚从输入改为输出，首先要载入驱动输出锁的值，这个值是写入到寄存器GPxCLEAR, GPxSET, 或者GPxTOGGLE (AIOCLEAR, AIOSET, 或者AIOTOGGLE)对应的值。

一旦输出锁被载入了，通过寄存器GPxDIR改变管脚的方向，从输入改为输出。

所有管脚输出锁在复位都被清空。

Step 6. Select low power mode wake-up sources:
Specify which pins, if any, will be able to wake the device from HALT and STANDBY low power modes. The pins are specified in the GPIOLPMSEL register.
如果需要，指定管脚可以使设备从停止和待机的低功耗模式下唤醒出来。

在寄存器GPIOLPMSEL中可以设定管脚。

Step 7. Select external interrupt sources:
Specify the source for the XINT1 - XINT3 interrupts. For each interrupt you can specify one of the port A signals as the source. This is done by specifying the source in the GPIOXINTnSEL register. The polarity of the interrupts can be configured in the XINTnCR register as described in Section 6.6.
指定中断XINT1 ~ XINT3的中断源。

每个中断你都可以从PA口信号中指定一个作为其中断源。

这个只能在寄存器GPIOXINTnSEL中设定。

在6.6章中将描述，中断的极性在寄存器XINTnCR设置。

Note: There is a 2-SYSCLKOUT cycle delay from when a write to configuration registers such as GPxMUXn and GPxQSELn occurs to when the action is valid。

从设置寄存器到设置的动作发生，有两个系统时钟周期的延时。