MB90561A中文资料

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艾奎顿199051产品说明说明书

艾奎顿199051产品说明说明书

Eaton 199051Eaton Moeller® series Rapid Link - Speed controllers, 8.5 A, 4 kW, Sensor input 4, Actuator output 2, 400/480 V AC, PROFINET, HAN Q4/2, with manual override switch, with braking resistance, with fanAllgemeine spezifikationEaton Moeller® series Rapid Link Speed controller199051195 mm270 mm 220 mm 3.82 kgUL 61800-5-1 UL approval CEIEC/EN 61800-5-1 RoHS4015081971091RASP5-8424PNT-412R101S1Product NameCatalog NumberProduct Length/Depth Product Height Product Width Product Weight Certifications Catalog Notes EANModel Code3 fixed speeds and 1 potentiometer speedcan be switched over from U/f to (vector) speed control Connection of supply voltage via adapter cable on round or flexible busbar junction480 VIs the panel builder's responsibility. The specifications for the switchgear must be observed.480 V AC, 3-phase400 V AC, 3-phaseMeets the product standard's requirements.4 kW500 VMeets the product standard's requirements.-40 °C380 VSelector switch (Positions: REV - OFF - FWD)2 Actuator outputsIGBT inverterKey switch position HANDControl unitFanKey switch position OFF/RESETTwo sensor inputs through M12 sockets (max. 150 mA) for quick stop and interlocked manual operationBraking resistancePTC thermistor monitoringPC connectionBreaking resistanceKey switch position AUTOThermo-click with safe isolationInternal DC linkManual override switch0 Hz Generation change RAMO4 to RAMO5Generationentausch RAMO4 zu RAMO5Generation change from RA-SP to RASP 4.0Firmware Update RASP 4.0Generation change from RA-MO to RAMO 4.0 Generationentausch RA-SP zu RASP4.0Generation Change RASP4 to RASP5Elektromagnetische Verträglichkeit (EMV)Configuration to Rockwell PLC for Rapid LinkConfiguration to Rockwell PLC Rapid Link 5 Generationenwechsel RA-SP zu RASP5Generationswechsel RASP4 zu RASP5Generation Change RA-SP to RASP5Anschluss von Frequenzumrichtern an Generatornetze Generationentausch RA-MO zu RAMO4.0MN040003_DEMN034004_DERapid Link 5 - brochureDA-SW-Driver DX-CBL-PC-3M0DA-SW-USB Driver PC Cable DX-CBL-PC-1M5DA-SW-drivesConnect - installation helpDA-SW-drivesConnect - InstallationshilfeDA-SW-USB Driver DX-COM-STICK3-KITDA-SW-drivesConnectMaterial handling applications - airports, warehouses and intra-logisticsETN.RASP5-8424PNT-412R101S1.edzIL034093ZUDE | Rapid Link 5Sortimentskatalog Antriebstechnik-DEMains voltage - max10.11 Short-circuit ratingRated operational voltage10.4 Clearances and creepage distancesOutput at quadratic load at rated output voltage - max Output voltage - max10.2.3.1 Verification of thermal stability of enclosures Ambient storage temperature - minMains voltage - minFitted with:Output frequency - min Anmerkungen zur AnwendungBenutzerhandbücherBroschüreneCAD model Installationsanleitung InstallationsvideosKataloge200 %, IH, max. starting current (High Overload), For 2 seconds every 20 seconds, Power section10 kA40 °CPROFINET, optional5 HP500 Hz8 kHz, 4 - 32 kHz adjustable, fPWM, Power section, Main circuitParameterization: drivesConnectParameterization: FieldbusParameterization: KeypadInternal and on heat sink, temperature-controlled Fan Parameterization: drivesConnect mobile (App)-10 °C≤ 0.6 A (max. 6 A for 120 ms), Actuator for external motor brakeDoes not apply, since the entire switchgear needs to be evaluated.8.5 ADoes not apply, since the entire switchgear needs to be evaluated.Does not apply, since the entire switchgear needs to be evaluated.ramo5_v32.dwgrasp5_v32.stpeaton-bus-adapter-rapidlink-speed-controller-dimensions-005.eps eaton-bus-adapter-rapidlink-speed-controller-dimensions-004.eps eaton-bus-adapter-rapidlink-speed-controller-dimensions-003.eps eaton-bus-adapter-rapidlink-speed-controller-dimensions-002.epsStarting current - maxRated conditional short-circuit current (Iq)Ambient operating temperature - maxCommunication interfaceAssigned motor power at 115/120 V, 60 Hz, 1-phase Output frequency - maxSwitching frequencyFeaturesAmbient operating temperature - minBraking currentNumber of HW-interfaces (serial TTY)10.6 Incorporation of switching devices and components Nominal output current I2N10.2.6 Mechanical impact10.3 Degree of protection of assemblies mCAD model ZeichnungenProduct categorySpeed controllerRadio interference classC2, C3: depending on the motor cable length, the connected load, and ambient conditions. External radio interference suppression filters (optional) may be necessary.C1: for conducted emissions onlyHeat dissipation capacity Pdiss0 WRated control voltage (Uc)24 V DC (-15 %/+20 %, external via AS-Interface® plug) 400/480 V AC (external brake 50/60 Hz)Assigned motor power at 460/480 V, 60 Hz, 3-phase5 HPNumber of HW-interfaces (RS-422)Mains current distortion120 %ProtocolPROFINET IO10.9.2 Power-frequency electric strengthIs the panel builder's responsibility.Overvoltage categoryIIIDegree of protectionIP65NEMA 12Ambient storage temperature - max70 °CRated impulse withstand voltage (Uimp)2000 VConnectionPlug type: HAN Q4/2Overload currentFor 60 s every 600 sAt 40 °CFunctions3 fixed speeds1 potentiometer speedBrake chopper with braking resistance for dynamic braking4-quadrant operation possibleFor actuation of motors with mechanical brakeOutput at linear load at rated output voltage - max4 kWMains voltage tolerance380 - 480 V (-10 %/+10 %, at 50/60 Hz)Leakage current at ground IPE - max3.5 mAConverter typeU converter10.2.2 Corrosion resistanceMeets the product standard's requirements.Supply frequency50/60 Hz10.2.4 Resistance to ultra-violet (UV) radiationMeets the product standard's requirements.10.2.7 InscriptionsMeets the product standard's requirements.Shock resistance15 g, Mechanical, According to IEC/EN 60068-2-27, 11 ms, Half-sinusoidal shock 11 ms, 1000 shocks per shaftApplication in domestic and commercial area permittedYesNumber of inputs (analog)Number of phases (output)310.12 Electromagnetic compatibilityIs the panel builder's responsibility. The specifications for the switchgear must be observed.10.2.5 LiftingDoes not apply, since the entire switchgear needs to be evaluated.Number of HW-interfaces (RS-485)1Number of HW-interfaces (industrial ethernet)Efficiency98 % (η)System configuration typePhase-earthed AC supply systems are not permitted.AC voltageCenter-point earthed star network (TN-S network)10.8 Connections for external conductorsIs the panel builder's responsibility.Switch-on threshold for the braking transistor765 VDCProtectionFinger and back-of-hand proof, Protection against direct contact (BGV A3, VBG4)Braking voltage400/480 V AC -15 % / +10 %, Actuator for external motor brakeApplication in industrial area permittedYesClimatic proofing< 95 %, no condensationIn accordance with IEC/EN 5017810.9.3 Impulse withstand voltageIs the panel builder's responsibility.Overload current IL at 150% overload12.7 AInput current ILN at 150% overload7.8 ANumber of HW-interfaces (RS-232)Number of inputs (digital)4Current limitation0.8 - 8.5 A, motor, main circuitAdjustable, motor, main circuitCable lengthC1 ≤ 1 m, maximum motor cable lengthC3 ≤ 25 m, maximum motor cable lengthC2 ≤ 5 m, maximum motor cable length10.5 Protection against electric shockDoes not apply, since the entire switchgear needs to beevaluated.Mounting positionVerticalMains switch-on frequencyMaximum of one time every 60 seconds10.13 Mechanical functionThe device meets the requirements, provided the information in the instruction leaflet (IL) is observed.10.9.4 Testing of enclosures made of insulating materialIs the panel builder's responsibility.Heat dissipation per pole, current-dependent Pvid0 WElectromagnetic compatibility1st and 2nd environments (according to EN 61800-3)Resolution0.1 Hz (Frequency resolution, setpoint value)Assigned motor power at 460/480 V, 60 Hz5 HPRelative symmetric net voltage tolerance10 %Rated operational current (Ie)8.5 A at 150% overload (at an operating frequency of 8 kHz and an ambient air temperature of +40 °C)Number of outputs (analog)Rated operational power at 380/400 V, 50 Hz, 3-phase4 kWNumber of HW-interfaces (USB)Operating modeSensorless vector control (SLV)PM and LSPM motorsU/f controlSynchronous reluctance motorsBLDC motorsRated frequency - min45 HzDelay time< 10 ms, On-delay< 10 ms, Off-delayNumber of outputs (digital)2Power consumption95 W10.2.3.2 Verification of resistance of insulating materials to normal heatMeets the product standard's requirements.10.2.3.3 Resist. of insul. mat. to abnormal heat/fire by internal elect. effectsMeets the product standard's requirements.Number of HW-interfaces (other)Rated frequency - max66 HzVibrationResistance: 10 - 150 Hz, Oscillation frequency Resistance: 57 Hz, Amplitude transition frequency on accelerationResistance: 6 Hz, Amplitude 0.15 mmResistance: According to IEC/EN 60068-2-6Short-circuit protection (external output circuits)Type 1 coordination via the power bus' feeder unit, Main circuit10.7 Internal electrical circuits and connectionsIs the panel builder's responsibility.Braking torque≤ 30 % (I/Ie)Adjustable to 100 % (I/Ie), DC - Main circuitRelative symmetric net frequency tolerance10 %10.10 Temperature riseThe panel builder is responsible for the temperature rise calculation. Eaton will provide heat dissipation data for the devices.Number of HW-interfaces (parallel)Assigned motor power at 230/240 V, 60 Hz, 1-phase5 HPInterfacesNumber of slave addresses: 31 (AS-Interface®)Eaton Konzern plc Eaton-Haus30 Pembroke-Straße Dublin 4, Irland © 2023 Eaton. Alle Rechte vorbehalten.Eaton ist eine eingetragene Marke.Alle anderen Warenzeichen sind Eigentum ihrer jeweiligenBesitzer./socialmediaSpecification: S-7.4 (AS-Interface®)Max. total power consumption from AS-Interface® power supply unit (30 V): 250 mA 351.6 W at 25% current and 0% speed 53.8 W at 25% current and 50% speed 60.9 W at 50% current and 0% speed 64 W at 50% current and 90% speed 65.4 W at 50% current and 50% speed 85.1 W at 100% current and 0% speed 94 W at 100% current and 50% speed 95.3 W at 100% current and 90% speed 2Above 1000 m with 1 % performance reduction per 100 m Max. 2000 mNumber of phases (input)Heat dissipation at current/speed Number of interfaces (PROFINET)Altitude。

MB91155中文资料

MB91155中文资料

DS07-16306-3EFUJITSU SEMICONDUCTORDATA SHEET32-bit Proprietary MicrocontrollersCMOSFR30 Family MB91150 SeriesMB91F155A/MB91155/MB91154s DESCRIPTIONThe MB91F155A/MB91155/MB91154 is a single-chip microcontroller using a RISC-CPU (FR 30 series) as its core. It contains peripheral I/O resources suitable for audio, MD and so on which are required to operate at low power consumption.s FEATURES1.CPU•32-bit RISC (FR30) , load/store architecture, 5-stage pipeline •General-purpose registers : 32 bits × 16•16-bit fixed-length instructions (basic instructions) , 1 instruction/ 1 cycle•Memory-to-memory transfer, bit processing, barrel shift processing : Optimized for embedded applications •Function entrance/exit instructions, and multiple load/store instructions of register contents, instruction systems supporting high level languages•Register interlock functions, efficient assembly language description•Branch instructions with delay slots : Reduced overhead time in branching executions •Internal multiplier/supported at instruction level Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplication : 3 cycles•Interrupt (PC and PS saving) : 6 cycles, 16 priority levels(Continued)MB91F155A/MB91155/MB9115422.Bus Interface•16-bit address output, 8/16-bit data input and output•Basic bus cycle : 2-clock cycle•Support for interface for various types of memory•Unused data/address pins can be configured us input/output ports•Support for little endian mode3.Internal ROMMB91F155AFLASH products : 510 KbytesMB91155Mask product : 510 KbytesMB91154Mask product : 384 Kbytes4.Internal RAMMask, FLASH products : 2 Kbytes5.Internal Data RAMMB91F155, MB91155FLASH, Mask products : 32 KbytesMB91154FLASH, Mask product : 20 Kbytes6.DMACDMAC in descriptor format for placing transfer parameters on to the main memory.Capable of transferring a maximum of eight internal and external factors combined.Three channels for external factors7.Bit Search ModuleSearches in one cycle for the position of the bit that changes from the MSB in one word to the initial I/O.8.Timers•16-bit OCU × 8 channels, ICU × 4 channels, Free-run timer × 1 channel•8/16-bit up/down timer/counter (8-bit × 2 channels or 16-bit × 1 channel)•16-bit PPG timer × 6 channels. The output pulse cycle and duty can be varied as desired•16-bit reload timer × 4 channels9.D/A Converter•8-bit × 3 channels10.A/D Converter (Sequential Comparison Type)•10-bit × 8 channels•Sequential conversion method (conversion time : 5.0 µs@33 MHz)•Single conversion or scan conversion can be selected, and one-shot or continuous or stop conversion mode can be set respectively.•Conversion starting function by hardware/software.(Continued)MB91F155A/MB91155/MB91154(Continued)11.Serial I/O•UART × 4 channels. Any of them is capable of serial transfer in sync with clock attached with the LSB/MSB switching function.•Serial data output and serial clock output are selectable by push-pull/open drain software.•A 16-bit timer (U-timer) is contained as a dedicated baud rate generator allowing any baud rate to be generated. 12.I2C Bus Interface•One channel master/slave send and receive•Arbitration and clock synchronization functions(The product is licensed with the Philips I2C patent to support those customers who intend to use this product in an I2C system in compliance with the standard I2C specification stipulated by Philips.)13.Clock Switching Function•Gear function : Operating clock ratios to the basic clock can be set independently for the CPU and peripherals from four types, 1 : 1, 1 : 2, 1 : 4 or 1 : 8.14.Clock Function (Calendar Macro)•Internal 32 kHz clock function•It is possible to perform the clock function (oscillation frequency: 32 kHz) even in a stop mode. (The oscillation does not suspend during a stop mode.)15.Interrupt ControllerExternal interrupt input (16 channels in total) :•Allows the rising edge/falling edge/H level/L level to be set.Internal interrupt factors :•Interrupt by resources and delay interrupt16.Others•Reset cause : Power on reset/watchdog timer/software reset/external reset•Low power consumption mode : Sleep/stop•Package : 144-pin LQFP•CMOS technology (0.35 µm)•Power supply voltage : 3.15 V to 3.6 V•MB91F155 is to be MB91F155A.3MB91F155A/MB91155/MB911544MB91F155A/MB91155/MB911545s PIN DESCRIPTION(Continued)Pin No.Pin name Circuit typeFunction12345678D16/P20D17/P21D18/P22D19/P23D20/P24D21/P25D22/P26D23/P27CBit 16 to bit 23 of external data busThese pins are enabled only in 16-bit external bus mode.These pins are available as ports in single-chip and 8-bit external bus modes.1011121314151617D24/P30D25/P31D26/P32D27/P33D28P34D29/P35D30/P36D31/P37CBit 24 to bit 31 of external data busThese pins are available as ports in single-chip mode.18192021222324252829303132333435A00/P40A01/P41A02/P42A03/P43A04/P44A05/P45A06/P46A07/P47A08/P50A09/P51A10/P52A11/P53A12/P54A13/P55A14/P56A15/P57FBit 0 to bit 15 of external address busThese pins are enabled in external bus mode.These pins are available as ports in single-chip mode.3637383940414243A16/P60A17/P61A18/P62A19/P63A20/P64A21/P65A22/P66A23/P67OBit 16 to bit 23 of external address busThese pins are available as ports when the address bus is not in use.45RDY/P80CExternal RDY inputThis function is enabled when external RDY input is allowed.Input “0” when the bus cycle being executed does not end.This pin is available as a port when external RDY input is not in use.MB91F155A/MB91155/MB911546(Continued) Pin No.Pin nameCircuittypeFunction46BGRNT/P81FExternal bus release acceptance outputThis function is enabled when external bus release acceptance output isallowed.Output “L” upon releasing of the external bus.This pin is available as a port when external bus release acceptance out-put is not allowed.47BRQ/P82CExternal bus release request inputThis function is enabled when external bus release request input is al-lowed.Input “1” when the release of the external bus is desired.This pin is available as a port when external bus release request input isnot in use.48RD/P83FExternal bus read strobe outputThis function is enabled when external bus read strobe output is allowed.This pin is available as a port when external bus read strobe output is notallowed.49WR0/P84FExternal bus write strobe outputThis function is enabled in external bus mode.This pin is available as a port in single chip mode.50WR1/P85FExternal bus write strobe outputThis function is enabled in external bus mode when the bus width is 16bits.This pin is available as a port in single chip mode or when the external buswidth is 8 bits.51CLK/P86FSystem clock outputThe pin outputs the same clock as the external bus operating frequency.The pin is available as a port when it is not used to output the clock.525354MD2MD1MD0GMode pinsTo use these pins, connect them directly to either V CC or V SS.Use these pins to set the basic MCU operating mode.55RST B External reset input5758X1X0A High-speed clock oscillation pins (16.5 MHz)60616263INT0/PC0INT1/PC1INT2/PC2INT3/PC3HExternal interrupt request input 0-3Since this input is used more or less continuously when the correspondingexternal interrupt is allowed, output by the port needs to be stopped ex-cept when it is performed deliberately.Since this port is allowed to input also in standby mode, it can be used toreset the standby state.These pins are available as ports when external interrupt request input isnot in use.MB91F155A/MB91155/MB911547(Continued)Pin No.Pin nameCircuit typeFunction64656667INT4/PC4/CS0INT5/PC5/CS1INT6/PC6/CS2INT7/PC7/CS3HThese pins also serve as the chip select output and external inter-rupt request input 4-7.When the chip select output is not allowed, these pins are available as external interrupt requests or ports.Since this input is used more or less continuously when the corre-sponding external interrupt is allowed, output by the port needs to be stopped except when it is performed deliberately.Since this port is also allowed to input in standby mode, the port can be used to reset the standby state.These pins are available as ports when external interrupt request input and chip select output are not in use.697071727374PD0/AIN0/INT8/TRG0PD1/BIN0/INT9/TRG1PD2/AIN1/INT10/TRG2PD3/BIN1/INT11/TRG3PD4/ZIN0/INT12/TRG4PD5/ZIN1/INT13/TRG5HExternal interrupt request input 8-13Since this input is used more or less continuously when the corre-sponding external interrupt is allowed, output by the port needs to be stopped except when it is performed deliberately.[AIN, BIN] Up/down timer input.[TRG] PPG external trigger input.Since this input is used more or less continuously while input is al-lowed, output by the port needs to be stopped except when it is per-formed deliberately.These pins are available as ports when the external interrupt re-quest input, up timer counter input, and PPG external trigger input are not in use.75PD6/DEOP2/INT14HExternal interrupt request input 14Since this input is used more or less continuously when the corre-sponding external interrupt is allowed, output by the port needs to be stopped except when it is performed deliberately.[DEOP2] DMA external transfer end output.This function is enabled when DMAC external transfer end output is allowed.This pin is available as a port when it is not in use as the external interrupt request input or DMA external transfer end output.76PD7/ATG/INT15HExternal interrupt request input 15Since this input is used more or less continuously when the corre-sponding external interrupt is allowed, output by the port needs to be stopped except when it is performed deliberately.[ATG] A/D converter external trigger input.Since this input is used more or less continuously when selected as an A/D activation factor, output by the port needs to be stopped ex-cept when it is performed deliberately.This pin is available as a port when it is not in use as the external interrupt request input or A/D converter external trigger input.MB91F155A/MB91155/MB911548(Continued) Pin No.Pin nameCircuittypeFunction7879808182838485PE0/OC0PE1/OC1PE2/OC2PE3/OC3PE4/OC4PE5/OC5PE6/OC6PE7/OC7FOutput compare outputThese pins are available as ports when output compare output is not al-lowed.86878889PF0/IN0PF1/IN1PF2/IN2PF3/IN3FInput capture inputThis function is enabled when the input capture operation is input.These pins are available as ports when input capture input is not in use.90PF4F General purpose I/O port919293949596PG0/PPG0PG1/PPG1PG2/PPG2PG3/PPG3PG4/PPG4PG5/PPG5FPPG timer outputThis function is enabled when PPG timer output is allowed.These pins are available as ports when PPG timer output is not allowed.99PJ1/SDA QI2C interface I/O pinThis function is enabled when the I2C interface is allowed to operate.While the I2C interface is in operation, keep the port output set to Hi-Z.This pin is available as a port when the I2C interface is not in use.100PJ0/SCL QI2C interface I/O pinThis function is enabled when the I2C interface is allowed to operate.While the I2C interface is in operation, keep the port output set to Hi-Z.This pin is available as a port when the I2C interface is not in use.102PI5/SCK3/TO3PUART3 clock I/O, Reload timer 3 outputWhen UART3 clock output is not allowed, reload timer 3 can be output byallowing it.This pin is available as a port when neither UART3 clock output nor reloadtimer output is allowed.103PI4/SOT3PUART3 data outputThis function is enabled when UART3 data output is allowed.This pin is available as a port when UART3 clock output is not allowed. 104PI3/SIN3PUART3 data inputSince this input is used more or less continuously while UART3 is en-gaged in input operations, output by the port needs to be stopped exceptwhen it is performed deliberately.This pin is available as a port when UART3 output data input is not in use.MB91F155A/MB91155/MB911549(Continued)Pin No.Pin nameCircuit typeFunction105PI2/SCK2/TO2PUART2 clock I/O, Reload timer 2 outputWhen UART2 clock output is not allowed, reload timer 2 can be output by allowing it.This pin is available as a port when neither UART2 clock output nor reload timer output is allowed.106PI1/SOT2PUART2 data outputThis function is enabled when UART2 data output is allowed.This pin is available as a port when UART2 clock output is not allowed.107PI0/SIN2PUART2 data inputSince this input is used more or less continuously while UART2 is en-gaged in input operations, output by the port needs to be stopped except when it is performed deliberately.This pin is available as a port when UART2 data input is not in use.108PH5/SCK1/TO1PUART1 clock I/O, Reload timer 1 outputWhen UART1 clock output is not allowed, reload timer 1 can be output by allowing it.This pin is available as a port when neither UART1 clock output nor reload timer output is allowed.109PH4/SOT1PUART1 data outputThis function is enabled when UART1 data output is allowed.This pin is available as a port when UART1 clock output is not allowed.110PH3/SIN1PUART1 data inputSince this input is used more or less continuously while UART1 is en-gaged in input operations, output by the port needs to be stopped except when it is performed deliberately.This pin is available as a port when UART1 data input is not in use.111PH2/SCK0/TO0PUART0 clock I/O, Reload timer 0 outputWhen UART0 clock output is not allowed, reload timer 0 can be output by allowing it.This pin is available as a port when neither UART0 clock output nor reload timer output is allowed.112PH1/SOT0PUART0 data outputThis function is enabled when UART0 data output is allowed.This pin is available as a port when UART0 clock output is not allowed.113PH0/SIN0PUART0 data inputSince this input is used more or less continuously while UART0 is en-gaged in input operations, output by the port needs to be stopped except when it is performed deliberately.This pin is available as a port when UART0 data input is not in use.114DREQ0/PL0FDMA external transfer request inputSince this input is used more or less continuously when selected as a DMAC transfer factor, output by the port needs to be stopped except when it is performed deliberately.This pin is available as a port when DMA external transfer request input is not in use.MB91F155A/MB91155/MB9115410(Continued) Pin No.Pin nameCircuittypeFunction115DACK0/PL1FDMA external transfer request acceptance outputThis function is enabled when the DMAC external transfer request accep-tance is allowed to be output.This pin is available as a port when the DMAC transfer request accep-tance is not allowed to be output.116DEOP0/PL2FDMA external transfer end outputThis function is enabled when the end of DMAC external transfer is al-lowed to be output.117DREQ1/PL3FDMA external transfer request inputSince this input is used more or less continuously when selected as aDMAC transfer factor, output by the port needs to be stopped except whenit is performed deliberately.This pin is available as a port when DMA external transfer request input isnot in use.118DACK1/PL4FDMA external transfer request acceptance outputThis function is enabled when the DMAC external transfer request accep-tance is allowed to be output.This pin is available as a port when DMAC transfer request acceptanceoutput is not allowed.119DEOP1/PL5FDMA external transfer end outputThis function is enabled when the end of DMAC external transfer is al-lowed to be output.120DREQ2/PL6FDMA external transfer request inputSince this input is used more or less continuously when selected as aDMAC transfer factor, output by the port needs to be stopped except whenit is performed deliberately.This pin is available as a port when DMA external transfer request input isnot in use.121DACK2/PL7FDMA external transfer request acceptance outputThis function is enabled when the DMAC external transfer request accep-tance is allowed to be output.This pin is available as a port when DMAC transfer request acceptanceoutput is not allowed.123124125DA2DA1DA0D/A converter outputThis function is enabled when D/A converter output is allowed.126DAVS Power supply pin for the D/A converter127DAVC Power supply pin for the D/A converter128AV CC Vcc power supply for the A/D converter129AVRHA/D converter reference voltage (high potential side)Be sure to turn on/off this pin with potential higher than AVRH applied toV CC.130AVRL A/D converter reference voltage (low potential side)131AV SS V SS power supply for the A/D converter11(Continued)Note : On the majority of pins listed above, the I/O port and the resource I/O are multiplexed, such as XXXX/Pxx.When the port and the resource output compete against each other on these pins, priority is given to the resource.Pin No.Pin name Circuit typeFunction132133134135136137138139AN0/PK0AN1/PK1AN2/PK2AN3/PK3AN4/PK4AN5/PK5AN6/PK6AN7/PK7NA/D converter analog inputThese pins are enabled when the AIC register is designated for analog input.These pins are available as ports when A/D converter analog input is not in use.141TEST G The TEST pin must be connected to the power supply (V CC ) 142143X0A X1A K Low-speed clock (32 kHz) oscillation pin27, 56, 68, 77, 97, 122, 140V CCPower supply pin (V CC ) for digital circuitAlways power supply pin (V CC ) must be connected to the power supply9, 26, 44, 59, 98, 101, 144V SSEarth level (V SS ) for digital circuitAlways power supply pin (V SS ) must be connected to the power supplys I/O CIRCUIT TYPE(Continued) 121314s HANDLING DEVICES1.Preventing LatchupIn CMOS ICs, applying voltage higher than V CC or lower than V SS to input/output pin or applying voltage over rating across V CC and V SS may cause latchup.This phenomenon rapidly increases the power supply current, which may result in thermal breakdown of the device. Make sure to prevent the voltage from exceeding the maximum rating.2.Treatment of Pins•Treatment of unused pinsUnused pins left open may cause malfunctions. Make sure to connect them to pull-up or pull-down resistors.•Treatment of open pinsBe sure to use open pins in open state.•Treatment of output pinsShortcircuiting an output pin with the power supply or with another output pin or connecting a large-capacity load may causes a flow of large current. If this conditions continues for a lengthy period of time, the device deteriorates. T ake great care not to exceed the absolute maximum ratings.•Mode pins (MD0-MD2)These pins should be used directly connected to either V CC or V SS. In order to prevent noise from causing accidental entry into test mode, keep the pattern length as short as possible between each mode pin and V CC or V SS on the board and connect them with low impedance.•Power supply pinsWhen there are several V CC and V SS pins, each of them is equipotentially connected to its counterpart inside of the device, minimizing the risk of malfunctions such as latch up. T o further reduce the risk of malfunctions, to prevent EMI radiation, to prevent strobe signal malfunction resulting from creeping-up of ground level and to observe the total output current standard, connect all V CC and V SS pins to the power supply or GND.It is preferred to connect V CC and V SS of MB91F155/MB91154 to power supply with minimal impedance possible.It is also recommended to connect a ceramic capacitor as a bypass capacitor of about 0.1 µF between V CC and V SS at a position as close as possible to MB91F155/MB91154.•Crystal oscillator circuitNoises around X0, X1, X0A, and X1A pins may cause malfunctions of MB91F155/MB91154. In designing the PC board, layout X0, X1 (X0A, X1A) and crystal oscillator (or ceramic oscillator) and bypass capacitor for grounding as close as possible.It is strongly recommended to design PC board so that X0, X1, X0A, and X1A pins are surrounded by grounding area for stable operation.The MB91F155A, MB91155 and MB91154 devices do not contain a feedback resistor. T o use the clock function,3.Precautions•External Reset Input•External ClocksWhen using an external clock, normally, a clock of which the phase is opposite to that of X0 must be supplied to the X0 and X1 pins simultaneously. However, when using the clock along with STOP (oscillation stopped)15mode, the X1 pin stops when “H” is input in STOP mode. T o prevent one output from competing against another, an external resistor of about 1 kΩ should be provided.The following figure shows an example usage of an external clock.4.Care During Powering Up•When powering upWhen turning on the power supply, never fail to start from setting the RST pin to “L” level. And after the power supply voltage goes to V CC level, at least after ensuring the time for 5 machine cycle, then set to “H” level.•Source oscillation inputAt turning on the power supply, never fail to input the clock before cancellation of the oscillation stabilizing waiting.•Power on resettingWhen powering up or when turning the power back on after the supply voltage drops below the operation assurance range, be sure to reset the power.•Power on sequenceT urn on the power in the order of V CC, AV CC and AVRH. The power should be disconnected in inverse order.•Even when an AD converter is not in use, connect AV CC to the V CC level and AV SS to the V SS level.•Even when a DA converter is not in use, connect DAVC to the V CC level and DAVS to the V SS level.5.When the Clock Function (Calendar Macro) Is Not in Use16s BLOCK DIAGRAM1718s CPU CORE1.Memory SpaceThe FR family has a logical address space of 4 Gbytes (232 bytes) and the CPU linearly accesses the memory space.•Direct addressing areaThe following area in the address space is used for I/O.This area is called direct addressing area and an operand address can be specified directly in an instruction.The direct addressing area varies with the data size to be accessed as follows :→ byte data access : 0-0FF H→ half word data access : 0-1FF H→ word data access : 0-3FF H19203.RegistersThe family of FR microcontrollers has two types of registers : the registers residing in the CPU which are dedicated to applications and the general-purpose registers residing in the memory.•Dedicated registers :Program counter (PC) :A 32-bit register to indicate the location where an instructions is stored.Program status (PS) :A 32-bit register to store a register pointer or a condition code.Tablebase register (TBR) :Holds the vector table lead address used when EIT (exceptions/interrupt/trap) is processed.Return pointer (RP) :Holds the address to return from a subroutine to.System stack pointer (SSP) :Points to the system stack space.User stack pointer (USP) :Points to the user stack space.Multiplication and division result register (MDH/MDL) : A 32-bit multiplication and division register.•Program status (PS)The PS register holds program status and is further divided into three registers which are a Condition Code•Condition Code Register (CCR)S flag :Designates the stack pointer for use as R15.I flag :Controls enabling and disabling of user interrupt requests.N flag :Indicates the sign when arithmetic operation results are considered to be an integer represented by 2’s complement.Z flag :Indicates if arithmetic results were “0.”V flag :Considers the operand used for an arithmetic operation to be an integer represented by 2’s com-plement and indicates if the operation resulted in an overflow.C flag :Indicates whether or not an arithmetic operation resulted in a carry or a borrow from the most sig-nificant bit.•System condition Code Register (SCR)T flag :Designates whether or not to enable step trace trap.•Interrupt Level Mask register (ILM)ILM4 to ILM0 :Holds an interrupt level mask value to be used for level masking.An interrupt request is accepted only if the corresponding interrupt level among interruptrequests input to the CPU is higher than the value indicated by the ILM register.ILM4ILM3ILM2ILM1ILM0Interrupt level High-Low 000000Higher01000151111131Lowers GENERAL-PURPOSE REGISTERSGeneral-purpose registers are CPU registers R0 through R15 and used as accumulators during various oper-Of the 16 general-purpose registers, the following registers are assumed for specific applications. For this reason, some instructions are enhanced.R13 : Virtual accumulator (AC)R14 : Frame pointer (FP)R15 : Stack pointer (SP)Initial values to which R0 through R14 are reset are not defined. The initial value of R15 is 0000 0000H (the SSP value) .s SETTING MODE1.Mode PinsAs shown in T able 1 three pins, MD2, 1, and 0 are used to indicate an operation.Table 1 Mode pins and set modes2.Mode DataThe data which the CPU writes to “0000 07FF H ” after reset is called mode data.It is the mode register (MODR) that exists at “0000 07FF H .” Once a mode is set in this register, operations will take place in that mode. The mode register can be written only once after reset.[bits 7 and 6] : M1, M0These are bus mode setting bits. Specify the bus mode to be set to after writing to the mode register.[bits 5 to 0] : ∗These bits are reserved for the system.Mode pin Mode nameReset vector access area External databus width MD2MD1MD0000External vector mode 0External 8 bits External ROM bus mode 001External vector mode 1External 16 bits 010External vector mode 2External 32 bitsNot available on thisproduct type 011External vector modeInternal (Mode register) Single-chip mode1Not availableM1M0Function Remarks00Single-chip mode01Internal ROM-external bus mode 10External ROM-external bus mode11Setting not allowed“0” should be written to these bits at all times.[Precautions When Writing to the MODR]Before writing to the MODR, be sure to set AMD0 through 5 and determine the bus width in each CS (Chip Select) area.The MODR does not have bus width setting bits.The bus width value set with mode pins MD2 through 0 is enabled before writing to the MODR and the bus width value set with BW1 and 0 of AMD0 through 5 is enabled after writing to the MODR.For example, the external reset vector is normally executed with area 0 (the area where CS0 is active) and the bus width at that time is determined by pins MD 2 through 0. Suppose that the bus width is set to 32 or 16 bits in MD2 though 0 but no value is specified in AMD 0. If the MODR is written in this state, area 0 then switches to 8-bit bus mode and operates the bus since the initial bus width in AMD0 is set to 8 bits. This causes a malfunction.。

MAX9015AEKA-T中文资料

MAX9015AEKA-T中文资料

MAX9016AEKA-T MAX9017AEKA-T MAX9017BEKA-T
Ordering Information continued at end of data sheet. Pin Configurations appear at end of data sheet. Beyond-the-Rails is a trademark of Maxim Integrated Products, Inc. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
元器件交易网
19-2874; Rev 1; 7/03
SOT23, Dual, Precision, 1.8V, Nanopower Comparators With/Without Reference
General Description
The single MAX9015/MAX9016 and dual MAX9017– MAX9020 nanopower comparators in space-saving SOT23 packages feature Beyond-the-Rails™ inputs and are guaranteed to operate down to 1.8V. The Agrade packages feature an on-board 1.236V ±1% reference, while the B-grade packages feature a 1.24V ±1.75% reference. An ultra-low supply current of 0.85µA (MAX9019/MAX9020), 1µA (MAX9015/MAX9016), or 1.2µA (MAX9017/MAX9018) makes the MAX9015– MAX9020 faቤተ መጻሕፍቲ ባይዱily of comparators ideal for all 2-cell battery monitoring/management applications. The unique design of the MAX9015–MAX9020 output stage limits supply-current surges while switching, which virtually eliminates the supply glitches typical of many other comparators. This design also minimizes overall power consumption under dynamic conditions. The MAX9015/MAX9017/MAX9019 have a push-pull output stage that sinks and sources current. Large internal output drivers allow Rail-to-Rail® output swing with loads up to 6mA. The MAX9016/MAX9018/MAX9020 have an open-drain output stage that makes them suitable for mixed-voltage system design. All devices are available in the ultra-small 8-pin SOT23 package. Refer to the MAX9117–MAX9120 data sheet for similar single comparators with or without reference in a tiny SC70 package. o Ultra-Low Total Supply Current 0.85µA (MAX9019/MAX9020) 1.0µA (MAX9015A/MAX9016A) 1.2µA (MAX9017/MAX9018) o Guaranteed Operation Down to 1.8V o Precision VOS < 5mV (max) o Internal 1.236V ±1% Reference (A Grade) o Input Voltage Range Extends 200mV Beyond-the-Rails o CMOS Push-Pull Output with ±6mA Drive Capability (MAX9015/MAX9017/MAX9019) o Open-Drain Output Versions Available (MAX9016/MAX9018/MAX9020) o Crowbar-Current-Free Switching o Internal 4mV Hysteresis for Clean Switching o No Phase Reversal for Overdriven Inputs o Dual Versions in Space-Saving 8-Pin SOT23 Package

MB50

MB50
新长征 新使命
历史缔造专业,实力铸就辉煌 贵州长征开关制造有限公司承继原
长征电器九厂和低压一厂四十载之深厚渊源,力创“长九”优秀民 族品牌,矢志成为中国最专业、最优秀的智能电气产品供应商。用 时间证明一切,用使命丈量成长,长征开关将以“长征人”之无畏 信念与创新精神,续写更为璀璨夺目的传奇篇章!
主 要 代 表 业 绩 选 编
1 2
6 5
3 4
① 灭弧室 ② 触头系统 ③ 复式脱扣器 ④ 脱扣器按钮 ⑤ 手柄 ⑥ 断路器外壳
长九品牌开关拥有四十多年的断路器研发制造经验,其技术水平一直处于国内 领先地位,MB50系列塑壳断路器是为供配电系统的不同负荷量身定制的新产 品。应用于配电和电动机保护场所,CBI功能产品更适用消防系统,保障供电 连续性。
遵循标准
GB14048.1 《低压开关设备和控制设备 第1部分:总则》 GB14048.2 《低压开关设备和控制设备 第2部分:断路器》 GB14048.4 《低压开关设备和控制设备 机电式接触器和电动机起动器》 IEC60947-2 《低压开关设备和控制设备 第2部分:断路器》
长九MB50-2011 02
目 录 CONTENTS
MB50系列 塑 壳 断 路 器
产品概述 ..........................................................................................................01 型号说明...........................................................................................................03 应用场合 用于配电保护(含电机保护).........................................................04 应用场合 过载报警不脱扣(CBI)................................................................. 08 特性曲线...........................................................................................................12 三极外形及安装尺寸........................................................................................ 16 MB50系列附件................................................................................................ 20 安装使用说明................................................................................................... 28 订货须知.......................................................................................................... 29

MB95560_570_580_CN介绍

MB95560_570_580_CN介绍

Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.7FUJITSU SEMICONDUCTOR数据手册如需有关微控制器支持的信息,请访问以下网站:/micom/en-support/8位微控制器CMOSNew 8FX MB95560H/570H/580H 系列MB95F562H/F562K/F563H/F563K/F564H/F564K MB95F572H/F572K/F573H/F573K/F574H/F574K MB95F582H/F582K/F583H/F583K/F584H/F584K■概要MB95560H/570H/580H 系列是通用单芯片微控制器产品。

该系列的微控制器不仅包含精简指令集,而且内置多种外设功能。

■特征• F 2MC-8FX CPU 内核控制器最优化指令集• 乘除指令• 16位算术运算• 位检测跳转指令• 位操作指令等注:F 2MC 是FUJITSU Flexible Microcontroller 的缩写。

•时钟• 可选择主时钟源主振荡时钟(高达16.25 MHz, 最大机器时钟频率: 8.125 MHz)外部时钟(高达32.5 MHz, 最大机器时钟频率: 16.25 MHz)主CR 时钟(4 MHz ± 2%)当PLL 倍频器为2时,主CR 时钟频率变为8 MHz 。

当PLL 倍频器为2.5时,主CR 时钟频率变为10 MHz 。

当PLL 倍频器为3时,主CR 时钟频率变为12 MHz 。

当PLL 倍频器为4时,主CR 时钟频率变为16 MHz 。

• 可选择副时钟源副振荡时钟(32.768 kHz)外部时钟(32.768 kHz)副CR 时钟(典型值: 100 kHz, 最小值: 50 kHz, 最大值: 150 kHz)•定时器• 8/16位多功能定时器× 2路通道• 时基定时器 × 1路通道• 计时预分频器 × 1路通道•LIN-UART (仅安装在MB95F562H/F562K/F563H/F563K/F564H/F564K/F582H/F582K/F583H/F583K/F584H/F584K)• 全双工双缓冲器• 支持时钟同步串行数据传输和时钟异步串行数据传输(转下页)DS702-00010-2v0-ZMB95560H/570H/580H系列(承上页)•外部中断• 沿检测中断(可选择上升沿、下降沿或双沿)• 可用于将器件从不同低功耗模式(待机模式)中唤醒• 8/10位A/D转换器• 可选择8位或10位分辨率•低功耗(待机)模式• 停止模式• 休眠模式• 计时模式• 时机定时器模式•I/O口• MB95F562H/F563H/F564H (最多I/O口数: 16个)通用I/O口(N-ch开漏):1个通用I/O口(CMOS I/O): 15个• MB95F562K/F563K/F564K (最多I/O口数: 17个)通用I/O口(N-ch开漏):2个通用I/O口(CMOS I/O): 15个• MB95F572H/F573H/F574H (最多I/O口数: 4个)通用I/O口(N-ch开漏):1个通用I/O口(CMOS I/O): 3个• MB95F572K/F573K/F574K (最多I/O口数: 5个)通用I/O口(N-ch开漏):2个通用I/O口(CMOS I/O): 3个• MB95F582H/F583H/F584H (最多I/O口数: 12个)通用I/O口(N-ch开漏):1个通用I/O口(CMOS I/O): 11个• MB95F582K/F583K/F584K (最多I/O口数: 13个)通用I/O口(N-ch开漏):2个通用I/O口(CMOS I/O): 11个•片上调试• 单线串行控制• 支持串行编程(异步模式)•硬件/软件监视定时器• 内置硬件监视定时器• 内置软件监视定时器•上电复位•上电时,发生上电复位。

MB90F462PF中文资料

MB90F462PF中文资料

2
元器件交易网
MB90460 Series
• Low-power consumption mode : Sleep mode Stop mode CPU intermittent operation mode • Package : QFP-64 (FPT-64P-M09 : 0.65 mm pitch) QFP-64 (FPT-64P-M06 : 1.00 mm pitch) SDIP-64 (DIP-64P-M01 : 1.78 mm pitch) • CMOS technology
s FEATURES
• Minimum execution time : 62.5 ns/4 MHz oscillation (Uses PLL clock multiplication) maximum multiplier = 4 • Maximum memory space 16 Mbyte Linear/bank access (Continued) 64-pin plastic QFP 64-pin plastic LQFP 64-pin plastic SH-DIP
元器件交易网
FUJITSU SEMICONDUCTOR DATA SHEET
DS07-13714-1E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90460 Series
MB90462/467/F462/V460
s DESCRIPTION
Timer function (select the counter timer from three internal clocks) Various Pulse width measuring function (H pulse width, L pulse width, rising edge to falling edge period, falling edge to rising edge period, rising edge to rising edge period and falling edge to falling edge period) UART : 2 channels With full-duplex double buffer (8-bit length) Clock asynchronized or clock synchronized transmission (with start and stop bits) can be selectively used Transmission can be one-to-one (bi-directional commuication) or one-to-n (MasterSlave communication) Reload timer : 2 channels Reload mode, single-shot mode or event count mode selectable Can be worked with a multi-pulse generator or individually PPG timer : 3 channels PPG timer : 2ch PWM mode or single-shot mode selectable Can be worked with multi-functional timer / multi-pulse generator or individually 16-bit free-running timer with up or up/down mode selection and buffer : 1 channel 16-bit output compare : 6 channels 16-bit input capture : 4 channels 16-bit PPG timer : 1 channel Waveform generator (16-bit timer : 3 channels, 3-phase waveform or dead time) 16-bit PPG timer : 1 channel 16-bit reload timer operation (toggle output, one shot output selectable) Event counter function : 1 channel built-in A waveform sequencer (includes 16-bit timer with buffer and compare clear function) 8/10-bit resolution (8 channels) Conversion time : Less than 6.13 µS (16 MHz internal clock) 8 independent channels Selectable causes : Rising edge, falling edge, “L” level or “H” level Stop mode / Sleep mode / CPU intermittent operation mode

MB90F345CE资料

MB90F345CE资料

DS07-13747-1EFUJITSU SEMICONDUCTORDATA SHEETCopyright©2006 FUJITSU LIMITED All rights reserved“Check Sheet” is seen at the following support pageURL : /global/services/microelectronics/product/micom/support/index.html“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system development.Be sure to refer to the “Check Sheet” for the latest cautions on development.16-bit Proprietary MicrocontrollerCMOSF 2MC-16LX MB90340E SeriesMB90F342E(S), MB90F342CE(S), MB90F343E(S), MB90F343CE(S), MB90F345E(S), MB90F345CE(S), MB90F346E(S), MB90F346CE(S), MB90F347E(S), MB90F347CE(S), MB90F349E(S), MB90F349CE(S),MB90341E(S), MB90341CE(S), MB90342E(S), MB90342CE(S), MB90346E(S), MB90346CE(S), MB90347E(S), MB90347CE(S), MB90348E(S), MB90348CE(S), MB90349E(S), MB90349CE(S), MB90V340E-101/102■DESCRIPTIONThe MB90340E-series with up to 2 FULL-CAN* interfaces and Flash ROM is especially designed for automotive and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip Flash ROM program memory up to 512 Kbytes.The power to the MCU core (3V) is supplied by a built-in regulator circuit, giving these microcontrollers superior performance in terms of power consumption and tolerance to EMI.* : Controller Area Network (CAN) - License of Robert Bosch GmbH Note : F 2MC is the abbreviation of FUJITSU Flexible Microcontroller.MB90340E Series2■FEATURES• CPU•Instruction system best suited to controller- Wide choice of data types (bit, byte, word, and long word)- Wide choice of addressing modes (23 types)- Enhanced functionality with signed multiply and divide instructions and the RETI instruction- Enhanced high-precision computing with 32-bit accumulator•Instruction system compatible with high-level language (C language) and multitask- Employing system stack pointer- Various enhanced pointer indirect instructions- Barrel shift instructions•Increased processing speed- 4-byte instruction queue• Serial interface•UART (LIN/SCI) : up to 4 channels- Equipped with full-duplex double buffer- Clock-asynchronous or clock-synchronous serial transmission is available•I2C interface*1 : up to 2 channels (only for devices with a C suffix in the part number)- Up to 400 Kbits/s transfer rate• Interrupt controller•Powerful 8-level, 34-condition interrupt feature•Up to 16 external interrupts are supported•Automatic data transfer function independent of CPU- Expanded intelligent I/O service function (EI2OS) : up to 16 channels• I/O ports•General-purpose input/output port (CMOS output)- 80 ports (for devices without an S suffix in the part number - i.e. devices that support the sub clock) - 82 ports (for devices with an S suffix in the part number - i.e. devices that do not support the sub clock)• 8/10-bit A/D converter : 16 channels24 channels (only for devices with a C suffix in the part number)•Resolution is selectable between 8-bit and 10-bit.•Activation by external trigger input is allowed.•Conversion time : 3 µs (at 24-MHz machine clock, including sampling time)• Program patch function•Detects address matches against 6 address pointers• Timer•Time-base timer, watch timer, watchdog timer : 1 channel•8/16-bit PPG timer : 8-bit × 16 channels, or 16-bit × 8 channels•16-bit reload timer : 4 channels•16-bit input/output timer- 16-bit free-run timer : 2 channels(FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)- 16-bit input capture: (ICU): 8 channels- 16-bit output compare: (OCU): 8 channelsMB90340E Series3• Full-CAN controller*2•Up to 2 channels•Compliant with Ver2.0A and Ver2.0B CAN specifications •16 built-in message buffers •CAN wake-up function• Low power consumption (standby) mode•Sleep mode (a mode that halts CPU operating clock)•Timebase timer mode (a mode where only the oscillation clock, sub clock, timebase timer and watch timer operate)•Watch mode (a mode that operates sub clock and clock timer only)•Stop mode (a mode that stops oscillation clock and sub clock)•CPU intermittent operation mode • Technology•0.35 µm CMOS technology*1 : I 2C license :Purchase of Fujitsu I 2C components conveys a license under the Philips I 2C Patent Rights to use, these com-ponents in an I 2C system provided that the system conforms to the I 2C Standard Specification as defined by Philips.*2 : Controller Area Network (CAN) - License of Robert Bosch GmbH.MB90340E Series4■PRODUCT LINEUP(Continued) Part NumberParameterMB90V340E-101,MB90V340E-102MB90F342E(S), MB90F342CE(S),MB90F343E(S)*1, MB90F343CE(S)*1,MB90F345E(S), MB90F345CE(S),MB90F346E(S), MB90F346CE(S),MB90F347E(S), MB90F347CE(S),MB90F349E(S), MB90F349CE(S)MB90341E(S)*1, MB90341CE(S)*1,MB90342E(S)*1, MB90342CE(S)*1,MB90346E(S), MB90346CE(S),MB90347E(S), MB90347CE(S),MB90348E(S)*1, MB90348CE(S)*1,MB90349E(S)*1, MB90349CE(S)*1 Type Evaluation products Flash memory products MASK ROM productsCPU F2MC-16LX CPUSystem clockOn-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6)ROM External512 Kbytes :MB90F345E(S), MB90F345CE(S)384 Kbytes :MB90F343E(S), MB90F343CE(S)256 Kbytes :MB90F342E(S), MB90F342CE(S),MB90F349E(S), MB90F349CE(S)128 Kbytes :MB90F347E(S), MB90F347CE(S)64 Kbytes :MB90F346E(S), MB90F346CE(S)256 Kbytes :MB90342E(S), MB90342CE(S),MB90349E(S), MB90349CE(S)128 Kbytes :MB90341E(S), MB90341CE(S),MB90348E(S), MB90348CE(S),MB90347E(S), MB90347CE(S)64 Kbytes :MB90346E(S), MB90346CE(S) RAM30 Kbytes20 Kbytes :MB90F343E(S), MB90F343CE(S),MB90F345E(S), MB90F345CE(S)16 Kbytes :MB90F342E(S), MB90F342CE(S),MB90F349E(S), MB90F349CE(S)6 Kbytes :MB90F347E(S), MB90F347CE(S)2 Kbytes :MB90F346E(S), MB90F346CE(S)16 Kbytes :MB90341E(S), MB90341CE(S),MB90342E(S), MB90342CE(S),MB90348E(S), MB90348CE(S),MB90349E(S), MB90349CE(S)6 Kbytes :MB90347E(S), MB90347CE(S)2 Kbytes :MB90346E(S), MB90346CE(S)Emulator-specificpower supply*2Yes⎯Technology0.35 µm CMOS withregulator for built-inpower supply0.35 µm CMOS with built-in power supply regulator +Flash memory with Charge pump for programming voltageOperatingvoltage range5 V ± 10%3.5 V to 5.5 V : When normal operating (not using A/D converter)4.0 V to5.5 V : When using the A/D converter/Flash programming4.5 V to5.5 V : When using the external busTemperature range⎯−40 °C to +105 °CPackage PGA-299QFP-100, LQFP-100UART5 channels 4 channelsWide range of baud rate settings using a dedicated reload timerSpecial synchronous options for adapting to different synchronous serial protocolsLIN functionality working either as master or slave LIN deviceI2C (400 kbps) 2 channelsDevices with a C suffix in the part number : 2channelsDevices without a C suffix in the part number : ⎯MB90340E Series5(Continued)Part NumberParameterMB90V340E-101, MB90V340E-102MB90F342E(S), MB90F342CE(S),MB90F343E(S)*1, MB90F343CE(S)*1,MB90F345E(S), MB90F345CE(S),MB90F346E(S), MB90F346CE(S),MB90F347E(S), MB90F347CE(S),MB90F349E(S), MB90F349CE(S)MB90341E(S)*1, MB90341CE(S)*1,MB90342E(S)*1, MB90342CE(S)*1,MB90346E(S), MB90346CE(S),MB90347E(S), MB90347CE(S),MB90348E(S)*1, MB90348CE(S)*1,MB90349E(S)*1, MB90349CE(S)*1A/D Converter24 input channelsDevices with a C suffix in the part number : 24 channels Devices without a C suffix in the part number : 16 channels10-bit or 8-bit resolutionConversion time : Min 3 µs include sample time (per one channel)16-bit Reload Timer (4 channels)Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency)Supports External Event Count function 16-bit I/O Timer (2 channels)Generates an interrupt signal on overflowSupports Timer Clear when the output compare finds a matchOperation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27(fsys = Machine clock freq.)I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/716-bit Output Compare (8 channels)Generates an interrupt signal when one of the 16-bit I/O timer matches the output compare registerA pair of compare registers can be used to generate an output signal.16-bit Input Capture (8 channels)Rising edge, falling edge or rising & falling edge sensitive Signals an interrupt upon external event8/16-bitProgrammable Pulse Generator8 channels (16-bit) /16 channels (8-bit)Sixteen 8-bit reload countersSixteen 8-bit reload registers for L pulse width Sixteen 8-bit reload registers for H pulse widthSupports 8-bit and 16-bit operation modesA pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit prescaler plus 8-bit reload counterOperating clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz (fsys = Machine clock frequency, fosc = Oscillation clock frequency)CAN Interface3 channels2 channels :MB90F342E(S), MB90F342CE(S),MB90F343E(S), MB90F343CE(S),MB90F345E(S), MB90F345CE(S)1 channel :MB90F346E(S), MB90F346CE(S),MB90F347E(S), MB90F347CE(S),MB90F349E(S), MB90F349CE(S)2 channels :MB90341E(S), MB90341CE(S),MB90342E(S), MB90342CE(S)1 channel :MB90346E(S), MB90346CE(S),MB90347E(S), MB90347CE(S),MB90348E(S), MB90348CE(S),MB90349E(S), MB90349CE(S)Conforms to CAN Specification Version 2.0 Part A and B Automatic re-transmission in case of errorAutomatic transmission in response to Remote Frames Prioritized 16 message buffers for data and ID’s Supports multiple messagesFlexible configuration of acceptance filtering :Full bit compare/Full bit mask/Two partial bit masks Supports up to 1 MbpsMB90340E Series6(Continued)*1 : These devices are under development.*2 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used.Please refer to the Emulator hardware manual for details.*3 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.Part NumberParameterMB90V340E-101,MB90V340E-102MB90F342E(S), MB90F342CE(S),MB90F343E(S)*1, MB90F343CE(S)*1,MB90F345E(S), MB90F345CE(S),MB90F346E(S), MB90F346CE(S),MB90F347E(S), MB90F347CE(S),MB90F349E(S), MB90F349CE(S)MB90341E(S)*1, MB90341CE(S)*1,MB90342E(S)*1, MB90342CE(S)*1,MB90346E(S), MB90346CE(S),MB90347E(S), MB90347CE(S),MB90348E(S)*1, MB90348CE(S)*1,MB90349E(S)*1, MB90349CE(S)*1 External Interrupt(16 channels)Can be used rising edge, falling edge, starting up by H/L level input, external interrupt,expanded intelligent I/O services (EI2OS) and DMAD/A converter 2 channels⎯Sub clock(maximum 100kHz)Only forMB90V340E-102Devices with sub clock : devices without an S suffix in the part numberDevices without sub clock : devices with an S suffix in the part number I/O PortsVirtually all external pins can be used as general purpose I/O portAll ports are push-pull outputsBit-wise settable as input/output or peripheral signalCan be configured 8 as CMOS schmitt trigger/ automotive inputs (in blocks of 8 pins)TTL input level settable for external bus (32-pin only for external bus)Flash Memory⎯Supports automatic programming, Embedded Algorithm TM*3Write/Erase/Erase-Suspend/Resume commandsA flag indicating completion of the algorithmNumber of erase cycles : 10000 cyclesData retention time : 20 yearsBoot block configurationErase can be performed on each blockBlock protection with external programming voltageFlash Security Feature for protecting the content of the Flash (exceptfor MB90F346E(S) and MB90F346CE (S) )MB90340E Series ■PIN ASSIGNMENTS7MB90340E Series8MB90340E Series •MB90F342E(S) / MB90F343E(S) / MB90F345E(S) / MB90F346E(S) / MB90F347E(S) / MB90F349E(S) /9MB90340E Series10•MB90F342CE(S) / MB90F343CE(S) / MB90F345CE(S) / MB90F346CE(S) / MB90F347CE(S) /MB90F349CE(S) / MB90341CE(S) / MB90342CE(S) /MB90346CE(S) / MB90347CE(S) / MB90348CE(S) /111213■PIN DESCRIPTION(Continued)Pin No.Pin nameI/O Circuit type*3FunctionQFP100*1LQFP100*21 to 499 to 2P24 to P27GGeneral purpose I/O pins. The register can be set to selectwhether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when the corresponding bit in the external address output control register (HACR) is 1.A20 to A23Output pins of the external address bus. When the corresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A20 to A23).IN0 to IN3Trigger input pins for input captures.53P30G General purpose I/O pin.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.ALE Address latch enable output pin. This function is enabled when the external bus is enabled.IN4Trigger input pin for input capture.64P31G General purpose I/O pin.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.RD External read strobe output pin. This function is enabled when the external bus is enabled.IN5Trigger input pin for input capture.75P32GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the WR/WRL pin output is disabled.WR / WRLWrite strobe output pin for the external data bus. This function is enabled when both the external bus and the WR/WRL pin output are enabled. WRL is used to write-strobe 8 lower bits of the data bus in 16-bit access while WR is used to write-strobe 8 bits of the data bus in 8-bit access.INT10R External interrupt request input pin.86P33GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled either in single-chip mode or when the WRH pin output is disabled.WRHWrite strobe output pin for the upper 8 bits of the external data bus. This function is enabled when the external bus is enabled, when the external bus 16-bit mode is selected, and when the WRH output pin is enabled.14(Continued)Pin No.Pin nameI/O Circuit type*3FunctionQFP100*1LQFP100*297P34GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the hold function is disabled.HRQ Hold request input pin. This function is enabled when both the external bus and the hold function are enabled.OUT4Waveform output pin for output compare.108P35G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the hold function is disabled.HAK Hold acknowledge output pin. This function is enabled when both the external bus and the hold function are enabled.OUT5Waveform output pin for output compare.119P36G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the external ready function is disabled.RDY External ready input pin. This function is enabled when both the external bus and the external ready function are enabled.OUT6Waveform output pin for output compare.1210P37G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or when the clock output is disabled.CLK Clock output pin. This function is enabled when both the external bus and clock output are enabled.OUT7Waveform output pin for output compare OCU713, 1411, 12P40, P41F General purpose I/O pins.(devices with an S suffix in the part number and or MB90V340E-101)X0A , X1AB Oscillation pins for sub clock(devices without an S suffix in the part number and or MB90V340E-102)1513V CC ⎯Power (3.5 V to 5.5 V) input pin 1614V SS ⎯GND pin1715C K This is the power supply stabilization capacitor This pin should be connected to a ceramic capacitor with a capacitance greater than or equal to 0.1 µF. 1816P42F General purpose I/O pin.IN6Trigger input pin for input capture.RX1RX input pin for CAN1 Interface(MB90F342E/F343E/F345E/341E/342E only)INT9RExternal interrupt request input pin15(Continued)Pin No.Pin name I/O Circuit type*3FunctionQFP100*1LQFP100*21917P43FGeneral purpose I/O pin.IN7Trigger input pin for input capture.TX1TX Output pin for CAN1(MB90F342E/F343E/F345E/341E/342E only)2018P44HGeneral purpose I/O pin.SDA0Serial data I/O pin for I 2C (devices with a C suffix in the part number)FRCK0Input pin for the 16-bit I/O Timer 02119P45HGeneral purpose I/O pin.SCL0Serial clock I/O pin for I 2C (devices with a C suffix in the part number)FRCK1Input pin for the 16-bit I/O Timer 2220P46HGeneral purpose I/O pin.SDA1Serial data I/O pin for I 2C (devices with a C suffix in the part number)2321P47HGeneral purpose I/O pin.SCL1Serial clock I/O pin for I 2C (devices with a C suffix in the part number)2422P50OGeneral purpose I/O pin.AN8Analog input pin for the A/D converter SIN2Serial data input pin for UART22523P51I General purpose I/O pin.AN9Analog input pin for the A/D converter SOT2Serial data output pin for UART22624P52I General purpose I/O pin.AN10Analog input pin for the A/D converter SCK2Clock I/O pin for UART22725P53I General purpose I/O pin.AN11Analog input pin for the A/D converter TIN3Event input pin for the reload timer 2826P54I General purpose I/O pin.AN12Analog input pin for the A/D converter TOT3Output pin for the reload timer 2927P55I General purpose I/O pin.AN13Analog input pin for the A/D converter 30, 3128, 29P56, P57J General purpose I/O pins.AN14, AN15Analog input pins for the A/D converter 3230AV CCKAnalog power input pin for the A/D Converter16(Continued)Pin No.Pin nameI/O Circuit type*3FunctionQFP100*1LQFP100*23331AVRH L Reference voltage input pin for the A/D Converter. This power supply must be turned on or off while a voltage higher than or equal to AVRH is applied to AV CC .3432AVRL K Lower reference voltage input pin for the A/D Converter 3533AV SS KAnalog GND pin for the A/D Converter 36 to 4334 to 41P60 to P67IGeneral purpose I/O pins.AN0 to AN7Analog input pins for the A/D converter PPG0, 2, 4, 6, 8, A, C, EOutput pins for PPGs4442V SS ⎯GND pin45 to 5043 to 48P70 to P75IGeneral purpose I/O pins.AN16 to AN21Analog input pins for the A/D converter (devices with a C suffix in the part number)INT0 to INT5External interrupt request input pins 5149MD2D Input pin for specifying the operating mode.52, 5350, 51MD1, MD0C Input pins for specifying the operating mode.5452RST EReset input55, 5653, 54P76, P77IGeneral purpose I/O pins.AN22, AN23Analog input pins for the A/D converter (devices with a C suffix in the part number)INT6, INT7External interrupt request input pins 5755P80FGeneral purpose I/O pin.TIN0Event input pin for the reload timer ADTG Trigger input pin for the A/D converter INT12R External interrupt request input pin 5856P81FGeneral purpose I/O pin.TOT0Output pin for the reload timer CKOT Output pin for the clock monitor INT13R External interrupt request input pin 5957P82MGeneral purpose I/O pin.SIN0Serial data input pin for UART0TIN2Event input pin for the reload timer INT14R External interrupt request input pin 6058P83F General purpose I/O pin.SOT0Serial data output pin for UART0TOT2Output pin for the reload timer17(Continued)Pin No.Pin name I/O Circuit type*3FunctionQFP100*1LQFP100*26159P84FGeneral purpose I/O pin.SCK0Clock I/O pin for UART0INT15RExternal interrupt request input pin6260P85M General purpose I/O pin.SIN1Serial data input pin for UART16361P86F General purpose I/O pin.SOT1Serial data output pin for UART16462P87F General purpose I/O pin.SCK1Clock I/O pin for UART16563V CC ⎯Power (3.5 V to 5.5 V) input pin 6664V SS ⎯GND pin67 to 7065 to 68P90 to P93FGeneral purpose I/O pin PPG1, 3, 5, 7Output pins for PPGs 71 to 7469 to 72P94 to P97FGeneral purpose I/O pinOUT0 to OUT3Waveform output pins for output compares. This function is enabled when the OCU enables waveform output.7573PA0FGeneral purpose I/O pin.RX0RX input pin for CAN0 Interface INT8RExternal interrupt request input pin7674PA1FGeneral purpose I/O pin.TX0TX Output pin for CAN077 to 8475 to 82P00 to P07GGeneral purpose I/O pins. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.AD00 to AD07I/O pins for 8 lower bits of the external address/data bus. This function is enabled when the external bus is enabled.INT8 to INT15External interrupt request input pins.8583P10GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD08I/O pin for the external address/data bus.This function is enabled when the external bus is enabled.TIN1Event input pin for the reload timer18(Continued)Pin No.Pin nameI/O Circuit type*3FunctionQFP100*1LQFP100*28684P11GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode.AD09I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.TOT1Output pin for the reload timer8785P12N General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD10I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.SIN3Serial data input pin for UART3INT11R External interrupt request input pin8886P13G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD11I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.SOT3Serial data output pin for UART38987P14G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD12I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.SCK3Clock I/O pin for UART39088V CC ⎯Power (3.5 V to 5.5 V) input pin 9189V SS ⎯GND pin9290X1A Main clock output pin 9391X0Main clock input pin9492P15G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD13I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.9593P16G General purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD14I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.19(Continued)*1 : FPT-100P-M06*2 : FPT-100P-M05*3 : For I/O circuit type, refer to “■ I/O CIRCUIT TYPE”.Pin No.Pin nameCircuit type*3FunctionQFP100*1LQFP100*29694P17GGeneral purpose I/O pin. The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode.AD15I/O pin for the external address/data bus. This function is enabled when the external bus is enabled.97 to 10095 to 98P20 to P23GGeneral purpose I/O pins. The register can be set to select whether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when thecorresponding bit in the external address output control register (HACR) is 1.A16 to A19Output pins of the external address bus. When thecorresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A16 to A19).PPG9,PPGB,PPGD,PPGFOutput pins for PPGs■I/O CIRCUIT TYPE(Continued) 20■HANDLING DEVICES1.Preventing latch-upCMOS IC chips may suffer latch -up under the following conditions:•A voltage higher than V CC or lower than V SS is applied to an input or output pin.•A voltage higher than the rated voltage is applied between V CC and V SS pins.•TheAV CC power supply is applied before the V CC voltage.Latch-up may increase the power supply current drastically, causing thermal damage to the device.For the same reason, also be careful not to let the analog power-supply voltage (AV CC , AVRH) exceed the digital power-supply voltage.2.Handling unused pinsLeaving unused input pins open may result in misbehavior or latch-up and possible permanent damage to the device. Therefore they must be pulled up or pulled down through resistors. In this case those resistors should be more than 2 k Ω .Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above described connection.3.Power supply pins (V CC /V SS )•If there are multiple V CC and V SS pins, that are designed to be set to the same potential are connected the inside of the device to prevent malfunctions such as latch-up.T o reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level,and observe the standard for total output current, be sure to connect the V CC and V SS pins to the power supply and ground externally. Connect V CC and V SS pins to the device from the current supply source at a low imped-ance.•As a measure against power supply noise, connect a capacitor of about 0.1 µF as a bypass capacitor between V CC and V SS pins in the vicinity of V CC and V SS pins of the device4.Mode Pins (MD0 to MD2)Connect the mode pins directly to V CC or V SS pins. To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to minimize the distance from the mode pins to V CC or V SS pins and to provide a low-impedance connection.Vcc VssVss VccVssVcc MB90340E SeriesVcc VssVccVss。

MB90F562BPF资料

MB90F562BPF资料

Internal mask ROM product 32 Kbytes 1 Kbytes
CPU functions
Number of instructions : 351 Minimum instruction execution time : 62.5 ns for a 4 MHz oscillation (with ×4 multiplier) Addressing modes : 23 modes Program patch function : 2 address pointers Maximum memory space : 16 Mbytes I/O ports (CMOS) : 51 Full-duplex, double-buffered Clock synchronous or asynchronous operation selectable Can be used as I/O serial Internal dedicated baud rate generator 2 channels 16-bit reload timer operation 2 channels 16-bit free-run timer × 1 channel Output compare × 6 channels Input capture × 4 channels 8/16-bit PPG timer (8-bit × 6 channels or 16-bit × 3 channels) Waveform generator (8-bit timer × 3 channels) 3-phase waveform output, deadtime output 8 channels (multiplexed input) 8-bit or 10-bit resolution selectable Conversion time : 6.13 µs (min.) (for maximum machine clock speed 16 MHz) 8 channels (8 channels available, shared with A/D input) Interrupt triggers : “L” → “H” edge, “H” → “L” edge, “L” level, “H” level (selectable) Sleep mode, timebase timer mode, stop mode, and CPU intermittent operation mode CMOS 5 V ± 10%

MB90F562BPFM中文资料

MB90F562BPFM中文资料
s DESCRIPTION
The MB90560/565 series is a general-purpose 16-bit microcontroller designed for industrial, OA, and process control applications that require high-speed real-time processing. The device features a multi-function timer able to output a programmable waveform. The microcontroller instruction set is based on the same AT architecture as the F2MC-8L and F2MC-16L families with additional instructions for high-level languages, extended addressing modes, enhanced signed multiplication and division instructions, and a complete range of bit manipulation instructions. The microcontroller has a 32-bit accumulator for processing long word (32-bit) data.
s FEATURES
• Clock • Internal oscillator circuit and PLL clock multiplication circuit • Oscillation clock Clock speed selectable from either the machine clock, main clock, or PLL clock. The main clock is the oscillation clock divided into 2 (0.5 MHz to 8 MHz for a 1 MHz to 16 MHz base oscillation) . The PLL clock is the oscillation clock multiplied by one to four (4 MHz to 16 MHz for a 4 MHz base oscillation) . • Minimum instruction execution time : 62.5 ns (for oscillation = 4 MHz, PLL clock setting = × 4, VCC = 5.0 V) • Maximum CPU memory space : 16 MB • 24-bit addressing • Bank addressing (Continued)

集成电路型号功能对照表20页word文档

集成电路型号功能对照表20页word文档

集成电路型号功能对照表0206A 天线开关集成电路03VFG9 发射压控振荡集成电路1021AC 发射压控振荡集成电路1097C 升压集成电路140N 电源取样比较放大集成电路14DN363 伺服控制集成电路15105 充电控制集成电路15551 管理卡升压集成电路1710 视频信号处理集成电路1N706 混响延时集成电路20810-F6096 存储集成电路2252B 微处理集成电路2274 延迟集成电路24C01ACEA 存储集成电路24C026 存储集成电路24C04 存储集成电路24C64 码片集成电路24LC16B 存储集成电路24LC65 电可改写编程只读存储集成电路27C1000PC-12 存储集成电路27C2000QC-90 存储集成电路27C20T 存储集成电路27C512 电可改写编程只读存储集成电路2800 红外遥控信号接收集成电路28BV64 码片集成电路28F004 版本集成电路31085 射频电源集成电路32D54 电源、音频信号处理集成电路32D75 电源、音频信号处理集成电路32D92 电源中频放大集成电路4066B 电子开关切换集成电路4094 移位寄存串入、并出集成电路424260SDJ 存储集成电路4260 动态随机存储集成电路4270351/91B9905 中频放大集成电路4370341/90M9919 中频处理集成电路4464 存储集成电路4558 双运算放大集成电路4580D 双运算放大集成电路47C1638AN-U337 微处理集成电路47C1638AU-353 微处理集成电路47C432GP 微处理集成电路47C433AN-3888 微处理集成电路49/4CR1A 中频放大集成电路5101 天线开关集成电路5G052 发光二极管四位显示驱动集成电路5G24 运算放大集成电路5W01 双运算放大集成电路649/CRIA70612 中频放大集成电路673/3CR2A 多模转换集成电路74122 可重触发单稳态集成电路74HC04 逻辑与非门集成电路74HC04D 六反相集成电路74HC123 单稳态集成电路74HC125 端口功能扩展集成电路74HC14N 六反相集成电路74HC157A 多路转换集成电路74HC165 移相寄存集成电路74HC245 总线收发集成电路74HC32 或门四2输入集成电路74HC374八D 触发集成电路74HC573D 存储集成电路74HCT157 多路转换双输入集成电路74HCT4046A 压控振荡集成电路74HCT4538D 单稳态集成电路74HCT4538N 触发脉冲集成电路74HCT86D 异或门四2输入集成电路74HCU04 与非门集成电路74LS125 端口功能扩展集成电路74LS373 锁存集成电路74LS393 计数双四位二进制集成电路74LS74双D 触发集成电路78014DFP 系统控制处理集成电路811N 伴音阻容偏置集成电路83D33 压控振荡集成电路85712 场扫描信号校正处理集成电路85713 行扫描信号校正集成电路87C52 微处理集成电路87CK38N-3584 微处理集成电路87CK38N-3627 微处理集成电路89C52 系统控制处理集成电路89C55 系统控制处理集成电路93C66 电可改写编程只读存储集成电路93LC56 电可改写编程存储集成电路9821K03 系统控制集成电路A1642P 背景歌声消除集成电路A701 红外遥控信号接收集成电路A7950 场频识别集成电路A8772AN 色差信号延迟处理集成电路A9109 功率放大集成电路AAB 电源集成电路ACA650 色度信号解调集成电路ACFP2 色度、亮度信号分离集成电路ACP2371 多伴音、多语言改善集成电路ACVP2205 色度、亮度信号分离集成电路AD1853 立体声数/模转换集成电路AD1858 音频解调集成电路AD722 视频编码集成电路ADC2300E 音频数/模转换集成电路ADC2300J 音频数/模转换集成电路ADC2310E 音频数/模转换集成电路ADV7172 视频编码集成电路ADV7175A 视频编码集成电路AE31201 频率显示集成电路AJ7080 射频调制集成电路AK4321-VF-E1 音频数/模转换集成电路AN1319 双高速电压比较集成电路AN1358S 双运算放大集成电路AN1393 双运算放大集成电路AN1431T 稳压电源集成电路AN1452 音频前置放大集成电路AN1458S 双运算放大集成电路AN206 伴音中频及前置放大集成电路AN222 自动频率控制集成电路AN236 副载波信号处理集成电路AN239Q 图像、伴音中频放大集成电路AN247P 图像中频放大、AGC控制集成电路AN253P 调频/调幅中频放大集成电路AN262 音频前置放大集成电路AN2661NK 视频信号处理集成电路AN2663K 视频信号处理集成电路AN272 音频功率放大集成电路AN2751FAP 视频信号处理集成电路AN281 色度解码集成电路AN2870FC 多功能控制集成电路AN295 行、场扫描信号处理集成电路AN301 伺服控制集成电路AN305 视频自动增益控制集成电路AN306 色度自动相位控制集成电路AN318 直流伺服控制集成电路AN320 频率控制、调谐显示驱动集成电路AN3215K 视频信号处理集成电路AN3215S 视频信号处理集成电路AN3224K 磁头信号记录放大集成电路AN3248NK 亮度信号记录、重放处理集成电路AN331 视频信号处理集成电路AN3311K 磁头信号放大集成电路AN3313 磁头信号放大集成电路AN3321S 录像重放信号处理集成电路AN3331K 磁头信号处理集成电路AN3337NSB 磁头信号放大集成电路AN3380K 磁头信号处理集成电路AN3386NK 磁头信号处理集成电路AN3495K 色度、亮度信号降噪集成电路AN355 伴音中频放大、检波集成电路AN3581S 视频驱动集成电路AN366 调频/调幅中频放大集成电路AN3791 移位控制集成电路AN3792 磁鼓伺服控制接口集成电路AN3795 主轴伺服控制接口集成电路AN3814K 电机驱动集成电路AN4265 音频功率放大集成电路AN4558 运算放大集成电路AN5010 电子选台集成电路AN5011 电子选台集成电路AN5015K 电子选台集成电路AN5020 红外遥控信号接收集成电路AN5025S 红外遥控信号接收集成电路AN5026K 红外遥控信号接收集成电路AN5031 电调谐控制集成电路AN5034 调谐控制集成电路AN5036 调谐控制集成电路AN5043 调谐控制集成电路AN5071 频段转换集成电路AN5095K 电视信号处理集成电路AN5110 图像中频放大集成电路AN5130 图像中频、视频检波放大集成电路AN5138NK 图像、伴音中频放大集成电路AN5156K 电视信号处理集成电路AN5177NK 图像、伴音中频放大集成电路AN5179K 图像、伴音中频放大集成电路AN5183K 中频信号处理集成电路AN5195K 中频、色度、扫描信号处理集成电路AN5215 伴音信号处理集成电路AN5520 伴音中频放大及鉴频集成电路AN5222 伴音中频放大集成电路AN5250 伴音中频放大、鉴频及功率放大集成电路AN5262 音频前置放大集成电路AN5265 音频功率放大集成电路AN5270 音频功率放大集成电路AN5273 双声道音频功率放大集成电路AN5274 双声道音频功率放大集成电路AN5275 中置、3D放大集成电路AN5285K 双声道前置放大集成电路AN5295NK 音频信号切换集成电路AN5312 视频、色度信号处理集成电路AN5313NK 视频、色度信号处理集成电路AN5342 图像水平轮廓校正集成电路AN5342FB 水平清晰度控制集成电路AN5344FBP 色度信号处理集成电路AN5348K 人工智能信号处理集成电路AN5385K 色差信号放大集成电路AN5410 行、场扫描信号处理集成电路AN5421 同步检测集成电路AN5422 行、场扫描信号处理集成电路AN5512 场扫描输出集成电路AN5515 场扫描输出集成电路AN5521 场扫描输出集成电路AN5532 场扫描输出集成电路AN5534 场扫描输出集成电路AN5551 枕形校正集成电路AN5560 场频识别集成电路AN5600K 中频、亮度、色度及扫描信号处理集成电路AN5601K 视频、色度、同步信号处理集成电路AN5607K 视频、色度、行场扫描信号处理集成电路AN5615 视频信号处理集成电路AN5620X 色度信号处理集成电路AN5621 场扫描输出集成电路AN5625 色度信号处理集成电路AN5633K 色度信号处理集成电路AN5635 色度解码集成电路AN5635NS 色度解码集成电路AN5637 色度解码、亮度延迟集成电路AN5650 同步信号分离集成电路AN5682K 基色电子开关切换集成电路AN5693K 视频、色度、行场扫描信号处理集成电路AN5712 图像中频放大、AGC控制集成电路AN5722 图像中频放大、检波集成电路AN5732 伴音中频放大、鉴频集成电路AN5743 音频功率放大集成电路AN5750 行自动频率控制及振荡集成电路AN5757S 行扫描电源电压控制集成电路AN5762 场扫描振荡、输出集成电路AN5764 光栅水平位置控制集成电路AN5765 电源稳压控制集成电路AN5767 同步信号处理集成电路AN5768 光栅倾斜校正控制集成电路AN5769 行、场会聚控制集成电路AN5790N 行扫描信号处理集成电路AN5791 同步脉冲相位与脉宽调整集成电路AN5803 双声道立体声解调集成电路AN5836 双声道前置放大集成电路AN5858K 视频信号控制集成电路AN5862 视频信号控制集成电路AN5862S-E1 视频信号开关控制集成电路AN5870K 模拟信号切换集成电路AN5891K 音频信号处理集成电路AN614 行枕形校正集成电路AN6210 双声道前置放大集成电路AN6306S 亮度信号处理集成电路AN6308 模拟电子开关集成电路AN6327 视频重放信号处理集成电路AN6341N 伺服控制集成电路AN6342N 基准分频集成电路AN6344 伺服控制集成电路AN6345 分频集成电路AN6346N 磁鼓伺服控制集成电路AN6350 磁鼓伺服控制集成电路AN6357N 主轴接口集成电路AN6361N 色度信号处理集成电路AN6367NK 色度信号处理集成电路AN6371S 自动相位控制集成电路AN6387 电机伺服控制集成电路AN6550 卡拉OK音频放大集成电路AN6554 四运算放大集成电路AN6561 双运算放大集成电路AN6562SG 双运算放大集成电路AN6609N 电机驱动集成电路AN6612 电机稳速控制集成电路AN6650 电机速度控制集成电路AN6651 电机速度控制集成电路AN6652 电机稳速控制集成电路AN6875 发光二极管五位显示驱动集成电路AN6877 发光二极管七位显示驱动集成电路AN6884 发光二极管五位显示驱动集成电路AN6886 发光二极管五位显示驱动集成电路AN6888 发光二极管显示驱动集成电路AN6914 双电压比较集成电路AN7085N5 单片录、放音集成电路AN7105 双声道音频功率放大集成电路AN7106K 双声道音频功率放大集成电路AN7108 单片立体声放音集成电路AN710S 单片放音集成电路AN7110E 音频功率放大集成电路AN7114 音频功率放大集成电路AN7116 音频功率放大集成电路AN7118 双声道音频功率放大集成电路AN7118S 双声道音频功率放大集成电路AN7120 音频功率放大集成电路AN7124 双声道音频功率放大集成电路AN7145 双声道音频功率放大集成电路AN7148 双声道音频功率放大集成电路AN7158N 音频功率放大7.5W×2集成电路AN7161N 音频功率放大集成电路AN7164 双声道音频功率放大集成电路AN7171NK 音频功率放大集成电路AN7205 调频/调谐及高频放大集成电路AN7220 调频/调幅中频放大集成电路AN7222 调频/调幅中频放大集成电路AN7223 调频/调幅中频放大集成电路AN7226 调频/调幅中频放大集成电路AN7256 调频/调谐及中频放大集成电路AN7311 双声道前置放大集成电路AN7312 双声道前置放大集成电路AN7315 双声道前置放大集成电路AN7315S 双声道前置放大集成电路AN7320 音频前置放大集成电路AN7396K 双声道前置放大集成电路AN7397K 双声道前置放大集成电路AN7410 调频立体声多路解码集成电路AN7414 调频立体声解码集成电路AN7420N 调频立体声解码集成电路AN7470 调频立体声解码集成电路AN7805 三端电源稳压+5V/1A集成电路AN7806 三端电源稳压+6V/1A集成电路AN7807 三端电源稳压+7V/1A集成电路AN7808 三端电源稳压+8V/1A集成电路AN7809 电源稳压+9V/1A集成电路AN7810 三端电源稳压+10V/1A集成电路AN7812 三端电源稳压+12V/1A集成电路AN7815 三端电源稳压+15V/1A集成电路AN7818 三端电源稳压+18V/1A集成电路AN7820 三端电源稳压+20V/1A集成电路AN7824 三端电源稳压+24V/1A集成电路AN78L05 三端电源稳压+5V/0.1A集成电路AN78L06 三端电源稳压+6V/0.1A集成电路AN78L08 三端电源稳压+8V/0.1A集成电路AN78L09 三端电源稳压+9V/0.1A集成电路AN78L10 三端电源稳压+10V/0.1A集成电路AN78L12 三端电源稳压+12V/0.1A集成电路AN78L15 三端电源稳压+15V/0.1A集成电路AN78L18 三端电源稳压+18V/0.1A集成电路AN78L20 三端电源稳压+20V/0.1A集成电路AN78L24 三端电源稳压+24V/0.1A集成电路AN78M05 三端电源稳压+5V/0.5A集成电路AN78M06 三端电源稳压+6V/0.5A集成电路AN78M08 三端电源稳压+8V/0.5A集成电路AN78M09 三端电源稳压+9V/0.5A集成电路AN78M10 三端电源稳压+10V/0.5A集成电路AN78M12 三端电源稳压+12V/0.5A集成电路AN78M15 三端固定式稳压+15V/0.5A集成电路AN78M18 三端电源稳压+18V/0.5A集成电路AN78M20 三端电源稳压+20V/0.5A集成电路AN78M24 三端电源稳压+24V/0.5A集成电路AN7905 三端电源稳压-5V/1A集成电路AN7906 三端电源稳压-6V/1A集成电路AN7908T 三端电源稳压-8V/1A集成电路AN7909T 三端电源稳压-9V/1A集成电路AN7910T 三端电源稳压-10V/1A集成电路AN7912 三端电源稳压-12V/1A集成电路AN7915 三端电源稳压-15V/1A集成电路AN7918 三端电源稳压-18V/1A集成电路AN7920 三端电源稳压-20V/1A集成电路AN7924 三端电源稳压-24V/1A集成电路AN79L05 三端电源稳压-5V/0.1A集成电路AN79L06 三端电源稳压-6V/0.1A集成电路AN79L08 三端电源稳压-8V/0.1A集成电路AN79L09 三端电源稳压-9V/0.1A集成电路AN79L10 三端电源稳压-10V/0.1A集成电路AN79L12 三端电源稳压-12V/0.1A集成电路AN79L15 三端电源稳压-15V/0.1A集成电路AN79L18 三端电源稳压-18V/0.1A集成电路AN79L20 三端电源稳压-20V/0.1A集成电路AN79L24 三端电源稳压-24V/0.1A集成电路AN79M05 三端电源稳压-5V/0.5A集成电路AN79M06 三端电源稳压-6V/0.5A集成电路AN79M08 三端电源稳压-8V/0.5A集成电路AN79M09 三端电源稳压-9V/0.5A集成电路AN79M10 三端电源稳压-10V/0.5A集成电路AN79M12 三端电源稳压-12V/0.5A集成电路AN79M15 三端电源稳压-15V/0.5A集成电路AN79M18 三端电源稳压-18V/0.5A集成电路AN79M20 三端电源稳压-20V/0.5A集成电路AN79M24 三端电源稳压-24V/0.5A集成电路AN8028 自激式开关电源控制集成电路AN8270K 主轴电机控制集成电路AN8280 电机驱动集成电路AN8281S 电机驱动集成电路AN8290S 主轴电机驱动集成电路AN8355S 条形码扫描接收集成电路AN8370S 光电伺服控制集成电路AN8373S 射频伺服处理集成电路AN8375S 伺服处理集成电路AN8389S-E1 电机驱动集成电路AN8480NSB 主轴电机驱动集成电路AN8481SB-E1 主轴电机驱动集成电路AN8482SB 主轴电机驱动集成电路AN8623FBQ 主轴伺服处理集成电路AN8788FB 电机驱动集成电路AN8802CE1V 伺服处理集成电路AN8813NSBS 主轴电机驱动集成电路AN8819NFB 伺服驱动、直流交换集成电路AN8824FBQ 前置放大集成电路AN8825NFHQ-V 聚焦、循迹误差处理集成电路AN8831SC 视频预视放集成电路AN8832SB-E1 射频放大、伺服处理集成电路AN8837SB-E1 伺服处理集成电路AN89C2051-24PC 微处理集成电路APU2400U 音频信号处理集成电路APU2470 音频信号处理集成电路AS4C14405-60JC 动态随机存储1M×4集成电路AS4C256K16ED-60JC 存储集成电路ASD0204-015 图文控制集成电路ASD0204GF-022-3BA显示控制集成电路AT24C08 存储集成电路AT24C08A 存储集成电路AT24C256-10CI 码片集成电路AT27C010 电可改写编程只读存储集成电路AT27C020 存储集成电路ATMEL834 存储集成电路AVM-1 视频信号处理厚膜集成电路AVM-2 音频信号处理厚膜集成电路AVSIBCP08 倍压整流切换集成。

590型号解释

590型号解释
91C 其格式为:590C(或591C)/XXXX/X/X/X/X/X/XX/XXX,每段代码的含义如表2 表2 订货编号 段 号 1 位 数 普通产品 (DC Drive) 2 XXXX 四位数确定直流侧最大输出电流额 定值 0350=35A 0700=70A 1100=110A 3 X 一位数确定三相交流侧输入电源电 压额定值 0:110V 1:115V 2:208V 3:220V 4 X 一位字符确定辅助电源电压 0=110V 1=115V 5 X 一位字符确定用户 界面使用语言 6 X 一位字符确定所需反馈类型* 0=电枢电压反馈 1=测速发电机反馈 2=编码反馈(塑料光纤) 0=英文 1=预定 2=法文 3=德文 4= 意 大 利 文 3= 编 码 反 馈 (导线传 输信号) 4= 编 码 反 馈 (玻璃光 纤) 7 X 一位字符确定6055通讯类 型 0=无通讯模块 1=(RS485/422通讯协议) 2=Profibus通讯协议 3=Profibus通讯协议 8 XX 两位字符特殊选择(硬件部分) 00= 无 特 殊 选 项 01 到 99= 特 殊 选项 9 XXX 三位字符特殊选择(软件部分) 000= 无 特 殊 选项 001 到 999= 特 殊选项 1500=150A 1800=180A 2700=270A 4:240V 5:380V 6:415V 7:440V 3=220V 4=240V 5= 西 班 牙 文 3600=360A 4500=450A 7200=720A 8:460V 9:480V A:500V 590C:三相四象限(可逆型)直流调速器 最高额定输出电流720A 591C:三相两象限 (不可逆型)直流调速器 最高额定输出电流720A 说 明
590P(或591P)/XXXX/XXX/XXXX/XX/XXX/XXXXX/XXX/XXX,每段代码的含义如表1 表1 订货编号 段号 1 2 XXXX 位数 普 通 产 品 (DC Drive) 四位数确定直 流侧额定最大 输出电流 说 明 590P:590+4Q (四象限) 可逆型 591P:591+2Q (二象限) 不可逆型 0015=15A(结构1) 0180=180A 结构3) 1580=1580A(结构5) ( 0035=35A(结构1) 0270=270A 结构3) 1200=1200A(结构H) ( 0040=40A(结构2) 0380=380A 结构4) 1700=1700A(结构H) ( 0070=70A(结构2) 0500=500A 结构4) 2200=2200A(结构H) ( 0110=110A (结构2) 0725=725A 结构4) 2700=2700A(结构H) ( 0165=165A (结构2) 0830=830A 结构4) ( 3 XXX 三位数确定三 相交流侧电源 电压额定值 4 XXXX 四位数确定机 械部件 (包装标 识和机构包装 类型) 220:110~220V(±10%)50/60HZ 500:220~500V(±10%)50/60HZ 600:500~600V(±10%)50/60HZ(只对结构4和5) 690:500~690V(±10%)50/60HZ(只对结构H) 起始两位(左面) 装备 00 05 01 ~ 04 以 及 06~99 第三位数 1 4 第四位数 0 1 5 XX 两位字符确定 用户界面使用 语言 6 XXX 三个字符确定所需反馈类型* UK=英文 FR=法文 GR= 德 文 ARM=电枢电压反馈 AN=测速发电机反馈 ENW=编码反馈(导线传输信 号) SP= 西班 牙文 ENP=编码反馈 (塑料光纤传 输信号) ENG=编码反馈 (玻璃光纤传 输信号) 7 XXXX 四位字符确定 6055通讯类型 0=无通讯模块 EI00=EIASCII/Bisync(RS485/422通讯协议) PROF=Profibus通讯协议 LINK=LINK通讯协议 8 XXX 三位字符确定 辅助电源电压 0=通用辅助电源1115~230V(±10%)50/60HZ(只适用于165A或以 下和1200A或以上) 115=110V~120V(±10%)50/60HZ 220=220V~240V(±10%)50/60HZ 9 XXX 三个字符表示工程特殊选项 000=无特殊选项 IT=意大利文 标准欧陆装备 配电器用装备 用户指定的TBA(真方位测定仪)产品 机械外部样式 标准(IP20)保护面板装置 面板装置IP20带顶部风道(只对结构4) 操作面板 无操作面板 带操作面板(内嵌在6901中的面板)

COM Express Type 6 PMC XMC Ultra Lite Carrier 用户指南

COM Express Type 6 PMC XMC Ultra Lite Carrier 用户指南

COM Express® PMC/XMC Ultra LiteCarrierConnect Tech Inc.Tel:519-836-129142 Arrow Road Toll:800-426-8979 (North America only)Guelph, Ontario Fax:519-836-4878N1K 1S6 Email:********************* *********************** CTIM-00431 Revision 0.06 2018-01-08Table of ContentsPreface (4)Disclaimer (4)Customer Support Overview (4)Contact Information (4)Limited Product Warranty (5)Copyright Notice (5)Trademark Acknowledgment (5)ESD Warning (6)Revision History (6)Introduction (7)Product Features and Specifications (7)Product Overview (8)Block Diagram (8)Connector Locations (9)Connector Summary (10)Jumper Summary (11)Detailed Feature Pinouts and Functional Descriptions (11)Serial/GPIO Connector (11)VGA Video Connector (12)COM Express Module Connector (12)LVDS Video Connector (13)miniPCIe/mSATA Slots (14)Dual Function miniPCIe/mSATA Slots (14)Jumper Selection (14)Half and Full Length miniPCIe/mSATA module Installation (14)External SATA Connector (16)CPU Fan (16)System and Miscellaneous Connector (17)SIM Socket (17)HD Audio Connector (18)Software Support for the CS4207 (18)USB 2.0 Connector (18)DisplayPort Connector (19)HDMI / DVI / VGA from DisplayPort++ (19)10/100/1000 Ethernet (GBE) (20)USB 3.0/2.0 Connector (20)microSD CARD Connector (21)Power Connector (21)SATA/LVDS Power Connector (22)XMC Connector (22)PMC Connector (23)Typical Hardware Installation Procedure (24)On-board Indicator LEDs (24)Jumper Settings (25)J1 Jumper – LVDS PANEL (25)J2 Jumper – RTC Battery (25)J3 Jumper – RTC Battery (25)J6 Jumper – Shutdown Battery (25)J6 Jumper – Power Control (26)J4 Jumper – mSATA/miniPCIe (26)J8 Jumper – USB (26)J7 Jumper – GPIO-V (26)Thermal & Current Consumption Details (27)Thermal Details (27)Mechanical Details (27)Cables and Cable Kit Information (28)Cable Kits (28)CKG028 –“Full” Cable Kit (28)CKG021 –“Starter” Cable Kit (28)PrefaceDisclaimerThe info rmation contained within this user’s guide, including but not limited to any productspecification, is subject to change without notice.Connect Tech assumes no liability for any damages incurred directly or indirectly from anytechnical or typographical errors or omissions contained herein or for discrepancies between theproduct and the user’s guide.Customer Support OverviewIf you experience difficulties after reading the manual and/or using the product, contact theConnect Tech reseller from which you purchased the product. In most cases the reseller can help you with product installation and difficulties. In the event that the reseller is unable to resolveyour problem, our highly qualified support staff can assist you. Our support section is available24 hours a day, 7 days a week on our website at: /support/resource-center/.See the contact information section below for more information on how to contact us directly. Our technical support is always free.Contact InformationMail/CourierConnect Tech Inc.Technical Support42 Arrow RoadGuelph, OntarioCanada N1K 1S6Email/Internet********************************************Telephone/FacsimileTechnical Support representatives are ready to answer your call Monday through Friday, from8:30 a.m. to 5:00 p.m. Eastern Standard Time. Our numbers for calls are:Toll Free: 800-426-8979 (North America only)Telephone: 519-836-1291 (Live assistance available 8:30 a.m. to 5:00 p.m. EST,Monday to Friday)Facsimile: 519-836-4878 (on-line 24 hours)Limited Product WarrantyConnect Tech Inc. provides a two-year Warranty for the COM Express® PMC/XMC Ultra LiteCarrier. Should this product, in Connect Tech Inc.'s opinion, fail to be in good working orderduring the warranty period, Connect Tech Inc. will, at its option, repair or replace this product atno charge, provided that the product has not been subjected to abuse, misuse, accident, disaster or non-Connect Tech Inc. authorized modification or repair.You may obtain warranty service by delivering this product to an authorized Connect Tech Inc.business partner or to Connect Tech Inc. along with proof of purchase. Product returned toConnect Tech Inc. must be pre-authorized by Connect Tech Inc. with an RMA (Return MaterialAuthorization) number marked on the outside of the package and sent prepaid, insured andpackaged for safe shipment. Connect Tech Inc. will return this product by prepaid groundshipment service.The Connect Tech Inc. Limited Warranty is only valid over the serviceable life of the product.This is defined as the period during which all components are available. Should the product prove to be irreparable, Connect Tech Inc. reserves the right to substitute an equivalent product ifavailable or to retract the Warranty if no replacement is available.The above warranty is the only warranty authorized by Connect Tech Inc. Under nocircumstances will Connect Tech Inc. be liable in any way for any damages, including any lostprofits, lost savings or other incidental or consequential damages arising out of the use of, orinability to use, such product.Copyright NoticeThe information contained in this document is subject to change without notice. Connect TechInc. shall not be liable for errors contained herein or for incidental consequential damages inconnection with the furnishing, performance, or use of this material. This document containsproprietary information that is protected by copyright. All rights are reserved. No part of thisdocument may be photocopied, reproduced, or translated to another language without the priorwritten consent of Connect Tech, Inc.Copyright 2016 by Connect Tech, Inc.Trademark AcknowledgmentConnect Tech, Inc. acknowledges all trademarks, registered trademarks and/or copyrights referred to in this document as the property of their respective owners.Not listing all possible trademarks or copyright acknowledgments does not constitute a lack ofacknowledgment to the rightful owners of the trademarks and copyrights mentioned in thisdocument.ESD WarningElectronic components and circuits are sensitive toElectroStatic Discharge (ESD). When handling any circuitboard assemblies including Connect Tech COM Expresscarrier assemblies, it is recommended that ESD safetyprecautions be observed. ESD safe best practices include,but are not limited to:∙Leaving circuit boards in their antistatic packaginguntil they are ready to be installed.∙Using a grounded wrist strap when handling circuitboards, at a minimum you should touch a groundedmetal object to dissipate any static charge that maybe present on you.∙Only handling circuit boards in ESD safe areas,which may include ESD floor and table mats, wriststrap stations and ESD safe lab coats.∙Avoiding handling circuit boards in carpeted areas.∙Try to handle the board by the edges, avoidingcontact with components.Revision HistoryIntroductionConnect Tech’s PMC/XMC Ultra Lite Carrier is an extremely small carrier board featuringrugged, locking connectors and offers the ultimate durability. The PMC/XMC Ultra Lite Carrier is ideal for space constrained applications, harsh environments, demanding conditions and supports extended temperature ranges of -40°C to +85°C.Product Features and SpecificationsProduct Overview Block DiagramConnector LocationsConnector SummaryJumper SummaryDetailed Feature Pinouts and Functional Descriptions Serial/GPIO ConnectorThe CCG013 allows access to the COM Express modules GPIO by routing them out to a GPIO header. Also present is a direct connected RS-232 signal that utilizes the COM Express module’s UART.VGA Video ConnectorTo allow for greater flexibility, the CCG013 provides a VGA Video output. Routed directly from the COM Express Type 6, this provides additional video output formats for operation.COM Express Module ConnectorThe processor and chipset are implemented on the CCG013s COM Express Type 6 module, whichconnects to the CCG013 Carrier Board via a Tyco fine pitch stacking connector.LVDS Video ConnectorThe CCG013 provides dual 18 or 24 bit LVDS display channels via P9, which are connected directly from the COM Express Type 6 module.Note [1]: This voltage can be selected from Jumper J2 to be +3.3V, +5V, or +12VminiPCIe/mSATA SlotsDual Function miniPCIe/mSATA SlotsThe CCG013 has two special dual purpose miniPCIe/mSATA slots. Each of these slots can accept either a miniPCIe module or an mSATA SSD module. These slots have special circuitry that allows for the selection between connecting PCIe lanes or SATA lanes.Each of these slots are also provided with a USB 2.0 in addition to the PCIe as per the mini PCIe specification, see below for a block diagram of the slots functionality.miniPCIe/mSATA Dual Functionality Diagram**Please note, a SIM card is only availabe on miniPCIe/mSATA slot 0Jumper SelectionHalf and Full Length miniPCIe/mSATA module InstallationThe CCG013 comes with dual mounting solutions to allow for the population of a half and a full length module. If you would prefer to have a single slot or both slots populated with half-length hardware at the ****************************************************************************.External SATA ConnectorThe CCG013 provides two SATA plugs that are SATA-PCIe/104 switched. Please see SATA-PCIe/104 switching description for additional details.CPU FanSystem and Miscellaneous ConnectorThe System header can be used to connect the power button, reset button, and LED’s required to monitor the module performance or state.SIM SocketHD Audio ConnectorThe CCG013s features HD Audio capabilities with the assistance of the Cirrus Logic CS4207 Codec device. From the codec, 1 microphone input and 1 headphone output are available.Software Support for the CS4207The audio codec used on the PMC/XMC Ultra Lite Carrier board is the CS4207 from Cirrus Logic.Additional drivers will be needed to properly operate audio on the PMC/XMC Ultra Lite Carrier . Some downloadable links can be found below.Windows XP Driver :/en/support/lic/lic3.html?uri=/en/pubs/software/CS4207_WinXP_1-0-0-38.zip Windows 7/8 Driver :/en/support/lic/lic3.html?uri=/en/pubs/software/CS4207_LogoedDriverPackage_6-6001-1-39.zipLinux Driver : Included in kernels 2.6.30 and up.USB 2.0 ConnectorThe CCG013 has multiple USB Ports. USB 2.0 Port 6 is sourced directly from the COM Express module. USB 2.0 Port 7 however has multiple functionality options. Using Jumper J727, Port 7 can either be a Client USB, or it can be used to connect the SD Card to the COM Express module.Note [2]: USB 2.0 Port 7 can be optionally be used as client USB. Simply remove the Jumper from J8A to enable Note [3]: USB 2.0 Port 7 can be optionally be used to enable the SD Card. Simply remove the Jumper from J8B to enableDisplayPort ConnectorTwo DisplayPort++ connections from the COM Express module are available and can be configured to output DisplayPort, or HDMI/DVI/VGA through the use of a dongle. The configuration of each interface is setup via the COM Express module’s BIOS settings. Refer to the COM Express module’s documentation for more details.Note [4]: Cable assembly must tie high (+3.3V) for adapter output (HDMI/DVI/VGA) and low (GND) for DisplayPort outputHDMI / DVI / VGA from DisplayPort++The COM Express Type 10 Mini Carrier’s DisplayPort++ connector can be used for display outputs other than DisplayPort. The use of HDMI, DVI or VGA can be done through a simple dongle or cable assembly like the ones shown below. These can be purchased from any OEM vendor (such as ) or directly through Connect Tech.10/100/1000 Ethernet (GBE)The CCG013 features dual 10/100/1000 Ethernet Ports. GBE 0 is sourced from the COM Express module. Meanwhile, GBE 1 is sourced from an Intel 82574 PCIe PHY Controller located on the CCG013 Carrier Board, connected via PCIe x1 to the COM Express module.USB 3.0/2.0 ConnectorThe CCG013 provides up to a maximum of 4 USB 3.0 Ports. The USB 3.0 signals are sourced directlyfrom the COM Express Type 6 module, and run through a Pericom Semiconductor PI3EQX7502AIZDE re-driver. Over current protection, power supply filtering and ESD protection is provided.microSD CARD ConnectorThe CCG013 provides a microSD Card Slot. This microSD can be accessed by the COM Express module[9]Note [9]: USB 2.0 Port 7 can be optionally be used to enable the SD Card. Simply remove the Jumper from J8B to enablePower ConnectorThe CCG013 accepts a single power input to power all on-board devices. The CCG013 accepts a wide input range of +12V to +48V for operation.SATA/LVDS Power ConnectorThe CCG013 also provides power for external SATA Hard Drives and/or LVDS screens. The power connectors can be found next the External SATA connectors.XMC ConnectorThe CCG016 allows for I/O expansion with two XMC slots, both capable of x8 PCI Express connectivity.The XMC connectors comply with the VITA 42.0/42.3 standard. +VPWR is +5V, with an option to move to +12V +VPWR power.PMC ConnectorThe CCG016 allows for I/O expansion with two PMC slots, both capable of 32bit PCI connectivity. TheTypical Hardware Installation Procedure1.Ensure all external system power supplies are OFF.2.Install the necessary cables for the application. At a minimum, this would include:a)Power cable to the input power connectorb)Connect a video display cablec)Keyboard and mouse via USBd)SATA or mSATA hard driveFor additional information on the relevant cables, please see the Cables and Interconnects section of this manual.3.Connect the power cable to power supply4.Ensure your power supply is in the range of +12V to +48V DC5.Switch ON the power supply. DO NOT power up your system by plugging in live power.On-board Indicator LEDsThe CCG013 has 10 on-board indicator LEDs.** D32 Only on when on-board NAND option is implemented.Jumper SettingsThe CCG013 utilizes jumper blocks to control various features like LVDS, mSATA/miniPCIe switching, and Client USB.J1 Jumper – LVDS PANELJ2 Jumper – RTC BatteryJ3 Jumper – RTC BatteryJ6 Jumper – Shutdown BatteryJ6 Jumper – Power ControlJ4 Jumper – mSATA/miniPCIeNote [11]: See mSATA/miniPCIe Slots for detailed description of functionalityJ8 Jumper – USBJ7 Jumper – GPIO-VThermal & Current Consumption DetailsBelow are measurements taken with the CCG013 running in various configurations. Some values will change depending on what COM Express module, and what PMC/XMC modules are installed. Please refer to the module or card m anufacturer’s manual for full details on the current consumption of the particular module or peripheral you are using.Note [12]: COM Express Type 6 Module used for measurements - 4th Gen i7-4700Thermal DetailsAll components on the CCG013 are rated to a maximum operating temperature of -40°C to +85°C. Mechanical DetailsA complete 3D STEP Model file of the carrier can be downloaded here:/ftp/3d_models/CCG013_3D_MODEL.zipCables and Cable Kit InformationCable KitsThe following tables summarize the PMC/XMC Ultra Lite Carrier’s available cable kits from Connect Tech.CKG062 –“Full” Cable KitCKG021 –“Starter” Cable Kit。

NOKIA2009年上市手机介绍

NOKIA2009年上市手机介绍
NOKIA 2009年上市手机介绍
2009/02/12
诺基亚 1202
• 上市时间:2009年 • 网络频率:GSM;900/1800MHz • 重 量 :78 克 • 尺寸/体积:105.3×45×13.1mm • 可选颜色:灰色,蓝色 • 屏幕参数:单色屏幕;96×68像素,1.3英
寸; • 通话时间:540 分钟
128×160像素,1.8英寸; • 操作系统:S40第三版 • 通话时间:234 分钟
诺基亚 2330c
• 上市时间:2009年 • 网络频率:GSM/GPRS/EDGE;900/1800MHz • 重 量 :90 克 • 尺寸/体积:107×46×13.8mm • 可选颜色:黑色,深红色 • 屏幕参数:65536色TFT彩色屏幕;128×160像素,1.8英寸; • 通话时间:288 分钟 • 待机时间:540 小时 • WAP上网:支持飞笺 • 标准配置:BL-5C锂电池(1020mAh),AC-3充电器,立体声耳机 • 中文短信:短信容量250条 • 话机通讯录:共1000条 • 内存容量: 32MB • 摄像头:30万像素 • 视频播放:支持3GP文件播放 • 收音机:内置FM立体声收音机 • 蓝牙接口:v2.0 • E-Mail:IMAP4,POP3,SMTP协议,Push e-mail • 参考报价: 未上市
诺基亚 1203
• 上市时间:2009年 • 网络频率:GSM;900/1800MHz • 重 量 :78 克 • 尺寸/体积:105.3×45×13.1mm • 可选颜色:银灰色 • 屏幕参数:单色屏幕;96×68像素,1.3英
寸; • 通话时间:540 分钟
诺基亚1006
• 上市时间:2009年01月 • 网络频率:CDMA2000;

MB95108AM资料

MB95108AM资料

DS07-12614-2EFUJITSU SEMICONDUCTORDATA SHEETCopyright©2006 FUJITSU LIMITED All rights reserved“Check Sheet” is seen at the following support pageURL : /global/services/microelectronics/product/micom/support/index.html“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system development.Be sure to refer to the “Check Sheet” for the latest cautions on development.8-bit Proprietary MicrocontrollersCMOSF 2MC-8FX MB95100AM SeriesMB95108AM/F104AMS/F104ANS/F104AJS/F106AMS/F106ANS/F106AJS/MB95F108AMS/F108ANS/F108AJS/F104AMW/F104ANW/F104AJW/F106AMW/MB95F106ANW/F106AJW/F108AMW/F108ANW/F108AJW/FV100D-103■DESCRIPTIONThe MB95100AM series is general-purpose, single-chip microcontrollers. In addition to a compact instruction set,the microcontrollers contain a variety of peripheral functions. Note : F 2MC is the abbreviation of FUJITSU Flexible Microcontroller.■FEATURE• F 2MC-8FX CPU coreInstruction set optimized for controllers •Multiplication and division instructions •16-bit arithmetic operations •Bit test branch instruction•Bit manipulation instructions etc.• Clock•Main clock•Main PLL clock•Sub clock (for dual clock product)•Sub PLL clock (for dual clock product)(Continued)MB95100AM Series2(Continued)• Timer•8/16-bit compound timer × 2 channels•16-bit reload timer•8/16-bit PPG × 2 channels•16-bit PPG × 2 channels•Timebase timer•Watch prescaler (for dual clock product)• LIN-UART•Full duplex double buffer•Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable• UART/SIO•Full duplex double buffer•Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable• I2C*Built-in wake-up function• External interrupt•Interrupt by edge detection (rising, falling, or both edges can be selected)•Can be used to recover from low-power consumption (standby) modes.• 8/10-bit A/D converter•8-bit or 10-bit resolution can be selected• Low-power consumption (standby) mode•Stop mode•Sleep mode•Watch mode (for dual clock product)•Timebase timer mode• I/O ports :•The number of maximum ports• Single clock product : 54 ports• Dual clock product : 52 ports•Port configuration• General-purpose I/O ports (N-ch open drain) : 6 ports• General-purpose I/O ports (CMOS) : Single clock product : 48 portsDual clock product : 46 ports• Programmable input voltage levels of portAutomotive input level / CMOS input level / hysteresis input level• Flash memory security functionProtects the content of Flash memory (Flash memory device only)* : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these com-ponents in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips.MB95100AM Series3■MEMORY LINEUPFlashRAM MB95F104AMS/F104ANS/F104AJS 16K bytes 512 bytes MB95F104AMW/F104ANW/F104AJW MB95F106AMS/F106ANS/F106AJS 32K bytes 1K byte MB95F106AMW/F106ANW/F106AJW MB95F108AMS/F108ANS/F108AJS 60K bytes2K bytesMB95F108AMW/F108ANW/F108AJWMB95100AM Series4■PRODUCT LINEUP(Continued) MB95108AMMB95F104AMS/MB95F106AMS/MB95F108AMSMB95F104ANS/MB95F106ANS/MB95F108ANSMB95F104AMW/MB95F106AMW/MB95F108AMWMB95F104ANW/MB95F106ANW/MB95F108ANWMB95F104AJS/MB95F106AJS/MB95F108AJSMB95F104AJW/MB95F106AJW/MB95F108AJWTypeMASKROMproductFlash memory productROM capacity*160 Kbytes (Max)RAM capacity*1 2 Kbytes (Max)Reset output Yes NoOption*2Clock systemSelectablesingle/dualclock*3Single clock Dual clock Single clock Dual clockLow voltagedetection resetYes/No No Yes No Yes Clock supervisor No YesCPU functionsNumber of basic instructions : 136Instruction bit length : 8 bitsInstruction length : 1 to 3 bytesData bit length : 1, 8, and 16 bitsMinimum instruction execution time : 61.5 ns (at machine clock frequency 16.25 MHz)Interrupt processing time : 0.6 µs (at machine clock frequency 16.25 MHz)General-pur-pose I/O ports• Single clock product : 54 ports (N-ch open drain : 6 ports, CMOS : 48 ports)• Dual clock product : 52 ports (N-ch open drain : 6 ports, CMOS : 46 ports)Programmable input voltage levels of port :Automotive input level / CMOS input level / hysteresis input level Timebase timer Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)Watchdog timerReset generated cycleAt main oscillation clock 10 MHz : Min 105 msAt sub oscillation clock 32.768 kHz (for dual clock product) : Min 250 ms Wild register Capable of replacing 3 bytes of ROM dataI2CMaster/slave sending and receivingBus error function and arbitration functionDetecting transmitting direction functionStart condition repeated generation and detection functionsBuilt-in wake-up functionUART/SIOData transfer capable in UART/SIOFull duplex double buffer, variable data length (5/6/7/8-bit), built-in baud rate generatorNRZ type transfer format, error detected functionLSB-first or MSB-first can be selected.Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable Part numberParameterPeripheralfunctionsMB95100AM Series5(Continued)MB95108AMMB95F 104AMS/MB95F 106AMS/MB95F 108AMS MB95F 104ANS/MB95F 106ANS/MB95F 108ANS MB95F 104AMW/MB95F 106AMW/MB95F 108AMW MB95F 104ANW/MB95F 106ANW/MB95F 108ANW MB95F 104AJS/MB95F 106AJS/MB95F 108AJS MB95F 104AJW/MB95F 106AJW/MB95F 108AJWLIN-UARTDedicated reload timer allowing a wide range of communication speeds to be set.Full duplex double bufferClock asynchronous (UART) or clock synchronous (SIO) serial data transfer capa-bleLIN functions available as the LIN master or LIN slave.8/10-bit A/D converter(12 channels)8-bit or 10-bit resolution can be selected.16-bit reload timerTwo clock modes and two counter operating modes can be selected. Square wave-form outputCount clock : 7 internal clocks and external clock can be selected.Counter operating mode : reload mode or one-shot mode can be selected.8/16-bit compound timer (2 channels)Each channel of the timer can be used as “8-bit timer × 2 channels” or “16-bit timer × 1 channel”.Built-in timer function, PWC function, PWM function, capture function, and square waveform outputCount clock : 7 internal clocks and external clock can be selected 16-bit PPG (2 channels)PWM mode or one-shot mode can be selected. Counter operating clock : 8 selectable clock sources Support for external trigger start8/16-bit PPG (2 channels)Each channel of the PPG can be used as “8-bit PPG × 2 channels ” or “16-bit PPG × 1 channel ”.Counter operating clock : Eight selectable clock sourcesWatch counter(for dual clock product)Count clock : 4 selectable clock sources (125 ms, 250 ms, 500 ms, or 1 s)Counter value can be set from 0 to 63. (Capable of counting for 1 minute whenselecting clock source 1 second and setting counter value to 60)Watch prescaler(for dual clock product) 4 selectable interval times (125 ms, 250 ms, 500 ms, or 1 s)External interrupt (12 channels)Interrupt by edge detection (rising, falling, or both edges can be selected.) Can be used to recover from standby modes.Flash memorySupports automatic programming, Embedded Algorithm TM *4Write/Erase/Erase-Suspend/Resume commands A flag indicating completion of the algorithmNumber of write/erase cycles (Minimum) : 10000 times Data retention time : 20 yearsErase can be performed on each blockBlock protection with external programming voltageFlash Security Feature for protecting the content of the Flash(MB95F108AMS/F108ANS/F108AJS/F108AMW/F108ANW/F108AJW only) Standby modeSleep, stop, watch (for dual clock product) , and timebase timerPart numberParameter P e r i p h e r a l f u n c t i o n sMB95100AM Series6(Continued)*1 : For ROM capacity and RAM capacity, refer to “■ MEMORY LINEUP”.*2 : For details of option, refer to “■ MASK OPTION”.*3 : Specify clock mode when ordering MASK ROM.*4 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.Note : Part number of the evaluation product in MB95100AM series is MB95FV100D-103. When using it, the MCU board (MB2146-303A) is required.MB95100AM Series7■OSCILLATION STABILIZATION WAIT TIMEThe initial value of the main clock oscillation stabilization wait time is fixed to the maximum value. The maximum value is shown as follows.■PACKAGES AND CORRESPONDING PRODUCTS: Available : UnavailableOscillation stabilization wait timeRemarks(214-2) /F CHApprox. 4.10 ms (at main oscillation clock 4 MHz)MB95108AMMB95F104AMS/F104ANS/F104AJSMB95F106AMS/F106ANS/F106AJSMB95F108AMS/F108ANS/F108AJSMB95F104AMW/F104ANW/F104AJWMB95F106AMW/F106ANW/F106AJWMB95F108AMW/F108ANW/F108AJWMB95FV100D-103FPT-64P-M03FPT-64P-M09BGA-224P-M08Part numberParameterMB95100AM Series8■DIFFERENCES AMONG PRODUCTS AND NOTES ON SELECTING PRODUCTS• Notes on Using Evaluation ProductsThe Evaluation product has not only the functions of the MB95100AM series but also those of other products to support software development for multiple series and models of the F2MC-8FX family. The I/O addresses for peripheral resources not used by the MB95100AM series are therefore access-barred. Read/write access to these access-barred addresses may cause peripheral resources supposed to be unused to operate, resulting in unexpected malfunctions of hardware or software.Particularly, do not use word access to odd numbered byte address in the prohibited areas (If these access are used, the address may be read or write unexpectedly) .Also, as the read values of prohibited addresses on the evaluation product are different to the values on the flash memory and MASK ROM products, do not use these values in the program.The Evaluation product do not support the functions of some bits in single-byte registers. Read/write access to these bits does not cause hardware malfunctions. Since the Evaluation, Flash memory, and MASK ROM products are designed to behave completely the same way in terms of hardware and software.• Difference of Memory SpacesIf the amount of memory on the Evaluation product is different from that of the Flash memory or MASK ROM product, carefully check the difference in the amount of memory from the model to be actually used when developing software.For details of memory space, refer to “■ CPU CORE”.• Current ConsumptionThe current consumption of Flash memory product is typically greater than for MASK ROM product.For details of current consumption, refer to “■ ELECTRICAL CHARACTERISTICS”.• PackageFor details of information on each package, refer to “■ PACKAGES AND CORRESPONDING PRODUCTS” and “■ P ACKAGE DIMENSIONS”.• Operating VoltageThe operating voltage are different among the Evaluation, Flash memory, and MASK ROM products.For details of operating voltage, refer to “■ ELECTRICAL CHARACTERISTICS”.• Difference between RST and MOD Pinsthe MOD pin of the MASK ROM product.MB95100AM Series9MB95100AM Series10■PIN DESCRIPTION(Continued) Pin no.Pin nameI/OCircuittype*Function1AVcc⎯A/D converter power supply pin2AVR⎯A/D converter reference input pin3PE3/INT13PGeneral-purpose I/O port.The pins are shared with the external interrupt input.4PE2/INT125PE1/INT116PE0/INT107P83O General-purpose I/O port8P829P8110P8011P71/TI0HGeneral-purpose I/O port.The pin is shared with 16-bit reload timer ch.0 output.12P70/TO0General-purpose I/O port.The pin is shared with 16-bit reload timer ch.0 input.13MOD B An operating mode designation pin14X0AMain clock input oscillation pin15X1Main clock input/output oscillation pin16Vss⎯Power supply pin (GND)17Vcc⎯Power supply pin18C⎯Capacitor connection pin19PG2/X1AH/ASingle clock product is general-purpose port (PG2) .Dual clock product is sub clock input/output oscillation pin (32 kHz).20PG1/X0ASingle clock product is general-purpose port (PG1) .Dual clock product is sub clock input oscillation pin (32 kHz).21RST B’Reset pin22P00/INT00CGeneral-purpose I/O port.The pins are shared with external interrupt input. Large current port.23P01/INT0124P02/INT0225P03/INT0326P04/INT0427P05/INT0528P06/INT0629P07/INT0730P10/UI0GGeneral-purpose I/O port.The pin is shared with UART/SIO ch.0 data input.Pin no.Pin nameI/OCircuittype*Function31P11/UO0H General-purpose I/O port.The pin is shared with UART/SIO ch.0 data output.32P12/UCK0General-purpose I/O port.The pin is shared with UART/SIO ch.0 clock I/O.33P13/TRG0/ADTGGeneral-purpose I/O port.The pin is shared with 16-bit PPG ch.0 trigger input (TRG0) andA/D trigger input (ADTG).34P14/PPG0General-purpose I/O port.The pin is shared with 16-bit PPG ch.0 output.35P20/PPG00H General-purpose I/O port.The pins are shared with 8/16-bit PPG ch.0 output.36P21/PPG0137P22/TO00General-purpose I/O port.The pins are shared with 8/16-bit compound timer ch.0 output. 38P23/TO0139P24/EC0General-purpose I/O port.The pin is shared with 8/16-bit compound timer ch.0 clock input.40P50/SCL0I General-purpose I/O port.The pin is shared with I2C ch.0 clock I/O.41P51/SDA0General-purpose I/O port.The pin is shared with I2C ch.0 data I/O.42P52/PPG1H General-purpose I/O port.The pin is shared with 16-bit PPG ch.1 output.43P53/TRG1General-purpose I/O port.The pin is shared with 16-bit PPG ch.1 trigger input.44P60/PPG10K General-purpose I/O port.The pins are shared with 8/16-bit PPG ch.1 output.45P61/PPG1146P62/TO10General-purpose I/O port.The pins are shared with 8/16-bit compound timer ch.1 output. 47P63/TO1148P64/EC1General-purpose I/O port.The pin is shared with 8/16-bit compound timer ch.1 clock input.49P65/SCK General-purpose I/O port.The pin is shared with LIN-UART clock I/O.50P66/SOT General-purpose I/O port.The pin is shared with LIN-UART data output.51P67/SIN L General-purpose I/O port.The pin is shared with LIN-UART data input.52P43/AN11J General-purpose I/O port.The pins are shared with A/D converter analog input.53P42/AN1054P41/AN0955P40/AN08(Continued)(Continued)*: For the I/O circuit type, refer to “■ I/O CIRCUIT TYPE”Pin no.Pin name I/O Circuit type*Function56P37/AN07JGeneral-purpose I/O port.The pins are shared with A/D converter analog input.57P36/AN0658P35/AN0559P34/AN0460P33/AN0361P32/AN0262P31/AN0163P30/AN0064AVss⎯A/D converter power supply pin (GND)■I/O CIRCUIT TYPE(Continued)■HANDLING DEVICES• Preventing Latch-upCare must be taken to ensure that maximum voltage ratings are not exceeded when they are used.Latch-up may occur on CMOS ICs if voltage higher than V CC or lower than V SS is applied to input and output pins other than medium- and high-withstand voltage pins or if higher than the rating voltage is applied between V CC pin and V SS pin.When latch-up occurs, power supply current increases rapidly and might thermally damage elements.Also, take care to prevent the analog power supply voltage (AV CC, AVR) and analog input voltage from exceeding the digital power supply voltage (V CC) when the analog system power supply is turned on or off.• Stable Supply VoltageSupply voltage should be stabilized.A sudden change in power-supply voltage may cause a malfunction even within the guaranteed operating rangeof the Vcc power-supply voltage.For stabilization, in principle, keep the variation in Vcc ripple (p-p value) in a commercial frequency range(50 Hz/60 Hz) not to exceed 10% of the standard Vcc value and suppress the voltage variation so that thetransient variation rate does not exceed 0.1 V/ms during a momentary change such as when the power supply is switched.• Precautions for Use of External ClockEven when an external clock is used, oscillation stabilization wait time is required for power-on reset, wake-up from sub clock mode or stop mode.■PIN CONNECTION• Treatment of Unused Input PinLeaving unused input pins unconnected can cause abnormal operation or latch-up, leaving to permanent dam-age. Unused input pins should always be pulled up or down through resistance of at least 2 kΩ. Any unused input/output pins may be set to output mode and left open, or set to input mode and treated the same as unused input pins. If there is unused output pin, make it to open.• Treatment of Power Supply Pins on A/D ConverterConnect to be AV CC= V CC and AV SS= AVR = V SS even if the A/D converter is not in use.Noise riding on the AV CC pin may cause accuracy degradation. So, connect approx. 0.1 µF ceramic capacitor as a bypass capacitor between AV CC and AV SS pins in the vicinity of this device.• Power Supply PinsIn products with multiple V CC or V SS pins, the pins of the same potential are internally connected in the device to avoid abnormal operations including latch-up. However, you must connect the pins to external power supply and a ground line to lower the electro-magnetic emission level, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating.Moreover, connect the current supply source with the V CC and V SS pins of this device at the low impedance.It is also advisable to connect a ceramic bypass capacitor of approximately 0.1 µF between V CC and V SS near this device.• Mode Pin (MOD)Connect the MOD pin directly to V CC or V SS pins.To prevent the device unintentionally entering test mode due to noise, lay out the printed circuit board so as to minimize the distance from the MOD pins to V CC or V SS pins and to provide a low-impedance connection.Use a ceramic capacitor or a capacitor with equivalent frequency characteristics. A bypass capacitor of V CC pin must have a capacitance value higher than C S. For connection of smoothing capacitor C S, refer to the diagram below.• Analog Power SupplyAlways set the same potential to AV CC and V CC pins. When V CC > AV CC, the current may flow through the AN00 to AN11 pins.■PROGRAMMING FLASH MEMORY MICROCONTROLLERS USING PARALLEL PROGRAMMER• Supported Parallel Programmers and AdaptersThe following table lists supported parallel programmers and adapters.Note : For information on applicable adapter models and parallel programmers, contact the following:Flash Support Group, Inc. TEL: +81-53-428-8380• Sector ConfigurationThe individual sectors of Flash memory correspond to addresses used for CPU access and programming by the parallel programmer as follows:• Programming Method1) Set the type code of the parallel programmer to “17222”.2) Load program data to programmer addresses 71000H to 7FFFF H .3) Programmed by parallel programmer Package Applicable adapter modelParallel programmersFPT-64P-M03TEF110-108F35AP AF9708 (Ver 02.35G or more)AF9709/B (Ver 02.35G or more)AF9723+AF9834 (Ver 02.08E or more)FPT-64P-M09TEF110-108F36AP*:Programmer addresses are equivalent to CPU addresses, used when the parallel programmer programs data into Flash memory.These programmer addresses are used for the parallel programmer to program or erase data in Flash memory.Flash memory CPU addressProgrammer address*SA1 (4 Kbytes)1000H 71000H1FFF H 71FFF H SA2 (4 Kbytes)2000H 72000H 2FFF H 72FFF H SA3 (4 Kbytes)3000H 73000H 3FFF H 73FFF H SA4 (16 Kbytes)4000H 74000H 7FFF H 77FFF H SA5 (16 Kbytes)8000H 78000H BFFF H 7BFFF H SA6 (4 Kbytes)C000H 7C000H CFFF H 7CFFF H SA7 (4 Kbytes)D000H 7D000H DFFF H 7DFFF H SA8 (4 Kbytes)E000H 7E000H EFFF H 7EFFF H SA9 (4 Kbytes)F000H 7F000H FFFF H7FFFF HL o w e r b a n k U p p e r b a n k• MB95F108AMS/F108ANS/F108AJS/F108AMW/F108ANW/F108AJW (60 Kbytes)• Programming Method1) Set the type code of the parallel programmer to "17222"2) Load program data to programmer addresses 78000H to 7FFFF H .3) Programmed by parallel programmer• Programming Method1) Set the type code of the parallel programmer to "17222"2) Load program data to programmer addresses 7C000H to 7FFFF H .3) Programmed by parallel programmer*:Programmer addresses are equivalent to CPU addresses, used when the parallel programmer programs data into Flash memory.These programmer addresses are used for the parallel programmer to program or erase data in Flash memory.Flash memory CPU addressProgrammer address*SA5 (16 Kbytes)8000H78000HBFFF H 7BFFF H SA6 (4 Kbytes)C000H 7C000H CFFF H 7CFFF H SA7 (4 Kbytes)D000H 7D000H DFFF H 7DFFF H SA8 (4 Kbytes)E000H 7E000H EFFF H 7EFFF H SA9 (4 Kbytes)F000H 7F000H FFFF H7FFFF H• MB95F106AMS/F106ANS/F106AJS/F106AMW/F106ANW/F106AJW (32 Kbytes)*:Programmer addresses are equivalent to CPU addresses, used when the parallel programmer programs data into Flash memory.These programmer addresses are used for the parallel programmer to program or erase data in Flash memory.Flash memory CPU addressProgrammer address*SA6 (4 Kbytes)C000H7C000HCFFF H 7CFFF H SA7 (4 Kbytes)D000H 7D000H DFFF H 7DFFF H SA8 (4 Kbytes)E000H 7E000H EFFF H 7EFFF H SA9 (4 Kbytes)F000H 7F000H FFFF H7FFFF H• MB95F104AMS/F104ANS/F104AJS/F104AMW/F104ANW/F104AJW (16 Kbytes)■CPU CORE1.Memory spaceMemory space of the MB95100AM series is 64 Kbytes and consists of I/O area, data area, and program area.The memory space includes special-purpose areas such as the general-purpose registers and vector table.Memory map of the MB95100AM series is shown below.Flash RAM Address #1Address #2MB95F104AMS/F104ANS/F104AJS16 Kbytes512 bytes0280H C000H MB95F104AMW/F104ANW/F104AJWMB95F106AMS/F106ANS/F106AJS32 Kbytes 1 Kbyte0480H8000H MB95F106AMW/F106ANW/F106AJWMB95F108AMS/F108ANS/F108AJS60 Kbytes 2 Kbytes0880H1000H MB95F108AMW/F108ANW/F108AJW2.RegisterThe MB95100AM series has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The dedicated registers are as follows:Program counter (PC): A 16-bit register to indicate locations where instructions are stored.Accumulator (A) : A 16-bit register for temporary storage of arithmetic operations. In the case ofan 8-bit data processing instruction, the lower one byte is used.Temporary accumulator (T): A 16-bit register which performs arithmetic operations with the accumulator.In the case of an 8-bit data processing instruction, the lower one byte is used.Index register (IX): A 16-bit register for index modification.Extra pointer (EP): A 16-bit pointer to point to a memory address.Stack pointer (SP): A 16-bit register to indicate a stack area.Program status (PS): A 16-bit register for storing a register bank pointer, a direct bank pointer, anda condition code register.The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and a direct bank pointerThe RP indicates the address of the register bank currently being used. The relationship between the contentThe DP specifies the area for mapping instructions (16 different instructions such as MOV A, dir) using direct addresses to 0080H to 00FF H .The CCR consists of the bits indicating arithmetic operation results or transfer data contents and the bits that control CPU operations at interrupt.Direct bank pointer (DP2 to DP0)Specified address area Mapping areaXXX B (no effect to mapping)0000H to 007F H0000H to 007F H (without mapping) 000B (initial value)0080H to 00FF H 0080H to 00FF H (without mapping)001B 0100H to 017F H 010B 0180H to 01FF H 011B 0200H to 027F H 100B 0280H to 02FF H 101B 0300H to 037F H 110B 0380H to 03FF H 111B0400H to 047F HH flag: Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to “0” otherwise. This flag is for decimal adjustment instructions.I flag : Interrupt is enabled when this flag is set to “1”. Interrupt is disabled when this flag is set to “0”.The flag is set to “0” when reset.IL1, IL0 : Indicates the level of the interrupt currently enabled. Processes an interrupt only if its request levelis higher than the value indicated by this bit.IL1IL0Interrupt levelPriority 000HighLow = no interruption011102113N flag : Set to “1” if the MSB is set to “1” as the result of an arithmetic operation. Cleared to “0” when thebit is set to “0”.Z flag : Set to “1” when an arithmetic operation results in “0”. Cleared to “0” otherwise.V flag : Set to “1” if the complement on 2 overflows as a result of an arithmetic operation. Cleared to “0” otherwise.C flag: Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to “0” otherwise. Set to the shift-out value in the case of a shift instruction.The following general-purpose registers are provided:General-purpose registers: 8-bit data storage registersThe general-purpose registers are 8 bits and located in the register banks on the memory. 1-bank contains 8-registers. Up to a total of 32 banks can be used on the MB95100AM series. The bank currently in use is specified by the register bank pointer (RP), and the lower 3 bits of OP code indicates the general-purpose register 0 (R0)■I/O MAP(Continued)Address Register abbreviationRegister name R/W Initial value 0000H PDR0Port 0 data register R/W 00000000B 0001H DDR0Port 0 direction register R/W 00000000B 0002H PDR1Port 1 data register R/W 00000000B 0003H DDR1Port 1 direction registerR/W 00000000B0004H ⎯ (Disabled)⎯⎯0005H WATR Oscillation stabilization wait time setting registerR/W 11111111B 0006H PLLC PLL control register R/W 00000000B 0007H SYCC System clock control register R/W 1010X011B 0008H STBC Standby control register R/W 00000000B 0009H RSRR Reset source register R XXXXXXXX B 000A H TBTC Timebase timer control register R/W 00000000B 000B H WPCR Watch prescaler control register R/W 00000000B 000C H WDTC Watchdog timer control registerR/W 00000000B000D H ⎯ (Disabled) ⎯⎯000E H PDR2Port 2 data register R/W 00000000B 000F H DDR2Port 2 direction register R/W 00000000B 0010H PDR3Port 3 data register R/W 00000000B 0011H DDR3Port 3 direction register R/W 00000000B 0012H PDR4Port 4 data register R/W 00000000B 0013H DDR4Port 4 direction register R/W 00000000B 0014H PDR5Port 5 data register R/W 00000000B 0015H DDR5Port 5 direction register R/W 00000000B 0016H PDR6Port 6 data register R/W 00000000B 0017H DDR6Port 6 direction register R/W 00000000B 0018H PDR7Port 7 data register R/W 00000000B 0019H DDR7Port 7 direction register R/W 00000000B 001A H PDR8Port 8 data register R/W 00000000B 001B H DDR8Port 8 direction registerR/W 00000000B001C H to 0025H ⎯ (Disabled) ⎯⎯0026H PDRE Port E data register R/W 00000000B 0027H DDRE Port E direction registerR/W 00000000B0028H , 0029H ⎯ (Disabled) ⎯⎯002A HPDRGPort G data registerR/W00000000B。

1900A按键屏说明书(大豪)

1900A按键屏说明书(大豪)


2. 安全注意事项/Safety Matters for Attention
Danger 打开控制箱时,先关闭电源开关并将电源插头从插座上拔下后,等待至少 5 分钟后,再打开控制箱盖。触摸带有高电压的区域会造成人员受伤。 For opening the control box, please turn off the power and take away the plug from socket firstly, and then wait for at least 5 minutes before opening the control box. Touching the part with high voltage will cause the person injury. Caution 使用环境 Usage Environment 应避免在强电气干扰源(如高频焊机)的附近使用本缝纫机。 强电气干扰源可能会影响缝纫机的正常操作。 Try not to use this sewing machine near the sources of strong disturbance like high-frequency welding machine. The source of strong disturbance will affect the normal operation of the sewing machine. 电源电压的波动应该在额定电压的±20%以内的环境下使用。 电压大幅度的波动会影响缝纫机的正常操作,需配备稳压器。 The voltage fluctuation shall be within 20% of the rated voltage. The large fluctuation of voltage will affect the normal operations of sewing machine, Therefore a voltage regulator is needed in that situation. 环境温度应在 0℃~50℃的范围内使用。 低温或高温会影响缝纫机的正常操作。 Working temperature: 0℃~50℃. The operation of the sewing machine will be affacted by environment with temperature beyond the above range. 相对湿度应在 5%~95%的范围内,并且设备内不会形成结露的环境下使用。 干燥、潮湿或结露的环境会影响缝纫机的正确操作。 Relative Humidity: 5%~95%(No dew inside the machine), or the operation of sewing machine will be affected. 压缩空气的供气量应大于缝纫机所要求的总耗气量。压缩空气的供气量不足 会导致缝纫机的动作不正常。 The supply of compressed gas shall be over the consumption required by the sewing machine. The insufficient supply of compressed gas will lead to the abnormal action of sewing machine. 万一发生雷电暴风雨时,关闭电源开关,并将电源插头从插座上拔下。雷电 可能会影响缝纫机的正确操作。 In case of thunder, lightning or storm, please turn off the power and pull plug out the socket. Because these will have influence on the operation of sewing machine.

灵通V.90 K56 Flex PCI PnP 模式声音 传真 模式与语音信息系统说明书

灵通V.90 K56 Flex PCI PnP 模式声音 传真 模式与语音信息系统说明书
PCI PnP Modem
VoiceFax/Modems
with Speakerphone Functions
þ Software Upgradable þ 56,000* bps Data Modem
supporting both V.90 and K56Flex þ 14,400 bps Send & Receive Fax þ Supports speeds up to 115,200 bps þ Full Featured Voice Messaging þ Speakerphone Functions þ V.42 Error Correction and
V.42bis 4-to-1 Data Compression
* Capable of receiving at up to 56kbps, and send at up to 31.2kbps. Due to FCC regulations on power output, receiving speeds limited to 53kbps. Actual speeds vary. Requires compatible phone line and server equipment. Complies with both theV.9056k standard and K56Flex technology protocols.
Feature Notes
In addition to high speed fax and data transfer functions, your fax/modem supports the following additional voice features:
Personal Voice Messaging System

MA5616设备简介

MA5616设备简介

第二代插卡式MDU SmartAX MA5610/MA5616 SmartAX MA5616/MA5610华为技术有限公司推出为更好地满足客户对FTTB/FTTC/FTTN 组网中MDU设备的需求EPON/GPON远端光接入单元。

利用楼内预先布置的双绞线和五类线为家庭用户或中小企业用户提供宽带上网和IP语音业务。

作为插卡式设备xPON MDU设备,MA5610/MA5616具有宽窄带配比灵活、高密度、即插即用等特点外,还具备宽温域、低功耗、静音设计、稳定可靠和绿色节能等多种特点。

产品外观MA5610 MA5616 MA5610和MA5616均为2U高、4业务槽位的插卡式设备,两款产品均可以提供宽带和语音接入服务。

其中MA5610可提供LAN方式的宽带及语音接入,MA5616为可提供ADSL2+/VDSL2方式的宽带及语音接入。

两款产品均可以提供通过采用不同的光扣板来实现EPON或者GPON光口上行,使组网更加的丰富灵活。

除配置上行端口之外,MA5610/MA5616还提供一个本地维护串口、一个环境监控串口及环境监控RJ45接口、一个FE以太网口及一个GE接口,其中GE下行可用于GE接入。

根据容量和业务接口的不同,MA5610/MA5616提供多种灵活的配置。

MA5610最大可配置256路POTS或48路FE(最多配置3块16路FE板)接入,MA5616可最大可提供256路POTS或者128路ADSL2+或者64路VDSL2接入。

产品特点高性能、高密度、多业务板灵活配比10G背板总线,100个用户100M接入,内部带宽无收敛带宽能力;MA5616最大提供128路ADSL2+接入或64路VDSL2接入或256路POTS接入,单板支持任意混插;MA5610最大支持48路纯LAN用户接入或256路POTS接入。

●EPON/GPON一体化,PON网络平滑演进EPON、GPON一体化软硬件平台,上行光模块灵活配置;所有上行模块均支持插拔方式,方便更换,节省主要设备投资;●即插即用、易维护,符合FTTB/FTTC快速布放及“傻瓜式”运维支持即插即用、远程配置下发,设备上电注册成功之后即可建立管理通道和业务通道无需人工现场配置;支持基于Key(SN)和Mac的自动业务发放功能,满足多种业务部署方式;集成包括光功率检测,内外线POTS检测,宽带SELT、DELT以及MELT 等检测功能,便于日常管理和故障诊断●绿色节能,整体运维成本降低30%POTS支持短环路功能,POTS模块功耗下降50%,振铃功耗下降约60%;支持掉电时关闭宽带保留POTS用户供电的功能,保证紧急通话以及降低整机功耗;主要功能和性能指标Copyright©2009 Huawei Technologies Co., Ltd. All Rights Reserved.The information contained in this document is for reference purpose only, and is subject to change or withdrawal according to specific customer requirements and conditions.。

MB90F497中文资料

MB90F497中文资料

FUJITSU SEMICONDUCTORData Sheet (Advance Information)Advance InformationMB90495 Series Data Sheet (Advance Information) 1 / 40FME EMDC June 19, 200016-bit Proprietary MicrocontrollerCMOSF 2MC-16LX MB90495 SeriesMB90497/F4971. OUTLINEThe MB90495-series with FULL-CAN interface and FLASH ROM is especially designed for automotive and industrial applications.Its main feature is the on-chip CAN Interface,which conforms to V2.0Part A and Part B,while supporting a very flexible message buffer scheme, including 8 message buffers, and so offering more functions than a normal full CAN approach.With the new 0.5mm CMOS technology, Fujitsu now also offers on-chip FLASH-ROM program memory. An internal voltage booster removes the necessity for a second programming voltage. An on-chip voltage regulator provides 3V to the internal MCU core. This creates a major advantage in terms of EMI and power consumption.The internal PLL clock frequency multiplier provides an internal 62.5 nsec instruction cycle time from an external 4 MHz clock. A 32kHz Subsystem clock has been included for power saving modes and real time measurement.There are 2 on-chip UART’s, which also provide synchronous communication modes. Furthermore the MCU features an 8 chan-nel ADC, 8 channel External interrupt controller, two 16 bit PPG channels, 4 channel Input Capture Unit and a 16-bit free running I/O-timer.MB90495 Series2. FEATURES•16-bit core CPU; 4MHz external clock (16 MHz internal, 62.5 ns instruction cycle time)•32kHz Subsystem Clock•0.5 mm CMOS Technology•Internal voltage regulator supports 3V MCU core, offering low EMI and low power consump-tion figures•64 KB FLASH ROM; supports automatic programming, 10.000 erase cycles, 10 year data retention time and no second programming voltage required• 2 KB static RAM•FULL-CAN interface;conforming to Version2.0Part A and Part B,flexible message buffering (mailbox and FIFO buffering can be mixed)• 2 UART’s; both offering synchronous communication modes.•Powerful interrupt functions (8 programmable priority levels; 8 external interrupts)•I/O Timer•A/D Converter: 8 channel analogue inputs (Resolution 10 bits or 8 bits)•ICU (Input capture) 16bit * 4ch•PPG (Programmable Pulse Generator) 16bit * 2ch; Can be configured as 8bit * 4ch•Optimised instruction set for controller applications(bit, byte, word and long-word data types; 23 different addressing modes; barrel shift; varietyof pointers)•4-byte instruction execution queue•Signed multiply (16bit*16bit) and divide (32bit/16bit) instructions available•Program Patch Function•Fast Interrupt processing•16-bit reload timer: 2 channels•Low Power Consumption - Several different Lo-Power modes: (Sleep, Stop, Watch,...)•Package:QFP-64; 12mm x 12mm body, 0.65mm pin pitch•QFP-64; 20mm x 18mm body, 1.0mm pin pitchMB90495 Series Data Sheet (Advance Information) 2 / 40FMG EMDC June 19, 2000MB90495 SeriesMB90495 Series Data Sheet (Advance Information) 3 / 40FME EMDC June 19,20003. PRODUCT LINEUPThe following table provides an overview of the MB90495 SeriesFeaturesMB90F497MB90497CPU F2MC-16LX CPUSystem clock On-chip PLL clock multiplier (x1, x2, x3, x4, 1/2 when PLL stop)Minimum instruction execution time: 62.5 ns (4 MHz osc. PLL x4)ROM Boot-blockFlash memory 64 Kbytes Mask ROM 64 Kbytes RAM 2 Kbytes2 KbytesTechnology 0.5 mm CMOS with on-chip voltage regulator for internal power supply + Flash memory On-chip charge pump for programming voltage0.5 mm CMOS with on-chip voltage regulator for internal power supplyOperating voltage range 5 V +/- 10%Temperature range - 40 to 85°C PackageQFP64MB90495 SeriesMB90495 Series Data Sheet (Advance Information) 4 / 40FMG EMDC June 19, 20004. BLOCK DIAGRAMWatch ROM/FlashUART 1Prescaler10-bit ADC8chIO Timer Clock Controller Input Capture 4ch CANExternal Interrupt16bit ReloadTimer 16-bit PPG 2ch16LX CPUF M C -16 B u sX0,X1RSTX X0A, X1ASOT1SCK1SIN1AVCC AVSS AN[7:0]AVR ADTGIN[3:0]PPG[3:0]RX TXINT[7:0]TIN[1:0]TOT[1:0]64KTimer Time Base Timer FRCK RAM 2K 2chPrescalerSCK0SIN0UART 0SOT 0(SCI)(SCI)MB90495 SeriesMB90495 Series Data Sheet (Advance Information)5 / 40FME EMDC June 19,20005. PIN ASSIGNMENTFigure 5.1 FPT-64P-M09Figure 5.2 FPT-64P-M063231302928272625242322212019181749505152535455565758596061626364VSSP30/ALE/SOUT0P31/RDX/SCK0P32/WRLX/SIN0P33/WRHX P34/HRQ P35/HAKXVCC CP36/FRCK/RDY P37/ADTG/CLKP40/SIN1P41/SCK1P42/SOUT1P43/TX P44/RXP07/AD07P06/AD06P05/AD05P04/AD04P03/AD03P02/AD02P01/AD01P00/AD00VSS X1X0MD2MD1RSTX MD0P63/INT3QFP-64FPT-64P-M09P 27/I N T 7/A 23P 26/I N T 6/A 22P 25/I N T 5/A 21P 24/I N T 4/A 20P 23/T O U T 1/A 19P 22/T I N 1/A 18P 21/T O U T 0/A 17P 20/T I N 0/A 16P 17/P P G 3/A D 15P 16/P P G 2/A D 14P 15/P P G 1/A D 13P 14/P P G 0/A D 12P 13/I N 3/A D 11P 12//I N 2/A D 10P 11/I N 1/A D 09P 10/I N 0/A D 08P 61/I N T 1P 62/I N T 2P 50/A N 0P 51/A N 1P 52/A N 2P 53/A N 3P 54/A N 4P 55/A N 5P 56/A N 6P 57/A N 7A V C C A V R A V S S P 60/I N T 0X 0A X 1APackage code (mold)12345678910111213141516484746454443424140393837363534333231302928272625242322212052535455565758596061626364P31/RDX/SCK0P32/WRLX/SIN0P33/WRHX P34/HRQ P35/HAKXVCC CP36/FRCK/RDY P37/ADTG/CLKP40/SIN1P41/SCK1P42/SOUT1P43/TX P06/AD06P05/AD05P04/AD04P03/AD03P02/AD02P01/AD01P00/AD00VSS X1X0MD2MD1RSTXQFP-64FPT-64P-M06P 30/A L E /S O U T 0V S S P 27/I N T 7/A 23P 26/I N T 6/A 22P 25/I N T 5/A 21P 24/I N T 4/A 20P 23/T O U T 1/A 19P 22/T I N 1/A 18P 21/T O U T 0/A 17P 20/T I N 0/A 16P 17/P P G 3/A D 15P 16/P P G 2/A D 14P 15/P P G 1/A D 13P 14/P P G 0/A D 12P 13/I N 3/A D 11P 12//I N 2/A D 10P 11/I N 1/A D 09P 10/I N 0/A D 08P 07/A D 07P 44/R XP 61/I N T 1P 62/I N T 2P 50/A N 0P 51/A N 1P 52/A N 2P 53/A N 3P 54/A N 4P 55/A N 5P 56/A N 6P 57/A N 7A V C C A V R A V S S P 60/I N T 0X 0A X 1AP 63/I N T 3M D 0Package code (mold)1234567891011121314151617181951504948474645444342414039383736353433MB90495 SeriesMB90495 Series Data Sheet (Advance Information) 6 / 40FMG EMDC June 19, 20006. PIN DESCRIPTION6.1 Pin FunctionPin No.Pin Name Circuit Type Active Level at RST Priority FunctionM06M0921P61D H CMOS/TTL High-Z Port General pupose IOINT1External Interrupt input 132P62D H CMOS/TTL High-Z Port General pupose IO INT2External interrupt 24 to 11 3 to 10P50 to P57EHCMOSHigh-ZPortGeneral pupose IOAN0 to AN7Inputs for A/D Converter1211AVCC Dedicated power supply for A/D Con-verter1312AVR Reference Volgate inupt for A/D Con-verter1413AVSS Dedicated power ground for A/D Con-verter1514P60D HCMOS/TTLHigh-ZPortGeneral pupose IOINT0External interrupt input 01615X0A A Low frequency oscillation input 1716X1A A Low frequency oscillation output 1817P63D H CMOS/TTL High-ZPortGeneral purpose IO INT3External interrupt 31918MD0C H CMOS Mode input 2019RSTX B L CMOS Reset input 2120MD1C H CMOS Mode input 2221MD2F HCMOSMode input2322X0A High frequency oscillation input 2423X1AHigh frequency oscillation output 2524VSSPower ground26 to 3325 to 32P00 to P07GHCMOS/TTL High-ZPortGeneral purpose IO AD00 to AD07Addresss Data Bus 34 to 3733 to 36P10 to P13G H CMOS/TTLHigh-Z PortGeneral pupose IOIN0 to IN3Inputs for Input Captures AD08 to AD11Address Data Bus 38 to 4137 to 40P14 to P17G HCMOS/TTLHigh-Z PortGeneral pupose IOPPG0 to PPG3Outputs for Programable Pulse Gener-atorsAD12 to AD15Address Data Bus 4241P20G HCMOS/TTL High-Z PortGeneral pupose IOTIN0Input for 16-bit Reload Timer 0A16Address Bus4342P21G H CMOS/TTL High-Z PortGeneral pupose IOTOT0Output for 16-bit Reload Timer 0A17Address Bus4443P22G H CMOS/TTLHigh-Z PortGeneral pupose IOTIN1Input for 16-bit Reload Timer 1A18Address BusMB90495 SeriesMB90495 Series Data Sheet (Advance Information)7 / 40FME EMDC June 19,20004544P23G HCMOS/TTL High-Z PortGeneral pupose IOTOT1Output for 16-bit Reload Timer 1A19Address Bus46 to 4945 to 48P24 to P25G H CMOS/TTLHigh-Z PortGeneral pupose IOINT4 to INT 7Inputs for External Interrupt A20 to A23Address Bus 5049VSS Ground5150P30G HCMOS/TTL High-Z PortGeneral pupose IO SOT0Output for UART 0ALE Address Latch Enable output 5251P31G H CMOS/TTL High-Z PortGeneral pupose IOSCK0Input/Output for UART 0RDX Read Enable output 5352P32G H CMOS/TTL High-Z PortGeneral pupose IO SIN0Input for UART 0WRLX Write Enable Low-byte output 5453P33G H CMOS/TTL High-Z Port General pupose IOWRHX Write Enable High-byte output 5554P34G H CMOS/TTL High-Z Port General pupose IO HRQ Halt Request input 5655P35GHCMOS/TTLHigh-ZPortGeneral pupose IOHAKX Halt Acknowledge output 5756VCC Power supply5857C Pin for capacitor for the internal power supply.5958P36G HCMOS/TTLHigh-Z PortGeneral pupose IO FRCK Inupt for IO Timer RDY Ready input6059P37D H CMOS High-Z PortGeneral pupose IOADTG Trigger inupt for A/D Converter CLK Clock output6160P40G H CMOS/TTL High-Z Port General pupose IO SIN1Input for UART 16261P41G H CMOS/TTL High-Z Port General pupose IOSCK1Input/Output for UART 16362P42G H CMOS/TTL High-Z Port General pupose IO SOT1Output for UART 16463P43G H CMOS/TTL High-Z Port General pupose IO Tx CAN Transmit pin 164P44GHCMOS/TTLHigh-ZPortGeneral pupose IO RxCAN receive pinPin No.Pin Name Circuit TypeActive Level at RST Priority FunctionM06M09MB90495 SeriesMB90495 Series Data Sheet (Advance Information)8 / 40FMG EMDC June 19, 20006.2 I/O Circuit TypesCircuitDrawing CommentABCDEFG1010011010101Standby Control SignalX1AX0X0AX10000111101HYS1HYS010101001101HYSStandby Control Signal0000111101010101010011011HYSStandby Control SignalAnalog 0000111101HYS01010100110100001111010101HYSStandby Control Signal TTLMB90495 Series7. HANDLING DEVICES(1)Preventing latch-upCMOS IC chips may suffer latch-up under the following conditions:A voltage higher than Vcc or lower than Vss is applied to an input or output pin.A voltage higher than the rated voltage is applied between Vcc and Vss.The AVcc power supply is applied before the Vcc voltage.Latch-up may increase the power supply current drastically, causing thermal damage to thedevice.(2)Handling unused input pinsDo not leave unused input pins open, as doing so may cause misoperation of the device. Use apull-up or pull-down resistor.(3)Using external clockTo use external clock, drive the X0 and X1 pins in reverse phase.Below is a diagram of how to use external clock.MB90495 SeriesX0X1Figure 7.1 Using external clock(4)Power supply pins (Vcc/Vss)Ensure that all Vcc-level power supply pins are at the same potential.In addition,ensure the same for all Vss-level power supply pins. (See the figure below.) If there are more than one Vcc or Vsssystem,the device may operate incorrectly even within the guaranteed operating range.Note that this product may not have as many power pins as pictured in the figure.MB90495 Series Data Sheet (Advance Information)9 / 40FME EMDC June19,2000MB90495 SeriesMB90495 Series Data Sheet (Advance Information)10 / 40FMG EMDC June 19, 2000Figure 7.2 Power pin connections(5) Pull-up/down resistorsThe MB90495 Series does not support internal pull-up/down resistors. Use external components where needed.Vcc VssVss VccVssVcc MB90495SeriesVcc VssVccVssMB90495 Series Data Sheet (Advance Information)11 / 40FME EMDC June 19,20008. ADDRESS SPACEMB90V495MB90F497MB90497FFFFFFHROM FFFLASH ROM FFROM FFFF0000H FEFFFFHROM FENo AcessFE0000H FDFFFFHROM FDExternal bus access External bus accessFD0000H FCFFFFHROM FCFC0000H FBFFFFHROM FBFB0000H FAFFFFHROM FAFA0000H 010000H 00FFFFHFF ROM mirrorFF ROM mirrorFF ROM mirror004000H 003FFFH Extended I/O Extended I/O Extended I/O003800HExternal bus access External bus access0018FFH RAM0010FFH RAM mirror 1Do not use1.The RAM contents of 0000H -08FF H is mirrored to 0900H -10FF H .The RAM mirror area should not be accessed for proper operation.RAM mirror Do not use.000900H 0008FFH RAM RAM000100H 0000BFH I/O I/O I/O000000H9. REGISTER MAPAddress Register Abbreviation Peripheral Access Initial value00 H Port 0 data register PDR0Port 0R/W XXXXXXXX01 H Port 1 data register PDR1Port 1R/W XXXXXXXX02 H Port 2 data register PDR2Port 2R/W XXXXXXXX03 H Port 3 data register PDR3Port 3R/W XXXXXXXX04 H Port 4 data register PDR4Port 4R/W XXXXXXXX05 H Port 5 data register PDR5Port 5R/W XXXXXXXX06 H Port 6 data register PDR6Port 6R/W XXXXXXXX07-0F H Reserved10 H Port 0 direction register DDR0Port 0R/W0000000011 H Port 1 direction register DDR1Port 1R/W0000000012 H Port 2 direction register DDR2Port 2R/W0000000013 H Port 3 direction register DDR3Port 3R/W0000000014 H Port 4 direction register DDR4Port 4R/W0000000015 H Port 5 direction register DDR5Port 5R/W0000000016 H Port 6 direction register DDR6Port 6R/W0000000017-1A H Reserved1B H Analog Input Enable ADER Port 5, A/D R/W11111111 1C - 1F H Reserved20 H Serial Mode Register 1SMR0UART0R/W0000000021 H Serial Control Register 1SCR0R/W0000010022 H Input/Output Data Register 1SIDR0/SODR0R/W XXXXXXXX23 H Serial Status Register 1SSR0R/W00001_0024 H UART 0 Prescaler Control Register CDCR0R/W0___111125 H UART 0 edge select SES0R/W_______126 H Serial Mode Control Register 1SMC1UART1R/W00XXXX0027 H Serial Control Register SRC1R/W00000X0028 H Input/Output Data Register 1SIDR1/SODR1R/W XXXXXXXX29 H Serial Status Register 1SMC1R/W XXXXX000 2A H Reserved2B H UART 1 Prescaler Control Register CDCR0Prescaler UART 1R/W0___0000 2C - 2F H Reserved30 H External Interrupt Enable ENIRExternal Interrupt R/W0000000031 H External Interrupt Request EIRR R/W XXXXXXXX32 H External Interrupt Level ELVR R/W0000000033 H External Interrupt Level ELVR R/W0000000034 H A/D Control Status 0ADCS0A/D Converter R/W0000000034 H A/D Control Status 1ADCS1R/W0000010036 H A/D Data 0ADCR0R XXXXXXXX37 H A/D Data 1ADCR1R/W00000_XX 38-3FH Reserved40 H PPG0 operation mode control register PPGC016-bit Programable PulseGenerator 0/1R/W0_00X__141 H PPG1 operation mode control register PPGC1R/W0_00X00142 H PPG0 and PPG1 clock select register PPG01R/W000000__MB90495 Series Data Sheet (Advance Information)12 / 40FMG EMDC June 19, 200043 H Reserved44 H PPG2 operation mode control register PPGC216-bit Programable PulseGenerator 2/3R/W0_00X__145 H PPG3 operation mode control register PPGC3R/W0_00X00146 H PPG2 and PPG3 clock select register PPG23R/W000000__ 47-4FH Reserved50 H Input Capture 0IPCP0Input Captue 0/1R XXXXXXXX51 H Input Capture 0IPCP0R XXXXXXXX52 H Input Capture 1IPCP1R XXXXXXXX53 H Input Capture 1IPCP1R XXXXXXXX54 H Input Capture Control Status 0/1ICS01Input Capture 0/1/2/3R/W XX00000055 H Input Capture Control Status 2/3ICS23R/W XX00000056 H Timer Data TCDTI/O Timer R/W0000000057 H Timer Data TCDT R/W0000000058 H Timer Control TCCS R/W0000000059 H Timer Control TCCS R/W0__000005A H Input Capture 2IPCP2Input Captue 2/3R XXXXXXXX5B H Input Capture 2IPCP2R XXXXXXXX 5C H Input Capture 3IPCP3R XXXXXXXX 5D H Input Capture 3IPCP3R XXXXXXXX 5E - 65 H Reserved66 H Timer Control Status 0TMCSR016-bit Reload Timer 0R/W00000X0067 H Timer Control Status 0TMCSR0R/W____000068 H Timer Control Status 1TMCSR116-bit Reload Timer 1R/W00000X0069 H Timer Control Status 1TMCSR1R/W____0000 6A - 6E H Reserved6F H ROM Mirror ROMM ROM Mirror R/W000____1 70-7F H Reserved80-8F H Reserved for CAN 1 Interface . Refer to “CAN Controller”90-9D H Reserved9E H ROM Correction Control Status PACSR ROM Correction R/W11000000 9F H Delayed Interrupt/release DIRR Delayed Interrupt R/W_______0 A0 H Low-power Mode LPMCR Low Power Controller R/W00011000 A1 H Clock Selector CKSCR Low Power Controller R/W11111100 A2-A4 H ReservedA5 H Automatic ready function select reg.ARSR W Exter-nalMem-oryAccess 0011__00A6 H External address output control reg.HACR W00000000A7 H Bus control signal select register ECSR W0000000_A8 H Watchdog Control WDTC Watchdog Timer R/W XXXXX111 A9 H Time Base Timer Control TBTC Time Base Timer R/W1__0X100 AA-AD H ReservedAE HFlash Control Status(Flash only, otherwise reserved)FMCS Flash Memory R/W000X0000AF H ReservedAddress Register Abbreviation Peripheral Access Initial valueMB90495 Series Data Sheet (Advance Information)13 / 40FME EMDC June19,2000B0 H Interrupt control register 00ICR00Interrupt controller R/W11000111B1 H Interrupt control register 01ICR01R/W11000111 B2 H Interrupt control register 02ICR02R/W11000111 B3 H Interrupt control register 03ICR03R/W11000111 B4 H Interrupt control register 04ICR04R/W11000111 B5 H Interrupt control register 05ICR05R/W11000111 B6 H Interrupt control register 06ICR06R/W11000111 B7 H Interrupt control register 07ICR07R/W11000111 B8 H Interrupt control register 08ICR08R/W11000111 B9 H Interrupt control register 09ICR09R/W11000111 BA H Interrupt control register 10ICR10R/W11000111 BB H Interrupt control register 11ICR11R/W11000111 BC H Interrupt control register 12ICR12R/W11000111 BD H Interrupt control register 13ICR13R/W11000111 BE H Interrupt control register 14ICR14R/W11000111 BF H Interrupt control register 15ICR15R/W11000111 CO-FF H Reserved1FF0H-1FF5HROM correction3900 H Timer 0/Reload 0TMR0/TMRL016-bit Reload Timer 0R/W XXXXXXXX3901 H Timer 0/Reload 0TMR0/TMRL0R/W XXXXXXXX3902 H Timer 1/Reload 1TMR1/TMRL116-bit Reload Timer 1R/W XXXXXXXX3903 H Timer 1/Reload 1TMR1/TMRL1R/W XXXXXXXX 3904-390FH Reserved3910 H PPG0 Reload L PRLL016-bit Programable PulseGenerator 0/1R/W XXXXXXXX3911 H PPG0 Reload H PRLH0R/W XXXXXXXX 3912 H PPG1 Reload L PRLL1R/W XXXXXXXX 3913 H PPG1 Reload H PRLH1R/W XXXXXXXX3914 H PPG2 Reload L PRLL216-bit Programable PulseGenerator 2/3R/W XXXXXXXX3915 H PPG2 Reload H PRLH2R/W XXXXXXXX3916 H PPG3 Reload L PRLL3R/W XXXXXXXX3917 H PPG3 Reload H PRLH3R/W XXXXXXXX 3918-392FH Reserved3930-3BFFH Reserved3C00-3CFFHReserved for CAN 1 Interface. Refer to “CAN Controller”3D00-3DFFHReserved for CAN 1 Interface. Refer to “CAN Controller”3E00-3EFFH Reserved3FF0-3FFFH ReservedAddress Register Abbreviation Peripheral Access Initial valueMB90495 Series Data Sheet (Advance Information)14 / 40FMG EMDC June 19, 200010. CAN CONTROLLERThe CAN controller has the following features:•Conforms to CAN Specification Version 2.0 Part A and B- Supports transmission/reception in standard frame and extended frame formats •Supports transmitting of data frames by receiving remote frames•8 transmitting/receiving message buffers- 29-bit ID and 8-byte data- Multi-level message buffer configuration•Provides full-bit comparison,full-bit mask,acceptance register0/acceptance register1for each message buffer as 1D acceptance mask- Two acceptance mask registers in either standard frame format or extended frame formats •Bit rate programmable from 10 Kbits/s to 2 Mbits/s (when input clock is at 16 MHz)MB90495 Series Data Sheet (Advance Information)15 / 40FME EMDC June19,200010.1 List of Control RegistersAddress Register Abbreviation Access Initial Value 000080H Message buffer valid register BVALR R/W00000000 000081H Unused000082H Transmit request register TREQR R/W00000000 000083H Unused000084H Transmit cancel register TCANR W00000000 000085H Unused000086H Transmit complete register TCR R/W00000000 000087H Unused000088H Receive complete register RCR R/W00000000 000089H Unused00008AH Remote request receiving register RRTRR R/W00000000 00008BH Unused00008CH Receive overrun register ROVRR R/W00000000 00008DH Unused00008EH Receive interrupt enable register RIER R/W00000000 00008FH Unused003D00HControl status register CSR R/W, R00---000 0----0-1 003D01H003D02HLast event indicator register LEIR R/W-------- 000-0000 003D03H003D04HReceive/transmit error counter RTEC R00000000 00000000 003D05H003D06HBit timing register BTR R/W-1111111 11111111 003D07H003D08H IDE register IDER R/W XXXXXXXX 003D09H Unused003D0AH Transmit RTR register TRTRR R/W00000000 003D0BH Unused003D0CH Remote frame receive waiting register RFWTR R/W XXXXXXXX 003D0DH Unused003D0EH Transmit interrupt enable register TIER R/W00000000 003D0FH Unused003D10HAcceptance mask select register AMSR R/W XXXXXXXX XXXXXXXX 003D11H003D12HUnused003D13H003D14HAcceptance mask register 0AMR0R/W XXXXXXXX XXXXXXXX003D15H003D16HXXXXX--- XXXXXXXX 003D17H003D18HAcceptance mask register 1AMR1R/W XXXXXXXX XXXXXXXX003D19H003D1AHXXXXX--- XXXXXXXX 003D1BHMB90495 Series Data Sheet (Advance Information)16 / 40FMG EMDC June 19, 200010.2 List of Message Buffers (ID Registers)Address Register Abbreviation Access Initial Value 003C00Hto 003C0FH General-purpose RAM--R/WXXXXXXXXtoXXXXXXXX003C10HID register 0IDR0R/W XXXXXXXX XXXXXXXX003C11H003C12HXXXXX--- XXXXXXXX 003C13H003C14HID register 1IDR1R/W XXXXXXXX XXXXXXXX003C15H003C16HXXXXX--- XXXXXXXX 003C17H003C18HID register 2IDR2R/W XXXXXXXX XXXXXXXX003C19H003C1AHXXXXX--- XXXXXXXX 003C1BH003C1CHID register 3IDR3R/W XXXXXXXX XXXXXXXX003C1DH003C1EHXXXXX--- XXXXXXXX 003C1FH003C20HID register 4IDR4R/W XXXXXXXX XXXXXXXX003C21H003C22HXXXXX--- XXXXXXXX 003C23H003C24HID register 5IDR5R/W XXXXXXXX XXXXXXXX003C25H003C26HXXXXX--- XXXXXXXX 003C27H003C28HID register 6IDR6R/W XXXXXXXX XXXXXXXX003C29H003C2AHXXXXX--- XXXXXXXX 003C2BH003C2CHID register 7IDR7R/W XXXXXXXX XXXXXXXX003C2DH003C2EHXXXXX--- XXXXXXXX 003C2FHMB90495 Series Data Sheet (Advance Information)17 / 40FME EMDC June19,200010.3 List of Message Buffers (DLC Registers and Data Registers)Address Register Abbreviation Access Initial Value 003C30HDLC register 0DLCR0R/W----XXXX 003C31H003C32HDLC register 1DLCR1R/W----XXXX 003C33H003C34HDLC register 2DLCR2R/W----XXXX 003C35H003C36HDLC register 3DLCR3R/W----XXXX 003C37H003C38HDLC register 4DLCR4R/W----XXXX 003C39H003C3AHDLC register 5DLCR5R/W----XXXX 003C3BH003C3CHDLC register 6DLCR6R/W----XXXX 003C3DH003C3EHDLC register 7DLCR7R/W----XXXX 003C3FH003C40Hto 003C47H Data register 0 (8bytes)DTR0R/WXXXXXXXXtoXXXXXXXX003C48Hto 003C4FH Data register 1 (8bytes)DTR1R/WXXXXXXXXtoXXXXXXXX003C50Hto 003C57H Data register 2 (8bytes)DTR2R/WXXXXXXXXtoXXXXXXXX003C58Hto 003C5FH Data register 3 (8bytes)DTR3R/WXXXXXXXXtoXXXXXXXX003C60Hto 003C67H Data register 4 (8bytes)DTR4R/WXXXXXXXXtoXXXXXXXX003C68Hto 003C6FH Data register 5 (8bytes)DTR5R/WXXXXXXXXtoXXXXXXXX003C70Hto 003C77H Data register 6 (8bytes)DTR6R/WXXXXXXXXtoXXXXXXXX003C78Hto 003C7FH Data register 7 (8bytes)DTR7R/WXXXXXXXXtoXXXXXXXXMB90495 Series Data Sheet (Advance Information)18 / 40FMG EMDC June 19, 200011. INTERRUPTSInterrupt cause DMA Ch.Interrupt vector Interrupt control register Number Address Number AddressReset——# 08FFFFDCH————INT9 instruction——# 09FFFFD8H————Exception——# 10FFFFD4H————CAN RX——# 11FFFFD0HICR000000B0H CAN TX/NS——# 12FFFFCCHReserved——# 13FFFFC8HICR010000B1H Reserved——# 14FFFFC4HExternal Interrupt INT0/INT1——# 15FFFFC0HICR020000B2H Time Base Timer——# 16FFFFBCH16-bit Reload Timer 0——# 17FFFFB8HICR030000B3H A/D Converter——# 18FFFFB4HI/O Timer——# 19FFFFB0HICR040000B4H External Interrupt INT2/INT3——# 20FFFFACHReserved——# 21FFFFA8HICR050000B5H PPG 0/1——# 22FFFFA4HInput Capture 0——# 23FFFFA0HICR060000B6H External Interrupt INT4/INT5——# 24FFFF9CHInput Capture 1——# 25FFFF98HICR070000B7H PPG 2/3——# 26FFFF94HExternal Interrupt INT6/INT7——# 27FFFF90HICR080000B8H Watch Timer——# 28FFFF8CHReserved——# 29FFFF88HICR090000B9H Input Capture 2/3——# 30FFFF84HReserved——# 31FFFF80HICR100000BAH Reserved——# 32FFFF7CHReserved——# 33FFFF78HICR110000BBH Reserved——# 34FFFF74HReserved——# 35FFFF70HICR120000BCH 16-bit Reload Timer 1——# 36FFFF6CHUART 0 RX——# 37FFFF68HICR130000BDH UART 0 TX——# 38FFFF64HUART 1 RX——# 39FFFF60HICR140000BEH UART 1 TX——# 40FFFF5CHFlash Memory——# 41FFFF58HICR150000BFH Delayed interrupt——# 42FFFF54HMB90495 Series Data Sheet (Advance Information)19 / 40FME EMDC June19,2000MB90495 Series Data Sheet (Advance Information)20 / 40FMG EMDC June 19, 200012. ELECTRICAL CHARACTERISTICS12.1 Absolute Maximum Ratings(V SS = AV SS = 0 V)*1:Set AV CC and V CC to the same voltage.Make sure that AV CC does not exceed V CC and that the voltage at the analog inputs doesnot exceed AV CC when the power is switched on.*2:V I and V O should not exceed V CC +0.3V.VI should not exceed the specified ratings.However if the maximun current to/from ainput is limited by some means with external components, the II rating supercedes the VI rating.ParameterSymbol Rated Value Units RemarksMin.Max.Power supply voltageV CCV SS – 0.3V SS + 6.0V AV CC V SS – 0.3V SS + 6.0V V CC = AV CC*1AVRV SS – 0.3V SS + 6.0V AV CC AVR AVssInput voltage V I V SS – 0.3V SS + 6.0V *2Output voltageV O V SS – 0.3V SS + 6.0V *2"L" level max. output current I OL —15mA "L" level avg. output current I OLAV —4mA Average value over a period of 100ms "L" level max. overall output current I OL —100mA "L" level avg. overall output current I OLAV —50mA Average value over a period of 100ms "H" level max. output current I OH —–15mA "H" level avg. output current I OHAV —–4mA Average value over a period of 100ms "H"level max.overall output current I OH —-100mA "H" level avg. overall output current I OHAV —-50mA Average value over a period of 100ms Power consumption P D —300mW Operating temperature T A –40+85°C Storage temperatureT STG–55+150°CMB90495 Series Data Sheet (Advance Information)21 / 40FME EMDC June 19,200012.2 Recommended Conditions(V SS = AV SS = 0 V)Figure 12.1 C-Pin Connection DiagramParameterSym-bol Rated ValueUnit s RemarksMin.Typ.Max.Power supply voltageV CC AV CC 4.5 5.05.5V Normal operating conditions 3.0 5.5V Maintains RAM data in stop mode.Input H voltageV IHS0.8 V CCV CC + 0.3VCMOS hysteresis input pinV IHM V CC – 0.3V CC + 0.3V MD input pinInput L voltageV ILSV SS – 0.30.2 V CCVCMOS hysteresis input pinV ILMV SS – 0.3V SS + 0.3VMD input pinSmooth capacitor C S 0.0220.1 1.0µFUse a ceramic capacitor or capacitor of better AC characteristics. Capacitor at the VCC should be greater than this capacitor.Operating temperature T A –40+85°CCC S。

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元器件交易网
FUJITSU SEMICONDUCTOR DATA SHEET
DS07-13715-3E
16-bit Proprietary Microcontrollers
CMOS
F2MC-16LX MB90560/565 Series
MB90561/561A/562/562A/F562/F562B/V560 MB90567/568/F568
Internal mask ROM product 32 Kbyber of instructions : 351 Minimum instruction execution time : 62.5 ns for a 4 MHz oscillation (with ×4 multiplier) Addressing modes : 23 modes Program patch function : 2 address pointers Maximum memory space : 16 Mbytes I/O ports (CMOS) : 51 Full-duplex, double-buffered Clock synchronous or asynchronous operation selectable Can be used as I/O serial Internal dedicated baud rate generator 2 channels 16-bit reload timer operation 2 channels 16-bit free-run timer × 1 channel Output compare × 6 channels Input capture × 4 channels 8/16-bit PPG timer (8-bit × 6 channels or 16-bit × 3 channels) Waveform generator (8-bit timer × 3 channels) 3-phase waveform output, deadtime output 8 channels (multiplexed input) 8-bit or 10-bit resolution selectable Conversion time : 6.13 µs (min.) (for maximum machine clock speed 16 MHz) 8 channels (8 channels available, shared with A/D input) Interrupt triggers : “L” → “H” edge, “H” → “L” edge, “L” level, “H” level (selectable) Sleep mode, timebase timer mode, stop mode, and CPU intermittent operation mode CMOS 5 V ± 10%
s PERIPHERAL FUNCTIONS (RESOURCES)
• • • • • I/O ports : 51 ports (max.) Timebase timer : 1 channel Watchdog timer : 1 channel 16-bit reload timer : 2 channel 5 Multi-function timer • 16-bit free-run timer : 1 channel • Output compare : 6 channels Can output an interrupt request when a match occurs between the count in the 16-bit freerun timer and the value set in the compare register. • Input capture : 4 channels On detecting an active edge on the input signal from an external input pin, copies the count value of the 16bit freerun timer to the input capture data register and generates an interrupt request. • 8/16-bit PPG timer (8-bit × 6 channels or 16-bit × 3 channels) The period and duty of the output pulse can be set by the program. • Waveform generator (8-bit timer : 3 channels) • UART : 2 channels • Full-duplex, double-buffered (8-bit) • Can be set to asynchronous or clock synchronous serial transfer (I/O expansion serial) operation • DTP/external interrupt circuit (8 channels) • External interrupts can activate the extended intelligent I/O service. • Generates interrupts in response to external interrupt inputs.
s PACKAGES
64-pin plastic QFP 64-pin plastic LQFP 64-pin plastic SH-DIP
(FPT-64P-M06)
(FPT-64P-M09)
(DIP-64P-M01)
元器件交易网
MB90560/565 Series
(Continued) • Instruction set • Bit, byte, word, and long word data types • 23 different addressing modes • Enhanced calculation precision using a 32-bit accumulator • Enhanced signed multiplication and division instructions and RETI instruction • Instruction set designed for high level language (C) and multi-tasking • Uses a system stack pointer • Symmetric instruction set and barrel shift instructions • Program patch function (2 address pointers) . • 4-byte instruction queue • Interrupt function • Priority levels are programmable • 32 interrupts • Data transfer function • Extended intelligent I/O service function : Up to 16 channels • Low-power consumption modes • Sleep mode (CPU operating clock stops.) • Timebase timer mode (Only oscillation clock and timebase timer continue to operate.) • Stop mode (Oscillation clock stops.) • CPU intermittent operation mode (The CPU operates intermittently at the specified interval.) • Package • LQFP-64P (FTP-64P-M09 : 0.65 mm pin pitch) • QFP-64P (FTP-64P-M06 : 1.00 mm pin pitch) • SH-DIP (DIP-64P-M01 : 1.778 mm pin pitch) • Process : CMOS technology
s FEATURES
• Clock • Internal oscillator circuit and PLL clock multiplication circuit • Oscillation clock Clock speed selectable from either the machine clock, main clock, or PLL clock. The main clock is the oscillation clock divided into 2 (0.5 MHz to 8 MHz for a 1 MHz to 16 MHz base oscillation) . The PLL clock is the oscillation clock multiplied by one to four (4 MHz to 16 MHz for a 4 MHz base oscillation) . • Minimum instruction execution time : 62.5 ns (for oscillation = 4 MHz, PLL clock setting = × 4, VCC = 5.0 V) • Maximum CPU memory space : 16 MB • 24-bit addressing • Bank addressing (Continued)
s DESCRIPTION
The MB90560/565 series is a general-purpose 16-bit microcontroller designed for industrial, OA, and process control applications that require high-speed real-time processing. The device features a multi-function timer able to output a programmable waveform. The microcontroller instruction set is based on the same AT architecture as the F2MC-8L and F2MC-16L families with additional instructions for high-level languages, extended addressing modes, enhanced signed multiplication and division instructions, and a complete range of bit manipulation instructions. The microcontroller has a 32-bit accumulator for processing long word (32-bit) data.
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