M74HCT245中文资料
74lvc245中文说明
74LV245是低压硅栅CMOS器件，与74HC245和74HCT245针脚和功能兼容。
74LV245是八位元收发器，在发送和接收方向上都具有非反相3态总线兼容输出。
发送/接收(DIR)输入控制方向，而输出使能(OE)输入则可实现轻松级联。
针脚OE控制输出，因此总线可以得到有效隔离。
特性和优势
•宽工作电压范围：1.0 V至5.5 V
•最适合低压应用：1.0 V至3.6 V
•接受介于VCC = 2.7 V和VCC = 3.6 V之间的TTL输入电平
•VCC = 3.3 V且T amb = 25 °C时的典型输出地弹：< 0.8 V
•VCC = 3.3 V且T amb = 25 °C时的典型高电平输出电压(VOH)欠冲：> 2 V •ESD保护：
o HBM JESD22-A114E超过2000 V
o MM JESD22-A115-A超过200 V
•多种封装选择
•额定温度范围为-40 °C至+85 °C和-40 °C至+125 °C
外形图
显示功能框图
真值表
INPUTS INPUTS/OUTPUT OE DIR An Bn
H=高电压L=低电压X=无输入、Z=高阻态。
74HC245详细中文资料知识讲解
74HC245详细中文资料74HC245是一款高速CMOS器件，74HC2 45引脚兼容低功耗肖特基TTL（LSTTL）系列。
74HC245译码器可接受3位二进制加权地址输入（A0, A1和A2），并当使能时，提供8个互斥的低有效输出（Y0至Y7）。
74HC245特有3个使能输入端：两个低有效（E1和E2）和一个高有效（E3）。
除非E1和E2置低且E3置高，否则74HC138将保持所有输出为高。
利用这种复合使能特性，仅需4片74HC 245芯片和1个反相器，即可轻松实现并行扩展，组合成为一个1-32（5线到3 2线）译码器。
任选一个低有效使能输入端作为数据输入，而把其余的使能输入端作为选通端，则74HC245亦可充当一个8输出多路分配器，未使用的使能输入端必须保持绑定在各自合适的高有效或低有效状态。
74HC245与74HC 238逻辑功能一致，只不过74HC138为反相输出。
功能CD74HC245 ，CD74HC238和CD74HCT245，CD74HCT238是高速硅栅CMOS解码器，适合内存地址解码或数据路由应用。
74HC245作用原理于高性能的存贮译码或要求传输延迟时间短的数据传输系统,在高性能存贮器系统中,用这种译码器可以提高译码系统的效率。
将快速赋能电路用于高速存贮器时,译码器的延迟时间和存贮器的赋能时间通常小于存贮器的典型存取时间,这就是说由肖特基钳位的系统译码器所引起的有效系统延迟可以忽略不计。
HC138 按照三位二进制输入码和赋能输入条件,从8 个输出端中译出一个低电平输出。
两个低电平有效的赋能输入端和一个高电平有效的赋能输入端减少了扩展所需要的外接门或倒相器,扩展成24 线译码器不需外接门;扩展成32 线译码器,只需要接一个外接倒相器。
在解调器应用中,赋能输入端可用作数据输入端。
特性复合使能输入，轻松实现扩展兼容JEDEC标准no.7A 存储器芯片译码选择的理想选择低有效互斥输出ESD保护HBM EIA/JESD22-A114-C超过20 00 V MM EIA/JESD22-A115-A超过200 V 温度范围-40～+85 ℃-40～+12 5 ℃多路分配功能 74HC245是一款高速CMOS器件，74HC245引脚兼容低功耗肖特基TTL（LSTTL）系列。
74HC245中文资料_数据手册_参数
74HC245八路巴士TRANCEIVER;三态 14.修订历史表13：修订记录文档ID发布日期数据表状态更改注意文档.数取代版本 74HC_HCT245_3 20050131产品数据表 - 9397 750 14502 74HC_HCT245_CNV_2莫迪科幻阳离子： ? 本数据表的格式经过重新设计以符 合新的演示文稿和飞利浦半导体的信息标准 ?第4节“订购信息”，第6节“固定信息”和第13节“包装大纲“修改为包含DHVQFN20 包. 74HC_HCT245_CNV_2 19930930产品SPECI FI CATION 9397 750 14502 ? 74HC245 NV 2005.保留所有权利. 74HC245产品数据表 2005年1月3日至31日 13的22飞利浦半导体 74HC245; 74HCT245八 路巴士TRANCEIVER;三态 12.波形测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图5.输入（AN，BN） 输出（BN，AN）传播延迟和输出转换时间测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图6. 3态输出 启用和禁用时间表11：测量点类型输入产量 74HC245保留所有权利.产品数据表 2005年1月3日至3月31日 13的22飞利浦半导体 74HC245; 74HCT245八路公交车三态波形测量点在表 11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图5.输入（An，Bn）输出（Bn，An）传播延迟和输出转换时间测量点 在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图6. 3状态输出使能和禁止时间表11：测量点类型输入产量 V M V M 74HC245 0.5V CC 0.5V CC 74HCT245 1.3 V 1.3 V 001aac433 t PLH t PHL VM V M 90％ 10％ V M V M Bn，输出 An，Bn输入 V 我 GND V OH V OL t TLH t THL 001aac479 t PLZ t PHZ输出残输出启用 90％ 10％输出启用 OE输入 V 我 V CC V OL V OH GND GND V M t PZL t PZH V M V M产量 LOW-到关关到LOW产量 74HC245输出频率; C L = pF中的输出负载电容; V CC =电源电压V; N =输入切换次数; Σ（C L ×V CC 2 ×f o ）=输出和.表10：动态特 性类型74HCT245 GND = 0 V;测试电路见图7.符号参数条件敏典型马克斯单元 T amb = 25°C t PHL ，t PLH传播延迟A到Bn或Bn到安见 图5 V CC = 4.5 V - 12 22 NS V CC = 5.0 V; C L = 15pF - 10 - NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 1630ns PHZ ，t PLZ 3状态输出禁用时间OE A或OE到Bn V CC = 4.5V; 见图6 - 1630ns t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 - 五 12 NS C PD功耗电容每个收发器 V I = GND至V CC - 1.5 V [1] -30 - pF的 T amb = -40°C至+85°C t PHL ，t PLH传播延迟A到Bn或Bn到 安 V CC = 4.5V; 见图5 --28 NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS PHZ ，t PLZ 3状态输出禁 用时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 --15 NS T amb = -40°C至+125°C t PHL ，t PLH传播延迟A到Bn或Bn到安 V CC = 4.5V; 见图5 --33 NS t PZH ，t PZL 3状态输出使能时间
74FCT245中文资料
8-Bit TransceiverCY54/74FCT245TSCCS018 - May 1994 - Revised February 2000Data sheet acquired from Cypress Semiconductor Corporation.Data sheet modified to remove devices not offered.Copyright © 2000, T exas Instruments IncorporatedFeatures•Function, pinout, and drive compatible with FCT, and F logic•FCT-D speed at 3.8 ns max. (Com’l),FCT-C speed at 4.1 ns max. (Com’l),FCT-A speed at 4.6 ns max. (Com’l)•Reduced V OH (typically = 3.3V) versions of equivalent FCT functions•Edge-rate control circuitry for significantly improved noise characteristics •Power-off disable feature •ESD > 2000V•Matched rise and fall times•Fully compatible with TTL input and output logic levels •Extended commercial range of −40˚C to +85˚C •Sink current 64 mA (Com’l), 48 mA (Mil)Source current 32 mA (Com’l), 12 mA (Mil)Functional DescriptionThe FCT245T contains eight non-inverting bidirectional buff-ers with three-state outputs and is intended for bus oriented applications.For the FCT245T,current sinking capability is 64mA at the A and B ports.The Transmit/Receiver (T/R)input determines the direction of data flow through bidirectional transceiver.Transmit (Active HIGH)enables data from A ports to B ports.The output enable (OE),when HIGH,disables both the A and B ports by putting them in a High Z condition.The outputs are designed with a power-off disable feature to allow for live insertion of boards.Function Table [1]OE T/R Operation L L B Data to Bus A L H A Data to Bus B HXHigh Z StateNote:1.H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.Logic Block DiagramPin ConfigurationsA 0A 1A 2A 3A 4A 5A 6A 7OEB 0B 1B 2B 3B 4B 5B 6B 7T/R4891011127651516171832120131419A 6A 5A 3B 1B 4B 0B 7V CC GND B 3Top ViewA 2LCCT/R A 0A 1A 7B 5B 612345678910111216171819201314V CC 15Top ViewB 2A 4OEA 0A 1A 2A 3A 4A 5A 6A 7OEB 0B 1B 2B 3B 4B 5B 6B 7T/R GNDDIP/SOIC/QSOPMaximum Ratings[2,3](Above which the useful life may be impaired.For user guidelines, not tested.)Storage T emperature.....................................−65°C to +150°C Ambient T emperature withPower Applied..................................................−65°C to +135°C Supply Voltage to Ground Potential..................−0.5V to +7.0V DC Input Voltage.................................................−0.5V to +7.0V DC Output Voltage..............................................−0.5V to +7.0V DC Output Current (Maximum Sink Current/Pin).......120 mA Power Dissipation..........................................................0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015)Operating RangeRange RangeAmbientTemperature V CC Commercial DT0°C to +70°C5V± 5% Commercial T, AT, CT−40°C to +85°C5V± 5% Military[4]All−55°C to +125°C5V± 10%Electrical Characteristics Over the Operating RangeParameter Description Test Conditions Min.Typ.[5]Max.Unit V OH Output HIGH Voltage V CC=Min., I OH=−32 mA Com’l 2.0VV CC=Min., I OH=−15 mA Com’l 2.4 3.3VV CC=Min., I OH=−12 mA Mil 2.4 3.3V V OL Output LOW Voltage V CC=Min., I OL=64 mA Com’l0.30.55VV CC=Min., I OL=48mA Mil0.30.55V V IH Input HIGH Voltage 2.0V V IL Input LOW Voltage0.8V V H Hysteresis[6]All inputs0.2V V IK Input Clamp Diode Voltage V CC=Min., I IN=−18 mA−0.7−1.2V I I Input HIGH Current V CC=Max., V IN=V CC5µA I IH Input HIGH Current V CC=Max., V IN=2.7V±1µA I IL Input LOW Current V CC=Max., V IN=0.5V±1µA I OS Output Short Circuit Current[7]V CC=Max., V OUT=0.0V−60−120−225mA I OFF Power-Off Disable V CC=0V, V OUT=4.5V±1µACapacitance[6]Parameter Description Typ.[5]Max.UnitC IN Input Capacitance510pFC OUT Output Capacitance912pF Notes:2.Unless otherwise noted, these limits are over the operating free-air temperature range.3.Unused inputs must always be connected to an appropriate logic voltage level, preferably either V CC or ground.4.T A is the “instant on” case temperature.5.Typical values are at V CC=5.0V, T A=+25˚C ambient.6.This parameter is specified but not tested.7.Not more than one output should be shorted at a time.Duration of short should not exceed one second.The use of high-speed test apparatus and/or sampleand hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values.Otherwise prolonged shorting ofa high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests.In any sequence of parametertests, I OS tests should be performed last.Power Supply CharacteristicsParameter DescriptionTest ConditionsTyp.[5]Max.Unit I CC Quiescent Power Supply Current V CC =Max., V IN ≤0.2V , V IN ≥V CC −0.2V 0.10.2mA ∆I CC Quiescent Power Supply Current (TTL inputs HIGH)V CC =Max., V IN =3.4V ,[8]f 1=0, Outputs Open0.5 2.0mA I CCDDynamic Power Supply Current [9]V CC =Max., One Input Toggling,50% Duty Cycle, Outputs Open,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V0.060.12mA/MHzI CTotal Power Supply Current [10]V CC =Max.,50%Duty Cycle,Outputs Open,One Bit Toggling at f 1=10 MHz,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V0.7 1.4mAV CC =Max.,50%Duty Cycle,Outputs Open,One Bit Toggling at f 1=10 MHz,T/R or OE=GND and V IN =3.4V or V IN =GND 1.2 3.4mAV CC =Max.,50%Duty Cycle,Outputs Open,Eight Bits Toggling at f 1=2.5 MHz,T/R or OE=GND andV IN ≤0.2V or V IN ≥V CC −0.2V1.32.6[11]mAV CC =Max.,50%Duty Cycle,Outputs Open,Eight Bits Toggling at f 1=2.5 MHz,T/R or OE=GND and V IN =3.4V or V IN =GND3.310.6[11]mANotes:8.Per TTL driven input (V IN =3.4V); all other inputs at V CC or GND.9.This parameter is not directly testable, but is derived for use in Total Power Supply calculations.10.I C=I QUIESCENT + I INPUTS + I DYNAMIC I C =I CC +∆I CC D H N T +I CCD (f 0/2 + f 1N 1)I CC =Quiescent Current with CMOS input levels∆I CC =Power Supply Current for a TTL HIGH input (V IN =3.4V)D H =Duty Cycle for TTL inputs HIGH N T =Number of TTL inputs at D HI CCD =Dynamic Current caused by an input transition pair (HLH or LHL)f 0=Clock frequency for registered devices, otherwise zero f 1=Input signal frequency N 1=Number of inputs changing at f 1All currents are in milliamps and all frequencies are in megahertz.11.Values for these conditions are examples of the I CC formula. These limits are specified but not tested.Document #: 38−00318−BSwitching Characteristics Over the Operating RangeParameter Description FCT245TFCT245ATUnit Fig.No.[13]MilitaryCommercial MilitaryCommercial Min.[12]Max.Min.[12]Max.Min.[12]Max.Min.[12]Max.t PLH t PHL Propagation Delay A to B or B to A 1.57.5 1.57.0 1.5 4.9 1.5 4.6ns 1, 3t PZH t PZL Output Enable Time OE or T/R to A or B 1.510.0 1.59.5 1.5 6.5 1.5 6.2ns 1, 7, 8t PHZ t PLZOutput Disable Time OE or T/R to A or B1.510.01.57.51.56.01.55.0ns1, 7, 8Switching Characteristics Over the Operating Range (continued)Parameter DescriptionFCT245CTFCT245DT Unit Fig.No.[13]MilitaryCommercial Commercial Min.[12]Max.Min.[12]Max.Min.[12]Max.t PLH t PHL Propagation Delay A to B or B to A 1.5 4.5 1.5 4.1 1.5 3.8ns 1, 3t PZH t PZL Output Enable Time OE or T/R to A or B 1.5 6.2 1.5 5.8 1.5 5.0ns 1, 7, 8t PHZ t PLZOutput Disable Time OE or T/R to A or B1.55.21.54.81.54.3ns1, 7, 8Ordering InformationSpeed (ns)Ordering CodePackage Name Package TypeOperating Range 3.8CY74FCT245DTQCT Q520-Lead (150-Mil) QSOP CommercialCY74FCT245DTSOC/SOCT S520-Lead (300-Mil) Molded SOIC 4.1CY74FCT245CTQCT Q520-Lead (150-Mil) QSOP Commercial CY74FCT245CTSOC/SOCT S520-Lead (300-Mil) Molded SOIC 4.5CY54FCT245CTDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245CTLMB L6120-Square Leadless Chip Carrier 4.6CY74FCT245ATPC P520-Lead (300-Mil) Molded DIP Commercial CY74FCT245ATQCT Q520-Lead (150-Mil) QSOP CY74FCT245ATSOC/SOCTS520-Lead (300-Mil) Molded SOIC 4.9CY54FCT245ATDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245ATLMB L6120-Square Leadless Chip Carrier 7.0CY74FCT245TQCT Q520-Lead (150-Mil) QSOP Commercial CY74FCT245TSOC/SOCT S520-Lead (300-Mil) Molded SOIC 7.5CY54FCT245TDMB D620-Lead (300-Mil) CerDIP Military CY54FCT245TLMBL6120-Square Leadless Chip CarrierNotes:12.Minimum limits are specified but not tested on Propagation Delays.13.See “Parameter Measurement Information” in the General Information section.Package Diagrams20-Lead (300-Mil)CerDIP D6MIL −STD −1835D −8 Config.A20-Pin Square Leadless Chip Carrier L61MIL −STD −1835 C −2A20-Lead (300-Mil)Molded DIP P5Package Diagrams (continued)20-Lead Quarter Size Outline Q520-Lead(300-Mil)Molded SOIC S5IMPORTANT NOTICETexas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK.In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.Copyright © 2000, Texas Instruments Incorporated。
MC74LVX245八线总线传输器说明书
MC74LVX245Octal Bus TransceiverWith 5 V−Tolerant InputsThe MC74LVX245 is an advanced high speed CMOS octal bus transceiver.It is intended for two−way asynchronous communication between data buses. The direction of data transmission is determined by the level of the T/R input. The output enable pin (OE) can be used to disable the device, so that the buses are effectively isolated.All inputs are equipped with protection circuits against static discharge.Features•High Speed: t PD = 4.7 ns (Typ) at V CC = 3.3 V•Low Power Dissipation: I CC = 4 m A (Max) at T A = 25°C •Power Down Protection Provided on Inputs •Balanced Propagation Delays •Low Noise: V OLP = 0.8 V (Max)•Pin and Function Compatible with Other Standard Logic Families •Latchup Performance Exceeds 300 mA•ESD Performance:Human Body Model > 2000 V;Machine Model > 200 V•These Devices are Pb−Free and are RoHS CompliantApplication Notes•Do Not Force a Signal on an I/O Pin when it is an Active Output,Damage May Occur•All Floating (High Impedance) Input or I/O Pins must be Fixed by Means of Pullup or Pulldown Resistors or Bus Terminator ICs •A Parasitic Diode is Formed between the Bus and V CC Terminals Therefore, the LVX245 cannot be Used to Interface 5.0 V to 3.0 VSystems DirectlySee detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.ORDERING INFORMATION120MARKING DIAGRAMSSOIC−20DW SUFFIX CASE 751DTSSOP−20DT SUFFIX CASE 948ELVX245= Specific Device Code A = Assembly Location WL, L = Wafer Lot Y= YearWW, W = Work WeekG or G= Pb−Free Package(Note: Microdot may be in either location)LVX 245ALYW G GSOIC−20TSSOP−20PIN ASSIGNMENT20−Lead (Top View)192018171615142134567V CC 1381291110OE B0B1B2B3B4B5B6B7T/R A0A1A2A3A4A5A6A7GNDB0OE 19T/R 1A0B1A1B2A2B3A3B4A4B5A5B6A6B7A7Figure 1. Logic DiagramTable 1. PIN NAMESPins FunctionOE T/R A0−A7Bo−B7Output Enable Input Transmit/Receive InputSide A 3−State Inputs or 3−State Outputs Side B 3−State Inputs or 3−State OutputsINPUTS OPERATING MODE Non−Inverting OE T/R L L B Data to A Bus L H A Data to B Bus HXZH = High Voltage Level; L = Low Voltage Level; Z = High Impedance State;X = High or Low Voltage Level and Transitions are Acceptable; For I CC reasons, Do Not Float InputsMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage–0.5 to +7.0V V in DC Input Voltage (T/R, OE)–0.5 to +7.0V V I/O DC Output Voltage–0.5 to V CC +0.5VI IK Input Diode Current−20mAI OK Output Diode Current±20mAI out DC Output Current, per Pin±25mAI CC DC Supply Current, V CC and GND Pins±75mAP D Power Dissipation180mW T stg Storage Temperature–65 to +150°C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage 2.0 3.6V V in DC Input Voltage (T/R, OE)0 5.5V V I/O DC Output Voltage0V CC V T A Operating Temperature, All Package Types−40+85°CD t/D V Input Rise and Fall Time0100ns/V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.DC ELECTRICAL CHARACTERISTICSSymbol Parameter Test Conditions V CCVT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxV IH High−Level Input Voltage 2.03.03.61.52.02.41.52.02.4VV IL Low−Level Input Voltage 2.03.03.60.50.80.80.50.80.8VV OH High−Level Output Voltage(V in = V IH or V IL)I OH = −50 m AI OH = −50 m AI OH = −4 mA2.03.03.01.92.92.582.03.01.92.92.48VV OL Low−Level Output Voltage(V in = V IH or V IL)I OL = 50 m AI OL = 50 m AI OL = 4 mA2.03.03.00.00.00.10.10.360.10.10.44VI in Input Leakage Current V in = 5.5 V or GND(T/R, OE)3.6±0.1±1.0m AI OZ Maximum 3−State Leakage Current V in = V IL or V IHV out = V CC or GND 3.6±0.25±2.5m AI CC Quiescent Supply Current V in = V CC or GND 3.6 4.040.0m A Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.AC ELECTRICAL CHARACTERISTICS (Input t r = t f= 3.0 ns)Symbol Parameter Test ConditionsT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min Maxt PLH, t PHL Propagation DelayInput to OutputV CC = 2.7 V C L = 15 pFC L = 50 pF6.18.610.714.21.01.013.517.0nsV CC = 3.3 ± 0.3 V C L = 15 pFC L = 50 pF4.77.26.610.11.01.08.011.5t PZL, t PZH Output Enable Time toHigh and Low LevelV CC = 2.7 V C L = 15 pFR L = 1 k W C L = 50 pF9.011.516.920.41.01.020.524.0nsV CC = 3.3 ± 0.3 V C L = 15 pFR L = 1 k W C L = 50 pF7.19.611.014.51.01.013.016.5t PLZ, t PHZ Output Disable Time FromHigh and Low LevelV CC = 2.7 V C L = 50 pFR L = 1 k W11.518.0 1.021.0nsV CC = 3.3 ± 0.3 V C L = 50 pFR L = 1 k W9.612.8 1.014.5t OSHL t OSLH Output−to−Output Skew(Note 1)V CC = 2.7 V C L = 50 pFV CC = 3.3 ±0.3 V C L = 50 pF1.51.51.51.5ns1.Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t OSHL) or LOW−to−HIGH (t OSLH); parameter guaranteed by design.CAPACITIVE CHARACTERISTICSSymbol ParameterT A = 25°C T A = −40 to 85°CUnit Min Typ Max Min MaxC in Input Capacitance (T/R, OE)41010pFC I/O Maximum 3−State I/O Capacitance8pFC PD Power Dissipation Capacitance (Note 2)21pF2.C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.Average operating current can be obtained by the equation: I CC(OPR) = C PD V CC f in + I CC/8 (per bit). C PD is used to determine the no−load dynamic power consumption; P D = C PD V CC2 f in + I CC V CC.NOISE CHARACTERISTICS (Input t r = t f = 3.0ns, C L = 50pF, V CC = 3.3V, Measured in SOIC Package)Symbol CharacteristicT A = 25°CUnit Typ MaxV OLP Quiet Output Maximum Dynamic V OL0.50.8V V OLV Quiet Output Minimum Dynamic V OL−0.5−0.8V V IHD Minimum High Level Dynamic Input Voltage 2.0V V ILD Maximum Low Level Dynamic Input Voltage0.8VFigure 2. Figure 3.V CCGNDSWITCHING WAVEFORMSOEA or BA or BV CCGND HIGHIMPEDANCE V OL +0.3V V OH -0.3V HIGHIMPEDANCEV CC GNDT/R*Includes all probe and jig capacitance C L *TEST POINT *Includes all probe and jig capacitanceTEST POINT CONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .TEST CIRCUITSFigure 4. Propagation Delay Test Circuit Figure 5. 3−State Test CircuitORDERING INFORMATIONDevicePackage Shipping †MC74LVX245DWR2G SOIC−20(Pb−Free)1000 / Tape & Reel MC74LVX245DTR2GTSSOP−20(Pb−Free)2500 / Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.CASE 948E−02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSCM0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.DETAIL E6.400.252------16X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.CASE 751D−05ISSUE GM0.25SA SBTDIM MIN MAXMILLIMETERSA 2.35 2.65A10.100.25B0.350.49C0.230.32D12.6512.95E7.407.60e 1.27 BSCH10.0510.55h0.250.75L0.500.90q0 7NOTES:1.DIMENSIONS ARE IN MILLIMETERS.2.INTERPRET DIMENSIONS AND TOLERANCESPER ASME Y14.5M, 1994.3.DIMENSIONS D AND E DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.5.DIMENSION B DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE PROTRUSIONSHALL BE 0.13 TOTAL IN EXCESS OF BDIMENSION AT MAXIMUM MATERIALCONDITION.__ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at /site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATIONMouser ElectronicsAuthorized DistributorClick to View Pricing, Inventory, Delivery & Lifecycle Information:O N Semiconductor:MC74LVX245MELG MC74LVX245MG MC74LVX245DTR2MC74LVX245DTR2G MC74LVX245DWR2 MC74LVX245DWR2G。
74HC245中文资料_数据手册_参数
74HC245八路巴士TRANCEIVER;三态 14.修订历史表13：修订记录文档ID发布日期数据表状态更改注意文档.数取代版本 74HC_HCT245_3 20050131产品数据表 - 9397 750 14502 74HC_HCT245_CNV_2莫迪科幻阳离子： ? 本数据表的格式经过重新设计以符 合新的演示文稿和飞利浦半导体的信息标准 ?第4节“订购信息”，第6节“固定信息”和第13节“包装大纲“修改为包含DHVQFN20 包. 74HC_HCT245_CNV_2 19930930产品SPECI FI CATION 9397 750 14502 ? 74HC245 NV 2005.保留所有权利. 74HC245产品数据表 2005年1月3日至31日 13的22飞利浦半导体 74HC245; 74HCT245八 路巴士TRANCEIVER;三态 12.波形测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图5.输入（AN，BN） 输出（BN，AN）传播延迟和输出转换时间测量点在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出下降.图6. 3态输出 启用和禁用时间表11：测量点类型输入产量 74HC245保留所有权利.产品数据表 2005年1月3日至3月31日 13的22飞利浦半导体 74HC245; 74HCT245八路公交车三态波形测量点在表 11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图5.输入（An，Bn）输出（Bn，An）传播延迟和输出转换时间测量点 在表11中给出. V OL 和V OH 是输出负载时发生的典型电压输出降.图6. 3状态输出使能和禁止时间表11：测量点类型输入产量 V M V M 74HC245 0.5V CC 0.5V CC 74HCT245 1.3 V 1.3 V 001aac433 t PLH t PHL VM V M 90％ 10％ V M V M Bn，输出 An，Bn输入 V 我 GND V OH V OL t TLH t THL 001aac479 t PLZ t PHZ输出残输出启用 90％ 10％输出启用 OE输入 V 我 V CC V OL V OH GND GND V M t PZL t PZH V M V M产量 LOW-到关关到LOW产量 74HC245输出频率; C L = pF中的输出负载电容; V CC =电源电压V; N =输入切换次数; Σ（C L ×V CC 2 ×f o ）=输出和.表10：动态特 性类型74HCT245 GND = 0 V;测试电路见图7.符号参数条件敏典型马克斯单元 T amb = 25°C t PHL ，t PLH传播延迟A到Bn或Bn到安见 图5 V CC = 4.5 V - 12 22 NS V CC = 5.0 V; C L = 15pF - 10 - NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 1630ns PHZ ，t PLZ 3状态输出禁用时间OE A或OE到Bn V CC = 4.5V; 见图6 - 1630ns t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 - 五 12 NS C PD功耗电容每个收发器 V I = GND至V CC - 1.5 V [1] -30 - pF的 T amb = -40°C至+85°C t PHL ，t PLH传播延迟A到Bn或Bn到 安 V CC = 4.5V; 见图5 --28 NS t PZH ，t PZL 3状态输出使能时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS PHZ ，t PLZ 3状态输出禁 用时间OE A或OE到Bn V CC = 4.5V; 见图6 --38 NS t THL ，t TLH输出转换时间 V CC = 4.5V; 见图5 --15 NS T amb = -40°C至+125°C t PHL ，t PLH传播延迟A到Bn或Bn到安 V CC = 4.5V; 见图5 --33 NS t PZH ，t PZL 3状态输出使能时间
TC74VHCT245AFW, 规格书,Datasheet 资料
TOSHIBA CMOS Digital Integrated Circuit Silicon MonolithicTC74VHCT245AF,TC74VHCT245AFT,TC74VHCT245AFKOctal Bus TransceiverThe TC74VHCT245A is an advanced high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C 2MOS technology. It achieves the high speed operation similar toequivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.It is intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input.The enable input (G ) can be used to disable the device so that the busses are effectively isolated.The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system.Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.Note: Output in off-stateFeatures (Note)• High speed: t pd = 4.9 ns (typ.) at V CC = 5 V• Low power dissipation: I CC = 4 μA (max) at Ta = 25°C • Compatible with TTL inputs: V IL = 0.8 V (max)V IH = 2.0 V (min)• Power down protection is provided on all inputs and outputs • Balanced propagation delays: t pLH≈ t pHL• Low noise: V OLP= 1.5 V (max)• Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.) 245 type.Note:Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors.TC74VHCT245AFTC74VHCT245AFTTC74VHCT245AFKWeightSOP20-P-300-1.27A: 0.22 g (typ.) TSSOP20-P-0044-0.65A: 0.08 g (typ.) VSSOP20-P-0030-0.50: 0.03 g (typ.)Pin AssignmentIEC Logic SymbolTruth TableX: Don’t care Z: High impedanceG V CC 16 B2 B3 B4 15 14 13 12 1120A5 A6 A7 A8A1 B5 B1 19 B6G A3 A4 18 A2 GND B817 B7 (top view)DIRAbsolute Maximum Ratings (Note 1)Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and thesignificant change in temperature, etc.) may cause this product to decrease in the reliability significantlyeven if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolutemaximum ratings and the operating ranges.Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability testreport and estimated failure rate, etc).Note 2: Output in off-stateNote 3: High or low state. I OUT absolute maximum rating must be observed.Note 4: V OUT < GND, V OUT > V CCOperating Ranges(Note 1)Note 1: The operating ranges are required to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either V CC or GND. Please connect both bus inputs and the bus outputs with V CC orGND when the I/O of the bus terminal changes by the function. In this case, please note that the output isnot short-circuited.Note 2: Output in off-stateNote 3: High or low stateElectrical CharacteristicsDC CharacteristicsTest ConditionTa = 25°CTa = −40 to 85°CCharacteristics SymbolV CC (V)Min Typ.Max Min MaxUnitHigh-level input voltage V IH ⎯ 4.5 to 5.5 2.0⎯⎯ 2.0 ⎯ VLow-level input voltageV IL ⎯4.5 to5.5⎯⎯ 0.8 ⎯ 0.8 VI OH = −50 μA 4.5 4.4 4.5 ⎯ 4.4 ⎯ High-level output voltageV OHV IN= V IH or V IL I OH = −8 mA4.53.94⎯⎯ 3.80 ⎯VI OL = 50 μA 4.5 ⎯ 0.0 0.1 ⎯ 0.1 Low-level output voltage V OLV IN= V IH or V ILI OL = 8 mA4.5 ⎯ ⎯ 0.36 ⎯ 0.44V3-state output off-state current I OZ V IN = V IH or V IL V OUT = V CC or GND 5.5⎯⎯±0.25⎯±2.50μAInput leakage currentI IN V IN = 5.5 V or GND 0 to 5.5⎯ ⎯ ±0.1 ⎯ ±1.0μA I CC V IN = V CC or GND 5.5 ⎯ ⎯ 4.0 ⎯ 40.0μAQuiescent supply current I CCT Per input: V IN = 3.4 V Other input: V CC or GND 5.5 ⎯ ⎯ 1.35 ⎯ 1.50mAOutput leakage currentI OPDV OUT = 5.5 V⎯⎯ 0.5 ⎯ 5.0 μAAC Characteristics (input: t r = t f = 3 ns)Note 1: Parameter guaranteed by design. t osLH = |t pLHm − t pLHn |, t osHL = |t pHLm − t pHLn |Note 2: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operatingcurrent consumption without load. Average operating current can be obtained by the equation:I CC (opr) = C PD ·V CC ·f IN + I CC /8 (per bit)Noise Characteristics (input: t r= t f= 3 ns)Test Condition Ta = 25°CUnit Characteristics SymbolV CC (V)Typ. LimitQuiet output maximum dynamic V OL V OLP C L= 50 pF 5.0 1.1 1.5 V Quiet output minimum dynamic V OL V OLV C L= 50 pF 5.0 −1.1 −1.5VMinimum high level dynamic inputV IHD C L= 50 pF 5.0 ⎯ 2.0 V voltageMaximum low level dynamic inputV ILD C L= 50 pF 5.0 ⎯ 0.8 V voltageWeight: 0.22 g (typ.)Weight: 0.08 g (typ.)Weight: 0.03 g (typ.)RESTRICTIONS ON PRODUCT USE•Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice.•This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission.•Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. Customers are responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before creating and producing designs and using, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the instructions for the application that Product will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO LIABILITY FOR CUSTOMERS’ PRODUCT DESIGN OR APPLICATIONS.•Product is intended for use in general electronics applications (e.g., computers, personal equipment, office equipment, measuring equipment, industrial robots and home electronics appliances) or for specific applications as expressly stated in this document.Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage or serious public impact (“Unintended Use”). Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains, ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. Do not use Product for Unintended Use unless specifically permitted in this document.•Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.•Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations.•The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.•ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITYWHATSOEVER, INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2) DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT.•Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction weapons). Product and related software and technology may be controlled under the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulations. •Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU RoHS Directive. TOSHIBA assumes no liability for damages or losses occurring as a result of noncompliance with applicable laws and regulations.。
MC74ACT245DWG中文资料
MC74AC245, MC74ACT245Octal BidirectionalTransceiver with 3−State Inputs/OutputsThe MC74AC245/74ACT245 contains eight non−inverting bidirectional buffers with 3−state outputs and is intended for bus−oriented applications. Current sinking capability is 24 mA at both the A and B ports. The Transmit/Receive (T/R) input determines the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a High Z condition.Features•Noninverting Buffers •Bidirectional Data Path•A and B Outputs Source/Sink 24 mA •′ACT245 has TTL Compatible Inputs •Pb−Free Packages are AvailablePIN ASSIGNMENTPIN FUNCTION OE Output Enable Input T/R Transmit/Receive InputA 0−A 7Side A 3−State Inputs or 3−State OutputsB 0−B 7Side B 3−State Inputs or 3−State OutputsTRUTH TABLESInputs Outputs OE T/R L L Bus B Data to Bus A L H Bus A Data to Bus B HXHigh Z StateH = HIGH Voltage Level L = LOW Voltage Level X = ImmaterialFigure 1.V OE B B B B B B B BT/RA 0A 1A 2A 3A 4A 5A 6A 7GNDSOIC−20W DW SUFFIX CASE 751DTSSOP−20DT SUFFIX CASE 948ESOEIAJ−20M SUFFIX CASE 9671PDIP−20N SUFFIX CASE 738See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.ORDERING INFORMATIONSee general marking information in the device marking section on page 7 of this data sheet.DEVICE MARKING INFORMATIONMAXIMUM RATINGSSymbol Parameter Value Unit V CC DC Supply Voltage (Referenced to GND)−0.5 to +7.0V V IN DC Input Voltage (Referenced to GND)−0.5 to V CC +0.5V V OUT DC Output Voltage (Referenced to GND)−0.5 to V CC +0.5VI IN DC Input Current, per Pin±20mAI OUT DC Output Sink/Source Current, per Pin±50mAI CC DC V CC or GND Current per Output Pin±50mAT stg Storage Temperature−65 to +150°C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Typ Max UnitV CC Supply Voltage ′AC 2.0 5.0 6.0V ′ACT 4.5 5.0 5.5V IN, V OUT DC Input Voltage, Output Voltage (Ref. to GND)0−V CC Vt r, t f Input Rise and Fall Time (Note 1)′AC Devices except Schmitt InputsV CC @ 3.0 V−150−V CC @ 4.5 V−40−ns/VV CC @ 5.5 V−25−t r, t f Input Rise and Fall Time (Note 2)′ACT Devices except Schmitt InputsV CC @ 4.5 V−10−ns/VV CC @ 5.5 V−8.0−T J Junction Temperature (PDIP)−−140°C T A Operating Ambient Temperature Range−402585°CI OH Output Current − High−−−24mAI OL Output Current − Low−−24mA1.V IN from 30% to 70% V CC; see individual Data Sheets for devices that differ from the typical input rise and fall times.2.V IN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.DC CHARACTERISTICSSymbol Parameter V CC(V)74AC74ACUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 3.0 1.5 2.1 2.1V OUT = 0.1 V4.5 2.25 3.15 3.15V or V CC − 0.1 V5.5 2.75 3.85 3.85V IL Maximum Low LevelInput Voltage 3.0 1.50.90.9V OUT = 0.1 V4.5 2.25 1.35 1.35V or V CC − 0.1 V5.5 2.75 1.65 1.65V OH Minimum High LevelOutput Voltage 3.0 2.99 2.9 2.9I OUT = −50 m A4.5 4.49 4.4 4.4V5.5 5.49 5.4 5.4V*V IN = V IL or V IH3.0− 2.56 2.46−12 mA4.5− 3.86 3.76I OH−24 mA5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 3.00.0020.10.1I OUT = 50 m A4.50.0010.10.1V5.50.0010.10.1V*V IN = V IL or V IH3.0−0.360.4412 mA4.5−0.360.44I OL24 mA5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDI OZT Maximum3-StateCurrentV I(OE) = V IL, V IH 5.5−±0.6±6.0m A V I = V CC, GNDV O = V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V MinI CC Maximum QuiescentSupply Current5.5−8.080.0m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.NOTE:I IN and I CC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V CC.AC CHARACTERISTICS (For Figures and Waveforms − See AND8277/D at )Symbol Parameter V CC*(V)74AC74ACUnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation Delay 3.3 1.5 5.08.5 1.09.0ns3−5 A n to B n or B n to A n 5.0 1.5 3.5 6.5 1.07.0t PHL Propagation Delay 3.3 1.5 5.08.5 1.09.0ns3−5 A n to B n or B n to A n 5.0 1.5 3.5 6.0 1.07.0t PZH Output Enable Time 3.3 2.57.011.5 2.012.5ns3−7 5.0 1.5 5.08.5 1.09.0t PZL Output Enable Time 3.3 2.57.512.0 2.013.5ns3−8 5.0 1.5 5.59.0 1.09.5t PHZ Output Disable Time 3.3 2.0 6.512.0 1.012.5ns3−7 5.0 1.5 5.59.0 1.010.0t PLZ Output Disable Time 3.3 2.07.011.5 1.513.0ns3−8 5.0 1.5 5.59.0 1.010.0*Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. DC CHARACTERISTICSSymbol Parameter V CC(V)74ACT74ACTUnit Conditions T A = +25°CT A =−40°C to+85°CTyp Guaranteed LimitsV IH Minimum High LevelInput Voltage 4.5 1.5 2.0 2.0VV OUT = 0.1 V 5.5 1.5 2.0 2.0or V CC − 0.1 VV IL Maximum Low LevelInput Voltage 4.5 1.50.80.8VV OUT = 0.1 V 5.5 1.50.80.8or V CC − 0.1 VV OH Minimum High LevelOutput Voltage 4.5 4.49 4.4 4.4VI OUT = −50 m A5.5 5.49 5.4 5.4*V IN = V IL or V IH4.5− 3.86 3.76V I OH−24 mA5.5− 4.86 4.76−24 mAV OL Maximum Low LevelOutput Voltage 4.50.0010.10.1VI OUT = 50 m A5.50.0010.10.1*V IN = V IL or V IH4.5−0.360.44VI OL24 mA 5.5−0.360.4424 mAI IN Maximum InputLeakage Current5.5−±0.1±1.0m A V I = V CC, GNDD I CCT Additional Max. I CC/Input 5.50.6− 1.5mA V I = V CC −2.1 VI OZT Maximum3−StateCurrentV I(OE) = V IL, V IH 5.5−±0.6±6.0m A V I = V CC, GNDV O = V CC, GNDI OLD†Minimum DynamicOutput Current 5.5−−75mA V OLD = 1.65 V MaxI OHD 5.5−−−75mA V OHD = 3.85 V MinI CC Maximum QuiescentSupply Current5.5−8.080.0m A V IN = V CC or GND*All outputs loaded; thresholds on input associated with output under test.†Maximum test duration 2.0 ms, one output loaded at a time.AC CHARACTERISTICS (For Figures and Waveforms − See AND8277/D at )Symbol Parameter V CC*(V)74ACT74ACTUnitFig.No.T A = +25°CC L = 50 pFT A = −40°Cto +85°CC L = 50 pFMin Typ Max Min Maxt PLH Propagation Delay, A n to B n or B n to A n 5.0 1.5 4.07.5 1.58.0ns3−5 t PHL Propagation Delay, A n to B n or B n to A n 5.0 1.5 4.08.0 1.09.0ns3−5 t PZH Output Enable Time 5.0 1.5 5.010 1.511.0ns3−7 t PZL Output Enable Time 5.0 1.5 5.510 1.512.0ns3−8 t PHZ Output Disable Time 5.0 1.5 5.510 1.011.0ns3−7 t PLZ Output Disable Time 5.0 2.0 5.010 1.511.0ns3−8 *Voltage Range 5.0 V is 5.0 V ±0.5 V.CAPACITANCESymbol Parameter ValueTypUnit Test ConditionsC IN Input Capacitance 4.5pF V CC = 5.0 V C I/O Input/Output Capacitance15pF V CC = 5.0 V C PD Power Dissipation Capacitance45pF V CC = 5.0 VORDERING INFORMATIONDevicePackage Shipping †MC74AC245N PDIP−2018 Units / Rail MC74AC245NG PDIP−20(Pb−Free)MC74ACT245N PDIP−20MC74ACT245NG PDIP−20(Pb−Free)MC74AC245DW SOIC−2038 Units / Rail MC74AC245DWG SOIC−20(Pb−Free)MC74AC245DWR2SOIC−201000 / Tape & Reel MC74AC245DWR2G SOIC−20(Pb−Free)MC74ACT245DW SOIC−2038 Units / Rail MC74ACT245DWG SOIC−20(Pb−Free)MC74ACT245DWR2SOIC−201000 / Tape & Reel MC74ACT245DWR2G SOIC−20(Pb−Free)MC74AC245DT TSSOP−20*75 Units / RailMC74AC245DTG TSSOP−20*MC74AC245DTR2TSSOP−20*2500 / Tape & ReelMC74AC245DTR2G TSSOP−20*MC74ACT245DT TSSOP−20*75 Units / RailMC74ACT245DTG TSSOP−20*MC74ACT245DTR2TSSOP−20*2500 / Tape & ReelMC74ACT245DTR2G TSSOP−20*MC74AC245M SOEIAJ−2040 Units / Rail MC74AC245MG SOEIAJ−20(Pb−Free)MC74AC245MEL SOEIAJ−202000 / Tape & Reel MC74AC245MELG SOEIAJ−20(Pb−Free)MC74ACT245M SOEIAJ−2040 Units / Rail MC74ACT245MG SOEIAJ−20(Pb−Free)MC74ACT245MEL SOEIAJ−202000 / Tape & Reel MC74ACT245MELGSOEIAJ−20(Pb−Free)†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*These packages are inherently Pb−Free.MARKING DIAGRAMSPDIP−20SOIC−20W TSSOP−20SOEIAJ−20201120AC 245ALYW G G74ACT245AWLYWWGA = Assembly Location WL, L = Wafer Lot YY, Y = YearWW, W = Work Week G or G = Pb−Free Package(Note: Microdot may be in either location)20174AC245AWLYWWG120ACT 245ALYW G GPACKAGE DIMENSIONSPDIP−20N SUFFIXPLASTIC DIP PACKAGECASE 738−03ISSUE ENOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.4.DIMENSION B DOES NOT INCLUDE MOLD FLASH.DIM MIN MAX MIN MAX MILLIMETERSINCHES A 25.6627.171.010 1.070B 6.10 6.600.2400.260C 3.81 4.570.1500.180D 0.390.550.0150.022G 2.54 BSC 0.100 BSC J 0.210.380.0080.015K 2.80 3.550.1100.140L 7.62 BSC 0.300 BSC M 0 15 0 15 N0.51 1.010.0200.040____E 1.27 1.770.0500.070F 1.27 BSC 0.050 BSC SOIC−20WDW SUFFIX CASE 751D−05ISSUE GPACKAGE DIMENSIONSTSSOP−20DT SUFFIX CASE 948E−02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSCH 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSC M 0 8 0 8 ____1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−.6.400.252−−−−−−16X0.360.65PITCH*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*PACKAGE DIMENSIONSSOEIAJ−20M SUFFIX CASE 967−01ISSUE ADIM MIN MAX MIN MAX INCHES−−− 2.05−−−0.081MILLIMETERS 0.050.200.0020.0080.350.500.0140.0200.150.250.0060.01012.3512.800.4860.5045.10 5.450.2010.2151.27 BSC 0.050 BSC 7.408.200.2910.3230.500.850.0200.0331.10 1.500.0430.0590 0.700.900.0280.035−−−0.81−−−0.032A 1H E Q 1L E _10 _0 _10 _NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSIONS D AND E DO NOT INCLUDEMOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE.4.TERMINAL NUMBERS ARE SHOWN FORREFERENCE ONLY.5.THE LEAD WIDTH DIMENSION (b) DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION AT MAXIMUM MATERIAL CONDITION.DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACEBETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).A b c D E e L M ZON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
74hc245; 74hct245 八路总线收发器; 3-state 数据表说明书
74HC245; 74HCT245Octal bus transceiver; 3-stateRev. 5 — 14 July 2020Product data sheet1. General descriptionThe 74HC245; 74HCT245 is an 8-bit transceiver with 3-state outputs. The device features anoutput enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V CC .2. Features and benefits•Complies with JEDEC standard JESD7A •Input levels:•For 74HC245: CMOS level •For 74HCT245: TTL level •Octal bidirectional bus interface •Non-inverting 3-state outputs •ESD protection:••HBM JESD22-A114F exceeds 2000 V •MM JESD22-A115-A exceeds 200 V •Multiple package options•Specified from -40 °C to +85 °C and from -40 °C to +125 °C3. Ordering information4. Functional diagram5. Pinning information5.1. Pinning5.2. Pin description6. Functional descriptionTable 3. Function tableH = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.7. Limiting valuesTable 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).[1]For SOT163-1 (SO20) package: P tot derates linearly with 12.3 mW/K above 109 °C.For SOT339-1 (SSOP20) package: P tot derates linearly with 10.0 mW/K above 100 °C.For SOT360-1 (TSSOP20) package: P tot derates linearly with 10.0 mW/K above 100 °C.For SOT764-1 (DHVQFN20) package: P tot derates linearly with 12.9 mW/K above 111 °C.8. Recommended operating conditions9. Static characteristicsTable 6. Static characteristicsAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).10. Dynamic characteristicsTable 7. Dynamic characteristicsGND = 0 V; for test circuit see Fig. 7.[1]t pd is the same as t PHL and t PLH.[2]t en is the same as t PZH and t PZL.[3]t dis is the same as t PHZ and t PLZ.[4]t t is the same as t THL and t TLH.[5]C PD is used to determine the dynamic power dissipation (P D in μW):P D = C PD x V CC2 x f i x N + ∑(C L x V CC2 x f o) where:f i = input frequency in MHz;f o = output frequency in MHz;C L = output load capacitance in pF;V CC = supply voltage in V;N = number of inputs switching;∑(C L x V CC2 x f o) = sum of outputs.10.1. Waveforms and test circuit11. Package outlineSO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1Fig. 8.Package outline SOT163-1 (SO20)SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1Fig. 9.Package outline SOT339-1 (SSOP20)TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1Fig. 10.Package outline SOT360-1 (TSSOP20)DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;Fig. 11.Package outline SOT764-1 (DHVQFN20)12. Abbreviations13. Revision history14. Legal informationData sheet status[1]Please consult the most recently issued document before initiating orcompleting a design.[2]The term 'short data sheet' is explained in section "Definitions".[3]The product status of device(s) described in this document may havechanged since this document was published and may differ in case ofmultiple devices. The latest product status information is available onthe internet at https://.DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet.DisclaimersLimited warranty and liability — Information in this document is believedto be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracyor completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia.In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia.Right to make changes — Nexperia reserves the right to make changesto information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunctionof an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitableand fit for the customer’s applications and products planned, as well asfor the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect.Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device.Terms and conditions of commercial sale — Nexperia products aresold subject to the general terms and conditions of commercial sale, as published at /profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications.Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.Contents1. General description (1)2. Features and benefits (1)3. Ordering information (1)4. Functional diagram (2)5. Pinning information (3)5.1. Pinning (3)5.2. Pin description (3)6. Functional description (3)7. Limiting values (4)8. Recommended operating conditions (4)9. Static characteristics (5)10. Dynamic characteristics (7)10.1. Waveforms and test circuit (8)11. Package outline (10)12. Abbreviations (14)13. Revision history (14)14. Legal information (15)© Nexperia B.V. 2020. All rights reservedFor more information, please visit: Forsalesofficeaddresses,pleasesendanemailto:*************************** Date of release: 14 July 2020。
74HC245中文资料,74HC245N规格书,74HC245D技术文档,DATASHEET,NXP代理商
74HC245; 74HCT245
Octal bus tranceiver; 3-state
Rev. 03 — 31 January 2005
Product data sheet
1. General description
The 74HC245; 74HCT245 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL).
plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
74HCT245BQ
−40 °C to +125 °C
DHVQFN20 plastic dual-in-line compatible thermal enhanced SOT764-1 very thin quad flat package no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm
x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V s Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Quick reference data
SOT163-1
74HCT245PW
−40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; SOT360-1 body width 4.4 mm
HD74HC245RPEL中文资料
HD74HC245RPEL中⽂资料HD74HCT245Octal Bus Transceivers (with 3-state outputs)REJ03D0665–0200(Previous ADE-205-554)Rev.2.00Mar 30, 2006 DescriptionThis device has an active low enable input G and a direction control input (DIR). When DIR is high, data flows from the A inputs to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HCT245 transfers true data from one bus to the other.This device does not have schmitt trigger inputs.FeaturesLSTTL Output Logic Level Compatibility as well as CMOS Output CompatibilityHigh Speed Operation: t pd (A to Y) = 12 ns typ (C L = 50 pF)High Output Current: Fanout of 15 LSTTL LoadsWide Operating Voltage: V CC = 4.5 to 5.5 VLow Input Current: 1 µA maxLow Quiescent Supply Current: I CC (static) = 4 µA max (Ta = 25°C)Ordering InformationPart Name Package TypePackage Code(Previous Code)PackageAbbreviationTaping Abbreviation(Quantity)HD74HC245P DILP-20pin PRDP0020AC-B(DP-20NEV)P —HD74HC245FPEL SOP-20 pin (JEITA) PRSP0020DD-B(FP-20DAV)FP EL (2,000 pcs/reel)HD74HC245RPEL SOP-20 pin (JEDEC) PRSP0020DC-A(FP-20DBV)RP EL (1,000 pcs/reel)HD74HC245TELL TSSOP-20pin PTSP0020JB-A(TTP-20DAV)T ELL (2,000 pcs/reel)Note: Please consult the sales office for the above package availability. Function TableEnable G Direction Control DIR OperationL L B data to A busL H A data to B busH XIsolation H : high levelL : low levelX : irrelevantPin ArrangementAbsolute Maximum RatingsUnitRatingsItem SymbolSupply voltage range V CC–0.5 to 7.0 VInput / Output voltage V IN, V OUT–0.5 to V CC +0.5 VInput / Output diode current I IK, I OK±20 mA Output current I O±35 mA V CC, GND current I CC or I GND±75 mAmW Power dissipation P T 500Storage temperature Tstg –65 to +150 °CNote: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.Recommended Operating ConditionsUnitConditionsRatingsItem SymbolSupply voltage V CC 4.5 to 5.5 VInput / Output voltage V IN, V OUT0 to V CC VOperating temperature Ta –40 to 85 °CInput rise / fall time*1t r, t f0 to 500 ns V CC = 4.5 VNotes: 1. This item guarantees maximum limit when one input switches.Waveform: Refer to test circuit of switching characteristics.Electrical CharacteristicsTa = 25°C Ta = –40 to+85°CItem Symbol V CC (V)Min Typ Max Min MaxUnit Test ConditionsV IH 4.5 to 5.5 2.0 — — 2.0 — V Input voltage V IL 4.5 to 5.5 — — 0.8 — 0.8 V 4.4 — — 4.4 — V I OH = –20 µAV OH 4.5 4.5 4.18 — — 4.13 — Vin = V IH or V IL I OH = –6 mA— — 0.1 — 0.1 V I OL = 20 µAOutput voltageV OL 4.5 4.5 — — 0.26 — 0.33 Vin = V IH or V IL I OL = 6 mAOff-state outputcurrentI OZ 5.5— — ±0.5 — ±5.0 µA Vin = V IH or V IL , Vout = V CC or GNDInput currentIin 5.5 — — ±0.1 — ±1.0 µA Vin = V CC or GND Quiescent current I CC 5.5 — — 4.0 — 40 µA Vin = V CC or GND, Iout = 0µASwitching Characteristics(C L = 50 pF, Input t r = t f = 6 ns)Ta = 25°CTa = –40 to +85°CItem Symbol V CC (V)Min Typ Max Min MaxUnit Test Conditionst PLH 4.5 — 11 22 —28 Propagation delay time t PHL 4.5 — 13 22 — 28 ns t ZL 4.5 — 17 30 — 38 Output enable time t ZH 4.5 — 14 30 — 38 ns t LZ 4.5 — 20 30 — 38 Output disable time t HZ 4.5 — 22 30 — 38ns Output rise/fall time t TLH t THL 4.5 — 4 12 — 15 ns Input capacitance Cin——510—10pFTest CircuitWaveformsPackage Dimensions/doc/9c8b776d27d3240c8547ef02.html RENESAS SALES OFFICESRefer to "/doc/9c8b776d27d3240c8547ef02.html /en/network" for the latest and detailed information. Renesas Technology America, Inc.450 Holger Way, San Jose, CA 95134-1368, U.S.ATel: <1> (408) 382-7500, Fax: <1> (408) 382-7501Renesas Technology Europe LimitedDukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900Renesas Technology (Shanghai) Co., Ltd.Unit 204, 205, AZIACenter, No.1233 Lujiazui Ring Rd, Pudong District, Shanghai, China 200120Tel: <86> (21) 5877-1818, Fax: <86> (21) 6887-7898Renesas Technology Hong Kong Ltd.7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong KongTel: <852> 2265-6688, Fax: <852> 2730-6071Renesas Technology Taiwan Co., Ltd.10th Floor, No.99, Fushing North Road, Taipei, TaiwanTel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999Renesas Technology Singapore Pte. Ltd.1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632Tel: <65> 6213-0200, Fax: <65> 6278-8001Renesas Technology Korea Co., Ltd.Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, KoreaTel: <82> (2) 796-3115, Fax: <82> (2) 796-2145Renesas Technology Malaysia Sdn. BhdUnit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, MalaysiaTel: <603> 7955-9390, Fax: <603> 7955-95102006. Renesas Technology Corp., All rights reserved. Printed in Japan.。
74AHCT245
−
2.1 −
2.1 −
5.5
3.85 −
−
3.85 −
3.85 −
VIL
LOW-level input
voltage
2.0
−−
0.5 − 0.5 − 0.5 V
3.0
−−
0.9 − 0.9 − 0.9
5.5
−−
1.65 − 1.65 − 1.65
VOH
HIGH-level output VI = VIH or VIL; 2.0
PACKAGES
PACKAGE MATERIAL
SO TSSOP
SO TSSOP
plastic plastic plastic plastic
CODE SOT163-1 SOT360-1 SOT163-1 SOT360-1
DESCRIPTION direction control data inputs/outputs ground (0 V) data inputs/outputs output enable input (active LOW) DC supply voltage
SYMBOL
PARAMETER
CONDITIONS
VCC
DC supply voltage
VI
input voltage range
IIK
DC input diode current
VI < −0.5 V; note 1
IOK
DC output diode current
VO < −0.5 V or VO > VCC + 0.5 V; note 1
NORTH AMERICA
MM74HC245A中文资料
© 2005 Fairchild Semiconductor Corporation DS005165September 1983Revised May 2005MM74HC245A Octal 3-STATE TransceiverMM74HC245AOctal 3-STATE TransceiverGeneral DescriptionThe MM74HC245A 3-STATE bidirectional buffer utilizes advanced silicon-gate CMOS technology, and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capaci-tances. This circuit possesses the low power consumption and high noise immunity usually associated with CMOS cir-cuitry, yet has speeds comparable to low power Schottky TTL circuits.This device has an active LOW enable input G and a direc-tion control input, DIR. When DIR is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW, data flows from the B inputs to the A outputs. The MM74HC245A transfers true data from one bus to the other.This device can drive up to 15 LS-TTL Loads, and does not have Schmitt trigger inputs. All inputs are protected from damage due to static discharge by diodes to V CC and ground.Featuress Typical propagation delay: 13 ns s Wide power supply range: 2–6Vs Low quiescent current: 80 P A maximum (74 HC)s 3-STATE outputs for connection to bus oriented systems s High output drive: 6 mA (minimum)s Same as the 645Ordering Code:Devices also available in T ape and Reel. Specify by appending the suffix letter “X ” to the ordering code.Connection DiagramPin Assignments for DIP , SOIC, SOP and TSSOPTop ViewTruth TableH HIGH Level L LOW Level X IrrelevantOrder Number Package NumberPackage DescriptionMM74HC245AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide MM74HC245ASJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WideMM74HC245AMTC MTC2020-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide MM74HC245ANN20A20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WideControl Inputs OperationG DIR L L B data to A bus L H A data to B busHXIsolation 2M M 74H C 245ALogic DiagramMM74HC245AAbsolute Maximum Ratings (Note 1)(Note 2)Recommended Operating ConditionsNote 1: Maximum Ratings are those values beyond which damage to the device may occur.Note 2: Unless otherwise specified all voltages are referenced to ground.Note 3: Power Dissipation temperature derating — plastic “N ” package: 12 mW/q C from 65q C to 85q C.DC Electrical Characteristics (Note 4)Note 4: For a power supply of 5V r 10% the worst case output voltages (V OH , and V OL ) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case V IH and V IL occur at V CC 5.5V and 4.5V respectively. (The V IH value at 5.5V is 3.85V.) The worst case leakage cur-rent (I IN , I CC , and I OZ ) occur for CMOS at the higher voltage and so the 6.0V values should be used.Supply Voltage (V CC )0.5 to 7.0V DC Input Voltage DIR and G pins (V IN ) 1.5 to V CC 1.5V DC Input/Output Voltage (V IN , V OUT ) 0.5 to V CC 0.5VClamp Diode Current (I CD )r 20 mA DC Output Current, per pin (I OUT )r 35 mA DC V CC or GND Current, per pin (I CC )r 70 mAStorage Temperature Range (T STG ) 65q C to 150q CPower Dissipation (P D )(Note 3)600 mW S.O. Package only 500 mWLead Temperature (T L )(Soldering 10 seconds)260q C MinMax Units Supply Voltage (V CC )26VDC Input or Output Voltage (V IN , V OUT )V CCVOperating Temperature Range (T A ) 40 85q CInput Rise/Fall Times (t r , t f )V CC 2.0V 1000ns V CC 4.5V 500ns V CC 6.0V400nsSymbol ParameterConditionsV CC T A 25q C T A 40 to 85q C T A 55 to 125q CUnits TypGuaranteed LimitsV IHMinimum HIGH Level Input 2.0V 1.5 1.5 1.5V Voltage4.5V 3.15 3.15 3.15V 6.0V 4.2 4.2 4.2V V ILMaximum LOW Level Input2.0V 0.50.50.5V Voltage 4.5V1.35 1.35 1.35V 6.0V1.8 1.8 1.8V V OHMinimum HIGH Level Output V IN V IH or V IL Voltage|I OUT | d 20 P A2.0V 2.0 1.9 1.9 1.9V 4.5V 4.5 4.4 4.4 4.4V 6.0V6.05.95.95.9VV IN V IH or V IL |I OUT | d 6.0 mA 4.5V 4.2 3.98 3.84 3.7V |I OUT | d 7.8 mA6.0V5.75.485.345.2VV OLMaximum LOW Level Output V IN V IH or V IL Voltage|I OUT | d 20 P A2.0V 00.10.10.1V 4.5V 00.10.10.1V 6.0V0.10.10.1VV IN V IH or V IL |I OUT | d 6.0 mA 4.5V 0.20.260.330.4V |I OUT | d 7.8 mA6.0V 0.20.260.330.4V I IN Input Leakage V IN V CC to GND6.0Vr 0.1r 1.0r 1.0P ACurrent (G and DIR)I OZ Maximum 3-STATE Output V OUT V CC or GND 6.0Vr 0.5r 5.0r 10P ALeakage CurrentEnable G V IH I CCMaximum Quiescent Supply V IN V CC or GND 6.0V8.080160P ACurrentI OUT 0 P A 4M M 74H C 245AAC Electrical CharacteristicsV CC 5V, T A 25q C, t r t f 6ns AC Electrical CharacteristicsV CC 2.0V to 6.0V, C L 50 pF, t r t f 6ns (unless otherwise specified)Note 5: C PD determines the no load dynamic power consumption, P D C PD V CC 2 f I CC V CC , and the no load dynamic current consumption, I S C PD V CC f I CC .Symbol ParameterConditionsTyp GuaranteedUnits Limit t PHL , t PLH Maximum Propagation Delay C L 45 pF 1217ns t PZH , t PZL Maximum Output Enable R L 1 k :2435nsTimeC L 45 pF t PHZ , t PLZMaximum Output Disable R L 1 k :1825nsTimeC L 5 pFSymbol ParameterConditions V CC T A 25q C T A 40 to 85q C T A 55 to 125q C Units Typ Guaranteed Limitst PHL ,Maximum Propagation C L 50 pF 2.0V 3190113135ns t PLHDelayC L 150 pF 2.0V 4196116128ns C L 50 pF 4.5V 13182327ns C L 150 pF 4.5V 17222833ns C L 50 pF 6.0V 11151923ns C L 150 pF6.0V14192328ns t PZH ,Maximum Output Enable R L 1 k :t PZLTimeC L 50 pF 2.0V 71190240285ns C L 150 pF 2.0V 81240300360ns C L 50 pF 4.5V 26384857ns C L 150 pF 4.5V 31486072ns C L 50 pF 6.0V 21324148ns C L 150 pF6.0V 25415161ns t PHZ ,Maximum Output Disable R L 1 k : 2.0V 39135169203ns t PLZTimeC L 50 pF 4.5V 20273441ns 6.0V18232934ns t TLH , t THL Output Rise and Fall TimeC L 50 pF2.0V 20607590ns 4.5V 6121518ns 6.0V5101315ns C PD Power Dissipation G V IL 50pF Capacitance (Note 5)G V IH5pFC IN Maximum Input Capacitance 5101010pF C IN/OUTMaximum Input/Output 15202020pFCapacitance, A or B MM74HC245APhysical Dimensions inches (millimeters) unless otherwise noted20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" WidePackage Number M20B 6M M 74H C 245APhysical Dimensionsinches (millimeters) unless otherwise noted (Continued)20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage Number M20D MM74HC245APhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage Number MTC208M M 74H C 245A O c t a l 3-S T A T E T r a n s c e i v e rPhysical Dimensions inches (millimeters) unless otherwise noted (Continued)20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" WidePackage Number N20AFairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.LIFE SUPPORT POLICYFAIRCHILD ’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:1.Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea-sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea-sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.。
74HC_HCT245
Input/output An A=B input Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Bn input B=A Z
74HC_HCT245
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 February 2016
© Nexperia B.V. 2017. All rights reserved
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range
74HC245D
40 C to +125 C
74HCT245D
74HC245DB 40 C to +125 C
74HCT245DB
Conditions
Min Max Unit
VCC
supply voltage
IIK
input clamping current
IOK
output clamping current
IO
output current
VI < 0.5 V or VI > VCC + 0.5 V VO < 0.5 V or VO > VCC + 0.5 V 0.5 V < VO < VCC + 0.5 V
SN74HCT245NSR中文资料
PACKAGING INFORMATIONOrderable Device Status(1)PackageType PackageDrawingPins PackageQtyEco Plan(2)Lead/Ball Finish MSL Peak Temp(3)5962-8550601VRA ACTIVE CDIP J201None Call TI Level-NC-NC-NC 5962-8550601VSA ACTIVE CFP W201None Call TI Level-NC-NC-NC 85506012A ACTIVE LCCC FK201None Call TI Level-NC-NC-NC 8550601RA ACTIVE CDIP J201None Call TI Level-NC-NC-NC JM38510/65553BRA ACTIVE CDIP J201None Call TI Level-NC-NC-NC JM38510/65553BSA ACTIVE CFP W201None Call TI Level-NC-NC-NC SN54HCT245J ACTIVE CDIP J201None Call TI Level-NC-NC-NC SN74HCT245DBLE OBSOLETE SSOP DB20None Call TI Call TISN74HCT245DBR ACTIVE SSOP DB202000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HCT245DW ACTIVE SOIC DW2025Pb-Free(RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIMSN74HCT245DWR ACTIVE SOIC DW202000Pb-Free(RoHS)CU NIPDAU Level-2-250C-1YEAR/Level-1-235C-UNLIMSN74HCT245N ACTIVE PDIP N2020Pb-Free(RoHS)CU NIPDAU Level-NC-NC-NC SN74HCT245N3OBSOLETE PDIP N20None Call TI Call TISN74HCT245NSR ACTIVE SO NS202000Pb-Free(RoHS)CU NIPDAU Level-2-260C-1YEAR/Level-1-235C-UNLIMSN74HCT245PW ACTIVE TSSOP PW2070Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMSN74HCT245PWLE OBSOLETE TSSOP PW20None Call TI Call TISN74HCT245PWR ACTIVE TSSOP PW202000Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIMSN74HCT245PWT ACTIVE TSSOP PW20250Pb-Free(RoHS)CU NIPDAU Level-1-250C-UNLIM SNJ54HCT245FK ACTIVE LCCC FK201None Call TI Level-NC-NC-NC SNJ54HCT245J ACTIVE CDIP J201None Call TI Level-NC-NC-NC SNJ54HCT245W ACTIVE CFP W201None Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows:ACTIVE:Product device recommended for new designs.LIFEBUY:TI has announced that the device will be discontinued,and a lifetime-buy period is in effect.NRND:Not recommended for new designs.Device is in production to support existing customers,but TI does not recommend using this part in a new design.PREVIEW:Device has been announced but is not in production.Samples may or may not be available.OBSOLETE:TI has discontinued the production of the device.(2)Eco Plan-May not be currently available-please check /productcontent for the latest availability information and additional product content details.None:Not yet available Lead(Pb-Free).Pb-Free(RoHS):TI's terms"Lead-Free"or"Pb-Free"mean semiconductor products that are compatible with the current RoHS requirements for all6substances,including the requirement that lead not exceed0.1%by weight in homogeneous materials.Where designed to be soldered at high temperatures,TI Pb-Free products are suitable for use in specified lead-free processes.Green(RoHS&no Sb/Br):TI defines"Green"to mean"Pb-Free"and in addition,uses package materials that do not contain halogens, including bromine(Br)or antimony(Sb)above0.1%of total product weight.(3)MSL,Peak Temp.--The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications,and peak solder temperature.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.TI bases its knowledge and belief on information provided by third parties,and makes no representation or warranty as to the accuracy of such information.Efforts are underway to better integrate information from third parties.TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary,and thus CAS numbers and other limited information may not be available for release.In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s)at issue in this document sold by TI to Customer on an annual basis.元器件交易网IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,enhancements, improvements, and other changes to its products and services at any time and to discontinueany product or service without notice. Customers should obtain the latest relevant information before placingorders and should verify that such information is current and complete. All products are sold subject to TI’s termsand conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its hardware products to the specifications applicable at the time of sale inaccordance with TI’s standard warranty. T esting and other quality control techniques are used to the extent TIdeems necessary to support this warranty. Except where mandated by government requirements, testing of allparameters of each product is not necessarily performed.TI assumes no liability for applications assistance or customer product design. Customers are responsible fortheir products and applications using TI components. T o minimize the risks associated with customer productsand applications, customers should provide adequate design and operating safeguards.TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or processin which TI products or services are used. Information published by TI regarding third-party products or servicesdoes not constitute a license from TI to use such products or services or a warranty or endorsement thereof.Use of such information may require a license from a third party under the patents or other intellectual propertyof the third party, or a license from TI under the patents or other intellectual property of TI.Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproductionof this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable forsuch altered documentation.Resale of TI products or services with statements different from or beyond the parameters stated by TI for thatproduct or service voids all express and any implied warranties for the associated TI product or service andis an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Following are URLs where you can obtain information on other Texas Instruments products and applicationsolutions:Products ApplicationsAmplifiers Audio /audioData Converters Automotive /automotiveDSP Broadband /broadbandInterface Digital Control /digitalcontrolLogic Military /militaryPower Mgmt Optical Networking /opticalnetworkMicrocontrollers Security /securityTelephony /telephonyVideo & Imaging /videoWireless /wirelessMailing Address:Texas InstrumentsPost Office Box 655303 Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated。
电平转换SN74HCT245N-datasheet
PACKAGING INFORMATIONAddendum-Page 1Addendum-Page 2(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check /productcontent for the latest availability information and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.Addendum-Page 3In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.OTHER QUALIFIED VERSIONS OF SN54HCT245, SN54HCT245-SP, SN74HCT245 :•Catalog: SN74HCT245, SN54HCT245•Military: SN54HCT245•Space: SN54HCT245-SPNOTE: Qualified Version Definitions:•Catalog - TI's standard catalog product•Military - QML certified for Military and Defense Applications•Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based applicationAddendum-Page 4TAPE AND REELINFORMATION*Alldimensions are nominalDevicePackage Type Package Drawing Pins SPQReel Diameter (mm)Reel Width W1(mm)A0(mm)B0(mm)K0(mm)P1(mm)W (mm)Pin1Quadrant SN74HCT245DBR SSOP DB 202000330.016.48.27.5 2.512.016.0Q1SN74HCT245DWR SOIC DW 202000330.024.410.813.3 2.712.024.0Q1SN74HCT245NSR SO NS 202000330.024.48.213.0 2.512.024.0Q1SN74HCT245PWR TSSOP PW 202000330.016.4 6.957.1 1.68.016.0Q1SN74HCT245PWTTSSOPPW20250330.016.46.957.11.68.016.0Q1PACKAGE MATERIALS INFORMATION1-Jul-2013Pack Materials-Page 1*All dimensionsare nominal DevicePackage Type Package Drawing Pins SPQ Length (mm)Width (mm)Height (mm)SN74HCT245DBRSSOP DB 202000367.0367.038.0SN74HCT245DWRSOIC DW 202000367.0367.045.0SN74HCT245NSRSO NS 202000367.0367.045.0SN74HCT245PWRTSSOP PW 202000364.0364.027.0SN74HCT245PWT TSSOP PW 20250367.0367.038.0PACKAGE MATERIALS INFORMATION 1-Jul-2013Pack Materials-Page 2IMPORTANT NOTICETexas Instruments Incorporated and its subsidiaries(TI)reserve the right to make corrections,enhancements,improvements and other changes to its semiconductor products and services per JESD46,latest issue,and to discontinue any product or service per JESD48,latest issue.Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.All semiconductor products(also referred to herein as“components”)are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.TI warrants performance of its components to the specifications applicable at the time of sale,in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty.Except where mandated by applicable law,testing of all parameters of each component is not necessarily performed.TI assumes no liability for applications assistance or the design of Buyers’products.Buyers are responsible for their products and applications using TI components.To minimize the risks associated with Buyers’products and applications,Buyers should provide adequate design and operating safeguards.TI does not warrant or represent that any license,either express or implied,is granted under any patent right,copyright,mask work right,or other intellectual property right relating to any combination,machine,or process in which TI components or services are rmation published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement e of such information may require a license from a third party under the patents or other intellectual property of the third party,or a license from TI under the patents or other intellectual property of TI.Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties,conditions,limitations,and notices.TI is not responsible or liable for such altered rmation of third parties may be subject to additional restrictions.Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.Buyer acknowledges and agrees that it is solely responsible for compliance with all legal,regulatory and safety-related requirements concerning its products,and any use of TI components in its applications,notwithstanding any applications-related information or support that may be provided by TI.Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures,monitor failures and their consequences,lessen the likelihood of failures that might cause harm and take appropriate remedial actions.Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.In some cases,TI components may be promoted specifically to facilitate safety-related applications.With such components,TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements.Nonetheless,such components are subject to these terms.No TI components are authorized for use in FDA Class III(or similar life-critical medical equipment)unless authorized officers of the parties have executed a special agreement specifically governing such use.Only those TI components which TI has specifically designated as military grade or“enhanced plastic”are designed and intended for use in military/aerospace applications or environments.Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk,and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use.TI has specifically designated certain components as meeting ISO/TS16949requirements,mainly for automotive use.In any case of use of non-designated products,TI will not be responsible for any failure to meet ISO/TS16949.Products ApplicationsAudio /audio Automotive and Transportation /automotiveAmplifiers Communications and Telecom /communicationsData Converters Computers and Peripherals /computersDLP®Products Consumer Electronics /consumer-appsDSP Energy and Lighting /energyClocks and Timers /clocks Industrial /industrialInterface Medical /medicalLogic Security /securityPower Mgmt Space,Avionics and Defense /space-avionics-defense Microcontrollers Video and Imaging /videoRFID OMAP Applications Processors /omap TI E2E Community Wireless Connectivity /wirelessconnectivityMailing Address:Texas Instruments,Post Office Box655303,Dallas,Texas75265Copyright©2013,Texas Instruments Incorporated。
74HC244DTR2G资料
74HC244Octal 3−State Noninverting Buffer/Line Driver/Line ReceiverHigh −Performance Silicon −Gate CMOSThe 74HC244 is identical in pinout to the LS244. The device inputs are compatible with standard CMOS outputs; with pullup resistors,they are compatible with LSTTL outputs.This octal noninverting buffer/line driver/line receiver is designed to be used with 3−state memory address drivers, clock drivers, and other bus −oriented systems. The device has noninverting outputs and two active −low output enables.The HC244 is similar in function to the HC240A.Features•Output Drive Capability: 15 LSTTL Loads•Outputs Directly Interface to CMOS, NMOS, and TTL •Operating V oltage Range: 2.0 to 6.0 V •Low Input Current: 1.0 m A•High Noise Immunity Characteristic of CMOS Devices•In Compliance with the Requirements Defined by JEDEC Standard No. 7A•ESD Performance: HBM > 2000 V; Machine Model > 200 V•Chip Complexity: 136 FETs or 34 Equivalent Gates •This is a Pb −Free Device120MARKING DIAGRAMHC 244ALYW GGTSSOP −20DT SUFFIX CASE 948ESee detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.ORDERING INFORMATIONHC244= Specific Device Code A = Assembly Location L = Wafer Lot Y = YearW = Work WeekG = Pb −Free Package(Note: Microdot may be in either location)LOGIC DIAGRAMDATAINPUTSA1A2A3A4B1B2B3B4YB4YB3YB2YB1YA4YA3YA2YA1NONINVERTINGOUTPUTSCC FUNCTION TABLEInputs OutputsEnable A,Enable B A, B YA, YBL L LL H HH X ZZ = high impedancePIN ASSIGNMENTA3A2YB4A1ENABLE AGNDYB1A4YB2YB3YA2B4YA1ENABLE BV CCB1YA4B2YA3B3ORDERING INFORMATIONDevice Package Shipping†74HC244DTR2G TSSOP−20*2500 Tape & Reel†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.*This package is inherently Pb−Free.MAXIMUM RATINGSSymbol Parameter Value UnitV CC DC Supply Voltage (Referenced to GND)– 0.5 to + 7.0VV in DC Input Voltage (Referenced to GND)– 0.5 to V CC + 0.5VV out DC Output Voltage (Referenced to GND)– 0.5 to V CC + 0.5VI in DC Input Current, per Pin±20mAI out DC Output Current, per Pin±35mAI CC DC Supply Current, V CC and GND Pins±75mAP D Power Dissipation in Still Air,TSSOP Package†450mWT stg Storage Temperature– 65 to + 150_CT L Lead Temperature, 1 mm from Case for 10 Seconds(TSSOP Package)260_CStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stressratings only. Functional operation above the Recommended Operating Conditions is not implied.Extended exposure to stresses above the Recommended Operating Conditions may affect devicereliability.†Derating—TSSOP Package: − 6.1 mW/_C from 65_ to 125_CFor high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).This device contains protectioncircuitry to guard against damagedue to high static voltages or electricfields. However, precautions mustbe taken to avoid applications of anyvoltage higher than maximum ratedvoltages to this high−impedance cir-cuit. For proper operation, V in andV out should be constrained to therange GND v (V in or V out) v V CC.Unused inputs must always betied to an appropriate logic voltagelevel (e.g., either GND or V CC).Unused outputs must be left open.RECOMMENDED OPERATING CONDITIONSSymbol Parameter Min Max Unit V CC DC Supply Voltage (Referenced to GND) 2.0 6.0V V in, V out DC Input Voltage, Output Voltage (Referenced to GND)0V CC V T A Operating Temperature, All Package Types– 55+ 125_Ct r, t f Input Rise and Fall Time V CC = 2.0 V (Figure 1)V CC = 4.5 VV CC = 6.0 V 01000500400nsDC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)Guaranteed LimitSymbol Parameter Test Conditions V CC(V)– 55 to25_C v85_C v 125_C UnitV IH Minimum High−Level Input Voltage V out = V CC – 0.1 V|I out| v 20 m A 2.03.04.56.01.52.13.154.21.52.13.154.21.52.13.154.2VV IL Maximum Low−Level Input Voltage V out = 0.1 V|I out| v 20 m A 2.03.04.56.00.50.91.351.80.50.91.351.80.50.91.351.8VV OH Minimum High−Level Output Voltage V in = V IH|I out| v 20 m A2.04.56.01.94.45.91.94.45.91.94.45.9VV in = V IH|I out| v 2.4 mA|I out| v 6.0 mA|I out| v 7.8 mA3.04.56.02.483.985.482.343.845.342.23.75.2V OL Maximum Low−Level Output Voltage V in = V IL|I out| v 20 m A2.04.56.00.10.10.10.10.10.10.10.10.1VV in = V IL|I out| v 2.4 mA|I out| v 6.0 mA|I out| v 7.8 mA3.04.56.00.260.260.260.330.330.330.40.40.4I in Maximum Input Leakage Current V in = V CC or GND 6.0±0.1±1.0±1.0m AI OZ Maximum Three−State LeakageCurrent Output in High−Impedance StateV in = V IL or V IHV out = V CC or GND6.0±0.5±5.0±10m AI CC Maximum Quiescent SupplyCurrent (per Package)V in = V CC or GNDI out = 0 m A6.0 4.04040m ANOTE:Information on typical parametric values and high frequency or heavy load considerations can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6 ns)Symbol Parameter V CC(V)Guaranteed LimitUnit – 55 to25_C v85_C v125_Ct PLH, t PHL Maximum Propagation Delay, A to YA or B to YB(Figures 1 and 3)2.03.04.56.096501815115602320135702723nst PLZ, t PHZ Maximum Propagation Delay, Output Enable to YA or YB(Figures 2 and 4)2.03.04.56.0110602219140702824165803328nst PZL, t PZH Maximum Propagation Delay, Output Enable to YA or YB(Figures 2 and 4)2.03.04.56.0110602219140702824165803328nst TLH, t THL Maximum Output Transition Time, Any Output(Figures 1 and 3)2.03.04.56.0602312107527151390321815nsC in Maximum Input Capacitance−101010pFC out Maximum Three−State Output Capacitance(Output in High−Impedance State)−151515pFNOTE:For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).C PD Power Dissipation Capacitance (Per Buffer)*Typical @ 25°C, V CC = 5.0 VpF34*Used to determine the no−load dynamic power consumption: P D = C PD V CC2f + I CC V CC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).SWITCHING WAVEFORMSFigure 1. Figure 2. V CCGND HIGH IMPEDANCE V OLV OH HIGH IMPEDANCETEST CIRCUITS*Includes all probe and jig capacitance C L *Figure 3. Test Circuit *Includes all probe and jig capacitanceFigure 4. Test CircuitCONNECT TO V CC WHEN TESTING t PLZ AND t PZL .CONNECT TO GND WHEN TESTING t PHZ AND t PZH .PIN DESCRIPTIONSINPUTSA1, A2, A3, A4, B1, B2, B3, B4(Pins 2, 4, 6, 8, 11, 13, 15, 17)Data input pins. Data on these pins appear in noninverted form on the corresponding Y outputs, when the outputs are enabled.CONTROLSEnable A, Enable B (Pins 1, 19)Output enables (active −low). When a low level is applied to these pins, the outputs are enabled and the devicesfunction as noninverting buffers. When a high level is applied, the outputs assume the high impedance state.OUTPUTSYA1, YA2, YA3, YA4, YB1, YB2, YB3, YB4(Pins 18, 16, 14, 12, 9, 7, 5, 3)Device outputs. Depending upon the state of the output −enable pins, these outputs are either noninverting outputs or high −impedance outputs.LOGIC DETAILDATA INPUT A OR BENABLE A OR ENABLE BTO THREE OTHER A OR B INVERTERSYA OR YBPACKAGE DIMENSIONSTSSOP −20CASE 948E −02ISSUE CDIM A MIN MAX MIN MAX INCHES 6.600.260MILLIMETERS B 4.30 4.500.1690.177C 1.200.047D 0.050.150.0020.006F 0.500.750.0200.030G 0.65 BSC 0.026 BSC H 0.270.370.0110.015J 0.090.200.0040.008J10.090.160.0040.006K 0.190.300.0070.012K10.190.250.0070.010L 6.40 BSC 0.252 BSCM0 8 0 8 ____NOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION:MILLIMETER.3.DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.4.DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.INTERLEAD FLASH OR PROTRUSIONSHALL NOT EXCEED 0.25 (0.010) PER SIDE.5.DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08(0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.6.TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY .7.DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W −.6.400.252−−−−−−16X0.360.65PITCHSOLDERING FOOTPRINT**For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
74HC245中文资料
54/74245
双向总线发送器/接收器(3S)
ｃ
简要说明: 245 为三态输出的八组总线收发器,其主要电器特性的典型值如下(不同厂家
．
具体值有差别):
ｍ
型号
tPLH
54LS245/74LS245
8ns
tphl 8ns
ｒ PD
275mW
引出端符号: A B /G DIR
输入高电平电ViH
输入低电平电ViL
54 74
输出高电平电流 54
IOH
74
输出低电平电流 54
IOL
74
54LS245/74LS245
ａ 最小 额定 最大
4.5
5
5.5
－ 4.75
5
5.25
2
ａ 0.7
0.8
ｇ -12
-15
12
ｆｐ24
单位 V V V mA mA
动态特性(TA=25℃)
．
参
数
ｗ tPLH输出由低到高传输延迟时间
RL=90 Ω
25
ns
静态特性（TA 为工作环境温度范围）
参数
VIK输入嵌位电压 △VT滞后电压
VOH输出高电平电压
测 试 条 件【1】
Vcc=最小，Iik=-18mA Vcc＝最小
Vcc＝最小，VIL＝最大，VIH=2V, IOH＝－3mA
LS245 最小 最大
-1.5 0.2
单位
V V
2.4
V
三毛电子世界
ｍ -0.2 mA
ｒ -225 mA ａ 20 uA
－-200 uA
ａ 70
- 1、下载文档前请自行甄别文档内容的完整性，平台不提供额外的编辑、内容补充、找答案等附加服务。
- 2、"仅部分预览"的文档,不可在线预览部分如存在完整性等问题,可反馈申请退款(可完整预览的文档不适用该条件!)。
- 3、如文档侵犯您的权益，请联系客服反馈,我们会尽快为您处理(人工客服工作时间：9:00-18:30)。
M54/74HCT245/640/643M54/74HCT245/640/643October 1993HCT640INVERTING,HCT643INVERTING/NON INVERTINGOCTAL BUS TRANSCEIVER (3-STATE):HCT245NON INVERTINGB1R(Plastic Package)ORDER CODES :M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1RF1R(Ceramic Package)M1R(Micro Package)C1R (Chip Carrier)PIN CONNECTION (top view).HIGH SPEEDt PD =10ns (TYP.)at V CC =5V .LOW POWER DISSIPATIONI CC =4µA (MAX.)at T A =25oC.COMPATIBLE WITH TTL OUTPUTS V IH =2V (MIN.)V IL =0.8V (MAX.).OUTPUT DRIVE CAPABILITY 15LSTTL LOADS.SYMMETRICAL OUTPUT IMPEDANCE |I OH |=I OL =6mA (MIN).BALANCED PROPAGATION DELAYS t PLH =t PHL.PIN AND FUNCTION COMPATIBLE WITH 54/74LS245/640/643DESCRIPTIONThe M54/74HCT245,HCT640and HCT643utilise silicon gate C 2MOS technology to achive operating speeds eqivalent to LSTTL devices.Along with the low power dissipation and high noise immunity of standad CMOS integrated circuit,it possesses the capability to drive 15LSTTL loads.These IC’s are intended for two-way asynchronous communication between data buses,and the direction of data trasmission is determined by DIR input.The enable input (G)can be used to disable the device so that the buses are effectively isolated.All input are equipped with protection circuits against static discharge and transient discharge.These integrated circuits have input and output characteristics that are fully compatible with 54/74LSTTL logic families.M54/74HCT devices are designed to directly interface HSC 2MOS systems with TTL and NMOS components.They are also plug in replacements for LSTTL devices giving a reduction of power consumption.IT IS PROHIBITED TO APPLY A SIGNAL TO A BUS TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS THERMINAL IS FLOATING (HIGH IMPEDANCE STATE),IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR.HCT245HCT640HCT6431/11INPUT AND OUTPUT EQUIVALENT CIRCUITPIN DESCRIPTIONPIN No SYMBOL NAME AND FUNCTION 1DIR Directional Control 2,3,4,5,6,7,8,9A1to A8Data Inputs/Outputs 18,17,16,15,14,13,12,11B1to B8Data Inputs/Outputs19G Output Enabel Input (Active LOW)10GND Ground (0V)20V CCPositive Supply VoltageIEC LOGIC SYMBOLSTRUTH TABLEINPUT FUNCTIONOUTPUT G DIR A BUS B BUS HCT245HCT640HCT643L L OUTPUT INPUT A =B A =B A =B L H INPUT OUTPUTB =A B =A B =A HXZZZZZX:”H”or ”L”Z:High impeda nceHCT245HCT640HCT643M54/M74HCT245/640/6432/11M54/M74HCT245/640/643 LOGIC DIAGRAM(HCT640)NOTE:IN CASE OF HCT245OR HCT643,INPUT INVERTERS MARKED*AT A BUS AND B BUS ARE ELIMINATED RESPECTIVELYABSOLUTE MAXIMUM RATINGSSymbol Parameter Value Unit V CC Supply Voltage-0.5to+7V V I DC Input Voltage-0.5to V CC+0.5V V O DC Output Voltage-0.5to V CC+0.5VI IK DC Input Diode Current±20mAI OK DC Output Diode Current±20mAI O DC Output Source Sink Current Per Output Pin±35mAI CC or I GND DC V CC or Ground Current±70mAP D Power Dissipation500(*)mW T stg Storage Temperature-65to+150o C T L Lead Temperature(10sec)300o C Absolute Maximum Ratings are those values beyond whichdamage to the device may occu r.Functiona l ope ration und er these cond ition isnotimplied. (*)500mW:≅65o C derate to300mW by10mW/o C:65o C to85o C3/11RECOMMENDED OPERATING CONDITIONSSymbol Parameter Value Unit V CC Supply Voltage 4.5to5.5V V I Input Voltage0to V CC V V O Output Voltage0to V CC VT op Operating Temperature:M54HC SeriesM74HC Series -55to+125-40to+85o Co Ct r,t f Input Rise and Fall Time(V CC=4.5to5.5V)0to500ns DC SPECIFICATIONSSymbol ParameterTest Conditions ValueUnit V CC(V)T A=25o C54HC and74HC-40to85o C74HC-55to125o C54HCMin.Typ.Max.Min.Max.Min.Max.V IH High Level InputVoltage 4.5to5.52.0 2.0 2.0VV IL Low Level InputVoltage 4.5to5.50.80.80.8VV OH High LevelOutput Voltage4.5V I=V IHorV ILI O=-20µA 4.4 4.5 4.4 4.4VI O=-6.0mA 4.18 4.31 4.13 4.10V OL Low Level OutputVoltage4.5V I=V IHorV ILI O=20µA0.00.10.10.1VI O=6.0mA0.170.260.330.4I I Input LeakageCurrent 5.5V I=V CC or GND±0.1±1±1µAI OZ3State OutputOff State Current5.5V I=V CC or GND±0.5±5.0±10µAI CC Quiescent SupplyCurrent5.5V I=V CC or GND44080µA∆I CC Additional worstcase supplycurrent 5.5Per Input pinV I=0.5V orV I=2.4VOther Inputs atV CC or GNDI O=02.0 2.93.0mAM54/M74HCT245/640/643 4/11AC ELECTRICAL CHARACTERISTICS(C L=50pF,Input t r=t f=6ns)Symbol ParameterTest Conditions ValueUnit V CC(V)C L(pF)T A=25o C54HC and74HC-40to85o C74HC-55to125o C54HCMin.Typ.Max.Min.Max.Min.Max.t TLH t THL Output TransitionTime4.5507121518nst PLH t PHL PropagationDelay Time4.55013222833ns4.515018303845nst PZL t PZH Output EnableTime4.550R L=1KΩ19303845ns4.5150R L=1KΩ24384857nst PLZ t PHZ Output DisableTime4.550R L=1KΩ17303845nsC IN Input Capacitance DIR,G5101010pFC I/OUT OutputCapacitance An,Bn13pFC PD(*)Power DissipationCapacitanceHCT245HCT640/6434139pF(*)C PD is defined as the value of the IC’s internal equivalent capac itanc e which is calculated from the operating current con sump tion without load. (Refer to Test Circuit).Average operting current can be obtained by the following equ ation.I CC(opr)=C PD•V CC•f IN+I CC/8(per circuit) SWITCHING CHARACTERISTICS TEST WAVEFORMM54/M74HCT245/640/6435/11TEST CIRCUIT I CC(Opr.)C PD CALCULATIONC PD is to be calculated with the followingformula by using the measured value of I CC(Opr.)in the test circuit opposite.C PD=I CC(Opr.)f IN x V CCIn determining the value of C PD,a relativelyhigh frequency of1MHz was applied to f IN,inorther to eliminate any error caused by thequiescent supply current.M54/M74HCT245/640/6436/11M54/M74HCT245/640/643 Plastic DIP20(0.25)MECHANICAL DATAmm inchDIM.MIN.TYP.MAX.MIN.TYP.MAX.a10.2540.010B 1.39 1.650.0550.065b0.450.018b10.250.010D25.4 1.000E8.50.335e 2.540.100e322.860.900F7.10.280I 3.930.155L 3.30.130Z 1.340.053P001J7/11M54/M74HCT245/640/643Ceramic DIP20MECHANICAL DATAmm inch DIM.MIN.TYP.MAX.MIN.TYP.MAX.A250.984 B7.80.307D 3.30.130E0.5 1.780.0200.070 e322.860.900F 2.29 2.790.0900.110G0.40.550.0160.022I 1.27 1.520.0500.060L0.220.310.0090.012 M0.51 1.270.0200.050 N14°(min.),15°(max.)P7.98.130.3110.320 Q 5.710.225P057H 8/11M54/M74HCT245/640/643SO20MECHANICAL DATAmm inchDIM.MIN.TYP.MAX.MIN.TYP.MAX.A 2.650.104a10.100.200.0040.007a2 2.450.096b0.350.490.0130.019b10.230.320.0090.012C0.500.020c145°(typ.)D12.6013.000.4960.512E10.0010.650.3930.419e 1.270.050e311.430.450F7.407.600.2910.299L0.50 1.270.190.050M0.750.029S8°(max.)P013L9/11M54/M74HCT245/640/643PLCC20MECHANICAL DATAmm inch DIM.MIN.TYP.MAX.MIN.TYP.MAX.A9.7810.030.3850.395 B8.899.040.3500.356D 4.2 4.570.1650.180d1 2.540.100d20.560.022E7.378.380.2900.330e 1.270.050e3 5.080.200F0.380.015G0.1010.004 M 1.270.050M1 1.140.045P027A 10/11元器件交易网M54/M74HCT245/640/643 Information furnished is believed to be accurate and reliable.However,SGS-THOMSON Microelectronics assumes no responsability for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use.Nolicense is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics.Specificationsmentionedin this publication are subject to change without notice.This publication supersedes and replaces all information previously supplied.SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without expresswritten approval of SGS-THOMSON Microelectonics.©1994SGS-THOMSON Microelectronics-All Rights ReservedSGS-THOMSON Microelectronics GROUP OF COMPANIESAustralia-Brazil-France-Germany-Hong Kong-Italy-Japan-Korea-Malaysia-Malta-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A11/11。