MAX13003EEUE-T中文资料

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MAX产品后缀说明

MAX 产品后缀说明MAX 产品后缀说明三位后缀例: MAX1675E U A温度范围封装形式管脚数四位后缀另有一些MAXIM 产品后缀用四位表示,第一位表示产品精度等级;第二位表示温度范围：精度,后三位同三位后缀的IC.第三位表示封装形式;第四位表示产品管脚数。

例如：MAX631ACPA 第一个”A”表示5%的输出温度范围C 0°C - 70°C A -40°C - +125°CI -20°C - +85°C M -55 °C - +125°CE -40°C - +85°C封装形式A SSOP(密脚表面贴装)B CERQUAD(陶瓷方形封装)C TO220,TQFP(薄的四方表贴封装)D 陶瓷SB 封装E QSOP(四方表面贴封装)F 陶瓷Flat 封装H 模块SBGA 5*5TQFP J 陶瓷双列直插K SOT L LCCM MQFP(公制四方扁平封装) N 窄体陶瓷双列直插P 塑封DIP(双列直插) Q PLCCR 窄体陶瓷DIP S SO 表面贴封装T TO5,TO99,TO100 U TSSOP,uMAX,SOTV TO39 W 宽体SOX SC70 Y 窄SBZ TO92,MQUAD /D DICE(裸片)/PR 硬塑料/W 晶原管脚数A 8 N 18B 10,64 O 42C 12,192 P 20D 14 Q 2,100E 16 R 3,84F 22,256 S 4,80G 24 T 6,160H 44 U 38,60I 28 V 8(圆脚,隔离型)J 32 W 10(圆脚,隔离型)K 5,68 X 8L 40 Y 8(圆脚,隔离型)M 7,48 Z 10(圆脚,隔离型)。

MAX4211EEUE+T中文资料

High-Side Power and Current Monitors MAX4210/MAX4211
ABSOLUTE MAXIMUM RATINGS
VCC, IN, CIN1, CIN2 to GND ....................................-0.3V to +6V RS+, RS-, INHIBIT, LE, COUT1, COUT2 to GND ...-0.3V to +30V IOUT, POUT, REF to GND ..........................-0.3V to (VCC + 0.3V) Differential Input Voltage (VRS+ - VRS-) .................................±5V Maximum Current into Any Pin..........................................±10mA Output Short-Circuit Duration to VCC or GND ........................10s Continuous Power Dissipation (TA = +70°C) 6-Pin TDFN (derate 24.4mW/°C above +70°C) ..........1951mW 8-Pin µMAX (derate 4.5mW/°C above +70°C) .............362mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C) ..........754mW 16-Pin Thin QFN (derate 25mW/°C above +70°C) .....2000mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C

MAX202EEWE+T中文资料

________________________________________________________________Maxim Integrated Products 1General DescriptionThe MAX202E–MAX213E, MAX232E/MAX241E line drivers/receivers are designed for RS-232 and V.28communications in harsh environments. Each transmitter output and receiver input is protected against ±15kV electrostatic discharge (ESD) shocks, without latchup.The various combinations of features are outlined in the Selector Guide.The drivers and receivers for all ten devices meet all EIA/TIA-232E and CCITT V.28specifications at data rates up to 120kbps, when loaded in accordance with the EIA/TIA-232E specification.The MAX211E/MAX213E/MAX241E are available in 28-pin SO packages, as well as a 28-pin SSOP that uses 60% less board space. The MAX202E/MAX232E come in 16-pin TSSOP, narrow SO, wide SO, and DIP packages. The MAX203E comes in a 20-pin DIP/SO package, and needs no external charge-pump capacitors. The MAX205E comes in a 24-pin wide DIP package, and also eliminates external charge-pump capacitors. The MAX206E/MAX207E/MAX208E come in 24-pin SO, SSOP, and narrow DIP packages. The MAX232E/MAX241E operate with four 1µF capacitors,while the MAX202E/MAX206E/MAX207E/MAX208E/MAX211E/MAX213E operate with four 0.1µF capacitors,further reducing cost and board space.________________________ApplicationsNotebook, Subnotebook, and Palmtop Computers Battery-Powered Equipment Hand-Held EquipmentNext-Generation Device Featureso For Low-Voltage ApplicationsMAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E: ±15kV ESD-Protected Down to10nA, +3.0V to +5.5V, Up to 1Mbps, True RS-232Transceivers (MAX3246E Available in a UCSP™Package)o For Low-Power ApplicationsMAX3221/MAX3223/MAX3243: 1µA SupplyCurrent, True +3V to +5.5V RS-232 Transceivers with Auto-Shutdown™o For Space-Constrained ApplicationsMAX3233E/MAX3235E: ±15kV ESD-Protected,1µA, 250kbps, +3.0V/+5.5V, Dual RS-232Transceivers with Internal Capacitorso For Low-Voltage or Data Cable ApplicationsMAX3380E/MAX3381E: +2.35V to +5.5V, 1µA,2Tx/2Rx RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsMAX202E–MAX213E, MAX232E/MAX241E±15kV ESD-Protected, +5V RS-232 TransceiversSelector Guide19-0175; Rev 6; 3/05Pin Configurations and Typical Operating Circuits appear at end of data sheet.YesPARTNO. OF RS-232DRIVERSNO. OF RS-232RECEIVERSRECEIVERS ACTIVE IN SHUTDOWNNO. OF EXTERNAL CAPACITORS(µF)LOW-POWER SHUTDOWNTTL TRI-STATE MAX202E 220 4 (0.1)No No MAX203E 220None No No MAX205E 550None Yes Yes MAX206E 430 4 (0.1)Yes Yes MAX207E 530 4 (0.1)No No MAX208E 440 4 (0.1)No No MAX211E 450 4 (0.1)Yes Yes MAX213E 452 4 (0.1)Yes Yes MAX232E 220 4 (1)No No MAX241E454 (1)YesFor pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .AutoShutdown and UCSP are trademarks of Maxim Integrated Products, Inc.Ordering InformationOrdering Information continued at end of data sheet.2_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EABSOLUTE MAXIMUM RATINGSV CC ..........................................................................-0.3V to +6V V+................................................................(V CC - 0.3V) to +14V V-............................................................................-14V to +0.3V Input VoltagesT_IN............................................................-0.3V to (V+ + 0.3V)R_IN...................................................................................±30V Output VoltagesT_OUT.................................................(V- - 0.3V) to (V+ + 0.3V)R_OUT......................................................-0.3V to (V CC + 0.3V)Short-Circuit Duration, T_OUT....................................Continuous Continuous Power Dissipation (T A = +70°C)16-Pin Plastic DIP (derate 10.53mW/°C above +70°C)....842mW 16-Pin Narrow SO (derate 8.70mW/°C above +70°C).....696mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C)......762mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C)...........755mW20-Pin Plastic DIP (derate 11.11mW/°C above +70°C)...889mW 20-Pin SO (derate 10.00mW/°C above +70°C).............800mW 24-Pin Narrow Plastic DIP(derate 13.33mW/°C above +70°C) ...............................1.07W 24-Pin Wide Plastic DIP(derate 14.29mW/°C above +70°C)................................1.14W 24-Pin SO (derate 11.76mW/°C above +70°C).............941mW 24-Pin SSOP (derate 8.00mW/°C above +70°C)..........640mW 28-Pin SO (derate 12.50mW/°C above +70°C)....................1W 28-Pin SSOP (derate 9.52mW/°C above +70°C)..........762mW Operating Temperature RangesMAX2_ _EC_ _.....................................................0°C to +70°C MAX2_ _EE_ _...................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +165°C Lead Temperature (soldering, 10s).................................+300°CELECTRICAL CHARACTERISTICS(V CC = +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; V CC = +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF for MAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; T A = T MIN to T MAX ; unless otherwise noted. Typical values are at T A = +25°C.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.ELECTRICAL CHARACTERISTICS (continued)MAX202E–MAX213E, MAX232E/MAX241E (V CC= +5V ±10% for MAX202E/206E/208E/211E/213E/232E/241E; V CC= +5V ±5% for MAX203E/205E/207E; C1–C4 = 0.1µF forMAX202E/206E/207E/208E/211E/213E; C1–C4 = 1µF for MAX232E/241E; T A= T MIN to T MAX; unless otherwise noted. Typical valuesare at T A= +25°C.)Note 1:MAX211EE_ _ tested with V CC= +5V ±5%._______________________________________________________________________________________34______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241E__________________________________________Typical Operating Characteristics(Typical Operating Circuits, V CC = +5V, T A = +25°C, unless otherwise noted.)5.00MAX211E/MAX213ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)V O H , -V O L (V )5.56.06.57.07.58.0100020003000400050000MAX211E/MAX213E/MAX241E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E ( V /µs )5101520253010002000300040005000_______________________________________________________________________________________5MAX202E–MAX213E, MAX232E/MAX241E____________________________Typical Operating Characteristics (continued)(Typical Operating Circuits, V CC = +5V, T A = +25°C, unless otherwise noted.)2MAX202E/MAX203E/MAX232E TRANSMITTER SLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E ( V /µs )468101214100020003000400050005.07.5-7.53000MAX205E–MAX208ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCE-5.02.5LOAD CAPACITANCE (pF)O U T P U T V O L T A G E (V )10002000400050000-2.54550203000MAX205E–MAX208E SUPPLY CURRENT vs. LOAD CAPACITANCE2540LOAD CAPACITANCE (pF)S U P P L Y C U R R E N T (m A )100020004000500035302.55.0-10.0180MAX205E –MAX208EOUTPUT VOLTAGE vs. DATA RATE-7.50DATA RATE (kbps)O U T P U T V O L T A G E (V )601202401503090210-2.5-5.010.07.56_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EMAX203EMAX205E_____________________________________________________________Pin DescriptionsMAX202E/MAX232E_______________________________________________________________________________________7MAX202E–MAX213E, MAX232E/MAX241EMAX208E________________________________________________Pin Descriptions (continued)MAX206EMAX207E8_______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241EMAX211E/MAX213E/MAX241E)(MAX205E/MAX206E/MAX211E/MAX213E/MAX241E)________________________________________________Pin Descriptions (continued)MAX211E/MAX213E/MAX241EFigure 3. Transition Slew-Rate Circuit_______________Detailed Description The MAX202E–MAX213E, MAX232E/MAX241E consist of three sections: charge-pump voltage converters, drivers (transmitters), and receivers. These E versions provide extra protection against ESD. They survive ±15kV discharges to the RS-232 inputs and outputs, tested using the Human Body Model. When tested according to IEC1000-4-2, they survive ±8kV contact-discharges and ±15kV air-gap discharges. The rugged E versions are intended for use in harsh environments or applications where the RS-232 connection is frequently changed (such as notebook computers). The standard (non-“E”) MAX202, MAX203, MAX205–MAX208, MAX211, MAX213, MAX232, and MAX241 are recommended for applications where cost is critical.+5V to ±10V Dual Charge-PumpVoltage Converter The +5V to ±10V conversion is performed by dual charge-pump voltage converters (Figure 4). The first charge-pump converter uses capacitor C1 to double the +5V into +10V, storing the +10V on the output filter capacitor, C3. The second uses C2 to invert the +10V into -10V, storing the -10V on the V- output filter capacitor, C4.In shutdown mode, V+ is internally connected to V CC by a 1kΩpull-down resistor, and V- is internally connected to ground by a 1kΩpull up resistor.RS-232 Drivers With V CC= 5V, the typical driver output voltage swing is ±8V when loaded with a nominal 5kΩRS-232 receiver. The output swing is guaranteed to meet EIA/TIA-232E and V.28 specifications that call for ±5V minimum output levels under worst-case conditions. These include a 3kΩload, minimum V CC, and maximum operating temperature. The open-circuit output voltage swings from (V+ - 0.6V) to V-.Input thresholds are CMOS/TTL compatible. The unused drivers’ inputs on the MAX205E–MAX208E, MAX211E, MAX213E, and MAX241E can be left unconnected because 400kΩpull up resistors to V CC are included on-chip. Since all drivers invert, the pull up resistors force the unused drivers’ outputs low. The MAX202E, MAX203E, and MAX232E do not have pull up resistors on the transmitter inputs._______________________________________________________________________________________9MAX202E–MAX213E, MAX232E/MAX241E10______________________________________________________________________________________M A X 202E –M A X 213E , M A X 232E /M A X 241E±15kV ESD-Protected, +5V RS-232 Transceivers When in low-power shutdown mode, the MAX205E/MAX206E/MAX211E/MAX213E/MAX241E driver outputs are turned off and draw only leakage currents—even if they are back-driven with voltages between 0V and 12V. Below -0.5V in shutdown, the transmitter output is diode-clamped to ground with a 1k Ωseries impedance.RS-232 ReceiversThe receivers convert the RS-232 signals to CMOS-logic output levels. The guaranteed 0.8V and 2.4V receiver input thresholds are significantly tighter than the ±3V thresholds required by the EIA/TIA-232E specification.This allows the receiver inputs to respond to TTL/CMOS-logic levels, as well as RS-232 levels.The guaranteed 0.8V input low threshold ensures that receivers shorted to ground have a logic 1 output. The 5k Ωinput resistance to ground ensures that a receiver with its input left open will also have a logic 1 output. Receiver inputs have approximately 0.5V hysteresis.This provides clean output transitions, even with slow rise/fall-time signals with moderate amounts of noise and ringing.In shutdown, the MAX213E’s R4 and R5 receivers have no hysteresis.Shutdown and Enable Control (MAX205E/MAX206E/MAX211E/MAX213E/MAX241E)In shutdown mode, the charge pumps are turned off,V+ is pulled down to V CC , V- is pulled to ground, and the transmitter outputs are disabled. This reduces supply current typically to 1µA (15µA for the MAX213E).The time required to exit shutdown is under 1ms, as shown in Figure 5.ReceiversAll MAX213E receivers, except R4 and R5, are put into a high-impedance state in shutdown mode (see Tables 1a and 1b). The MAX213E’s R4 and R5 receivers still function in shutdown mode. These two awake-in-shutdown receivers can monitor external activity while maintaining minimal power consumption.The enable control is used to put the receiver outputs into a high-impedance state, to allow wire-OR connection of two EIA/TIA-232E ports (or ports of different types) at the UART. It has no effect on the RS-232 drivers or the charge pumps.N ote: The enabl e control pin is active l ow for the MAX211E/MAX241E (EN ), but is active high for the MAX213E (EN). The shutdown control pin is active high for the MAX205E/MAX206E/MAX211E/MAX241E (SHDN), but is active low for the MAX213E (SHDN ).Figure 4. Charge-Pump DiagramMAX202E–MAX213E, MAX232E/MAX241EV+V-200µs/div3V 0V 10V 5V 0V -5V -10VSHDNMAX211EFigure 5. MAX211E V+ and V- when Exiting Shutdown (0.1µF capacitors)X = Don't care.*Active = active with reduced performanceSHDN E N OPERATION STATUS Tx Rx 00Normal Operation All Active All Active 01Normal Operation All Active All High-Z 1XShutdownAll High-ZAll High-ZTable 1a. MAX205E/MAX206E/MAX211E/MAX241E Control Pin ConfigurationsTable 1b. MAX213E Control Pin ConfigurationsThe MAX213E’s receiver propagation delay is typically 0.5µs in normal operation. In shutdown mode,propagation delay increases to 4µs for both rising and falling transitions. The MAX213E’s receiver inputs have approximately 0.5V hysteresis, except in shutdown,when receivers R4 and R5 have no hysteresis.When entering shutdown with receivers active, R4 and R5 are not valid until 80µs after SHDN is driven low.When coming out of shutdown, all receiver outputs are invalid until the charge pumps reach nominal voltage levels (less than 2ms when using 0.1µF capacitors).±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs have extra protection against static electricity. Maxim’s engineers developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing RS-232products can latch and must be powered down to remove latchup.ESD protection can be tested in various ways; the transmitter outputs and receiver inputs of this product family are characterized for protection to the following limits:1)±15kV using the Human Body Model2)±8kV using the contact-discharge method specifiedin IEC1000-4-23)±15kV using IEC1000-4-2’s air-gap method.ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test set-up, test methodology, and test results.Human Body ModelFigure 6a shows the Human Body Model, and Figure 6b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5k Ωresistor.S H D N ENOPERATION STATUS Tx 1–400Shutdown All High-Z 01Shutdown All High-Z 10Normal Operation 11Normal OperationAll ActiveAll Active Active1–34, 5High-Z ActiveHigh-Z High-Z High-Z Active*High-Z RxM A X 202E –M A X 213E , M A X 232E /M A X 241EIEC1000-4-2The IEC1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The MAX202E/MAX203E–MAX213E, MAX232E/MAX241E help you design equipment that meets level 4 (the highest level) of IEC1000-4-2, without the need for additional ESD-protection components.The major difference between tests done using the Human Body Model and IEC1000-4-2 is higher peak current in IEC1000-4-2, because series resistance is lower in the IEC1000-4-2 model. Hence, the ESD withstand voltage measured to IEC1000-4-2 is generally lower than that measured using the Human Body Model. Figure 7b shows the current waveform for the 8kV IEC1000-4-2 level-four ESD contact-discharge test.The air-gap test involves approaching the device with a charged probe. The contact-discharge method connects the probe to the device before the probe is energized.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resistance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protection during manufacturing, not just RS-232 inputs and outputs. Therefore,after PC board assembly,theMachine Model is less relevant to I/O ports.Figure 7a. IEC1000-4-2 ESD Test ModelFigure 7b. IEC1000-4-2 ESD Generator Current WaveformFigure 6a. Human Body ESD Test ModelFigure 6b. Human Body Model Current Waveform__________Applications InformationCapacitor Selection The capacitor type used for C1–C4 is not critical for proper operation. The MAX202E, MAX206–MAX208E, MAX211E, and MAX213E require 0.1µF capacitors, and the MAX232E and MAX241E require 1µF capacitors, although in all cases capacitors up to 10µF can be used without harm. Ceramic, aluminum-electrolytic, or tantalum capacitors are suggested for the 1µF capacitors, and ceramic dielectrics are suggested for the 0.1µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (e.g., 2x) nominal value. The capacitors’ effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V-.Use larger capacitors (up to 10µF) to reduce the output impedance at V+ and V-. This can be useful when “stealing” power from V+ or from V-. The MAX203E and MAX205E have internal charge-pump capacitors. Bypass V CC to ground with at least 0.1µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple V CC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1–C4).V+ and V- as Power Supplies A small amount of power can be drawn from V+ and V-, although this will reduce both driver output swing and noise margins. Increasing the value of the charge-pump capacitors (up to 10µF) helps maintain performance when power is drawn from V+ or V-.Driving Multiple Receivers Each transmitter is designed to drive a single receiver. Transmitters can be paralleled to drive multiple receivers.Driver Outputs when Exiting Shutdown The driver outputs display no ringing or undesirable transients as they come out of shutdown.High Data Rates These transceivers maintain the RS-232 ±5.0V minimum driver output voltages at data rates of over 120kbps. For data rates above 120kbps, refer to the Transmitter Output Voltage vs. Load Capacitance graphs in the Typical Operating Characteristics. Communication at these high rates is easier if the capacitive loads on the transmitters are small; i.e., short cables are best.Table 2. Summary of EIA/TIA-232E, V.28 SpecificationsMAX202E–MAX213E, MAX232E/MAX241EM A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)Table 3. DB9 Cable ConnectionsCommonly Used for EIA/TIAE-232E and V.24 Asynchronous Interfaces____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241EM A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241E____________Pin Configurations and Typical Operating Circuits (continued)M A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)MAX202E–MAX213E, MAX232E/MAX241E____________Pin Configurations and Typical Operating Circuits (continued)M A X 202E –M A X 213E , M A X 232E /M A X 241E____________Pin Configurations and Typical Operating Circuits (continued)______________________________________________________________________________________21MAX202E–MAX213E, MAX232E/MAX241E Ordering Information (continued)*Dice are specified at T A= +25°C.M A X 202E –M A X 213E , M A X 232E /M A X 241E22________________________________________________________________________________________________________________________________________________Chip Topographies___________________Chip InformationC1-V+C1+V CC R2INT2OUT R2OUT0.117"(2.972mm)0.080"(2.032mm)V-C2+ C2-T2IN T1OUT R1INR1OUT T1INGNDR5INV-C2-C2+C1-V+C1+V CC T4OUTR3IN T3OUTT1OUT 0.174"(4.420mm)0.188"(4.775mm)T4IN R5OUT R4OUT T3IN R4IN EN (EN) SHDN (SHDN)R3OUT T2OUT GNDR1IN R1OUT T2IN R2OUTR2IN T1IN ( ) ARE FOR MAX213E ONLYTRANSISTOR COUNT: 123SUBSTRATE CONNECTED TO GNDTRANSISTOR COUNT: 542SUBSTRATE CONNECTED TO GNDMAX202E/MAX232EMAX211E/MAX213E/MAX241EMAX205E/MAX206E/MAX207E/MAX208E TRANSISTOR COUNT: 328SUBSTRATE CONNECTED TO GNDMAX202E–MAX213E, MAX232E/MAX241E Package InformationM A X 202E –M A X 213E , M A X 232E /M A X 241EPackage Information (continued)MAX202E–MAX213E, MAX232E/MAX241E±15kV ESD-Protected, +5V RS-232 TransceiversMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________25©2005 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products, Inc.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to /packages .)。

13003 MJE13003D 载带卷盘 - MOS-场效应管、晶体管

额定值 VALUE
850 500 9.0 1.0 2.0 2.0 4.0 1.0 150 -65~+150
单位 UNIT
V
A
W ℃
HAOHAI ELECTRONICS CO., LTD.
第1页共5页致力於中國功率器件優秀供應商
kkg@ 13003H: TO-251_TO-252
第2页共5页致力於中國功率器件優秀供應商
kkg@ 13003H: TO-251_TO-252
2A, 850V 特制高压开关三极管产品参数规格书
SOA(CD)
H13003H
High Voltage Switching Transister
Ptotoc Tj
hFE - IC
最小值 MIN
最大值 MAX
单位 UNIT
100 μA250来自8505009 V
0.5
1.2
1.0
7
20
35
4
■ 订单信息 ORDERING INFORMATION:
包装方式 PACKING
TO-251 普通袋装 NORMAL PACKING TO-251 条管装 NORMAL PACKING TO-252 条管装 NORMAL PACKING
IC=10mA, IE=0
VEBO
发射极-基极电压 Emitter- Base Voltage
IE=1mA, IC=0
Vcesat Vbesat
集电极-发射极饱和电压 Collector-Emitter Saturation Voltage
发射极-基极饱和电压 Base-Emitter Saturation Voltage
E-mail:kkg@

MAX4211EEUE+中文资料

-
25:1
IOUT POUT
1.21V REFERENCE INHIBIT
REF
CIN1+
COUT1 CIN1LE CIN2+ COUT2
µMAX is a registered trademark of Maxim Integrated Products, Inc. Pin Configurations and Selector Guide appear at end of data sheet.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Functional Diagrams
+
VSENSE RSENSE LOAD RS+ VCC 2.7V TO 5.5V RS-
-
Applications
Overpower Circuit Breakers Smart Battery Packs/Chargers Smart Peripheral Control Short-Circuit Protection Power-Supply Displays Measurement Instrumentation Baseband Analog Multipliers VGA Circuits Power-Level Detectors

MAX4211EEUE中文资料

4V TO 28V
+ -
+ -
25:1
IOUT POUT
1.21V REFERENCE INHIBIT
REF
CIN1+
COUT1 CIN1LE CIN2+ COUT2
µMAX is a registered trademark of Maxim Integrated Products, Inc. Pin Configurations and Selector Guide appear at end of data sheet.
MAX4211A MAX4211B MAX4211C GND
CIN2-
Functional Diagrams continued at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at .
元器件交易网
MAX4210/MAX4211
The MAX4210/MAX4211 low-cost, low-power, high-side power/current monitors provide an analog output voltage proportional to the power consumed by a load by multiplying load current and source voltage. The MAX4210/MAX4211 measure load current by using a high-side current-sense amplifier, making them especially useful in battery-powered systems by not interfering with the ground path of the load. The MAX4210 is a small, simple 6-pin power monitor intended for limited board space applications. The MAX4210A/B/C integrate an internal 25:1 resistor-divider network to reduce component count. The MAX4210D/E/F use an external resistor-divider network for greater design flexibility. The MAX4211 is a full-featured current and power monitor. The device combines a high-side current-sense amplifier, 1.21V bandgap reference, and two comparators with open-drain outputs to make detector circuits for overpower, overcurrent, and/or overvoltage conditions. The open-drain outputs can be connected to potentials as high as 28V, suitable for driving high-side switches for circuit-breaker applications. Both the MAX4210/MAX4211 feature three different current-sense amplifier gain options: 16.67V/V, 25.00V/V, and 40.96V/V. The MAX4210 is available in 3mm x 3mm, 6-pin TDFN and 8-pin µMAX® packages and the MAX4211 is available in 4mm x 4mm, 16-pin thin QFN and 16-pin TSSOP packages. Both parts are specified for the -40°C to +85°C extended operating temperature range.

MAX4130EUK+T,MAX4130EUK+T,MAX4132ESA+,MAX4132EUA+,MAX4131ESA,MAX4131EBT+T, 规格书,Datasheet 资料

MAX4130–MAX4134________________________________________________________________Maxim Integrated Products1For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .General DescriptionThe MAX4130–MAX4134 family of operational amplifiers combines 10MHz gain-bandwidth product and excellent DC accuracy with Rail-to-Rail ®operation at the inputs and outputs. These devices require only 900µA per amplifier, and operate from either a single supply (+2.7V to +6.5V) or dual supplies (±1.35V to ±3.25V) with a common-mode voltage range that extends 250mV beyond V EE and V CC . They are capable of driving 250Ωloads and are unity-gain stable. In addition, the MAX4131/ MAX4133 feature a shutdown mode in which the outputs are placed in a high-impedance state and the supply current is reduced to only 25µA per amplifier.With their rail-to-rail input common-mode range and output swing, the MAX4130–MAX4134 are ideal for low-voltage, single-supply operation. Although the minimum operating voltage is specified at 2.7V, the devices typically operate down to 1.8V. In addition, low offset voltage and high speed make them the ideal signal-conditioning stages for precision, low-voltage data-acquisition systems. The MAX4130 is offered in the space-saving 5-pin SOT23 package. The MAX4131 is offered in the ultra-small 6-bump, 1mm x 1.5mm chip-scale package (UCSP™).________________________ApplicationsBattery-Powered Instruments Portable Equipment Data-Acquisition Systems Signal ConditioningLow-Power, Low-Voltage ApplicationsFeatureso 6-Bump UCSP (MAX4131)o +2.7V to +6.5V Single-Supply Operationo Rail-to-Rail Input Common-Mode Voltage Rangeo Rail-to-Rail Output Voltage Swing o 10MHz Gain-Bandwidth Product o 900µA Quiescent Current per Amplifier o 25µA Shutdown Function (MAX4131/MAX4133)o 200µV Offset Voltageo No Phase Reversal for Overdriven Inputs o Drive 250ΩLoadso Stable with 160pF Capacitive Loads o Unity-Gain StableSingle/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps19-1089; Rev 3; 3/03*Dice are specified at T A = +25°C. DC parameters only.Ordering Information continued at end of data sheet.Pin Configurations appear at end of data sheet.Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.UCSP is a trademark of Maxim Integrated Products, Inc.M A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply Rail-to-Rail I/O Op Amps 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICS(V CC = +2.7V to +6.5V, V EE = 0V, V CM = 0V, V OUT = V CC /2, R L tied to V CC /2, SHDN ≥2V (or open), T A = +25°C , unless otherwise noted.)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Supply Voltage (V CC - V EE )...................................................7.5V IN+, IN-, SHDN Voltage...................(V CC + 0.3V) to (V EE - 0.3V)Output Short-Circuit Duration (Note 1).......................Continuous(short to either supply)Continuous Power Dissipation (T A = +70°C)5-Pin SOT23 (derate 7.1mW/°C above +70°C)............571mW 6-Bump UCSP (derate 2.9mW/°C above +70°C).........308mW 8-Pin SO (derate 5.88mW/°C above +70°C)................471mW8-Pin µMAX (derate 4.10mW/°C above +70°C)...........330mW 14-Pin SO (derate 8.00mW/°C above +70°C)..............640mW Operating Temperature RangeMAX413_E__...................................................-40°C to +85°C Maximum Junction Temperature.....................................+150°C Storage Temperature Range.............................-65°C to +160°C Lead Temperature (soldering, 10s).................................+300°C Bump Reflow Temperature .........................................+235°CNote 1:Provided that the maximum package power-dissipation rating is not exceeded.MAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply Rail-to-Rail I/O Op AmpsDC ELECTRICAL CHARACTERISTICS (continued)(V CC = +2.7V to +6.5V, V EE = 0V, V CM = 0V, V OUT = V CC /2, R L tied to V CC /2, SHDN ≥2V (or open), T A = +25°C , unless otherwise noted.)DC ELECTRICAL CHARACTERISTICS(V CC = +2.7V to +6.5V, V EE = 0V, V CM = 0V, V OUT = V CC /2, R L tied to V CC /2, SHDN ≥2V (or open), T A = -40°C to +85°C , unlessM A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply Rail-to-Rail I/O Op Amps 4_______________________________________________________________________________________DC ELECTRICAL CHARACTERISTICS(V CC = +2.7V to +6.5V, V EE = 0V, V CM = 0V, V OUT = V CC /2, R L tied to V CC /2, SHDN ≥2V (or open), T A = -40°C to +85°C , unlessMAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply Rail-to-Rail I/O Op Amps_______________________________________________________________________________________5DC ELECTRICAL CHARACTERISTICS (continued)(V CC = +2.7V to +6.5V, V EE = 0V, V CM = 0V, V OUT = V CC /2, R L tied to V CC /2, SHDN ≥2V (or open), T A = -40°C to +85°C , unless otherwise noted.) (Note 2)AC ELECTRICAL CHARACTERISTICSM A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 6_______________________________________________________________________________________60-401001k 10k 1M 10M100k 100M GAIN AND PHASE vs. FREQUENCY-20FREQUENCY (Hz)G A I N (d B )02040P H A S E (D E G R E E S )180144720-72-144-180-108-363610860-401001k 10k 1M 10M100k 100MGAIN AND PHASEvs. FREQUENCY (WITH C)-20FREQUENCY (Hz)G A I N (d B )2040P H A S E (D E G R E E S )180144720-72-144-180-108-36361080-100101001k100k1M10M10k 100MPOWER-SUPPLY REJECTIONvs. FREQUENCY-80FREQUENCY (Hz)P S R (d B )-60-40-2001051520253530454050-40-25-105203550658095SHUTDOWN SUPPLY CURRENTvs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )1000.100.011001k100k1M10M10k100MOUTPUT IMPEDANCE vs. FREQUENCYFREQUENCY (Hz)O U T P U T I M P E D A N C E (Ω)1101150800850900950105010001100-40-25-105203550658095SUPPLY CURRENT PER AMPLIFIERvs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (µA )-10-505101520-40-25-105203550658095OUTPUT LEAKAGE CURRENTvs. TEMPERATURETEMPERATURE (°C)L E A K A G E C U R R E N T (µA )Typical Operating Characteristics(V CC = +5V, V EE = 0V, VCM = V CC / 2, T A = +25°C, unless otherwise noted.)-600123456INPUT BIAS CURRENT vs. COMMON-MODE VOLTAGECOMMON-MODE VOLTAGE (V)I N P U T B I A S C U R R E N T (n A )-50-40-30-20-10010203040-60-40-40-25-105203550658095INPUT BIAS CURRENTvs. TEMPERATURETEMPERATURE (°C)I N P U T B I A S C U R R E N T (n A )-200204060MAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps_______________________________________________________________________________________712070750600110115OUTPUT VOLTAGE: EITHER SUPPLY (mV)G A I N (d B )30095859080100200500105100400LARGE-SIGNAL GAIN vs. OUTPUT VOLTAGE130-40-25-105203550658095LARGE-SIGNAL GAIN vs. TEMPERATURE90120TEMPERATURE (°C)G A I N (d B )11010085951251151051.21.31.51.41.61.71.81.9-40-25-105203550658095MINIMUM OPERATING VOLTAGEvs. TEMPERATUREM A X 4130/34-21TEMPERATURE (°C)M I N I M U M O P E R A T I N G V O L T A G E (V )Typical Operating Characteristics (continued)(V CC = +5V, V EE = 0V, V CM = V CC / 2, T A = +25°C, unless otherwise noted.)12080859095100105110115-40-25-105203550658095COMMON-MODE REJECTIONvs. TEMPERATURETEMPERATURE (°C)C O M M O N -M ODE R E J E C T I O N (d B )130700600120OUTPUT VOLTAGE: EITHER SUPPLY (mV)G A I N (dB )3001009080100200500110400LARGE-SIGNAL GAIN vs. OUTPUT VOLTAGE12060600110OUTPUT VOLTAGE: EITHER SUPPLY (mV)G A I N (d B )300908070100200500100400LARGE-SIGNAL GAIN vs. OUTPUT VOLTAGE12080-40-25-105203550658095LARGE-SIGNAL GAIN vs. TEMPERATURE90TEMPERATURE (°C)G A I N (d B )105859511511010012070750600110115OUTPUT VOLTAGE: EITHER SUPPLY (mV)G A I N (d B )30095859080100200500105100400LARGE-SIGNAL GAIN vs. OUTPUT VOLTAGE-3.00-2.25-0.75-1.5001.500.752.253.00-40-25-105203550658095INPUT OFFSET VOLTAGE vs. TEMPERATURETEMPERATURE (°C)V O L T A G E (m V )M A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 8_______________________________________________________________________________________1408010k 1k 100k 10M 1M CHANNEL SEPARATION vs. FREQUENCYFREQUENCY (Hz)C H A N N E L S E P A R A T I O N (d B )1009013011012010100k10kFREQUENCY (Hz)1001k 0.03000.0050.0100.0150.0200.025 TOTAL HARMONIC DISTORTION AND NOISE vs. FREQUENCYT H D A N D N O I S E (%)0.10.0014.04.44.25.04.84.6TOTAL HARMONIC DISTORTION AND NOISE vs. PEAK-TO-PEAK SIGNAL AMPLITUDEPEAK-TO-PEAK SIGNAL AMPLITUDE (V)T H D + N O I S E (%)0.01INTIME (200ns/div)V O L T A G E (50m V /d i v )OUTMAX4131SMALL-SIGNAL TRANSIENT RESPONSE (NONINVERTING)IN TIME (200ns/div)V O L T A G E (50m V /d i v )OUT MAX4131SMALL-SIGNAL TRANSIENT RESPONSE (INVERTING)A V = -1IN TIME (2µs/div)V O L T A G E (2V/d i v )OUT MAX4131LARGE-SIGNAL TRANSIENT RESPONSE (NONINVERTING)A V = +1INTIME (2µs/div)V O L T A G E (2V /d i v )OUTMAX4131LARGE-SIGNAL TRANSIENT RESPONSE (INVERTING)Typical Operating Characteristics (continued)(V CC = +5V, V EE = 0V, V CM = V CC / 2, T A = +25°C, unless otherwise noted.)1600-40-25-105203550658095MINIMUM OUTPUT VOLTAGEvs. TEMPERATURE20140120TEMPERATURE (°C)V O U T - V E E (m V )100806040050100150200250300-40-25-105203550658095MAXIMUM OUTPUT VOLTAGEvs. TEMPERATURETEMPERATURE (°C)V C C - V O U T (m V )MAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps_______________________________________________________________________________________9Figure 1a. Reducing Offset Error Due to Bias Current (Noninverting)Figure 1b. Reducing Offset Error Due to Bias Current (Inverting)M A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 10______________________________________________________________________________________Applications InformationRail-to-Rail Input StageDevices in the MAX4130–MAX4134 family of high-speed amplifiers have rail-to-rail input and output stages designed for low-voltage, single-supply opera-tion. The input stage consists of separate NPN and PNP differential stages that combine to provide an input common-mode range that extends 0.2V beyond the supply rails. The PNP stage is active for input volt-ages close to the negative rail, and the NPN stage is active for input voltages near the positive rail. The input offset voltage is typically below 200µV. The switchover transition region, which occurs near V CC / 2, has been extended to minimize the slight degradation in com-mon-mode rejection ratio caused by the mismatch of the input pairs. Their low offset voltage, high band-width, and rail-to-rail common-mode range make these op amps excellent choices for precision, low-voltage data-acquisition systems.Since the input stage switches between the NPN and PNP pairs, the input bias current changes polarity as the input voltage passes through the transition region.Reduce the offset error caused by input bias currents flowing through external source impedances by match-ing the effective impedance seen by each input (Figures 1a, 1b). High source impedances, together with input capacitance, can create a parasitic pole that produces an underdamped signal response. Reducing the input impedance or placing a small (2pF to 10pF)capacitor across the feedback resistor improves response.The MAX4130–MAX4134s ’ inputs are protected from large differential input voltages by 1k Ωseries resistors and back-to-back triple diodes across the inputs (Figure 2). For differential input voltages less than 1.8V,input resistance is typically 500k Ω. For differential input voltages greater than 1.8V, input resistance is approxi-mately 2k Ω. The input bias current is given by the fol-lowing equation:Figure 2. Input Protection CircuitMAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps______________________________________________________________________________________11Rail-to-Rail Output StageThe minimum output voltage is within millivolts of ground for single-supply operation where the load is referenced to ground (V EE ). Figure 3 shows the input voltage range and output voltage swing of a MAX4131connected as a voltage follower. With a +3V supply and the load tied to ground, the output swings from 0.00V to 2.90V. The maximum output voltage swing depends on the load, but will be within 150mV of a +3V supply, even with the maximum load (500Ωto ground).Driving a capacitive load can cause instability in most high-speed op amps, especially those with low quies-cent current. The MAX4130–MAX4134 have a high tol-erance for capacitive loads. They are stable with capacitive loads up to 160pF. Figure 4 gives the stable operating region for capacitive loads. Figures 5 and 6show the response with capacitive loads and the results of adding an isolation resistor in series with the output (Figure 7). The resistor improves the circuit ’s phase margin by isolating the load capacitor from the op amp ’s output.INTIME (1µs/div)V O L T A G E (1V /d i v )OUTV CC = 3V, R L = 10k Ω to V EEFigure 3. Rail-to-Rail Input/Output Voltage RangeFigure 4. Capacitive-Load StabilityINTIME (200ns/div)V O L T A G E (50m V /d i v )OUTV CC = 5V R L = 10k Ω C L = 130pFFigure 5. MAX4131 Small-Signal Transient Response with Capacitive Load Figure 6. MAX4131 Transient Response to Capacitive Load with Isolation ResistorINTIME (500ns/div)V O L T A G E (50m V /d i v )OUTV CC = 5V C L = 1000pF R S = 39ΩM A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 12______________________________________________________________________________________Power-Up and Shutdown ModeThe MAX4130–MAX4134 amplifiers typically settle with-in 1µs after power-up. Figures 9 and 10 show the out-put voltage and supply current on power-up, using the test circuit of Figure 8.The MAX4131 and MAX4133 have a shutdown option.When the shutdown pin (SHDN ) is pulled low, the sup-ply current drops below 25µA per amplifier and theamplifiers are disabled with the outputs in a high-impedance state. Pulling SHDN high or leaving it float-ing enables the amplifier. In the dual-amplifier MAX4133, the shutdown functions operate indepen-dently. Figures 11 and 12 show the output voltage and supply current responses of the MAX4131 to a shut-down pulse, using the test circuit of Figure 8.Figure 7. Capacitive-Load Driving CircuitFigure 8. Power-Up/Shutdown Test CircuitV CC TIME (5µs/div)V O L T A G E (1V /d i v )OUTFigure 9. Power-Up Output Voltage V CC (1V/div)TIME (5µs/div)I EE(500µA/div)Figure 10. Power-Up Supply CurrentMAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps______________________________________________________________________________________13Power Supplies and LayoutThe MAX4130–MAX4134 operate from a single +2.7V to +6.5V power supply, or from dual supplies of ±1.35V to ±3.25V. For single-supply operation, bypass the power supply with a 0.1µF ceramic capacitor in parallel with at least 1µF. For dual supplies, bypass each sup-ply to ground.Good layout improves performance by decreasing the amount of stray capacitance at the op amp ’s inputs and outputs. Decrease stray capacitance by placing external components close to the op amp ’s pins, mini-mizing trace lengths and resistor leads.UCSP Applications InformationFor the latest application details on UCSP construction,dimensions, tape carrier information, PC board tech-niques, bump-pad layout, and the recommended reflow temperature profile, as well as the latest informa-tion on reliability testing results, go to Maxim ’s website at /ucsp and search for the Application Note: UCSP –A Wafer-Level Chip-Scale Package .TIME (1µs/div)OUTFigure 11. Shutdown Output Voltage TIME (1µs/div)Figure 12. Shutdown Enable/Disable Supply CurrentM A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 14________________________________________________________________________________________________________________________________________________Pin ConfigurationsMAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps______________________________________________________________________________________15Chip InformationOrdering Information (continued)MAX4130 TRANSISTOR COUNT: 170MAX4131 TRANSISTOR COUNT: 170MAX4132 TRANSISTOR COUNT: 340MAX4134 TRANSISTOR COUNT: 680*Dice are specified at T A = +25°C, DC parameters only.Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)M A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps 16______________________________________________________________________________________Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)MAX4130–MAX4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps______________________________________________________________________________________17Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are M A X 4130–M A X 4134Single/Dual/Quad, Wide-Bandwidth, Low-Power,Single-Supply, Rail-to-Rail I/O Op Amps implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.18__________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600©2003 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。

MAX3032EEUE+中文资料

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
MAX3030E/ MAX3031E
16 VCC 15 DI4 14 DO4+ 13 DO412 EN 11 DO310 DO3+ 9 DI3
TSSOP/SO
DI1 1 DO1+ 2 DO1- 3 EN1&2 4 DO2- 5 DO2+ 6
DI2 7 GND 8
MAX3032E/ MAX3033E
16 VCC 15 DI4 14 DO4+ 13 DO412 EN3&4 11 DO310 DO3+ 9 DI3
Ordering Information
ቤተ መጻሕፍቲ ባይዱ
TEMP RANGE 0°C to +70°C 0°C to +70°C
-40°C to +85°C -40°C to +85°C

MAX3033EEUE中文资料

General DescriptionThe MAX3030E–MAX3033E family of quad RS-422transmitters send digital data transmission signals over twisted-pair balanced lines in accordance with TIA/EIA-422-B and ITU-T V.11 standards. All transmitter outputs are protected to ±15kV using the Human Body Model.The MAX3030E–MAX3033E are available with either a 2Mbps or 20Mbps guaranteed baud rate. The 2Mbps baud rate transmitters feature slew-rate-limiting to mini-mize EMI and reduce reflections caused by improperly terminated cables.The 20Mbps baud rate transmitters feature low-static current consumption (I CC < 100µA), making them ideal for battery-powered and power-conscious applications.They have a maximum propagation delay of 16ns and a part-to-part skew less than 5ns, making these devices ideal for driving parallel data. The MAX3030E–MAX3033E feature hot-swap capability that eliminates false transitions on the data cable during power-up or hot insertion.The MAX3030E–MAX3033E are low-power, ESD-pro-tected, pin-compatible upgrades to the industry-stan-dard 26LS31 and SN75174. They are available in space-saving 16-pin TSSOP and SO packages.ApplicationsTelecom Backplanes V.11/X.21 Interface Industrial PLCs Motor ControlFeatureso Meet TIA/EIA-422-B (RS-422) and ITU-T V.11Recommendation o ±15kV ESD Protection on Tx Outputs o Hot-Swap Functionalityo Guaranteed 20Mbps Data Rate (MAX3030E,MAX3032E)o Slew-Rate-Controlled 2Mbps Data Rate (MAX3031E, MAX3033E)o Available in 16-Pin TSSOP and Narrow SO Packages o Low-Power Design (<330µW, V CC = 3.3V Static) o +3.3V Operationo Industry-Standard Pinout o Thermal ShutdownMAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters________________________________________________________________Maxim Integrated Products 1Ordering Information19-2671; Rev 0; 10/02For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .Pin ConfigurationsM A X 3030E –M A X 3033E±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.(All Voltages Are Referenced to Device Ground, Unless Otherwise Noted)V CC ........................................................................................+6V EN1&2, EN3&4, EN, EN ............................................-0.3V to +6V DI_............................................................................-0.3V to +6V DO_+, DO_- (normal condition).................-0.3V to (V CC + 0.3V)DO_+, DO_- (power-off or three-state condition).....-0.3V to +6V Driver Output Current per Pin.........................................±150mAContinuous Power Dissipation (T A = +70°C)16-Pin SO (derate 8.70mW/°C above +70°C)..............696mW 16-Pin TSSOP (derate 9.40mW/°C above +70°C).......755mW Operating Temperature RangesMAX303_EC_......................................................0°C to +70°C MAX303_EE_...................................................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +160°C Lead Temperature (soldering, 10s).................................+300°CMAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 TransmittersSWITCHING CHARACTERISTICS—MAX3030E, MAX3032ESWITCHING CHARACTERISTICS —MAX3031E, MAX3033EM A X 3030E –M A X 3033E±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters 4_______________________________________________________________________________________SWITCHING CHARACTERISTICS —MAX3031E, MAX3033E (continued)(3V ≤V CC ≤3.6V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +3.3V and T A = +25°C.)Note 1:All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to deviceground, unless otherwise noted.Note 2:∆V OD and ∆V OC are the changes in V OD and V OC , respectively, when DI changes state. Note 3:Only one output shorted at a time.Note 4:This input current is for the hot-swap enable (EN_, EN, EN ) inputs and is present until the first transition only. After the firsttransition, the input reverts to a standard high-impedance CMOS input with input current I LEAK .DIFFERENTIAL OUTPUT VOLTAGEvs. OUTPUT CURRENTOUTPUT CURRENT (mA)D I F FE R E N T I A L O U T P U T V O L T A G E (V )906030123400120OUTPUT CURRENTvs. TRANSMITTER OUTPUT LOW VOLTAGEM A X 3030E t o c 02OUTPUT LOW VOLTAGE (V)O U T P U T C U R R E N T (m A )32150100150200004OUTPUT CURRENTvs. TRANSMITTER OUTPUT HIGH VOLTAGEM A X 3030E t o c 03OUTPUT HIGH VOLTAGE (V)O U T P U T C U R R E N T (m A )321255075100125150004Typical Operating Characteristics(V CC = +3.3V and T A = +25°C, unless otherwise noted.)MAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters_______________________________________________________________________________________5SUPPLY CURRENT vs. SUPPLY VOLTAGESUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (µA )32120406080100004MAX3030E/MAX3032ESUPPLY CURRENT vs. DATA RATEDATA RATE (bps)S U P P L Y C U R R E N T (m A )10M1M100k10k1k5101520253000.1k100MMAX3031E/MAX3033ESUPPLY CURRENT vs. DATA RATEDATA RATE (bps)S U P P L Y C U R R E N T(m A )1M100k10k1k0.51.01.52.02.50.1k10MMAX3030E/MAX3032ESUPPLY CURRENT vs. DATA RATEDATA RATE (bps)S U P P L Y C U R R E N T (m A )10M1M100k10k1k90100110120130800.1k100MMAX3031E/MAX3033ESUPPLY CURRENT vs. DATA RATEDATA RATE (bps)S U P P L Y C U R R E N T (m A )1M100k10k1k919497100880.1k10MMAX3030EDRIVER PROPAGATION DELAY(LOW TO HIGH)MAX3030E toc0910ns/divDIFFERENTIAL OUTPUT 2V/divDI_1V/divMAX3030EDRIVER PROPAGATION DELAY(HIGH TO LOW)MAX3030E toc1010ns/divDIFFERENTIAL OUTPUT 2V/divDI_1V/divMAX3031EDRIVER PROPAGATION DELAY(LOW TO HIGH)MAX3030E toc1120ns/divDIFFERENTIAL OUTPUT 2V/divDI_1V/divMAX3031EDRIVER PROPAGATION DELAY(HIGH TO LOW)MAX3030E toc1220ns/divDIFFERENTIAL OUTPUT 2V/divDI_1V/divTypical Operating Characteristics (continued)(V CC = +3.3V and T A = +25°C, unless otherwise noted.)M A X 3030E –M A X 3033E±15kV ESD-Protected, 3.3V Quad RS-422 TransmittersENABLE RESPONSE TIMEMAX3030E toc1320ns/div ENABLE 1V/divDIFFERENTIAL OUTPUT 2V/divMAX3033E EYE DIAGRAMMAX3030E toc14100ns/divDO_+1V/divDO_-1V/divTypical Operating Characteristics (continued)(V CC = +3.3V and T A = +25°C, unless otherwise noted.)MAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters_______________________________________________________________________________________7Test Circuits and Timing DiagramsTime Test CircuitFigure 4. Driver Enable/Disable Delays Test CircuitFigure 3. Differential Driver Propagation Delay and Transition WaveformM A X 3030E –M A X 3033EDetailed DescriptionThe MAX3030E –MAX3033E are high-speed quad RS-422 transmitters designed for digital data transmission over balanced lines. They are designed to meet the requirements of TIA/EIA-422-B and ITU-T V.11. The MAX3030E –MAX3033E are available in two pinouts to be compatible with both the 26LS31 and SN75174industry-standard devices. Both are offered in 20Mbps and 2Mbps baud rate. All versions feature a low-static current consumption (I CC < 100µA) that makes them ideal for battery-powered and power-conscious appli-cations. The 20Mbps version has a maximum propaga-tion delay of 16ns and a part-to-part skew less than 5ns, allowing these devices to drive parallel data. The 2Mbps version is slew-rate-limited to reduce EMI and reduce reflections caused by improperly terminated cables.Outputs have enhanced ESD protection providing ±15kV tolerance. All parts feature hot-swap capability that eliminates false transitions on the data cable dur-ing power-up or hot insertion.±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electro-static discharges encountered during handling and assembly. The driver outputs and receiver inputs have extra protection against static electricity. Maxim ’s engi-neers developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation and power-down. After an ESD event, the MAX3030E –MAX3033E keep working without latchup.ESD protection can be tested in various ways; thetransmitter outputs of this product family are character-ized for protection to ±15kV using the Human Body Model. Other ESD test methodologies include IEC10004-2 Contact Discharge and IEC1000-4-2 Air-Gap Discharge (formerly IEC801-2).ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body ModelFigure 8 shows the Human Body Model, and Figure 9shows the current waveform it generates when dis-charged into low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest,which is then discharged into the test device through a 1.5k Ωresistor.±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters 8_______________________________________________________________________________________Figure 7. Power-Off MeasurementsTest Circuits andTiming Diagrams (continued)Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protec-tion during manufacturing, not just inputs and outputs.Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports.Hot SwapWhen circuit boards are plugged into a “hot ” back-plane, there can be disturbances to the differential sig-nal levels that could be detected by receivers connected to the transmission line. This erroneous data could cause data errors to an RS-422 system. To avoid this, the MAX3030E –MAX3033E have hot-swap capa-ble inputs.When a circuit board is plugged into a “hot ” backplane,there is an interval during which the processor is going through its power-up sequence. During this time, the processor ’s output drivers are high impedance and are unable to drive the enable inputs of the MAX3030E –MAX3033E (EN, EN , EN_) to defined logic levels.Leakage currents from these high-impedance drivers,of as much as 10µA, could cause the enable inputs of the MAX3030E –MAX3033E to drift high or low.Additionally, parasitic capacitance of the circuit board could cause capacitive coupling of the enable inputs to either G ND or V CC . These factors could cause the enable inputs of the MAX3030E –MAX3033E to drift to levels that may enable the transmitter outputs. To avoid this problem, the hot-swap input provides a method of holding the enable inputs of the MAX3030E –MAX3033E in the disabled state as V CC ramps up. This hot-swap input is able to overcome the leakage currents and par-asitic capacitances that can pull the enable inputs to the enabled state.Hot-Swap Input CircuitryIn the MAX3030E –MAX3033E, the enable inputs feature hot-swap capability. At the input there are two NMOS devices, M1 and M2 (Figure 10). When V CC is ramping up from zero, an internal 6µs timer turns on M2 and sets the SR latch, which also turns on M1. Transistors M2, a 2mA current sink, and M1, a 100µA current sink, pull EN to GND through a 5.6k Ωresistor. M2 is designed to pull the EN input to the disabled state against an external parasitic capacitance of up to 100pF that is trying to enable the EN input. After 6µs, the timer turns M2 off and M1 remains on, holding the EN input low against three-state output leakages that might enable EN. M1 remains on until an external source overcomes the required inputcurrent. At this time the SR latch resets and M1 turns off.When M1 turns off, EN reverts to a standard, high-impedance CMOS input. Whenever V CC drops below 1V, the hot-swap input is reset. The EN1&2 and EN3&4input structures are identical to the EN input. For the EN input, there is a complementary circuit employing two PMOS devices pulling the EN input to V CC .Hot-Swap Line TransientThe circuit of Figure 11 shows a typical offset termina-tion used to guarantee a greater than 200mV offset when a line is not driven. The 50pF capacitor repre-MAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters_______________________________________________________________________________________9Figure 10. Simplified Structure of the Driver Enable Pin (EN)Figure 11. Differential Power-Up Glitch (Hot Swap)M A X 3030E –M A X 3033Esents the minimum parasitic capacitance that would exist in a typical application. In most cases, more capacitance exists in the system and reduces the mag-nitude of the glitch. During a “hot-swap ” event when the driver is connected to the line and is powered up, the driver must not cause the differential signal to drop below 200mV (Figures 12 and 13).Operation of Enable PinsThe MAX3030E –MAX3033E family has two enable-func-tional versions.The MAX3030E/MAX3031E are compatible with 26LS31, where the two enable signals control all four transmitters (global enable).The MAX3032E/MAX3033E are compatible with the SN75174. EN1&2 controls transmitters 1 and 2, and EN 3&4 controls transmitters 3 and 4 (dual enable).Typical ApplicationsThe MAX3030E –MAX3033E offer optimum performance when used with the MAX3094E/MAX3096 3.3V quad differential line receivers. Figure 14 shows a typical RS-422 connection for transmitting and receiving data.±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters 10______________________________________________________________________________________4µs/divFigure 12. Differential Power-Up Glitch (0.1V/µs) 1.0µs/divDO_+DO_+ - DO_-DO_-V 1V/divFigure 13. Differential Power-Up Glitch (1V/µs)EN TX1TX4MODE0Active Active All transmitters active 1High-Z High-Z High-Z All transmitters disabled 0Active Active All transmitters active 1ActiveActiveAll transmitters activeTable 1. MAX3030E/MAX3031E Transmitter ControlsTable 2. MAX3032E/MAX3033E Transmitter ControlsMAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters______________________________________________________________________________________11Figure 14. Typical Connection of a Quad Transmitter and Quad Receiver as a PairM A X 3030E –M A X 3033E±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters 12______________________________________________________________________________________Figure 15. MAX3030E/MAX3031E Functional DiagramFigure 16. MAX3032E/MAX3033E Functional DiagramChip InformationTRANSISTOR COUNT: 1050PROCESS: BiCMOSMAX3030E–MAX3033E±15kV ESD-Protected, 3.3V QuadRS-422 Transmitters______________________________________________________________________________________13Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)M A X 3030E –M A X 3033E±15kV ESD-Protected, 3.3V Quad RS-422 Transmitters Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.14____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2002 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。

MEMORY存储芯片MAX4053ESE+T中文规格书

Figure 8. Driver Propagation TimesFigure 9. Driver Enable and Disable Times (t PZH , t PSH , t PHZ )Figure 10. Driver Enable and Disable Times (t PZL , t PSL , t PLZ )MAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited True RS-485/RS-422 TransceiversDriver Output ProtectionExcessive output current and power dissipation caused by faults or by bus contention are prevented by two mechanisms. A foldback current limit on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see Typical Operating Characteristics ). In addition, a thermal shut-down circuit forces the driver outputs into a high-imped-ance state if the die temperature rises excessively.Propagation DelayFigures 15–18 show the typical propagation delays. Skew time is simply the difference between the low-to-high and high-to-low propagation delay. Small driver/receiver skew times help maintain a symmetrical mark-space ratio (50% duty cycle).The receiver skew time, |tPRLH - t PRHL |, is under 10ns 20ns for the MAX3483E/MAX3488E). The driver skew times are 8ns for the MAX3485E/MAX3490E/MAX3491E, 12ns for the MAX3486E, and typically under 50ns for the MAX3483E/MAX3488E.Line Length vs. Data RateThe RS-485/RS-422 standard covers line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 21 for an example of a line repeater.Figures 19 and 20 show the system differential voltage for parts driving 4000 feet of 26AWG twisted-pair wire at 125kHz into 120Ω loads.For faster data rate transmission, please consult the factory.±15kV ESD Protection As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The driver outputs and receiver inputs of the MAX3483E family of devices have extra protection against static electricity. Maxim’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup or damage.ESD protection can be tested in various ways; the trans-mitter outputs and receiver inputs of this product family are characterized for protection to the following limits:1)±15kV using the Human Body Model 2)±8kV using the Contact-Discharge method specified in IEC 1000-4-23)±15kV using IEC 1000-4-2’s Air-Gap method.ESD Test Conditions ESD performance depends on a variety of conditions. Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body Model Figure 22a shows the Human Body Model and Figure 22b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the test device through a 1.5kΩ resistor.IEC 1000-4-2The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifi-cally refer to integrated circuits. The MAX3483E family of devices helps you design equipment that meets Level 4 (the highest level) of IEC 1000-4-2, without the need for additional ESD-protection components.The major difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak cur-rent in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD withstand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 23a shows the IEC 1000-4-2 model, and Figure 23b shows the current waveform for the ±8kV IEC 1000-4-2, Level 4ESD contact-discharge test. test.Figure 21. Line Repeater for MAX3488E/MAX3490E/MAX3491EMAX3483E/MAX3485E/MAX3486E/MAX3488E/MAX3490E/MAX3491E3.3V-Powered, ±15kV ESD-Protected, 12Mbps and Slew-Rate-Limited True RS-485/RS-422 Transceivers。

13001-13009的参数

MJE13001是小功率高压高速开关三极管，典型应用：荧光灯电子镇流器。

它采用TO-92封装，管脚排列如图：MJE13001主要参数：集电极-基极最高耐压VCBO=500V集电极-发射极最高耐压VCEO=400V发射极-基极最高耐压VEBO=9V集电极电流IC=0.3A耗散功率PC=7W结温Tj=150℃贮藏温度TSTG=-50~150℃直流放大系数HFE=8~403DD13001是硅NPN型小功率开关三极管，主要用于节能灯电子镇流器、手机充电器等开关电源电路。

3DD13001具有击穿电压高、反向漏电流小、开关速度快、饱和压降低、高温性能好等特点。

采用TO-251封装的3DD13001管脚排列如图：１脚：基极；２脚：集电极；３脚：发射极3DD13001主要参数：集电极最大耗散功率PCM=1.2W (Tamb=25℃)集电极最大允许电流ICM=0.2A集电极-基极反向击穿电压BVCBO=600V集电极-发射极反向击穿电压BVCEO=400V发射极-基极反向击穿电压BVEBO=7V结温Tj=150℃贮藏温度TSTG=-55~150℃直流放大系数=8~40MJE13002是高压高速开关三极管，国产同类型号为3DD13002。

它主要用于电子节能灯、日光灯电子镇流器，以及其它开关电路中。

MJE13002(3DD13002)采用TO-126封装的外形尺寸和管脚排列如图：MJE13002(3DD13002)主要参数VCBO=600VVCEO=400VVEBO=7VIC=1APC=1.2WTj=150℃TSTG=-55~150℃ICBO=100μAIEBO=100μAHFE=10~40VCE(sat) =0.5VVBE(sat) =1.0VfT=4MHzTf=0.6μsMJE13003是主要用于节能灯及荧光灯电子镇流器的高反压大功率开关三极管，硅NPN 型，采用TO-126封装，它的外形和管脚排列如下：MJE13003主要参数集电极-基极电压VCBO 700 V集电极-发射极电压VCEO 400 V发射极-基极电压VEBO 9V集电极电流IC 2.0 A集电极耗散功率PC 40 W最高工作温度Tj 150 °C贮存温度Tstg -65-150 °C集电极-基极截止电流ICBO (VCB=700V) 100 μA集电极-发射极截止电流ICEO (VCE=400V,IB=0) 250 μA集电极-发射极电压VCEO (IC=10mA,IB=0) 400 V发射极-基极电压VEBO (IE=1mA,IC=0) 9 V直流电流放大倍数5~403DD13005是高反压大功率开关三极管，硅材料NPN型，平面扩散工艺制造，开关速度快，耐压高。

电子镇流器常用三极管的管脚和参数

MJE13001是小功率高压高速开关三极管，典型应用：荧光灯电子镇流器。

3DD13001具有击穿电压高、反向漏电流小、开关速度快、饱和压降低、高温性能好等特点。

它主要用于电子节能灯、日光灯电子镇流器，以及其它开关电路中。

MJE13002(3DD13002)采用TO-126封装的外形尺寸和管脚排列如图：MJE13002(3DD13002)主要参数VCBO=600VVCEO=400VVEBO=7VIC=1APC=1.2WTj=150℃TSTG=-55~150℃ICBO=100μAIEBO=100μAHFE=10~40VCE(sat) =0.5VVBE(sat) =1.0VfT=4MHzTf=0.6μsMJE13003是主要用于节能灯及荧光灯电子镇流器的高反压大功率开关三极管，硅NPN型，采用TO-126封装，它的外形和管脚排列如下：MJE13003主要参数集电极-基极电压VCBO 700 V集电极-发射极电压VCEO 400 V发射极-基极电压VEBO 9V集电极电流IC 2.0 A集电极耗散功率PC 40 W最高工作温度Tj 150 °C贮存温度Tstg -65-150 °C集电极-基极截止电流ICBO (VCB=700V) 100 μA集电极-发射极截止电流ICEO (VCE=400V,IB=0) 250 μA集电极-发射极电压VCEO (IC=10mA,IB=0) 400 V发射极-基极电压VEBO (IE=1mA,IC=0) 9 V直流电流放大倍数5~403DD13005是高反压大功率开关三极管，硅材料NPN型，平面扩散工艺制造，开关速度快，耐压高。

MAX1335ETE中文资料

General DescriptionThe MAX1334/MAX1335 2-channel, serial-output, 10-bit, analog-to-digital converters (ADCs) feature two true-differential analog inputs and offer outstanding noise immunity and dynamic performance. Both devices easily interface with SPI™/QSPI™/MICROWIRE™ and standard digital signal processors (DSPs).The MAX1334 operates from a single +4.75V to +5.25V supply with sampling rates up to 4.5Msps. The MAX1335 operates from a single +2.7V to +3.6V supply with sampling rates up to 4Msps. These devices feature a partial power-down mode and a full power-down mode that reduce the supply current to 3.3mA and 0.2µA, respectively. Also featured is a separate power-supply input (DV DD ) that allows direct interfacing to +2.7V to +3.6V digital logic. The fast conversion speed, low power dissipation, excellent AC performance, and DC accuracy (±0.4LSB INL) make the MAX1334/MAX1335 ideal for industrial process control, motor control, and base-station applications.The MAX1334/MAX1335 are available in a space-sav-ing (3mm x 3mm), 16-pin, TQFN package and operate over the extended (-40°C to +85°C) temperature range.ApplicationsData Acquisition Bill Validation Motor Control Base StationsHigh-Speed Modems Optical SensorsIndustrial Process ControlFeatures♦4.5Msps Sampling Rate (+5V, MAX1334)♦4Msps Sampling Rate (+3V, MAX1335)♦Separate Logic Supply: +2.7V to +3.6V ♦Two True-Differential Analog Input Channels ♦Bipolar/Unipolar Selection Input ♦Only 40mW (typ) Power Consumption ♦Only 2µA (max) Shutdown Current ♦High-Speed, SPI-Compatible, 3-Wire Serial Interface ♦2.6MHz Full-Linear Bandwidth♦61dB SINAD at 525kHz Input Frequency ♦No Pipeline Delays♦Space-Saving (3mm x 3mm), 16-Pin TQFN PackageMAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs________________________________________________________________Maxim Integrated Products1Ordering InformationTypical Operating Circuit19-3767; Rev 2; 1/07For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .SPI/QSPI are trademarks of Motorola, Inc.MICROWIRE is a trademark of National Semiconductor Corp.*EP = Exposed paddle.**Future product—contact factory for availability.Selector Guide appears at end of data sheet.Pin Configuration appears at end of data sheet.M A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.AV DD to AGND (MAX1334)......................................-0.3V to +6V AV DD to AGND (MAX1335)......................................-0.3V to +4V DV DD to DGND.........................................................-0.3V to +4V AGND to DGND.....................................................-0.3V to +0.3V SCLK, CNVST, SHDN , CHSEL, BIP/UNI ,DOUT to DGND...................................-0.3V to (DV DD + 0.3V)AIN0P, AIN0N, AIN1P, AIN1N, REF toAGND...................................................-0.3V to (AV DD + 0.3V)Maximum Current into Any Pin.........................................±50mAContinuous Power Dissipation (T A = +70°C)16-Pin TQFN (derate 17.5mW/°C above +70°C)....1398.6mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-60°C to +150°C Lead Temperature (soldering, 10s).................................+300°CELECTRICAL CHARACTERISTICS (MAX1334)(AV DD = +4.75V to +5.25V, DV DD = +2.7V to +3.6V, f SCLK = 76MHz, V REF = 4.096V, T A = T MIN to T MAX , unless otherwise noted.Typical values are at T A = +25°C.)MAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS (MAX1334) (continued)(AV DD = +4.75V to +5.25V, DV DD = +2.7V to +3.6V, f SCLK = 76MHz, V REF = 4.096V, T A = T MIN to T MAX , unless otherwise noted.Typical values are at T A = +25°C.)M A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs 4_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS (MAX1334) (continued)(AV DD = +4.75V to +5.25V, DV DD = +2.7V to +3.6V, f SCLK = 76MHz, V REF = 4.096V, T A = T MIN to T MAX , unless otherwise noted.Typical values are at T A = +25°C.)MAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs_______________________________________________________________________________________5ELECTRICAL CHARACTERISTICS (MAX1335)M A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs 6_______________________________________________________________________________________ELECTRICAL CHARACTERISTICS (MAX1335) (continued)(AV DD = +2.7V to +3.6V, DV DD = +2.7V to +3.6V, f SCLK = 64MHz, V REF = 2.5V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)MAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs_______________________________________________________________________________________7TIMING CHARACTERISTICS (MAX1335) (Figure 4)(AV DD = +2.7V to +3.6V, DV DD = +2.7V to +3.6V, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.)Note 3:Tested with AV DD = DV DD = +2.7V.Note 4:Guaranteed by design, not production tested.Figure 1. Load Circuits for Enable/Disable TimesM A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs 8_______________________________________________________________________________________Typical Operating Characteristics(AV DD = +3V, DV DD = +3V, V REF = 2.048V, f SCLK = 40MHz, T A = +25°C, unless otherwise noted.)MAX1335-1.0-0.6-0.8-0.2-0.40.200.40.80.61.002563841285126407688961024INTEGRAL NONLINEARITY vs. OUTPUT CODEOUTPUT CODEI N L (L S B )-1.0-0.6-0.8-0.2-0.40.200.40.81.002563841285126407688961024DIFFERENTIAL NONLINEARITYvs. OUTPUT CODEOUTPUT CODEI N L (L S B)0.6-2.0-1.5-1.0-0.500.51.01.52.0-40-1510356085OFFSET ERROR vs. TEMPERATUREM A X 1335 t o c 03TEMPERATURE (°C)O F F S E T E R R O R (L S B )3.53.43.2 3.32.9 3.0 3.12.8-1.5-1.0-0.500.51.01.52.0-2.02.73.6OFFSET ERRORvs. AV DD SUPPLY VOLTAGEO F F S E T E R R O R (L S B )AV DD (V)-2.0-1.5-1.0-0.500.51.01.52.0-40-1510356085GAIN ERROR vs. TEMPERATUREM A X 1335 t o c 05TEMPERATURE (°C)G A I N E R R O R (L S B )3.53.42.8 2.9 3.0 3.23.1 3.32.7 3.6GAIN ERROR vs. AV DD SUPPLY VOLTAGEAV DD (V)G A I N E R R O R (L S B )-1.5-1.0-0.500.51.01.52.0-2.0AV DD SUPPLY CURRENT vs. TEMPERATUREM A X 1335 t o c 07TEMPERATURE (°C)I A V D D (m A )603510-158.59.09.510.010.511.011.512.08.0-4085AV DD SUPPLY CURRENT vs. SCLK FREQUENCYM A X 1335 t o c 08f SCLK (MHz)I A V D D (m A )6050102030408.59.09.510.010.511.011.512.08.00708.59.09.510.010.511.011.512.08.0AV DD (V)AV DD SUPPLY CURRENT vs. AV DD SUPPLY VOLTAGEI A V D D (m A )3.53.42.8 2.9 3.0 3.23.1 3.32.7 3.6MAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs_______________________________________________________________________________________9Typical Operating Characteristics (continued)(AV DD = +3V, DV DD = +3V, V REF = 2.048V, f SCLK = 40MHz, T A = +25°C, unless otherwise noted.)MAX13353.54.04.55.05.56.06.57.03.0DV DD SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)I D V D D (m A )603510-15-40853010201234560040DV DD SUPPLY CURRENT vs. SCLK FREQUENCYM A X 1335 t o c 11f SCLK (MHz)I D V D D (m A )5060703.23.12.8 2.9 3.03.54.04.55.05.56.06.57.03.02.73.3DV DD (V)DV DD SUPPLY CURRENT vs. DV DD SUPPLY VOLTAGEI D V D D (m A )3.63.53.45054525856606202000100030004000SINAD vs. INPUT FREQUENCYM A X 1335 t o c 13INPUT FREQUENCY (kHz)S I N A D (d B )5466607872849002000100030004000SFDR vs. INPUT FREQUENCYM A X 1335 t o c 14INPUT FREQUENCY (kHz)S F D R (d B c )-90-84-72-78-66-60THD vs. INPUT FREQUENCYM A X 1335 t o c 15INPUT FREQUENCY (kHz)T H D (d B c )2000100030004000-6-4-5-2-3-1004000200060008000OUTPUT AMPLITUDE vs. INPUT FREQUENCYINPUT FREQUENCY (kHz)O U T P U T A M P L I T U D E (d B F S )TOTAL SUPPLY CURRENT vs. THROUGHPUT RATEf CNVST (MHz)I A V D D + I D V D D (m A )10.10.011101000.10.00110M A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCs 10______________________________________________________________________________________Detailed Description The MAX1334/MAX1335 use an input track-and-hold (T/H) circuit along with a successive-approximation register (SAR) to convert a differential analog input sig-nal to a digital 10-bit output. The serial interface requires only three digital lines (SCLK, CNVST, and DOUT) and provides easy interfacing to microcon-trollers (µCs) and DSPs. Figure 2 shows the block dia-gram for the MAX1334/MAX1335.Power Supplies The MAX1334/MAX1335 accept two power supplies that allow the digital noise to be isolated from sensitive analog circuitry. For both the MAX1334 and MAX1335, the digital power supply input accepts a +2.7V to +3.6V supply voltage. However, the supply voltage range for the analog power supply is different for each device. The MAX1334 accepts a +4.75V to +5.25V analog power supply, and the MAX1335 accepts a +2.7V to +3.6V analog power supply. See the Layout, G rounding, and Bypassing section for information onhow to isolate digital noise from the analog power input. The MAX1334/MAX1335s’ analog power supply con-sists of one AV DD input, two AG ND inputs, and the exposed paddle (EP). The digital power input consists of one DV DD input and one DG ND input. Ensure that the potential on both AG ND inputs is the same. Furthermore, ensure that the potential between AG ND and DGND is limited to ±0.3V. Ideally, there should be no potential difference between AG ND and DG ND. There are no power-sequencing issues between AV DD and DV DD.True-Differential Analog Input T/H The equivalent input circuit of Figure 3 shows the MAX1334/MAX1335s’ input architecture, which is com-posed of a T/H, a comparator, and a switched-capaci-tor DAC. On power-up, the MAX1334/MAX1335 enter full power-down mode. Drive CNVST high to exit full power-down mode and to start acquiring the input. The positive input capacitor is connected to AIN_P and the negative input capacitor is connected to AIN_N. The T/H enters its hold mode on the falling edge of CNVST and the ADC starts converting the sampled difference between the analog inputs. Once a conversion has been initiated, the T/H enters acquisition mode for the next conversion on the 13th falling edge of SCLK after CNVST has been transitioned from high to low.The time required for the T/H to acquire an input signal is determined by how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisition time lengthens. The acquisition time,t ACQ, is the minimum time needed for the signal to be acquired. It is calculated by the following equation:t ACQ≥k x (R SOURCE+ R IN) x C INwhere:The constant k is the number of RC time constants required so that the voltage on the internal sampling capacitor reaches N-bit accuracy, i.e., so that the dif-ference between the input voltage and the sampling capacitor voltage is equal to 0.5 LSB. N = 10 for theMAX1334/MAX1335.R IN= 250Ωis the equivalent differential analog input resistance, C IN= 14pF is the equivalent differential ana-log input capacitance, and R SOURCE is the source impedance of the input signal. Note that t ACQ is neverless than 32ns for the MAX1334 and 39ns for theMAX1335 and any source impedance below 116Ωdoesnot significantly affect the ADC’s AC performance.Input BandwidthThe ADC’s input-tracking circuitry has a 5MHz small-signal bandwidth, making it possible to digitize high-speed transient events and measure periodic signalswith bandwidths exceeding the ADC’s sampling rate byusing undersampling techniques. To avoid high-fre-quency signals being aliased into the frequency bandof interest, lowpass or bandpass filtering is recom-mended to limit the bandwidth of the input signal.k In N=≈×7622.()MAX1334/MAX13354.5Msps/4Msps, 5V/3V, 2-Channel,True-Differential, 10-Bit ADCsFigure 2. Block DiagramM A X 1334/M A X 1335Input BufferTo improve the input signal bandwidth under AC condi-tions, drive the input with a wideband buffer (> 50MHz)that can drive the ADC’s input capacitance (14pF) and settle quickly. Most applications require an input buffer to achieve 10-bit accuracy. Although slew rate and bandwidth are important, the most critical input buffer specification is settling time. The sampling requires an acquisition time of 32ns for the MAX1334 and 39ns for the MAX1335. At the beginning of the acquisition, the ADC internal sampling capacitors connect to the ana-log inputs, causing some disturbance. Ensure the amplifier is capable of settling to at least 10-bit accura-cy during this interval. Use a low-noise, low-distortion,wideband amplifier that settles quickly and is stable with the ADC’s 14pF input capacitance.Refer to the Maxim website () for application notes on how to choose the optimum buffer amplifier for an ADC application. The MAX4430 is one of the devices that are ideal for this application.Differential Analog Input Range andProtectionThe MAX1334/MAX1335 produce a digital output that corresponds to the differential analog input voltage as long as the differential analog inputs are within the specified range. When operating in unipolar mode (BIP/UNI = 0), the usable differential analog input range is from 0 to V REF . When operating in bipolar mode (BIP/UNI = 1), the differential analog input range is from -V REF / 2 to +V REF / 2. In both unipolar and bipolar modes, the input common-mode voltage can vary as long as the voltage at any single analog input (V AIN_P ,4.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCsFigure 3b. Equivalent Input Circuit (Hold/Conversion Mode)Figure 3a. Equivalent Input Circuit (Acquisition Mode)V AIN_N ) remains within 50mV of the analog power-sup-ply rails (AV DD , AGND).As shown in Figure 3, internal protection diodes confine the analog input voltage within the region of the analog power-supply rails (AV DD , AGND) and allow the analog input voltage to swing from AGND - 0.3V to AV DD + 0.3V without damage. Input voltages beyond AG ND - 0.3V and AV DD + 0.3V forward bias the internal protection diodes. In this situation, limit the forward diode current to 50mA to avoid damaging the MAX1334/MAX1335.Serial Digital InterfaceTiming and ControlConversion-start and data-read operations are con-trolled by the CNVST and SCLK digital inputs. CNVST controls the state of the T/H as well as when a conver-sion is initiated. CNVST also controls the power-down mode of the device (see the Partial Power-Down (PPD)and Full Power-Down (FPD) Mode section). SCLKclocks data out of the serial interfaceand sets the conversion speed. Figures 4 and 5 show timing diagrams that outline the serial-interface opera-tion.Starting a ConversionOn power-up, the MAX1334/MAX1335 enter full power-down mode. The first rising edge of CNVST exits the full power-down mode and the MAX1334/MAX1335 begin acquiring the analog input. A CNVST falling edge initi-ates a conversion sequence. The T/H stage holds the input voltage; DOUT changes from high impedance to logic-low; and the ADC begins to convert at the first SCLK rising edge. SCLK is used to drive the conver-sion process, and it shifts data out of DOUT. SCLK begins shifting out the data after the 6th rising edge of SCLK. DOUT transitions t DOT after each SCLK’s rising edge and remains valid for t DHOLD after the next rising edge. The 6th rising clock edge produces the MSB of the conversion result at DOUT, and the MSB remains valid t DHOLD after the 7th rising edge of SCLK. SixteenMAX1334/MAX13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCsFigure5. Interface Timing SequenceFigure 4. Detailed Serial-Interface TimingM A X 1334/M A X 1335rising SCLK edges are needed to clock out the five leading zeros, 10 data bits, and a trailing zero. Forcontinuous operation, pull CNVST high between the 14th and the 15th rising edges of SCLK. The highest throughput is achieved when performing continuous conversions. If CNVST is low during the rising edge of the 16th SCLK, the DOUT line goes to a high-imped-ance state on either CNVST’s rising edge or the next SCLK’s rising edge, enabling the serial interface to be shared by multiple devices. Figure 6 illustrates a con-version using a typical serial interface.Partial Power-Down (PPD) and Full Power-Down (FPD) ModePower consumption is reduced significantly by placing the MAX1334/MAX1335 in either partial power-down mode or full power-down mode. Partial power-down mode is ideal for infrequent data sampling and fast wake-up time applications. Once CNVST is transitioned from high to low, pull CNVST high any time after the 4th rising edge of the SCLK but before the 13th rising edgeof the SCLK to enter partial power-down mode (see Figure 7). Drive CNVST low and then drive high before the 4th SCLK to remain in partial power-down mode. This reduces the supply current to 3.3mA. Drive CNVST low and allow at least 13 SCLK cycles to elapse before dri-ving CNVST high to exit partial power-down mode.Full power-down mode reduces the supply current to 0.2µA and is ideal for infrequent data sampling. To enter full power-down mode, the MAX1334/MAX1335must first be in partial power-down mode. While in par-tial power-down mode, repeat the sequence used to enter partial power-down mode to enter full power-down mode (see Figure 8). Drive CNVST low and allow at least 13 SCLK cycles to elapse before driving CNVST high to exit full power-down mode.Maintain a logic-low or a logic-high on SCLK and all digital inputs at DV DD or DG ND while in either partial power-down or full power-down mode to minimize power consumption.4.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCsFigure 7. SPI Interface—Partial Power-DownFigure 6. Continuous Conversion with Burst or Continuous ClockAnother way of entering the full power-down mode is using the SHDN input. Drive SHDN to a logic-low to put the device into the full power-down mode. Drive SHDN high to exit full power-down mode and return to normal operating mode. SHDN overrides any software-controlled power-down mode and every time it is deasserted, it places the MAX1334/MAX1335 in its normal mode of operation regardless of its previous state.Transfer Function The MAX1334/MAX1335 output is straight binary in unipolar mode and is two’s complement in bipolar mode. Figure 9 shows the unipolar transfer function for the MAX1334/MAX1335. Table 1 shows the unipolar relation-ship between the differential analog input voltage andthe digital output code. Figure 10 shows the bipolar transfer function for the MAX1334/MAX1335. Table 2 shows the bipolar relationship between the differential analog input voltage and the digital output code.Determine the differential analog input voltage as a function of V REF and the digital output code with the fol-lowing equation:where:ΔV LSB CODE LSBAIN=×±×1005.MAX1334/MAX13354.5Msps/4Msps, 5V/3V, 2-Channel,True-Differential, 10-Bit ADCsFigure 8. SPI Interface—Full Power-DownFigure 9. Unipolar Transfer FunctionFigure 10. Bipolar Transfer FunctionM A X 1334/M A X 1335CODE 10= the decimal equivalent of the digital outputcode (see Tables 1 and 2).±0.5 x LSB represents the quantization error that is inherent to any ADC.When using a 4.096V reference, 1 LSB equals 4.0mV.When using a 2.5V reference, 1 LSB equals 2.44mV.Applications InformationExternal ReferenceThe MAX1334/MAX1335 use an external reference between 1V and (AV DD + 50mV). Bypass REF with a 1µF capacitor in parallel with a 0.1µF capacitor to AGND for best performance (see the Typical Operating Circuit ).Connection to Standard InterfacesThe MAX1334/MAX1335 serial interface is fully compat-ible with SPI, QSPI, and MICROWIRE (see Figure 11). If a serial interface is available, set the µC’s serial inter-face in master mode so the µC generates the serial clock. Choose a clock frequency based on the AV DD and DV DD amplitudes.SPI and MICROWIREWhen using SPI or MICROWIRE, the MAX1334/MAX1335 are compatible with all four modes pro-grammed with the CPHA and CPOL bits in the SPI or MICROWIRE control register. (This control register is in the bus master, not the MAX1334/MAX1335.)Conversion begins with a CNVST falling edge. DOUT goes low, indicating a conversion is in progress. Two consecutive 1-byte reads are required to get the full 10bits from the ADC. DOUT transitions on SCLK rising edges and is guaranteed to be valid t DOT later and remain valid until t DHOLD after the following SCLK rising edge. When using CPOL = 0 and CPHA = 0 or CPOL =1 and CPHA = 1, the data is clocked into the µC on the4.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCsTable 1. Unipolar Code Table (MAX1334)following or next SCLK rising edge. When using CPOL = 0 and CPHA = 1 or CPOL = 1 and CPHA = 0, the data is clocked into the µC on the next falling edge. See Figure 11 for connections and Figures 12 and 13 for timing. See the Timing Characteristics table to deter-mine the best mode to use.QSPI Unlike SPI, which requires two 1-byte reads to acquire the 10 bits of data from the ADC, QSPI allows acquiring the conversion data with a single 16-bit transfer. The MAX1334/MAX1335 require 16 clock cycles from the µC to clock out the 10 bits of data. Figure 14 shows a trans-fer using CPOL = 1 and CPHA = 1. The conversion result contains three zeros, followed by the 10 data bits and three trailing zeros with the data in MSB-first format.DSP Interface to the TMS320C54_ The MAX1334/MAX1335 can be directly connected to the TMS320C54_ family of DSPs from Texas Instruments. Set the DSP to generate its own clocks or use external clock signals. Use either the standard or buffered serial port. Figure 15 shows the simplest inter-face between the MAX1334/MAX1335 and the TMS320C54_, where the transmit serial clock (CLKX) drives the receive serial clock (CLKR) and SCLK, and the transmit frame sync (FSX) drives the receive frame sync (FSR) and CNVST.For continuous conversion, set the serial port to trans-mit a clock and pulse the frame sync signal for a clock period before data transmission. Use the serial portconfiguration (SPC) register to set up with internal frame sync (TXM = 1), CLKX driven by an on-chip clock source (MCM = 1), burst mode (FSM = 1), and 16-bit word length (FO = 0).This setup allows continuous conversions provided that the data-transmit register (DXR) and the data-receive register (DRR) are serviced before the next conversion. Alternately, autobuffering can be enabled when using the buffered serial port to execute conversions and read the data without µC intervention. Connect DV DD to the TMS320C54_ supply voltage. The word length can be set to 8 bits with FO = 1 to implement the power-down modes. The CNVST pin must idle high to remain in either power-down state.Another method of connecting the MAX1334/MAX1335 to the TMS320C54_ is to generate the clock signals external to either device. This connection is shown in Figure 16 where serial clock (CLOCK) drives the receive serial clock (CLKR) and SCLK, and the convert signal (CONVERT) drives the receive frame sync (FSR) and CNVST.The serial port must be set up to accept an external receive clock and external receive frame sync. Writethe serial port configuration (SPC) register as follows:TXM = 0, external frame syncMCM = 0, CLKX is taken from the CLKX pinFSM = 1, burst modeFO = 0, data transmitted/received as 16-bit wordsThis setup allows continuous conversion provided thatthe data-receive register (DRR) is serviced before thenext conversion. Alternately, autobuffering can be enabled when using the buffered serial port to read thedata without µC intervention. Connect DV DD to theTMS320C54_ supply voltage.MAX1334/MAX13354.5Msps/4Msps, 5V/3V, 2-Channel,True-Differential, 10-Bit ADCsFigure11. Common Serial-Interface Connections to theMAX1334/MAX1335M A X 1334/M A X 13354.5Msps/4Msps, 5V/3V , 2-Channel,True-Differential, 10-Bit ADCsFigure 14. QSPI Serial-Interface TimingFigure 15. Interfacing to the TMS320C54_ Internal Clocks Figure 16. Interfacing to the TMS320C54_ External ClocksFigure 12. SPI/MICROWIRE Serial-Interface Timing—Single ConversionFigure 13. SPI/MICROWIRE Serial-Interface Timing—Continuous ConversionThe MAX1334/MAX1335 can also be connected to the TMS320C54_ by using the data-transmit (DX) pin to drive CNVST and the transmit clock (CLKX) generated internally to drive SCLK. A pullup resistor is required on the CNVST signal to keep it high when DX goes high impedance and write (0001)h to the data-transmit reg-ister (DXR) continuously for continuous conversions. The power-down modes can be entered by writing (00FF)h to the DXR (see Figures 17 and 18).DSP Interface to the ADSP21_ _ _ The MAX1334/MAX1335 can be directly connected to the ADSP21_ _ _ family of DSPs from Analog Devices. Figure 19 shows the direct connection of the MAX1334/MAX1335 to the ADSP21_ _ _. There are two modes of operation that can be programmed to inter-face with the MAX1334/MAX1335. For continuous con-versions, idle CNVST low and pulse it high for one clock cycle during the LSB of the previous transmitted word. Configure the ADSP21_ _ _ STCTL and SRCTL registers for early framing (LAFR = 0) and for an active-high frame (LTFS = 0, LRFS = 0) signal. In this mode, the data-independent frame-sync bit (DITFS = 1) can be selected to eliminate the need for writing to the transmit data register more than once. For single con-versions, idle CNVST high and pulse it low for the entire conversion. Configure the ADSP21_ _ _ STCTL and SRCTL registers for late framing (LAFR = 1) and for anactive-low frame (LTFS = 1, LRFS = 1) signal. This isalso the best way to enter the power-down modes by setting the word length to 8 bits (SLEN = 0111). Connect the DV DD pin to the ADSP21_ _ _ supply volt-age (see Figures 17 and 18).Layout, Grounding, and BypassingFor best performance, use PC boards. Wire-wrap boards must not be used. Board layout must ensurethat digital and analog signal lines are separated fromeach other. Do not run analog and digital (especially clock) lines parallel to one another, or digital lines underneath the ADC package.Figure 20 shows the recommended system ground connections. Establish an analog ground point at AGND and a digital ground point at DGND. Connect allother analog grounds to the analog ground point. Connect all digital grounds to the digital ground point.For lowest noise operation, make the power-supply returns as low impedance and as short as possible. Connect the analog ground point to the digital groundMAX1334/MAX13354.5Msps/4Msps, 5V/3V, 2-Channel,True-Differential, 10-Bit ADCsFigure 17. DSP Interface—Continuous ConversionFigure 18. DSP Interface—Single Conversion—Continuous/Burst Clock。

MAX4173FEUT-T中文资料

Operating Temperature Range .......................... -40°C to +85°C Storage Temperature Range ............................ -65°C to +150°C Lead Temperature (soldering, 10s) ................................ +300°C
Ordering Information
PIN-PACKAGE 6 SOT23-6 8 SO 6 SOT23-6 8 SO 6 SOT23-6 8 SO
SOT TOP MARK AABN — AABO — AABP —
________________________________________________________________ Maxim Integrated Products 1
The MAX4173 operates from a single +3V to +28V supply, typically draws only 420µA of supply current over the extended operating temperature range (-40°C to +85°C), and is offered in the space-saving SOT23-6 package.
VSENSE = +100mV, VCC = +12V, VRS+ = +12V, TA = +25°C
VSENSE = +100mV, VCC = +28V, VRS+ = +28V VSENSE = +100mV, VCC = +12V, VRS+ = +0.1V

MAX3232EEUE+T中文资料

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim's website at .General DescriptionThe MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E +3.0V-powered EIA/TIA-232 and V.28/V.24communications interface devices feature low power con-sumption, high data-rate capabilities, and enhanced electrostatic-discharge (ESD) protection. The enhanced ESD structure protects all transmitter outputs and receiver inputs to ±15kV using IEC 1000-4-2 Air-G ap Discharge, ±8kV using IEC 1000-4-2 Contact Discharge (±9kV for MAX3246E), and ±15kV using the Human Body Model. The logic and receiver I/O pins of the MAX3237E are protected to the above standards, while the transmit-ter output pins are protected to ±15kV using the Human Body Model.A proprietary low-dropout transmitter output stage delivers true RS-232 performance from a +3.0V to +5.5V power supply, using an internal dual charge pump. The charge pump requires only four small 0.1µF capacitors for opera-tion from a +3.3V supply. Each device guarantees opera-tion at data rates of 250kbps while maintaining RS-232output levels. The MAX3237E guarantees operation at 250kbps in the normal operating mode and 1Mbps in the MegaBaud™ operating mode, while maintaining RS-232-compliant output levels.The MAX3222E/MAX3232E have two receivers and two transmitters. The MAX3222E features a 1µA shutdown mode that reduces power consumption in battery-pow-ered portable systems. The MAX3222E receivers remain active in shutdown mode, allowing monitoring of external devices while consuming only 1µA of supply current. The MAX3222E and MAX3232E are pin, package, and func-tionally compatible with the industry-standard MAX242and MAX232, respectively.The MAX3241E/MAX3246E are complete serial ports (three drivers/five receivers) designed for notebook and subnotebook computers. The MAX3237E (five drivers/three receivers) is ideal for peripheral applications that require fast data transfer. These devices feature a shut-down mode in which all receivers remain active, while consuming only 1µA (MAX3241E/MAX3246E) or 10nA (MAX3237E).The MAX3222E, MAX3232E, and MAX3241E are avail-able in space-saving SO, SSOP, TQFN and TSSOP pack-ages. The MAX3237E is offered in an SSOP package.The MAX3246E is offered in the ultra-small 6 x 6 UCSP™package.ApplicationsBattery-Powered Equipment PrintersCell PhonesSmart Phones Cell-Phone Data Cables xDSL ModemsNotebook, Subnotebook,and Palmtop ComputersNext-Generation Device Features♦For Space-Constrained ApplicationsMAX3228E/MAX3229E: ±15kV ESD-Protected, +2.5V to +5.5V, RS-232 Transceivers in UCSP ♦For Low-Voltage or Data Cable ApplicationsMAX3380E/MAX3381E: +2.35V to +5.5V, 1µA, 2Tx/2Rx, RS-232 Transceivers with ±15kV ESD-Protected I/O and Logic PinsMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246E±15kV ESD-Protected, Down to 10nA, 3.0V to 5.5V ,Up to 1Mbps, True RS-232 Transceivers________________________________________________________________Maxim Integrated Products 119-1298; Rev 11; 10/07Ordering Information continued at end of data sheet.*Dice are tested at T A = +25°C, DC parameters only.**EP = Exposed paddle.Pin Configurations, Selector Guide, and Typical Operating Circuits appear at end of data sheet.MegaBaud and UCSP are trademarks of Maxim Integrated Products, Inc.†Covered by U.S. Patent numbers 4,636,930; 4,679,134;4,777,577; 4,797,899; 4,809,152; 4,897,774; 4,999,761; and other patents pending.M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 TransceiversABSOLUTE MAXIMUM RATINGSELECTRICAL CHARACTERISTICS(V CC = +3V to +5.5V, C1–C4 = 0.1µF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Notes 3, 4)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.V CC to GND..............................................................-0.3V to +6V V+ to GND (Note 1)..................................................-0.3V to +7V V- to GND (Note 1)...................................................+0.3V to -7V V+ + |V-| (Note 1).................................................................+13V Input Voltages T_IN, EN , SHDN , MBAUD to GND ........................-0.3V to +6V R_IN to GND.....................................................................±25V Output Voltages T_OUT to GND...............................................................±13.2V R_OUT, R_OUTB (MAX3241E)................-0.3V to (V CC + 0.3V)Short-Circuit Duration, T_OUT to GND.......................Continuous Continuous Power Dissipation (T A = +70°C)16-Pin SSOP (derate 7.14mW/°C above +70°C)..........571mW 16-Pin TSSOP (derate 9.4mW/°C above +70°C).......754.7mW 16-Pin TQFN (derate 20.8mW/°C above +70°C).....1666.7mW 16-Pin Wide SO (derate 9.52mW/°C above +70°C).....762mW 18-Pin Wide SO (derate 9.52mW/°C above +70°C).....762mW 18-Pin PDIP (derate 11.11mW/°C above +70°C)..........889mW 20-Pin TQFN (derate 21.3mW/°C above +70°C)........1702mW 20-Pin TSSOP (derate 10.9mW/°C above +70°C)........879mW 20-Pin SSOP (derate 8.00mW/°C above +70°C)..........640mW 28-Pin SSOP (derate 9.52mW/°C above +70°C)..........762mW 28-Pin Wide SO (derate 12.50mW/°C above +70°C).............1W 28-Pin TSSOP (derate 12.8mW/°C above +70°C)......1026mW 32-Lead Thin QFN (derate 33.3mW/°C above +70°C)..2666mW 6 x 6 UCSP (derate 12.6mW/°C above +70°C).............1010mW Operating Temperature Ranges MAX32_ _EC_ _...................................................0°C to +70°C MAX32_ _EE_ _.................................................-40°C to +85°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C Bump Reflow Temperature (Note 2)Infrared, 15s..................................................................+200°C Vapor Phase, 20s..........................................................+215°C Note 1:V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.Note 2:This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the devicecan be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recom-mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.Preheating is required. Hand or wave soldering is not allowed.MAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers_______________________________________________________________________________________3M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers4_______________________________________________________________________________________TIMING CHARACTERISTICS—MAX3237E(V CC = +3V to +5.5V, C1–C4 = 0.1µF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) (Note 3)±10%. MAX3237E: C1–C4 = 0.1µF tested at +3.3V ±5%, C1–C4 = 0.22µF tested at +3.3V ±10%; C1 = 0.047µF, C2, C3, C4 =0.33µF tested at +5.0V ±10%. MAX3246E; C1-C4 = 0.22µF tested at +3.3V ±10%; C1 = 0.22µF, C2, C3, C4 = 0.54µF tested at 5.0V ±10%.Note 4:MAX3246E devices are production tested at +25°C. All limits are guaranteed by design over the operating temperature range.Note 5:The MAX3237E logic inputs have an active positive feedback resistor. The input current goes to zero when the inputs are atthe supply rails.Note 6:MAX3241EEUI is specified at T A = +25°C.Note 7:Transmitter skew is measured at the transmitter zero crosspoints.TIMING CHARACTERISTICS—MAX3222E/MAX3232E/MAX3241E/MAX3246EMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers_______________________________________________________________________________________5-6-4-202460MAX3237ETRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE (MBAUD = GND)LOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V )10001500500200025003000531-1-3-5-6-2-42046-5-31-135010001500500200025003000LOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V )MAX3237ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCE-7.5-5.0-2.502.55.07.5MAX3237ETRANSMITTER OUTPUT VOLTAGE vs. LOAD CAPACITANCE (MBAUD = V CC )LOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V )500100015002000__________________________________________Typical Operating Characteristics(V CC = +3.3V, 250kbps data rate, 0.1µF capacitors, all transmitters loaded with 3k Ωand C L , T A = +25°C, unless otherwise noted.)-6-5-4-3-2-10123456010002000300040005000MAX3241ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V)302010405060020001000300040005000MAX3241EOPERATING SUPPLY CURRENT vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S U P P L Y C U R R E N T (m A )04286121014010002000300040005000MAX3241ESLEW RATE vs. LOAD CAPACITANCEM A X 3237E t o c 05LOAD CAPACITANCE (pF)S L E W R A T E (V /μs )-6-5-4-3-2-10123456010002000300040005000MAX3222E/MAX3232ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P UT V O L T A G E (V )624108141216010002000300040005000MAX3222E/MAX3232ESLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L E W R A T E (V /μs)2520155103530404520001000300040005000MAX3222E/MAX3232E OPERATING SUPPLY CURRENT vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S U P P L Y C U R R E N T (m A )M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers6_______________________________________________________________________________________Typical Operating Characteristics (continued)(V CC = +3.3V, 250kbps data rate, 0.1µF capacitors, all transmitters loaded with 3k Ωand C L , T A = +25°C, unless otherwise noted.)20604080100MAX3237ETRANSMITTER SKEW vs. LOAD CAPACITANCE(MBAUD = V CC )LOAD CAPACITANCE (pF)100015005002000T R A N S M I T T E R S K E W (n s )-6-2-42046-3-51-1352.03.03.52.54.04.55.0SUPPLY VOLTAGE (V)T R A N S M I T T E R O U T P U T V O L T A G E (V )MAX3237ETRANSMITTER OUTPUT VOLTAGE vs. SUPPLY VOLTAGE (MBAUD = GND)10203040502.0MAX3237E SUPPLY CURRENT vs. SUPPLY VOLTAGE (MBAUD = GND)SUPPLY VOLTAGE (V)S U P P L Y C U R R E N T (m A )3.03.52.54.04.55.0MAX3246ETRANSMITTER OUTPUT VOLTAGEvs. LOAD CAPACITANCELOAD CAPACITANCE (pF)T R A N S M I T T E R O U T P U T V O L T A G E (V )4000300010002000-5-4-3-2-101234567-65000468101214160MAX3246ESLEW RATE vs. LOAD CAPACITANCELOAD CAPACITANCE (pF)S L EW R A T E (V /μs )200030001000400050001020304050600MAX3246EOPERATING SUPPLY CURRENT vs. LOAD CAPACITANCEM A X 3237E t o c 17LOAD CAPACITANCE (pF)S U P P L Y C U R R EN T (m A )1000200030004000500055453525155024681012MAX3237ESLEW RATE vs. LOAD CAPACITANCE(MBAUD = GND)LOAD CAPACITANCE (pF)S L E W R A T E (V /μs )10001500500200025003000010203050406070MAX3237ESLEW RATE vs. LOAD CAPACITANCE(MBAUD = V CC )LOAD CAPACITANCE (pF)S L E W R A T E (V /μs )5001000150020001020304050MAX3237ESUPPLY CURRENT vs. LOAD CAPACITANCE WHEN TRANSMITTING DATA (MBAUD = GND)LOAD CAPACITANCE (pF)S U P P L Y C U R R E N T (m A )10001500500200025003000MAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers_______________________________________________________________________________________7Pin DescriptionM A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers8_______________________________________________________________________________________MAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers_______________________________________________________________________________________9Detailed DescriptionDual Charge-Pump Voltage ConverterThe MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246Es’ internal power supply consists of a regu-lated dual charge pump that provides output voltages of +5.5V (doubling charge pump) and -5.5V (inverting charge pump) over the +3.0V to +5.5V V CC range. The charge pump operates in discontinuous mode; if the output voltages are less than 5.5V, the charge pump is enabled, and if the output voltages exceed 5.5V, the charge pump is disabled. Each charge pump requires a flying capacitor (C1, C2) and a reservoir capacitor (C3, C4) to generate the V+ and V- supplies (Figure 1).RS-232 TransmittersThe transmitters are inverting level translators that con-vert TTL/CMOS-logic levels to ±5V EIA/TIA-232-compli-ant levels.The MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E transmitters guarantee a 250kbps data rate with worst-case loads of 3k Ωin parallel with 1000pF,providing compatibility with PC-to-PC communication software (such as LapLink™). Transmitters can be par-alleled to drive multiple receivers or mice.The MAX3222E/MAX3237E/MAX3241E/MAX3246E transmitters are disabled and the outputs are forcedinto a high-impedance state when the device is in shut-down mode (SHDN = G ND). The MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E permit the outputs to be driven up to ±12V in shutdown.The MAX3222E/MAX3232E/MAX3241E/MAX3246E transmitter inputs do not have pullup resistors. Connect unused inputs to GND or V CC . The MAX3237E’s trans-mitter inputs have a 400k Ωactive positive-feedback resistor, allowing unused inputs to be left unconnected.MAX3237E MegaBaud OperationFor higher-speed serial communications, the MAX3237E features MegaBaud operation. In MegaBaud operating mode (MBAUD = V CC ), the MAX3237E transmitters guarantee a 1Mbps data rate with worst-case loads of 3k Ωin parallel with 250pF for +3.0V < V CC < +4.5V. For +5V ±10% operation, the MAX3237E transmitters guarantee a 1Mbps data rate into worst-case loads of 3k Ωin parallel with 1000pF.RS-232 ReceiversThe receivers convert RS-232 signals to CMOS-logic output levels. The MAX3222E/MAX3237E/MAX3241E/MAX3246E receivers have inverting three-state outputs.Drive EN high to place the receiver(s) into a high-impedance state. Receivers can be either active or inactive in shutdown (Table 1).Figure 1. Slew-Rate Test CircuitsLapLink is a trademark of Traveling Software.M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers10______________________________________________________________________________________The complementary outputs on the MAX3237E/MAX3241E (R_OUTB) are always active, regardless of the state of EN or SHDN . This allows the device to be used for ring indicator applications without forward biasing other devices connected to the receiver outputs. This is ideal for systems where V CC drops to zero in shutdown to accommodate peripherals such as UARTs (Figure 2).MAX3222E/MAX3237E/MAX3241E/MAX3246E Shutdown ModeSupply current falls to less than 1µA in shutdown mode (SHDN = low). The MAX3237E’s supply current falls to10nA (typ) when all receiver inputs are in the invalid range (-0.3V < R_IN < +0.3). When shut down, the device’s charge pumps are shut off, V+ is pulled down to V CC , V- is pulled to ground, and the transmitter out-puts are disabled (high impedance). The time required to recover from shutdown is typically 100µs, as shown in Figure 3. Connect SHDN to V CC if shutdown mode is not used. SHDN has no effect on R_OUT or R_OUTB (MAX3237E/MAX3241E).±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structures are incorporated to protect against electrostatic dis-charges encountered during handling and assembly.The driver outputs and receiver inputs of the MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E have extra protection against static electricity. Maxim’s engineers have developed state-of-the-art structures to protect these pins against ESD of ±15kV without damage.The ESD structures withstand high ESD in all states:normal operation, shutdown, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing RS-232 products can latch and must be powered down to remove latchup.Furthermore, the MAX3237E logic I/O pins also have ±15kV ESD protection. Protecting the logic I/O pins to ±15kV makes the MAX3237E ideal for data cable applications.SHDN T2OUTT1OUT5V/div2V/divV CC = 3.3V C1–C4 = 0.1μFFigure 3. Transmitter Outputs Recovering from Shutdown or Powering UpMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 TransceiversESD protection can be tested in various ways; the transmitter outputs and receiver inputs for the MAX3222E/MAX3232E/MAX3241E/MAX3246E are characterized for protection to the following limits:•±15kV using the Human Body Model•±8kV using the Contact Discharge method specified in IEC 1000-4-2•±9kV (MAX3246E only) using the Contact Discharge method specified in IEC 1000-4-2•±15kV using the Air-G ap Discharge method speci-fied in IEC 1000-4-2Figure 4a. Human Body ESD Test ModelFigure 4b. Human Body Model Current WaveformFigure 5a. IEC 1000-4-2 ESD Test Model Figure 5b. IEC 1000-4-2 ESD Generator Current WaveformM A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceiverscharacterized for protection to ±15kV per the Human Body Model.ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body ModelFigure 4a shows the Human Body Model, and Figure 4b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest,which is then discharged into the test device through a 1.5k Ωresistor.IEC 1000-4-2The IEC 1000-4-2 standard covers ESD testing and performance of finished equipment; it does not specifi-cally refer to integrated circuits. The MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E help you design equipment that meets level 4 (the highest level)of IEC 1000-4-2, without the need for additional ESD-protection components.The major difference between tests done using the Human Body Model and IEC 1000-4-2 is higher peak current in IEC 1000-4-2, because series resistance is lower in the IEC 1000-4-2 model. Hence, the ESD with-stand voltage measured to IEC 1000-4-2 is generally lower than that measured using the Human Body Model. Figure 5a shows the IEC 1000-4-2 model, and Figure 5b shows the current waveform for the ±8kV IEC 1000-4-2 level 4 ESD Contact Discharge test. The Air-G ap Discharge test involves approaching the device with a charged probe. The Contact Discharge method connects the probe to the device before the probe is energized.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. All pins require this protection during manufacturing, not just RS-232 inputs and outputs.Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports.Table 2. Required Minimum Capacitor ValuesFigure 6a. MAX3241E Transmitter Output Voltage vs. Load Current Per TransmitterTable 3. Logic-Family Compatibility with Various Supply VoltagesMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 TransceiversApplications InformationCapacitor SelectionThe capacitor type used for C1–C4 is not critical for proper operation; polarized or nonpolarized capacitors can be used. The charge pump requires 0.1µF capaci-tors for 3.3V operation. For other supply voltages, see Table 2 for required capacitor values. Do not use val-ues smaller than those listed in Table 2. Increasing the capacitor values (e.g., by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without changing C1’s value. However, do not increase C1without also increasing the values of C2, C3, C4,and C BYPASS to maintain the proper ratios (C1 to the other capacitors).When using the minimum required capacitor values,make sure the capacitor value does not degradeexcessively with temperature. If in doubt, use capaci-tors with a larger nominal value. The capacitor’s equiv-alent series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+and V-.Power-Supply DecouplingIn most circumstances, a 0.1µF V CC bypass capacitor is adequate. In applications sensitive to power-supply noise, use a capacitor of the same value as charge-pump capacitor C1. Connect bypass capacitors as close to the IC as possible.Operation Down to 2.7VTransmitter outputs meet EIA/TIA-562 levels of ±3.7V with supply voltages as low as 2.7V.Figure 6b. Mouse Driver Test CircuitM A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 TransceiversFigure 7. Loopback Test CircuitT1IN T1OUTR1OUT5V/div5V/div5V/divV CC = 3.3V C1–C4 = 0.1μFFigure 8. MAX3241E Loopback Test Result at 120kbps T1INT1OUTR1OUT5V/div5V/div5V/divV CC = 3.3V, C1–C4 = 0.1μFFigure 9. MAX3241E Loopback Test Result at 250kbps+5V 0+5V 0-5V +5VT_INT_OUT5k Ω + 250pFR_OUTV CC = 3.3V C1–C4 = 0.1μFFigure 10. MAX3237E Loopback Test Result at 1000kbps (MBAUD = V CC )Transmitter Outputs Recoveringfrom ShutdownFigure 3 shows two transmitter outputs recovering from shutdown mode. As they become active, the two trans-mitter outputs are shown going to opposite RS-232 levels (one transmitter input is high; the other is low). Each transmitter is loaded with 3k Ωin parallel with 2500pF.The transmitter outputs display no ringing or undesir-able transients as they come out of shutdown. Note thatthe transmitters are enabled only when the magnitude of V- exceeds approximately -3.0V.Mouse DrivabilityThe MAX3241E is designed to power serial mice while operating from low-voltage power supplies. It has been tested with leading mouse brands from manu-facturers such as Microsoft and Logitech. The MAX3241E successfully drove all serial mice tested and met their current and voltage requirements.MAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 TransceiversFigure 6a shows the transmitter output voltages under increasing load current at +3.0V. Figure 6b shows a typical mouse connection using the MAX3241E.High Data RatesThe MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E maintain the RS-232 ±5V minimum transmit-ter output voltage even at high data rates. Figure 7shows a transmitter loopback test circuit. Figure 8shows a loopback test result at 120kbps, and Figure 9shows the same test at 250kbps. For Figure 8, all trans-mitters were driven simultaneously at 120kbps into RS-232 loads in parallel with 1000pF. For Figure 9, a single transmitter was driven at 250kbps, and all transmitters were loaded with an RS-232 receiver in parallel with 1000pF.The MAX3237E maintains the RS-232 ±5.0V minimum transmitter output voltage at data rates up to 1Mbps.Figure 10 shows a loopback test result at 1Mbps with MBAUD = V CC . For Figure 10, all transmitters were loaded with an RS-232 receiver in parallel with 250pF.Interconnection with 3V and 5V LogicThe MAX3222E/MAX3232E/MAX3237E/MAX3241E/MAX3246E can directly interface with various 5V logic families, including ACT and HCT CMOS. See Table 3for more information on possible combinations of inter-connections.UCSP ReliabilityThe UCSP represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and usage environ-ment. The user should closely review these areas when considering use of a UCSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as the wafer-fabrication process primarily determines it.Mechanical stress performance is a greater considera-tion for a UCSP package. UCSPs are attached through direct solder contact to the user’s PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be consid-ered. Table 4 shows the testing done to characterize the UCSP reliability performance. In conclusion, the UCSP is capable of performing reliably through envi-ronmental stresses as indicated by the results in the table. Additional usage data and recommendations are detailed in the UCSP application note, which can be found on Maxim’s website at .Table 4. Reliability Test DataM A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers__________________________________________________________Pin ConfigurationsMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 TransceiversPin Configurations (continued)M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers__________________________________________________Typical Operating CircuitsMAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers_____________________________________Typical Operating Circuits (continued)M A X 3222E /M A X 3232E /M A X 3237E /M A X 3241E †/M A X 3246EUp to 1Mbps, True RS-232 Transceivers_____________________________________Typical Operating Circuits (continued)MAX3222E/MAX3232E/MAX3237E/MAX3241E †/MAX3246EUp to 1Mbps, True RS-232 Transceivers______________________________________________________________________________________21Selector Guide___________________Chip InformationTRANSISTOR COUNT:MAX3222E/MAX3232E: 1129MAX3237E: 2110MAX3241E: 1335MAX3246E: 842PROCESS: BICMOSOrdering Information (continued)†Requires solder temperature profile described in the AbsoluteMaximum Ratings section. UCSP Reliability is integrally linked to the user’s assembly methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this datasheet for more information.**EP = Exposed paddle.。

MAX3000中文资料

General DescriptionThe MAX3000E/MAX3001E/MAX3002–MAX3012 8-channel level translators provide the level shifting neces-sary to allow data transfer in a multivoltage system.Externally applied voltages, V CC and V L , set the logic lev-els on either side of the device. Logic signals present on the V L side of the device appear as a higher voltage logic signal on the V CC side of the device, and vice-versa.The MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012feature an EN input that, when low, reduces the V CC and V L supply currents to <2µA. The MAX3000E/MAX3001E also have ±15kV ESD protection on the I/O V CC side for greater protection in applications that route signals externally. The MAX3000E operates at a guaranteed data rate of 230kbps. The MAX3001E operates at a guaranteed data rate of 4Mbps. The MAX3002–MAX3012 operate at a guaranteed data rate of 20Mbps over the entire specified operating voltage range.The MAX3000E/MAX3001E/MAX3002–MAX3012 accept V L voltages from +1.2V to +5.5V and V CC voltages from +1.65V to +5.5V, making them ideal for data transfer between low-voltage ASICs/PLDs and higher voltage systems. The MAX3000E/MAX3001E/MAX3002–MAX3012 are available in 20-pin UCSP™ and 20-pin TSSOP packages.ApplicationsCellphonesSPI™ and MICROWIRE™ Level Translation Low-Voltage ASIC Level Translation Smart Card Readers Cellphone Cradles Portable POS SystemsPortable Communication Devices Low-Cost Serial Interfaces GPSTelecommunications EquipmentFeatureso Guaranteed Data Rate Options230kbps (MAX3000E)4Mbps (MAX3001E)20Mbps (MAX3002–MAX3012)o Bidirectional Level Translation(MAX3000E/MAX3001E/MAX3002/MAX3003)o Unidirectional Level Translation (MAX3004–MAX3012)o Operation Down to +1.2V on V Lo ±15kV ESD Protection on I/O V CC Lines (MAX3000E/MAX3001E)o Ultra-Low 0.1µA Supply Current in Shutdown o Low Quiescent Current (<10µA)o UCSP and TSSOP PackagesMAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators________________________________________________________________Maxim Integrated Products1Ordering InformationTypical Operating Circuit19-2672; Rev 1; 10/03For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .UCSP is a trademark of Maxim Integrated Products, Inc.SPI is a trademark of Motorola, Inc.MICROWIRE is a trademark of National Semiconductor.*Future product—contact factory for availability.Ordering Information continued at end of data sheet.Pin Configurations and Functional Diagrams appear at end of data sheet.M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 2_______________________________________________________________________________________ABSOLUTE MAXIMUM RATINGSStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.All Voltages Referenced to GNDV CC ...........................................................................-0.3V to +6V V L...........................................................................................-0.3V to +6V I/O V CC_......................................................-0.3V to (V CC + 0.3V)I/O V L_...........................................................-0.3V to (V L + 0.3V)EN, EN A/B...............................................................-0.3V to +6V Short-Circuit Duration I/O V L_, I/O V CC_to GND .......Continuous Continuous Power Dissipation (T A = +70°C)20-Pin TSSOP (derate 7.0mW/°C above +70°C).........559mW 20-Pin UCSP (derate 10mW/°C above +70°C)............800mWOperating Temperature RangesMAX3001EAUP .............................................-40°C to +125°C MAX300_EE_P.................................................-40°C to +85°C MAX30_ _E_P ..................................................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°CELECTRICAL CHARACTERISTICSMAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators_______________________________________________________________________________________3ELECTRICAL CHARACTERISTICS (continued)(V CC = +1.65V to +5.5V, V L = +1.2V to V CC , EN = V L (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V L or 0(MAX3003), T= T to T . Typical values are at V = +1.65V, V = +1.2V, and T = +25°C.) (Notes 1, 2)M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 4_______________________________________________________________________________________TIMING CHARACTERISTICSNote 2:For normal operation, ensure that V L < (V CC + 0.3V). During power-up, V L > (V CC + 0.3V) does not damage the device.MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators_______________________________________________________________________________________5TIMING CHARACTERISTICS (continued)(V CC = +1.65V to +5.5V, V L = +1.2V to V CC , EN = V L (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = V L or 0(MAX3003), T= T to T . Typical values are at V = +1.65V, V = +1.2V, and T = +25°C.) (Notes 1, 2)Note 3:V CC from device 1 must equal V CC of device 2; V L from device 1 must equal V L of device 2.M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 6_______________________________________________________________________________________TIMING CHARACTERISTICS —MAX3002–MAX3012MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators_______________________________________________________________________________________7Typical Operating Characteristics(T A = +25°C, unless otherwise noted.)2000150010005000-4010-15356085TEMPERATURE (°C)V L S U P P L Y C U R R E N T (µA )V L SUPPLY CURRENT vs. TEMPERATURE (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)0200060004000800010,0001.52.53.02.03.54.04.55.05.5SUPPLY VOLTAGE (V)V C C S U P P L Y C U R R E N T (µA )V CC SUPPLY CURRENT vs. SUPPLY VOLTAGE(DRIVING I/O V L , V L = 1.8V)01002003004005006001.52.52.03.03.54.04.55.05.5V L SUPPLY CURRENT vs. SUPPLY VOLTAGE(DRIVING I/O V L , V L = 1.8V)SUPPLY VOLTAGE (V)V L S U P P L Y C U R R E N T (µA )05001500100020002500-4010-15356085TEMPERATURE (°C)V C C S U P P L Y C U R R E N T (µA )V CC SUPPLY CURRENT vs. TEMPERATURE (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)020406080100104050203060708090100CAPACITIVE LOAD (pF)V L S U P P L Y C U R R E N T (µA )V L SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)02000100040003000600050007000103040205060708090100CAPACITIVE LOAD (pF)V C C S U P P L Y C U R R E N T (µA )V CC SUPPLY CURRENT vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )9080706050403020500100015002000010100MAX3000ERISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 8_______________________________________________________________________________________Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)0102030405060103020405060708090100CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )MAX3001ERISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)864201030204050CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )MAX3002–MAX3012RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)050010001500200010206080100CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )MAX3000ERISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)30405070900102030405060103020405060708090100CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )MAX3001ERISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)43211020152530CAPACITIVE LOAD (pF)R I S E /F A L L T I M E (n s )MAX3002–MAX3012RISE/FALL TIME vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)100200300400500104050203060708090100CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )MAX3000EPROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators_______________________________________________________________________________________9Typical Operating Characteristics (continued)(T A = +25°C, unless otherwise noted.)100200300400500600103020405060708090100CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )MAX3000EPROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)03961215CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )1030204050MAX3001EPROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)013245CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s)1020152530MAX3002–MAX3012PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V L (DRIVING I/O V CC , V CC = 3.3V, V L = 1.8V)1µsMAX3000E RAIL-TO-RAIL DRIVING (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V,CV CC = 50pF, DATA RATE = 230kbps)GNDI/O V L_1V/div GNDMAX3000E/01E/02-12 toc19I/O V CC_2V/div 40nsMAX3001E RAIL-TO-RAIL DRIVING (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V,CV CC = 50pF, DATA RATE = 4Mbps)GNDI/O V L_1V/div GNDMAX3000E/01E/02-12 toc20I/O V CC_2V/div 10nsMAX3002–MAX3012 RAIL-TO-RAIL DRIVING (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V,CV CC = 50pF, DATA RATE = 20Mbps)GNDI/O V L_1V/div GNDMAX3000E/01E/02-12 toc21I/O V CC_2V/div 0105201525301030204050CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )MAX3001EPROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)428610121020152530CAPACITIVE LOAD (pF)P R O P A G A T I O N D E L A Y (n s )MAX3002–MAX3012PROPAGATION DELAY vs. CAPACITIVE LOAD ON I/O V CC (DRIVING I/O V L , V CC = 3.3V, V L = 1.8V)M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 10______________________________________________________________________________________Pin DescriptionMAX3000E/MAX3001E/MAX3002MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level TranslatorsPin Description (continued)MAX3003M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators Pin Description (continued)MAX3004–MAX3012+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators______________________________________________Test Circuits/Timing DiagramsMAX3000E/MAX3001E/MAX3002–MAX3012Figure 1a. Driving I/O V L Figure 1b. Timing for Driving I/O V LFigure 2a. Driving I/O V CC Figure 2b. Timing for Driving I/O V CCM A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators _________________________________Test Circuits/Timing Diagrams (continued)Figure 3. Propagation Delay from I/O V L to I/O V CC After ENFigure 4. Propagation Delay from I/O V CC to I/O V L After EN+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA, 35Mbps, 8-Channel Level TranslatorsDetailed Description The MAX3000E/MAX3001E/MAX3002–MAX3012 logic-level translators provide the level shifting necessary toallow data transfer in a multivoltage system. Externallyapplied voltages, V CC and V L, set the logic levels oneither side of the device. Logic signals present on theV L side of the device appear as a higher voltage logicsignal on the V CC side of the device, and vice-versa.The MAX3000E/MAX3001E/MAX3002/MAX3003 arebidirectional level translators allowing data translationin either direction (V L↔V CC) on any single data line. The MAX3004–MAX3012 unidirectional level translatorslevel shift data in one direction (V L →V CC or V CC→V L) on any single data line. The MAX3000E/MAX3001E/MAX3002–MAX3012 accept V L from +1.2V to +5.5V. Alldevices have V CC ranging from +1.65V to +5.5V, mak-ing them ideal for data transfer between low-voltageASICs/PLDs and higher voltage systems.The MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012 feature an output enable mode that reducesV CC supply current to less than 2µA, and V L supplycurrent to less than 2µA when in shutdown. TheMAX3000E/MAX3001E have ±15kV ESD protection onthe V CC side for greater protection in applications thatroute signals externally. The MAX3000E operates at aguaranteed data rate of 230kbps; the MAX3001E oper-ates at a guaranteed data rate of 4Mbps and theMAX3002–MAX3012 are guaranteed with a data rate of20Mbps of operation over the entire specified operatingvoltage range.Level Translation For proper operation, ensure that +1.65V ≤V CC≤+5.5V, +1.2V ≤V L≤+5.5V, and V L≤V CC. During power-up sequencing, V L≥V CC does not damage the device. During power-supply sequencing, when V CC is floating and V L is powering up, up to 10mA current can be sourced to each load on the V L side, yet the device does not latch up.The maximum data rate also depends heavily on theload capacitance (see the Typical OperatingCharacteristics), output impedance of the driver, andthe operational voltage range (see the TimingCharacteristics).Input Driver Requirements The MAX3001E/MAX3002–MAX3012 architecture is based on a one-shot accelerator output stage. See Figure5. Accelerator output stages are always in three-state except when there is a transition on any of the translators on the input side, either I/O V L or I/O V CC. Then, a short pulse is generated during which the accel-erator output stages become active and charge/dis-charge the capacitances at the I/Os. Due to its bidirectional nature, both input stages become active during the one-shot pulse. This can lead to some current feeding into the external source that is driving the trans-lator. However, this behavior helps to speed up the tran-sition on the driven side.For proper operation, the driver has to meet the follow-ing conditions: 50Ωmaximum output impedance and20mA minimum output current (for 20Mbps versions),400Ωmaximum output impedance and 4mA minimum output current (for 4Mbps versions), 1kΩmaximum out-put impedance and 1mA minimum output current (for230kbps versions). Figure 6 shows a typical input cur-rent vs. input voltage.Enable Output Mode (EN, EN A/B)The MAX3000E/MAX3001E/MAX3002 and the MAX3004–MAX3012 feature an EN input, and the MAX3003 has anEN A/B input. Pull EN low to set the MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012s’ I/O V CC1 through I/O V CC8 in three-state output mode, while I/OV L1 through I/O V L8 have internal 6kΩpulldown resis-tors. Drive EN to logic high (V L) for normal operation. Forthe MAX3003, pull EN A/B low to place channels 1B through 4B in active mode, while channels 1A through4A are in three-state mode. Drive EN A/B to logic high(V L) to enable channels 1A through 4A, while channels1B through 4B remain in three-state mode.±15kV ESD ProtectionAs with all Maxim devices, ESD-protection structuresare incorporated on all pins to protect against electro-static discharges encountered during handling and assembly. The I/O V CC lines have extra protection against static discharge. Maxim’s engineers have developed state-of-the-art structures to protect thesepins against ESD of ±15kV without damage. The ESD structures withstand high ESD in all states: normal operation, three-state output mode, and powered down. After an ESD event, Maxim’s E versions keep working without latchup, whereas competing productscan latch and must be powered down to remove latchup.ESD protection can be tested in various ways. TheI/O V CC lines of the MAX3000E/MAX3001E are char-acterized for protection to ±15kV using the HumanBody Model.MAX3000E/MAX3001E/MAX3002–MAX3012M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators ESD Test ConditionsESD performance depends on a variety of conditions.Contact Maxim for a reliability report that documents test setup, test methodology, and test results.Human Body ModelFigure 7a shows the Human Body Model and Figure 7b shows the current waveform it generates when dis-charged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of inter-est, which is then discharged into the test device through a 1.5k Ωresistor.Machine ModelThe Machine Model for ESD tests all pins using a 200pF storage capacitor and zero discharge resis-tance. Its objective is to emulate the stress caused by contact that occurs with handling and assembly during manufacturing. Of course, all pins require this protec-tion during manufacturing, not just inputs and outputs.Therefore, after PC board assembly, the Machine Model is less relevant to I/O ports.Applications InformationPower-Supply DecouplingTo reduce ripple and the chance of transmitting incor-rect data, bypass V L and V CC to ground with a 0.1µF capacitor. To ensure full ±15kV ESD protection, bypass V CC to ground with a 1µF capacitor. Place all capaci-tors as close to the power-supply inputs as possible.I 2C Level TranslationFor I 2C level translation for I 2C applications, please refer to the MAX3372E –MAX3379E/MAX3390E –MAX3393E datasheet.Unidirectional vs. Bidirectional LevelTranslatorThe MAX3000E/MAX3001E/MAX3002/MAX3003 can also be used to translate signals without inversion.These devices provide the smallest solution (UCSP package) for unidirectional level translation without inversion.Figure 5. MAX3001E/MAX3002–MAX3012 Simplified Functional Diagram (1 I/O Line)MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level TranslatorsSelector Guide**See Table 1.Table 1. Data RateM A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level TranslatorsMAX3000E/MAX3001E/MAX3002 Functional DiagramMAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level TranslatorsMAX3003 Functional DiagramM A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level TranslatorsPin ConfigurationsMAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators______________________________________________________________________________________21Pin Configurations (continued)M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators 22______________________________________________________________________________________Pin Configurations (continued)Chip InformationTRANSISTOR COUNT: 1184PROCESS: BiCMOSOrdering Information (continued)*Future product—contact factory for availability.MAX3000E/MAX3001E/MAX3002–MAX3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators______________________________________________________________________________________23Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)M A X 3000E /M A X 3001E /M A X 3002–M A X 3012+1.2V to +5.5V , ±15kV ESD-Protected, 0.1µA,35Mbps, 8-Channel Level Translators Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.24____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600©2003 Maxim Integrated ProductsPrinted USAis a registered trademark of Maxim Integrated Products.Package Information (continued)(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,go to /packages .)。

MAX3301EETJ资料

General DescriptionThe MAX3301E fully integrated USB On-the-Go (OTG)transceiver and charge pump allows mobile devices such as PDAs, cellular phones, and digital cameras to interface directly with USB peripherals and each other without the need of a host PC. Use the MAX3301E with an embedded USB host to directly connect to peripher-als such as printers or external hard drives.The MAX3301E integrates a USB OTG transceiver, a V BUS charge pump, a linear regulator, and an I 2C™-compatible, 2-wire serial interface. An internal level shifter allows the MAX3301E to interface with logic sup-ply voltages from +1.65V to +3.6V. The MAX3301E’s OTG-compliant charge pump operates with +3V to +4.5V input supply voltages, and supplies an OTG-com-patible output on V BUS while sourcing more than 8mA of output current.The MAX3301E enables USB OTG communication from highly integrated digital devices that cannot supply or tol-erate the +5V V BUS levels that USB OTG requires. The device supports USB OTG session-request protocol (SRP) and host-negotiation protocol (HNP) by controlling and measuring V BUS using internal comparators.The MAX3301E provides built-in ±15kV electrostatic-discharge (ESD) protection for the V BUS , ID_IN, D+,and D- terminals. The MAX3301E is available in 5 x 5chip-scale (UCSP™) and 32-pin (5mm x 5mm x 0.8mm)thin QF N packages and operates over the extended -40°C to +85°C temperature range.ApplicationsMobile Phones PDAsDigital Cameras MP3 Players Photo PrintersFeatures♦USB 2.0-Compliant Full-/Low-Speed OTG Transceivers♦Ideal for USB On-the-Go, Embedded Host, or Peripheral Devices♦±15kV ESD Protection on ID_IN, V BUS , D+, and D-Terminals♦Charge Pumps for V BUS Signaling and Operation Down to 3V♦Internal V BUS and ID Comparators♦Internal Switchable Pullup and Pulldown Resistors for Host/Peripheral Functionality ♦I 2C Bus Interface with Command and Status Registers♦Linear Regulator Powers Internal Circuitry and D+/D- Pullup Resistors♦Supports Car Kit Interrupts and Audio-Mode Operation♦Supports SRP and HNP♦Low-Power Shutdown Mode♦Available in 32-Pin Thin QFN and 5 x 5 UCSP PackagesMAX3301EUSB On-the-Go Transceiver and Charge Pump________________________________________________________________Maxim Integrated Products 1Ordering Information19-3275; Rev 0; 5/04For pricing, delivery, and ordering information,please contact Maxim/Dallas Direct!at 1-888-629-4642, or visit Maxim’s website at .I 2C is a trademark of Philips Corp.Purchase of I 2C components from Maxim Integrated Products,Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I 2C Patent Rights to use these compo-nents in an I 2C system, provided that the system conforms to the I 2C Standard Specification as defined by Philips. UCSP is a trademark of Maxim Integrated Products, Inc.Typical Operating Circuit and Pin Configurations appear at end of data sheet.*EP = Exposed paddle.**Requires solder temperature profile described in the Absolute Maximum Ratings section. UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and environ-ment. See the UCSP Reliability Notice in the UCSP Applications Information section of this data sheet for more information.M A X 3301EUSB On-the-Go Transceiver and Charge PumpABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICS(V CC = +3V to +4.5V, V L = +1.65V to +3.6V, C FLYING = 100nF, C VBUS = 1µF, ESR CVBUS = 0.1Ω(max), T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +3.7V, V L = +2.5V, T A = +25°C.) (Note 2)Note 1:The UCSP package is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board-level solder attach and rework. This limit permits only the use of the solder profiles recom-mended in the industry-standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave soldering is not allowed.Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.All voltages are referenced to GND.V CC , V L .....................................................................-0.3V to +6V TRM (regulator off or supplied by V BUS )..-0.3V to (V BUS + 0.3V)TRM (regulator supplied by V CC )...............-0.3V to (V CC + 0.3V)D+, D- (transmitter tri-stated)...................................-0.3V to +6V D+, D- (transmitter functional)....................-0.3V to (V CC + 0.3V)V BUS .........................................................................-0.3V to +6V ID_IN, SCL, SDA.......................................................-0.3V to +6V INT , SPD, RESET , ADD, OE/INT , RCV, VP,VM, SUS, DAT_VP, SE0_VM ......................-0.3V to (V L + 0.3V)C+.............................................................-0.3V to (V BUS + 0.3V)C-................................................................-0.3V to (V CC + 0.3V)Short-Circuit Duration, V BUS to GND .........................ContinuousContinuous Power Dissipation (T A = +70°C)5 x 5 UCSP (derate 12.2mW/°C above +70°C)...........976mW 32-Pin Thin QFN (5mm x 5mm x 0.8mm) (derate 21.3mW/°C above +70°C).............................................................1702mW Operating Temperature Range ...........................-40°C to +85°C Junction Temperature......................................................+150°C Storage Temperature Range.............................-65°C to +150°C Lead Temperature (soldering, 10s).................................+300°C Bump Reflow Temperature (Note 1)Infrared (15s)...............................................................+200°C Vapor Phase (20s).......................................................+215°CMAX3301EUSB On-the-Go Transceiver and Charge Pump_______________________________________________________________________________________3DC ELECTRICAL CHARACTERISTICS (continued)(V CC = +3V to +4.5V, V L = +1.65V to +3.6V, C FLYING = 100nF, C VBUS = 1µF, ESR CVBUS = 0.1Ω(max), T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +3.7V, V L = +2.5V, T A = +25°C.) (Note 2)M A X 3301EUSB On-the-Go Transceiver and Charge Pump 4_______________________________________________________________________________________DC ELECTRICAL CHARACTERISTICS (continued)(V CC = +3V to +4.5V, V L = +1.65V to +3.6V, C FLYING = 100nF, C VBUS = 1µF, ESR CVBUS = 0.1Ω(max), T A = T MIN to T MAX , unless otherwise noted. Typical values are at V CC = +3.7V, V L = +2.5V, T A = +25°C.) (Note 2)MAX3301EUSB On-the-Go Transceiver and Charge Pump_______________________________________________________________________________________5TIMING CHARACTERISTICSM A X 3301EUSB On-the-Go Transceiver and Charge Pump 6_______________________________________________________________________________________I 2C-/SMBus™- COMPATIBLE TIMING SPECIFICATIONSNote 3:Guaranteed by bench characterization. Limits are not production tested.Note 4:A master device must provide a hold time of at least 300ns for the SDA signal to bridge the undefined region of SCL’s fallingedge.Note 5:C B is the total capacitance of one bus line in pF, tested with C B = 400pF.Note 6:Input filters on SDA, SCL, and ADD suppress noise spikes of less than 50ns.SMBus™ is a trademark of Intel Corporation.DRIVER PROPAGATION DELAY HIGH-TO-LOW(FULL-SPEED MODE)MAX3301E toc094ns/divD+1V/divD-1V/divDAT_VP 1V/divDRIVER PROPAGATION DELAY LOW-TO-HIGH(LOW-SPEED MODE)MAX3301E toc08100ns/divD-1V/divD+1V/div DAT_VP 1V/div DRIVER PROPAGATION DELAY HIGH-TO-LOW(LOW-SPEED MODE)MAX3301E toc07100ns/divD+1V/divD-1V/divDAT_VP 1V/div TIME TO EXIT SHUTDOWNMAX3301E toc054µs/div D-1V/divD+1V/divSCL 1V/divV BUS DURING SRP20ns/divV BUS 1V/divV BUS 1V/divC VBUS > 96µFC VBUS > 13µFTIME TO ENTER SHUTDOWNMAX3301E toc04100ns/div D+1V/div D-1V/div SCL 2V/div V BUS OUTPUT VOLTAGE vs. INPUT VOLTAGE (V CC )INPUT VOLTAGE (V CC ) (V)V B U S O U T P U T V O L T A G E (V )5.55.04.54.03.53.04.755.005.255.505.754.502.56.0V BUS OUTPUT VOLTAGE vs. VBUS OUTPUT CURRENTV BUS OUTPUT CURRENT (mA)V B U S O U T P U T V O L T A G E (V )2520151054.254.504.755.005.255.504.0030INPUT CURRENT (I CC)vs. V BUS OUTPUT CURRENTV BUS OUTPUT CURRENT (mA)I N P U T C U R R E N T (I C C ) (m A )16128410203040500020MAX3301EUSB On-the-Go Transceiver and Charge Pump_______________________________________________________________________________________7Typical Operating Characteristics(Typical operating circuit, V CC = +3.7V, V L = +2.5V, C FLYING = 100nF, T A = +25°C, unless otherwise noted.)SUPPLY CURRENT vs. TEMPERATURETEMPERATURE (°C)S U P P L Y C U R R E N T (m A )603510-150.20.40.60.81.00-4085DRIVER DISABLE DELAY (LOW-SPEED MODE)MAX3301E toc1410ns/divD+1V/divD-1V/divOE/INT 1V/divDRIVER ENABLE DELAY (LOW-SPEED MODE)100ns/divD-1V/divD+1V/div C D+ = C D- = 400pFOE/INT 1V/divDRIVER DISABLE DELAY (FULL-SPEED MODE)MAX3301E toc1210ns/divD+1V/divD-1V/div1V/divDRIVER ENABLE DELAY (FULL-SPEED MODE)MAX3301E toc1110ns/divD-1V/divD+1V/div OE/INT 1V/divDRIVER PROPAGATION DELAY LOW-TO-HIGH(FULL-SPEED MODE)MAX3301E toc104ns/divD-1V/divD+1V/divDAT_VP 1V/div M A X 3301EUSB On-the-Go Transceiver and Charge Pump 8_______________________________________________________________________________________Typical Operating Characteristics (continued)(Typical operating circuit, V CC = +3.7V, V L = +2.5V, C FLYING = 100nF, T A = +25°C, unless otherwise noted.)MAX3301EUSB On-the-Go Transceiver and Charge Pump_______________________________________________________________________________________9Pin DescriptionM A X 3301EUSB On-the-Go Transceiver and Charge Pump 10______________________________________________________________________________________Pin Description (continued)Test Circuits and Timing DiagramsFigure 1. Load for Disable Time MeasurementFigure 2. Load for Enable Time, Transmitter Propagation Delay,and Transmitter Rise/Fall Times Figure 3. Load for Receiver Propagation Delay and Receiver Rise/Fall TimesFigure 4. Load for DAT_VP, SE0_VM Enable/Disable Time MeasurementsMAX3301ETest Circuits and Timing Diagrams (continued)Figure 6. Timing of DAT_VP, SE0_VM to D+, D- in VP_VM Mode (dat_se0 = 0)Figure 7. Timing of DAT_VP, SE0_VM to D+/D- in DAT_SE0Mode (dat_se0 = 1)Figure 8. Enable and Disable TimingFigure 9. D+/D- to RCV, DAT_VP, SE0_VM Propagation Delays (VP_VM Mode)Figure 10. D+/D- to DAT_VP, SE0_VM Propagation Delays (DAT_SE0 Mode)M A X 3301EBlock DiagramFigure 11. Block DiagramMAX3301EDetailed DescriptionThe USB OTG specification defines a dual-role USB device that acts either as an A device or as a B device.The A device supplies power on V BUS and initially serves as the USB host. The B device serves as the ini-tial peripheral and requires circuitry to monitor and pulse V BUS . These initial roles can be reversed using HNP.The MAX3301E combines a low- and full-speed USB transceiver with additional circuitry required by a dual-role device. The MAX3301E employs flexible switching circuitry to enable the device to act as a dedicated host or peripheral USB transceiver. For example, the charge pump can be turned off and the internal regulator can be powered from V BUS for bus-powered peripheral applications.TransceiverThe MAX3301E transceiver complies with the USB ver-sion 2.0 specification, and operates at full-speed (12Mbps) and low-speed (1.5Mbps) data rates. Set the data rate with the SPD input. Set the direction of data transfer with the OE/INT input. Alternatively, control trans-ceiver operation with control register 1 (Table 7) and spe-cial-function registers 1 and 2 (see Tables 14 and 15).Level ShiftersInternal level shifters allow the system-side interface to run at logic-supply voltages as low as +1.65V. Interface logic signals are referenced to the voltage applied to the logic-supply voltage, V L .Charge PumpThe MAX3301E’s OTG-compliant charge pump oper-ates with +3V to +4.5V input supply voltages (V CC ) and supplies a +4.8V to +5.25V OTG-compatible output on V BUS while sourcing the 8mA or greater output current that an A device is required to supply. Connect a 0.1µF flying capacitor between C+ and C-. Bypass V BUS to GND with a 1µF to 6.5µF capacitor, in accordance with USB OTG specifications. The charge pump can be turned off to conserve power when not used. Control of the charge pump is set through the vbus_drv bit (bit 5)of control register 2 (see Table 8).Linear Regulator (TRM)An internal 3.3V linear regulator powers the transceiver and the internal 1.5k ΩD+/D- pullup resistor. Under the control of internal register bits, the linear regulator can be powered from V CC or V BUS . The regulator power-supply settings are controlled by the reg_sel bit (bit 3) in special-function register 2 (see Table 15). This flexibilityallows the system designer to configure the MAX3301E for virtually any USB power situation.The output of the TRM is not a power supply. Do not use as a power source for any external circuitry. Connect a 1.0µF (or greater) ceramic or plastic capacitor from TRM to GND, as close to the device as possible.V BUS Level-Detection ComparatorsComparators drive interrupt source register bits 0, 1,and 7 (Table 10) to indicate important USB OTG V BUS voltage levels:•V BUS is valid (vbus_vld)•USB session is valid (sess_vld)•USB session has ended (sess_end)The vbus_valid comparator sets vbus_vld to 1 if V BUS is higher than the V BUS valid comparator threshold. The V BUS valid status bit (vbus_vld) is used by the A device to determine if the B device is sinking too much current (i.e., is not supported). The session_valid comparator sets sess_vld to 1 if V BUS is higher than the session valid comparator threshold. This status bit indicates that a data transfer session is valid. The session_end com-parator sets sess_end to 1 if V BUS is higher than the session end comparator threshold. Figure 12shows the level-detector comparators. The interrupt-enable regis-ters (Tables 12 and 13) determine whether a falling or rising edge of V BUS asserts these status bits.Figure 12. Comparator Network DiagramM A X 3301EID_INThe USB OTG specification defines an ID input that determines which dual-role device is the default host.An OTG cable connects ID to ground in the connector of one end and is left unconnected in the other end.Whichever dual-role device receives the grounded end becomes the A device. The MAX3301E provides an internal pullup resistor on ID_IN. Internal comparators detect if ID_IN is grounded or left floating.Interrupt LogicWhen OTG events require action, the MAX3301E pro-vides an interrupt output signal on INT . Alternatively,OE/INT can be configured to act as an interrupt output while the device operates in USB suspend mode.Program INT and OE/INT as open-drain or push-pull interrupts with irq_mode (bit 1 of special-function regis-ter 2, see Table 15).V BUS Power ControlV BUS is a dual-function port that powers the USB bus and/or provides a power source for the internal linear reg-ulator. The V BUS power-control block performs the various switching functions required by an OTG dual-role device.These actions are programmed by the system logic using bits 5 to 7 of control register 2 (see Table 8) to: •Discharge V BUS through a resistor •Provide power-on or receive power from V BUS •Charge V BUS through a resistorThe OTG supplement allows an A device to turn V BUS off when the bus is not being used to conserve power.The B device can issue a request that a new session be started using SRP. The B device must discharge V BUS to a level below the session-end threshold (0.8V) toensure that no session is in progress before initiating SRP. Setting bit 6 of control register 2 to a 1, discharges V BUS to GND through a 5k Ωcurrent-limiting resistor.When V BUS has discharged, the resistor is removed from the circuit by resetting bit 6 of control register 2. An OTG A device is required to supply power on V BUS .The MAX3301E provides power to V BUS from V CC or from the internal charge pump. Set bit 5 in control regis-ter 2 to a 1 in both cases. Bit 5 in control register 2 con-trols a current-limited switch, preventing damage to the device in the event of a V BUS short circuit.An OTG B device (peripheral mode) can request a ses-sion using SRP. One of the steps in implementing SRP requires pulsing V BUS high for a controlled time. A 930Ωresistor limits the current according to the OTG specifi-cation. Pulse V BUS through the pullup resistor by assert-ing bit 7 of control register 2. Prior to pulsing V BUS (bit 7), a B device first connects an internal pulldown resis-tor to discharge V BUS below the session-end threshold.The discharge current is limited by the 5k Ωresistor and set by bit 6 of control register 2. An OTG A device must supply 5V power and at least 8mA on V BUS . Setting bit 5 of control register 2 turns on the V BUS charge pump.Operating ModesThe MAX3301E has four operating modes to optimize power consumption. Only the I 2C interface remains active in shutdown mode, reducing supply current to 1µA. The I 2C interface, the ID_IN port, and the session-valid com-parator all remain active in interrupt shutdown mode. RCV asserts low in suspend mode; however, all other circuitry remains active. Table 1lists the active blocks’ power in each of the operating modes.MAX3301EApplications InformationData TransferTransmitting Data to the USBThe MAX3301E transceiver features two modes of trans-mission: DAT_SE0 or VP_VM (see Table 3). Set the transmitting mode with dat_se0 (bit 2 in control register 1, see Table 7). In DAT_SE0 mode with OE/INT low,DAT_VP specifies data for the differential transceiver,and SE0_VM forces D+/D- to the single-ended zero (SE0) state. In VP_VM mode with OE/INT low, DAT_VP drives D+, and SE0_VM drives D-. The differential receiver determines the state of RCV.Receiving Data from the USBThe MAX3301E transceiver features two modes of receiving data: DAT_SE0 or VP_VM (see Table 4). Set the receiving mode with dat_se0 (bit 2 in control register 1, see Table 7). In DAT_SE0 mode with OE/INT high,DAT_VP is the output of the differential receiver and SE0_VM indicates that D+ and D- are both logic-low. In VP_VM mode with OE/INT high, DAT_VP provides the input logic level of D+ and SE0_VM provides the input logic level of D-. The differential receiver determines the state of RCV. VP and VM echo D+ and D-, respectively.OE/INTOE/INT controls the direction of communication. OE/INT can also be programmed to act as an interrupt output when in suspend mode. The output enable portion con-trols the input or output status of DAT_VP/SE0_VM and D+/D-. When OE/INT is a logic 0, DAT_VP and SE0_VM function as inputs to the D+ and D- outputs in a method depending on the status of dat_se0 (bit 2 in control reg-ister 1). When OE/INT is a logic 1, DAT_VP and SE0_VM indicate the activity of D+ and D-.OE/INT functions as an interrupt output when the MAX3301E is in suspend mode and oe_int_en = 1 (bit 5in control register 1, see Table 7). In this mode, OE/INT detects the same interrupts as INT . Set irq_mode (bit 1in special-function register 2, see Table 15) to a 0 to program OE/INT as an open-drain interrupt output. Set irq_mode to a 1 to configure OE/INT as a push-pull interrupt output.RCVRCV monitors D+ and D- when receiving data. RCV is a logic 1 for D+ high and D- low. RCV is a logic 0 for D+low and D- high. RCV retains its last valid state when D+and D- are both low (single-ended zero, or SE0). RCV asserts low in suspend mode. Table 4shows the state of RCV.SPDUse hardware or software to control the slew rate of the D+ and D- terminals. The SPD input sets the slew rate of the MAX3301E when spd_susp_ctl (bit 1 in special-func-tion register 1, see Table 14) is 0. Drive SPD low to select low-speed mode (1.5Mbps). Drive SPD high to select full-speed mode (12Mbps). Alternatively, when spd_susp_ctl (bit 1 of special-function register 1) is a 1,software controls the slew rate. The SPD input is ignored when using software to control the data rate. The speed bit (bit 0 of control register 1, see Table 7) sets the slew rate when spd_susp_ctl = 1.SUSUse hardware or software to control the suspend mode of the MAX3301E. Set spd_susp_ctl (bit 1 of special-function register 1, see Table 14) to 0 to allow the SUS input to enable and disable the suspend mode of the MAX3301E. Drive SUS low for normal operation. Drive SUS high to enable suspend mode. RCV asserts low in suspend mode while all other circuitry remains active. Alternatively, when the spd_susp_ctl bit (bit 1 of special-function register 1) is set to a 1, software controls the suspend mode. Set the suspend bit (bit 1 of control reg-ister 1, see Table 7) to a 1 to enable suspend mode. Set the suspend bit to zero to resume normal operation. The SUS input is ignored when using software to control sus-pend mode. The MAX3301E must be in full-speed mode (SPD = high or speed = 1) to issue a remote wake-up from the device when in suspend mode.RESETThe active-low RESET input allows the MAX3301E to be asynchronously reset without cycling the power supply.Drive RESET low to reset the internal registers (see Tables 7–15for the default power-up states). Drive RESET high for normal operation.2-Wire I 2C-Compatible Serial InterfaceA register file controls the various internal switches and operating modes of the MAX3301E through a simple 2-wire interface operating at clock rates up to 400kHz.This interface supports data bursting, where multiple data phases can follow a single address phase.UART ModeSet uart_en (bit 6 in control register 1) to 1 to place the MAX3301E in UART mode. D+ transfers data to DAT_VP and SE0_VM transfers data to D- in UART mode.M A X 3301EGeneral-Purpose Buffer ModeSet gp_en (bit 7 in special-function register 1) and dat_se0 (bit 2 in control register 1) to 1, set uart_en (bit 6in control register 1) to zero, and drive OE/INT low to place the MAX3301E in general-purpose buffer mode.Control the direction of data transfer with dminus_dir and dplus_dir (bits 3 and 4 of special-function register 1, see Tables 2 and 14).Serial AddressingThe MAX3301E operates as a slave device that sends and receives control and status signals through an I 2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MAX3301E and gener-ates the SCL clock that synchronizes the data transfer (Figure 13).The MAX3301E SDA line operates as both an input and as an open-drain output. SDA requires a pullup resistor,typically 4.7k Ω. The MAX3301E SCL line only operates as an input. SCL requires a pullup resistor if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output.Each transmission consists of a start condition (see Figure 14) sent by a master device, the MAX3301E 7-bit slave address (determined by the state of ADD), plus an R/W bit (see Figure 15), a register address byte, one or more data bytes, and a stop condition (see Figure 14).Both SCL and SDA assert high when the interface is not busy. A master device signals the beginning of a trans-mission with a start (S) condition by transitioning SDA from high to low while SCL is high. The master issues a stop (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another trans-mission (see Figure 14).Bit TransferOne data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (see Figure 16).Figure 13. 2-Wire Serial Interface Timing DetailsMAX3301EFigure 14. Start and Stop ConditionsM A X 3301ENote 7:Enter suspend mode by driving SUS high or by writing a 1 to suspend (bit 1 in control register 1), depending on the status of spd_susp_ctl in special-function register 1.X = Don’t care.MAX3301EAcknowledgeThe acknowledge bit (ACK) is the 9th bit attached to any 8-bit data word. ACK is always generated by the receiving device. The MAX3301E generates an ACK when receiving an address or data by pulling SDA low during the ninth clock period. When transmitting data,the MAX3301E waits for the receiving device to gener-ate an ACK. Monitoring ACK allows for detection of unsuccessful data transfers. An unsuccessful data transfer occurs if a receiving device is busy or if a sys-tem fault has occurred. In the event of an unsuccessful data transfer, the bus master should reattempt commu-nication at a later time.Slave AddressA bus master initiates communication with a slave device by issuing a START condition followed by the 7-bit slave address (see F igure 15). When idle, theMAX3301E waits for a START condition followed by its slave address. The LSB of the address word is the read/write (R/W ) bit. R/W indicates whether the master is writing to or reading from the MAX3301E (R/W = 0selects the write condition, R/W = 1 selects the read condition). After receiving the proper address, the MAX3301E issues an ACK.The MAX3301E has two possible addresses (see Table 5). Address bits A6 through A1 are preset, while a reset condition or an I 2C general call address loads the value of A0 from ADD. Connect ADD to GND to set A0 to 0.Connect ADD to V L to set A0 to 1. This allows up to two MAX3301Es to share the same bus.Write Byte FormatWriting data to the MAX3301E requires the transmission of at least 3 bytes. The first byte consists of the MAX3301E’s 7-bit slave address, followed by a 0 (R/W bit). The second byte determines which register is to be written to. The third byte is the new data for the selected register. Subsequent bytes are data for sequential reg-isters. Figure 18shows the typical write byte format.Read Byte FormatReading data from the MAX3301E requires the trans-mission of at least 3 bytes. The first byte consists of the MAX3301E’s slave address, followed by a zero (R/W bit). The second byte selects the register from which data is read. The third byte consists of the MAX3301’s slave address, followed by a one (R/W bit). The master then reads one or more bytes of data. Figure 19shows the typical read byte format.Burst-Mode Write Byte FormatThe MAX3301E allows a master device to write to sequential registers without repeatedly sending the slave address and register address each time. The master first sends the slave address, followed by a zero to write data to the MAX3301E. The MAX3301E sends an acknowledge bit back to the master. The master sends the 8-bit register address and the MAX3301E returns an acknowledge bit. The master writes a data byte to the selected register and receives an acknowl-edge bit if a supported register address has been cho-sen. The register address increments and is ready forFigure 16. Bit TransferFigure 17. Acknowledge。

MAX13170E MAX13172E MAX13174E 评估板使用手册说明书

_______________________________________________________________ Maxim Integrated Products 1For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at .MAX13170E/MAX13172E/MAX13174EEvaluation KitEvaluates: MAX13170E/MAX13172E/MAX13174EGeneral DescriptionThe MAX13170E/MAX13172E/MAX13174E evaluation kit (EV kit) combines the MAX13170E multiprotocol clock/data transceiver, the MAX13172E control transceiver, and the MAX13174E cable terminator chips. This chipset forms a complete software-selectable multiprotocol data terminal equipment (DTE) or data communications equipment (DCE) interface port that supports the V.28 (RS-232), V.11 (RS-449/V.36, EIA-530, EIA-530A, and X.21), and V.35 protocols. Internal charge pumps allow the EV kit to operate off a single 5V supply.The EV kit was designed to take advantage of the chipset’s flow-through pinout. The EV kit includes a 40-pin header (logic signals), a female DB25 connector (protocol signals), three SMA connectors (high-speed logic signals), and scope-probe connectors for measuring the high-speed data signals (logic and protocol signals).FeaturesS Programmable Transceiver SupportsV.28 (RS-232)V.11 (RS-449/V.36, EIA-530, EIA-530A, and X.21)V.35S True Fail-Safe Receiver InputsS Programmable Cable Termination (MAX13174E)S Proven PCB Layout S Fully Assembled and TestedOrdering InformationComponent List19-5727; Rev 0; 1/11+Denotes lead(Pb)-free and RoHS compliant.Note: The MAX13170E/MAX13172E/MAX13174E EV kit can be ordered using any of the part numbers above.PARTTYPEMAX13170EEVKIT+orMAX13172EEVKIT+orMAX13174EEVKIT+EV KitDESIGNATION QTY DESCRIPTIONC1, C2, C9–C1371µF Q 10%, 10V X5R ceramic capacitors (0805)Murata GRM219R61A105M C3, C42 4.7µF Q 10%, 10V X5R ceramic capacitors (1206)Murata GRM31CR61A475K C514.7µF 10%, 16V X7R ceramic capacitor (0805)Murata GRM21BR71C475K C6, C7, C83100pF Q 5%, 50V C0G ceramic capacitors (0603)Murata GQM1885C1H101J C14, C1520.1µF Q 10%, 16V X5R ceramic capacitors (0603)Murata GRM188R61C104KDESIGNATIONQTY DESCRIPTIONC1610.1µF Q 10%, 16V X7R ceramic capacitor (0805)Murata GRM219R71C104K C17147µF Q 10%, 16V tantalum capacitor (D case)AVX TPSD476M016R0150D1–D66Red LEDs D7–D126Green LEDs D13–D164Yellow LEDsJ1140-pin (2 x 20) header J21DB25 right-angle female connector J3, J4, J53SMA connectors (PC edge mount)JU1–JU773-pin headersMAX13170E/MAX13172E/MAX13174E Evaluation Kit 2 ______________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174EComponent List (continued)Note: Indicate that you are using the MAX13170E, MAX13172E, or MAX13174E when contacting these component suppliers.Quick StartRequired Equipment• MAX13170E/MAX13172E/MAX13174E EV kit •5V DC power supplyProcedureThe EV kit is fully assembled and tested. Follow the steps below to verify board operation. Caution: Do not turn on power supplies until all connections are completed .1) Verify that the default settings are configuredcorrectly, as shown in Tables 1, 2, and 3.2) Connect a single 5V Q 5% power supply between theVCC and GND pads located in the lower-left corner of the EV kit board.3) The yellow LEDs indicate the protocol mode of thechipset. The LEDs light up when the correspond-ing signal is a logic-high. Verify that all yellow LEDslight up indicating no-cable mode. All board labels, including all the labels for the LEDs, follow the same label format. The board label format top label corresponds to DCE mode and the bottom label corresponds to DTE mode.4) The green LEDs are attached to the receiver logicoutputs of the MAX13170E (U1) and the MAX13172E (U2). The LEDs light up when the receiver logic outputs are a logic-high. Verify that all green LEDs light up when no signals are attached to the DB25 connector. Note: The receivers have the true fail-safe feature allowing 0V differential voltage to be a valid state that forces the receiver outputs high.5) The red LEDs are attached to the transmitter logicinputs of U1 and U2. The LEDs light up when the transmitter logic inputs are a logic-high. Verify that none of the red LEDs light up when no signals are connected to the 40-pin header (J1).Component SuppliersDESIGNATION QTY DESCRIPTIONJU8–JU12, JU13–JU17102-pin headersN/A TXC,RXC SCTE,RXCA SCTEA,RXCB SCTEB,RXD TXD,RXDA TXDA,RXDB TXDB,SCTE RXC,SCTEA RXCA,SCTEB RXCB,TXC N/A,TXCA TXCA,TXCB TXCB,TXD RXD,TXDA RXDA,TXDB RXDB16Scope-probe connectors (top mount, 3.5mm ground cylinder)SUPPLIERPHONE WEBSITEAVX CorporationMurata Electronics North America, Inc.770-436-1300DESIGNATION QTY DESCRIPTIONR1, R2, R3349.9I Q 1% resistors (0805)R4–R1916 1.5k I Q 5% resistors (0805)TP1, TP22Red test pointsU11Clock/data transceiver (28 SSOP)Maxim MAX13170ECAI+U21Clock transceiver (28 SSOP)Maxim MAX13172ECAI+U31Cable terminator (24 SSOP)Maxim MAX13174ECAG+U4, U52Inverting LED drivers (20 Wide SO)—17Shunts—1PCB: MAX13170E/13172E/ 13174E EVALUATION KIT+MAX13170E/MAX13172E/MAX13174EEvaluation Kit_______________________________________________________________________________________ 3Evaluates: MAX13170E/MAX13172E/MAX13174EDetailed Description of Hardware The MAX13170E/MAX13172E/MAX13174E EV kit was designed to take advantage of the chipset’s flow-through pinout. The logic signals have all been routed to the 40-pin header (J1) located on the left side of the EV kit board. The protocol signals have all been routed to the female DB25 connector (J2) located on the right side of the board.Various connectors have been added to the EV kit to aid in taking quality measurements. Leave JU17 unconnected when measuring the supply current of the chipset. Scope-probe connectors have been added to measure the high-speed signals of the transmitter inputs/outputs and receiver inputs/outputs of the MAX13170E. The scope-probe connectors located on the left side of the board are connected to the logic input and output signals. The scope-probe connectors located on the right side of the board are connected to the protocol input and output signals. Three SMA connectors (J3, J4, and J5) have also been provided for driving the high-speed transmitter inputs of the MAX13170E. The string of 16 LEDs across the top of the board (D1–D16) are logic indicators. The red LEDs (D1–D6) indicate the state of the transmitter inputs of the MAX13170E and MAX13172E, the green LEDs (D7–D12) indicate the state of the receiver outputs, and the yellow LEDs (D13–D16) indicate the state of the protocol and the protocol-termination modes. The LEDs light up when their corresponding signals are a logic-high.The EV kit is extremely flexible and has several settings for both the ICs as well as the board. The ICs have been put into no-cable mode as the default mode. In no-cable mode the user is able to program the desired proto-col with an external controller connected to the 40-pin header. The default mode settings are shown in Tables 1, 2, and 3. By default the SMA connectors (J3, J4, and J5) are terminated with 50I and the control-transmitter input lines are all connected low.Note: Shaded areas share a single IC pin.Z = High impedance.Note: Shaded areas share a single IC pin.MAX13170E/MAX13172E/MAX13174E Evaluation Kit 4 ______________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174ENote: Shaded areas share a single IC pin.Z = High impedance.Note: Shaded areas share a single IC pin.MAX13170E/MAX13172E/MAX13174EEvaluation Kit_______________________________________________________________________________________ 5Evaluates: MAX13170E/MAX13172E/MAX13174EConfigurationThe following provides a step-by-step procedure to aid in configuring the EV kit. The EV kit is extremely flex-ible and has several settings for both the ICs as well as the board. The logic signals have all been routed to the 40-pin header (J1) on the left side of the board. The protocol signals have all been routed to the female DB25 connector (J2) on the right side of the board.The chipset protocol modes can be configured to support V.28 (RS-232), V.11 (RS-449/V.36, EIA-530, EIA-530A, and X.21), and V.35 protocols. All chipset logic inputs, LED power, and shield ground connection are jumper selectable. The board includes SMA connec-tors (J3, J4, and J5) with optional 50I termination. The board settings are separated in the following sections: chipset protocol modes, clock/data transmitter input settings, control transmitter input settings, SMA termina-tion, and power/ground.1) Connect a single 5V ±5% power supply between theVCC and GND pads located in the lower-left corner of the EV kit board.2) Chipset protocol modes:View the desired chipset protocol modes in Tables 4, 5, and 6. Connect the jumpers to the corre-sponding state depending on whether the mode lines are controlled by an external controller or arepin-strapped to a known state using Tables 7 and 8.INVERT defaults to logic-low.3) Clock/data transmitter input settings:Connect the clock/data jumpers to the correspond-ing state using Table 9. Force the inputs of all unused transmitters low so their corresponding LED indicators are off.4) Control transmitter input settings:Connect the control jumpers to the corresponding state using Table 10. Force the inputs of all unused transmitters low so their corresponding LED indica-tors are off.5) SMA termination:Connect the termination jumpers, depending on whether the signal source needs to be terminated with 50I , to the corresponding state using Table 11. Leave unused transmitter input lines terminated so the line is pulled down to a known state. When using SMA termination, avoid connecting JU1, JU2, and JU3 to VCC.6) Power/ground:Connect the power and ground jumpers according to the desired operation using Table 12. Leave JU17 unconnected (open) when measuring the supply current of the chipset.Table 6. MAX13174E Termination-Mode SelectionZ = High impedance.MODE DCE/DTEM2M1M0R1R2R3R4R5R6V.10/RS-4230000Z Z Z Z Z Z EIA-530A 0001Z Z Z V.11V.11V.11EIA-5300010Z Z Z V.11V.11V.11X.210011Z Z Z V.11V.11V.11V.350100V.35V.35Z V.35V.35V.35RS-449/V.360101Z Z Z V.11V.11V.11V.28/RS-2320110Z Z Z Z Z Z No cable 0111V.11V.11V.11V.11V.11V.11V.10/RS-4231000Z Z Z Z Z Z EIA-530A 1001Z Z Z Z V.11V.11EIA-5301010Z Z Z Z V.11V.11X.211011Z Z Z Z V.11V.11V.351100V.35V.35V.35Z V.35V.35RS-449/V.361101Z Z Z Z V.11V.11V.28/RS-2321110Z Z Z Z Z Z No cable1111V.11V.11V.11V.11V.11V.11MAX13170E/MAX13172E/MAX13174E Evaluation Kit 6 ______________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174ETable 7. Chipset Protocol Mode Jumper Settings (JU13–JU16)Table 9. Clock/Data Transmitter-Input Jumper Settings (JU1, JU2, JU3)Table 10. Control Transmitter-Input Jumper Settings (JU4–JU7)Table 8. Invert Mode Jumper Settings (JU12)*Default position.*Default position.*Default position.*Default position.JUMPERSIGNAL (BUS)STATEFUNCTION JU13DCE/DTEOpen*Logic-high (internal pullup in the IC). The DCE/DTE line can be driven by a signal applied to J1-30 (40-pin header).ClosedLogic-low.JU14M2Open*Logic-high (internal pullup in the IC). The M2 line can be driven by a signal applied to J1-32 (40-pin header).ClosedLogic-low.JU15M1Open*Logic-high (internal pullup in the IC). The M1 line can be driven by a signal applied to J1-34 (40-pin header).ClosedLogic low.JU16M0Open*Logic-high (internal pullup in the IC). The M0 line can be driven by a signal applied to J1-36 (40-pin header).ClosedLogic-low.JUMPERSIGNALSTATEFUNCTION JU12INVERTOpenLogic-high (internal pullup in the IC). The INVERT line can be driven by a signal applied to J1-38 (40-pin header).Closed*Logic-low.JUMPERDCE/DTE STATE FUNCTION JU1RXD/TXD1-2Logic-high.2-3Logic-low.Open*Apply signal to the J5 SMA connector.JU2RXC/SCTE1-2Logic-high.2-3Logic-low.Open*Apply signal to the J4 SMA connector.JU3TXC/N/A1-2Logic-high.2-3Logic-low.Open*Apply signal to the J3 SMA connector.JUMPERDCE/DTE STATE FUNCTION JU4CTS/RTS1-2Logic-high.2-3*Logic-low.Open Apply signal to J1-14 (40-pin header).JU5DSR/DTR1-2Logic-high.2-3*Logic-low.Open Apply signal to J1-16 (40-pin header).JU6DCD/N/A1-2Logic-high.2-3*Logic-low.Open Apply signal to J1-18 (40-pin header).JU7LL/N/A1-2Logic-high.2-3*Logic-low.OpenApply signal to J1-26 (40-pin header).MAX13170E/MAX13172E/MAX13174EEvaluation Kit_______________________________________________________________________________________ 7Evaluates: MAX13170E/MAX13172E/MAX13174ETable 11. Termination Jumper Settings (JU8, JU9, JU10)Table 12. Power/Ground Jumper Settings (JU11, JU17)*Default position.*Default position.JUMPER DCE/DTE STATE FUNCTION JU8RXD/TXD Open Unterminated.Closed*Terminated with 50I .JU9RXC/SCTE Open Unterminated.Closed*Terminated with 50I .JU10TXC/N/AOpen Unterminated.Closed*Terminated with 50I .JUMPERNAMESTATEFUNCTION JU11SHIELDOpenDB25 cable shield disconnected from signal ground.Closed*DB25 cable shield shorted to signal ground.JU17LED ANODEOpen LED anode is unconnected.Closed*LED anode isconnected to VCC.MAX13170E/MAX13172E/MAX13174E Evaluation Kit 8 ______________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174EFigure 1a. MAX13170E/MAX13172E/MAX13174E EV Kit Schematic (Sheet 1 of 2)MAX13170E/MAX13172E/MAX13174EEvaluation Kit_______________________________________________________________________________________ 9Evaluates: MAX13170E/MAX13172E/MAX13174EFigure 1b. MAX13171E/MAX13173E/MAX13175E EV Kit Schematic (Sheet 2 of 2)MAX13170E/MAX13172E/MAX13174E Evaluation Kit 10 _____________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174EFigure 2. MAX13170E/MAX13172E/MAX13174E EV Kit Component Placement Guide—Component SideMAX13170E/MAX13172E/MAX13174EEvaluation Kit______________________________________________________________________________________ 11Evaluates: MAX13170E/MAX13172E/MAX13174EFigure 3. MAX13170E/MAX13172E/MAX13174E EV Kit PCB Layout—Component SideMAX13170E/MAX13172E/MAX13174E Evaluation Kit12 _____________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174EFigure 4. MAX13170E/MAX13172E/MAX13174E EV Kit PCB Layout—Inner Layer 2MAX13170E/MAX13172E/MAX13174EEvaluation Kit______________________________________________________________________________________ 13Evaluates: MAX13170E/MAX13172E/MAX13174EFigure 5. MAX13170E/MAX13172E/MAX13174E EV Kit PCB Layout—Inner Layer 3MAX13170E/MAX13172E/MAX13174E Evaluation Kit14 _____________________________________________________________________________________E v a l u a t e s : M A X 13170E /M A X 13172E /M A X 13174EFigure 6. MAX13170E/MAX13172E/MAX13174E EV Kit PCB Layout—Solder SideMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 15© 2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.MAX13170E/MAX13172E/MAX13174E Evaluation Kit Evaluates: MAX13170E/MAX13172E/MAX13174ERevision History REVISIONNUMBERREVISION DATE DESCRIPTION PAGES CHANGED 01/11Initial release —。

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KSE13003T中文资料KSE13003TNPN Silicon TransistorAbsolute Maximum Ratings T C =25°C unless otherwise notedElectrical Characteristics T C =25°C unless otherwise noted * Pulse Test: Pulse Width=5ms, Duty Cycle ≤10%Symbol ParameterValue Units V CBO Collector-Base Voltage 700V V CEO Collector-Emitter Voltage 400V V EBO Emitter-Base Voltage 9V I C Collector Current (DC) 1.5A I CP Collector Current (Pulse) 3A IB Base Current0.75A P C Collec tor Dissipation (T C =25°C) 30W T J Junction Temperature 150°C T STGStorage Temperature- 65 ~ 150°CSymbol ParameterTest Condition Min.Typ.Max.Units BV CEO Collector-Emitter Breakdown Voltage I C = 5mA, I B = 0400V I EBO Emitter Cut-off Current V EB = 9V, I C = 0 10μAh FE *DC Current GainV CE = 2V, I C = 0.5A V CE = 2V, I C =1A 8 5 40 V CE (sat)*Collector Emitter Saturation VoltageI C = 0.5A, I B = 0.1A I C = 1A, I B = 0.25A I C = 1.5A, I B =0.5A 0.5 1 3V V V V BE (sat)*Base Emitter Saturation VoltageI C = 0.5A, I B = 0.1A I C = 1A, I B = 0.25A 11.2V V C ob Output CapacitanceV CB = 10V , f = 0.1MHz 21pF f T Current Gain Bandwidth Product V CE = 10V, I C = 0.1A 4MHz t ON Turn On Time V CC =125V, I C = 1A I B1 = 0.2A, I B2 = - 0.2A R L = 125?1.1μs t STG Storage Time 4.0μs t FFall Time0.7μs KSE13003THigh Voltage Switch Mode ApplicationsHigh Speed SwitchingSuitable for Switching Regulator and Motor Control1.Base2.Collector3.Emitter1TO-220KSE13003TKSE13003TTRADEMARKSThe following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is notintended to be an exhaustive list of all such trademarks.DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR INTERNATIONAL.As used herein:1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body,or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONS Definition of TermsDatasheet Identification Product Status DefinitionAdvance InformationFormative or In Design This datasheet contains the design specifications for product development. Specifications maychange in any manner without notice.PreliminaryFirst ProductionThis datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.No Identification Needed Full ProductionThis datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.Obsolete Not In ProductionThis datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.FACT?FACT Quiet series?FAST ?FASTr?FRFET?GlobalOptoisolator?GTO?HiSeC?I 2C?ImpliedDisconnect?ISOPLANAR?LittleFET?MicroFET?MicroP ak?MICROWIRE?MSX?MSXPro?OCX?OCXPro?OPTOLOGIC ?OPT OPLANAR?PACMAN?POP?Power247?PowerTrench ?QFET?QS?QT Optoelectronics?Quiet Series?RapidConfigure?RapidConnect?SILENT SWITCHER ?SMART START?SPM?Stealth?SuperSOT?-3SuperSOT?-6SuperSOT?-8SyncFET?TinyLogic?TruTranslation?UHC?UltraFET ?VCX?ACEx?ActiveArray?Bottomless?CoolFET?CROSSVOLT ?DOME?EcoSPARK?E 2CMOS?EnSigna?Across the board. Around the world.?The Power Franchise?Programmable Active Droop?。

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