Linked Balanced Designs are Symmetric BIBD's
川大林峰计网第一次作业
I. Multiple Choice1.1In the following options, which does not define in protocol? ( D )A the format of messages exchanged between two or more communicating entitiesB theorder of messages exchanged between two or more communicating entities C the actions taken on the transmission of a message or other event D the transmission signals are digital signals or analog signals1.2In the following options, which is defined in protocol? ( A )A the actions taken on the transmission and/or receipt of a message or other eventB theobjects exchanged between communicating entities C the content in the exchanged messages D the location of the hosts1.3 Which of the following nodes belongs to the network core? ( C )A. a Web ServerB. a Host with Win2003 ServerC. a Router with NAT serviceD. a Supernode on Skype Network1.4 In the Internet, the equivalent concept to end systems is ( A ). A hostsB serversC clientsD routers1.5 In the Internet, end systems are connected together by ( C ). A copper wireB coaxial cableC communication linksD fiber optics1.6 End systems access to the Internet through its ( C ). A modemsB protocolsC ISPD sockets1.7 In the following options, which belongs to the network core? ( B ) A end systemsB routersC clientsD servers1.8 End systems, packet switches, and other pieces of the Internet, run ( D ) that control the sending and receiving of information within the Internet. A programs B processes C applications D protocols1.9 The protocols of various layers are called ( A ). A the protocol stack B TCP/IP C ISP D network protocol1.10 In the OSI reference model, the upper layers of the OSI model are, in correct order (D)a) Session, application, presentation b) Session, presentation, application c) Session, application, presentation, physical d) Application, presentation, session1.11 The lower layers of the OSI model are, in correct order( D )a) physical, system, network, logical b) physical, logical, network, system c) physical, transport, network, data link d) physical, data link, network, transport1.12 Which of the following protocol layers is not explicitly part of the Internet Protocol Stack? ___B______ A. application layer B. session layer C. data link layer D. transport layer1.13 The 5-PDU is called__D_ A. message B. segment C. datagram D. frame1.14 Transport-layer packets are called: BA. messageB. segmentC. datagramD. frame1.15 The units of data exchanged by a link-layer protocol are called ( A ). A FramesB SegmentsC DatagramsD bit streams1.16 There are two fundamental approaches to building a network core, ( B ) and packet switching. A electrical current switching B circuit switching C data switching D message switching1.17 There are two classes of packet-switched networks: ( B ) networks and virtualcircuit networks. A datagramB circuit-switchedC televisionD telephone1.18 ( A ) means that the switch must receive the entire packet before it can begin to transmit the first bit of the packet onto the outbound link.A Store-and-forward transmissionB FDMC End-to-end connectionD TDM1.19 In ( C ) networks, the resources needed along a path to provide for communication between the end system are reserved for the duration of the communication session. A packet-switched B data-switched C circuit-switched D message-switched1.20 In ( A ) networks, the resources are not reserved; a session’s messages use the resources on demand, and as a consequence, may have to wait for access to communication link. A packet-switched B data-switched C circuit-switched D message-switched1.21 Which of the following option belongs to the circuit-switched networks? ( D ) A FDMB TDMC VC networksD both A and B1.22 In a circuit-switched network, if each link has n circuits, for each link used by the end-to-end connection, the connection gets ( A ) of the link’s bandwidth for the duration of the connection. A a fraction 1/n B all C 1/2D n times1.23 For ( C ), the transmission rate of a circuit is equal to the frame rate multiplied by the number of bits in a slot. A CDMA B packet-switched network C TDM D FDM1.24 The network that forwards packets according to host destination addresses is called ( D ) network. A circuit-switched B packet-switched C virtual-circuit D datagram1.25 The time required to propagate from the beginning of the link to the next router is ( C ). A queuing delay B processing delay C propagation delay D transmission delay1.26 Processing delay does not include the time to ( B ). A examine the packet’s header B wait to transmit the packet onto the link C determine where to direct the packet D check bit-error in the packet1.27 In the following four descriptions, which one is correct? ( C )A The traffic intensity must be greater than 1.B The fraction of lost packets increases as the traffic intensity decreases.C If the traffic intensity is close to zero, the average queuing delay will be close to zero.D If the traffic intensity is close to one, the average queuing delay will be close to one.1.28 Suppose, a is the average rate at which packets arrive at the queue, R is the transmission rate, and all packets consist of L bits, then the traffic intensity is ( B ), A LR/a B La/R C Ra/L D LR/a1.29 and it should no greater than ( B ). A 2 B 1 C 0D -11.30 Suppose there is exactly one packet switch between a sending host and a receiving host. The transmission rates between the sending host and the switch and between the switch and the receiving host are R1 and R2, respectively. Assuming that the switch uses store-and-forward packet switching, what is the total end-to-end delay to send a packet of length L? (Ignore queuing delay, propagation delay, and processing delay.) ( A ) A L/R1+L/R2 B L/R1 C L/R2 D none of the above1.31 We are sending a 30 Mbit MP3 file from a source host to a destination host. Suppose there is only one link between source and destination and the link has a transmission rate of 10 Mbps. Assume that the propagation speed is 2 * 108 meters/sec, and the distance between source and destination is 10,000 km. Also suppose that message switching is used, with the message consisting of the entire MP3 file. How many bits will the source have transmitted when the first bit arrives at the destination? CA. 1 bitB. 30,000,000 bitsC. 500,000 bitsD. none of the above1.32 Access networks can be loosely classified into three categories: residential access, company access and ( B ) access. A cabled B wireless C campus D city area1.33 The following technologies may be used for residential access, except DA. HFCB. DSLC. Dial-up modemD. FDDI1.34 Which kind of media is not a guided media? ( D ) A twisted-pair copper wireB a coaxial cableC fiber opticsD digital satellite channelII. True or False1.35 There is no network congestion in a circuit switching network.False1.36 Consider an application that transmits data at a steady rate, and once this application starts, it will stay on for a relatively long period of time. According to the characteristic, a packet-switched network would be more appropriate for this application than a circuit-switched network.FalseIII. Please Answer Following Questions Briefly1.37 How many layers are there in the Internet protocol stack? What are they? What are the principal responsibilities of each of these layers?5层。
2020年最新5G试题周村XX网络科技公司终面试题(含答案)
精选考试类应用文档,如果您需要使用本文档,请点击下载,另外祝您生活愉快,工作顺利,万事如意!精选考试类文档,如果需要,请下载,希望能帮助到你们!XX某公司5G考试题库及答案———解老师温馨提示:同学们,经过培训学习,你一定积累了很多知识,现在请认真、仔细地完成这张试题吧。
加油!一、单选题( )1.如果现网是云化的EPC,在尽可能减少投资的情况下,尽快拓展家庭宽带市场的业务,关于5G 建网策略的最佳选择,下列哪一项分析是正确的?A.直接升级EPC到SA架构,采用Opiton2组网,一步到位支持5G全业务B.避免影响现网和快速部署业务,新建云化EPC+网络,独立组网支持Option3x; 5G采用单独PLMN,便于5G终端选择EPC+核心网C.升级现网EPC到EPC+网络,并对用户面网关进行升级和扩容,推荐Option3x组网,5G和4G共PLMND.升级现网到SA架构,升级LTE到eLTE采用Opiton4组网,可以快速支持5G业务正确答案:C( )2.关于 PDSCH Resource allocation说法错误的是A.K0 的取值范围为 0-32。
;B.PDSCH时域资源分配有两种类型: PDSCH Mapping TypeA和 PDSCH Mapping;C.PDSCH频域资源分配有两种类型: Type0 和 Type1。
;D.Type0 既适用于 fallback DCI 也适用于 Non fallback DCI。
正确答案:D( )3.下面哪种PUCCH的bit个数小于2_________________A. PUCCH format 1B. PUCCH format 2C. PUCCH format 3D. PUCCH format 4正确答案:A( )4.gNB添加小区的物理小区标识取值范围是多少A.0~893B.0~107C.0~1007D.0~504正确答案:C( )5.AAU5612模炔体积,重量多少?A.65L/40kgB.62L/50kgC.43L/40kgD.65L/56kg正确答案:A( )6.下列关于NR空口新波形说法不正确的是?A.上行固定使用DFT-S-OFDM波形B.下行固定使用CP-OFDM波形C.上行UE在距离基站远点使用DFT-S-OFDM波形D.上行UE在距离基站近点使用CP-OFDM波形正确答案:A( )7.5G RAN1.0 可配置的波束有几种?A.3B.C.6D.7正确答案:D( )8.高层 RRC配置的周期性 SRS,PUCCH,PUSCH,PRACH传输,在下面哪种场景下可以传输A.DCI format 2_0 动态指示的 flexible 符号;B.DCI format 2_0 动态指示的下行符号 ;C.未配置 DCI format2_0 下,半静态指示的 flexible 符号;D.未配置 DCI format2_0 下,半静态指示的下行符号 ;正确答案:B( )9.5GNR下,DLLayermapping的时候当layer数大于_________________,codeword才是双流A.3B.5C.2D.4正确答案:D( )10.5G帧结构描述中,下面哪一项是错误的A.帧结构配置可以由 SIB 静态帧结构配置;B.上下行资源比例可在 1:4 到 2:3 之间调整;C.R15 的协议中, RRC高层配置的 tdd-UL-DL-ConfigurationDedicated 定义了周期大小;D.DCI format2-0 用于动态指示帧结构 ;正确答案:C( )11.sa切换基于以下哪种测量,发起测量报告A.ssb rsrpB. SSB RSRQC. CSI-RS RSRPD.CSI-RS RSRQ正确答案:A( )12.gNB可以通过哪种方式给UE发送Timing Advance CommandA.RRC专用信令;B.MAC CE;C.系统消息;D.DCI正确答案:B( )13.以下关于NSA组网的描述,错误的是哪一个?A.5G作为主站,LTE作为从站B.用户面可选择走主站或者从站C.NSA以现有的LTE接入和核心网作为移动性管理和覆盖的锚点,新增5G接入的组网方式D.信令面由主站处理正确答案:A( )14.5G承载网中,能够同时实现时隙复用、端口绑定、管道切片的技术是_________________A.SR-TPB.SDNC.FlexED.大容量设备正确答案:C( )15.高层RRC配置的周期性SRS,PUCCH,PUSCH,PRACH传输,在下面哪种场景下可以传输A.DCI format 2_0动态指示的flexible符号;B.DCI format 2_0动态指示的下行符号;C.未配置DCI format2_0下,半静态指示的flexible符号;D.未配置DCI format2_0下,半静态指示的下行符号;正确答案:C( )16.采用Cband作为5G首频,在一些覆盖场景会出现短板,主要包括_________________A.下行_室内B.热点C.上行_室内D.上行_室外正确答案:C( )17.NR 中 SR在下列哪个信道上发送?A.PUCCH format1/format 0;B.PUCCH format1/1a/1b;C.PUSCH;D.PUCCH format3正确答案:A( )18.直流电源分配盒—DCPD10B配置_________________路-48V DC输出A. 6B. 8C. 10D. 12正确答案:C( )19.CU/DU分离之后,两者之间的接口是哪个接口?A.eCPRIB.F1C.XnD.NG正确答案:B( )20.以下哪不是5G基站传输安全保护措施?A.OMCH基于SSL安全通信B.文件传输支持FTPs安全保护C.BBU互联时钟同步支持安全通信D.业务链路IPSec保护正确答案:B二、多选题。
建筑专业英语试题及答案
建筑专业英语试题及答案一、选择题(每题2分,共20分)1. What is the term for the main vertical structural element in a building?A. ColumnB. BeamC. SlabD. Foundation2. The process of applying plaster to walls is known as:A. TilingB. RenderingC. PlasteringD. Drywalling3. Which of the following is a type of roofing material?A. BrickB. ConcreteC. AsphaltD. Glass4. The term "architectural scale" refers to:A. A set of rules for building designB. A tool used for measuring distances on architectural drawingsC. A method of constructionD. A type of building material5. What is the function of a lintel in construction?A. To support a wallB. To support a door or window openingC. To provide insulationD. To prevent water infiltration6. The abbreviation "RC" in construction stands for:A. Reinforced CementB. Roof ConstructionC. Residential ConstructionD. Raw Concrete7. The term "load-bearing wall" is used to describe a wall that:A. Carries the weight of the roof and floorsB. Is used for decorationC. Is non-structuralD. Separates rooms8. What does "green building" refer to?A. A building covered in plantsB. A building made from recycled materialsC. A building designed to reduce environmental impactD. A building with a lot of windows for natural light9. The process of attaching a building to the ground is known as:A. AnchoringB. FoundationingC. GroundingD. Embedding10. What is the purpose of a "cantilever" in construction?A. To provide additional supportB. To allow a structure to extend beyond its supportC. To increase the height of a buildingD. To create a decorative effect二、填空题(每空1分,共10分)11. The structural system that uses a series of arches to distribute weight is known as a _______.12. The process of cutting and shaping stone is known as_______.13. A _______ is a type of joint that allows for some movement between connected parts.14. The term "facade" refers to the front of a building, which is often the _______ of the structure.15. The _______ is the part of a building that connects the roof to the walls.三、简答题(每题5分,共20分)16. Explain the difference between "load-bearing" and "non-load-bearing" walls.17. Describe the role of a "cantilever" in architectural design.18. What is the significance of "sustainability" in modern architecture?19. Discuss the importance of "thermal insulation" in building construction.四、翻译题(每题5分,共30分)20. Translate the following sentence into English:“悬挑结构能够创造出独特的建筑形态,但同时也需要精心的设计以确保结构的稳定性。
ISA95第三部分标准翻译
8类活动模型:定义管理、资源管理、详细计划、调度、执行、数据收集、分析与追踪,以及这些活动模型之间的数据流。
这些活动模型主要用于生产控制、设备维护、质量保证、库存管理等业务管理。
从原材料、能源和信息到产品的转换过程中,这些活动对成本、数量、安全和时间等参数进行协调、指导和追踪。
第四章制造运作管理(生产业务管理)图1 制造运作管理模型宽虚线表明企业/控制接口的边界。
这条线相当于5.1节定义的L3-L4之间的接口。
The manufacturing control side of the interface包括生产控制中的绝大部分功能和其它主要功能中的一些活动。
带箭头的线代表制造控制中主要的信息流。
宽虚线里面的功能可以包含子功能,这些子功能可以落入控制领域,或者落入企业领域depending on organiza onal policies. 制造运作管理是生产操作管理,维护操作管理,质量操作管理,库存操作管理和生产设备的其它活动的集合。
操作管理,库存操作管理和生产设备的其它活动的集合。
第一部分标准定义了功能层次模型,每一层提供了各自的功能并且有典型的响应时间,如图2。
a)0层定义了实际的物理过程。
层定义了实际的物理过程。
b) 1层涉及物理过程的传递和操作。
1层通常以秒为时间帧,或者更快的速度进行操作帧,或者更快的速度进行操作c) 2层定义物理过程监测和控制的活动。
L2通常以小时,分钟,秒或者小于秒的时间帧进行操作。
分钟,秒或者小于秒的时间帧进行操作。
d) L3定义了生产预期成品的工作流的活动。
包括维修记录和协调进程的活动。
L3通常以天,shi s,小时,分钟和秒为时间帧进行操作。
为时间帧进行操作。
e) 由图3可知,第三部分定义了L3层的部分活动,L3内之间的数据流。
部之间的数据流,以及l3与L2之间的数据流。
图4信息交换的种类信息交换的种类第一部分标准定义了用于企业控制系统接口之间的模型和术语。
2024年电信5G基站建设理论考试题库(附答案)
2024年电信5G基站建设理论考试题库(附答案)一、单选题1.在赛事保障值守过程中,出现网络突发故障,需要启用红黄蓝应急预案进行应急保障,确保快速处理和恢复。
红黄蓝应急预案的应急逻辑顺序为()A、网络安全->用户感知->网络性能B、网络性能->用户感知->网络安全C、用户感知->网络安全->网络性能D、用户感知->网络性能->网络安全参考答案:D2.2.1G规划,通过制定三步走共享实施方案,降配置,省TCO不包含哪项工作?A、低业务小区并网B、低业务小区关小区C、低业务小区拆小区D、高业务小区覆盖增强参考答案:D3.Type2-PDCCHmonsearchspaceset是用于()。
A、A)OthersysteminformationB、B)PagingC、C)RARD、D)RMSI参考答案:B4.SRIOV与OVS谁的转发性能高A、OVSB、SRIOVC、一样D、分场景,不一定参考答案:B5.用NR覆盖高层楼宇时,NR广播波束场景化建议配置成以下哪项?A、SCENARTO_1B、SCENARIO_0C、SCENARIO_13D、SCENARIO_6参考答案:C6.NR的频域资源分配使用哪种方式?A、仅在低层配置(非RRC)B、使用k0、k1和k2参数以实现分配灵活性C、使用SLIV控制符号级别的分配D、使用与LTE非常相似的RIV或bitmap分配参考答案:D7.SDN控制器可以使用下列哪种协议来发现SDN交换机之间的链路?A、HTTPB、BGPC、OSPFD、LLDP参考答案:D8.NR协议规定,采用Min-slot调度时,支持符号长度不包括哪种A、2B、4C、7D、9参考答案:D9.5G控制信道采用预定义的权值会生成以下那种波束?A、动态波束B、静态波束C、半静态波束D、宽波束参考答案:B10.TS38.211ONNR是下面哪个协议()A、PhysicalchannelsandmodulationB、NRandNG-RANOverallDescriptionC、RadioResourceControl(RRC)ProtocolD、BaseStation(BS)radiotransmissionandreception参考答案:A11.在NFV架构中,哪个组件完成网络服务(NS)的生命周期管理?A、NFV-OB、VNF-MC、VIMD、PIM参考答案:A12.5G需要满足1000倍的传输容量,则需要在多个维度进行提升,不包括下面哪个()A、更高的频谱效率B、更多的站点C、更多的频谱资源D、更低的传输时延参考答案:D13.GW-C和GW-U之间采用Sx接口,采用下列哪种协议A、GTP-CB、HTTPC、DiameterD、PFCP参考答案:D14.NR的频域资源分配使用哪种方式?A、仅在低层配置(非RRC)B、使用k0、k1和k2参数以实现分配灵活性C、使用SLIV控制符号级别的分配D、使用与LTE非常相似的RIV或bitmap分配参考答案:D15.下列哪个开源项目旨在将电信中心机房改造为下一代数据中心?A、OPNFVB、ONFC、CORDD、OpenDaylight参考答案:C16.NR中LongTruncated/LongBSR的MACCE包含几个bit()A、4B、8C、2D、6参考答案:B17.对于SCS120kHz,一个子帧内包含几个SlotA、1B、2C、4D、8参考答案:D18.SA组网中,UE做小区搜索的第一步是以下哪项?A、获取小区其他信息B、获取小区信号质量C、帧同步,获取PCI组编号D、半帧同步,获取PCI组内ID参考答案:D19.SA组网时,5G终端接入时需要选择融合网关,融合网关在DNS域名的'app-protocol'name添加什么后缀?A、+nc-nrB、+nr-ncC、+nr-nrD、+nc-nc参考答案:A20.NSAOption3x组网时,语音业务适合承载以下哪个承载上A、MCGBearB、SCGBearC、MCGSplitBearD、SCGSplitBear参考答案:A21.5G需要满足1000倍的传输容量,则需要在多个维度进行提升,不包括下面哪个()A、更高的频谱效率B、更多的站点C、更多的频谱资源D、更低的传输时延参考答案:D22.以SCS30KHz,子帧配比7:3为例,1s内调度次数多少次,其中下行多少次。
微波仿真论坛_Momentum_ports_and_grounds_June2008_rev1_1
2. Executive Summary of port types available and some fundamental concepts
Demystifying ADS Momentum Ports (Juroduction
One of the most intimidating, challenging, and confusing topics to master for electromagnetic (EM) simulations is that of exciting a given design with the most accurate representation of what one would use when testing the component, module, etc. in a lab environment. Most EM tools refer to these excitations as ports. Agilent EEsof EDA’s ADS Momentum is no exception. The intent of this document is to provide a thorough reference for the various ports available in ADS Momentum and the appropriate methods to define and apply them. The authors hope that you will find this document both enlightening and a worthy resource that complements the ADS Momentum manual. Please keep in mind that this is a comprehensive document for topics related to ports, so be sure to refer to the table of contents on page 1 to see which sections are relevant to you.
翻译1
公路隧道通风控制优化摘要高速公路隧道的控制方案是基于静态的公路隧道模型设计的。
该控制器的设计是为了保持排气水平低于隧道给定的范围内。
下面便对某公路隧道动态模型进行模拟控制。
◎2006 Elsevier公司保留所有权利。
关键词:建模;通风控制;能量优化;污染控制1.目的在全世界有许多大型公路隧道。
这些隧道的运营必须满足几个要求,如最小能耗优化或对周围环境的影响。
由于隧道系统通常是非常复杂的(可能包括了风机机组,传感器,通风井等),设计一个控制器,根据现代控制设计方法将可以很高效。
令人惊讶的是,这些隧道大部分的控制是通过基于有施工经验的工程师的的方法启发而进行的.然而,对于在Prague, Czech Republic的隧道Mra´zovka(开始建于2004年八月)和Blanka(正在建设中,建于2011)的建造中,采用了一个不同的策略。
在Ferkl et al.(2005),它决定了采用现代控制技术来满足所有随着城市公路隧道相关发展的强烈需求。
控制任务可以表述如下:控制系统的设计应以最小的能量消耗使排放水平处于下面给出的范围内,(见表1)。
2.隧道模拟2.1系统分解隧道系统一般非常复杂,没有简单的模型适合为它的设计。
这时需要对系统进行分解。
以便使处理系统更加容易,将功能和空间结构两者分解成部分进行处理。
功能的分解是非常直观的(图1)。
隧道模型包括三个主要功能部分(或子系统)–交通,通风,排气。
输入和输出被完全可分的系统相当自然的很好的定义和分解是。
隧道系统分为三个子系统的可分性可以从fig.1看出,显而易见的,射流通风风扇,通风井等通风设备不影响交通。
相反,交通会对通风设备产生影响(车辆运动造成空气质量的下降)的结果是空气质量的下降速率和需要通风的原因。
同样的方式,一般废气不影响交通也不影响通风系统[1].但交通影响废气(通过车辆的尾气产生)和通风系统(废气量的变化引起空气量的变化)。
5g网络优化工程师考试试题及参考答案
5g网络优化工程师考试试题及参考答案1、在同频切换的A3事件参数中,以下哪个参数不能基于QCI进行单独配置?A、A3偏置B、邻区偏置CIOC、A3幅度迟滞D、A3时间迟滞答案:B2、5G系统中一共定义了多少种CQI的映射关系表?A、1种B、2种C、3种D、4种答案:C3、以下哪个参数不会出现在SCG的配置消息中A、T304B、SSB频点C、SSB发射功率D、RSRP最小接收电平答案:D4、以下关于EN-DC双连接组网的描述,错误的是哪一项?A、只能支持4G和5G的双连接B、UE在空口可以和两个基站建立用户面C、UE在空口只能和一个基站建立信令面D、UE在空口可以和两个基站建立信令面答案:D5、以下关于华为RAN3.1中以下关于NR小区运挡商专用优先级的异频切换的描述,正确的是哪一项?A、支持测量模式和盲模式B、测量失败用户会触发周期测量A4事件机制C、配置连接态专用须率优先级0D、基于A4事件测量答案:D6、在路测工具中,以下哪个指标是无法监测的?A、SSB RSRPB、PDSCH IBLERC、CQlD、SRS SINR答案:D7、64T64RAAU在默认配置场景下,广播波束的水平3dB波宽和垂直3dB波宽分别是多少?A、65°、6°B、105°、6°C、65°、12°D、105°、12°答案:B8、以下关于华为的E-UTRAN至NG-RAN的快速返回特性的描述,错误的是哪一项?A、快速返回可以基于测量和盲重定向B、异系统B1测量过程中不会因为A1.上报而终止C、需要判断终端QCI属性是否存在“不能切换”的业务D、如果采用切换方式需要配置N26接口答案:A9、在做NR网络的下行峰值调测时,PDSCHDMRS类型应该配置为以下哪项?A、Type4B、Type2C、Type3D、Type1答案:B10、以下信道或信号中,发射功率跟随PUSCH的是哪项?A、PUSCHB、PUCCHC、SRSD、PRACH答案:C11、ITU对于5mMTC业务要求的连接能力是多少?A、百万终端小区B、十万终端/平方公里C、十万终端/小区D、百万终端/平方公里答案:D12、64T64RAAU支持的NR广播波束的垂直3dB波宽,最大可以支持多少?A、6°B、36°C、12°D、25°答案:D13、在NR用户上行速率测试中,对2T4R的终端,建议“上行最大MIMO层数"建议配置为以下哪项?A、Layer3B、Layer2C、Layer1D、Layer4答案:B14、gNodeB通过空间分集( 分集增益)和相干接收合并( 阵列增益)来增强上行信号接收效果的技术是什么?A、上行用户多流传输B、上行多天线接收C、上行MU MIMO PUCCH复用D、上行MU MIMO PUSCH复用答案:B15、以下哪种UCl信息只能通过周期的PUCCH资源进行发送?A、PMlB、SRC、cqlD、ACK-NACK答案:B16、C波段100Mhz的带宽,30khz的子载波情况下,为了达到峰值速率,NR 寸UE的下行调度次数( )需要达到多少?A、1500次/秒B、1000次/秒C、2000次/秒D、3000次/秒答案:C17、如果UE需要发起同频测量和一拼测量,且同顿SMTC周期大于等于GAP 测量周期, 在不支持GAP Sharing机制时,会导致以下哪种情况?A、同频和异频随机测量B、异频测量无法进行C、同频测量无法进行D、同频和异频都不能测量答案:C18、假设SSB物理层周期配置为10ms,那么同一个MIB块要进行几个周期的SSB扫描?A、8次B、2次C、6次D、4次答案:A19、根据频段内CA相关协议以下哪种场景不支持载波聚合?A、TDD+TDD : 4 :1+4 :1B、TDD+TDD : 4 : 1+单周期8 : 2C、TDD+TDD :双周期8 : 2+双周期8 : 2D、TDD+TDD :单周期8 : 2+单周期8 : 2答案:B20、为应对大规模连接,5G适应mMTC物联网场景时,推荐采用的SCS子载波间隔为多少?A、15KhzB、120KhzC、60KhzD、30Khz答案:C21、NSA场景当终进检测到NR侧上行RLC达到最大重传时会触发什么流程?A、主动上报scG FailureB、主动发起.上行重同步C、主动发起随机接入D、主动发起重建答案:A22、5G小区系统带宽用哪个参数来表征?A、DRBB、CRBC、PRBD、PointA答案:C23、NR小区中,以下哪个指标可以反映UE业务态的覆盖情况?A、CSI SINRB、CSIRSRPC、SSB RSRPD、PDSCH RSRP答案:D24、SS-RSRP的测量是关于以下哪种信道或信号?A、SSB DMRSB、PBCH DMRSC、sSSD、PSS答案:A25、在低频场景下,UE是如何获取当前SSB的波束ID?A、通过MIB消息获取B、通过PBCH DMRS获取C、通过PBCH物理层编码信息获取D、通过SIB1消息获取答案:B26、在NSA组网中,开启上行LTEfallback特性后,gNodeB基于以下哪个测量触发该流程?A、PUCCH SINRB、PUSCH SINRC、DMRS SINRD、SRS SINR答案:D27、在下行数传业务过程中,如果终端突然无法上报CQl,那么会出现什么问题?A、掉话B、采用固当前使用的MCS进行数传C、下行数传停止D、采用固定的低阶MCS答案:D28、以下关于华为RAN3.1中以下关于NR小区基于频率优先级的异频切换的描述,错误的是哪一项?A、配置流量优先级非0B、支持测量模式和盲模式C、测量失败用户会触发周期测量A4事件机制D、基于A4事件测量答案:B29、终端初始的TA( timeadvance)调整量是通过以下哪条消息获取的?A、SIB1B、Random accees responseC、RRCconnection setupD、RRC Reconfiguration答案:B30、在下行链路检测中,PDCCHBLER同步门限值Qin为多少?A、.02B、.05C、.1D、.15答案:C31、Massive MIMO的哪一项增益不能改善系统覆盖性能?A、干扰抑制增益B、空间分集增益C、空间复用增益D、阵列增益答案:C32、SA组网架构下, 5GRAN使用哪层完成QOS映射?A、RLCB、SDAPC、NGAPD、PDCP答案:B33、华为RAN3.1低频最大支持频段内多少载波聚合?A、5B、3C、4D、2答案:D34、载波聚合的SCel1去激活管理中不会参考哪一项参数指标?A、UE下行RL C缓存中的数据量B、SCe11CQI对应的频谱效率C、SCel1 SRS对应的频谱效率D、UE_上行调度的BSR数据量答案:C35、如果采用升级现网EPC的方式部署5G NSA网络,以下哪个网元可能会涉及到硬件的升级?A、MMEB、HSSC、PCRFD、P-Gw答案:D36、以下关于EN-DC双连接组网的描述,错误的是哪项?A、信令面建立在5G侧B、只能支持4G和5G的双连接C、UE在空口可以和两个基站建立用户面D、当前商用网络亚在空口只能和一个基站建立信令面答案:A37、在PUSCH功率算法中,路损是通过以下哪个信道的测量计算出来的?A、PDSCHB、CSI-RSC、SSBD、PDCCH答案:C38、以下哪种SCS不允许用于SSB?A、15KHzB、30KHzC、60KHzD、120KHz答案:C39、在下行MCS调整过程中,基站是基于以下哪种测量进行调整的?A、PDSCH SINRB、PDCCH SINRC、PDSCH BLERD、PDCCH BLER答案:C40、64T64RAAU支持的NR广播波束的水平3dB波宽,最大可以支持多少?A、65°B、110°C、45°D、90°答案:B41、如果小区最大发射功率为10ow,scs=30kHz,带宽为10OMHz,采用64T64R的AAU,那么小区基准功率大约为多少?A、31.9dBmB、-3.3dBmC、0dBmD、34dBm答案:B42、终端能力.上报中以下哪一项表示终端支持天选?A、SupportedSRS-TxPortSwitch:t2r4B、SupportedSRS-AntennaSwitchingC、SupportedSRS-Resource : 1t2rD、maxNMumberSRS答案:B43、5G小区带宽100MHz ,子载波间隔SCS=30KHZ的场景。
Parallel and Distributed Computing and Systems
Proceedings of the IASTED International ConferenceParallel and Distributed Computing and SystemsNovember3-6,1999,MIT,Boston,USAParallel Refinement of Unstructured MeshesJos´e G.Casta˜n os and John E.SavageDepartment of Computer ScienceBrown UniversityE-mail:jgc,jes@AbstractIn this paper we describe a parallel-refinement al-gorithm for unstructuredfinite element meshes based on the longest-edge bisection of triangles and tetrahedrons. This algorithm is implemented in P ARED,a system that supports the parallel adaptive solution of PDEs.We dis-cuss the design of such an algorithm for distributed mem-ory machines including the problem of propagating refine-ment across processor boundaries to obtain meshes that are conforming and non-degenerate.We also demonstrate that the meshes obtained by this algorithm are equivalent to the ones obtained using the serial longest-edge refine-ment method.Wefinally report on the performance of this refinement algorithm on a network of workstations.Keywords:mesh refinement,unstructured meshes,finite element methods,adaptation.1.IntroductionThefinite element method(FEM)is a powerful and successful technique for the numerical solution of partial differential equations.When applied to problems that ex-hibit highly localized or moving physical phenomena,such as occurs on the study of turbulence influidflows,it is de-sirable to compute their solutions adaptively.In such cases, adaptive computation has the potential to significantly im-prove the quality of the numerical simulations by focusing the available computational resources on regions of high relative error.Unfortunately,the complexity of algorithms and soft-ware for mesh adaptation in a parallel or distributed en-vironment is significantly greater than that it is for non-adaptive computations.Because a portion of the given mesh and its corresponding equations and unknowns is as-signed to each processor,the refinement(coarsening)of a mesh element might cause the refinement(coarsening)of adjacent elements some of which might be in neighboring processors.To maintain approximately the same number of elements and vertices on every processor a mesh must be dynamically repartitioned after it is refined and portions of the mesh migrated between processors to balance the work.In this paper we discuss a method for the paral-lel refinement of two-and three-dimensional unstructured meshes.Our refinement method is based on Rivara’s serial bisection algorithm[1,2,3]in which a triangle or tetrahe-dron is bisected by its longest edge.Alternative efforts to parallelize this algorithm for two-dimensional meshes by Jones and Plassman[4]use randomized heuristics to refine adjacent elements located in different processors.The parallel mesh refinement algorithm discussed in this paper has been implemented as part of P ARED[5,6,7], an object oriented system for the parallel adaptive solu-tion of partial differential equations that we have devel-oped.P ARED provides a variety of solvers,handles selec-tive mesh refinement and coarsening,mesh repartitioning for load balancing,and interprocessor mesh migration.2.Adaptive Mesh RefinementIn thefinite element method a given domain is di-vided into a set of non-overlapping elements such as tri-angles or quadrilaterals in2D and tetrahedrons or hexahe-drons in3D.The set of elements and its as-sociated vertices form a mesh.With theaddition of boundary conditions,a set of linear equations is then constructed and solved.In this paper we concentrate on the refinement of conforming unstructured meshes com-posed of triangles or tetrahedrons.On unstructured meshes, a vertex can have a varying number of elements adjacent to it.Unstructured meshes are well suited to modeling do-mains that have complex geometry.A mesh is said to be conforming if the triangles and tetrahedrons intersect only at their shared vertices,edges or faces.The FEM can also be applied to non-conforming meshes,but conformality is a property that greatly simplifies the method.It is also as-sumed to be a requirement in this paper.The rate of convergence and quality of the solutions provided by the FEM depends heavily on the number,size and shape of the mesh elements.The condition number(a)(b)(c)Figure1:The refinement of the mesh in using a nested refinement algorithm creates a forest of trees as shown in and.The dotted lines identify the leaf triangles.of the matrices used in the FEM and the approximation error are related to the minimum and maximum angle of all the elements in the mesh[8].In three dimensions,the solid angle of all tetrahedrons and their ratio of the radius of the circumsphere to the inscribed sphere(which implies a bounded minimum angle)are usually used as measures of the quality of the mesh[9,10].A mesh is non-degenerate if its interior angles are never too small or too large.For a given shape,the approximation error increases with ele-ment size(),which is usually measured by the length of the longest edge of an element.The goal of adaptive computation is to optimize the computational resources used in the simulation.This goal can be achieved by refining a mesh to increase its resolution on regions of high relative error in static problems or by re-fining and coarsening the mesh to follow physical anoma-lies in transient problems[11].The adaptation of the mesh can be performed by changing the order of the polynomi-als used in the approximation(-refinement),by modifying the structure of the mesh(-refinement),or a combination of both(-refinement).Although it is possible to replace an old mesh with a new one with smaller elements,most -refinement algorithms divide each element in a selected set of elements from the current mesh into two or more nested subelements.In P ARED,when an element is refined,it does not get destroyed.Instead,the refined element inserts itself into a tree,where the root of each tree is an element in the initial mesh and the leaves of the trees are the unrefined elements as illustrated in Figure1.Therefore,the refined mesh forms a forest of refinement trees.These trees are used in many of our algorithms.Error estimates are used to determine regions where adaptation is necessary.These estimates are obtained from previously computed solutions of the system of equations. After adaptation imbalances may result in the work as-signed to processors in a parallel or distributed environ-ment.Efficient use of resources may require that elements and vertices be reassigned to processors at runtime.There-fore,any such system for the parallel adaptive solution of PDEs must integrate subsystems for solving equations,adapting a mesh,finding a good assignment of work to processors,migrating portions of a mesh according to anew assignment,and handling interprocessor communica-tion efficiently.3.P ARED:An OverviewP ARED is a system of the kind described in the lastparagraph.It provides a number of standard iterativesolvers such as Conjugate Gradient and GMRES and pre-conditioned versions thereof.It also provides both-and -refinement of meshes,algorithms for adaptation,graph repartitioning using standard techniques[12]and our ownParallel Nested Repartitioning(PNR)[7,13],and work mi-gration.P ARED runs on distributed memory parallel comput-ers such as the IBM SP-2and networks of workstations.These machines consist of coarse-grained nodes connectedthrough a high to moderate latency network.Each nodecannot directly address a memory location in another node. In P ARED nodes exchange messages using MPI(Message Passing Interface)[14,15,16].Because each message has a high startup cost,efficient message passing algorithms must minimize the number of messages delivered.Thus, it is better to send a few large messages rather than many small ones.This is a very important constraint and has a significant impact on the design of message passing algo-rithms.P ARED can be run interactively(so that the user canvisualize the changes in the mesh that results from meshadaptation,partitioning and migration)or without directintervention from the user.The user controls the systemthrough a GUI in a distinguished node called the coordina-tor,.This node collects information from all the other processors(such as its elements and vertices).This tool uses OpenGL[17]to permit the user to view3D meshes from different angles.Through the coordinator,the user can also give instructions to all processors such as specify-ing when and how to adapt the mesh or which strategy to use when repartitioning the mesh.In our computation,we assume that an initial coarse mesh is given and that it is loaded into the coordinator.The initial mesh can then be partitioned using one of a num-ber of serial graph partitioning algorithms and distributed between the processors.P ARED then starts the simulation. Based on some adaptation criterion[18],P ARED adapts the mesh using the algorithms explained in Section5.Af-ter the adaptation phase,P ARED determines if a workload imbalance exists due to increases and decreases in the num-ber of mesh elements on individual processors.If so,it invokes a procedure to decide how to repartition mesh el-ements between processors;and then moves the elements and vertices.We have found that PNR gives partitions with a quality comparable to those provided by standard meth-ods such as Recursive Spectral Bisection[19]but which(b)(a)Figure2:Mesh representation in a distributed memory ma-chine using remote references.handles much larger problems than can be handled by stan-dard methods.3.1.Object-Oriented Mesh RepresentationsIn P ARED every element of the mesh is assigned to a unique processor.V ertices are shared between two or more processors if they lie on a boundary between parti-tions.Each of these processors has a copy of the shared vertices and vertices refer to each other using remote ref-erences,a concept used in object-oriented programming. This is illustrated in Figure2on which the remote refer-ences(marked with dashed arrows)are used to maintain the consistency of multiple copies of the same vertex in differ-ent processors.Remote references are functionally similar to standard C pointers but they address objects in a different address space.A processor can use remote references to invoke meth-ods on objects located in a different processor.In this case, the method invocations and arguments destined to remote processors are marshalled into messages that contain the memory addresses of the remote objects.In the destina-tion processors these addresses are converted to pointers to objects of the corresponding type through which the meth-ods are invoked.Because the different nodes are inher-ently trusted and MPI guarantees reliable communication, P ARED does not incur the overhead traditionally associated with distributed object systems.Another idea commonly found in object oriented pro-gramming and which is used in P ARED is that of smart pointers.An object can be destroyed when there are no more references to it.In P ARED vertices are shared be-tween several elements and each vertex counts the number of elements referring to it.When an element is created, the reference count of its vertices is incremented.Simi-larly,when the element is destroyed,the reference count of its vertices is decremented.When the reference count of a vertex reaches zero,the vertex is no longer attached to any element located in the processor and can be destroyed.If a vertex is shared,then some other processor might have a re-mote reference to it.In that case,before a copy of a shared vertex is destroyed,it informs the copies in other processors to delete their references to itself.This procedure insures that the shared vertex can then be safely destroyed without leaving dangerous dangling pointers referring to it in other processors.Smart pointers and remote references provide a simple replication mechanism that is tightly integrated with our mesh data structures.In adaptive computation,the struc-ture of the mesh evolves during the computation.During the adaptation phase,elements and vertices are created and destroyed.They may also be assigned to a different pro-cessor to rebalance the work.As explained above,remote references and smart pointers greatly simplify the task of creating dynamic meshes.4.Adaptation Using the Longest Edge Bisec-tion AlgorithmMany-refinement techniques[20,21,22]have been proposed to serially refine triangular and tetrahedral meshes.One widely used method is the longest-edge bisec-tion algorithm proposed by Rivara[1,2].This is a recursive procedure(see Figure3)that in two dimensions splits each triangle from a selected set of triangles by adding an edge between the midpoint of its longest side to the opposite vertex.In the case that makes a neighboring triangle,,non-conforming,then is refined using the same algorithm.This may cause the refinement to prop-agate throughout the mesh.Nevertheless,this procedure is guaranteed to terminate because the edges it bisects in-crease in length.Building on the work of Rosenberg and Stenger[23]on bisection of triangles,Rivara[1,2]shows that this refinement procedure provably produces two di-mensional meshes in which the smallest angle of the re-fined mesh is no less than half of the smallest angle of the original mesh.The longest-edge bisection algorithm can be general-ized to three dimensions[3]where a tetrahedron is bisected into two tetrahedrons by inserting a triangle between the midpoint of its longest edge and the two vertices not in-cluded in this edge.The refinement propagates to neigh-boring tetrahedrons in a similar way.This procedure is also guaranteed to terminate,but unlike the two dimensional case,there is no known bound on the size of the small-est angle.Nevertheless,experiments conducted by Rivara [3]suggest that this method does not produce degenerate meshes.In two dimensions there are several variations on the algorithm.For example a triangle can initially be bisected by the longest edge,but then its children are bisected by the non-conforming edge,even if it is that is not their longest edge[1].In three dimensions,the bisection is always per-formed by the longest edge so that matching faces in neigh-boring tetrahedrons are always bisected by the same com-mon edge.Bisect()let,and be vertices of the trianglelet be the longest side of and let be the midpoint ofbisect by the edge,generating two new triangles andwhile is a non-conforming vertex dofind the non-conforming triangle adjacent to the edgeBisect()end whileFigure3:Longest edge(Rivara)bisection algorithm for triangular meshes.Because in P ARED refined elements are not destroyed in the refinement tree,the mesh can be coarsened by replac-ing all the children of an element by their parent.If a parent element is selected for coarsening,it is important that all the elements that are adjacent to the longest edge of are also selected for coarsening.If neighbors are located in different processors then only a simple message exchange is necessary.This algorithm generates conforming meshes: a vertex is removed only if all the elements that contain that vertex are all coarsened.It does not propagate like the re-finement algorithm and it is much simpler to implement in parallel.For this reason,in the rest of the paper we will focus on the refinement of meshes.5.Parallel Longest-Edge RefinementThe longest-edge bisection algorithm and many other mesh refinement algorithms that propagate the refinement to guarantee conformality of the mesh are not local.The refinement of one particular triangle or tetrahedron can propagate through the mesh and potentially cause changes in regions far removed from.If neighboring elements are located in different processors,it is necessary to prop-agate this refinement across processor boundaries to main-tain the conformality of the mesh.In our parallel longest edge bisection algorithm each processor iterates between a serial phase,in which there is no communication,and a parallel phase,in which each processor sends and receives messages from other proces-sors.In the serial phase,processor selects a setof its elements for refinement and refines them using the serial longest edge bisection algorithms outlined earlier. The refinement often creates shared vertices in the bound-ary between adjacent processors.To minimize the number of messages exchanged between and,delays the propagation of refinement to until has refined all the elements in.The serial phase terminates when has no more elements to refine.A processor informs an adjacent processor that some of its elements need to be refined by sending a mes-sage from to containing the non-conforming edges and the vertices to be inserted at their midpoint.Each edge is identified by its endpoints and and its remote ref-erences(see Figure4).If and are sharedvertices,(a)(c)(b)Figure4:In the parallel longest edge bisection algo-rithm some elements(shaded)are initially selected for re-finement.If the refinement creates a new(black)ver-tex on a processor boundary,the refinement propagates to neighbors.Finally the references are updated accord-ingly.then has a remote reference to copies of and lo-cated in processor.These references are included in the message,so that can identify the non-conforming edge and insert the new vertex.A similar strategy can be used when the edge is refined several times during the re-finement phase,but in this case,the vertex is not located at the midpoint of.Different processors can be in different phases during the refinement.For example,at any given time a processor can be refining some of its elements(serial phase)while neighboring processors have refined all their elements and are waiting for propagation messages(parallel phase)from adjacent processors.waits until it has no elements to refine before receiving a message from.For every non-conforming edge included in a message to,creates its shared copy of the midpoint(unless it already exists) and inserts the new non-conforming elements adjacent to into a new set of elements to be refined.The copy of in must also have a remote reference to the copy of in.For this reason,when propagates the refine-ment to it also includes in the message a reference to its copies of shared vertices.These steps are illustrated in Figure4.then enters the serial phase again,where the elements in are refined.(c)(b)(a)Figure5:Both processors select(shaded)mesh el-ements for refinement.The refinement propagates to a neighboring processor resulting in more elements be-ing refined.5.1.The Challenge of Refining in ParallelThe description of the parallel refinement algorithm is not complete because refinement propagation across pro-cessor boundaries can create two synchronization prob-lems.Thefirst problem,adaptation collision,occurs when two(or more)processors decide to refine adjacent elements (one in each processor)during the serial phase,creating two(or more)vertex copies over a shared edge,one in each processor.It is important that all copies refer to the same logical vertex because in a numerical simulation each ver-tex must include the contribution of all the elements around it(see Figure5).The second problem that arises,termination detection, is the determination that a refinement phase is complete. The serial refinement algorithm terminates when the pro-cessor has no more elements to refine.In the parallel ver-sion termination is a global decision that cannot be deter-mined by an individual processor and requires a collabora-tive effort of all the processors involved in the refinement. Although a processor may have adapted all of its mesh elements in,it cannot determine whether this condition holds for all other processors.For example,at any given time,no processor might have any more elements to re-fine.Nevertheless,the refinement cannot terminate because there might be some propagation messages in transit.The algorithm for detecting the termination of parallel refinement is based on Dijkstra’s general distributed termi-nation algorithm[24,25].A global termination condition is reached when no element is selected for refinement.Hence if is the set of all elements in the mesh currently marked for refinement,then the algorithmfinishes when.The termination detection procedure uses message ac-knowledgments.For every propagation message that receives,it maintains the identity of its source()and to which processors it propagated refinements.Each prop-agation message is acknowledged.acknowledges to after it has refined all the non-conforming elements created by’s message and has also received acknowledgments from all the processors to which it propagated refinements.A processor can be in two states:an inactive state is one in which has no elements to refine(it cannot send new propagation messages to other processors)but can re-ceive messages.If receives a propagation message from a neighboring processor,it moves from an inactive state to an active state,selects the elements for refinement as spec-ified in the message and proceeds to refine them.Let be the set of elements in needing refinement.A processor becomes inactive when:has received an acknowledgment for every propa-gation message it has sent.has acknowledged every propagation message it has received..Using this definition,a processor might have no more elements to refine()but it might still be in an active state waiting for acknowledgments from adjacent processors.When a processor becomes inactive,sends an acknowledgment to the processors whose propagation message caused to move from an inactive state to an active state.We assume that the refinement is started by the coordi-nator processor,.At this stage,is in the active state while all the processors are in the inactive state.ini-tiates the refinement by sending the appropriate messages to other processors.This message also specifies the adapta-tion criterion to use to select the elements for refinement in.When a processor receives a message from,it changes to an active state,selects some elements for refine-ment either explicitly or by using the specified adaptation criterion,and then refines them using the serial bisection algorithm,keeping track of the vertices created over shared edges as described earlier.When itfinishes refining its ele-ments,sends a message to each processor on whose shared edges created a shared vertex.then listens for messages.Only when has refined all the elements specified by and is not waiting for any acknowledgment message from other processors does it sends an acknowledgment to .Global termination is detected when the coordinator becomes inactive.When receives an acknowledgment from every processor this implies that no processor is re-fining an element and that no processor is waiting for an acknowledgment.Hence it is safe to terminate the refine-ment.then broadcasts this fact to all the other proces-sors.6.Properties of Meshes Refined in ParallelOur parallel refinement algorithm is guaranteed to ter-minate.In every serial phase the longest edge bisectionLet be a set of elements to be refinedwhile there is an element dobisect by its longest edgeinsert any non-conforming element intoend whileFigure6:General longest-edge bisection(GLB)algorithm.algorithm is used.In this algorithm the refinement prop-agates towards progressively longer edges and will even-tually reach the longest edge in each processor.Between processors the refinement also propagates towards longer edges.Global termination is detected by using the global termination detection procedure described in the previous section.The resulting mesh is conforming.Every time a new vertex is created over a shared edge,the refinement propagates to adjacent processors.Because every element is always bisected by its longest edge,for triangular meshes the results by Rosenberg and Stenger on the size of the min-imum angle of two-dimensional meshes also hold.It is not immediately obvious if the resulting meshes obtained by the serial and parallel longest edge bisection al-gorithms are the same or if different partitions of the mesh generate the same refined mesh.As we mentioned earlier, messages can arrive from different sources in different or-ders and elements may be selected for refinement in differ-ent sequences.We now show that the meshes that result from refining a set of elements from a given mesh using the serial and parallel algorithms described in Sections4and5,re-spectively,are the same.In this proof we use the general longest-edge bisection(GLB)algorithm outlined in Figure 6where the order in which elements are refined is not spec-ified.In a parallel environment,this order depends on the partition of the mesh between processors.After showing that the resulting refined mesh is independent of the order in which the elements are refined using the serial GLB al-gorithm,we show that every possible distribution of ele-ments between processors and every order of parallel re-finement yields the same mesh as would be produced by the serial algorithm.Theorem6.1The mesh that results from the refinement of a selected set of elements of a given mesh using the GLB algorithm is independent of the order in which the elements are refined.Proof:An element is refined using the GLBalgorithm if it is in the initial set or refinementpropagates to it.An element is refinedif one of its neighbors creates a non-conformingvertex at the midpoint of one of its edges.Therefinement of by its longest edge divides theelement into two nested subelements andcalled the children of.These children are inturn refined by their longest edge if one of their edges is non-conforming.The refinement proce-dure creates a forest of trees of nested elements where the root of each tree is an element in theinitial mesh and the leaves are unrefined ele-ments.For every element,let be the refinement tree of nested elements rooted atwhen the refinement procedure terminates. Using the GLB procedure elements can be se-lected for refinement in different orders,creating possible different refinement histories.To show that this cannot happen we assume the converse, namely,that two refinement histories and generate different refined meshes,and establish a contradiction.Thus,assume that there is an ele-ment such that the refinement trees and,associated with the refinement histories and of respectively,are different.Be-cause the root of and is the same in both refinement histories,there is a place where both treesfirst differ.That is,starting at the root,there is an element that is common to both trees but for some reason,its children are different.Be-cause is always bisected by the longest edge, the children of are different only when is refined in one refinement history and it is not re-fined in the other.In other words,in only one of the histories does have children.Because is refined in only one refinement his-tory,then,the initial set of elements to refine.This implies that must have been refined because one of its edges became non-conforming during one of the refinement histo-ries.Let be the set of elements that are present in both refinement histories,but are re-fined in and not in.We define in a similar way.For each refinement history,every time an ele-ment is refined,it is assigned an increasing num-ber.Select an element from either or that has the lowest number.Assume that we choose from so that is refined in but not in.In,is refined because a neigh-boring element created a non-conforming ver-tex at the midpoint of their shared edge.There-fore is refined in but not in because otherwise it would cause to be refined in both sequences.This implies that is also in and has a lower refinement number than con-。
汽车电源树参考设计与自动电子控制系统电源树参考设计 REFRPT001说明书
User’s GuideROHM Solution SimulatorAutomotive Power tree reference design for ADAS/Info-Display applicationREFRPT001 / Load Response for 5.0V power tree sub-circuitThis circuit simulate the load response of REFRPT001 reference design. The REFRPT001 is the reference design, designed for infotainment devices such as vehicle clusters and center information displays, as well as for ADAS ECUs. It is consist of multiple rails of power supply from Battery in the car converting to required voltage and current supply for MCU or SoCs.CANMCUSoCSchottky barrier diode:RBR3LAM60B(3A/60V)+BPrimary DCDC 1A, 2MHz, Low Iq :BD9P105EFV-CPrimaryΠ Type FilterSuperVisor5.0V 3.3V 1.25V 1.0V 5.0VFlagPrimary DCDC 2A, 2MHz, Low Iq :BD9P205EFV-CSecondarySecondary DCDC 2A :BD9S201NUX-CSecondary LDO 0.5A :BD00IA5MEFJ-MSecondary DCDC 2A :BD9S201NUX-CSecondary DCDC 3A :BD9S300MUF-CSecondary DCDC 4A :BD9S400MUF-CSecondary Load Switch Pch :RV4C020ZPHZGLoad Switch++3.3V5.0V5.0V1.25V3.3V1.8V1.5V1.0V3.3VDCDC_P5VDCDC_P3VDCDC_P5V_S1V25LDO_P5V_S3V3DCDC_P3V_S1V8DCDC_P3V_S1V5DCDC_P3V_S1V0DCDC_P3V_PSWSupervisor IC(Voltage monitor,WDT,BIST etc )BD39040MUF-C,BD39042MUF-C (under development)1.5V 1.8V 3.3VIn this circuit, you can observe the fluctuation of the output voltage when the load current is abruptly changed. You can customize the parameters of the components shown in blue, such as VIN, IOUT_SXXX, or peripheral components, and simulate the load response with desired operating condition.General CautionsCaution 1: The values from the simulation results are not guaranteed. Please use these results as a guide for your design. Caution 2: These model characteristics are specifically at Ta=25°C. Thus, the simulation result with temperature variancesmay significantly differ from the result with the one done at actual application board (actual measurement).Caution 3: Please refer to the datasheet for details of the technical information.Caution 4: The characteristics may change depending on the actual board design and ROHM strongly recommend todouble check those characteristics with actual board where the chips will be mounted on.5.0V power tree sub-circuit1. Simulation SchematicFigure 1. Simulation Schematic2. How to simulateThe simulation settings, such as simulation time or convergence options, are configurable from the ‘Simulation Settings’shown in Figure 2, and Table 1 shows the default setup of the simulation.In case of simulation convergence issue, you can change advancedoptions to solve. Default statement in ‘Manual Options’ sets the optionto avoid non-convergence error. You can modify or delete it.Figure 2. Simulation Settings and executionTable 1.Simulation settings default setupParameters Default NoteSimulation Type Time-Domain (Do not change Simulation Type)End Time 5.0msAdvanced options Balanced Convergence AssistManual Options No options SimulationSettingsSimulate3. Simulation ConditionsTable 2. List of the simulation condition parametersInstanceName TypeParameters Default Value Variable RangeUnits Min MaxVBATVoltage Sourcevoltage_level 12 3.5 40 V VEN VoltageSourcePulse_value 12 Pulse_value should be thesame as voltage_level of VBAT V VOCP_SEL VoltageSourcevoltage_level 0 0: Max output current =0.5A, or 5: Max output current=1.0AV VMODE VoltageSourcevoltage_level5 0: Auto mode, or 5: FPWM mode V IOUT_S1V25 Current sourceinitial_value 0 0 1.0 A pulse_value1.0 0 1.0A ramptime_initial_to_pulse 13 No constraint (Note2) µs ramptime_pulse_to_initial13No constraint (Note2)µsStart_delay 1.5 - ms Pulse_width 2.0 - ms Period1.0-sIOUT_S3V3Current source initial_value0 0 0.5 A pulse_value0.5 0 0.5 A ramptime_initial_to_pulse 5 No constraint (Note2) µs ramptime_pulse_to_initial 5 No constraint (Note2) µsStart_delay 1.5 - ms Pulse_width 2.0 - ms Period 1.0 -s(Note 1) This is a constraint of the simulation settings and does not guarantee the operation of the IC.3.1 IOUT_SXXX parameter setupFigure 3 shows how the IOUT_SXXX parameters (Here, XXX: 1V25 or 3V3) correspond to the IOUT_SXXX stimuluswaveform.Figure 3. IOUT_SXXX parameters and its waveformIOUT_S1V25VOUT_P5V_S3V3IOUT_S3V3DCDC_P5V_S1V25Start_delayPeriod (to the next rising edge) Ramptime_initial_to_pulsePulse_valueInitial_valueRamptime_pulse_to_initialPulse_width4. Simulation models4.1 BD9P105EFV-C simulation modelTable 3 and Table 4 shows the model terminal function implemented. Note that BD9P105EFV-C is the behavior model for its load regulation operation, and no protection circuits or the functions not related to the purpose are not implemented.4.2 BD9S201NUX-C simulation modelTable 5 and shows the model terminal function implemented. Note that BD9S201NUX-C is the behavior model for its load/line regulation operation, and no protection circuits or the functions not related to the purpose are not implemented.4.3 BD00IA5MEFJ-M simulation modelTable 6 shows the model terminal function implemented. Note that BD00IA5MEFJ-M is the behavior model for its load/line regulation operation.(Note 4) This model is not compatible with the influence of ambient temperature.(Note 5) This model is not compatible with the external synchronization function.(Note 6) Use the simulation results only as a design guide and the data reported herein is not a guaranteed value.5. Peripheral Components5.1 Bill of MaterialTable 5 shows the list of components used in the simulation schematic. Each of the capacitor and inductor has the parameters of equivalent circuit shown below. The default value of equivalent components are set to zero except for the parallel resistance of L1. You can modify the values of each component.5.2 Capacitor Equivalent Circuits(a) Property editor (b) Equivalent circuitFigure 5. Capacitor property editor and equivalent circuit5.3 Inductor Equivalent Circuits(b) Property editor (b) Equivalent circuitFigure 6. Inductor property editor and equivalent circuitThe default value of PAR_RES is 6.6kΩ.(Note 7) These parameters can take any positive value or zero in simulation but it does not guarantee the operation of the IC in any condition. Refer to the datasheet to determine adequate value of parameters.6. Link to the product information and tools6.1 BD9P105EFV-C6.1.1 Product webpage linkhttps:///products/power-management/switching-regulators/integrated-fet/buck-converters-synchronous/bd9p 105efv-c-product6.1.2 Related documentsThe application notes are available from ‘Documentation’ tab of the product page.6.1.3 Tools and modelsDesign assist tools a re available from ‘Tools’ tab of the product page.The Circuit constant calculation sheet is useful for deciding the application circuit constants.6.2 BD9S201NUX-C6.2.1 Product webpage linkhttps:///products/power-management/switching-regulators/integrated-fet/buck-converters-synchronous/bd9s 201nux-c-product6.2.2 Related documentsThe application notes are available from ‘Documentation’ tab of the product page.6.2.3 Tools and modelsDesign assist tools a re available from ‘Tools’ tab of the product page.The Circuit constant calculation sheet is useful for deciding the application circuit constants.6.3 BD00IA5MEFJ-M6.3.1 Product webpage linkhttps:///products/power-management/linear-regulators/single-output-ldo-regulators/bd00ia5mefj-m-product 6.3.2 Related documentsThe application notes are available from ‘Documentation’ tab of the product page.6.3.3 Tools and modelsDesign assist tools a re available from ‘Tools’ tab of the produc t page.The Circuit constant calculation sheet is useful for deciding the application circuit constants.NoticeROHM Customer Support System/contact/Thank you for your accessing to ROHM product informations.More detail product informations and catalogs are available, please contact us.N o t e sThe information contained herein is subject to change without notice.Before you use our Products, please contact our sales representative and verify the latest specifica-tions :Although ROHM is continuously working to improve product reliability and quality, semicon-ductors can break down and malfunction due to various factors.Therefore, in order to prevent personal injury or fire arising from failure, please take safety measures such as complying with the derating characteristics, implementing redundant and fire prevention designs, and utilizing backups and fail-safe procedures. ROHM shall have no responsibility for any damages arising out of the use of our Poducts beyond the rating specified by ROHM.Examples of application circuits, circuit constants and any other information contained herein areprovided only to illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production.The technical information specified herein is intended only to show the typical functions of andexamples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM or any other parties. ROHM shall have no responsibility whatsoever for any dispute arising out of the use of such technical information.The Products specified in this document are not designed to be radiation tolerant.For use of our Products in applications requiring a high degree of reliability (as exemplifiedbelow), please contact and consult with a ROHM representative : transportation equipment (i.e. cars, ships, trains), primary communication equipment, traffic lights, fire/crime prevention, safety equipment, medical systems, servers, solar cells, and power transmission systems.Do not use our Products in applications requiring extremely high reliability, such as aerospaceequipment, nuclear power control systems, and submarine repeaters.ROHM shall have no responsibility for any damages or injury arising from non-compliance withthe recommended usage conditions and specifications contained herein.ROHM has used reasonable care to ensur e the accuracy of the information contained in thisdocument. However, ROHM does not warrants that such information is error-free, and ROHM shall have no responsibility for any damages arising from any inaccuracy or misprint of such information.Please use the Products in accordance with any applicable environmental laws and regulations,such as the RoHS Directive. For more details, including RoHS compatibility, please contact a ROHM sales office. ROHM shall have no responsibility for any damages or losses resulting non-compliance with any applicable laws or regulations.W hen providing our Products and technologies contained in this document to other countries,you must abide by the procedures and provisions stipulated in all applicable export laws and regulations, including without limitation the US Export Administration Regulations and the Foreign Exchange and Foreign Trade Act.This document, in part or in whole, may not be reprinted or reproduced without prior consent ofROHM.1) 2)3)4)5)6)7)8)9)10)11)12)13)。
ambitious 填空
ambitious 填空摘要:1.Altium Designer 简介2.重置规则的目的和功能3.如何重置规则4.重置规则的注意事项5.总结正文:【1.Altium Designer 简介】Altium Designer 是一款专业的电路设计软件,广泛应用于电子设计自动化(EDA)领域。
它为设计人员提供了一整套工具,包括原理图设计、PCB 设计、FPGA 设计等。
通过使用Altium Designer,设计人员可以轻松地创建、编辑和管理复杂的电路设计。
【2.重置规则的目的和功能】在Altium Designer 中,规则是用于约束和管理设计元素的。
规则可以确保设计元素之间的关系和位置,从而提高设计的准确性和可靠性。
然而,在某些情况下,规则可能需要重置,以解决潜在的问题或实现特定的设计目标。
重置规则的目的是清除现有的规则,以便重新应用新的规则或修复错误。
【3.如何重置规则】要重置规则,请按照以下步骤操作:1) 打开Altium Designer 软件,并加载需要重置规则的设计文件。
2) 在设计文件中,找到需要重置规则的设计元素。
这些元素可以是原理图中的组件、线段或PCB 上的元器件等。
3) 选中需要重置规则的设计元素。
可以使用鼠标单击或按住Ctrl 键进行多选。
4) 在顶部菜单栏中,依次点击“规则”>“重置规则”。
或者,可以直接按快捷键“Ctrl + Alt + R”实现快速重置。
5) 在弹出的“重置规则”对话框中,确认要重置的规则类型,如“全部规则”、“选定规则”或“规则组”。
6) 选择合适的规则类型后,点击“确定”按钮。
Altium Designer 将清除所选设计元素上的现有规则,并应用新的规则。
【4.重置规则的注意事项】在进行规则重置时,请注意以下几点:1) 务必备份原始设计文件,以防止重置规则后出现问题。
2) 在重置规则之前,确保已选中需要重置的设计元素。
如果未选中任何元素,重置规则将无法进行。
CCIE路由和交换考试v5.0 (400-101)
CCIE Routing and Switching Written ExamVersion 5.0 (400-101)Exam Description: The Cisco CCIE® Routing and Switching Written Exam (400-101) version 5.0 is a 2-hour test with 90−110 questions that will validate that professionals have the expertise to: configure, validate, and troubleshoot complex enterprise network infrastructure; understand how infrastructure components interoperate; and translate functional requirements into specific device configurations. The exam is closed book and no outside reference materials are allowed.The following topics are general guidelines for the content likely to be included on the exam. However, other related topics may also appear on any specific delivery of the exam. In order to better reflect the contents of the exam and for clarity purposes, the guidelines below may change at any time without notice.10% 1.0 Network Principles1.1 Network theory1.1.a Describe basic software architecture differences between IOS and IOS XE1.1.a (i) Control plane and Forwarding plane1.1.a (ii) Impact to troubleshooting and performances1.1.a (iii) Excluding specific platform's architecture1.1.b Identify Cisco express forwarding concepts1.1.b (i) RIB, FIB, LFIB, Adjacency table1.1.b (ii) Load balancing Hash1.1.b (iii) Polarization concept and avoidance1.1.c Explain general network challenges1.1.c (i) Unicast flooding1.1.c (ii) Out of order packets1.1.c (iii) Asymmetric routing1.1.c (iv) Impact of micro burst1.1.d Explain IP operations1.1.d (i) ICMP unreachable, redirect1.1.d (ii) IPv4 options, IPv6 extension headers1.1.d (iii) IPv4 and IPv6 fragmentation1.1.d (iv) TTL1.1.d (v) IP MTU1.1.e Explain TCP operations1.1.e (i) IPv4 and IPv6 PMTU1.1.e (ii) MSS1.1.e (iii) Latency1.1.e (iv) Windowing1.1.e (v) Bandwidth delay product1.1.e (vi) Global synchronization1.1.e (vii) Options1.1.f Explain UDP operations1.1.f (i) Starvation1.1.f (ii) Latency1.1.f (iii) RTP/RTCP concepts1.2 Network implementation and operation1.2.a Evaluate proposed changes to a network1.2.a (i) Changes to routing protocol parameters1.2.a (ii) Migrate parts of a network to IPv61.2.a (iii) Routing protocol migration1.2.a (iv) Adding multicast support1.2.a (v) Migrate spanning tree protocol1.2.a (vi) Evaluate impact of new traffic on existing QoS design1.3 Network troubleshooting1.3.a Use IOS troubleshooting tools1.3.a (i) debug, conditional debug1.3.a (ii) ping, traceroute with extended options1.3.a (iii) Embedded packet capture1.3.a (iv) Performance monitor1.3.b Apply troubleshooting methodologies1.3.b (i) Diagnose the root cause of networking issue (analyze symptoms,identify and describe root cause)1.3.b (ii) Design and implement valid solutions according to constraints1.3.b (iii) Verify and monitor resolution1.3.c Interpret packet capture1.3.c (i) Using Wireshark trace analyzer1.3.c (ii) Using IOS embedded packet capture15% 2.0 Layer 2 Technologies2.1 LAN switching technologies2.1.a Implement and troubleshoot switch administration2.1.a (i) Managing MAC address table2.1.a (ii) errdisable recovery2.1.a (iii) L2 MTU2.1.b Implement and troubleshoot layer 2 protocols2.1.b (i) CDP, LLDP2.1.b (ii) UDLD2.1.c Implement and troubleshoot VLAN2.1.c (i) Access ports2.1.c (ii) VLAN database2.1.c (iii) Normal, extended VLAN, voice VLAN2.1.d Implement and troubleshoot trunking2.1.d (i) VTPv1, VTPv2, VTPv3, VTP pruning2.1.d (ii) dot1Q2.1.d (iii) Native VLAN2.1.d (iv) Manual pruning2.1.e Implement and troubleshoot EtherChannel2.1.e (i) LACP, PAgP, manual2.1.e (ii) Layer 2, layer 32.1.e (iii) Load-balancing2.1.e (iv) Etherchannel misconfiguration guard2.1.f Implement and troubleshoot spanning-tree2.1.f (i) PVST+/RPVST+/MST2.1.f (ii) Switch priority, port priority, path cost, STP timers2.1.f (iii) port fast, BPDUguard, BPDUfilter2.1.f (iv) loopguard, rootguard2.1.g Implement and troubleshoot other LAN switching technologies2.1.g (i) SPAN, RSPAN, ERSPAN2.1.h Describe chassis virtualization and aggregation technologies2.1.h (i) Multichassis2.1.h (ii) VSS concepts2.1.h (iii) Alternative to STP2.1.h (iv) Stackwise2.1.h (v) Excluding specific platform implementation2.1.i Describe spanning-tree concepts2.1.i (i) Compatibility between MST and RSTP2.1.i (ii) STP dispute, STP bridge assurance2.2 Layer 2 multicast2.2.a Implement and troubleshoot IGMP2.2.a (i) IGMPv1, IGMPv2, IGMPv32.2.a (ii) IGMP snooping2.2.a (iii) IGMP querier2.2.a (iv) IGMP filter2.2.a (v) IGMP proxy2.2.b Explain MLD2.2.c Explain PIM snooping2.3 Layer 2 WAN circuit technologies2.3.a Implement and troubleshoot HDLC2.3.b Implement and troubleshoot PPP2.3.b (i) Authentication (PAP, CHAP)2.3.b (ii) PPPoE2.3.b (iii) MLPPP2.3.c Describe WAN rate-based ethernet circuits2.3.c (i) Metro and WAN Ethernet topologies2.3.c (ii) Use of rate-limited WAN ethernet services40% 3.0 Layer 3 Technologies3.1 Addressing technologies3.1.a Identify, implement and troubleshoot IPv4 addressing and subnetting3.1.a (i) Address types, VLSM3.1.a (ii) ARP3.1.b Identify, implement and troubleshoot IPv6 addressing and subnetting3.1.b (i) Unicast, multicast3.1.b (ii) EUI-643.1.b (iii) ND, RS/RA3.1.b (iv) Autoconfig/SLAAC, temporary addresses (RFC4941)3.1.b (v) Global prefix configuration feature3.1.b (vi) DHCP protocol operations3.1.b (vii) SLAAC/DHCPv6 interaction3.1.b (viii) Stateful, stateless DHCPv63.1.b (ix) DHCPv6 prefix delegation3.2 Layer 3 multicast3.2.a Troubleshoot reverse path forwarding3.2.a (i) RPF failure3.2.a (ii) RPF failure with tunnel interface3.2.b Implement and troubleshoot IPv4 protocol independent multicast3.2.b (i) PIM dense mode, sparse mode, sparse-dense mode3.2.b (ii) Static RP, auto-RP, BSR3.2.b (iii) BiDirectional PIM3.2.b (iv) Source-specific multicast3.2.b (v) Group to RP mapping3.2.b (vi) Multicast boundary3.2.c Implement and troubleshoot multicast source discovery protocol3.2.c (i) Intra-domain MSDP (anycast RP)3.2.c (ii) SA filter3.2.d Describe IPv6 multicast3.2.d (i) IPv6 multicast addresses3.2.d (ii) PIMv63.3 Fundamental routing concepts3.3.a Implement and troubleshoot static routing3.3.b Implement and troubleshoot default routing3.3.c Compare routing protocol types3.3.c (i) Distance vector3.3.c (ii) Link state3.3.c (iii) Path vector3.3.d Implement, optimize and troubleshoot administrative distance3.3.e Implement and troubleshoot passive interface3.3.f Implement and troubleshoot VRF lite3.3.g Implement, optimize and troubleshoot filtering with any routing protocol3.3.h Implement, optimize and troubleshoot redistribution between any routingprotocol3.3.i Implement, optimize and troubleshoot manual and auto summarization withany routing protocol3.3.j Implement, optimize and troubleshoot policy-based routing3.3.k Identify and troubleshoot sub-optimal routing3.3.l Implement and troubleshoot bidirectional forwarding detection3.3.m Implement and troubleshoot loop prevention mechanisms3.3.m (i) Route tagging, filtering3.3.m (ii) Split horizon3.3.m (iii) Route poisoning3.3.n Implement and troubleshoot routing protocol authentication3.3.n (i) MD53.3.n (ii) Key-chain3.3.n (iii) EIGRP HMAC SHA2-256bit3.3.n (iv) OSPFv2 SHA1-196bit3.3.n (v) OSPFv3 IPsec authentication3.4 RIP (v2 and v6)3.4.a Implement and troubleshoot RIPv23.4.b Describe RIPv6 (RIPng)3.5 EIGRP (for IPv4 and IPv6)3.5.a Describe packet types3.5.a (i) Packet types (hello, query, update, and such)3.5.a (ii) Route types (internal, external)3.5.b Implement and troubleshoot neighbor relationship3.5.b (i) Multicast, unicast EIGRP peering3.5.b (ii) OTP point-to-point peering3.5.b (iii) OTP route-reflector peering3.5.b (iv) OTP multiple service providers scenario3.5.c Implement and troubleshoot loop free path selection3.5.c (i) RD, FD, FC, successor, feasible successor3.5.c (ii) Classic metric3.5.c (iii) Wide metric3.5.d Implement and troubleshoot operations3.5.d (i) General operations3.5.d (ii) Topology table, update, query, active, passive3.5.d (iii) Stuck in active3.5.d (iv) Graceful shutdown3.5.e Implement and troubleshoot EIGRP stub3.5.e (i) Stub3.5.e (ii) Leak-map3.5.f Implement and troubleshoot load-balancing3.5.f (i) equal-cost3.5.f (ii) unequal-cost3.5.f (iii) add-path3.5.g Implement EIGRP (multi-address) named mode3.5.g (i) Types of families3.5.g (ii) IPv4 address-family3.5.g (iii) IPv6 address-family3.5.h Implement, troubleshoot and optimize EIGRP convergence and scalability3.5.h (i) Describe fast convergence requirements3.5.h (ii) Control query boundaries3.5.h (iii) IP FRR/fast reroute (single hop)3.5.8 (iv) Summary leak-map3.5.h (v) Summary metric3.6 OSPF (v2 and v3)3.6.a Describe packet types3.6.a (i) LSA yypes (1, 2, 3, 4, 5, 7, 9)3.6.a (ii) Route types (N1, N2, E1, E2)3.6.b Implement and troubleshoot neighbor relationship3.6.c Implement and troubleshoot OSPFv3 address-family support3.6.c (i) IPv4 address-family3.6.c (ii) IPv6 address-family3.6.d Implement and troubleshoot network types, area types and router types3.6.d (i) Point-to-point, multipoint, broadcast, non-broadcast3.6.d (ii) LSA types, area type: backbone, normal, transit, stub, NSSA, totallystub3.6.d (iii) Internal router, ABR, ASBR3.6.d (iv) Virtual link3.6.e Implement and troubleshoot path preference3.6.f Implement and troubleshoot operations3.6.f (i) General operations3.6.f (ii) Graceful shutdown3.6.f (iii) GTSM (Generic TTL Security Mechanism)3.6.g Implement, troubleshoot and optimize OSPF convergence and scalability3.6.g (i) Metrics3.6.g (ii) LSA throttling, SPF tuning, fast hello3.6.g (iii) LSA propagation control (area types, ISPF)3.6.g (iv) IP FRR/fast reroute (single hop)3.6.g (v) LFA/loop-free alternative (multi hop)3.6.g (vi) OSPFv3 prefix suppression3.7 BGP3.7.a Describe, implement and troubleshoot peer relationships3.7.a (i) Peer-group, template3.7.a (ii) Active, passive3.7.a (iii) States, timers3.7.a (iv) Dynamic neighbors3.7.b Implement and troubleshoot IBGP and EBGP3.7.b (i) EBGP, IBGP3.7.b (ii) 4 bytes AS number3.7.b (iii) Private AS3.7.c Explain attributes and best-path selection3.7.d Implement, optimize and troubleshoot routing policies3.7.d (i) Attribute manipulation3.7.d (ii) Conditional advertisement3.7.d (iii) Outbound route filtering3.7.d (iv) Communities, extended communities3.7.d (v) Multi-homing3.7.e Implement and troubleshoot scalability3.7.e (i) Route-reflector, cluster3.7.e (ii) Confederations3.7.e (iii) Aggregation, AS set3.7.f Implement and troubleshoot multiproctocol BGP3.7.f (i) IPv4, IPv6, VPN address-family3.7.g Implement and troubleshoot AS path manipulations3.7.g (i) Local AS, allow AS in, remove private AS3.7.g (ii) Prepend3.7.g (iii) Regexp3.7.h Implement and troubleshoot other features3.7.h (i) Multipath3.7.h (ii) BGP synchronization3.7.h (iii) Soft reconfiguration, route refresh3.7.i Describe BGP fast convergence features3.7.i (i) Prefix independent convergence3.7.i (ii) Add-path3.7.i (iii) Next-hop address tracking3.8 ISIS (for IPv4 and IPv6)3.8.a Describe basic ISIS network3.8.a (i) Single area, single topology3.8.b Describe neighbor relationship3.8.c Describe network types, levels and router types3.8.c (i) NSAP addressing3.8.c (ii) Point-to-point, broadcast3.8.d Describe operations3.8.e Describe optimization features3.8.e (i) Metrics, wide metric15% 4.0 VPN Technologies4.1 Tunneling4.1.a Implement and troubleshoot MPLS operations4.1.a (i) Label stack, LSR, LSP4.1.a (ii) LDP4.1.a (iii) MPLS ping, MPLS traceroute4.1.b Implement and troubleshoot basic MPLS L3VPN4.1.b (i) L3VPN, CE, PE, P4.1.b (ii) Extranet (route leaking)4.1.c Implement and troubleshoot encapsulation4.1.c (i) GRE4.1.c (ii) Dynamic GRE4.1.c (iii) LISP encapsulation principles supporting EIGRP OTP4.1.d Implement and troubleshoot DMVPN (single hub)4.1.d (i) NHRP4.1.d (ii) DMVPN with IPsec using preshared key4.1.d (iii) QoS profile4.1.d (iv) Pre-classify4.1.e Describe IPv6 tunneling techniques4.1.e (i) 6in4, 6to44.1.e (ii) ISATAP4.1.e (iii) 6RD4.1.e (iv) 6PE/6VPE4.1.g Describe basic layer 2 VPN —wireline4.1.g (i) L2TPv3 general principals4.1.g (ii) ATOM general principals4.1.h Describe basic L2VPN — LAN services4.1.h (i) MPLS-VPLS general principals4.1.h (ii) OTV general principals4.2 Encryption4.2.a Implement and troubleshoot IPsec with preshared key4.2.a (i) IPv4 site to IPv4 site4.2.a (ii) IPv6 in IPv4 tunnels4.2.a (iii) Virtual tunneling Interface (VTI)4.2.b Describe GET VPN5% 5.0 Infrastructure Security5.1 Device security5.1.a Implement and troubleshoot IOS AAA using local database5.1.b Implement and troubleshoot device access control5.1.b (i) Lines (VTY, AUX, console)5.1.b (ii) SNMP5.1.b (iii) Management plane protection5.1.b (iv) Password encryption5.1.c Implement and troubleshoot control plane policing5.1.d Describe device security using IOS AAA with TACACS+ and RADIUS5.1.d (i) AAA with TACACS+ and RADIUS5.1.d (ii) Local privilege authorization fallback5.2 Network security5.2.a Implement and troubleshoot switch security features5.2.a (i) VACL, PACL5.2.a (ii) Stormcontrol5.2.a (iii) DHCP snooping5.2.a (iv) IP source-guard5.2.a (v) Dynamic ARP inspection5.2.a (vi) port-security5.2.a (vii) Private VLAN5.2.b Implement and troubleshoot router security features5.2.b (i) IPv4 access control lists (standard, extended, time-based)5.2.b (ii) IPv6 traffic filter5.2.b (iii) Unicast reverse path forwarding5.2.c Implement and troubleshoot IPv6 first hop security5.2.c (i) RA guard5.2.c (ii) DHCP guard5.2.c (iii) Binding table5.2.c (iv) Device tracking5.2.c (v) ND inspection/snooping5.2.c (vii) Source guard5.2.c (viii) PACL5.2.d Describe 802.1x5.2.d (i) 802.1x, EAP, RADIUS5.2.d (ii) MAC authentication bypass15% 6.0 Infrastructure Services6.1 System management6.1.a Implement and troubleshoot device management6.1.a (i) Console and VTY6.1.a (ii) telnet, HTTP, HTTPS, SSH, SCP6.1.a (iii) (T)FTP6.1.b Implement and troubleshoot SNMP6.1.b (i) v2c, v36.1.c Implement and troubleshoot logging6.1.c (i) Local logging, syslog, debug, conditional debug6.1.c (ii) Timestamp6.2 Quality of service6.2.a Implement and troubleshoot end-to-end QoS6.2.a (i) CoS and DSCP mapping6.2.b Implement, optimize and troubleshoot QoS using MQC6.2.b (i) Classification6.2.b (ii) Network based application recognition (NBAR)6.2.b (iii) Marking using IP precedence, DSCP, CoS, ECN6.2.b (iv) Policing, shaping6.2.b (v) Congestion management (queuing)6.2.b (vi) HQoS, sub-rate ethernet link6.2.b (vii) Congestion avoidance (WRED)6.2.c Describe layer 2 QoS6.2.c (i) Queuing, scheduling6.2.c (ii) Classification, marking6.3 Network services6.3.a Implement and troubleshoot first-hop redundancy protocols6.3.a (i) HSRP, GLBP, VRRP6.3.a (ii) Redundancy using IPv6 RS/RA6.3.b Implement and troubleshoot network time protocol6.3.b (i) NTP master, client, version 3, version 46.3.b (ii) NTP Authentication6.3.c Implement and troubleshoot IPv4 and IPv6 DHCP6.3.c (i) DHCP client, IOS DHCP server, DHCP relay6.3.c (ii) DHCP options6.3.c (iii) DHCP protocol operations6.3.c (iv) SLAAC/DHCPv6 interaction6.3.c (v) Stateful, stateless DHCPv66.3.c (vi) DHCPv6 prefix delegation6.3.d Implement and troubleshoot IPv4 network address translation6.3.d (i) Static NAT, dynamic NAT, policy-based NAT, PAT6.3.d (ii) NAT ALG6.3.e Describe IPv6 network address translation6.3.e (i) NAT646.3.e (ii) NPTv66.4 Network optimization6.4.a Implement and troubleshoot IP SLA6.4.a (i) ICMP, UDP, Jitter, VoIP6.4.b Implement and troubleshoot tracking object6.4.b (i) Tracking object, tracking list6.4.b (ii) Tracking different entities (e.g. interfaces, routes, IPSLA, and such)6.4.c Implement and troubleshoot netflow6.4.c (i) Netflow v5, v96.4.c (ii) Local retrieval6.4.c (iii) Export (configuration only)6.4.d Implement and troubleshoot embedded event manager6.4.d (i) EEM policy using applet6.4.e Identify performance routing (PfR)6.4.e (i) Basic load balancing6.4.e (ii) Voice optimization。
2017年下半年系统架构设计师考试下午真题(完整版)
2017年下半年系统架构设计师考试下午真题(专业解析+参考答案)1、阅读以下关于软件架构评估的叙述,在答题纸上回答问题1和问题2.【说明】某单位为了建设健全的公路桥梁养护管理档案,拟开发一套公路桥梁在线管理系统。
在系统的需求分析与架构设计阶段,用户提出的需求、质量属性描述和架构特性如下:(a) 系统用户分为高级管理员、数据管理员和数据维护员等三类;(b) 系统应该具备完善的安全防护措施,能够对黑客的攻击行为进行检测与防御;(c) 正常负载情况下,系统必须在 0.5 秒内对用户的查询请求进行响应;(d) 对查询请求处理时间的要求将影响系统的数据传输协议和处理过程的设计;(e) 系统的用户名不能为中文,要求必须以字母开头,长度不少于5个字符;(f) 更改系统加密的级别将对安全性和性能产生影响;(g) 网络失效后,系统需要在 10 秒内发现错误并启用备用系统;(h) 查询过程中涉及到的桥梁与公路的实时状态视频传输必须保证画面具有1024*768的分辨率, 40帧 /秒的速率;(i) 在系统升级时,必须保证在 10 人月内可添加一个新的消息处理中间件;(j) 系统主站点断电后,必须在 3 秒内将请求重定向到备用站点;(k) 如果每秒钟用户查询请求的数量是 10 个,处理单个请求的时间为 30 毫秒,则系统应保证在 1秒内完成用户的查询请求;(l) 对桥梁信息数据库的所有操作都必须进行完整记录;(m) 更改系统的 Web 界面接口必须在 4 人周内完成;(n) 如果"养护报告生成"业务逻辑的描述尚未达成共识,可能导致部分业务功能模块规则的矛盾,影响系统的可修改性(O) 系统必须提供远程调试接口,并支持系统的远程调试。
在对系统需求,质量属性描述和架构特性进行分析的基础上,系统的架构师给出了三个候选的架构设计方案,公司目前正在组织系统开发的相关人员对系统架构进行评估。
问题内容:【问题 1】(12 分)在架构评估过程中,质量属性效用树 (utility tree) 是对系统质量属性进行识别和优先级排序的重要工具。
结构专业的面试题及答案
结构专业的面试题及答案专业面试题及答案1. 软件开发工程师面试题题目:请解释什么是SOLID原则,并给出一个例子。
答案: SOLID原则是面向对象设计中常用的五个指导原则,它们分别是:- 单一职责原则(Single Responsibility Principle):一个类应该只有一个引起它变化的原因。
- 开闭原则(Open/Closed Principle):软件实体应该对扩展开放,对修改关闭。
- 里氏替换原则(Liskov Substitution Principle):子类型必须能够替换掉它们的父类型。
- 接口隔离原则(Interface Segregation Principle):客户端不应该依赖它不使用的方法。
- 依赖倒置原则(Dependency Inversion Principle):高层模块不应该依赖于低层模块,两者都应该依赖于抽象。
例如,假设有一个`Shape`接口,它定义了一个`draw`方法,根据单一职责原则,我们可以为每种形状创建一个单独的类,如`Circle`和`Square`,它们都实现`Shape`接口。
这样,`Circle`类就只负责绘制圆形,而`Square`类只负责绘制正方形。
2. 数据分析师面试题题目:如何处理缺失数据?答案:处理缺失数据的方法包括:- 删除法:直接删除含有缺失值的行或列。
- 填充法:用某些统计值(如均值、中位数、众数)填充缺失值。
- 预测法:使用机器学习模型预测缺失值。
- 插值法:根据数据的分布特点,如时间序列数据的前后值,进行插值。
- 多重插补法:创建多个完整的数据集,每个数据集使用不同的方法填充缺失值,最后取这些数据集的平均值。
例如,如果我们有一个数据集,其中某些行的销售额数据缺失,我们可以选择用该列的均值来填充这些缺失值。
3. 产品经理面试题题目:描述一下你如何确定产品需求的优先级。
答案:确定产品需求的优先级通常包括以下步骤:- 理解业务目标:首先需要明确产品的目标和业务目标。
高级项目经理考试习题及答案
高级项目经理考试习题及答案大全一、单选题(共60题)1、在下面的软件开发方法中,(B)对软件设计和开发人员的开发要求最高。
A、结构化方法B、原型化方法C、面向对象的方法D、控制流方法2、系统/软件开发的原型化方法是一种有效的开发方法,下述基本环节中(D)是原型形成以后才实施的内容。
A、识别基本需要B、开发工作模型C、修正和改进模型D、进行细部说明3、在开发一个系统时,如果用户对系统的目标不很清楚,难以定义需求,这时最好采用(A)。
A、原型法B、瀑布模型C、V-模型D、螺旋模型4、软件工程方法是在实践中不断发展的方法,而早期的软件工程方法是(B)。
A、明确的需求定义B、结构化方法C、面向对象方法D、功能分析法5、软件开发常使用的两种基本方法是结构化和原型化方法,在实际应用中,他们之间的关系经常变现为(B).A、自外向内B、互相补充C、独立使用D、交替使用6、原型化方法用户观看原型系统运行情况,形成(A)的意见。
A、改进用户界面设计B、使用与不使用那一种编程语言C、程序结构D、执行速度是否满足要求7、原型化方法从用户界面的开发人员入手,首先形成(C)。
A、需要不确定性的用户界面B、用户界面需求分析说明书C、系统界面原型D、完善的用户界面8、原型化方法是一类动态定义需求的方法,下列叙述中,(A)不具有原型化方法的特征。
A、加快系统架构设计B、加强用户参与和决策C、简化项目管理D、加快需求的确定9、状态图中,信息流被触发的必要条件是(C)。
A、某个活动的输入对象可用B、某个输入信号的到来C、前一活动的完成D、入口条件得以满足10、对象的状态,错误的说法是(B)。
A、对象在交互中具有不同的状态B、状态可以在对象间转换或变换、转移C、状态的变换需要事件触发D、触发一个状态变换完成需要执行一个动作11、状态图定义了状态机的表示符号,以下说法不正确的是(B)。
A、在对象的生命周期中,状态机用来捕捉由外部事件引起的变化B、在交互过程中对象的状态总是在不断地改变,状态没有变化就没有交互C、状态图建设对象生命周期各个时期的状态以及引起变化的事件D、事件对对象发出命令、命令导致对象发生变化,反过来影响对象的行为12、活动图用于对一个系统的动态方面建模。
平衡连杆英语
平衡连杆英语A Balanced Linkage。
In the field of mechanical engineering, a balanced linkage is a mechanism that consists of multiple links connected by joints, designed to achieve a specific motion or function. The concept of a balanced linkage revolves around the idea of distributing forces and motions evenly among the links, ensuring stability and efficiency in the system. This article will delve into the principles and applications of balanced linkages, highlighting their importance in various industries.The fundamental principle behind a balanced linkage lies in the equalization of forces and motions within the mechanism. By carefully designing the lengths and positions of the links, engineers can achieve a state of equilibrium where the forces acting on each link are balanced. This equilibrium is crucial for the smooth operation of the linkage, as any imbalance can lead to excessive wear, energy loss, or even failure of the system.One of the most common applications of balanced linkages is in the automotive industry, specifically in the design of suspension systems. A well-designed suspension system ensures a smooth and comfortable ride by absorbing shocks and vibrations from the road surface. Balanced linkages play a vital role in achieving this, as they distribute the forces and motions generated by the vehicle's movement evenly throughout the system. This not only enhances the vehicle's stability but also improves its handling and maneuverability.Another significant application of balanced linkages can be found in robotics. In robotic arms and manipulators, balanced linkages are used to control the movement and positioning of the end effector. By carefully balancing the forces and motions within the mechanism, engineers can ensure precise and accurate control over the robot's actions. This is particularly important in applications that require delicate and intricate movements, such as in surgical robots or assembly line automation.Furthermore, balanced linkages are also utilized in various machines and equipment that require smooth and efficient motion. For example, in printing presses, balanced linkages are employed to control the movement of the printing plates, ensuring precise registration and alignment. Similarly, in packaging machines, balanced linkages enable the smooth and synchronized motion of the various components, facilitating the packaging process.In addition to their mechanical applications, balanced linkages also find their use in other fields, such as architecture and design. Architects often employ balanced linkages in the design of movable structures, such as retractable roofs or folding facades. By utilizing balanced linkages, these structures can be easily operated and adjusted while maintaining stability and structural integrity.In conclusion, balanced linkages are essential mechanisms in various industries, providing stability, efficiency, and precise control over motion. From automotive suspensions to robotic arms, these linkages play a crucial role in ensuring smooth and reliable operation. Their applications extend beyond mechanical engineering, finding utility in architecture and design as well. As technology continues to advance, the development and optimization of balanced linkages will undoubtedly contribute to the progress and innovation in numerous fields.。
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1. Introduction and statement of the main theorem Let X be a finite set (of points) equipped with a finite collection of subsets called lines or blocks. I shall refer to such a structure as a design. Other words are incidence structure or relation. The design is called reduced if no two lines consist of the same points (i.e. the points distinguish lines) and, dually, no two points have exactly the same set of lines passing through them (the lines distinguish points). The main theorem is now as follows. 1.1. THEOREM. Let A be a reduced design with n lines and m points. Suppose that (a) Through each distinct two points there pass λ > 0 lines (b) Each two distinct lines intersect in µ > 0 points. If λ = µ = 1 assume, moreover, that there are four points no three of which are on one line. Then n = m , λ = µ , and there is a number r such that all ligh each point there pass r lines. The number r is given by r (r − 1) = (n − 1)λ . In design theory, [1, 3] condition (a) is referred to as balance, pairwise balance, or 2-balance, and such a design is often called a 2-design. A design that satisfies condition (b) is called linked, [3]. A balance incomplete block design (BIBD) is a reduced design such that each line (block) has the same number k < m of points, through each point there pass the same number r of lines and the design is 2-balanced. A BIBD is symmetric if n = m . It then follows that the design is also linked with λ = µ (and, trivially, that k = r ). Inversely a linked BIBD is symmetric, loc. cit. In this terminology the theorem above is reformulated as 1.2. THEOREM. A linked, balanced, reduced design is a symmetric BIBD or it is given by a matrix of the form (2.3.1) below (which is a fan of (n − 1) ≥ 1 lines through a point intersecting one additional line).
λ r2 O L
L O O
λ
λ M λ rm
(2.1.1)
with ri ≥ λ > 0 for each i. Suppose that ri = rj = λ for two different indices i and j. Then these two rows would be identical which is not the case by assumption. By lemma 2.4 below, it follows that the matrix (2.1.1) is nonsingular. It follows that n ≥ m . Similarly, by considering BT B we see that m ≥ n , and so m = n . So we have: r1 λ BBT = M λ s1 λ BT B = M λ
1
Linked Balanced Designs are Symmetric BIBD’s
Michiel Hazewinkel
CWI P.O. Box 94079 1090 GB Amsterdam The Netherlands mich@cwi.nl
Abstract
Let A be a reduced incidence relation between n lines and m points. Suppose that (a) Through each two points there pass λ lines (b) Each two lines intersect in µ points. If λ = µ = 1 assume, moreover, that there are four points no three of which are on one line. Then n = m , λ = µ , and there is a number r such that all lines have r points and through each point there pass r lines. The number r is given by r (r − 1) = (n − 1)λ . Mathematics subject classification 1991: 05B05, 05B20, 05B25, 05B30, 51B05, 51E05. Key words & phrases: BIBD, design, block design, balanced incomplete block design, system of points and lines, generalized projective space, linked design, balanced design.
2
This formulation fits with the title of this paper. In case λ = µ = 1, theorem 1.1 is a well known and elementary result from finite projective geometry. 2. Proof of the main theorem. Let A be a reduced balanced linked design as in the formulation of the theorem. We shall work with the incidence matrix of the design which will be denoted B. The columns of B are indexed by the lines of the design and the rows are indexed by the points of the design. The entry at spot (i, j ) of B is 1 if and only if line j passes through point i (or point i is on line j). All other entries are zero. The condition that A be reduced is equivalent to the condition that the incidence matrix B has no identical columns and no identical rows. Condition (a) of theorem 1.1 means that that each two rows of B have λ 1’s in common, and condition (b) means that each two columns have µ 1’s in common. 2.1. Proof of the theorem. The case that λ = µ = 1, is taken care of by a very well known and elementary fact in finite projective geometry, cf e.g. [2]. Thus we can from now on assume that at least one of λ , µ is larger than 1. For each row i let ri be the number of 1’s in it. Then the product of the m × n matrix B with its transpose is equal to r1 λ BBT = M λ