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35KV及以下交联聚乙烯绝缘电力电缆超低频（0.1HZ）耐压试验方法35KV及以下交联聚乙烯绝缘电力电缆超低频（0.1HZ）耐压试验方法Very-Low-Frequency Wave（0.1H Z）Voltage Test for XLPE power Cable Rared Up to 35KV1 范围本标准规定了超低频（0.1HZ）耐压试验作为判断投入运行后的交联聚乙烯绝缘电力电缆运行状态的手段的试验方法。
2 引用标准下列标准所包含的条文，通过在本标准中引用而构成为本标准的条文。
本标准出版时，所示版本均为有效。
所有标准都会被修订，使用本标准的各方应探讨使用下列标准最新版本的可能性。
DINVDE0276·1001 已敷设的额定电压U0/U为6/10KV，12/20KV和18/30KV PVC绝缘，XLPE绝缘或油纸绝缘电力电费的试验JB3373 大型高压交流电机定子绝缘耐压试验规范IEEESrd.433 高压大型旋转电机超低频绝缘试验DL/T596 电力设备预防性试验规程3 超低频（0.1HZ）耐压试验作用概述超低频（0.1HZ）耐压试验是鉴定交联聚乙烯绝缘电力电缆绝缘强度的直接方法，可作为判断投运后的交联聚乙烯绝缘电力电缆能否继续投入运行的重要参考依据。
超低频（0.1HZ）耐压试验是破坏性试验，试验时，建议使用10000伏兆欧表对试品电缆先进行绝缘电阻试验，记录试验结果。
超低频（0.1HZ）耐压试验设备一般由0.1HZ电压发生器、输出试验电压的波形或频率批示器、显示输出峰值电压和电流的仪表、记录试验时间的计时器、保护电阻、长度不小于30米的特制柔性连接电缆等部分组成。
试验设备必须具备有可靠的过流或过压保护功能、启动功能以及内置放电功能。
4 试验设备4.1 0.1HZ电压发生器0.1HZ电压发生器，提供正弦波或余弦方波电压，能够连续升压，输出电压幅值不稳定性应小于1%，在其额定电压下，波形不失真的负载电容能力不小于1.5μF。
3D7701-1中文资料
MONOLITHIC GATEDDELAY LINE OSCILLATOR (SERIES 3D7701)FEATURES• All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs• Vapor phase, IR and wave solderable • Auto-insertable (DIP pkg.)• Frequency range: 0.3MHz through 100MHz • Frequency tolerance: 0.5% typical• Temperature stability: ±1.5% typical (-40C to 85C) • Vdd stability: ±0.5% typical (4.75V to 5.25V) • 14-pin DIP available as drop-in replacements for hybrid delay line oscillator (DLO31F)FUNCTIONAL DESCRIPTIONThe 3D7701 Delay Line Oscillator product family consists of fixed-frequency CMOS integrated circuit oscillators. Each package contains a single oscillator, which is gated and can therefore be synchronized to an external signal. The device frequency can range from 0.3MHz through 100MHz. The 3D7701 has two outputs that are in phase when the oscillator is running, and can be used as a drop-in replacement for theDLO31F hybrid oscillator. The 3D7701 is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC package.PACKAGES1413121110981234567O1NC NC NC NC NC GNDVDD NC NC NC O2 NC EN3D7701-xx DIP-143D7701K-xx NC pins removed12348765O1NC NC GND VDD NC O2 EN3D7701Z-xx SOIC-8PIN DESCRIPTIONSEN Oscillator EnableO1 Oscillator Output 1 O2 Oscillator Output 2 VDD +5 Volts GND Ground TABLE 1: PART NUMBER SPECIFICATIONSOUTPUT FREQUENCY (MHz) DASH NUMBER 25C Vdd=5.00V -40C to 85C 4.75<Vdd<5.25 -0.3 0.3 ± 0.002 0.3 ± 0.008 -0.4 0.4 ± 0.002 0.4 ± 0.010 -0.5 0.5 ± 0.003 0.5 ± 0.013 -0.75 0.75 ± 0.004 0.75 ± 0.019 -1 1.0 ± 0.005 1.0 ± 0.025 -2 2.0 ± 0.010 2.0 ± 0.050 -2.5 2.5 ± 0.013 2.5 ± 0.063 -3 3.0 ± 0.015 3.0 ± 0.075 -4 4.0 ± 0.020 4.0 ± 0.100 -5 5.0 ± 0.025 5.0 ± 0.125 -7.5 7.5 ± 0.038 7.5 ± 0.188 -10 10.0 ± 0.05 10.0 ± 0.25 -20 20.0 ± 0.10 20.0 ± 0.50 -25 25.0 ± 0.13 25.0 ± 0.63 -30 30.0 ± 0.15 30.0 ± 0.75 -40 40.0 ± 0.20 40.0 ± 1.00 -50 50.0 ± 0.25 50.0 ± 1.25 -75 75.0 ± 0.38 75.0 ± 3.75 -100100.0 ± 0.50 100.0 ± 7.00NOTE: Any dash number between 0.3 and 100 not shown is also available as standard.2006 Data Delay DevicesAPPLICATION NOTESOPERATIONAL DESCRIPTIONThe 3D7701 delay line oscillator architecture is shown in Figure 1. The internal delay line is composed of a number of delay cells connected in series and is compensated for thermal and supply voltage variations. A low-going edge on the EN input starts the oscillator, with the O2 output responding immediately. The O1 output isdelayed by ½ cycle. The response of the output when the oscillator is disabled depends on the status of O2 when the EN signal goes high, as shown in Figure 2. If O2 is low, it will remain low, and the final pulse on O1 will be ½ of the period. If O2 is high, it will go low as soon as EN goes high, and the final pulse on both outputs will have a width smaller than ½ the period.Figure 1: 3D7701 Functional DiagramENO1O2Figure 2: 3D7701 Timing DiagramsENO1O2APPLICATION NOTES (CONT’D)POWER SUPPLY AND TEMPERATURE CONSIDERATIONS The delay of CMOS integrated circuits is strongly dependent on power supply and temperature. The monolithic 3D7701 oscillator utilizes novel and innovative compensation circuitry to minimize the frequency variations induced by fluctuations in power supply and/or temperature. The thermal coefficient is reduced to 250 PPM/C, which is equivalent to a variation, over the -40C to 85C operating range, of ±1.5% from the room-temperature frequency setting. The power supply coefficient is reduced, over the 4.75V to 5.25V operating range, to ±0.5% of the frequency setting at the nominal 5.0VDC power supply. These specifications hold for the lower frequencies only. For higher dash numbers, the variations will be slightly greater, as noted in Table 1. It is essential that the power supply pin be adequately bypassed and filtered. In addition, the power bus should be of as low an impedance construction as possible. Power planes are preferred.DEVICE SPECIFICATIONSTABLE 2: ABSOLUTE MAXIMUM RATINGSPARAMETER SYMBOL MIN MAXUNITSNOTES DC Supply Voltage V DD -0.3 7.0 VInput Pin Voltage V IN -0.3V DD+0.3 VInput Pin Current I IN -1.0 1.0 mA25C Storage Temperature T STRG -55 150 CLead Temperature T LEAD300 C10secTABLE 3: DC ELECTRICAL CHARACTERISTICS(-40C to 85C, 4.75V to 5.25V)PARAMETER SYMBOLMINTYPMAXUNITSNOTES Static Supply Current* I DD 3.55.5mAHigh Level Input Voltage V IH 2.0 VLow Level Input Voltage V IL0.8 VHigh Level Input Current I IH 1.0µA V IH = V DDLow Level Input Current I IL 1.0µA V IL = 0VHigh Level Output Current I OH-35.0-4.0mAV DD = 4.75VV OH = 2.4VLow Level Output Current I OL 4.015.0 mAV DD = 4.75VV OL = 0.4V Output Rise & Fall Time T R & T F 2.0 2.5 ns C LD = 5 pf *I DD(Dynamic) = 2 * C LD * V DD * F Input Capacitance = 10 pf typical where: C LD = Average capacitance load/output (pf) Output Load Capacitance (C LD) = 25 pf maxF = Device frequency (GHz)SILICON DELAY LINE AUTOMATED TESTINGTEST CONDITIONSINPUT:OUTPUT:Ambient Temperature: 25o C ± 3o C R load: 10KΩ± 10%Supply Voltage (Vcc): 5.0V ± 0.1V C load: 5pf± 10%Input Pulse:High = 3.0V ± 0.1V Threshold: 1.5V (Rising & Falling)Low = 0.0V ± 0.1VSource Impedance: 50Ω Max.10KΩ470Ω5pfDevice Under Test Digital ScopeRise/Fall Time: 3.0 ns Max. (measuredbetween 0.6V and 2.4V )NOTE:The above conditions are for test only and do not in any way restrict the operation of the device.Figure 3: Test SetupFigure 4: Timing Diagram。
LD7530LD7530A
Absolute Maximum Ratings
Supply Voltage VCC COMP, CT, CS Junction Temperature Operating Ambient Temperature Storage Temperature Range Package Thermal Resistance (SOT-26) Package Thermal Resistance (DIP-8) Power Dissipation (SOT-26, at Ambient Temperature = 85°C) Power Dissipation (DIP-8, at Ambient Temperature = 85°C) Lead temperature (Soldering, 10sec) ESD Voltage Protection, Human Body Model ESD Voltage Protection, Machine Model Gate Output Current
VCOMP=0V VCOMP=3V Protection tripped (OLP, OVP)
UVLO (off)
UVLO (on)
OVP Level
LD7530 LD7530A
Voltage Feedback (Comp Pin)
Short Circuit Current Open Loop Voltage
And to satisfy different designs, 2 versions of OVP levels are implemented as ---
z LD7530 --- 28.0V ± 1.2V.
z LD7530A --- 21.0V ± 1.2V.
AD8148中文资料
Triple Differential Driver for Wideband Video
AD8146/AD8147/AD8148
FUNCTIONAL BLOCK DIAGRAMS
VS+ –IN B +IN B VS– VOCMA VOCMB
OPD 1 VS– 2 –IN A 3 +IN A 4 VS– 5 –OUT A 6
Output balance error −50 dB @ 50 MHz On-chip, sync-on common-mode encoding (AD8147/AD8148) Output pull-down feature for line isolation Low power: 57 mA @ 5 V for 3 drivers (AD8146) Wide supply voltage range: +5 V to ±5 V Available in a small 4 mm × 4 mm LFCSP
Thermal Resistance ...................................................................... 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ........................................... 10 Theory of Operation ...................................................................... 14 Definition of Terms.................................................................... 14 Analyzing an Application Circuit............................................. 14 Closed-Loop Gain ...................................................................... 14 Calculating the Input Impedance............................................. 15
电力电缆技术参数
0.8347
2.2096
0.8609
2.4602
导体最大拉抗力 kN
铜
铝
0.56
0.18
0.94
0.29
1.50
0.47
2.26
0.71
3.76
1.18
6.02
1.88
9.40
2.94
13.2
4.11
18.8
5.88
26.3
8.23
35.7
11.2
45.1
14.1
56.4
17.6
69.6
21.7
90.2
正捷电缆网 、电缆服务网 联合提供
标称截 面mm2 1.5 2.5
1 6 10 16 25 35 50 70 95 120 150 185 240 300 400 500 630
导体外径 mm
紧压圆形
普通圆形
1.38
1芯
非铠装 铠装
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.4
1.8
1.5
1.8
1.5
1.8
1.6
1.8
1.6
1.8
1.7
1.9
1.8
2.0
1.9
2.1
2.0
2.2
2.2
2.3
2芯
非铠装 铠装
1.8
1.8
1.8
1.8
1.8
1.8
1.8
MCZ33883EGR2资料
Document Number: MC33883Rev 9.0, 1/2007Freescale Semiconductor Advance Information* This document contains certain information on a new product.Specifications and information herein are subject to change without notice.© Freescale Semiconductor, Inc., 2007. All rights reserved.H-Bridge Gate Driver ICThe 33883 is an H-bridge gate driver (also known as a full-bridge pre-driver) IC with integrated charge pump and independent high-•V CC •V CC2••••••••Figure 1. 33883 Simplified Application Diagram33883Analog Integrated Circuit Device Data33883INTERNAL BLOCK DIAGRAMINTERNAL BLOCK DIAGRAMFigure 2. 33883 Simplified Internal Block DiagramUndervolt-age/Over-voltageG_ENIN_HS1IN_LS1IN_HS2IN_LS2GATE_LS1SRC_HS1GATE_HS CP_OUTLR_OUTGATE_LS2SRC_HS2GATE_HS Pulse GeneratorV DD / V CC Level ShiftPulse GeneratorV DD / V POS Level ShiftIN OUCon-trol a nd LogicLinearReg V CC2EN GND +5.0 V+14.5 V V DDHIGH- AND LOW-SIDECharge PumpEN GNDC2V POSV CCC1V CC2V CCV CCV CC2VCC VCC2CP_OUTLR_OUT V CC, V CC2V DDC2C1BRG_ENPulse GeneratorV DD / V CC Level ShiftPulse GeneratorV DD / V POS Level ShiftGND CONTROL WITH CHARGE PUMPCP_OUTV CCOutputDriverIN OUCP_OUTV CCOutputDriverIN OULR_OUTOutputDriverIN OULR_OUTOutputDriverCon-trol a nd LogicCon-trol a nd LogicCon-trol a nd LogicBRG_ENBRG_ENBRG_ENHIGH-SIDE CHANNELLOW-SIDE CHANNELHIGH-SIDE CHANNELLOW-SIDE CHANNELGND2GND2GND1GND GND_GND2GND_AT SD 1Thermal ShutdownT SD 1T SD 1T SD 2Thermal ShutdownT SD 2T SD 2Analog Integrated Circuit Device Data 33883TERMINAL CONNECTIONSFigure 3. 33883 20-SOICW Terminal ConnectionsTable 1. 20-SOICW Terminal DefinitionsA functional description of each terminal can be found in the FUNCTIONAL TERMINAL DESCRIPTION section beginning on page 10.TerminalTerminal Name Formal Name Definition1VCC Supply Voltage 1Device power supply 1.2C2Charge Pump Capacitor External capacitor for internal charge pump.3CP_OUT Charge Pump Out External reservoir capacitor for internal charge pump.4SRC_HS1Source 1 Output High Side Source of high-side 1 MOSFET 5GATE_HS 1Gate 1 Output High Side Gate of high-side 1 MOSFET.6IN_HS1Input High Side 1 Logic input control of high-side 1 gate (i.e., IN_HS1 logic HIGH = GATE_HS1 HIGH).7IN_LS1Input Low Side 1Logic input control of low-side 1 gate (i.e., IN_LS1 logic HIGH = GATE_LS1 HIGH).8GATE_LS1Gate 1 Output Low Side Gate of low-side 1 MOSFET. 9GND1Ground 1Device ground 1.10LR_OUT Linear Regulator Output Output of internal linear regulator.11VCC2Supply Voltage 2Device power supply 2.12GND_A Analog GroundDevice analog ground.13C1Charge Pump Capacitor External capacitor for internal charge pump.14GND2Ground 2Device ground 2.15GATE_LS2Gate 2 Output Low Side Gate of low-side 2 MOSFET.16IN_LS2Input Low Side 2Logic input control of low-side 2 gate (i.e., IN_LS2 logic HIGH = GATE_LS2 HIGH). 17IN_HS2Input High Side 2 Logic input control of high-side 2 gate (i.e., IN_HS2 logic HIGH = GATE_HS2 HIGH).18GATE_HS 2Gate 2 Output High Side Gate of high-side 2 MOSFET. 19SRC_HS2Source 2 Output High Side Source of high-side 2 MOSFET.20G_ENGlobal EnableLogic input Enable control of device (i.e., G_EN logic HIGH = Full Operation, G_EN logic LOW = Sleep Mode).Analog Integrated Circuit Device Data33883ELECTRICAL CHARACTERISTICS MAXIMUM RATINGSELECTRICAL CHARACTERISTICSMAXIMUM RATINGSTable 2. Maximum RatingsAll voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.RatingSymbolValueUnitELECTRICAL RATINGS Supply Voltage 1V CC -0.3 to 65V Supply Voltage 2 (1)V CC2-0.3 to 35V Linear Regulator Output VoltageV LR_OUT -0.3 to 18V High-Side Floating Supply Absolute Voltage V CP_OUT -0.3 to 65V High-Side Floating Source VoltageV SRC_HS-2.0 to 65V High-Side Source Current from CP_OUT in Switch ON State I S 250mA High-Side Gate VoltageV GATE_HS -0.3 to 65V High-Side Gate Source Voltage (2)V GATE_HS - V SRC_HS -0.3 to 20V High-Side Floating Supply Gate Voltage V CP_OUT - V GATE_HS -0.3 to 65V Low-Side Gate Voltage V GATE_LS -0.3 to 17V Wake-Up Voltage V G_EN -0.3 to 35V Logic Input VoltageV IN -0.3 to 10V Charge Pump Capacitor Voltage V C1-0.3 to V LR_OUTV Charge Pump Capacitor Voltage V C2-0.3 to 65V ESD Voltage (3)Human Body Model on All Pins (V CC and V CC2 as Two Power Supplies) Machine ModelV ESD1V ESD2±1500±130VNotes1.V CC2 can sustain load dump pulse of 40 V, 400 ms,2.0 Ω.2.In case of high current (SRC_HS >100 mA) and high voltage (>20 V) between GATE_HSX and SRC_HS an external zener of 18 V isneeded as shown in Figure 14.3.ESD1 testing is performed in accordance with the Human Body Model (C ZAP =100 pF, R ZAP =1500 Ω), ESD2 testing is performed inaccordance with the Machine Model (C ZAP =200 pF, R ZAP =0Ω).Analog Integrated Circuit Device Data 33883ELECTRICAL CHARACTERISTICSMAXIMUM RATINGSPower Dissipation and Thermal Characteristics Maximum Power Dissipation @ 25°C Thermal Resistance (Junction to Ambient)Operating Junction Temperature Storage TemperatureP D R θJA T J T STG 1.25100-40 to 150-65 to 150W °C / W °C °C Peak Package Reflow Temperature During Reflow (4), (5)T PPRTNote 5°CNotes4.Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits maycause malfunction or permanent damage to the device.5.Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package ReflowTemperature and Moisture Sensitivity Levels (MSL),Go to , search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.Table 2. Maximum RatingsAll voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.RatingSymbolValueUnitAnalog Integrated Circuit Device Data33883ELECTRICAL CHARACTERISTICSSTATIC ELECTRICAL CHARACTERISTICSSTATIC ELECTRICAL CHARACTERISTICSTable 3. Static Electrical CharacteristicsCharacteristics noted under conditions V CC = 12 V, V CC2 = 12 V, C CP = 33 nF, G_EN = 4.5 V unless otherwise noted. Typical values noted reflect the approximate parameter means at T A = 25°C under nominal conditions unless otherwise noted.CharacteristicSymbolMinTypMaxUnitOPERATING CONDITIONSSupply Voltage 1 for Output High-Side Driver and Charge Pump V CC 5.5–55V Supply Voltage 2 for Linear Regulation V CC2 5.5–28V High-Side Floating Supply Absolute VoltageV CP_OUTV CC +4–V CC + 11 but < 65VLOGICLogic 1 Input Voltage (IN_LS and IN_HS) V IH 2.0–10V Logic 0 Input Voltage (IN_LS and IN_HS) V IL ––0.8V Logic 1 Input Current V IN = 5.0 VI IN+200–1000µAWake-Up Input Voltage (G_EN)V G_EN 4.55.0V CC2V Wake-Up Input Current (G_EN) V G_EN = 14 VI G_EN–200500µAWake-Up Input Current (G_EN) V G_EN = 28 V I G_EN2––1.5mALINEAR REGULATOR Linear RegulatorV LR_OUT @ V CC2 from 15 V to 28 V, I LOAD from 0 mA to 20 mA V LR_OUT @ I LOAD = 20 mAV LR_OUT @ I LOAD = 20 mA, V CC2 = 5.5 V, V CC = 5.5 V V LR_OUT12.5V CC2 - 1.54.0–––16.5––VCHARGE PUMPCharge Pump Output Voltage, Reference to VCC V CC = 12 V, I LOAD = 0 mA, C CP_OUT = 1.0 µF V CC = 12 V, I LOAD = 7.0 mA, C CP_OUT = 1.0 µF V CC2 = V CC = 5.5 V, I LOAD = 0 mA, C CP_OUT = 1.0 µF V CC2 = V CC = 5.5 V, I LOAD = 7.0 mA, C CP_OUT = 1.0 µF V CC = 55 V, I LOAD = 0 mA, C CP_OUT = 1.0 µF V CC = 55 V, I LOAD = 7.0 mA, C CP_OUT = 1.0 µFV CP_OUT7.57.02.31.87.57.0––––––––––––VPeak Current Through Pin C1 Under Rapidly Changing VCC Voltages (see Figure 13, page 17)I C1-2.0– 2.0AMinimum Peak Voltage at Pin C1 Under Rapidly Changing VCC Voltages (see Figure 13, page 17)V C1MIN -1.5––VAnalog Integrated Circuit Device Data 33883ELECTRICAL CHARACTERISTICSSTATIC ELECTRICAL CHARACTERISTICSSUPPLY VOLTAGEQuiescent VCC Supply Current V G_EN = 0 V and V CC = 55 V V G_EN = 0 V and V CC = 12 V IV CCSLEEP––––1010µAOperating VCC Supply Current (6)V CC = 55 V and V CC2 = 28 V V CC = 12 V and V CC2 = 12 VIV CCOP––2.20.7––mAAdditional Operating V CC Supply Current for Each Logic Input Terminal ActiveV CC = 55 V and V CC2 = 28 V (7)IV CCLOG––5.0mAQuiescent VCC2 Supply Current V G_EN = 0 V and V CC = 12 V V G_EN = 0 V and V CC = 28 V IV CC2SLEEP––––5.05.0µAOperating VCC2 Supply Current (6) V CC = 55 V and V CC2 = 28 V V CC = 12 V and V CC2 = 12 VIV CC2OP––––129.0mA Additional Operating VCC2 Supply Current for Each Logic Input Terminal ActiveV CC = 55 V and V CC2 = 28 V (7) IV CC2LOG–– 5.0mAUndervoltage Shutdown VCC UV 4.0 5.0 5.5V Undervoltage Shutdown VCC2 (8)UV2 4.0 5.0 5.5V Overvoltage Shutdown VCC OV 576165V Overvoltage Shutdown VCC2OV229.53135VOUTPUTOutput Sink Resistance (Turned Off)I discharge LSS = 50 mA , V SRC_HS = 0 V (8)R DS––22ΩOutput Source Resistance (Turned On)I charge HSS = 50 mA, V CP_OUT = 20 V (8)R DS––22ΩCharge Current of the External High-Side MOSFET Through GATE_HSn Terminal (9)I CHARGE HSS–100200mAMaximum Voltage (V GATE_HS - V SRC_HS ) INH = Logic 1, I S max = 5.0 mAVMAX––18VNotes6.Logic input terminal inactive (high impedance).7.High-frequency PWM-ing (» 20 kHz) of the logic inputs will result in greater power dissipation within the device. Care must be taken to remain within the package power handling rating.8.The device may exhibit predictable behavior between 4.0 V and 5.5 V.9.See Figure 5, page 12, for a description of charge current.Table 3. Static Electrical Characteristics (continued)Characteristics noted under conditions V CC = 12 V, V CC2 = 12 V, C CP = 33 nF, G_EN = 4.5 V unless otherwise noted. Typical values noted reflect the approximate parameter means at T A = 25°C under nominal conditions unless otherwise noted.CharacteristicSymbol Min Typ Max UnitAnalog Integrated Circuit Device Data33883ELECTRICAL CHARACTERISTICSDYNAMIC ELECTRICAL CHARACTERISTICSDYNAMIC ELECTRICAL CHARACTERISTICSTable 4. Dynamic Electrical CharacteristicsCharacteristics noted under conditions 7.0 V ≤ V SUP ≤ 18 V, -40°C ≤ T A ≤ 125°C, GND = 0.0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at T A = 25°C under nominal conditions unless otherwise noted.CharacteristicSymbolMinTypMaxUnitTIMING CHARACTERISTICSPropagation Delay High Side and Low SideC LOAD = 5.0 nF, Between 50% Input to 50% Output (10) (see Figure 4) t PD–200300nsTurn-On Rise TimeC LOAD = 5.0 nF, 10% to 90% (10), (11) (see Figure 4) t R–80180ns Turn-Off Fall TimeC LOAD = 5.0 nF, 10% to 90% (10), (11) (see Figure 4)t F–80180ns10.C LOAD corresponds to a capacitor between GATE_HS and SRC_HS for the high side and between GATE_LS and ground for low side. 11.Rise time is given by time needed to change the gate from 1.0 V to 10 V (vice versa for fall time).Analog Integrated Circuit Device Data 33883TIMING DIAGRAMSTIMING DIAGRAMSFigure 4. Timing Characteristics50%50%t fIN_HS GATE_HS 50%50%t pdt pdt ror IN_LS or GATE_LSAnalog Integrated Circuit Device Data33883FUNCTIONAL DESCRIPTION INTRODUCTIONFUNCTIONAL DESCRIPTIONINTRODUCTIONThe 33883 is an H-bridge gate driver (or full-bridge pre-driver) with integrated charge pump and independent high- and low-side driver channels. It has the capability to drivelarge gate-charge MOSFETs and supports high PWM frequency. In sleep mode its supply current is very low.FUNCTIONAL TERMINAL DESCRIPTIONSUPPLY VOLTAGE TERMINALS (VCC AND VCC2)The VCC and VCC2 terminals are the power supply inputs to the device. V CC is used for the output high-side drivers and the charge pump. V CC2 is used for the linear regulation. They can be connected together or independent with different voltage values. The device can operate with V CC up to 55 V and V CC2 up to 28 V.The VCC and VCC2 terminals have undervoltage (UV) and overvoltage (OV) shutdown. If one of the supply voltage drops below the undervoltage threshold or rises above the overvoltage threshold, the gate outputs are switched LOW in order to switch off the external MOSFETs. When the supply returns to a level that is above the UV threshold or below the OV threshold, the device resumes normal operationaccording to the established condition of the input terminals.INPUT HIGH- AND LOW-SIDE TERMINALS (IN_HS1, IN_HS2, AND IN_LS1, IN_LS2)The IN_HSn and IN_LSn terminals are input control terminals used to control the gate outputs. These terminals are 5.0 V CMOS-compatible inputs with hysteresis. IN_HSn and IN_LSn independently control GATE_HSn and GATE_LSn, respectively.During wake-up, the logic is supplied from the G_EN terminal. There is no internal circuit to prevent the external high-side and low-side MOSFETs from conducting at the same time.SOURCE OUTPUT HIGH-SIDE TERMINALS (SRC_HS1 AND SRC_HS2)The SRC_HSn terminals are the sources of the external high-side MOSFETs. The external high-side MOSFETs are controlled using the IN_HSn inputs.GATE HIGH- AND LOW-SIDE TERMINALS (GATE_HS1, GATE_HS2, AND GATE_LS1, GATE_LS2)The GATE_HSn and GATE_LSn terminals are the gates of the external high- and low-side MOSFETs. The external high- and low-side MOSFETs are controlled using the IN_HSn and IN_LSn inputs.GLOBAL ENABLE (G_EN)The G_EN terminal is used to place the device in a sleep mode. When the G_EN terminal voltage is a logic LOW state, the device is in sleep mode. The device is enabled and fully operational when the G_EN terminal voltage is logic HIGH, typically 5.0 V.CHARGE PUMP OUT (CP_OUT)The CP_OUT terminal is used to connect an external reservoir capacitor for the charge pump.CHARGE PUMP CAPACITOR TERMINALS (C1 AND C2)The C1 and C2 terminals are used to connect an external capacitor for the charge pump.LINEAR REGULATOR OUTPUT (LR_OUT)The LR_OUT terminal is the output of the internal regulator. It is used to connect an external capacitor.GROUND TERMINALS (GND_A, GND1 AND GND2)These terminals are the ground terminals of the device. They should be connected together with a very low impedance connection.FUNCTIONAL DESCRIPTIONFUNCTIONAL TERMINAL DESCRIPTIONTable 5. Functional Truth TableConditions G_EN IN_HSn IN_LSn Gate_HSn Gate_LSn Comments Sleep0x x00Device is in Sleep mode. The gates are at low state.Normal11111Normal mode. The gates are controlled independently.Normal10000Normal mode. The gates are controlled independently. Undervoltage1x x00The device is currently in fault mode. The gates are atlow state. Once the fault is removed, the 33883 recoversits normal mode.Overvoltage1x x00The device is currently in fault mode. The gates are atlow state. Once the fault is removed, the 33883 recoversits normal mode.Overtemperatureon High-Side Gate Driver 11x0x The device is currently in fault mode. The high-side gateis at low state. Once the fault is removed, the 33883recovers its normal mode.Overtemperatureon Low-Side Gate Driver 1x1x0The device is currently in fault mode. The low-side gateis at low state. Once the fault is removed, the 33883recovers its normal mode.x = Don’t care.FUNCTIONAL DEVICE OPERATIONFUNCTIONAL DEVICE OPERATIONDRIVER CHARACTERISTICSFigure 5 represents the external circuit of the high-side gate driver. In the schematic, HSS represents the switch that is used to charge the external high-side MOSFET through the GATE_HS terminal. LSS represents the switch that is used to discharge the external high-side MOSFET through the GATE_HS terminal. A 180K Ω internal typical passivedischarge resistance and a 18 V typical protection zener are in parallel with LSS. The same schematic can be applied to the external low-side MOSFET driver simply by replacing terminal CP_OUT with terminal LR_OUT, terminal GATE_HS with terminal GATE_LS, and terminal SRC_HS with GND.Figure 5. High-Side Gate Driver Functional SchematicThe different voltages and current of the high-side gate driver are illustrated in Figure 6. The output driver sources a peak current of up to 1.0 A for 200 ns to turn on the gate. After 200 ns, 100 mA is continuously provided to maintain the gate charged. The output driver sinks a high current to turn off the gate. This current can be up to 1.0 A peak for a 100 nF load.Note G ATE_HS is loaded with a 100 nF capacitor in thechronograms. A smaller load will give lower peak and DC charge or discharge currents.Figure 6. High-Side Gate Driver ChronogramsHSSCP_OUTI GATE_HSI charge HSS I discharge LSSGATE_HS1LSSSRC_HS1180k Ω18VHSSpulse_IN LSS_INHSSDC_ININ_HS11.0 A Peak1.0 A Peak100 mA Typical1.0 A Peak100 mA Typical-1.0 A PeakIN_HS1HSSpulse_INHSS DC_INLSS_INI discharge LSSI GATE_HSI charge HSSFUNCTIONAL DEVICE OPERATIONOPERATIONAL MODESOPERATIONAL MODESTURN-ONFor turn-on, the current required to charge the gate source capacitor C iss in the specified time can be calculated as follows:I P = Q g / t r = 80 nC/ 80 ns ≈ 1.0 A Where Q g is power MOSFET gate charge and t r is peakcurrent for rise time.TURN-OFFThe peak current for turn-off can be obtained in the same way as for turn-on, with the exception that peak current for fall time, t f , is substituted for t r :I P = Q g / t f = 80 nC/ 80 ns ≈ 1.0 A In addition to the dynamic current required to turn off or onthe MOSFET, various application-related switching scenarios must be considered. These scenarios are presented in Figure 7. In order to withstand high dV/dt spikes, a low resistive path between gate and source is implemented during the OFF-state.Figure 7. OFF-State Driver RequirementDriver Requirement:Low Resistive Gate-Source Path DuringOFF-StateFlyback spike charges low-side gate via C rss charge current I rss up to 2.0 A. Causes increased uncon-trolled turn-on of low-sideMOSFET.C issC iss C rss C rssV BATDriver Requirement: Low Resistive Gate-Source Path During OFF-State. High Peak Sink Current CapabilityFlyback spike pulls down high-side source V GS .Delays turn-off of high-side MOSFET.C issC issC rssC rssV BATDriver Requirement:High Peak Sink CurrentCapabilityFlyback spike charges low-side gate via C rss charge current I rss up to 2.0 A.Delays turn-off of low-sideMOSFET.C issC issC rss C rssV BATDriver Requirement:Low Resistive Gate-Source Path DuringOFF-StateC issC issC rssC rssV BATFlyback spike pulls down high-side source V GS .Causes increased uncon-trolled turn-on of high-sideOFFOFFOFFOFFGATE_LSI LOADL1I LOAD L1I LOAD L1I LOAD L1I rssV GATEV GATE -V DRNGATE_HSGATE_LSGATE_HS GATE_HS GATE_LSGATE_HSGATE_LSFUNCTIONAL DEVICE OPERATION OPERATIONAL MODESLOW-DROP LINEAR REGULATORThe low-drop linear regulator is supplied by V CC2. If V CC2 exceeds 15.0 V, the output is limited to 14.5 V (typical).The low-drop linear regulator provides the 5.0 V for the logic section of the driver, the V gs_ls buffered at LR_OUT, and the +14.5 V for the charge pump, which generates theCP_OUT The low-drop linear regulator provides 4.0 mA average current per driver stage.In case of the full bridge, that means approximately16 mA —8.0 mA for the high side and 8.0 mA for the low side.Note: The average current required to switch a gate with a frequency of 100 kHz is:I CP = Q g * f PWM = 80 nC * 100 kHz = 8.0 mAIn a full-bridge application only one high side and one low side switches on or off at the same time.CHARGE PUMPThe charge pump generates the high-side driver supply voltage (CP_OUT), buffered at C CP_OUT. Figure 8 shows the charge pump basic circuit without load.Figure 8. Charge Pump Basic CircuitWhen the oscillator is in low state [(1) in Figure 8], C CP is charged through D2 until its voltage reaches V CC - V D2. When the oscillator is in high state (2), C CP is discharged though D1 in C CP_OUT, and final voltage of the charge pump, V CP_OUT, is V cc+ V LR_OUT - 2V D. The frequency of the 33883 oscillator is about 330 kHz.EXTERNAL CAPACITORS CHOICEExternal capacitors on the charge pump and on the linear regulator are necessary to supply high peak current absorbed during switching.Figure 9 represents a simplified circuitry of the high-side gate driver. Transistors Tosc1 and Tosc2 are the oscillator-switching MOSFETs. When Tosc1 is on, the oscillator is at low level. When Tosc2 is on, the oscillator is at high level. The capacitor C CP_OUT provides peak current to the high-sideFUNCTIONAL DEVICE OPERATIONOPERATIONAL MODESC CPC CP choice depends on power MOSFET characteristics and the working switching frequency. Figure 10 contains two diagrams that depict the influence of C CP value on V CP_OUT average voltage level. The diagrams represent two different frequencies for two power MOSFETs, MTP60N06HD and MPT36N06V.Figure 10. V CP_OUT Versus C CPThe smaller the C CP value is, the smaller the V CP_OUT value is. Moreover, for the same C CP value, when the switching frequency increases, the average V CP_OUT level decreases. For most of the applications, a typical value of 33 nF is recommended.C CP_OUTFigure 11 depicts the simplified C CP_OUT current and voltage waveforms. f PWM is the working switching frequency.CP_OUTWaveformsAs shown above, at high-side MOSFET turn-on V CP_OUTvoltage decreases. This decrease can be calculatedaccording to the C CP_OUT value as follows:Where Q g is power MOSFET gate charge.C LR_OUTC LR_OUT provides peak current needed by the low-sideMOSFET turn-on. V LR_OUT decrease is as follows:TYPICAL VALUES OF CAPACITORSIn most working cases the following typical values arerecommended for a well-performing charge pump:C CP = 33 nF, C CP_OUT = 470 nF, and C LR_OUT = 470 nFThese values give a typical 100 mV voltage ripple onV CP_OUT and V LR_OUT with Q g = 50 nC.g∆V CP_OUT =C CP_OUTQ g∆V LR_OUT =C LR_OUTQ gFUNCTIONAL DEVICE OPERATIONPROTECTION AND DIAGNOSTIC FEATURESPROTECTION AND DIAGNOSTIC FEATURESGATE PROTECTIONThe low-side driver is supplied from the built-in low-drop regulator. The high-side driver is supplied from the internal charge pump buffered at CP_OUT.The low-side gate is protected by the internal linear regulator, which ensures that V GATE_LS does not exceed the maximum V GS. Especially when working with the charge pump, the voltage at CP_OUT can be up to 65 V. The high-side gate is clamped internally in order to avoid a V GS exceeding 18 V.Gate protection does not include a fly-back voltage clamp that protects the driver and the external MOSFET from a fly-back voltage that can occur when driving inductive load. This fly-back voltage can reach high negative voltage values and needs to be clamped externally, as shown in Figure 12.Figure 12. Gate Protection and Flyback Voltage Clamp LOAD DUMP AND REVERSE BATTERYV CC and V CC2 can sustain load a dump pulse of 40 V and double battery of 24 V. Protection against reverse polarity is ensured by the external power MOSFET with the free-wheeling diodes forming a conducting pass from ground to V CC. Additional protection is not provided within the circuit. To protect the circuit an external diode can be put on the battery line. It is not recommended putting the diode on the ground line.TEMPERATURE PROTECTIONThere is temperature shutdown protection per each half-bridge. Temperature shutdown protects the circuitry against temperature damage by switching off the output drivers. Its typical value is 175°C with an hysteresis of 15°C.DV/DT AT V CCV CC voltage must be higher than (SRC_HS voltage minus a diode drop voltage) to avoid perturbation of the high-side driver.In some applications a large dV /d t at terminal C2 owing to sudden changes at V CC can cause large peak currents flowing through terminal C1, as shown in Figure 13.For positive transitions at terminal C2, the absolute value of the minimum peak current, I C1min, is specified at 2.0 A for a t C1min duration of 600 ns.For negative transitions at terminal C2, the maximum peak current, I C1max, is specified at 2.0 A for a t C1max duration of 600 ns. Current sourced by terminal C1 during a large dV /d t will result in a negative voltage at terminal C1 (Figure 13). The minimum peak voltage V C1min is specified at -1.5 V for a duration of t C1max = 600 ns. A series resistor with the charge pump capacitor (Ccp) capacitor can be added in order to limit the surge current.Output DriverOUTOutput Driver OUTINL1M2GATE_LSSRC_HSGATE_HSInductiveFlyback VoltageClampIND c l M1VCCCP_OUTLR_OUTV GS < 14 VUnder AllConditionsFUNCTIONAL DEVICE OPERATIONPROTECTION AND DIAGNOSTIC FEATURESFigure 13. Limits of C1 Current and Voltage with Large Values of dV/dtIn the case of rapidly changing V CC voltages, the large dV/dt may result in perturbations of the high-side driver, thereby forcing the driver into an OFF state. The addition ofcapacitors C3 and C4, as shown in Figure 14, reduces the dV/dt of the source line, consequently reducing driverperturbation. Typical values for R3 / R 4 and C3 / C 4 are 10 Ω and 10 nF, respectively.DV/DT AT V CC2When the external high-side MOSFET is on, in case of rapid negative change of V CC2 the voltage (V GATE_HS -V SRC_HS ) can be higher than the specified 18 V. In this case a resistance in the SRC line is necessary to limit the current to 5.0 mA max. It will protect the internal zener placed between GATE_HS and SRC terminals.In case of high current (SRC_HS >100 mA) and high voltage (>20 V) between GATE_HSX and SRC_HS an external zener of 18 V is needed as shown in Figure 14.t C1maxt C1minV CCI (C1+C2)I C1maxI C1minV (LR_OUT)0 VV (C1)0 AV C1minTYPICAL APPLICATIONSTYPICAL APPLICATIONSFigure 14. Application Schematic with External Protection CircuitIN_LS2IN_HS2IN_LS1IN_HS1V BAT G_ENC1C2C CPC LR_OUT C CP_OUT MCUVCC2VCC V BOOST33883M1M2M3M4R1R2470nF 470nF 50Ω50Ω50Ω50Ω33nFDC MotorR310Ω10nFC310nFC410ΩR4IN_LS2IN_HS2IN_LS1IN_HS1G_EN C1C2VCC2VCC GNDGATE_LS2SRC_HS2GATE_HS2GATE_LS1SRC_HS1GATE_HS1LR_OUT CP_OUT 18 V18 V。
MVB 设备一致性测试测试报告
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目录 1. 设备标识................................................................................................................................. 1
1.1 引言.................................................................................................................................. 1 1.2 在测设备的一般标识..................................................................................................... 1 1.3 物理接口特性................................................................................................................. 2 1.4 链路层能力..................................................................................................................... 3 1.5 实现的通信对象............................................................................................................. 3 2. 物理接口................................................................................................................................. 4 2.1 测试台............................................................................................................................. 4 2.2 电缆测试..................................................................................................................... 5
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电缆识别名: D1 测试总结果:通过地点: Client Name 余量: 9.5 dB (远端近端串扰12-36)日期/ 时间: 08/06/2001 08:32:32pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |160 328 |236 555 |4 50 | | |14.0 100.0 24.0 |36 |159 328 |234 555 |2 50 | | |13.9 100.0 24.0 |45 |157 328 |232 555 |0 50 | | |14.0 100.0 24.0 |78 |159 328 |235 555 |3 50 | | |14.0 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 8.0 78.2 11.0 | 8.2 82.8 10.8 | 9.1 73.4 11.4 | 9.1 73.4 11.4 |36 | 6.7 37.6 14.3 | 8.0 75.2 11.2 | 7.2 17.3 17.0 | 8.7 74.6 11.3 |45 | 7.0 20.1 17.0 | 8.9 76.0 11.2 | 9.9 17.6 17.0 | 12.6 88.0 10.6 |78 | 10.8 17.4 17.0 | 12.3 74.2 11.3 | 8.6 60.8 12.1 | 10.3 98.2 10.1 |12 | 14.9 60.0 30.8 | 17.9 95.4 27.4 | 11.3 59.8 30.9 | 11.4 60.0 30.8 | 36 | 12.8 60.2 30.8 | 14.5 88.2 28.0 | 11.2 59.8 30.9 | 13.9 95.0 27.5 | 45 | 14.5 20.3 38.9 | 15.7 87.6 28.0 | 11.5 57.8 31.1 | 12.2 74.8 29.3 | 78 | 14.9 60.0 30.8 | 17.0 90.2 27.8 | 11.9 57.6 31.2 | 12.2 75.0 29.3 | PS ACR-N12 | 19.7 1.7 53.6 | 32.0 97.2 3.6 | 20.8 1.7 53.6 | 30.4 100.0 3.0 | 36 | 19.1 5.6 42.9 | 27.5 88.2 5.6 | 19.3 6.0 42.2 | 27.4 95.0 4.1 | 45 | 17.3 2.3 51.1 | 28.7 87.8 5.7 | 16.2 2.1 51.9 | 28.8 100.0 3.0 | 78 | 18.1 2.3 51.1 | 32.3 100.0 3.0 | 16.3 2.1 51.9 | 28.9 100.0 3.0 | NEXT12-36 | 12.3 60.0 33.8 | 12.3 60.0 33.8 | 9.5 59.8 33.9 | 9.6 60.0 33.8 | 12-45 | 17.5 70.4 32.8 | 17.5 70.4 32.8 | 14.4 70.4 32.8 | 14.5 70.6 32.7 | 12-78 | 13.9 34.8 38.0 | 18.5 100.0 30.1 | 14.2 34.8 38.0 | 15.2 100.0 30.1 | 36-45 | 12.8 20.7 41.8 | 13.7 88.4 31.0 | 13.2 45.6 35.9 | 14.2 94.8 30.5 | 36-78 | 14.0 59.8 33.9 | 16.3 90.4 30.8 | 14.1 22.5 41.2 | 16.2 75.6 32.2 | 45-78 | 12.7 7.7 48.9 | 15.8 82.0 31.6 | 9.7 55.2 34.5 | 10.2 74.8 32.3 | ACR-N12-36 | 18.7 1.7 56.6 | 29.4 95.2 7.1 | 19.4 1.7 56.6 | 27.9 95.0 7.1 | 12-45 | 21.9 2.2 54.5 | 29.1 70.4 12.9 | 23.3 16.3 34.3 | 26.1 70.6 12.8 | 12-78 | 21.8 34.8 24.3 | 32.6 100.0 6.0 | 21.3 4.3 48.4 | 29.3 100.0 6.0 | 36-45 | 18.7 20.7 31.4 | 26.8 88.4 8.5 | 20.4 20.6 31.5 | 28.9 100.0 6.0 | 36-78 | 17.9 6.0 45.2 | 29.5 90.4 8.1 | 17.7 6.0 45.2 | 28.3 75.6 11.5 | 45-78 | 15.4 2.3 54.1 | 28.5 82.0 9.9 | 13.5 2.1 54.9 | 22.1 74.8 11.8 | ACR-F12-36 | 20.5 1.1 56.6 | 24.7 72.0 20.3 | 20.5 1.1 56.6 | 24.6 72.0 20.3 | 12-45 | 22.2 2.1 51.0 | 26.9 65.0 21.1 | 22.2 2.1 51.0 | 27.5 70.2 20.5 | 12-78 | 31.3 47.6 23.8 | 32.1 95.4 17.8 | 31.3 47.6 23.8 | 31.9 93.8 17.9 | 36-12 | 20.3 1.1 56.6 | 25.9 76.4 19.8 | 20.3 1.1 56.6 | 25.9 76.4 19.8 | 36-45 | 16.1 98.0 17.6 | 16.2 98.2 17.5 | 16.0 98.0 17.6 | 16.1 98.2 17.5 | 36-78 | 17.2 1.0 57.4 | 22.3 100.0 17.4 | 17.1 1.0 57.4 | 22.2 100.0 17.4 | 45-12 | 21.9 1.6 53.3 | 26.8 68.0 20.7 | 22.0 1.6 53.3 | 26.8 68.0 20.7 | 45-36 | 15.6 51.6 23.2 | 16.2 98.6 17.5 | 15.7 51.6 23.2 | 16.5 99.8 17.4 | 45-78 | 16.5 1.9 51.8 | 21.1 89.2 18.4 | 16.5 1.9 51.8 | 21.1 89.2 18.4 | 78-12 | 31.3 1.4 54.5 | 33.4 97.4 17.6 | 31.3 1.4 54.5 | 33.4 97.4 17.6 | 78-36 | 17.5 1.0 57.4 | 20.7 83.6 18.9 | 17.6 1.0 57.4 | 20.7 83.6 18.9 | 78-45 | 16.6 1.9 51.8 | 20.2 83.0 19.0 | 16.6 1.9 51.8 | 20.8 87.4 18.5 | PS ACR-F12 | 21.0 1.3 52.2 | 26.4 76.2 16.8 | 21.1 1.6 50.3 | 25.7 72.0 17.3 | 36 | 16.9 12.2 32.7 | 18.5 100.0 14.4 | 16.9 1.3 52.2 | 18.1 98.2 14.5 | 45 | 16.5 17.3 29.7 | 18.4 98.2 14.5 | 16.3 13.3 32.0 | 18.4 98.4 14.5 | 78 | 17.0 1.6 50.3 | 22.3 100.0 14.4 | 17.1 1.9 48.8 | 20.5 83.6 15.9 |电缆识别名: D2 测试总结果:通过地点: Client Name 余量: 9.7 dB (远端近端串扰12-36)日期/ 时间: 08/06/2001 08:34:22pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |161 328 |237 555 |4 50 | | |13.9 100.0 24.0 |36 |159 328 |235 555 |2 50 | | |13.9 100.0 24.0 |45 |158 328 |233 555 |0 50 | | |14.0 100.0 24.0 |78 |160 328 |236 555 |3 50 | | |14.0 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 7.7 80.4 10.9 | 7.7 80.4 10.9 | 9.3 73.4 11.4 | 9.3 73.4 11.4 |36 | 7.9 81.8 10.9 | 7.9 81.8 10.9 | 8.6 15.1 17.0 | 9.1 63.2 12.0 |45 | 6.1 17.7 17.0 | 10.5 82.2 10.8 | 7.7 17.6 17.0 | 13.7 87.4 10.6 |78 | 10.5 19.6 17.0 | 12.2 83.4 10.8 | 7.7 56.0 12.5 | 7.7 56.0 12.5 |12 | 14.9 27.8 36.6 | 18.1 96.8 27.3 | 12.3 28.4 36.5 | 15.5 99.4 27.1 | 36 | 12.6 17.4 40.0 | 13.3 97.4 27.3 | 11.9 31.8 35.6 | 13.2 97.2 27.3 | 45 | 15.3 86.0 28.2 | 15.3 86.0 28.2 | 14.3 100.0 27.1 | 14.3 100.0 27.1 | 78 | 13.5 10.4 43.8 | 15.5 97.4 27.3 | 13.2 69.0 29.9 | 14.1 94.6 27.5 | PS ACR-N12 | 21.8 27.8 24.5 | 31.8 96.8 3.7 | 19.3 28.4 24.2 | 29.4 99.4 3.2 | 36 | 17.2 5.9 42.4 | 27.0 97.4 3.6 | 16.7 6.0 42.2 | 26.9 97.2 3.6 | 45 | 17.9 3.8 46.6 | 30.6 97.4 3.6 | 17.8 3.6 47.1 | 28.4 100.0 3.0 | 78 | 17.2 5.9 42.4 | 29.8 99.2 3.2 | 16.8 5.7 42.7 | 27.7 94.6 4.2 | NEXT12-36 | 11.9 27.6 39.7 | 17.0 99.6 30.1 | 9.7 28.4 39.5 | 14.4 99.6 30.1 | 12-45 | 17.8 13.5 44.8 | 18.8 67.6 33.1 | 18.5 57.6 34.2 | 20.7 94.2 30.5 | 12-78 | 15.6 61.4 33.7 | 18.8 96.4 30.4 | 14.6 49.6 35.3 | 15.9 89.4 30.9 | 36-45 | 13.0 86.0 31.2 | 13.0 86.0 31.2 | 13.3 85.8 31.2 | 14.0 100.0 30.1 | 36-78 | 11.4 22.4 41.2 | 13.2 94.0 30.5 | 11.2 22.2 41.3 | 12.7 94.6 30.5 | 45-78 | 15.6 3.8 53.9 | 16.8 74.4 32.3 | 14.5 3.6 54.3 | 15.4 100.0 30.1 | ACR-N12-36 | 18.8 27.6 27.6 | 30.9 99.6 6.1 | 16.7 28.4 27.2 | 28.3 99.6 6.1 | 12-45 | 22.1 7.7 42.7 | 30.1 67.6 13.6 | 23.5 7.6 42.8 | 34.2 94.2 7.3 | 12-78 | 21.9 5.2 46.6 | 32.6 96.4 6.8 | 20.8 12.9 37.1 | 29.1 89.4 8.3 | 36-45 | 17.8 3.7 49.9 | 25.8 86.0 9.1 | 18.9 3.5 50.4 | 28.1 100.0 6.0 | 36-78 | 15.0 5.9 45.4 | 26.7 94.0 7.3 | 14.7 5.7 45.7 | 26.3 94.6 7.2 | 45-78 | 18.0 3.8 49.6 | 28.6 74.4 11.9 | 16.9 3.6 50.1 | 29.5 100.0 6.0 | ACR-F12-36 | 16.6 1.1 56.6 | 21.0 81.0 19.2 | 16.7 1.1 56.6 | 20.3 76.2 19.8 | 12-45 | 24.0 1.7 52.8 | 28.5 67.6 20.8 | 23.9 1.7 52.8 | 28.4 67.6 20.8 | 12-78 | 28.8 18.9 31.9 | 31.1 98.6 17.5 | 28.8 18.9 31.9 | 31.0 98.6 17.5 | 36-12 | 16.9 1.6 53.3 | 20.9 80.2 19.3 | 16.9 1.6 53.3 | 21.0 80.8 19.3 | 36-45 | 24.5 97.6 17.6 | 24.5 97.6 17.6 | 24.4 97.6 17.6 | 24.4 97.6 17.6 | 36-78 | 26.2 83.0 19.0 | 26.4 91.4 18.2 | 26.2 84.8 18.8 | 26.3 91.4 18.2 | 45-12 | 23.4 1.7 52.8 | 27.8 74.2 20.0 | 23.5 1.7 52.8 | 27.9 74.2 20.0 | 45-36 | 24.0 97.8 17.6 | 24.0 97.8 17.6 | 24.1 97.8 17.6 | 24.1 97.8 17.6 | 45-78 | 16.5 1.7 52.8 | 20.9 100.0 17.4 | 16.5 1.6 53.3 | 20.9 100.0 17.4 | 78-12 | 28.7 21.2 30.9 | 31.0 92.2 18.1 | 28.7 2.0 51.4 | 31.1 92.2 18.1 | 78-36 | 25.4 99.4 17.4 | 25.4 99.4 17.4 | 25.6 99.6 17.4 | 25.6 99.6 17.4 | 78-45 | 16.6 1.1 56.6 | 19.7 83.2 19.0 | 16.6 1.5 53.9 | 19.7 83.2 19.0 | PS ACR-F12 | 18.9 1.6 50.3 | 23.0 80.4 16.3 | 18.8 1.1 53.6 | 23.3 81.0 16.2 | 36 | 19.4 1.1 53.6 | 23.6 99.6 14.4 | 19.6 1.6 50.3 | 23.3 97.4 14.6 | 45 | 18.8 1.1 53.6 | 22.9 97.4 14.6 | 18.7 1.7 49.8 | 22.4 100.0 14.4 | 78 | 19.1 1.7 49.8 | 23.2 100.0 14.4 | 19.2 1.5 50.9 | 23.4 99.6 14.4 |电缆识别名: D3 测试总结果:通过地点: Client Name 余量: 10.3 dB (远端近端串扰12-36) 日期/ 时间: 08/06/2001 08:36:15pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |161 328 |237 555 |4 50 | | |13.9 100.0 24.0 |36 |159 328 |234 555 |1 50 | | |13.8 100.0 24.0 |45 |158 328 |233 555 |0 50 | | |14.0 100.0 24.0 |78 |160 328 |236 555 |3 50 | | |14.0 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 7.9 76.0 11.2 | 7.9 76.0 11.2 | 8.5 73.4 11.4 | 8.7 75.6 11.2 |36 | 7.4 37.4 14.3 | 9.0 77.4 11.1 | 7.5 17.3 17.0 | 8.4 74.6 11.3 |45 | 6.0 19.9 17.0 | 10.2 78.0 11.0 | 6.9 19.9 17.0 | 11.3 90.2 10.5 |78 | 10.2 17.3 17.0 | 13.3 81.8 10.9 | 8.9 17.3 17.0 | 9.4 53.6 12.7 |12 | 12.9 50.6 32.2 | 16.2 99.4 27.1 | 12.8 50.8 32.2 | 14.8 92.4 27.7 | 36 | 12.9 50.8 32.2 | 14.2 98.6 27.2 | 12.8 50.6 32.2 | 14.2 99.6 27.1 | 45 | 15.5 91.2 27.8 | 15.5 91.2 27.8 | 14.2 73.6 29.4 | 14.2 73.6 29.4 | 78 | 13.9 20.4 38.9 | 16.5 98.0 27.2 | 14.9 8.5 45.2 | 15.7 73.0 29.5 | PS ACR-N12 | 18.7 5.9 42.4 | 30.0 99.4 3.2 | 18.6 5.9 42.4 | 28.1 92.4 4.7 | 36 | 18.1 8.6 38.6 | 28.0 98.6 3.3 | 17.1 8.6 38.6 | 28.0 99.6 3.1 | 45 | 21.9 6.3 41.8 | 28.8 91.2 4.9 | 20.1 6.1 42.1 | 31.5 98.4 3.4 | 78 | 19.0 8.6 38.6 | 30.3 98.0 3.5 | 18.6 8.6 38.6 | 33.0 98.6 3.3 | NEXT12-36 | 11.3 50.6 35.2 | 13.7 99.4 30.1 | 10.3 50.8 35.2 | 12.5 92.6 30.7 | 12-45 | 16.9 45.6 35.9 | 19.7 83.6 31.4 | 17.1 5.9 50.8 | 19.7 91.6 30.7 | 12-78 | 16.4 20.4 41.9 | 20.2 96.0 30.4 | 15.1 54.8 34.6 | 18.2 82.4 31.5 | 36-45 | 13.0 91.2 30.8 | 13.0 91.2 30.8 | 13.9 76.4 32.1 | 15.1 98.4 30.2 | 36-78 | 12.8 23.4 40.9 | 14.4 98.0 30.2 | 13.1 8.7 48.0 | 16.8 98.6 30.2 | 45-78 | 16.7 13.1 45.0 | 18.3 73.2 32.5 | 13.5 73.2 32.5 | 13.6 73.4 32.4 | ACR-N12-36 | 17.8 1.6 57.0 | 27.4 99.4 6.2 | 18.9 1.7 56.6 | 27.3 99.8 6.1 | 12-45 | 21.2 5.7 45.7 | 32.4 83.6 9.6 | 20.1 5.9 45.4 | 32.9 91.6 7.9 | 12-78 | 21.3 8.1 42.2 | 33.9 96.0 6.9 | 20.9 20.3 31.7 | 30.9 82.4 9.8 | 36-45 | 21.5 3.7 49.9 | 26.3 91.2 7.9 | 18.1 3.7 49.9 | 29.0 98.4 6.4 | 36-78 | 17.4 8.6 41.6 | 28.2 98.0 6.5 | 16.7 8.6 41.6 | 30.8 98.6 6.3 | 45-78 | 21.2 13.1 36.9 | 30.2 73.4 12.1 | 21.2 10.1 39.8 | 25.3 73.4 12.1 | ACR-F12-36 | 17.1 1.3 55.2 | 20.2 74.6 20.0 | 17.1 1.3 55.2 | 20.2 74.8 19.9 | 12-45 | 24.7 95.2 17.8 | 25.0 99.8 17.4 | 24.6 95.2 17.8 | 24.9 99.8 17.4 | 12-78 | 35.5 98.0 17.6 | 35.6 98.2 17.5 | 35.4 98.0 17.6 | 35.5 98.2 17.5 | 36-12 | 16.9 1.0 57.4 | 22.4 99.6 17.4 | 16.9 1.0 57.4 | 22.3 99.6 17.4 | 36-45 | 18.4 92.2 18.1 | 18.4 92.2 18.1 | 18.2 92.2 18.1 | 18.2 92.2 18.1 | 36-78 | 16.5 1.5 53.9 | 20.5 80.0 19.3 | 16.5 1.5 53.9 | 20.4 80.0 19.3 | 45-12 | 26.2 91.2 18.2 | 26.3 98.4 17.5 | 26.3 97.0 17.7 | 26.4 98.4 17.5 | 45-36 | 17.5 41.0 25.2 | 18.0 90.0 18.3 | 17.5 41.0 25.2 | 18.1 90.0 18.3 | 45-78 | 18.4 1.3 55.2 | 23.4 100.0 17.4 | 18.4 1.3 55.2 | 23.4 100.0 17.4 | 78-12 | 36.3 1.0 57.4 | 37.1 98.2 17.5 | 36.4 1.0 57.4 | 37.2 98.2 17.5 | 78-36 | 17.4 1.5 53.9 | 20.5 83.2 19.0 | 17.4 1.5 53.9 | 20.5 83.0 19.0 | 78-45 | 18.8 1.6 53.3 | 22.7 83.4 18.9 | 18.8 1.6 53.3 | 22.7 83.4 18.9 | PS ACR-F12 | 19.7 1.0 54.4 | 24.1 99.8 14.4 | 20.0 1.3 52.2 | 22.9 80.4 16.3 | 36 | 15.9 1.5 50.9 | 18.9 90.6 15.2 | 15.8 1.3 52.2 | 18.9 92.2 15.1 | 45 | 18.9 1.3 52.2 | 19.8 92.4 15.1 | 18.5 1.3 52.2 | 20.0 92.0 15.1 | 78 | 17.5 1.5 50.9 | 22.9 99.6 14.4 | 18.0 1.5 50.9 | 21.6 83.4 15.9 |电缆识别名: D4 测试总结果:通过地点: Client Name 余量: 9.0 dB (远端近端串扰12-36)日期/ 时间: 08/06/2001 08:37:08pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |156 328 |230 555 |4 50 | | |14.2 100.0 24.0 |36 |155 328 |228 555 |2 50 | | |14.1 100.0 24.0 |45 |153 328 |226 555 |0 50 | | |14.2 100.0 24.0 |78 |155 328 |229 555 |3 50 | | |14.3 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 7.3 80.4 10.9 | 7.3 80.4 10.9 | 8.8 71.0 11.5 | 8.8 71.0 11.5 |36 | 7.5 77.4 11.1 | 7.5 77.4 11.1 | 5.9 60.4 12.2 | 5.9 60.4 12.2 |45 | 7.0 18.3 17.0 | 9.5 82.2 10.8 | 8.6 18.1 17.0 | 14.4 94.8 10.3 |78 | 11.0 80.6 10.9 | 11.0 80.6 10.9 | 8.9 50.6 13.0 | 8.9 50.6 13.0 |12 | 13.5 24.2 37.6 | 17.0 84.0 28.3 | 11.1 24.5 37.5 | 15.4 91.4 27.7 | 36 | 11.9 42.4 33.5 | 15.0 90.8 27.8 | 10.9 42.4 33.5 | 12.9 90.6 27.8 | 45 | 13.7 42.0 33.5 | 16.9 88.8 27.9 | 13.5 42.0 33.5 | 16.2 96.4 27.4 | 78 | 13.6 19.9 39.0 | 15.9 91.2 27.8 | 14.0 25.1 37.4 | 16.1 90.4 27.8 | PS ACR-N12 | 18.7 1.9 52.8 | 29.8 84.0 6.5 | 17.5 24.4 26.3 | 28.8 91.4 4.9 | 36 | 18.7 6.2 41.9 | 30.1 100.0 3.0 | 17.6 24.6 26.2 | 26.2 90.6 5.1 | 45 | 21.1 1.7 53.6 | 31.7 96.6 3.8 | 19.9 1.6 54.0 | 30.3 96.4 3.8 | 78 | 17.3 6.1 42.1 | 31.5 100.0 3.0 | 17.1 5.9 42.4 | 29.6 90.4 5.1 | NEXT12-36 | 10.9 24.2 40.6 | 15.3 81.4 31.6 | 9.0 24.4 40.5 | 11.9 78.8 31.9 | 12-45 | 15.6 33.8 38.2 | 16.2 88.6 31.0 | 14.8 47.2 35.7 | 18.5 89.0 30.9 | 12-78 | 16.2 6.2 50.5 | 20.6 100.0 30.1 | 14.1 25.1 40.4 | 19.6 87.2 31.1 | 36-45 | 10.9 42.0 36.5 | 10.9 42.0 36.5 | 10.8 42.2 36.5 | 14.1 95.8 30.4 | 36-78 | 11.5 32.2 38.5 | 13.6 90.8 30.8 | 11.6 39.6 37.0 | 13.6 90.4 30.8 | 45-78 | 18.0 88.6 31.0 | 18.0 88.6 31.0 | 16.2 59.6 33.9 | 19.0 91.8 30.7 | ACR-N12-36 | 17.4 24.2 29.4 | 28.0 81.4 10.1 | 15.4 24.4 29.3 | 26.6 91.0 8.0 | 12-45 | 20.4 1.7 56.6 | 29.6 88.8 8.5 | 21.3 1.6 57.0 | 31.8 89.0 8.4 | 12-78 | 19.4 6.3 44.8 | 35.0 100.0 6.0 | 18.7 3.3 50.9 | 32.9 87.2 8.8 | 36-45 | 19.6 42.0 21.5 | 32.3 100.0 6.0 | 19.5 42.0 21.5 | 28.1 95.8 6.9 | 36-78 | 16.3 6.1 45.1 | 27.2 90.8 8.0 | 16.1 5.9 45.4 | 27.1 90.4 8.1 | 45-78 | 21.7 2.2 54.5 | 31.4 88.6 8.5 | 19.4 1.6 57.0 | 32.6 91.8 7.8 | ACR-F12-36 | 17.5 1.6 53.3 | 21.8 81.2 19.2 | 17.5 1.6 53.3 | 21.8 81.2 19.2 | 12-45 | 18.9 1.5 53.9 | 22.3 81.4 19.2 | 18.8 1.5 53.9 | 22.3 81.4 19.2 | 12-78 | 32.4 72.4 20.2 | 34.9 100.0 17.4 | 32.2 72.4 20.2 | 34.8 100.0 17.4 | 36-12 | 17.7 1.5 53.9 | 21.8 80.6 19.3 | 17.7 1.5 53.9 | 21.9 80.8 19.3 | 36-45 | 18.2 100.0 17.4 | 18.2 100.0 17.4 | 18.1 100.0 17.4 | 18.1 100.0 17.4 | 36-78 | 19.3 1.7 52.8 | 22.6 91.4 18.2 | 19.2 1.7 52.8 | 22.4 91.4 18.2 | 45-12 | 18.6 1.6 53.3 | 21.6 81.4 19.2 | 18.6 1.6 53.3 | 21.6 81.4 19.2 | 45-36 | 18.9 52.8 23.0 | 20.7 100.0 17.4 | 19.0 52.8 23.0 | 20.8 100.0 17.4 | 45-78 | 15.5 1.7 52.8 | 18.7 88.8 18.4 | 15.5 1.7 52.8 | 18.6 88.8 18.4 | 78-12 | 33.4 60.2 21.8 | 34.1 98.8 17.5 | 33.5 60.2 21.8 | 34.3 98.8 17.5 | 78-36 | 18.5 1.1 56.6 | 22.8 98.0 17.6 | 18.6 1.1 56.6 | 23.0 98.0 17.6 | 78-45 | 15.8 1.7 52.8 | 18.5 83.8 18.9 | 15.8 1.7 52.8 | 18.9 86.4 18.6 | PS ACR-F12 | 18.1 1.5 50.9 | 21.8 81.4 16.2 | 18.1 1.5 50.9 | 21.9 81.2 16.2 | 36 | 17.3 1.7 49.8 | 21.5 100.0 14.4 | 17.5 1.5 50.9 | 19.4 100.0 14.4 | 45 | 16.4 1.4 51.5 | 18.8 100.0 14.4 | 16.2 1.5 50.9 | 19.0 88.8 15.4 | 78 | 17.0 1.7 49.8 | 20.2 88.8 15.4 | 17.0 1.1 53.6 | 21.1 95.8 14.8 |电缆识别名: D5 测试总结果:通过地点: Client Name 余量: 8.2 dB (远端近端串扰12-36)日期/ 时间: 08/06/2001 08:43:04pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |156 328 |230 555 |4 50 | | |14.2 100.0 24.0 |36 |155 328 |228 555 |2 50 | | |14.2 100.0 24.0 |45 |153 328 |226 555 |0 50 | | |14.3 100.0 24.0 |78 |155 328 |229 555 |3 50 | | |14.3 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 7.8 82.6 10.8 | 7.8 82.6 10.8 | 10.7 15.3 17.0 | 12.9 80.0 10.9 |36 | 5.6 82.2 10.8 | 5.6 82.2 10.8 | 5.4 17.8 17.0 | 6.9 58.2 12.4 |45 | 7.2 20.5 16.9 | 9.1 84.4 10.7 | 9.2 20.4 17.0 | 14.0 87.8 10.6 |78 | 9.3 80.6 10.9 | 9.3 80.6 10.9 | 10.6 22.2 16.6 | 12.3 62.4 12.1 |12 | 11.0 36.2 34.7 | 16.5 86.2 28.2 | 10.9 36.0 34.7 | 15.3 91.2 27.8 | 36 | 10.9 36.2 34.7 | 14.4 94.0 27.5 | 10.6 35.8 34.8 | 14.5 94.0 27.5 | 45 | 17.2 3.3 52.0 | 18.7 94.4 27.5 | 15.2 67.6 30.1 | 15.7 90.8 27.8 | 78 | 16.0 33.2 35.3 | 16.1 72.4 29.6 | 15.8 4.3 50.1 | 17.4 91.2 27.8 | PS ACR-N12 | 17.4 4.6 44.8 | 31.1 93.6 4.4 | 17.2 4.6 44.8 | 29.4 93.6 4.4 | 36 | 16.5 2.2 51.5 | 28.1 94.0 4.3 | 16.9 2.1 51.9 | 28.2 94.0 4.3 | 45 | 19.6 3.3 47.9 | 32.6 94.4 4.2 | 19.0 3.5 47.4 | 29.2 90.8 5.0 | 78 | 19.4 4.3 45.4 | 32.4 93.8 4.4 | 18.0 1.6 54.0 | 31.0 91.2 4.9 | NEXT12-36 | 8.2 36.2 37.7 | 13.6 76.8 32.1 | 8.2 36.0 37.7 | 14.0 93.6 30.6 |12-45 | 15.9 79.4 31.8 | 15.9 79.4 31.8 | 15.0 79.0 31.9 | 15.1 79.2 31.8 | 12-78 | 16.1 4.5 52.8 | 20.7 98.6 30.2 | 14.5 4.5 52.8 | 16.6 74.6 32.3 | 36-45 | 16.1 94.4 30.5 | 16.1 94.4 30.5 | 13.8 60.8 33.8 | 15.5 100.0 30.1 | 36-78 | 14.3 72.4 32.6 | 16.3 93.8 30.6 | 15.2 1.6 60.0 | 16.8 72.4 32.6 | 45-78 | 17.7 3.7 54.1 | 20.9 91.0 30.8 | 16.0 77.2 32.1 | 16.0 77.2 32.1 | ACR-N12-36 | 16.4 36.2 23.7 | 28.9 93.6 7.4 | 16.3 36.0 23.8 | 27.7 93.6 7.4 | 12-45 | 23.7 6.7 44.1 | 28.5 79.4 10.6 | 21.5 1.8 56.2 | 27.7 79.2 10.6 | 12-78 | 18.9 4.5 48.0 | 35.0 98.6 6.3 | 17.3 4.5 48.0 | 28.8 74.6 11.8 | 36-45 | 18.3 3.0 51.8 | 30.0 94.4 7.2 | 18.4 2.8 52.4 | 29.9 100.0 6.0 | 36-78 | 16.9 2.1 54.9 | 30.1 93.8 7.4 | 17.1 1.6 57.0 | 33.3 94.0 7.3 | 45-78 | 20.1 3.7 49.9 | 34.6 91.2 7.9 | 18.4 3.7 49.9 | 32.6 95.8 6.9 | ACR-F12-36 | 17.6 1.3 55.2 | 21.7 69.6 20.6 | 17.6 1.3 55.2 | 21.5 69.4 20.6 | 12-45 | 21.0 1.8 52.3 | 25.4 81.2 19.2 | 21.0 1.8 52.3 | 25.3 81.2 19.2 | 12-78 | 31.3 78.0 19.6 | 32.0 100.0 17.4 | 31.2 78.0 19.6 | 31.9 100.0 17.4 | 36-12 | 17.4 1.0 57.4 | 23.3 78.6 19.5 | 17.4 1.0 57.4 | 23.2 78.0 19.6 | 36-45 | 15.8 98.0 17.6 | 15.9 98.2 17.5 | 15.8 98.0 17.6 | 15.9 98.2 17.5 | 36-78 | 17.3 1.7 52.8 | 20.0 82.8 19.0 | 17.3 1.7 52.8 | 19.9 82.8 19.0 | 45-12 | 20.7 1.7 52.8 | 24.8 75.2 19.9 | 20.8 1.7 52.8 | 25.9 83.8 18.9 | 45-36 | 16.5 100.0 17.4 | 16.5 100.0 17.4 | 16.6 100.0 17.4 | 16.6 100.0 17.4 | 45-78 | 15.8 1.0 57.4 | 20.6 98.6 17.5 | 15.8 1.0 57.4 | 20.5 98.6 17.5 | 78-12 | 30.6 96.0 17.7 | 30.7 98.4 17.5 | 30.7 96.0 17.7 | 30.8 98.4 17.5 | 78-36 | 17.2 1.8 52.3 | 20.8 98.6 17.5 | 17.2 1.8 52.3 | 20.9 98.6 17.5 | 78-45 | 16.1 1.6 53.3 | 19.6 85.8 18.7 | 16.1 1.6 53.3 | 19.6 85.8 18.7 | PS ACR-F12 | 18.8 1.0 54.4 | 23.4 74.0 17.0 | 19.1 1.5 50.9 | 22.6 69.4 17.6 | 36 | 16.2 1.8 49.3 | 18.1 100.0 14.4 | 16.3 1.7 49.8 | 17.8 98.2 14.5 | 45 | 16.4 1.6 50.3 | 17.6 98.2 14.5 | 16.3 1.7 49.8 | 18.1 100.0 14.4 | 78 | 16.5 1.7 49.8 | 19.9 86.4 15.6 | 16.8 1.8 49.3 | 19.6 85.8 15.7 |电缆识别名: D6 测试总结果:通过地点: Client Name 余量: 8.4 dB (NEXT 36-78)日期/ 时间: 08/06/2001 08:39:19pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |157 328 |231 555 |4 50 | | |14.2 100.0 24.0 |36 |155 328 |228 555 |1 50 | | |14.1 100.0 24.0 |45 |154 328 |227 555 |0 50 | | |14.2 100.0 24.0 |78 |155 328 |229 555 |2 50 | | |14.3 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 6.8 84.8 10.7 | 6.8 84.8 10.7 | 9.2 75.4 11.2 | 9.2 75.4 11.2 |36 | 8.1 77.2 11.1 | 8.1 77.2 11.1 | 6.5 17.8 17.0 | 6.7 60.4 12.2 |45 | 5.8 22.9 16.5 | 10.0 77.6 11.1 | 8.5 20.4 17.0 | 9.0 22.8 16.5 |78 | 9.9 11.1 17.0 | 12.1 79.6 11.0 | 10.4 48.8 13.2 | 10.9 60.0 12.2 |12 | 15.1 21.6 38.5 | 16.1 87.2 28.1 | 13.7 81.8 28.6 | 13.7 81.8 28.6 | 36 | 11.0 25.5 37.3 | 13.7 100.0 27.1 | 12.9 1.6 57.0 | 13.2 97.6 27.3 | 45 | 16.8 90.6 27.8 | 16.8 90.6 27.8 | 13.9 71.8 29.6 | 14.9 100.0 27.1 | 78 | 11.2 25.5 37.3 | 13.3 100.0 27.1 | 12.5 1.6 57.0 | 16.8 95.2 27.4 | PS ACR-N12 | 21.2 21.5 27.9 | 29.3 87.2 5.8 | 20.7 6.6 41.3 | 26.5 81.8 7.0 | 36 | 16.0 4.0 46.1 | 27.9 100.0 3.0 | 14.8 1.6 54.0 | 27.3 97.6 3.5 | 45 | 22.1 1.8 53.2 | 30.2 90.6 5.1 | 21.5 8.6 38.6 | 29.2 100.0 3.0 | 78 | 16.2 4.1 45.9 | 27.7 100.0 3.0 | 14.4 1.6 54.0 | 30.6 95.2 4.1 | NEXT12-36 | 13.2 31.3 38.7 | 16.2 87.6 31.0 | 13.0 64.2 33.4 | 15.1 97.8 30.2 | 12-45 | 16.5 81.6 31.6 | 16.9 86.6 31.1 | 13.4 81.4 31.6 | 13.4 81.4 31.6 | 12-78 | 16.7 48.6 35.5 | 17.3 84.8 31.3 | 14.7 29.4 39.2 | 15.8 84.6 31.3 | 36-45 | 15.4 37.6 37.4 | 15.5 90.0 30.9 | 12.9 74.2 32.4 | 13.6 100.0 30.1 | 36-78 | 8.4 25.5 40.3 | 10.9 100.0 30.1 | 10.2 1.6 60.0 | 15.8 100.0 30.1 | 45-78 | 17.3 59.4 33.9 | 18.4 98.6 30.2 | 14.7 59.6 33.9 | 17.2 86.8 31.1 | ACR-N12-36 | 19.3 6.7 44.1 | 29.3 87.6 8.7 | 18.9 6.6 44.3 | 29.0 97.8 6.5 | 12-45 | 22.5 1.6 57.0 | 30.0 86.6 8.9 | 22.4 8.6 41.6 | 26.3 81.6 10.0 | 12-78 | 21.5 12.9 37.1 | 30.4 85.0 9.3 | 20.4 12.6 37.3 | 28.8 84.6 9.4 | 36-45 | 22.8 14.1 36.1 | 28.9 90.0 8.2 | 21.3 3.3 50.9 | 27.9 100.0 6.0 | 36-78 | 13.7 4.1 48.9 | 25.3 100.0 6.0 | 12.1 1.6 57.0 | 30.2 100.0 6.0 | 45-78 | 23.1 2.1 54.9 | 32.7 98.6 6.3 | 22.4 15.4 35.0 | 30.4 86.8 8.9 | ACR-F12-36 | 18.1 1.7 52.8 | 23.0 78.2 19.6 | 18.1 1.7 52.8 | 23.0 78.2 19.6 | 12-45 | 24.5 1.3 55.2 | 29.6 99.4 17.4 | 24.4 1.3 55.2 | 29.6 99.4 17.4 | 12-78 | 27.1 1.6 53.3 | 27.6 94.8 17.8 | 27.1 1.6 53.3 | 27.5 94.8 17.8 | 36-12 | 18.0 1.6 53.3 | 23.5 80.4 19.3 | 18.0 1.6 53.3 | 23.6 80.4 19.3 | 36-45 | 22.9 99.2 17.5 | 23.0 100.0 17.4 | 22.8 99.8 17.4 | 22.8 99.8 17.4 | 36-78 | 22.6 78.4 19.5 | 22.8 87.2 18.5 | 22.5 86.8 18.6 | 22.5 86.8 18.6 | 45-12 | 24.7 22.9 30.2 | 27.6 89.4 18.3 | 24.7 23.1 30.2 | 27.7 89.4 18.3 | 45-36 | 23.9 95.4 17.8 | 24.1 98.0 17.6 | 24.1 95.4 17.8 | 24.2 98.0 17.6 | 45-78 | 18.0 1.7 52.8 | 21.5 82.6 19.0 | 18.1 1.7 52.8 | 23.0 98.4 17.5 | 78-12 | 26.9 1.0 57.4 | 28.3 100.0 17.4 | 27.0 1.5 53.9 | 28.4 100.0 17.4 | 78-36 | 22.6 97.6 17.6 | 22.6 97.6 17.6 | 22.7 97.6 17.6 | 22.7 97.6 17.6 | 78-45 | 18.1 1.5 53.9 | 20.8 77.8 19.6 | 18.0 1.5 53.9 | 21.0 78.4 19.5 | PS ACR-F12 | 19.8 1.6 50.3 | 25.0 89.4 15.3 | 19.8 1.3 52.2 | 24.0 78.2 16.6 | 36 | 19.7 1.6 50.3 | 22.9 97.8 14.6 | 19.7 1.7 49.8 | 23.0 100.0 14.4 | 45 | 20.1 1.5 50.9 | 22.8 99.2 14.5 | 20.1 1.7 49.8 | 23.1 98.0 14.6 | 78 | 19.4 1.7 49.8 | 21.9 87.4 15.5 | 19.4 1.5 50.9 | 22.7 97.6 14.6 |电缆识别名: D7 测试总结果:通过地点: Client Name 余量: 10.6 dB (远端近端串扰12-36) 日期/ 时间: 08/06/2001 08:40:17pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |157 328 |232 555 |4 50 | | |14.1 100.0 24.0 |36 |155 328 |229 555 |1 50 | | |14.1 100.0 24.0 |45 |155 328 |228 555 |0 50 | | |14.2 100.0 24.0 |78 |156 328 |230 555 |2 50 | | |14.3 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 7.3 82.2 10.8 | 7.3 82.2 10.8 | 9.2 72.8 11.4 | 9.2 72.8 11.4 |36 | 6.9 74.6 11.3 | 6.9 74.6 11.3 | 7.1 74.2 11.3 | 7.1 74.2 11.3 |45 | 6.8 22.6 16.5 | 8.0 81.8 10.9 | 9.4 22.6 16.5 | 12.9 87.2 10.6 |78 | 9.8 11.0 17.0 | 12.5 81.8 10.9 | 10.9 17.8 17.0 | 11.3 46.2 13.4 |12 | 14.5 26.1 37.1 | 15.7 89.6 27.9 | 13.0 94.6 27.5 | 13.0 94.6 27.5 | 36 | 13.5 26.5 37.0 | 14.0 99.6 27.1 | 12.6 95.0 27.5 | 12.8 97.4 27.3 | 45 | 14.7 92.6 27.7 | 15.0 97.8 27.2 | 13.5 97.8 27.2 | 13.5 97.8 27.2 | 78 | 16.4 66.4 30.2 | 17.9 100.0 27.1 | 15.9 97.6 27.3 | 16.0 98.0 27.2 | PS ACR-N12 | 21.2 26.1 25.4 | 29.0 89.6 5.3 | 20.2 26.3 25.3 | 26.7 94.6 4.2 | 36 | 17.5 4.7 44.6 | 28.1 99.6 3.1 | 18.0 4.6 44.8 | 27.3 100.0 3.0 | 45 | 20.8 10.2 36.7 | 29.0 97.8 3.5 | 19.3 10.1 36.8 | 27.5 97.8 3.5 | 78 | 19.3 4.8 44.4 | 32.3 100.0 3.0 | 20.7 4.7 44.6 | 30.1 98.0 3.5 | NEXT12-36 | 11.9 26.2 40.1 | 14.1 94.8 30.5 | 10.6 94.8 30.5 | 10.6 94.8 30.5 | 12-45 | 15.0 92.0 30.7 | 15.0 92.0 30.7 | 15.1 92.4 30.7 | 15.1 92.4 30.7 | 12-78 | 17.3 89.0 30.9 | 17.3 89.0 30.9 | 18.1 97.6 30.3 | 18.2 97.8 30.2 | 36-45 | 13.2 97.6 30.3 | 13.3 97.8 30.2 | 11.5 97.6 30.3 | 11.6 97.8 30.2 | 36-78 | 13.9 4.8 52.3 | 14.9 100.0 30.1 | 15.2 4.7 52.4 | 15.9 99.8 30.1 | 45-78 | 16.4 18.4 42.6 | 18.4 98.0 30.2 | 16.7 98.0 30.2 | 16.7 98.0 30.2 | ACR-N12-36 | 18.7 26.1 28.4 | 27.8 94.8 7.2 | 17.6 26.5 28.2 | 24.3 94.8 7.2 | 12-45 | 20.6 10.2 39.7 | 28.5 92.0 7.8 | 19.8 2.9 52.1 | 28.7 92.4 7.7 | 12-78 | 24.2 13.8 36.3 | 30.6 89.0 8.4 | 25.8 10.1 39.8 | 32.3 97.8 6.5 | 36-45 | 20.2 6.7 44.1 | 27.3 97.8 6.5 | 19.2 9.9 40.0 | 25.6 97.8 6.5 | 36-78 | 16.7 4.8 47.4 | 29.3 100.0 6.0 | 17.9 4.7 47.6 | 30.2 99.8 6.1 | 45-78 | 21.9 18.2 33.0 | 32.5 98.0 6.5 | 22.2 18.2 33.0 | 30.8 98.0 6.5 | ACR-F12-36 | 18.3 1.7 52.8 | 21.5 75.8 19.8 | 18.3 1.7 52.8 | 21.4 75.8 19.8 | 12-45 | 17.8 2.0 51.4 | 20.7 73.8 20.1 | 17.8 2.0 51.4 | 20.6 73.8 20.1 | 12-78 | 24.5 1.1 56.6 | 27.2 91.2 18.2 | 24.4 1.1 56.6 | 27.9 100.0 17.4 | 36-12 | 17.8 1.0 57.4 | 23.5 86.4 18.6 | 17.8 1.0 57.4 | 22.5 77.4 19.6 | 36-45 | 17.7 100.0 17.4 | 17.7 100.0 17.4 | 17.6 100.0 17.4 | 17.6 100.0 17.4 | 36-78 | 20.4 1.5 53.9 | 25.8 97.8 17.6 | 20.4 1.5 53.9 | 25.6 97.8 17.6 | 45-12 | 17.3 1.5 53.9 | 21.1 81.4 19.2 | 17.4 1.5 53.9 | 21.1 81.4 19.2 | 45-36 | 18.3 100.0 17.4 | 18.3 100.0 17.4 | 18.4 100.0 17.4 | 18.4 100.0 17.4 | 45-78 | 16.5 3.5 46.6 | 19.2 97.8 17.6 | 16.5 3.5 46.6 | 19.1 97.8 17.6 | 78-12 | 24.2 1.0 57.4 | 26.5 94.4 17.9 | 24.3 1.0 57.4 | 26.7 94.4 17.9 | 78-36 | 20.1 1.5 53.9 | 25.1 99.8 17.4 | 20.1 1.5 53.9 | 25.3 99.8 17.4 | 78-45 | 16.6 1.6 53.3 | 20.1 100.0 17.4 | 16.5 1.5 53.9 | 20.2 100.0 17.4 | PS ACR-F12 | 17.4 1.5 50.9 | 21.8 86.4 15.6 | 17.7 1.9 48.8 | 20.7 76.0 16.8 | 36 | 18.0 2.2 47.5 | 20.1 100.0 14.4 | 18.1 2.0 48.4 | 19.6 100.0 14.4 | 45 | 16.5 18.7 29.0 | 18.2 100.0 14.4 | 16.2 5.6 39.5 | 18.3 100.0 14.4 | 78 | 17.7 1.8 49.3 | 20.9 97.8 14.6 | 17.5 1.5 50.9 | 21.5 100.0 14.4 |电缆识别名: D8 测试总结果:通过地点: Client Name 余量: 10.6 dB (远端近端串扰36-78) 日期/ 时间: 08/06/2001 08:48:10pm 测试限: TIA Cat 5e Channel操作人员: Your Name 电缆类型: UTP 100 Ohm Cat 5e软件版本: 4.925 DSP-4100 S/N: 7610021 LIA 013 NVP: 69.0% 阻抗异常临界值: 15% DSP-4100SR S/N: 7767009 LIA 012屏蔽测试: 不适用测试限版本: 5.17接线图: 通过结果RJ45 PIN: 1 2 3 4 5 6 7 8 S| | | | | | | |RJ45 PIN: 1 2 3 4 5 6 7 8 |长度|传输|时延|电阻值|特性阻抗|插入损耗|| |时延|偏离| | 异常点|结果频率极限值|线对|(ft) 极限值|ns 极限值|ns 极限值|欧姆极限值|欧姆极限值(ft)| (dB) MHz (dB)|12 |157 328 |231 555 |4 50 | | |14.2 100.0 24.0 |36 |155 328 |228 555 |1 50 | | |14.1 100.0 24.0 |45 |154 328 |227 555 |0 50 | | |14.2 100.0 24.0 |78 |155 328 |229 555 |2 50 | | |14.2 100.0 24.0 || 主机结果| 远端结果||最差余量|最差值|最差余量|最差值||余量频率极限值|余量频率极限值|余量频率极限值|余量频率极限值|线对| (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) | (dB) MHz (dB) |RL12 | 6.9 82.6 10.8 | 6.9 82.6 10.8 | 9.6 17.3 17.0 | 10.9 71.0 11.5 |36 | 8.1 81.8 10.9 | 8.3 84.2 10.7 | 6.3 17.9 17.0 | 9.7 69.8 11.6 |45 | 7.1 20.4 17.0 | 8.7 72.4 11.4 | 6.5 20.3 17.0 | 10.6 85.0 10.7 |78 | 9.2 33.2 14.9 | 11.4 75.8 11.2 | 8.6 22.4 16.6 | 10.0 76.0 11.2 |。
控制类拖链电缆规格参数
荣缆特种机器人电缆（深圳）有限公司控制类拖链电缆产品介绍1.800万次PVC高速运动电源拖链电缆（黑色外皮）1.1产品用途：用于拖链系统电源，阻燃，耐油，高柔性1.2 电缆结构导体：多股超细精绞无氧铜丝绝缘：PVC填充：棉线绕包：绵纸外被：耐油PVC护套颜色：雾面黑芯线：彩色１.３技术参数额定电压：３００V温度范围：－５－８０℃放电检测：２ＫＶ特性阻抗：９０±１５％Ω绝缘电阻：DC ５００V １００MΩ／Ｍｉｎ弯折次数：８００万次１.５产品包装：１００M/Ｒ重量仅供参考（１００M/Ｒ的重量，单位为公斤）２.1产品用途：用于拖链系统电源，阻燃，耐油，高柔性２.2 电缆结构导体：多股超细精绞无氧铜丝绝缘：PVC填充：棉线绕包：绵纸外被：耐油PVC护套颜色：灰黑芯线：彩色２.３技术参数额定电压：３００V温度范围：－５－８０℃放电检测：２ＫＶ特性阻抗：９０±１５％Ω绝缘电阻：DC ５００V １００MΩ／Ｍｉｎ弯折次数：８００万次２.５产品包装：１００M/Ｒ重量仅供参考（１００M/Ｒ的重量，单位为公斤）3.1产品用途：用于拖链系统电源，阻燃，耐油，高柔性3.2 电缆结构导体：多股超细精绞无氧铜丝绝缘：PVC填充：棉线绕包：绵纸外被：耐油PVC护套颜色：雾面黑芯线：彩色3.3技术参数额定电压：300V温度范围：－40－80℃放电检测：2ＫＶ特性阻抗：90±15％Ω绝缘电阻：DC 500V 100MΩ／Min弯折次数：1000万次3.5 产品包装：100M/Ｒ重量仅供参考（100M/Ｒ的重量，单位为公斤）4.1000万次PVC高速运动电源屏蔽拖链电缆（黑色外皮带屏蔽）4.1产品用途：用于信号传输，抗干扰，阻燃，耐油，高柔性4.2 电缆结构导体：多股超细精绞无氧铜丝绝缘：高机械性能PVC混合物填充：棉线绕包：绵纸外被：低粘性PVC基混合物屏蔽：镀锡铜网编织屏蔽，屏蔽率90%以上护套颜色：雾面黑芯线：彩色芯（2-8芯）黑色编码(10-30芯)4.3技术参数额定电压：300V温度范围：－40－80℃放电检测：2ＫＶ特性阻抗：90±15％Ω绝缘电阻：DC 500V 100MΩ／Min弯折次数：1000万次4.4 应用场合适用于物流设备系统、五金冲压、机械手、建筑机械、码头、消防车、汽车制造、木材石材加工设备、机床加工等。
电线电缆基础知识VCOM培训
诚信、敬业、务实
唯康通信
线缆代号意义
KVV 聚氯乙烯绝缘控制电缆 用途：电器、 仪表、配电装置信号传输、控制、测量
SYV 同轴电缆 无线通讯、广播、监控系统工 程和有关电子设备中传输射频信号（含综合用 同轴电缆）
诚信、敬业、务实
唯康通信
线缆选型举例
1 、视频线 摄像机到监控主机距离≤200 米 ，用SYV75-3视频线。 摄像机到监控主机距离＞200 米 ，用SYV75-5视频线。 2 、云台控制线 云台与控制器距离 ≤ 100 米 ，用 RVV6×0.5 护套线。 云台与控制器距离＞ 100 米 ，用 RVV6×0.75 护套线。 3 、镜头控制线 采用 RVV4×0.5 护套线。 4 、解码器通讯线 应采用 RVV2×1 屏蔽双绞线
电线电缆主要包括裸线、电磁线及电机电器用绝缘电线、 电力电缆、通信电缆与光缆。
诚信、敬业、务实
唯康通信
电线电缆命名原则
1、产品名称中包括的内容
(1)产品应用场合或大小类名称
(2)产品结构材料或型式；
(3)产品的重要特征或附加特征
基本按上述顺序命名，有时为了强调重要或附加特
征，将特征写到前面或相应的结构描述前。
RVS 与RVV 2芯
区别： RVS为双芯RV线绞合而成，没有外护套，用于
广播连接。
RVV 2芯线直放成缆，有外护套，用于电源，控制信号
等方面
诚信、敬业、务实
唯康通信
谢谢！
诚信、敬业、务实
唯康通信
➢ 在监控系统中，从解码器到云台及镜头之间的控制电 缆由于距离比较短一般不作特别要求；而由中控室的 控制器到云台及电动镜头的距离少则几十米，多则几 百米，对控制电缆就需要有一定的要求，即线径要粗
UL阻燃CMCMRCMP等级和LSZH网线
UL阻燃CM/CMR/CMP等级和LSZH网线随着信息系统日益普及，开始进入各种工作环境和每家每户，综合布线系统已经从二十年前的新发明转变为人们日常生活中随处可见的信息系统传输电缆。
当人们能够完成高稳定、高可靠的综合布线系统时，布线系统是否能抵御外部侵袭和避免对外危害就成为人们注意的新目标。
在现代社会中，人们越来越依赖火，也越来越被火所危害，所以建筑材料，包括综合布线系统的防火安全性就成为人们关注的内容。
外界的火会破坏综合布线系统，引起传输中断；同时，综合布线系统在火焰中，或多或少的会产生有害气体、烟气，还可能有助于火势逐步蔓延到其它楼层或其它房间。
根据消防部门的统计，在火灾中，约有85%的死亡是由于火灾中产生的有害气体毒死、被弥漫的烟气窒息或因看不见路径而无法逃生。
而建筑物内，综合布线缆线数量之多、遍布之广超过了建筑物中的各种缆线，因此综合布线系统的防火已经开始成为人们对系统性能的重点考虑因素之一。
在中国，目前主要用到的阻燃型缆线有：⊙ CM级缆线CM级缆线是目前最常用的双绞线阻燃等级，它的测试标准为UL 1581。
在中国，常规的双绞线几乎都可以满足CM级阻燃测试。
因此CM级网线的防火特点如下：◆不会自燃；◆在火焰中会冒烟，并可能出现火苗；◆火焰顺缆线蔓延的速度很慢；◆当外部火源切断后，缆线上的火苗会逐渐熄灭。
CM级缆线只要符合阻燃等级要求即可，它不考虑烟密度和毒性（在UL 1581中没有提及烟密度和毒性）。
CM级缆线大多是水平双绞线，在配线子系统中使用。
CM级缆线的护套层多为PVC材料，绝缘层则为高密度PE材料。
它的优点是价格便宜，而缺点是燃点低，常规的工作温度为70℃以下，当温度达到160℃或更高时，PVC材料会散发出有毒的卤素和烟雾。
如果不幸烧着了它，还会释放出大量的热量。
根据综合布线施工规范，双绞线应该穿金属管、金属桥架后敷设在楼板、天花和墙内。
这时，采用普通双绞线就可以安装在不需要考虑烟和毒性的任何场合。
GS88236BB-333I资料
© 2002, GSI Technology
元器件交易网
GS88218/36BB/D-333/300/250/200/150
165 Bump BGA—x18 Commom I/O—Top View (Package D)
1
2
9
10
11
A
NC
A
E1
BB
NC
E3
元器件交易网
GS88218/36BB/D-333/300/250/200/150
119- and 165-Bump BGA Commercial Temp Industrial Temp
512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
Controls Addresses, data I/Os, chip enable (E1), address burst control inputs (ADSP, ADSC, ADV), and write control inputs (Bx, BW, GW) are synchronous and are controlled by a positive-edgetriggered clock input (CK). Output enable (G) and power down control (ZZ) are asynchronous inputs. Burst cycles can be initiated with either ADSP or ADSC inputs. In Burst mode, subsequent burst addresses are generated internally and are controlled by
电缆工艺技术之塑料挤出及牵引速度
电缆工艺技术之塑料挤出及牵引速度
塑料挤出的速度
由塑料挤出机物料输送和均化段粘流体的流率分析可知，塑料流率（即挤出速度）和螺杆转速成正比，由于调节方便，螺杆转速是挤出过程中表征挤出速度的重要操作变量。
因此，在一般情况下，提高螺杆转速是现代塑料挤出机提高生产能力，实现高速挤出的重要手段。
但对塑料熔融长度分析得知，螺杆转速增加，一方面由于增强剪切作用，使粘性耗散热量增加；另一方面，在没有机头压力控制的情况下，螺杆转速增加，流率增加，物料在机内停留的时间缩短。
而且后者的影响超过前者，会因熔融长度延长至均化段而破坏正常的挤出过程。
所以需要增加螺杆转速来提高挤出速度时，还必须增加加热温度或采用控制机头压力才能达到目的。
塑料挤出速度或塑化的好坏与使用的塑料材质和温度控制有关，各种塑料的塑化温度有所不同。
如果要快速挤出塑料，只有材质优良，温度适当，才能实现。
另外，挤出速度与挤出厚度也有密切关系，正常挤出过程中，出胶量大，挤出速度慢；反之，挤出速度就快，在保证质量的前提下，可适当提高挤出速度。
牵引速度
挤包制品是由牵引装置拖动通过机头的，为保证产品的质量，要求牵引速度均匀稳定，与螺杆转速协调，以保证挤出厚度和制品外径的均匀性。
如果牵引速度不稳定，挤包层易形成竹节状，而牵引过慢时挤出厚度大，且发生堆胶或空管现象；牵引速度过快时，易造成挤出拉薄拉细，甚至出现脱胶漏包现象。
所以正常挤出过程中，一定要控制好牵引速度。
拉伸比DDR-电缆情缘网
ｄｃ ｄｂ
ＤＤ ＤＴ
拉伸比（ＤＤＲ）＝（ＤD 2 － D T 2）/（ｄb2 － 拉伸平衡（ＤＲＢ）＝（ＤＤ/ｄb）/（ＤＴ/ｄc）
ｄc2）
23
拉伸比：S、DDR
所谓拉伸比就是塑料在模口 处的圆环面积与包覆与电线 电缆上的圆环面积之比，即 模芯模套所形成的间隙截面 积与制品标称厚度截面积之 比值；
（2）操作简单，偏芯易调整。挤出物的径向厚度的均匀性 只由内外模的同心度来决定。只需调整机头调偏螺钉，即可 达到所要求的偏心度。
（3）配模方便。同一套模具可以利用调整拉伸比的办法， 挤制不同尺寸的护套。
（4）塑料经拉伸后发生“定向”作用，特别对结晶性高聚 物，其机械强度经拉伸后明显提高。
电线电缆用辅机：放线（主/被动）、预热（电热/感应）、 校直、冷却定型、标识（油墨/色带/喷印）、测量（X光厚 度/直径）、检测（火花/凸凹/电容）、牵引、计米、收排 线等。
辅机往往形成衡量挤出机技术水平的重要标志
14
挤压成型系统
1.加料装置,可分为:
a.人工加料
b.自动加料
2.挤压套筒:它是挤塑机的机膛,有内套筒和外套筒组成,共同接受电加热,在内外 套筒间安置加热,内套筒与螺杆配合,实现对对塑料的粉碎,软化,熔融,排气,压实, 并输送胶料.
聚氯乙稀 150～ 160～ 175～ 175～ 170～ 170～ 160℃ 170℃ 185℃ 180℃ 175℃ 180℃
HDPE
140～ 180～ 210～ 210～ 200～ 200～ 150℃ 190℃ 220℃ 215℃ 190℃ 210℃
LDPE
130～ 160～ 175～ 170～ 170～ 170～ 140℃ 170℃ 185℃ 180℃ 175℃ 180℃
DJYP2VP2电缆
DJYP2VP2电缆本产品适用于交流U0/U为300/500V电力、冶金、石化等行业以电子计算机为主的自动控制系统、DJYP2VP2电缆自动化控制系统作控制线以及检测用仪器仪表用电子DJYP2VP2电缆。
二：产品执行标准Q/CL04-2003(等效采用英国BS5308标准阻燃性能试验执行GB12666-90标准DJYP2VP2电缆交流额定电压：U0/U 300/500KV， DJYP2VP2电缆最高工作温度：聚乙烯绝缘不超过70℃交联聚乙烯绝缘90℃低烟无卤阻燃聚烯烃70℃，计算机屏蔽电缆低烟无卤阻燃交联聚烯烃90℃和125℃两种， DJYP2VP2电缆最低环境温度：聚氯乙烯护套：固定敷设-40℃，非固定敷设-15℃ DJYP2VP2电缆安装敷设温度应不低于0℃。
DJYP2VP2电缆允许弯曲半径：非铠装电缆最小为电缆外径的6倍基本型号及名称1.聚乙烯绝缘聚氯乙烯护套计算机用屏蔽电缆(包括DCS电缆)DJYV(R)P聚乙烯绝缘铜丝编织总屏聚氯乙烯护套计算机用屏蔽(软)电缆DJYPV(R) DJYPV(R)P DJYV(R)P2 DJYP2V(R) DJYP2V(R)P2亚太线缆-致力于贯通全亚洲DJYV(R)P3 DJYP3V(R) DJYP3V(R)P DJYVP(R)22 DJYP(R)V22DJYPV(R)P22 DJYV(R)P2-22 DJYP2V(R)22 DJYP2V(R)P2-22DJYVP3(R)-22 DJYP3V(R)22亚太屏蔽铠装 DJYP2VP2电缆实物图：亚太线缆-致力于贯通全亚洲公司简介亚太线缆（AsiaPacificCable）是一家致力于：网络综合布线、 DJYP2VP2电缆、屏蔽控制电缆、光纤光缆、电力电缆、通讯产品等研发、生产、销售的科技公司，并提供系统解决方案的公司，是全球知名品牌，总部位于北美，通过其运营子公司在亚太地区从事通讯电缆、电力电缆及漆包线等产品的制造与分销，营运范围主要分布于新加坡、泰国、澳大利亚和中国大陆。
PDS测试标准
系统性能指标1．系统测试综合布线系统测试包括：水平双绞线链路测试、垂直干线铜缆链测试、垂直干线光缆链测试。
系统测试完毕后，即组织相关技术及管理人员对整个系统进行验收。
1.1 6类水平双绞线的测试说明6类水平双绞线系统的测试指标主要包括：1)．长度、连续性、短路、断路测试2)．信号全程衰减测试3)．信号近、远串音衰耗测试4)．特性阻抗5)．传输延时6)．屏蔽线缆的连通性ISO/IEC ClassE 6类布线标准草案中规定的信道性指标值衰减（Atten）表示一个信号沿电缆传输时振幅减弱或降低的程度，由铜缆或介质损耗引起。
衰减值越小越好。
近端串扰（Next）是指传输线对感应到接收线对上的干扰信号。
Next隔离度用dB表示，用来衡量电缆中的线对彼此隔离的程度。
Next隔离度越大，表示感应到其它线对上的干扰信号越小，隔离程度越高，电缆质量也就越好。
线对间近端串扰（pr-pr Next）表示在线对数少的电缆中（4对或4对以下），假设其中有一个干扰线对，那这个干扰线对与其它任意一个线对间的Next值中最差就是线对间近端串扰。
同样pr-pr Next越大越好。
功率累加的近端串扰（PSNext）表示在线对数大于4对的电缆中，所有的干扰线对与受扰线对间的Next值之和。
同样PSNext越大越好。
远端串扰（Fext）是指由近端别的线对上的信号引起的、感应到远端线对上的信号。
Fext隔离度用dB表示。
同样Fext隔离度越大，电缆质量也就越好。
等级远端串扰（ELFext）与Fext基本相同，不同点在于：ELfext中远端感应的信号是相对于别的线对上的信号经过衰减后到达远端的信号。
ELFext隔离度用dB表示。
同样ELFext隔离度越大，电缆质量也就越好。
pr-pr ELFext与pr-pr Next一样，考虑两对线对间的影响，同样pr-pr ELFext 值越大越好。
PSELFext与PSNext一样，考虑多线对间的影响，同样PSELFext值越大越好。
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常用绝缘和护套高分子材料1
聚氯乙烯 ( PVC)：长期使用温度70°C、 90°C、 105°C.
弹性体：弹性聚氯乙烯、丁氰-聚氯乙烯，长期使用温度 70°C
聚乙烯 ( PE )
LDPE(低密度聚乙烯)长期使用温度70°C.
MDPE(中密度聚乙烯)长期使用温度70°C.
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常用绝缘和护套高分子材料2
氟塑料
PTFE(聚四氟乙烯)：长期使用温度250°C FEP(聚全氟乙丙烯) ：长期使用温度200°C PFA(可熔性聚四氟乙烯) ：长期使用温度250°C ETFE XETFE ( 聚 乙 烯 - 四 氟 乙 烯 ) ： 长 期 使 用 温 度
1、裸电线及裸导体制品
2、电力电缆
3、电气装备用电线电缆
4、通讯电缆及光纤
5、电磁线（绕组线）
6.电线电缆的衍生新产品
因应用采用不同材料如：阻燃线缆、低烟无卤/低烟低卤线
缆、防白蚁、防老鼠线缆、耐油/耐寒/耐温线缆等；
改变产品结构如：耐火电缆等；
提高工艺要求如：医用线缆等；
组合产品如：OPGW等；
方便安装和降低装备成本如：预制分支电缆等。
150°C/200°C PVDF（聚偏氟乙烯）长期使用温度150°C
尼龙：PA6 PA66 PA10…一般用于护套 聚酰亚胺：PI ：长期使用温度250°C
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树脂&塑料
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合成树脂+配合剂=塑料
塑料的配合剂大致有以下几种：防老剂（它 包括抗氧剂、稳定剂、紫外线吸收剂、光屏 蔽剂等，这几种材料在塑料中所起的作用不 同但又相互联系，同一种材料可起几种作用， 所以统称为防老剂。）；增塑剂；交联剂； 润滑剂；填充剂；着色剂；发泡剂；防霉剂； 驱避剂；阻燃剂；耐电压稳定剂；抑烟剂等。
3.挤压螺杆:
加料段:颗粒状塑料从料斗进入机筒螺杆.由于螺杆的旋转,产生足够大的推力 和反向摩擦力,形成稳定的压力,使胶料混合,初步加热,软化塑料向压缩段推进.
压缩段:由于此段温度较高,预热好的塑料开始塑化压实,最后由固态塑料转变 为熔融态塑料.因为螺杆的旋转,继续对塑料进行混合搅拌,实现初步塑化且初步 压实.
电线电缆挤塑工艺
2010年3月
1
电线电缆
用以传输电（磁）能，信息和实现电磁能转 换的线材产品．
广义的电线电缆亦简称为电缆．狭义的电缆是指绝缘电 缆．它可定义为：由下列部分组成的集合体：一根或多根绝 缘线芯，以及它们各自可能具有的包覆层，总保护层及外护 层．电缆亦可有附加的没有绝缘的导体。
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电线电缆产品分类
螺杆：普通螺杆、分离型螺杆、销钉螺杆、 屏障螺杆、突变螺杆；螺杆参数不同再细分 为挤出专用塑料的螺杆；
螺杆主要参数：直径D、长径比L/D、压缩比、 螺槽宽度/深度、螺旋角、螺纹形式…
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挤塑主机和辅机
主机:挤出机以及挤出机的控制系统,传动系统和挤压成型 系统.
挤压成型系统是押出机的主体和核心.
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塑料挤出机
主要部分：控制系统,传动系统和挤压成型系统.
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单螺杆挤出（塑）机的表示
塑料挤出机型号包括螺杆直徑,长徑比,加热方 式,冷却方式等技术参数.
举例:SJ90-25DF
其中:S-塑料
25-长徑比25:1
J-挤出
D-电加热
90-螺杆直徑90mm F-风冷
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单螺杆挤出机规格系列
Ø20、 Ø25、 Ø30、 Ø35、 Ø45、 Ø50、 Ø65、 Ø90、 Ø120、 Ø150、 Ø200、 Ø250
电线电缆用辅机：放线（主/被动）、预热（电热/感应）、 校直、冷却定型、标识（油墨/色带/喷印）、测量（X光厚 度/直径）、检测（火花/凸凹/电容）、牵引、计米、收排 线等。
辅机往往形成衡量挤出机技术水平的重要标志
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挤压成型系统
1.加料装置,可分为:
a.人工加料
b.自动加料
2.挤压套筒:它是挤塑机的机膛,有内套筒和外套筒组成,共同接受电加热,在内外 套筒间安置加热,内套筒与螺杆配合,实现对对塑料的粉碎,软化,熔融,排气,压实, 并输送胶料.
5.机头:是由合金钢内套和碳素钢外套构成.机头安装有挤压模具.机头既是保温
器,有是压实装置.机頭和机身的位置可分为直角机头(机头和机身成90度角)和斜
角机头(机头和机身成120度角).
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挤塑参考温度
塑料品种 加料段 熔融段 均化段 机脖
机头
模口
聚氯乙稀 130～ 150～ 155～ 160～ 160～ 170～ 140℃ 170℃ 180℃ 180℃ 175℃ 180℃
HDPE(高密度聚乙烯)长期使用温度70°C
LLDPE (线性低密度聚乙烯)长期使用温度70°C.
XLPE(交联聚乙烯)长期使用温度90°C、 105°C 、 125°C.
聚烯烃（弹性体、低烟无卤）70°C、 90°C、 105°C 、 125°C.
聚丙烯（PP）长期使用温度90°C
熔融段(均压段):在螺杆旋转推力的作用下,经初步塑化,初步压实的塑料被推 入均压段,此段螺槽溶剂最小,从而产生更大的压力,温度又最高,塑料在高温高压 下,塑化更均匀,在落感的推力下,等压定量的被推如机头,从模口挤出成型.
4.过滤板:放在螺杆顶端的过滤器,可放置40—120目的网膜,可用合金钢制成,圓 孔成60度倒角,使胶道成流线型,蜂巢板中间孔分布疏,边密.用语过滤塑料中的较 大的杂质,调节压力使料流由旋转运动变为直线运动.
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电线电缆原材料 导体和金属材料 绝缘和护套材料 屏蔽材料 填充材料 分隔材料
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导体和金属材料
名称
常用金属材料特性
符号 比重 熔点(℃) 导电系数百分比
银
Ag
10.5
960.8
109
金
Au
19.3
1063
70.8
铝
Al
2.7
660
61.2
铜
Cu
8.92
10832.7
铁
Fe
7.86
1535
17.2
铅
Pb
11.3
327
7.9
锡
Sn
7.28
231
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注 :导电系数以铜为基准(20℃)
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绞合导体
•单线：如Ф 1.75、 Ф2.7 •束线：如32/0.2、30/0.08 •正规绞合：如7/1.33，1+6+12+18+24 •复绞线：如49/0.25、56/0.3 •紧压导体：如7/3.06