MS32 10015, 规格书,Datasheet 资料

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SI2302-TP;中文规格书,Datasheet资料

SI2302-TP;中文规格书,Datasheet资料
Figure 6. Body Diode Forward Voltage Variation with Source Current
Revision: A
/

3 of 5
2011/01/01
VGS, Gate to Source Voltage (V) ID, Drain Current (A)
VTH, Normalized Gate-Source Threshold Voltage
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
IS, Source-drain current (A)
ID, Drain Current (A)
SI2302
10 25 C
Maximum Ratings @ 25OC Unless Otherwise Specified
Symbol VDS ID IDM VGS
PD R©JA
TJ
TSTG
Parameter Drain-source Voltage Drain Current-Continuous Drain Current-Pulsed a Gate-source Voltage
MCC
TM
Micro Commercial Components
5 VDS=10V ID=3.6A
4
3
2
1
0
0
2
4
6
Qg, Total Gate Charge (nC)
Figure 7. Gate Charge
VDD
RL VIN
D
VOUT
VGS
RGEN G
S
Figure 9. Switching Test Circuit

AD2S1205WSTZ;AD2S1205YSTZ;ADW71205WSTZ-RL;ADW71205WSTZ;ADW71205YSTZ;中文规格书,Datasheet资料

AD2S1205WSTZ;AD2S1205YSTZ;ADW71205WSTZ-RL;ADW71205WSTZ;ADW71205YSTZ;中文规格书,Datasheet资料

12-Bit RDCwith Reference OscillatorAD2S1205 Rev. AInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, M A 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2007–2010 Analog Devices, Inc. All rights reserved.FEATURESComplete monolithic resolver-to-digital converter (RDC) Parallel and serial 12-bit data portsSystem fault detection±11 arc minutes of accuracyInput signal range: 3.15 V p-p ± 27%Absolute position and velocity outputs1250 rps maximum tracking rate, 12-bit resolution Incremental encoder emulation (1024 pulses/rev) Programmable sinusoidal oscillator on boardSingle-supply operation (5.00 V ± 5%)−40°C to +125°C temperature rating44-lead LQFP4 kV ESD protectionQualified for automotive applications APPLICATIONSAutomotive motion sensing and controlHybrid-electric vehiclesElectric power steeringIntegrated starter generator/alternatorIndustrial motor controlProcess control FUNCTIONAL BLOCK DIAGRAMFigure 1.GENERAL DESCRIPTIONThe AD2S1205 is a complete 12-bit resolution tracking resolver-to-digital converter that contains an on-board programmable sinusoidal oscillator providing sine wave excitation for resolvers.The converter accepts 3.15 V p-p ± 27% input signals on the Sin and Cos inputs. A Type II tracking loop is employed to track the inputs and convert the input Sin and Cos information into a digital representation of the input angle and velocity. The maximum tracking rate is a function of the external clock frequency. The performance of the AD2S105 is specified across a frequency range of 8.192 MHz ± 25%, allowing a maximum tracking rate of 1250 rps. PRODUCT HIGHLIGHTS1.Ratiometric Tracking Conversion. The Type II trackingloop provides continuous output position data withoutconversion delay. It also provides noise immunity andtolerance of harmonic distortion on the reference andinput signals.2.System Fault Detection. A fault detection circuit can senseloss of resolver signals, out-of-range input signals, inputsignal mismatch, or loss of position tracking.3.Input Signal Range. The Sin and Cos inputs can acceptdifferential input voltages of 3.15 V p-p ± 27%.4.Programmable Excitation Frequency. Excitation frequencyis easily programmable to 10 kHz, 12 kHz, 15 kHz, or 20 kHz by using the frequency select pins (the FS1 and FS2 pins).5.Triple Format Position Data. Absolute 12-bit angular positiondata is accessed via either a 12-bit parallel port or a 3-wire serial interface. Incremental encoder emulation is in standard A-quad-B format with direction output available.6.Digital Velocity Output. 12-bit signed digital velocity accessedvia either a 12-bit parallel port or a 3-wire serial interface.AD2S1205Rev. A | Page 2 of 20TABLE OF CONTENTSFeatures .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Pin Configuration and Function Descriptions ............................. 6 Resolver Format Signals ................................................................... 8 Theory of Operation ........................................................................ 9 Fault Detection Circuit ................................................................ 9 Monitor Signal .............................................................................. 9 Loss of Signal Detection .............................................................. 9 Signal Degradation Detection .................................................. 10 Loss of Position Tracking Detection ........................................ 10 Responding to a Fault Condition ............................................. 10 False Null Condition .................................................................. 10 On-Board Programmable Sinusoidal Oscillator .................... 11 Synthetic Reference Generation ............................................... 11 Charge-Pump Output ................................................................ 11 Connecting the Converter ........................................................ 11 Clock Requirements ................................................................... 12 Absolute Position and Velocity Output ................................... 12 Parallel Interface ......................................................................... 12 Serial Interface ............................................................................ 14 Incremental Encoder Outputs .................................................. 16 Supply Sequencing and Reset ................................................... 16 Circuit Dynamics ........................................................................... 17 Loop Response Model ............................................................... 17 Sources of Error .......................................................................... 18 Connecting to the DSP .............................................................. 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 20 Automotive Products .. (20)REVISION HISTORY5/10—Rev. 0 to Rev. AChanges to Features Section............................................................ 1 Changes to Input Bias Current Parameter and InputImpedance Parameter ...................................................................... 3 Changes to Table 2 ............................................................................ 5 Changes to Loss of Signal Detection Section ................................ 9 Changes to Connecting the Converter Section and Figure 5 ... 11 Change to t 6 Max Value in Table 6 ............................................... 13 Changes to t 9 and t 10 Max Values Table 7 .................................... 15 Changes to Ordering Guide .......................................................... 20 Added Automotive Products Section .......................................... 20 1/07—Revision 0: Initial VersionAD2S1205SPECIFICATIONSAV DD = DV DD = 5.0 V ± 5% at −40°C to +125°C, CLKIN = 8.192 MHz ± 25%, unless otherwise noted.Rev. A | Page 3 of 20AD2S12051 The voltages for Sin, SinLO, Cos, and CosLO relative to AGND must be between 0.2 V and AV DD.Rev. A | Page 4 of 20AD2S1205Rev. A | Page 5 of 20ABSOLUTE MAXIMUM RATINGSTable 2.Parameter RatingSupply Voltage (V DD ) −0.3 V to +7.0 VSupply Voltage (AV DD ) −0.3 V to +7.0 VInput Voltage −0.3 V to V DD + 0.3 VOutput Voltage Swing −0.3 V to V DD + 0.3 VInput Current to Any Pin Except Supplies 1 ±10 mAOperating Temperature Range (Ambient) −40°C to +125°C Storage Temperature Range −65°C to +150°C1Transient currents of up to 100 mA do not cause latch-up.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stressrating only; functional operation of the device at these or anyother conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolutemaximum rating conditions for extended periods may affectdevice reliability. ESD CAUTIONAD2S1205Rev. A | Page 6 of 2006339-002PIN CONFIGURATION AND FUNCTION DESCRIPTIONSR E F O U T44R E F B Y P43C o s L O40S i n L O38A G N D42A G N D36A V D D39E X C35E X C34C o s41S i n37DV DD 1RD 2CS 3SAMPLE4RDVEL 5SOE 6DB11/SO 7DB10/SCLK8DB99DB810DB71133FS232FS131LOT 30DOS 29AD2S1205TOP VIEW (Not to Scale)DIR 28NM 27B 26A 25CPO 24DGND23DB 612D B 513D B 414D B 315D G N D16D V D D17D B 218D B 119D B 020X T A L O U T21C L K I N22Figure 2. Pin ConfigurationAD2S1205Rev. A | Page 7 of 20AD2S1205Rev. A | Page 8 of 20RESOLVER FORMAT SIGNALS06339-003V b = V s × Sin(ωt) × Sin(θ)(A) CLASSICAL RESOLVERs × Sin(ωt) × Cos(θ)V b = V s × Sin(ωt) × Sin(θ)(B)VARIABLE RELUCTANCE RESOLVERs × Sin(ωt) × Cos(θ)Figure 3. Classical Resolver vs. Variable Reluctance ResolverA classical resolver is a rotating transformer that typically has a primary winding on the rotor and two secondary windings on the stator. A variable reluctance resolver, on the other hand, has the primary and secondary windings on the stator and no windings on the rotor, as shown in Figure 3; however, the saliency in this rotor design provides the sinusoidal variation in the secondary coupling with the angular position. For both designs, the resolver output voltages (S3 − S1, S2 − S4) are as follows:Sinθt Sin E S1S30×ω=−)( (1)Cosθt Sin E S4S20×ω=−)(where:θ is the shaft angle.Sin(ωt) is the rotor excitation frequency. E 0 is the rotor excitation amplitude.The stator windings are displaced mechanically by 90° (see Figure 3). The primary winding is excited with an ac reference. The amplitude of subsequent coupling onto the secondary windings is a function of the position of the rotor (shaft) relative to the stator. The resolver therefore produces two output voltages (S3 − S1, S2 − S4), modulated by the sine and cosine of the shaft angle. Resolver format signals refer to the signals derived from the output of a resolver, as shown in Equation 1. Figure 4 illustrates the output format. 06339-0040°R2 – R4(REFERENCE)90°180°θ270°360°Figure 4. Electrical Resolver RepresentationAD2S1205Rev. A | Page 9 of 20THEORY OF OPERATIONThe AD2S1205’s operation is based on a Type II tracking closed-loop principle. The digitally implemented tracking loop continually tracks the position and velocity of the resolver without the need for external convert and wait states. As the resolver moves through a position equivalent to the least significant bit weighting, the tracking loop output is updated by 1 LSB.The converter tracks the shaft angle (θ) by producing an output angle (ϕ) that is fed back and compared with the input angle (θ); the difference between the two angles is the error, which is driven towards 0 when the converter is correctly tracking the input angle. T o measure the error, S3 − S1 is multiplied by Cosϕ and S2 − S4 is multiplied by Sinϕ to giveS4 S2for )(S1S3for )(00−×−×SinφCosθωt Sin E CosφSinθωt Sin E (2)The difference is taken, giving)()(0SinφCosθCos Sinθωt Sin E −φ× (3)This signal is demodulated using the internally generated synthetic reference, yielding)(0φ−φSin CosθCos SinθE (4)Equation 4 is equivalent to E 0Sin (θ − ϕ), which is approximately equal to E 0(θ − ϕ) for small values of θ − ϕ, where θ − ϕ is the angular error. The value E 0(θ − ϕ) is the difference between the angular error of the rotor and the digital angle output of the converter. A phase-sensitive demodulator, some integrators, and a compen-sation filter form a closed-loop system that seeks to null the error signal. If this is accomplished, ϕ equals the resolver angle, θ, within the rated accuracy of the converter. A Type II tracking loop is used so that constant velocity inputs can be tracked without inherent error.For more information about the operation of the converter, see the Circuit Dynamics section.FAULT DETECTION CIRCUITThe AD2S1205 fault detection circuit can sense loss of resolver signals, out-of-range input signals, input signal mismatch, or loss of position tracking; however, the position indicated by the AD2S1205 may differ significantly from the actual shaft position of the resolver.MONITOR SIGNALThe AD2S1205 generates a monitor signal by comparing the angle in the position register to the incoming Sin and Cos signals from the resolver. The monitor signal is created in a similar fashion to the error signal (described in the Theory of Operation section). The incoming Sinθ and Cosθ signals are multiplied by the Sin and Cos of the output angle, respectively, and then these values are added together:)()(CosφCosθA2SinφSinθA1Monitor ××+××= (5)where:A1 is the amplitude of the incoming Sin signal (A1 × Sinθ). A2 is the amplitude of the incoming Cos signal (A2 × Cosθ).θ is the resolver angle.ϕ is the angle stored in the position register.Note that Equation 5 is shown after demodulation with thecarrier signal Sin(ωt) removed. Also note that for a matchedinput signal (that is, a no fault condition), A1 is equal to A2.When A1 is equal to A2 and the converter is tracking (therefore, θ is equal to ϕ), the monitor signal output has aconstant magnitude of A1 (Monitor = A1 × (Sin 2θ + Cos 2θ) = A1), which is independent of the shaft angle. When A1 does notequal A2, the monitor signal magnitude alternates between A1 and A2 at twice the rate of the shaft rotation. The monitor signal is used to detect degradation or loss of input signals. LOSS OF SIGNAL DETECTIONLoss of signal (LOS) is detected when either resolver input (Sin or Cos) falls below the specified LOS Sin/Cos threshold. The AD2S1205 detects this by comparing the monitor signal to a fixed minimum value. Without the use of external circuitry, the AD2S1205 can detect the loss of up to three of the four connections from the resolver. The addition of two external 68 kΩ resistors, as outlined in Figure 5, ensures that the loss of all 4 connections, that is, complete removal of the resolver, may also be detected. LOS is indicated by both DOS and LOT latching as logic low outputs. The DOS and LOT pins are reset to the no fault state by a rising edge of SAMPLE . The LOS condition has priority over both the DOS and LOT conditions, as shown in . LOS is indicated within 57° of the angular output error (worst case).Table 4AD2S1205Rev. A | Page 10 of 20SIGNAL DEGRADATION DETECTIONDegradation of signal (DOS) is detected when either resolver input (Sin or Cos) exceeds the specified DOS Sin/Cos threshold. The AD2S1205 detects this by comparing the monitor signal to a fixed maximum value. In addition, DOS is detected when the amplitudes of the Sin and Cos input signals are mismatched by more than the specified DOS Sin/Cos mismatch. This is identified because the AD2S1205 continuously stores the minimum and maximum magnitude of the monitor signal in internal registers and calculates the difference between these values. DOS is indicated by a logic low on the DOS pin and is not latched when the input signals exceed the maximum input level. When DOS is indicated due to mismatched signals, the output is latched low until a rising edge of SAMPLE resets the stored minimum and maximum values. The DOS condition has priority over the LOT condition, as shown in . DOS is indicated within 33° of the angular output error (worst case).Table 4LOSS OF POSITION TRACKING DETECTIONLoss of tracking (LOT) is detected when • The internal error signal of the AD2S1205 exceeds 5°. • The input signal exceeds the maximum tracking rate. •The internal position (at the position integrator) differs from the external position (at the position register) by more than 5°.LOT is indicated by a logic low on the LOT pin and is not latched. LOT has a 4° hysteresis and is not cleared until the internal error signal or internal/external position mismatch is less than 1°. When the maximum tracking rate is exceeded, LOT is cleared only if the velocity is less than the maximum tracking rate and the internal/external position mismatch is less than 1°. LOT can be indicated for step changes in position (such as after a RESET signal is applied to the AD2S1205), or for accelerations of >~65,000 rps 2. It is also useful as a built-in test to indicate that the tracking converter is functioningproperly. The LOT condition has lower priority than both the DOS and LOS conditions, as shown in . The LOT and DOS conditions cannot be indicated at the same time. Table 4Table 4. Fault Detection DecodingConditionDOS Pin LOT Pin Order of Priority Loss of Signal (LOS)0 0 1 Degradation of Signal (DOS) 0 1 2 Loss of Tracking (LOT) 1 0 3 No Fault1 1RESPONDING TO A FAULT CONDITIONIf a fault condition (LOS, DOS, or LOT) is indicated by the AD2S1205, the output data is presumed to be invalid. Even if a RESET or SAMPLE pulse releases the fault condition and is not immediately followed by another fault, the output data may be corrupted. As discussed previously, there are some fault conditions with inherent latency. If the device fault is cleared, there may be some latency in the resolver’s mechanical position before the fault condition is reindicated.When a fault is indicated, all output pins still provide data, although the data may or may not be valid. The fault condition does not force the parallel, serial, or encoder outputs to a known state. Response to specific fault conditions is a system-level requirement. The fault outputs of the AD2S1205 indicate that the device has sensed a potential problem with either the internal or external signals of the AD2S1205. It is the responsibility of the system designer to implement the appropriate fault-handling schemes within the control hardware and/or algorithm of a given appli-cation based on the indicated fault(s) and the velocity or position data provided by the AD2S1205.FALSE NULL CONDITIONResolver-to-digital converters that employ Type II tracking loops based on the previously stated error equation (see Equation 4 in the Theory of Operation section) can suffer from a condition known as a false null. This condition is caused by a metastable solution to the error equation when θ − ϕ = 180°. The AD2S1205 is not susceptible to this condition because its hysteresis is implemented external to the tracking loop. As a result of the loop architecture chosen for the AD2S1205, the internal error signal constantly has some movement (1 LSB per clock cycle); therefore, in a metastable state, the converter moves to anunstable condition within one clock cycle. This causes the tracking loop to respond to the false null condition as if it were a 180° step change in input position (the response time is the same, as specified in the Dynamic Performance section of Table 1). Therefore, it is impossible to enter the metastable condition after the start-up sequence if the resolver signals are valid.分销商库存信息:ANALOG-DEVICESAD2S1205WSTZ AD2S1205YSTZ ADW71205WSTZ-RL ADW71205WSTZ ADW71205YSTZ EVAL-AD2S1205SDZ。

BYV32EB-200,118;中文规格书,Datasheet资料

BYV32EB-200,118;中文规格书,Datasheet资料

BYV32EB-200Dual rugged ultrafast rectifier diode, 20 A, 200 VRev. 04 — 2 March 2009Product data sheet 1.Product profile1.1General descriptionUltrafast dual epitaxial rectifier diode in a SOT404 (D2PAK) surface-mountable plasticpackage.1.2Features and benefitsHigh reverse voltage surge capability High thermal cycling performanceLow thermal resistance Soft recovery characteristic minimizes power consuming oscillationsSurface-mountable packageVery low on-state loss1.3ApplicationsOutput rectifiers in high-frequencyswitched-mode power supplies1.4Quick reference dataTable 1.Quick referenceSymbol Parameter Conditions Min Typ Max Unit V RRM repetitive peak reverse voltage--200VI O(AV)average output current square-wave pulse; δ=0.5;T mb≤115°C; both diodes conducting;see Figure 1; see Figure 2--20AI RRM repetitive peak reverse current t p=2µs; δ=0.001--0.2AV ESD electrostatic discharge voltage HBM; C = 250 pF; R = 1.5 kΩ; all pins--8kV Dynamic characteristicst rr reverse recovery time I F=1A; V R=30V;dI F/dt=100A/µs;T j=25°C; ramp recovery; see Figure 5-2025nsI R=1A;I F=0.5A;T j=25°C; measuredat reverse current = 0.25 A; steprecovery; see Figure 6-1020nsStatic characteristicsV F forward voltage I F=8A; T j=150°C; see Figure 4-0.720.85V2.Pinning information[1]it is not possible to make a connection to pin 2 of the SOT404 package3.Ordering informationTable 2.Pinning information Pin Symbol Description Simplified outline Graphic symbol1A1anode 1SOT404 (D2PAK)2K cathode [1]3A2anode 2mbKmounting base; cathodemb132sym125Table 3.Ordering information Type number PackageName DescriptionVersion BYV32EB-200D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (onelead cropped)SOT4044.Limiting valuesTable 4.Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).Symbol ParameterConditionsMin Max Unit V RRM repetitive peak reverse voltage-200V V RWM crest working reverse voltage -200V V R reverse voltage DC-200V I O(AV)average output currentsquare-wave pulse; δ=0.5; T mb ≤115°C; both diodes conducting; see Figure 1; see Figure 2-20A I FRM repetitive peak forward currentδ=0.5; t p =25µs; T mb ≤115°C; per diode -20A I FSMnon-repetitive peak forward currentt p =8.3ms; sine-wave pulse; T j(init)=25°C; per diode-137A t p =10ms; sine-wave pulse; T j(init)=25°C;per diode-125A I RRM repetitive peak reverse currentδ=0.001; t p =2µs -0.2A I RSM non-repetitive peak reverse current t p =100µs-0.2A T stg storage temperature -40150°C T j junction temperature-150°C V ESDelectrostatic discharge voltageHBM; C = 250 pF; R = 1.5 k Ω; all pins -8kV5.Thermal characteristics6.CharacteristicsTable 5.Thermal characteristics Symbol ParameterConditionsMin Typ Max Unit R th(j-mb)thermal resistance from junction to mounting base with heatsink compound; both diodes conducting -- 1.6K/W with heatsink compound; per diode; seeFigure 3-- 2.4K/W R th(j-a)thermal resistance from junction to ambientminimum footprint FR4 board -50-K/WTable 6.Characteristics Symbol Parameter ConditionsMin Typ Max Unit Static characteristicsV F forward voltage I F =8A; T j =150°C; see Figure 4-0.720.85V I F =20A; T j =25°C -1 1.15V I Rreverse currentV R =200V; T j =25°C -630µA V R =200V; T j =100°C-0.20.6mADynamic characteristics Q r recovered charge I F =2A; V R =30V;dI F /dt =20A/µs -812.5nC t rrreverse recovery timeI F =1A; V R =30V;dI F /dt =100A/µs; ramp recovery; T j =25°C; see Figure 5-2025ns I F =0.5A; I R =1A; measured at reverse current = 0.25 A; step recovery; T j =25°C; see Figure 6-1020nsV FRforward recovery voltageI F =1A; dI F /dt =10A/µs; see Figure 7--1V7.Package outlinePlastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped)SOT404Fig 8.Package outline SOT404 (D2PAK)8.Revision historyTable 7.Revision historyDocument ID Release date Data sheet status Change notice SupersedesBYV32EB-200_420090302Product data sheet-BYV32E_SERIES_3 Modifications:•The format of this data sheet has been redesigned to comply with the new identityguidelines of NXP Semiconductors.•Legal texts have been adapted to the new company name where appropriate.•Package outline updated.•Type number BYV32EB-200 separated from data sheet BYV32E_SERIES_3BYV32E_SERIES_320010301Product specification-BYV32E_SERIES_2 BYV32E_SERIES_219980701Product specification-BYV32EB_SERIES_1 BYV32EB_SERIES_119960801Product specification--9.Legal information9.1Data sheet status[1]Please consult the most recently issued document before initiating or completing a design.[2]The term 'short data sheet' is explained in section "Definitions".[3]The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL .9.2DefinitionsDraft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequences of use of such information.Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.9.3DisclaimersGeneral — Information in this document is believed to be accurate andreliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure ormalfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmentaldamage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.Quick reference data — The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in theCharacteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at /profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unlessexplicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.9.4TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.10.Contact informationFor more information, please visit: For sales office addresses, please send an email to: salesaddresses@Document status [1][2]Product status [3]DefinitionObjective [short] data sheet Development This document contains data from the objective specification for product development.Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.Product [short] data sheetProductionThis document contains the product specification.11.Contents1Product profile. . . . . . . . . . . . . . . . . . . . . . . . . . .11.1General description . . . . . . . . . . . . . . . . . . . . . .11.2Features and benefits. . . . . . . . . . . . . . . . . . . . .11.3Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.4Quick reference data . . . . . . . . . . . . . . . . . . . . .12Pinning information. . . . . . . . . . . . . . . . . . . . . . .23Ordering information. . . . . . . . . . . . . . . . . . . . . .24Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .35Thermal characteristics . . . . . . . . . . . . . . . . . . .46Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .47Package outline. . . . . . . . . . . . . . . . . . . . . . . . . .68Revision history. . . . . . . . . . . . . . . . . . . . . . . . . .79Legal information. . . . . . . . . . . . . . . . . . . . . . . . .89.1Data sheet status . . . . . . . . . . . . . . . . . . . . . . . .89.2Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89.3Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . .89.4Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . .810Contact information. . . . . . . . . . . . . . . . . . . . . . .8Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.© NXP B.V.2009.All rights reserved.For more information, please visit: For sales office addresses, please send an email to: salesaddresses@分销商库存信息: NXPBYV32EB-200,118。

TDA7393, 规格书,Datasheet 资料

TDA7393, 规格书,Datasheet 资料

TDA7393 2x32W DUAL BRIDGE CAR RADIO AMPLIFIER HIGH OUTPUT POWER CAPABILITY:2x35W max./4Ω2x32W EIAJ/4Ω2x22W typ./4Ω@14.4V,1KHz,10%2x19W typ./4Ω@13.2V,1KHz,10%2x28W typ./2Ω@14.4V,1KHz,10%2x25W typ./2Ω@13.2V,1KHz,10%LOW DISTORTIONLOW OUTPUT NOISEST-BY FUNCTIONMUTE FUNCTIONAUTO-MUTE AT MIN.SUPPLY VOLTAGE DETECTIONLOW EXTERNAL COMPONENT COUNT–INTERNALLY FIXED GAIN(32dB)–NO EXTERNAL COMPENSATION–NO BOOTSTRAP CAPACITORSADDITIONAL MONO INPUT PROTECTIONS:OUTPUT AC/DC SHORT CIRCUIT TO GND AND TO V SVERY INDUCTIVE LOADSOVERRATING CHIP TEMPERATURE WITH SOFT THERMAL LIMITERLOAD DUMP VOLTAGEFORTUITOUS OPEN GNDREVERSE BATTERYESD PROTECTIONDESCRIPTIONThe TDA7393is a new technology class AB Audio Power Amplifier in Multiwatt15package de-signed for high end car radio applications.Thanks to the fully complementary PNP/NPN output con-figuration the high power performances of the TDA7393are obtained without bootstrap capaci-tors.The extremely reduced components countOctober1998®MULTIWATT15ORDERING NUMBER:TDA7393BLOCK DIAGRAM1/9allows very compact sets.PIN CONNECTION (Top view)ABSOLUTE MAXIMUM RATINGSSymbol ParameterValue Unit V CC Operating Supply Voltage 18V V CC (DC)DC Supply Voltage28V V CC (pk)Peak Supply Voltage (t =50ms)50V I OOutput Peak Current:Repetitive (Duty Cycle 10%at f =10Hz)Non Repetitive (t =100µs)4.55.5A A P tot Power dissipation,Tcase =75°C (see derating curve)50W T j Junction Temperature150°C T op Operating Ambient Temperature –40to 85°C T stgStorage Temperature–55to 150°CTHERMAL DATASymbol ParameterValue Unit R th j-caseThermal Resistance Junction to CaseMax.1.5°C/WTDA73932/9ELECTRICAL CHARACTERISTICS(V S=13.2V;f=1KHz;R g=600Ω;R L=4Ω;T amb=25°C;Refer to the application circuit,unless otherwise specified.)Symbol Parameter Test Condition Min.Typ.Max.UnitI q1Quiescent Current90180mAV OS Output Offset Voltage150mVG v Voltage Gain30.53233.5dBP o Output Power THD=10%;V S=14.4VTHD=10%THD=1%THD=10%;R L=2ΩTHD=10%;V S=14.4V; R L=2Ω172219162528WWWWWP o max Max.Output Power EIAJ RULES;V S=13.7V30W THD Distortion P o=0.1to8W0.080.3%e No Output Noise Bw=20Hz to20KHz0.3mVrms SVR Supply Voltage Rejection f=100Hz(stereo)60dBf L Low Cut-Off Frequency10Hz f H High Cut-Off Frequency300KHz R i Input Impedance101520KΩC T Cross Talk f=1KHz5065dB I SB St-By Current Consumption100µA V SB out St-By OUT Threshold Voltage Amp.ON 3.5VV SB IN St-By IN Threshold Voltage Amp.OFF 1.5VV SB Supply Dependent St-ByThreshold St-By=H,V S reducing/increasing7.58.3VA M Mute Attenuation V O=1Vrms75dB V M out Mute OUT Threshold Voltage Amp.Play 3.5V V M in Mute IN Threshold Voltage Amp.Mute 1.5VV M Supply Dependent MuteThreshold Mute=IN,V S reducing/increasing8.59.3VI m(L)Muting Pin Current V MUTE=1.5V(Sourced Current)61014µAI m(H)Muting Pin Current VMUTE=3.5V(Sourced Current)61014µA Figure1:Quiescent Current vs.Supply Voltage Figure2:Output Power vs.Supply VoltageR L=4ΩR L=4Ωf=1KHzTDA73933/9Figure 5:Cross-Talk vs.FrequencyFigure 6:SVR vs.FrequencyFigure 7:Distortion vs.Frequency Figure 8:Distortion vs.FrequencyFigure 3:Output Power vs Supply VoltageFigure 4:EIAJ Power vs.Supply VoltageR L =2Ωf =1KHzf =1KHz V i =2.5VrmsV S =13.2V R L =4ΩV O =1VrmsV S =13.2V R L =4ΩV r =1Vrms R g =600ΩMute 1,2=OFFV S =13.2V R L =2ΩV S =13.2V R L =4ΩBoth channelsTDA73934/9TDA7393 Figure9:Block Diagram of Mute CircuitFigure10:ExplanatoryWaveforms Of Mute Circuit5/9TDA7393Figure11:Application CircuitFigure12:P.C.Board and Component Layout of the fig.11(1:1scale) 6/9TDA7393 Figure13:Power Dissipation Derating Curve7/9Multiwatt15VDIM.mm inch MIN.TYP.MAX.MIN.TYP.MAX.A 50.197 B 2.650.104C 1.60.063D 10.039E 0.490.550.0190.022F 0.660.750.0260.030G 1.02 1.27 1.520.0400.0500.060G117.5317.7818.030.6900.7000.710H119.60.772H220.20.795L 21.922.222.50.8620.8740.886L121.722.122.50.8540.8700.886 L217.6518.10.6950.713 L317.2517.517.750.6790.6890.699L410.310.710.90.4060.4210.429L7 2.65 2.90.1040.114M 4.25 4.55 4.850.1670.1790.191M1 4.63 5.085.530.1820.2000.218S 1.9 2.60.0750.102S1 1.9 2.60.0750.102Dia13.653.850.1440.152OUTLINE AND MECHANICAL DATAMULTIWATT15PACKAGE MECHANICAL DATATDA73938/9TDA7393 Informationfurnished is believed to be accurate and reliable.However,STMicroelectronics assumes no responsibility for the consequencesof use of such information nor for any infringement of patents or other rights of third parties which may res ult from its use.No license isgranted by implication or otherwise under any patent or patent rights of STMicroelectronics.Specification mentioned in this publication are subject to change withoutnotice.This publicationsupersedes and replaces all information previously supplied.STMicroelectronics products are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelec tronics.The ST logois a registered trademark of STMicroelec tronics©1998STMicroelectronics–Printed in Italy–All Rights ReservedMULTIWATT®is a Registered Trademark ofthe STMicroelectronicsSTMicroelectronics GROUP OF COMPANIESAustralia-Brazil-Canada-China-France-Germany-Italy-Japan-Korea-Malaysia-Malta-Mexico-Morocco-The Netherlands-Singapore-Spain-Sweden-Switzerland-Taiwan-Thailand-United Kingdom-U.S.A.9/9。

P3P623S00BG-08SR;P3P623S00BG-08TR;P3I623S00BG-08TR;P3P623S00EG-16TR;中文规格书,Datasheet资料

P3P623S00BG-08SR;P3P623S00BG-08TR;P3I623S00BG-08TR;P3P623S00EG-16TR;中文规格书,Datasheet资料

P3P623S00B/ETiming-Safe™Peak EMI Reduction ICGeneral Features• Clock distribution with Timing-Safe™ Peak EMIReduction• Input frequency range: 20MHz - 50MHz• 2 different Spread Selection options• Spread Spectrum can be turned ON/OFF• External Input-Output Delay Control option• Supply Voltage: 3.3V±0.3V•P3P623S00B: 8 pin SOICP3P623S00E:16 pin TSSOP• The First True Drop-in SolutionFunctional DescriptionP3P623S00B/E is a versatile, 3.3V Zero-delay bufferdesigned to distribute Timing-Safe™ clocks with Peak EMIreduction. P3P623S00B is an eight-pin version, acceptsone reference input and drives out one low-skew Timing-Safe™ clock. P3P623S00E accepts one reference inputand drives out eight low-skew Timing-Safe™ clocks.P3P623S00B/E has an SS% that selects 2 differentDeviation and associated Input-Output Skew (T SKEW). Referto the Spread Spectrum Control and Input-Output Skewtable for details.P3P623S00E has a CLKOUT for adjusting the Input-Outputclock delay, depending upon the value of capacitorconnected at this pin to GND.P3P623S00B/E operates from a 3.3V supply and isavailable in two different packages, as shown in theordering information table.ApplicationP3P623S00B/E is targeted for use in Displays and memoryinterface systems.General Block DiagramSpread Spectrum Frequency GenerationThe clocks in digital systems are typically square waves with a 50% duty cycle and as frequencies increase the edge rates also get faster. Analysis shows that a square wave is composed of fundamental frequency and harmonics. The fundamental frequency and harmonics generate the energy peaks that become the source of EMI. Regulatory agencies test electronic equipment by measuring the amount of peak energy radiated from the equipment. In fact, the peak level allowed decreases as the frequency increases. The standard methods of reducing EMI are to use shielding, filtering, multi-layer PCBs, etc. These methods are expensive. Spread spectrum clocking reduces the peak energy by reducing the Q factor of the clock. This is done by slowly modulating the clock frequency. The P3P623S00B/E uses the center modulation spread spectrum technique in which the modulated output frequency varies above and below the reference frequency with a specified modulation rate. With center modulation, the average frequency is the same as the unmodulated frequency and there is no performance degradation Zero Delay and Skew ControlAll outputs should be uniformly loaded to achieve Zero Delay between input and output. Since the CLKOUT pin is the internal feedback to the PLL, its relative loading can adjust the input-output delay.For applications requiring zero input-output delay, all outputs, including CLKOUT, must be equally loaded. Even if CLKOUT is not used, it must have a capacitive load equal to that on other outputs, for obtaining zero input-output delay.Timing-Safe™ technologyTiming-Safe™ technology is the ability to modulate a clock source with Spread Spectrum technology and maintain synchronization with any associated data path.Pin Configuration for P3P623S00BPin Description for P3P623S00B Pin #Pin Name TypeDescription1 CLKIN 1I External reference Clock input , 5V tolerant input2 NC No Connect3 SS%3 I Spread Spectrum Selection. Has an internal pull up resistor4 GND P Ground5 SSON 3 I Spread Spectrum enable and disable option. When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal pull up resistor6 CLKOUT 2 O Buffered clock output 47 VDD P 3.3V supply 8NCNo ConnectNotes: 1. Weak pull down2. Weak pull-down on all outputs3. Weak pull-up on these Inputs4. Buffered clock output is Timing-Safe™CLKIN NC GND SSONVDD NC CLKOUTPin ConfigurationPin Description for P3P623S00E Pin #Pin NameTypeDescription1 CLKIN 1I External reference Clock input, 5V tolerant input2 CLKOUT12O Buffered clock output 43 V DD P 3.3V supply4 SS%3I Spread Spectrum Selection. Refer to the Spread Spectrum Control and Input-Output Skew Table. Has an internal pull up resistor. 5 GND P Ground6 CLKOUT22 O Buffered clock output 47 CLKOUT32 O Buffered clock output 48 DLY_CTRL O External Input-Output Delay control.9 SSON 3 I Spread Spectrum enable and disable option. When SSON is HIGH, the spread spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal pull up resistor. 10 CLKOUT42 O Buffered clock output 411 CLKOUT52 O Buffered clock output 4 12 GND P Ground 13 V DD P 3.3V supply14 CLKOUT62 O Buffered clock output 4 15 CLKOUT72 O Buffered clock output 4 16CLKOUT 2OBuffered clock output 4Notes: 1. Weak pull down 2. Weak pull-down on all outputs 3. Weak pull-up on these Inputs4. Buffered clock output is Timing-Safe™CLKOUT6 CLKOUT7 CLKOUT4 CLKOUT5 VDD CLKOUT GND SSONVDD SS%GND CLKOUT2 CLKOUT3CLKOUT1 CLKINSpread Spectrum Control and Input-Output Skew TableDevice Input Frequency SS % Deviation Input-Output Skew (±T SKEW)P3P623S00B/E 32MHz 0 ±0.25 % 0.1251 ±0.50 % 0.25Note: T SKEW is measured in units of the Clock PeriodAbsolute Maximum RatingsSymbol Parameter Rating Unit VDD Supply Voltage to Ground Potential -0.5 to +4.6V VIN DC Input Voltage (CLKIN) -0.5 to +7T STG Storage temperature -65 to +125 °C T s Max. Soldering Temperature (10 sec) 260 °C T J Junction Temperature 150 °C T DV Static Discharge Voltage (As per JEDEC STD22- A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability.Operating ConditionsParameter Description Min Max Unit VDD Supply Voltage 3.0 3.6 V T A Operating Temperature (Ambient Temperature) -40 +85 °CC L Load Capacitance 30 pFC IN Input Capacitance 7 pF Electrical CharacteristicsParameter Description Test Conditions Min Typ Max Unit V IL Input LOW Voltage50.8 V V IH Input HIGH Voltage5 2.0 VI IL Input LOW Current V IN = 0V 50 µAI IH Input HIGH Current V IN = VDD 100 µAV OL Output LOW Voltage6I OL = 8mA 0.4 V V OH Output HIGH Voltage6I OH = -8mA 2.4 VI DD Supply Current Unloaded outputs 27 mAZ o Output Impedance 23 ΩNotes: 5. CLKIN input has a threshold voltage of VDD/26. Parameter is guaranteed by design and characterization. Not 100% tested in production.Switching CharacteristicsParameter Test Conditions Min Typ Max UnitInput Frequency 20 50MHzOutput Frequency 30pF load 20 50MHzDuty Cycle 6,7 = (t2 / t1) * 100 Measured at VDD/2 40 50 60 % Output Rise Time 7, 8Measured between 0.8V and 2.0V 2.5 nS Output Fall Time 7, 8Measured between 2.0V and 0.8V 2.5 nS Output-to-output skew 7, 8All outputs equally loaded with SSOFF 250 pS Delay, CLKIN Rising Edge toCLKOUT Rising Edge 8Measured at VDD /2 with SSOFF ±350 pSDevice-to-Device Skew 8Measured at VDD/2 on the CLKOUT pinsof the device700 pSCycle-to-Cycle Jitter 7, 8Loaded outputs ±250 pSPLL Lock Time 8Stable power supply, valid clock presentedon CLKIN pin1.0 mSNote: 7. All parameters specified with 30pF loaded outputs.8. Parameter is guaranteed by design and characterization. Not 100% tested in production. Switching WaveformsDuty Cycle TimingAll Outputs Rise/Fall TimeOutput - Output SkewInput - Output Propagation DelayDevice - Device SkewInput - Output Skew Test CircuitTypical example of Timing-Safe™ waveformTiming-Safe™Input CLKOUT with SSOFFInput Timing-Safe™ CLKOUTPackage Information8-lead (150-mil) SOIC PackageDEHDA 1A 2AθLCBeSymbolDimensionsInches Millimeters MinMaxMin MaxA1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.0070.0100.180.25D 0.193 BSC 4.90 BSCE 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 0.41 1.27 θ0°8°0°8°16-lead TSSOP (4.40-MM Body)DEHDA A1Be θLCA2PIN 1 ID18916Seating PlaneSymbolDimensionsInchesMillimeters MinMaxMinMaxA 0.043 1.20 A1 0.002 0.006 0.05 0.15 A2 0.031 0.041 0.80 1.05B 0.007 0.012 0.19 0.30C 0.004 0.008 0.09 0.20D 0.193 0.201 4.90 5.10E 0.1690.1774.304.50e 0.026 BSC 0.65 BSC H 0.252 BSC6.40 BSCL 0.020 0.030 0.50 0.75 θ0° 8°0°8°分销商库存信息:ONSEMIP3P623S00BG-08SR P3P623S00BG-08TR P3I623S00BG-08TR P3P623S00EG-16TR。

TPA3110D2PWPR,TPA3110D2PWPR,TPA3110D2PWPR,TPA3110D2PWP,TPA3110D2EVM, 规格书,Datasheet

TPA3110D2PWPR,TPA3110D2PWPR,TPA3110D2PWPR,TPA3110D2PWP,TPA3110D2EVM, 规格书,Datasheet

15W 8W
15W 8W
8 to 26V
Figure 1. TPA3110D2 Simplified Application Schematic
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SpeakerGuard, PowerPad are trademarks of Texas Instruments.
FEATURES
1
•2 15-W/ch into an 8-Ω Loads at 10% THD+N From a 16-V Supply
• 10-W/ch into 8-Ω Loads at 10% THD+N From a 13-V Supply
• 30-W into a 4-Ω Mono Load at 10% THD+N From a 16-V Supply
The outputs are also fully protected against shorts to GND, VCC, and output-to-output. The short-circuit protection and thermal protection includes an autorecovery feature.
Audio Source

SS34;SS36;S310;SS33;SS32;中文规格书,Datasheet资料

SS34;SS36;S310;SS33;SS32;中文规格书,Datasheet资料

100
80
2
RESISTIVE OR INDUCTIVE LOAD P.C.B. MOUNTED ON 0.55 x 0.55" (14 x 14) mm COPPER PAD AREAS
60
40
1
20
0
0
25
50 75 100 125 Ambient Temperature [ºC]
0
1
2
5 10 20 50 Number of Cycles at 60Hz
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
SS32-S310
SS32 - S310
Features • • • •
Metal to silicon rectifiers, majority carrier conduction. Low forward voltage drop. Easy pick and place. High surge current capability.
0.01
0
0.2
0.4 0.6 0.8 1 1.2 Forward Voltage, VF [V]
1.4
1.6
0.001
0
20 40 60 80 100 120 140 Percent of Rated Peak Reverse Voltage [%]

MIC2044-1YTS;MIC2044-2YTS;MIC2045-1YTS;MIC2045-2YTS;MIC2044-1YTS TR;中文规格书,Datasheet资料

MIC2044-1YTS;MIC2044-2YTS;MIC2045-1YTS;MIC2045-2YTS;MIC2044-1YTS TR;中文规格书,Datasheet资料

Typical Application*C4is optional.See"Applications Information."Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • Pin ConfigurationPWRGDEN /FAULT SLEW UVLOINILIMVIN VBIASVINPGREFVOUTVINVOUTVINGNDVOUT MIC2044/MIC204516-Pin TSSOP (TS)Ordering InformationPart NumberStandard Pb-Free Enable Circuit Breaker Package MIC2044-1BTS MIC2044-1YTS Active-High16-Pin TSSOP MIC2044-2BTS MIC2044-2YTS Active-Low16-Pin TSSOP MIC2045-1BTS MIC2045-1YTS Active-High X16-Pin TSSOP MIC2045-2BTS MIC2045-2YTS Active-Low X16-Pin TSSOPPin DescriptionPin Number Pin Name Pin Function1PWRGD Power-Good (Output):Open drain N-Channel device, active high. This pinasserts high when the voltage at PGREF exceeds its threshold.2EN Switch Enable (Input):Gate control pin of the output MOSFET available asan active high (–1) or active low (–2) input signal.3/FAULT Fault Status (Output):Open drain N-Channel device, active low. This pinindicates an overcurrent or thermal shutdown condition. For an overcurrentevent, /FAULT is asserted if the duration of the overcurrent condition lastslonger than 32ms.10GND Ground connection:Tie to analog ground.4SLEW Slew-Rate Control (Input):A capacitor connected between this pin andground will reduce (slow) the output slew-rate. The output turn-on time mustbe less than the nominal flag delay of 32ms in order to avoid nuisancetripping of the /FAULT output since V OUT must be “fully on” (i.e., within200mV of the voltage at the input) before the /FAULT signal delay elapses.The slew-rate limiting capacitor requires a 16V rating or greater, 25V isrecommended. See “Applications Information: Output Slew-Rate Adjust-ment” for further details.6ILIM Current Limit (Input):A resistor (R SET) connected from this pin to groundsets the current limit threshold as I LIMIT = CLF/R SET. CLF is the current limitfactor specified in the “Electrical Characteristics”table. For the MIC2044/45,the continuous output current range is 1A to 6A.5UVLOIN Undervoltage Lockout Adjust (Input):With this pin left open, the UVLOthreshold is internally set to 1.45V. When the switching voltage (V IN) is at orbelow 1.5V, connecting an external resistive divider to this input will lower theUVLO threshold. The total resistance of the divider must be less than 200kΩ.To disable the UVLO, tie this pin to VIN. See “Applications Information” forfurther detail.7,11,13,16VIN Switch Supply (Input):Connected to the drain of the output MOSFET. Therange of input for the switch is 0.8V to 5.5V. These pins must be externallyconnected together to achieve rated performance.9,12,14VOUT Switch (Output):Connected to the source of the output MOSFET. Thesepins must be externally connected together to achieve rated performance.8VBIAS Bias Supply (Input):This input pin supplies power to operate the switch andinternal circuitry. The input range for VBIAS is 1.6V to 5.5V. When switchedvoltage (V IN) is between 1.6V to 5.5V and the use of a single supply isdesired, connect VBIAS to VIN externally.15PGREF Power-Good Threshold (Input):Analog reference used to specify thePWRGD threshold. When the voltage at this pin exceeds its threshold, V TH,PWRGD is asserted high. An external resistive divider network is used todetermine the output voltage level at which V TH is exceeded. See the“Functional Description”for further detail. When the PWRGD signal is notutilized, this input should be tied to VOUT.Absolute Maximum Ratings (Note 1)V IN and V BIAS (6V)/FAULT, PWRGD Output Voltage (6V)/FAULT, PWRGD Output Current..............................25mA ESD Rating, Note 3Human Body Model...................................................2kV Machine Model........................................................200V Operating Ratings (Note 2)Supply VoltageV IN...............................................................0.8V to 5.5V V BIAS...........................................................1.6V to 5.5V Continuous Output Current...................................1A to 6A Ambient Temperature (T A)...........................–40°C to 85°C Package Thermal Resistance (Rθ(J-A))TSSOP................................................................85°C/WElectrical Characteristics (Note 4)V IN = V BIAS = 5V, T A = 25°C unless specified otherwise. Bold indicates –40°C to +85°C.Symbol Parameter Condition Min Typ Max Units V IN Switch Input Voltage V IN≤ V BIAS0.8 5.5V V BIAS Bias Supply Voltage 1.6 5.5V I BIAS V BIAS Supply Current - Switch OFF No load0.15µAV BIAS Supply Current - Switch ON No load300400µANote 5V EN Enable Input Voltage V IL(max) 2.4 1.5VV IH(min) 3.5 2.5V V ENHYST Enable Input Threshold Hysteresis100mV I EN Enable Input Current V EN = 0V to 5.5V–1.011µA R DS(ON)Switch Resistance V IN = V BIAS = 3V, 5V2030mΩI OUT = 500mAI LEAK Output Leakage Current Output off10µA CLF Current Limit Factor V IN = 3V, 5V, 0.5V ≤ V OUT < 0.5V IN300380460A•ΩNote 61A ≤ I OUT≤ 6AV TH PGREF Threshold V IN = V BIAS = 1.6V to 5.5V215230245mV V LATCH Output Reset Threshold V IN = 0.8V to 5.5V V IN–.0.2VV OUT rising (MIC2045)I LATCH Latched Output Off Current Output latched off (MIC2045)135mA V OL Output Low Voltage I OL (/FAULT) = 15mA0.4V (/FAULT, PWRGD)I OL (PWRGD) = 5mAI OFF/FAULT, PWRGD Off Current V FAULT = V PWRGD = 5V1µA V UV Undervoltage Lockout Threshold V IN rising 1.30 1.45 1.58VV IN falling 1.20 1.35 1.50V V UVHYST Undervoltage Lockout100mV Threshold HysteresisV UVINTH UVLO Adjust Pin Threshold Voltage V IN rising200230260mVV IN falling185215245mV V UVINHYST UVLO Adjust Pin Threshold Hysteresis15mV Overtemperature Threshold T J increasing140°CT J decreasing120°CSymbol ParameterConditionMin Typ Max Units t FLAG Flag Response Delay V IN = V BIAS = 3V, 5V 253240ms t ON Output Turn-on Delay R LOAD = 10Ω, C LOAD = 1µF 0.751 1.25ms t R Output Turn-on Rise Time R LOAD = 10Ω, C LOAD = 1µF 1.52.53.5ms t OFF Output Turn-off Delay R LOAD = 10Ω, C LOAD = 1µF 15µs t FOutput Turn-off Fall TimeR LOAD = 10Ω, C LOAD = 1µF24µsNote 1.Exceeding the absolute maximum rating may damage the device.Note 2.The device is not guaranteed to function outside its operating rating.Note 3.Devices are ESD sensitive. Handling precautions recommended. Human body model:1.5k Ω in series with 100pF.Note 4.Specification for packaged product only.Note 5.OFF is V EN < 1.0V for MIC2044/MIC2045–1 and V EN > 4.0V for MIC2044/MIC2045 –2. ON is V EN > 4.0V for MIC2044/MIC2045–1 and V EN < 1.0V for MIC2044/MIC2045 –2.Note 6.The current limit is determined as follows:I LIM = CLF/R SET .Timing DiagramsV ENV OUTV ENV OUTFigure 1. Turn-On/Turn-Off DelayV ENV OUTI OUT/FAULTFigure 2. Overcurrent Fault Response — MIC2044-2Test CircuitVS U P P L Y C U R R E N T (µA )TEMPERATURE (°C)Supply CurrentV E N (V )TEMPERATURE (°C)Enable Input Threshold(Rising)V E N (V )TEMPERATURE (°C)Enable Input Threshold(Falling)O U T P U T L E A K A G E (n A )TEMPERATURE (°C)Output Leakage CurrentO N R E S I S T A N C E (m Ω)TEMPERATURE (°C)ON ResistanceT F L A G (m s )TEMPERATURE (°C)Flag Response DelayT U R N O N D E L A Y (µs )TEMPERATURE (°C)Turn On Delayvs. TemperatureI R (m A )V OUT–V BIAS (V)V BIAS Reverse Current FlowTypical CharacteristicsU V L O T H R E S H O L D (V )TEMPERATURE (°C)UVLO ThresholdU V L O I N T H R E S H O L D (m V )TEMPERATURE (°C)UVLO Adjust Pin ThresholdS L E W P I N V O L T A G E (V )TEMPERATURE (°C)SLEW Voltage V T H (m V )TEMPERATURE (°C)Power-Good ReferenceThresholdFunctional CharacteristicsV IN =V BIAS =5.0VR LOAD =1.65V C LOAD =47m F R SET =100WTIME (500m s/div.)V IN = V BIAS = 5.0VR LOAD = 1.8ΩC LOAD = 47µF R SET = 220ΩLatched OutputTIME (5ms/div.)V IN = V BIAS = 5.0VR LOAD toggles from 2Ω to OPENC LOAD = 47µF R SET = 220Ω4.82VLatched Output ResetMIC2045TIME (50ms/div.)V IN ramps 0V to 1.8VR LOAD = 5ΩC LOAD = 47µF R SET = 220ΩUVLO ResponseTIME (2.5ms/div.)1.45VV IN = V BIAS = 5.0VR LOAD = 1.2ΩC LOAD = 47µF R SET = 100ΩCurrent Limit ResponseTIME (5ms/div.)Functional Characteristics (continued)V IN = 5.0VR LOAD =5ΩC LOAD =47µFC SLEW =0.033µFR SET =220ΩTIME (2.5ms/div.)V IN = V BIAS 5.0VR LOAD =2ΩC LOAD =47µFR SET =220ΩTIME (100ms/div.)Functional Diagram分销商库存信息:MICRELMIC2044-1YTS MIC2044-2YTS MIC2045-1YTS MIC2045-2YTS MIC2044-1YTS TR MIC2044-2YTS TR MIC2045-1YTS TR MIC2045-2YTS TR MIC2044-1BTS MIC2044-1BTS TR MIC2044-2BTS MIC2044-2BTS TR MIC2045-1BTS MIC2045-1BTS TR MIC2045-2BTS MIC2045-2BTS TR。

SQT-103-01-F-D;SQT-106-01-LM-D;SQT-110-03-F-D;SQT-120-01-F-S;中文规格书,Datasheet资料

SQT-103-01-F-D;SQT-106-01-LM-D;SQT-110-03-F-D;SQT-120-01-F-S;中文规格书,Datasheet资料

SPECIFICATIONS
For complete specifications see ?SQT
Mates with: TMMH, TMM, MTMM, MMT, TW, LTMM, ZLTMM, ESQT, TCMD
Choice of one through six rows
SQT-106-01-LM-D SQT-112-01-F-D SQT-110-01-L-Q
SQT-110-03-F-D SQT-107-01-L-T SQT-125-01-F-D
(2,29) .050 .090
(2,00) .0787
–RA OPTION
(–Q, –5 & –6 not available)

/
分销商库存信息:
SAMTEC SQT-103-01-F-D SQT-120-01-F-S SQT-110-01-LM-Q SQT-116-01-S-D
TMM/ SQT TMMH
HORIZONTAL
(2,00mm) .0787" pitch
1
NO. PINS PER ROW
LEAD STYLE
(6,35mm) .250"
PLATING OPTION
ROW OPTION
Note: Some lengths, styles and options are non-standard, non-returnable.
20°C
5.5A
(2,62mm) .103" to (5,03mm) .198" Insertion Force: (Single contact only)
40°C
5A
60°C

PA79DK, 规格书,Datasheet 资料

PA79DK, 规格书,Datasheet 资料

BIAS CURRENT, initial
OFFSET CURRENT, initial
INPUT RESISTANCE, DC
COMMON MODE VOLTAGE RANGE, pos.
COMMON MODE VOLTAGE RANGE, neg.
COMMON MODE REJECTION, DC
area of a printed circuit board. 7. Rating applies with the JEDEC conditions outlined in the Heatsinksing section of this datasheet. 8. Rating applies when power dissipation is equal in two amplifiers.
PA79
PAP7A799
Power Operational Amplifier
FEATURES
♦ A Unique (Patent Pending) Technique for Very Low Quiescent Current
♦ Over 350 V/µs Slew Rate ♦ Wide Supply Voltage
TEMPERATURE RANGE, case
Min
Typ
Max Units
5.5
ºC/W
8.3
9.1
ºC/W
25
ºC/W
19.1
ºC/W
-40
125
ºC
NOTES: 1. Unless otherwise noted: TC = 25°C, DC input specifications are ± value given, power supply voltage is typical rating.

050 HR;中文规格书,Datasheet资料

050 HR;中文规格书,Datasheet资料

∙ High Reliability∙ Large core-to-bore clearance∙ Operating temperature up to 220°C (option) ∙ Stroke ranges from ± 0.05 to ±10 inches ∙ AC operation from 400Hz to 5kHz ∙Stainless steel housing∙ Imperial or metric threaded core ∙Many options and accessoriesDESCRIPTIONThe HR Series general purpose LVDTs provide the optimum performance required for a majority of applications. The large 1/16 inch [1.6mm] bore-to-core radial clearance provides for ample installation misalignments and therefore reduces the application costs. Featuring a high output voltage and a broad operating frequency range, these versatile and highly reliable LVDTs deliver worry-free and precise position measurements.Available in a variety of stroke ranges from ±0.05 to ±10 inches, the HR Series can be configured with a numberof standard options including guided core, small diameter/low mass core and mild radiation resistance (1012NVT total integrated flux; 107rads Gamma). High temperature operation (+220ºC) and high pressure (vented case) versions are also available (consult factory). The HR Series is compatible with the full line of Measurement Specialties LVDT signal conditioners.Like in most of our LVDTs, the HR windings are vacuum impregnated with a specially formulated, high temperature, flexible resin, and the coil assembly is potted inside its housing with a two-component epoxy. This provides excellent protection against hostile environments such as high humidity, vibration and shock.Measurement Specialties, Inc. (NASDAQ MEAS) offers many other types of sensors and signal conditioners. Data sheets can be downloaded from our web site at: /datasheets.aspxMEAS acquired Schaevitz Sensors and the Schaevitz ®trademark in 2000.FEATURESAPPLICATIONS∙ 0.25% linearity (100% stroke)∙ Process control ∙ Large 1/16” core -to-bore clearance ∙ Factory automation ∙ Shock and vibration tolerant∙ Materials testing ∙ Electromagnetic/electrostatic shielding ∙ Metrology∙ Mild radiation resistance (optional)∙ Applications with large misalignments ∙Calibration certificate supplied with each unit∙General industrialPERFORMANCE SPECIFICATIONSNotes:Dimensions are in inch [mm]All values are nominal unless otherwise notedElectrical specifications are for the test frequency indicated in the tableFR: Full Range is the stroke range, end to end; FR=2xS for ±S stroke rangeFSO (Full Scale Output): Largest absolute value of the outputs measured at the ends of the range ** Requires special reduced core length(*) Unit for output at stroke ends is millivolt per volt of excitation (input voltage)MECHANICAL SPECIFICATIONSDimensions are in inch [mm]WIRING INFORMATIONConnect blue (BLU) to green (GRN) for differential outputORDERING INFORMATIONNote: Add multiple option dash numbers together to determine proper ordering suffixExample: HR 1000, ±1 inch, with 5 kHz calibration and mild radiation resistance, P/N 02560395-082Refer to our “ Accessories for LVDTs ”TECHNICAL CONTACT INFORMATIONThe information in this sheet has been carefully reviewed and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Furthermore, this information does not convey to the purchaser of such devices any license under the patent rights to the manufacturer. Measurement Specialties, Inc. reserves the right to make changes without further notice to any product herein. Measurement Specialties, Inc. makes no warranty, representation or guarantee regarding the suitability of its product for any particular purpose, nor does Measurement Specialties, Inc. assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters can and do vary in different分销商库存信息: MEASUREMENT-SPECIALTIES 050 HR。

TDA8920CTHN1,118,TDA8920CTHN1,118,TDA8920CTHN1,118,TDA8920CJN1,112, 规格书,Datasheet 资料

TDA8920CTHN1,118,TDA8920CTHN1,118,TDA8920CTHN1,118,TDA8920CJN1,112, 规格书,Datasheet 资料

TDA8920C2× 110 W class-D power amplifierRev. 02 — 11 June 2009Product data sheet1.General descriptionThe TDA8920C is a high-efficiency class-D audio power amplifier. The typical outputpower is 2× 110W with a speaker load impedance of 4Ω.The TDA8920C is available in both HSOP24and DBS23P power packages.The amplifieroperates over a wide supply voltage range from±12.5V to±32.5V and features lowquiescent current consumption.2.FeaturesI Pin compatible with TDA8950/20B for both HSOP24 and DBS23P packagesI Symmetrical operating supply voltage range from±12.5V to±32.5VI Stereo full differential inputs, can be used as stereo Single-Ended (SE) or monoBridge-Tied Load (BTL) amplifierI High output power in typical applications:N SE 2×110W, R L=4Ω (V P =±30V)N SE 2×125W, R L=4Ω (V P =±32V)N SE 2×120W, R L=3Ω (V P =±29V)N BTL 1×220W, R L=8Ω (V P =±30V)I Low noiseI Smooth pop noise-free start-up and switch offI Zero dead time switchingI Fixed frequencyI Internal or external clockI High efficiencyI Low quiescent currentI Advanced protection strategy: voltage protection and output current limitingI Thermal FoldBack (TFB)I Fixed gain of 30dB in SE and 36dB in BTL applicationsI Fully short-circuit proof across loadI BD modulation in BTL configuration3.ApplicationsI DVDI Mini and micro receiverI Home Theater In A Box (HTIAB) systemI High-power speaker system4.Quick reference data[1]V P is the supply voltage on pins VDDP1, VDDP2 and VDDA.[2]The circuit is DC adjusted at V P =±12.5V to ±32.5 V .[3]Output power is measured indirectly; based on R DSon measurement; see Section 13.3.5.Ordering informationTable 1.Quick reference dataSymbol Parameter Conditions Min Typ Max UnitGeneral, V P [1] =±30 V V P supply voltage Operating mode[2]±12.5±30±32.5V V P(ovp)overvoltage protection supply voltage Standby, Mute modes; V DD − V SS65-70V I q(tot)total quiescent currentOperating mode; no load; no filter; no RC-snubber network connected -5075mAStereo single-ended configuration P ooutput powerT j =85°C; L LC =22µH; C LC =680nF (see Figure 10)THD + N =10%; R L =4Ω;V P =±30V[3]-110-W THD + N =10%; R L =4Ω;V P =±27V-90-WMono bridge-tied load configuration P ooutput powerT j =85°C; L LC =22µH; C LC =680nF (see Figure 10); R L =8Ω;THD + N =10%; V P =±30V[3]-220-WTable 2.Ordering informationType numberPackage NameDescriptionVersion TDA8920CJ DBS23P plastic DIL-bent-SIL power package; 23 leads (straight lead length 3.2 mm)SOT411-1TDA8920CTHHSOP24plastic, heatsink small outline package; 24 leads; low stand-off heightSOT566-36.Block diagramPin numbers in brackets refer to type number TDA8920CJ.Fig 1.Block diagram001aai852OUT1V SSP1V DDP2DRIVER HIGH OUT2BOOT2TDA8920CTH (TDA8920CJ)BOOT1DRIVER LOWSWITCH1CONTROL ANDHANDSHAKEPWM MODULATORMANAGEROSCILLATORTEMPERATURE SENSOR CURRENT PROTECTION VOLTAGE PROTECTIONSTABIMODEINPUT STAGE mute9 (3)8 (2)IN1M IN1P22 (15)21 (14)20 (13)17 (11)16 (10)15 (9)VSSP2VSSP1DRIVER HIGH DRIVER LOWSWITCH2CONTROL ANDHANDSHAKEPWM MODULATOR11 (5)n.c.7 (1)OSC 2 (19)SGND6 (23)MODEINPUT STAGEmute5 (22)4 (21)IN2MIN2P 19 (-)24 (17)VSSD n.c.1 (18)VSSA 12 (6)n.c.3 (20)VDDA10 (4)n.c.23 (16)13 (7)18 (12)14 (8)VDDP2PROT STABI VDDP17.Pinning information7.1PinningFig 2.Pin configuration TDA8920CTH Fig 3.Pin configuration TDA8920CJTDA8920CTHVSSD VSSA VDDP2SGND BOOT2VDDA OUT2IN2M VSSP2IN2P n.c.MODE STABI OSC VSSP1IN1P OUT1IN1MBOOT1n.c.VDDP1n.c.PROT n.c.001aai853242322212019181716151413111291078563412TDA8920CJOSC IN1P IN1M n.c.n.c.n.c.PROT VDDP1BOOT1OUT1VSSP1STABI VSSP2OUT2BOOT2VDDP2VSSD VSSA SGND VDDA IN2M IN2P MODE 001aai85412345678910111213141516171819202122237.2Pin descriptionTable 3.Pin descriptionSymbol Pin DescriptionTDA8920CTH TDA8920CJVSSA118negative analog supply voltageSGND219signal groundVDDA320positive analog supply voltageIN2M421channel 2 negative audio inputIN2P522channel 2 positive audio inputMODE623mode selection input: Standby, Mute or OperatingmodeOSC71oscillator frequency adjustment or tracking inputIN1P82channel 1 positive audio inputIN1M93channel 1 negative audio inputn.c.104not connectedn.c.115not connectedn.c.126not connectedPROT137decoupling capacitor for protection (OCP)VDDP1148channel 1 positive power supply voltageBOOT1159channel 1 bootstrap capacitorOUT11610channel 1 PWM outputVSSP11711channel 1 negative power supply voltageST ABI1812decoupling of internal stabilizer for logic supplyn.c.19-not connectedVSSP22013channel 2 negative power supply voltageOUT22114channel 2 PWM outputBOOT22215channel 2 bootstrap capacitorVDDP22316channel 2 positive power supply voltageVSSD2417negative digital supply voltage8.Functional description8.1GeneralThe TDA8920C is a two-channel audio power amplifier that uses class-D technology.For each channel, the audio input signal is converted into a digital PWM signal using ananalog input stage and a PWM modulator; see Figure1. To drive the output powertransistors, the digital PWM signal is fed to a control and handshake block and to high-and low-side driver circuits.This level-shifts the low-power digital PWM signal from a logiclevel to a high-power PWM signal switching between the main supply lines.A2nd-order low-passfilter converts the PWM signal to an analog audio signal that can beused to drive a loudspeaker.The TDA8920C single-chip class-D amplifier contains high-power switches,drivers,timing and handshaking between the power switches, along with some control logic. To ensure maximum system robustness, an advanced protection strategy has been implemented to provide overvoltage, overtemperature and overcurrent protection.Each of the two audio channels contains a PWM modulator,an analog feedback loop and a differential input stage.The TDA8920C also contains circuits common to both channels such as the oscillator, all reference sources, the mode interface and a digital timing manager.The two independent amplifier channels feature high output power, high efficiency, low distortion and low quiescent currents, and can be connected in the followingconfigurations:•Stereo Single-Ended (SE)•Mono Bridge-Tied Load (BTL)The amplifier system can be switched to one of three operating modes using pin MODE:•Standby mode: featuring very low quiescent current•Mute mode: the amplifier is operational but the audio signal at the output is suppressed by disabling the voltage-to-current (VI) converter input stages •Operating mode:the amplifier is fully operational,de-muted and can deliver an output signalA slowly rising voltage should be applied(e.g.via an RC network)to pin MODE to ensure pop noise-free start-up. The bias-current setting of the (VI converter) input stages is related to the voltage on the MODE pin.In Mute mode, the bias-current setting of the VI converters is zero (VI converters are disabled). In Operating mode, the bias current is at a maximum. The time constant required to apply the DC output offset voltage gradually between Mute and Operating mode levels can be generated using an RC network connected to pin MODE.An example of a switching circuit for driving pin MODE is illustrated in Figure4. If the capacitor was omitted, the very short switching time constant could result in audible pop noises being generated at start-up (depending on the DC output offset voltage and loudspeaker used).Fig 4.Example of mode selection circuit010aaa552 SGND mode controlmute/ operating 10 µF5.6 kΩ+5 V470 Ωstandby/ operating S2S1 5.6 kΩTo ensure the coupling capacitors at the inputs (C IN in Figure 10)are fully charged before the outputs start switching,a delay is inserted during the transition from Mute to Operating mode.An overview of the start-up timing is provided in Figure 5.For proper switch-off,the MODE pin should be forced LOW at least 100ms before the supply lines (V DDA and V SSA )drop below 12.5 V .(1)First 1⁄4 pulse down.Upper diagram: When switching from Standby to Mute, there is a delay of approximately 100 ms before the output starts switching.The audio signal will become available once V MODE reaches the Operating mode level (see Table 8),but not earlier than 150ms after switching to Mute.T o start-up pop noise-free, it is recommended that the time constant applied to pin MODE be at least 350 ms for the transition between Mute and Operating modes.Lower diagram: When switching directly from Standby to Operating mode, there is a delay of 100ms before the outputs start switching. The audio signal becomes available after a second delay of 50ms.To start-up pop noise-free,it is recommended that the time-constant applied to pin MODE be at least 500ms for the transition between Standby and Operating modes.Fig 5.Timing on mode selection input pin MODE2.2 V < V MODE < 3 Vaudio outputoperatingstandbymute50 %duty cycle> 4.2 V0 V (SGND)time001aah657V MODE100 ms50 msmodulated PWM> 350 ms2.2 V < V MODE < 3 Vaudio outputoperatingstandbymute50 %duty cycle> 4.2 V0 V (SGND)timeV MODE100 ms50 msmodulated PWM> 350 ms(1)(1)8.2Pulse-width modulation frequencyThe amplifier output signal is a PWM signal with a typical carrier frequency of between250kHz and450kHz.A2nd-order LC demodulationfilter on the output is used to convert the PWM signal into an analog audio signal. The carrier frequency is determined by anexternal resistor, R OSC, connected between pins OSC and VSSA. The optimal carrierfrequency setting is between 250kHz and 450kHz.The carrier frequency is set to345kHz by connecting an external30kΩresistor between pins OSC and VSSA. See Table9 on page14 for more details.If two or more class-D amplifiers are used in the same audio application, it isrecommended that an external clock circuit be used with all devices (see Section13.4).This will ensure that they operate at the same switching frequency, thus avoiding beattones(if the switching frequencies are different,audible interference known as‘beat tones’can be generated)8.3ProtectionThe following protection circuits are incorporated into the TDA8920C:•Thermal protection:–Thermal FoldBack (TFB)–OverT emperature Protection (OTP)•OverCurrent Protection (OCP)•Window Protection (WP)•Supply voltage protection:–UnderVoltage Protection (UVP)–OverVoltage Protection (OVP)–UnBalance Protection (UBP)How the device reacts to a fault conditions depends on which protection circuit has beenactivated.8.3.1Thermal protectionThe TDA8920C employes an advanced thermal protection strategy. A TFB functiongradually reduces the output power within a defined temperature range.If the temperature continues to rise, OTP is activated to shut down the device completely.8.3.1.1Thermal FoldBack (TFB)If the junction temperature(T j)exceeds the thermal foldback activation threshold,the gain is gradually reduced.This reduces the output signal amplitude and the power dissipation, eventually stabilizing the temperature.TFB is specified at the thermal foldback activation temperature T act(th_fold) where theclosed-loop voltage gain is reduced by 6dB. The TFB range is:T act(th_fold)−5°C < T act(th_fold) < T act(th_prot)The value of T act(th_fold) for the TDA8920C is approximately 153°C; see Table8 for moredetails.8.3.1.2OverTemperature Protection (OTP)If TFB fails to stabilize the temperature and the junction temperature continues to rise,the amplifier will shut down as soon as the temperature reaches the thermal protectionactivation threshold,T act(th_prot).The amplifier will resume switching approximately 100ms after the temperature drops below T act(th_prot).The thermal behavior is illustrated in Figure 6.8.3.2OverCurrent Protection (OCP)In order to guarantee the robustness of the TDA8920C, the maximum output current that can be delivered at the output stages is limited. OCP is built in for each output power switch.OCP is activated when the current in one of the power transistors exceeds the OCPthreshold (I ORM = 9.2 A) due, for example, to a short-circuit to a supply line or across the load.The TDA8920C amplifier distinguishes between low-ohmic short-circuit conditions and other overcurrent conditions such as a dynamic impedance drop at the loudspeaker. The impedance threshold (Z th ) depends on the supply voltage.How the amplifier reacts to a short circuit depends on the short-circuit impedance:•Short-circuit impedance >Z th :the amplifier limits the maximum output current to I ORMbut the amplifier does not shut down the PWM outputs. Effectively, this results in a clipped output signal across the load (behavior very similar to voltage clipping).•Short-circuit impedance <Z th :the amplifier limits the maximum output current to I ORMand at the same time discharges the capacitor on pin PROT. When C PROT is fully discharged, the amplifier shuts down completely and an internal timer is started.The value of the protection capacitor (C PROT ) connected to pin PROT can be between 10pF and 220pF (typically 47pF). While OCP is activated, an internal current source is enabled that will discharge C PROT .(1)Duty cycle of PWM output modulated according to the audio input signal.(2)Duty cycle of PWM output reduced due to TFB.(3)Amplifier is switched off due to OTP .Fig 6.Behavior of TFB and OTP001aah656(T act(th_fold) − 5°C)T act(th_fold) T j (°C)T act(th_prot)Gain (dB)30 dB24 dB0 dB123When OCP is activated, the power transistors are turned off. They are turned on again during the next switching cycle.If the output current is still greater than the OCP threshold,they will be immediately switched off again.This switching will continue until C PROT is fully discharged. The amplifier will then be switched off completely and a restart sequence initiated.After a fixed period of 100ms, the amplifier will attempt to switch on again, but will fail if the output current still exceeds the OCP threshold. The amplifier will continue trying to switch on every 100 ms. The average power dissipation will be low in this situation because the duty cycle is low.Switching the amplifier on and off in this way will generate unwanted ‘audio holes’. This can be avoided by increasing the value of C PROT (up to 220 pF) to delay amplifier switch-off. C PROT will also prevent the amplifier switching off due to transient frequency-dependent impedance drops at the speakers.The amplifier will switch on, and remain in Operating mode, once the overcurrent condition has been removed. OCP ensures the TDA8920C amplifier is fully protected against short-circuit conditions while avoiding audio holes.[1]OVP can be triggered by supply pumping; see Section 13.6.8.3.3Window Protection (WP)Window Protection (WP)checks the conditions at the output terminals of the power stage and is activated:•During the start-up sequence, when the TDA8920C is switching from Standby toMute.Start-up will be interrupted If a short-circuit is detected between one of the output terminals and pin VDDP1/VDDP2or VSSP1/VSSP2.The TDA8920C will wait until the short-circuit to the supply lines has been removed before resuming start-up.The short circuit will not generate large currents because the short-circuit check is carried out before the power stages are enabled.•When the amplifier is shut down completely because the OCP circuit has detected ashort circuit to one of the supply lines.WP will be activated when the amplifier attempts to restart after 100 ms (seeSection 8.3.2).The amplifier will not start-up again until the short circuit to the supply lines has been removed.Table 4.Current limiting behavior during low output impedance conditions at different values of C PROTTypeV P (V)V I (mV , p-p) f (Hz)C PROT (pF)PWM output stopsShort (Z th =0Ω)Short(Z th =0.5Ω)Short(Z th =1Ω)TDA8920C 29.55002010yes yes OVP [1]100010yes yes no 2015yes yes OVP [1]100015yes no no 1000220nonono8.3.4Supply voltage protectionIf the supply voltage drops below the minimum supply voltage threshold,V P(uvp),the UVP circuit will be activated and the system will shut down. Once the supply voltage rises above V P(uvp) again, the system will restart after a delay of 100ms.If the supply voltage exceeds the maximum supply voltage threshold, V P(ovp), the OVP circuit will be activated and the power stages will be shut down. When the supply voltage drops below V P(ovp) again, the system will restart after a delay of 100ms.An additional UnBalance Protection (UBP) circuit compares the positive analog supply voltage (on pin VDDA) with the negative analog supply voltage (on pin VSSA) and is triggered if the voltage difference exceeds a factor of two (V DDA > 2×|V SSA | OR |V SSA |>2× V DDA ). When the supply voltage difference drops below the unbalance threshold,V P(ubp), the system restarts after 100ms.An overview of all protection circuits and their respective effects on the output signal is provided in T able 5.[1]Amplifier gain depends on the junction temperature and heatsink size.[2]The amplifier shuts down completely only if the short-circuit impedance is below the impedance threshold (Z th ; see Section 8.3.2). In all other cases, current limiting results in a clipped output signal.[3]Fault condition detected during any Standby-to-Mute transition or during a restart after OCP has been activated (short-circuit to one of the supply lines).8.4Differential audio inputsThe audio inputs are fully differential ensuring a high common mode rejection ratio and maximum flexibility in the application.•Stereo operation: to avoid acoustical phase differences, the inputs should be inantiphase and the speakers should be connected in antiphase. This configuration:–minimizes power supply peak current–minimizes supply pumping effects, especially at low audio frequencies•Mono BTL operation:the inputs must be connected in anti-parallel.The output of onechannel is inverted and the speaker load is connected between the two outputs of the TDA8920C. In practice (because of the OCP threshold) the output power can be boosted to twice the output power that can be achieved with the single-ended configuration.The input configuration for a mono BTL application is illustrated in Figure 7.Table 5.Overview of TDA8920C protection circuitsProtection name Completeshutdown Restart directly Restart after 100ms Pin PROT detection TFB [1]N N N N OTP Y N Y N OCP Y [2]N [2]Y [2]Y WP N [3]Y N N UVP Y N Y N OVP Y N Y N UBPYNYN9.Limiting values[1]V P is the supply voltage on pins VDDP1, VDDP2 and VDDA.10.Thermal characteristicsFig 7. Input configuration for mono BTL applicationV inIN1P OUT1power stagembl466OUT2SGNDIN1MIN2P IN2MTable 6.Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter ConditionsMin Max Unit V P [1]supply voltageStandby, Mute modes; V DD − V SS -65V I ORM repetitive peak output current maximum output current limiting9.2-A T stg storage temperature −55+150°C T amb ambient temperature −40+85°C T j junction temperature -150°C V MODE voltage on pin MODE referenced to SGND06V V OSC voltage on pin OSC 0SGND + 6V V I input voltage referenced to SGND; pin IN1P; IN1M;IN2P and IN2M−5+5V V PROT voltage on pin PROTreferenced to voltage on pin VSSD 012V V ESD electrostatic discharge voltage Human Body Model (HBM)−2000+2000V Charged Device Model (CDM)−500+500V I q(tot)total quiescent current Operating mode; no load; no filter; no RC-snubber network connected -75mA V PWM(p-p)peak-to-peak PWM voltageon pins OUT1 and OUT2-120VTable 7.Thermal characteristics Symbol ParameterConditions Typ Unit R th(j-a)thermal resistance from junction to ambient in free air40K/W R th(j-c)thermal resistance from junction to case1.1K/W11.Static characteristics[1]V P is the supply voltage on pins VDDP1, VDDP2 and VDDA.[2]The circuit is DC adjusted at V P =±12.5V to ±32.5 V .[3]Unbalance protection activated when V DDA > 2×|V SSA | OR |V SSA |> 2× V DDA .[4]With respect to SGND (0V).[5]The transition between Standby and Mute modes has hysteresis,while the slope of the transition between Mute and Operating modes is determined by the time-constant of the RC network on pin MODE; see Figure 8.[6]DC output offset voltage is gradually applied to the output during the transition between Mute and Operating modes. The slope caused by any DC output offset is determined by the time-constant of the RC network on pin MODE.[7]At a junction temperature of approximately T act(th_fold)−5°C,gain reduction commences and at a junction temperature of approximately T act(th_prot),the amplifier switches off.Table 8.Static characteristics V P [1] =±30 V; f osc = 345 kHz; T amb = 25°C; unless otherwise specified.Symbol Parameter Conditions Min Typ Max Unit Supply V P supply voltageOperating mode [2]±12.5±30±32.5V V P(ovp)overvoltage protection supply voltageStandby, Mute modes;V DD −V SS65-70V V P(uvp)undervoltage protection supply voltage V DD −V SS 20-25V V P(ubp)unbalance protection supply voltage [3]-33-%I q(tot)total quiescent currentOperating mode; no load; no filter;no RC-snubber network connected -5075mAI stb standby current measured at 30 V -480650µA Mode select input; pin MODEV MODEvoltage on pin MODEreferenced to SGND [4]0-6V Standby mode [4][5]0-0.8V Mute mode [4][5] 2.2- 3.0V Operating mode[4][5]4.2-6V I I input current V I =5.5 V -110150µA Audio inputs; pins IN1M, IN1P , IN2P and IN2MV I input voltage DC input [4]-0-V Amplifier outputs; pins OUT1 and OUT2V O(offset)output offset voltageSE; Mute mode --±25mV SE; Operating mode [6]--±150mV BTL; Mute mode --±30mV BTL; Operating mode[6]--±210mV Stabilizer output; pin STABI V O(STABI)output voltage on pin ST ABIMute and Operating modes;with respect to VSSD9.39.810.3VTemperature protection T act(th_prot)thermal protection activation temperature-154-°C T act(th_fold)thermal foldback activation temperatureclosed loop SE voltage gain reduced with 6dB[7]-153-°C12.Dynamic characteristics12.1Switching characteristics[1]V P is the supply voltage on pins VDDP1, VDDP2 and VDDA.[2]When using an external oscillator, the frequency f track (500 kHz minimum, 900 kHz maximum) will result in a PWM frequency f osc (250kHz minimum, 450 kHz maximum) due to the internal clock divider; see Section 8.2.[3]When t r(i) > 100 ns, the output noise floor will increase.Fig 8. Behavior of mode selection pin MODEStandbyMuteOn5.5coa021V MODE (V)4.23.02.20.80V O (V)V O(offset)(mute)V O(offset)(on)slope is directly related to the time-constantof the RC network on the MODE pinTable 9.Dynamic characteristics V P [1] =±30 V; T amb = 25°C; unless otherwise specified.Symbol Parameter Conditions Min Typ Max Unit Internal oscillatorf osc(typ)typical oscillator frequency R OSC =30.0k Ω290345365kHz f osc oscillator frequency 250-450kHz External oscillator input or frequency tracking; pin OSCV OSC voltage on pin OSC HIGH-levelSGND +4.5SGND +5SGND +6V V trip trip voltage -SGND + 2.5-V f track tracking frequency [2]500-900kHz Z i input impedance 1--M ΩC i input capacitance --15pF t r(i)input rise timefrom SGND +0V toSGND + 5 V[3]--100ns12.2Stereo SE configuration characteristics[1]R sL is the series resistance of the low-pass LC filter inductor used in the application.[2]Output power is measured indirectly; based on R DSon measurement; see Section 13.3.[3]THD measured between 22Hz and 20kHz,using AES1720kHz brick wall filter;max.limit is guaranteed but may not be 100%tested.[4]V ripple = V ripple(max) = 2 V (p-p); measured independently between VDDPn and SGND and between VSSPn and SGND.[5]22 Hz to 20 kHz, using AES17 20 kHz brick wall filter.[6]22 Hz to 20 kHz, using AES17 20 kHz brick wall filter.[7]P o = 1 W; f i = 1kHz.[8]V i = V i(max) = 1 V (RMS); f i = 1 kHz.[9]Leads and bond wires included.Table 10.Dynamic characteristicsV P =±30 V; R L = 4Ω; f i = 1 kHz; f osc = 345 kHz; R sL [1] < 0.1Ω; T amb = 25°C; unless otherwise specified.Symbol Parameter ConditionsMin Typ Max Unit P ooutput powerL =22µH; C LC =680nF; T j =85°C [2]THD =0.5%; R L = 4Ω-90-W THD =10%; R L = 4Ω-110-W THD =10%; V P =±27 V-90-W THD total harmonic distortion P o =1W; f i =1kHz [3]-0.05-%P o =1W; f i =6kHz[3]-0.05-%G v(cl)closed-loop voltage gain 293031dB SVRRsupply voltage ripple rejectionbetween pins VDDPn and SGND Operating mode; f i =100Hz [4]-90-dB Operating mode; f i =1kHz [4]-70-dB Mute mode; f i =100Hz [4]-75-dB Standby mode; f i =100Hz [4]-120-dB between pins VSSPn and SGND Operating mode; f i =100Hz [4]-80-dB Operating mode; f i =1kHz [4]-60-dB Mute mode; f i =100Hz [4]-80-dB Standby mode; f i =100Hz[4]-115-dB Z i input impedance between one of the input pins and SGND4563-k ΩV n(o)output noise voltage Operating mode; R s =0Ω[5]-160-µV Mute mode[6]-85-µV αcs channel separation [7]-70-dB |∆G v |voltage gain difference --1dB αmute mute attenuationf i =1kHz; V i =2V (RMS)[8]-75-dB CMRR common mode rejection ratio V i(CM)=1V (RMS)-75-dB ηpooutput power efficiencySE, R L = 4Ω-88-%SE, R L = 6Ω-90-%BTL, R L = 8Ω-88-%R DSon(hs)high-side drain-source on-state resistance [9]-200-m ΩR DSon(ls)low-side drain-source on-state resistance[9]-190-m Ω12.3Mono BTL application characteristics[1]R sL is the series resistance of the low-pass LC filter inductor used in the application.[2]Output power is measured indirectly; based on R DSon measurement; see Section 13.3.[3]THD measured between 22Hz and 20kHz,using AES1720kHz brick wall filter;max.limit is guaranteed but may not be 100%tested.[4]V ripple = V ripple(max) = 2 V (p-p).[5]22 Hz to 20 kHz, using an AES17 20 kHz brick wall filter; low noise due to BD modulation.[6]22 Hz to 20 kHz, using an AES17 20 kHz brick wall filter.[7]V i = V i(max) = 1 V (RMS); f i = 1 kHz.Table 11.Dynamic characteristicsV P =±30 V; R L = 8Ω; f i = 1 kHz; f osc = 345 kHz; R sL [1] < 0.1Ω ; T amb = 25°C; unless otherwise specified.Symbol Parameter ConditionsMin Typ Max UnitP ooutput powerT j =85°C;L LC =22µH;C LC =680nF (see Figure 10)[2]THD =0.5%; R L = 8Ω-170-W THD =10%; R L = 8Ω-220-W THD total harmonic distortion P o =1W; f i =1kHz [3]-0.05-%P o =1W; f i =6kHz[3]-0.05-%G v(cl)closed-loop voltage gain -36-dB SVRRsupply voltage ripple rejectionbetween pin VDDPn and SGND Operating mode; f i =100Hz [4]-80-dB Operating mode; f i =1kHz [4]-80-dB Mute mode; f i =100Hz [4]-95-dB Standby mode; f i =100Hz [4]-120-dB between pin VSSPn and SGND Operating mode; f i =100Hz [4]-75-dB Operating mode; f i =1kHz [4]-75-dB Mute mode; f i =100Hz [4]-90-dB Standby mode; f i =100Hz[4]-130-dB Z i input impedance measured between one of the input pins and SGND4563-k ΩV n(o)output noise voltage Operating mode; R s =0Ω[5]-190-µV Mute mode[6]-45-µV αmute mute attenuationf i =1kHz; V i =2V (RMS)[7]-75-dB CMRRcommon mode rejection ratioV i(CM)=1V (RMS)-75-dB。

FSFR2100XS;FSFR2100XSL;中文规格书,Datasheet资料

FSFR2100XS;FSFR2100XSL;中文规格书,Datasheet资料

FSFR-XS Series — Fairchild Power Switch (FPS ™) for Half-Bridge Resonant ConverterFeatures Variable Frequency Control with 50% Duty Cycle for Half-Bridge Resonant Converter TopologyHigh Efficiency through Zero Voltage Switching (ZVS) Internal UniFET™ with Fast-Recovery Body Diode Fixed Dead Time (350ns) Optimized for MOSFETs Up to 300kHz Operating FrequencyAuto-Restart Operation for All Protections with External LV CCProtection Functions: Over-Voltage Protection (OVP), Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD)Applications PDP and LCD TVsDesktop PCs and Servers AdaptersTelecom Power SuppliesDescriptionThe FSFR-XS series includes highly integrated power switches designed for high-efficiency half-bridge resonant converters. Offering everything necessary to build a reliable and robust resonant converter, the FSFR-XS series simplifies designs while improving productivity and performance. The FSFR-XS series combines power MOSFETs with fast-recovery type body diodes, a high-side gate-drive circuit, an accurate current controlled oscillator, frequency limit circuit, soft-start, and built-in protection functions. The high-side gate-drive circuit has common-mode noise cancellation capability, which guarantees stable operation with excellent noise immunity. The fast-recovery body diode of the MOSFETs improves reliability against abnormal operation conditions, while minimizing the effect of reverse recovery. Using the zero-voltage-switching (ZVS) technique dramatically reduces the switching losses and significantly improves efficiency. The ZVS also reduces the switching noise noticeably, which allows a small-sized Electromagnetic Interference (EMI) filter.The FSFR-XS series can be applied to resonant converter topologies such as series resonant, parallel resonant, and LLC resonant converters.Related ResourcesAN4151 — Half-bridge LLC Resonant Converter DesignUsing FSFR-Series Fairchild Power Switch (FPS TM)Ordering InformationPart Number PackageOperating Junction TemperatureR DS(ON_MAX) Maximum Output Powerwithout Heatsink(V IN =350~400V)(1,2)Maximum Output Power with Heatsink(V IN =350~400V)(1,2)FSFR2100XS 9-SIP-40 to +130°C0.51Ω 180W 400W FSFR1800XS 0.95Ω 120W 260W FSFR1700XS 1.25Ω 100W 200W FSFR1600XS 1.55Ω 80W 160W FSFR2100XSL 0.51Ω 180W 400WFigure 2. Internal Block Diagram9 HV CC This is the supply voltage of the high-side gate-drive circuit IC.10 V CTR This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin.FSFR1700XS/L T C=25°C 6.0T C=100°C 3.9FSFR1600XS/L T C=25°C 4.5T C=100°C 2.7I LK Offset Supply Leakage Current HV CC=V CTR=500V 50μAI Q HV CC QuiescentHV CC Supply Current (HV CC UV+) - 0.1V 50 120 μAI Q LV CC QuiescentLV CC Supply Current (LV CC UV+) - 0.1V 100 200 μAI O HV CC Operating HV CC Supply Current(RMS Value) f OSC=100KHz69mADead-Time Control SectionTime(7)350nsD T DeadNotes:6. This parameter, although guaranteed, is not tested in production.7. These parameters, although guaranteed, are tested only in EDS (wafer test) process.11.05d a t 25O C11.05e d a t 25O C1m a l i z e d a t 25O Cgain is inversely proportional to the switching frequency in the ZVS region. The output voltage can be regulated by modulating the switching frequency. Figure 18 shows the typical circuit configuration for the R T pin, where the opto-coupler transistor is connected to the R T pin to modulate the switching frequency. of the resonant converter progressively. Since the voltage gain of the resonant converter is inversely proportional to the switching frequency, the soft-start is implemented by sweeping down the switching frequency from an initial high frequency (f I S S) until the output voltage is established. The soft-start circuit is made byTpin, as shown in Figure 18. FSFR-XS series also has a 3ms internalFigure 19. Frequency Sweeping of Soft-Start4. Self Auto-Restart: The FSFR-XS series can restart automatically even though any built-in protections are triggered with external supply voltage. As can be seen in Figure 20 and Figure 21, once any protections are triggered, the M1 switch turns on and the V-I converter is disabled. C SS starts to discharge until V Css across C SS drops to V CssL. Then, all protections are reset, M1 turns off, and the V-I converter resumes at the same time. The FSFR-XS starts switching again with soft-start. If the protections occur while V Css is under V CssL and V CssH level, the switching is terminated immediately, V Css continues to increase until reaching V CssH, then C SS is discharged by M1.Figure 20. Internal Block of AR PinAfter protections trigger, FSFR-XS is disabled during theI Crt stop t S/S(a)P ro te ction s a re trigge re d,(b)F SF R-U S restartsFigure 21. Self Auto-Restart Operation5. Protection Circuits: The FSFR-XS series has several self-protective functions, such as Over-Current Protection (OCP), Abnormal Over-Current Protection (AOCP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD). These protections are auto-restart mode protections, as shown in Figure 22.Once a fault condition is detected, switching is terminated and the MOSFETs remain off. When LV CC falls to the LV CC stop voltage of 10V or AR signal is HIGH, the protection is reset. The FSFR-XS resumes normal operation when LV CC reaches the start voltage of 12.5V.Figure 22. Protection Blocks5.1 Over-Current Protection (OCP): When the sensing pin voltage drops below -0.58V, OCP is triggered and the MOSFETs remain off. This protection has a shutdown time delay of 1.5µs to prevent分销商库存信息:FAIRCHILDFSFR2100XS FSFR2100XSL。

MSL2100BR;MSL2100BR-R;中文规格书,Datasheet资料

MSL2100BR;MSL2100BR-R;中文规格书,Datasheet资料
8-string, High-power, White or RGB LED Drivers for TVs, Monitors, or Intelligent Solid-state Lighting
Key Features
• 8-bit PWM String Dimming • Fast, 1MHz I2C/SMBus Interface Supports up to 16 Devices per Bus • 4-Bit Adaptive Power Correction Maximizes Efficiency of up to Three Power Supplies • External MOSFETs allow >0.5A LED String Current • Drives up to Eight Parallel High Power LED Strings • Multiple MSL2100s Share String Supplies and Automatically Negotiate Optimum Voltages • Supports Adaptive, Real-time 2-D Area Dimming for Highest Dynamic Range LCD TVs and Monitors • Programmable String Phase Virtually Eliminates Motion Blur and Improves Efficiency • Global LED Intensity Control via Serial Interface • Supports Direct PWM Control of all LED Strings with a Single PWM Input Signal • ±1% Current Accuracy and Current Balance • Video Frame (VSYNC) and Line (HSYNC) Sync Inputs • Sync Loss Detectors Optionally Disable LED Strings • Internal EEPROM Allows Custom Power-up Default Settings • String Open Circuit and LED Short Circuit Fault Detection • <1µA LED String off Leakage Current • External Resistors Set Individual String Peak Current • Programmable LED Over-temperature Compensation • Automatic Die Over-temperature Protection • I2C/SMBus Broadcast Mode Simplifies Configuration • -40°C To +85°C Operating Temperature Range • Lead-free, Halogen-free, RoHs-compliant Package

红杉设备安装手册

红杉设备安装手册

MacroSAN MS2510/MS2520系列存储设备安装手册文档版本:V1.01杭州宏杉科技有限公司400-650-5527声明Copyright © 2010杭州宏杉科技有限公司及其许可者版权所有,保留一切权利。

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目录MacroSAN MS2510/MS2520系列存储设备 ........................................................................................... 1-1安装手册.................................................................................................................................................. 1-1声明.......................................................................................................................................................... 1-2商标信息 .................................................................................................................................................. 1-2目录.......................................................................................................................................................... 1-3图目录...................................................................................................................................................... 1-8表目录.................................................................................................................................................... 1-11 1前言..................................................................................................................................................... 1-131.1 读者对象.......................................................................................................................................... 1-131.2 适用范围.......................................................................................................................................... 1-131.3 文档结构.......................................................................................................................................... 1-131.4 文档约定.......................................................................................................................................... 1-141.4.1 手册描述约定........................................................................................................................ 1-141.4.2 其他约定 ............................................................................................................................... 1-141.5 术语................................................................................................................................................. 1-141.5.1 DSU ...................................................................................................................................... 1-141.5.2 EP ......................................................................................................................................... 1-151.5.3 FC ......................................................................................................................................... 1-151.5.4 GE ........................................................................................................................................ 1-151.5.5 GUI ....................................................................................................................................... 1-151.5.6 iSCSI .................................................................................................................................... 1-151.5.7 ODSP ................................................................................................................................... 1-151.5.8 ODSP Scope ........................................................................................................................ 1-151.5.9 SAN ...................................................................................................................................... 1-151.5.10 SAS .................................................................................................................................... 1-151.5.11 SATA .................................................................................................................................. 1-151.5.12 SP ....................................................................................................................................... 1-161.5.13 SPU .................................................................................................................................... 1-161.5.14 SSD .................................................................................................................................... 1-161.6 资料获取方式................................................................................................................................... 1-161.7 资料意见或建议反馈方式................................................................................................................. 1-16 2安全注意事项 ...................................................................................................................................... 2-162.1 通用安全注意事项 ........................................................................................................................... 2-162.2 用电安全注意事项 ........................................................................................................................... 2-172.3 静电安全注意事项 ........................................................................................................................... 2-172.4 激光安全注意事项 ........................................................................................................................... 2-172.5 电池安全注意事项 ........................................................................................................................... 2-172.6 磁盘使用注意事项 ........................................................................................................................... 2-182.7 搬运注意事项................................................................................................................................... 2-19 3产品介绍 ............................................................................................................................................. 3-193.1 产品概述.......................................................................................................................................... 3-193.2 产品规格.......................................................................................................................................... 3-203.2.1 SPU规格 .............................................................................................................................. 3-203.2.2 DSU规格.............................................................................................................................. 3-223.2.3 磁盘模块规格........................................................................................................................ 3-223.3 产品外观.......................................................................................................................................... 3-233.3.1 SPU外观 .............................................................................................................................. 3-233.3.2 DSU外观.............................................................................................................................. 3-293.3.3 电源模块外观........................................................................................................................ 3-323.3.4 磁盘模块外观........................................................................................................................ 3-333.4 产品指示灯 ...................................................................................................................................... 3-343.4.1 SP指示灯 ............................................................................................................................. 3-343.4.2 EP指示灯 ............................................................................................................................. 3-353.4.3 电源模块指示灯 .................................................................................................................... 3-353.4.4 风扇模块指示灯 .................................................................................................................... 3-363.4.5 电池模块指示灯 .................................................................................................................... 3-363.4.6 磁盘模块指示灯 .................................................................................................................... 3-36 4安装设备 ............................................................................................................................................. 4-374.1 安装规划.......................................................................................................................................... 4-374.2 安装流程.......................................................................................................................................... 4-374.3 安装前准备 ...................................................................................................................................... 4-384.3.1 准备安装场所........................................................................................................................ 4-384.3.2 准备机柜 ............................................................................................................................... 4-414.3.3 准备安装工具........................................................................................................................ 4-424.4 安装前检查 ...................................................................................................................................... 4-434.4.1 检查环境 ............................................................................................................................... 4-434.4.2 检查设备 ............................................................................................................................... 4-444.4.3 检查磁盘模块........................................................................................................................ 4-454.4.4 检查线缆 ............................................................................................................................... 4-454.5 安装机柜.......................................................................................................................................... 4-464.5.1 安装机柜 ............................................................................................................................... 4-464.5.2 安装机柜后检查 .................................................................................................................... 4-464.6 安装托架式滑道............................................................................................................................... 4-464.6.1 托架式滑道介绍 .................................................................................................................... 4-464.6.4 安装滑道后检查 .................................................................................................................... 4-494.7 安装SPU ......................................................................................................................................... 4-494.7.1 安装SPU流程 ...................................................................................................................... 4-494.7.2 安装SPU到机柜中............................................................................................................... 4-504.7.3 安装电池模块........................................................................................................................ 4-514.7.4 安装SPU面板 ...................................................................................................................... 4-524.7.5 安装SPU后检查 .................................................................................................................. 4-534.8 安装DSU ......................................................................................................................................... 4-534.8.1 安装DSU流程...................................................................................................................... 4-534.8.2 安装DSU到机柜中............................................................................................................... 4-544.8.3 安装DSU后检查 .................................................................................................................. 4-554.9 安装磁盘模块................................................................................................................................... 4-554.9.1 安装磁盘模块流程................................................................................................................. 4-554.9.2 安装SPU的磁盘模块 ........................................................................................................... 4-564.9.3 安装DSU1516/DSU1616的磁盘模块 .................................................................................. 4-574.9.4 安装DSU1525磁盘模块....................................................................................................... 4-584.9.5 安装磁盘假面板 .................................................................................................................... 4-594.9.6 安装磁盘模块后检查............................................................................................................. 4-604.10 安装线缆........................................................................................................................................ 4-604.10.1 布线注意事项...................................................................................................................... 4-604.10.2 安装线缆的流程 .................................................................................................................. 4-634.10.3 安装接地线.......................................................................................................................... 4-644.10.4 安装电源线.......................................................................................................................... 4-654.10.5 安装SAS线缆 .................................................................................................................... 4-674.10.6 安装SP业务接口线缆 ........................................................................................................ 4-714.10.7 安装SP管理网口线缆 ........................................................................................................ 4-734.10.8 安装客户端服务器的线缆.................................................................................................... 4-734.10.9 安装线缆后检查 .................................................................................................................. 4-73 5启动与配置设备 .................................................................................................................................. 5-745.1 设备上电前检查............................................................................................................................... 5-745.2 设备上电及启动............................................................................................................................... 5-745.2.1 DSU上电及启动 ................................................................................................................... 5-745.2.2 DSU启动后检查 ................................................................................................................... 5-755.2.3 SPU上电及启动 ................................................................................................................... 5-755.2.4 SPU启动后检查 ................................................................................................................... 5-755.3 设备配置.......................................................................................................................................... 5-765.3.3 设备配置 ............................................................................................................................... 5-775.4 设备关机及下电............................................................................................................................... 5-79 6安装与拆卸设备组件 ........................................................................................................................... 6-796.1 安装/拆卸SP ................................................................................................................................... 6-806.1.1 SP介绍................................................................................................................................. 6-806.1.2 安装SP ................................................................................................................................. 6-806.1.3 拆卸SP ................................................................................................................................. 6-816.2 安装/拆卸EP ................................................................................................................................... 6-816.2.1 EP介绍................................................................................................................................. 6-816.2.2 安装EP ................................................................................................................................. 6-826.2.3 拆卸EP ................................................................................................................................. 6-826.3 安装/拆卸电源模块 .......................................................................................................................... 6-836.3.1 电源模块介绍........................................................................................................................ 6-836.3.2 安装电源模块........................................................................................................................ 6-846.3.3 拆卸电源模块........................................................................................................................ 6-846.4 安装/拆卸SPU风扇模块 ................................................................................................................. 6-846.4.1 SPU风扇模块介绍................................................................................................................ 6-846.4.2 安装SPU风扇模块............................................................................................................... 6-856.4.3 拆卸SPU风扇模块............................................................................................................... 6-856.5 安装/拆卸DSU风扇模块................................................................................................................. 6-866.5.1 DSU风扇模块介绍................................................................................................................ 6-866.5.2 安装DSU风扇模块............................................................................................................... 6-866.5.3 拆卸DSU风扇模块............................................................................................................... 6-866.6 安装/拆卸电池模块 .......................................................................................................................... 6-876.6.1 电池模块介绍........................................................................................................................ 6-876.6.2 安装电池模块........................................................................................................................ 6-876.6.3 拆卸电池模块........................................................................................................................ 6-886.7 安装/拆卸磁盘模块 .......................................................................................................................... 6-886.7.1 磁盘模块介绍........................................................................................................................ 6-886.7.2 安装磁盘模块........................................................................................................................ 6-896.7.3 拆卸磁盘模块........................................................................................................................ 6-89 7常见故障处理 ...................................................................................................................................... 7-907.1 SP故障处理 .................................................................................................................................... 7-907.1.1 故障现象1:SP的告警指示灯闪烁或常亮 ........................................................................... 7-907.1.2 故障现象2:SP的运行指示灯常亮或常灭 ........................................................................... 7-917.1.3 故障现象3:SP启动过程中,LED数码管无法显示信息..................................................... 7-917.1.4 故障现象4:SP启动过程中,LED数码管停留在88 ........................................................... 7-917.1.5 故障现象5:SP启动过程中,LED数码管长时间停留在某个固定值................................... 7-927.2 EP故障处理 .................................................................................................................................... 7-927.2.1 故障现象1:告警指示灯闪烁或常亮 .................................................................................... 7-927.2.2 故障现象2:运行指示灯常亮或常灭 .................................................................................... 7-927.3 电源模块故障处理 ........................................................................................................................... 7-937.4 风扇模块故障处理 ........................................................................................................................... 7-947.5 电池模块故障处理 ........................................................................................................................... 7-947.6 其他故障处理................................................................................................................................... 7-94 8附录A.拇指螺钉的安装方法................................................................................................................ 8-95图目录图3-1 SPU前正视图 ............................................................................................................................. 3-23图3-2 SPU后正视图 ............................................................................................................................. 3-24图3-3 MS2510f/MS2520f的SP正视图................................................................................................ 3-25图3-4 MS2510i/MS2520i的SP正视图 ................................................................................................ 3-26图3-5 SPU风扇模块正视图 .................................................................................................................. 3-28图3-6 电池模块正视图 .......................................................................................................................... 3-28图3-7 DSU1516/DSU1616前正视图.................................................................................................... 3-29图3-8 DSU1525前正视图..................................................................................................................... 3-29图3-9 DSU1516后正视图..................................................................................................................... 3-30图3-10 DSU1516的EP正视图 ............................................................................................................ 3-31图3-11 DSU风扇模块正视图................................................................................................................ 3-32图3-12 电源模块正视图 ........................................................................................................................ 3-33图3-13 3.5英寸磁盘模块前面板 ........................................................................................................... 3-33图3-14 2.5英寸磁盘模块前面板 ........................................................................................................... 3-33图4-1 存储设备的安装规划示意图 ........................................................................................................ 4-37图4-2 存储设备的安装流程示意图 ........................................................................................................ 4-38图4-3 设备防拆封条示意图 ................................................................................................................... 4-45图4-4 托架式滑道(左侧滑道)示意图................................................................................................. 4-47图4-5 确定托架式滑道安装位置示意图................................................................................................. 4-47图4-6 安装左侧滑道示意图 ................................................................................................................... 4-48图4-7 安装拇指螺钉示意图 ................................................................................................................... 4-48图4-8 检查滑道示意图 .......................................................................................................................... 4-49图4-9 SPU安装流程示意图 .................................................................................................................. 4-50图4-10 安装SPU示意图....................................................................................................................... 4-51图4-11 检查SPU示意图....................................................................................................................... 4-51图4-12 安装电池模块示意图 ................................................................................................................. 4-52图4-13 安装SPU面板示意图 ............................................................................................................... 4-53图4-14 DSU安装流程示意图................................................................................................................ 4-54图4-15 安装DSU示意图 ...................................................................................................................... 4-54图4-16 检查DSU示意图 ...................................................................................................................... 4-55图4-17 磁盘模块安装流程图 ................................................................................................................. 4-56图4-18 SPU磁盘槽位编号示意图......................................................................................................... 4-56图4-19 3.5英寸磁盘模块示意图 ........................................................................................................... 4-57图4-21 DSU1516/DSU1616磁盘槽位编号示意图................................................................................ 4-58图4-22 DSU1525磁盘槽位编号示意图................................................................................................. 4-58图4-23 2.5英寸磁盘模块示意图 ........................................................................................................... 4-59图4-24 安装2.5英寸磁盘模块示意图................................................................................................... 4-59图4-25 安装磁盘假面板示意图.............................................................................................................. 4-60图4-26 固定线缆端子示意图 ................................................................................................................. 4-61图4-27 线缆捆扎示意图(一).............................................................................................................. 4-62图4-28 线缆捆扎示意图(二).............................................................................................................. 4-62图4-29 线缆捆扎示意图(三).............................................................................................................. 4-63图4-30 线缆安装流程示意图 ................................................................................................................. 4-63图4-31 接地线示意图 ............................................................................................................................ 4-64图4-32 松开设备接地端子的螺钉示意图............................................................................................... 4-64图4-33 安装接地线示意图..................................................................................................................... 4-65图4-34 电源线示意图 ............................................................................................................................ 4-65图4-35 安装电源线示意图..................................................................................................................... 4-66图4-36 电源线捆扎示意图..................................................................................................................... 4-66图4-37 Mini SAS线缆示意图................................................................................................................ 4-67图4-38 Mini SAS连接器(线缆端)示意图.......................................................................................... 4-68图4-39 高速SAS线缆弯曲半径示意图................................................................................................. 4-69图4-40 SAS线缆连接示意图 ................................................................................................................ 4-70图4-41 以太网线缆和接口示意图.......................................................................................................... 4-71图4-42 FC线缆和接口示意图 ............................................................................................................... 4-72图5-1 加载ODSP Scope界面.............................................................................................................. 5-77图5-2 ODSP Scope设备管理界面........................................................................................................ 5-78图5-3 设备初始配置流程示意图............................................................................................................ 5-79图6-1 安装/拆卸SP示意图................................................................................................................... 6-80图6-2 安装/拆卸EP示意图................................................................................................................... 6-82图6-3 安装/拆卸DSU电源模块示意图 ................................................................................................. 6-83图6-4 安装/拆卸SPU风扇模块示意图.................................................................................................. 6-85图6-5 安装/拆卸DSU风扇模块示意图 ................................................................................................. 6-86图6-6 安装/拆卸电池模块示意图........................................................................................................... 6-87图6-7 安装/拆卸3.5英寸磁盘模块示意图............................................................................................. 6-89图6-8 安装/拆卸2.5英寸磁盘模块示意图............................................................................................. 6-89图8-1 拇指螺钉示意图 .......................................................................................................................... 8-95。

PA340CC, 规格书,Datasheet 资料

PA340CC, 规格书,Datasheet 资料

CAUTION The PA340 is constructed from MOSFET transistors. ESD handling procedures must be observed.
OFFSET VOLTAGE, vs. time
BIAS CURRENT, initial
BIAS CURRENT, vs. supply
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
COMMON MODE, voltage range
R
20R
20R
VIN
+175
20R +175
CC 10pF
CC 10pF
A1
A2
PA340
PA340
RN
PIEZO
TRANSDUCER
CN
–175
LOW COST 660V p-p PIEZO DRIVER
–175
FIGURE 3. Low Cost 660VP-P Piezo Driver
2 芯天下--/
Max
Units
40
mV
250
µV/°C
500
µV/°C
µV/V
µV/kh
200
pA
pA/V
200
pA
Ω
pF
V
V
dB
µV RMS
dB MHz kHz
PA340U
3
芯天下--/
PA340
Parameter
Test Conditions (Note 1)
OUTPUT
VOLTAGE SWING CURRENT, peak

MS132型号电源保护器说明书

MS132型号电源保护器说明书

Description–Overload protection – trip class 10–Phase loss sensitivity–Disconnect function–Temperature compensation from -25 … +60 °C –Adjustable current setting for overload protection –Suitable for three- and single-phase application –Trip-free mechanism–Status indication–Clear switch position indication ON/OFF/TRIP–Lockable handle Order dataMS132 screw terminalSettingrangeAType TripclassOrder code Pack-ing unitPCEWeightper PCEkg0.10...0.16MS132-0.1610A1SAM350000R100110.215 0.16...0.25 MS132-0.25101SAM350000R100210.215 0.25...0.40MS132-0.4101SAM350000R100310.215 0.40...0.63 MS132-0.63101SAM350000R100410.2150.63...1.00 MS132-1.0101SAM350000R100510.2151.00...1.60 MS132-1.6101SAM350000R100610.2651.60...2.50 MS132-2.5101SAM350000R100710.2652.50...4.00 MS132-4.0101SAM350000R100810.265 4.00...6.30 MS132-6.3101SAM350000R100910.265 6.30...10.0 MS132-10101SAM350000R101010.265 8.00...12.0 MS132-12 101SAM350000R1012 10.310 10.0...16.0 MS132-16101SAM350000R101110.310 16.0...20.0 MS132-20101SAM350000R101310.310 20.0...25.0 MS132-25101SAM350000R101410.310 25.0...32.0 MS132-32101SAM350000R101510.310Note: MS132 with pre-assembled auxiliary contact HKF1-11,please order as follow 1SAM350005RxxxxManual motor starters are electro-mechanical protection devices for the main circuit. They are used mainly to switch motors manually ON/OFF and protect them fuse less against short-circuit, overload and phase failures.Fuse less protection with a manual motor starter saves costs, space andensures a quick reaction under short-circuit condition, by switching off the motor within milliseconds. Fuse less starter combinations are setup together with contactors.2 C D C 2 4 1 0 2 0 F 0 0 0 9ApprovalsA cULus UL 508 K CB schemeE CCCDGOST-RGOST-FABSPLloyd’s RegisterGLDNVRINAMarksa CE2 - 2CDC131021D0201Functional description2C D C 241020F 000912345671 Terminals 1L1, 3L2, 5L32 Switch position TRIP3 Lockable handle4 Status indication for short-circuit5 Current setting rangeAdjustable current setting for overload protection 6 Test function7 Terminals 2T1, 4T2, 6T3ApplicationThe manual motor starters protect the load and the installation against short-circuit and overload. They are three pole protection devices with thermal tripping elements for overload protection and electromagnetic tripping elements for short-circuit protection. Furthermore, they provide a disconnect function for safely isolation of the installation and the supply and can be used for the manual switching of loads.The manual motor starters have a setting scale in amperes, which allows the direct adjusting of the device without anyadditional calculation. In compliance with international and national standards, the setting current is the rated current of the motor and not the tripping current (no tripping at 1.05 x I, tripping at 1.2 x I; I = setting current).Operation modeSingle-phase operation Three-phase operationWiring diagramResistance and power loss per poleType Setting range Resistance per pole Power loss per polelower value A upper valueAΩat lower valueWat upper valueWMS132-0.160.10 0.16 66.000.7 1.7MS132-0.250.16 0.25 25.500.7 1.7MS132-0.40.25 0.40 10.380.7 1.7MS132-0.630.40 0.63 4.360.7 1.7MS132-1.00.63 1.00 1.6050.7 1.7MS132-1.6 1.00 1.60 0.6480.7 1.7MS132-2.5 1.60 2.50 0.2720.7 1.7MS132-4.0 2.50 4.00 0.1060.7 1.7MS132-6.3 4.00 6.30 0.0460.7 1.7MS132-10 6.30 10.0 0.0240.9 2.4MS132-12 8.00 12.0 0.016 1.0 2.3MS132-1610.0 16.0 0.011 1.1 2.8MS132-2016.0 20.0 0.0057 1.5 2.3MS132-2520.0 25.0 0.0045 1.8 2.8MS132-3225.0 32.0 0.0030 1.9 3.1Technical diagramIntermittent periodic duty, ta: Motor starting time2CDC131021D0201 - 3Dimensions in mm / inchesMS132 ≤ 10 AMS132 > 10 AMS132 ≤ 10 A with screw fixing kit FS116 (accessory)MS132 > 10 A + with screw fixing kit FS116 (accessory)4 - 2CDC131021D02012CDC131021D0201 - 5Technical data IEC/ENData at T A = 40 °C and at rated values, if nothing else indicated Main circuit1L1-3L2-5L3 2T1-4T2-6T3Rated operational voltage U e690 V AC 250 V DCSetting range - thermal overload protection see table “Order data” on page 1Rated operational current I esee table belowRated operational current DC-5 I e3 conducting paths in series up to 250 Vsee “Rated operational current I e ”Rated instantaneous short-circuit current setting I i see table belowRated service short-circuit breaking capacity I cs see table “Short-circuit breaking capacity and back-up fuses” on page 7Rated ultimate short-circuit breaking capacity I cu Rated service short-circuit breaking capacity DC I cs 3 conducting paths in series up to 250 V 10 kA Trip class see table “Order data” on page 1Rated frequency DC, 50/60 Hz Number of poles 3Resistance per pole see table “Resistance and power loss per pole” on page 3Power loss per poleIsolation dataRated impulse withstand voltage U imp 6 kV Rated insulation voltage U i 690 V Pollution degree3Electrical connection MS132 ≤ 10 A MS132-12, -16MS132-20, -25, -32Connecting capacitysolid 1/2 x 1 ... 4 mm²1/2 x 2.5 ... 6 mm²stranded1/2 x 1 ... 4 mm²1/2 x 2.5 ... 6 mm²flexible with ferrule1/2 x 0.75 ... 2.5 mm²1/2 x 1 ... 6 mm²flexible with ferrule insulated 1/2 x 0.75 ... 2.5 mm²1/2 x 1 ... 6 mm²flexible without ferrule1/2 x 0.75 ... 2.5 mm²1/2 x 2.5 ... 6 mm²Stripping length 9 mm 10 mm 10 mm Tightening torques 0.8 ... 1.2 Nm 1.5 Nm 2 Nm Connection screwM3.5 (Pozidrive 2)M4 (Pozidrive 2)M4 (Pozidrive 2)TypeRated instantaneousshort-circuit current setting l i Rated operational current l e AA MS132-0.16 1.560.16 MS132-0.25 2.440.25 MS132-0.4 3.900.40 MS132-0.63 6.140.63 MS132-1.011.50 1.00 MS132-1.618.40 1.60 MS132-2.528.75 2.50MS132-4.050.00 4.00 MS132-6.378.75 6.30 MS132-1015010.0MS132-12 18012.0 MS132-1624016.0 MS132-2030020.0 MS132-2537525.0 MS132-3248032.0General dataMechanical durability105Electrical durability 5 x 104Duty time100 %Operating frequency without early tripping up to 15 operations/h or 60 operations/h with40 % duty ratio, if the motor breaking current 6 x Inand the motor starting time does not exceed 1 s Dimensions (W x H x D)see drawing “Dimensions” on page 4Weight see table “Order data” on page 1Mounting DIN-rail (EN 60715)Mounting position position 1-6 (optional for single mounting) Group mounting on requestMinimum distance to other units same type horizontal0 mmvertical150 mmMinimum distance to electrical conductive board horizontal, up to 400 V0 mmhorizontal, up to 690 V> 1.5 mmvertical75 mmDegree of protection enclosure / terminals IP20Utilization category AMaximum operating altitude up to 2000 mMaximum operating frequency 170 cycles/hElectromagnetic compatibilityElectromagnetic compatibility not applicableEnvironmental dataAmbient air temperatureOperation open - compensated acc. to IEC/EN 60947-4-1-25 ... +60 °Copen-25 ... +70 °Cenclosed (IB132)0 ... +40 °CStorage-50 ... +80 °CAmbient air temperature compensation continuous5g / 3 ... 150 HzVibration (sinusoidal) acc. to IEC/EN60068-2-6 (Fc)25g / 11 msShock (half-sine) acc. to IEC/EN 60068-2-27 (Ea)Standards / directivesProduct standard IEC/EN 60947–2IEC/EN 60947-4-1IEC/EN 60947-1UL 508, CSA 22.2 No. 14 Low Voltage Directive2006/95/ECEMC Directive2004/108/ECRoHS Directive2002/95/EC6 - 2CDC131021D0201Short-circuit breaking capacity and back-up fuseslCSRated service short-circuit breaking capacitylCURated ultimate short-circuit breaking capacityo No back-up fuse required, because short-circuit proof up to 100 kAType230 V AC 400 V AC440 V AC500 V AC690 V ACI CS kA ICUkAgGAICSkAICUkAgGAICSkAICUkAgGAICSkAICUkAgGAICSkAICUkAgGAMS132-0.16100100°100100°100100°100100°100100°MS132-0.25100100°100100°100100°100100°100100°MS132-0.4100100°100100°100100°100100°100100°MS132-0.63100100°100100°100100°100100°100100°MS132-1.0100100°100100°100100°100100°100100°MS132-1.6100100°100100°100100°100100°100100°MS132-2.5100100°100100°100100°100100°100100°MS132-4.0100100°100100°20203520203533on request MS132-6.3100100°100100°20206320206333on request MS132-10100100°100100°2020100202010033on request MS132-12 100100°100100° 20201002020100 3 3 on request MS132-16100100°100100°2020125202012533on request MS132-20100100°100100°2020125202012533on request MS132-25505012550501252020125101012533on request MS132-32255012525501252020125101012533on request2CDC131021D0201 - 7Technical data UL/CSAMain circuitMaximum operational voltage600 VManual Motor Controller ratings see table “UL 508 — Manual Motor Controller” on page 8 Motor ratings Horse power see table belowFull load amps (FLA) see table belowLocked rotor amps (LRA)see table belowElectrical connection MS132 ≤ 10 A MS132-12, -16MS132-20, -25, -32 Connecting capacity stranded1/2 x AWG 16 ... 121/2 x AWG 12 (8)flexible without ferrule1/2 x AWG 16 ... 121/2 x AWG 12 (8)Stripping length9 mm10 mm10 mm Tightening torques10 ... 12 lb-in14 lb-in18 lb-InConnection screw M3.5(Pozidrive 2)M4(Pozidrive 2)M4(Pozidrive 2)Motor rating, single phasehp Horse powerFLA Full load ampsLRA Locked rotor ampsType220 ... 240 V AC440 ... 480 V AChp FLA LRA hp FLA LRA MS132-0.16 - 0.16 0.96 - 0.16 0.96 MS132-0.25 - 0.25 1.5 - 0.25 1.5 MS132-0.4 - 0.4 2.4 - 0.4 2.4 MS132-0.63 - 0.63 3.78 - 0.63 3.78 MS132-1.0 - 1 6 - 1 6 MS132-1.6 1/10 1.6 9.6 - 1.6 9.6 MS132-2.5 1/6 2.5 15 1/2 2.5 15 MS132-4.0 1/3 4 24 1/2 4 24 MS132-6.3 1/2 6.3 37.8 1 6.3 37.8 MS132-10 1-1/2 10 60 3 8.5 46 MS132-12 2 12 72 3 8.5 64 MS132-16 2 12 72 5 14 81 MS132-20 3 17 92 5 14 81 MS132-25 3 17 127 7-1/2 21 116 MS132-32 5 28 162 10 26 1458 - 2CDC131021D0201Motor rating, three phasehp Horse powerFLA Full load ampsLRA Locked rotor ampsType110 ... 120 V AC220 ... 240 V AC440 ... 480 V AC500 ... 600 V AC hp FLA LRA hp FLA LRA hp FLA LRA hp FLA LRAMS132-0.16 - 0.16 0.96 - 0.16 0.96 - 0.16 0.96 - 0.16 0.96MS132-0.25 - 0.25 1.5 - 0.25 1.5 - 0.25 1.5 - 0.25 1.5MS132-0.4 - 0.4 2.4 - 0.4 2.4 - 0.4 2.4 - 0.4 2.4MS132-0.63 - 0.63 3.78 - 0.63 3.78 - 0.63 3.78 - 0.63 3.78MS132-1.0 - 1 6 - 1 6 - 1 6 1/2 1 6MS132-1.6 - 1.6 9.6 - 1.6 9.6 3/4 1.6 9.6 3/4 1.6 9.6MS132-2.5 - 2.5 15 1/2 2.5 15 1 2.5 15 1-1/2 2.5 15MS132-4.0 - 4 24 1 4 24 2 4 24 3 3.9 26MS132-6.3 1/2 6.3 37.8 1-1/2 6.3 37.8 3 4.8 32 5 6.1 37MS132-10 3/4 10 60 3 9.6 64 5 7.6 46 7-1/2 9 51MS132-12 1-1/2 12 72 3 9.6 64 7-1/2 11 64 10 11 65MS132-16 2 16 84 5 15.2 92 10 14 81 10 11 65MS132-20 3 19.2 128 5 15.2 92 10 14 81 15 17 93MS132-25 3 19.2 128 7-1/2 22 12715 21 116 20 22 116MS132-32 5 30.4 184 10 28 16220 27 145 25 27 146Manual Motor Controller for Motor DisconnectType Maximum short-circuit current rating480 V600 VkA kAMS132-0.166547MS132-0.256547MS132-0.46547MS132-0.636547MS132-1.06547MS132-1.66547MS132-2.56547MS132-4.06518MS132-6.36518MS132-106518MS132-123018MS132-163018MS132-203018MS132-253018MS132-3230182CDC131021D0201 - 9Manual Motor Controller for Group InstallationType Maximum short-circuit current rating480 V600 VkA kAMS132-0.166547MS132-0.256547MS132-0.46547MS132-0.636547MS132-1.06547MS132-1.66547MS132-2.56547MS132-4.06530MS132-6.36530MS132-106530MS132-123030MS132-163030MS132-203030MS132-253030MS132-323030Manual Motor Controller for Group Installation in combination with current limitor S803W-SCLxxx-SR Type Maximum short-circuit current rating480 V600 VkA kAMS132-0.166565MS132-0.256565MS132-0.46565MS132-0.636565MS132-1.06565MS132-1.66565MS132-2.56565MS132-4.06565MS132-6.36565MS132-106565MS132-126565MS132-166565MS132-206565MS132-256565MS132-32656510 - 2CDC131021D0201Self-Protected Combination Motor Controller (Type E) and Combination Motor Controller (Type F)Type UL 508 Self-Protected CombinationMotor Controller (Type E) in combina-tion with feeder block S1-M3-xx UL 508 Combination Motor Controller(Type F)UL 508 Manual Motor Controller forTap Conductor ProtectionMaximum short-circuit current rating Maximum short-cir-cuit current rating Minimum contac-tor sizeMaximum short-circuit current rating480Y / 277 V600Y / 347 V480Y / 277 V480 V600 VkA kA kA kA kA MS132-0.16654730AF26...AF386547 MS132-0.25654730AF26...AF386547 MS132-0.4654730AF26...AF386547 MS132-0.63654730AF26...AF386547 MS132-1.0654730AF26...AF386547 MS132-1.6654730AF26...AF386547 MS132-2.5654730AF26...AF386547 MS132-4.0651830AF26...AF386518 MS132-6.365-30AF26...AF386518 MS132-1065-30AF26...AF386518 MS132-1230-30AF26...AF383018 MS132-1630-30AF26...AF383018 MS132-2030-30AF26...AF383018 MS132-2530-30AF26...AF383018 MS132-3230-30AF26...AF38, A403018Self-Protected Combination Motor Controller (Type E) and Combination Motor Controller (Type F)in combination with current limitor S803W-SCLxxx-SRType UL 508 Self-Protected CombinationMotor Controller (Type E) incombination with current limitorS803W-SCLxxx-SR UL 508 Combination Motor Controller (Type F) in combination with current limitor S803W-SCLxxx-SRMaximum short-circuit current rating Maximum short-circuit current rating Minimum contactor size480Y / 277 V480Y / 277 VkA kAMS132-0.166565AF26...AF38MS132-0.256565AF26...AF38MS132-0.46565AF26...AF38MS132-0.636565AF26...AF38MS132-1.06565AF26...AF38MS132-1.66565AF26...AF38MS132-2.56565AF26...AF38MS132-4.06565AF26...AF38MS132-6.36565AF26...AF38MS132-106565AF26...AF38MS132-1265--MS132-1665--MS132-2065--MS132-2565--MS132-3265--2CDC131021D0201 - 11ABB STOTZ-KONTAKT GmbH Eppelheimer Straße 8269123 Heidelberg, Germany Phone: +49 (0) 6221 7 01-0 Fax: +49 (0) 6221 7 01-13 25 E-Mail:*****************.comYou can find the address of your local sales organization on the ABB home page/contacts-> Low Voltage Products and SystemsContact usNote:We reserve the right to make technical changes or modify the contents of this document without prior notice. With regard to purchase orders, the agreed particulars shall prevail. ABB AG does not accept any responsibility whatsoever for potential errors or possible lack of information in this document.We reserve all rights in this document and in the subject matter and illustrations contained therein. Any reproduction, disclosure to third parties or utilization of its contents – in whole or in parts – is forbidden without prior written consent of ABB AG. Copyright© 2012 ABB All rights reservedB r o c h u r e n u m b e r 2CD C 131 021 D 0201 (07.2012)。

Maxim_Integrated-DS32KHZ_DIP-datasheet.1.pdf - DS

Maxim_Integrated-DS32KHZ_DIP-datasheet.1.pdf -  DS

DS32kHz32.768kHz Temperature-CompensatedCrystal OscillatorGENERAL DESCRIPTIONThe DS32kHz is a temperature-compensated crystal oscillator (TCXO) with an output frequency of 32.768kHz. This device addresses applications requiring better timekeeping accuracy, and can be used to drive the X1 input of most Dallas Semiconductor real-time clocks (RTCs), chipsets, and other ICs containing RTCs. This device is available in commercial (DS32kHz) and industrial (DS32kHz-N) temperature versions.APPLICATIONSGPS Receivers TelematicsNetwork Timing and Synchronization in Servers, Routers, Hubs, and Switches Automatic Power MetersFEATURESAccurate to ±4 Minutes/Year (-40°C to +85°C) Accurate to ±1 Minute/Year (0°C to +40°C) Battery Backup for Continuous Timekeeping V BAT Operating Voltage: 2.7V to 5.5V with V CCGroundedV CC Operating Voltage: 4.5V to 5.5V Operating Temperature Range:0°C to +70°C (Commercial) -40°C to +85°C (Industrial)No Calibration Required Low-Power ConsumptionSurface Mountable Using BGA Package UL RecognizedORDERING INFORMATIONPARTTEMP RANGEPIN-PACKAGETOP MARK*DS32KHZ/DIP 0ºC to +70ºC 14 DIP DS32KHZ DS32KHZN/DIP -40ºC to +85ºC 14 DIPDS32KHZ-N DS32KHZS 0ºC to +70ºC 16 SO (0.300”) DS32KHZS DS32KHZS# 0ºC to +70ºC 16 SO (0.300”) DS32KHZS DS32KHZSN -40ºC to +85ºC 16 SO (0.300”) DS32KHZSN DS32KHZSN# -40ºC to +85ºC 16 SO (0.300”) DS32KHZSN DS32KHZ/WBGA 0ºC to +70ºC 36 BGA DS32KHZ DS32KHZN/WBGA-40ºC to +85ºC36 BGADS32KHZ-N#Denotes a RoHS-compliant device that may include lead that is exempt under the RoHS requirements. The lead finish is JESD97 category e3, and is compatible with both lead-based and lead-free soldering processes.*A “#” anywhere on the top mark denotes a RoHS-compliant device. An “N” denotes an industrial device.PIN CONFIGURATIONSABSOLUTE MAXIMUM RATINGSVoltage Range on Any Pin Relative to Ground………………………………………………………………-3.0V to +7.0V Operating Temperature Range (Noncondensing)Commercial:…………………………………………………………………………………………………..0°C to +70°CIndustrial:……………………………………………………………………………………………………-40°C to +85°CStorage Temperature Range………………………………………………………………………………….-40°C to +85°C Soldering Temperature (BGA, SO)……………………….See the Handling, PC Board Layout, and Assembly section. Soldering Temperature, Leads (DIP)……………………………………………………..+260°C for 10 seconds (Note 1)Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only,and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications isnot implied. Exposure to the absolute maximum rating conditions for extended periods may affect device reliability.RECOMMENDED DC OPERATING CONDITIONS(T A = -40°C to +85°C) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITS Power-Supply Voltage V CC(Note2) 4.5 5.0 5.5 VBattery Voltage V BAT(Notes 2, 3) 2.7 3.0 3.5,5.5VDC ELECTRICAL CHARACTERISTICS(Over the operating range, unless otherwise specified.) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITSActive Supply Current I CC V BAT = 0V or2.7V ≤ V BAT≤3.5V(Notes 3, 4)150 220 μABattery Input-Leakage Current I BATLKG V CC MIN≤ V CC≤ V CC MAX -50 +50 nAHigh Output Voltage (V CC) V OH I OH = -1.0mA (Note 2) 2.4 VLow Output Voltage V OL I OL = 2.1mA (Note 2) 0.4 VHigh Output Voltage (V BAT) V OH I OH = -0.1mA (Note 2) 2.4 VBattery Switch Voltage V SW(Note 2) V BAT V(V CC = 0V, T A = -40°C to +85°C.) (Note 1)PARAMETER SYMBOL CONDITIONS MINTYPMAXUNITS Active Battery Current I BAT V BAT = 3.3V (Notes 4, 5, 6) 1 4 μABattery Current DuringTemperature MeasurementI BATCNV V BAT = 3.3V (Notes 4, 5, 7) 450 μANote 1:Limits at -40°C are guaranteed by design and are not production tested.Note 2:All voltages are referenced to ground.Note 3:V BAT must be no greater than 3.5V when the device is used in the dual-supply operating modes.Note 4:Typical values are at +25°C and 5.0V V CC, 3.0 V BAT, unless otherwise indicated.Note 5:These parameters are measured under no output load conditions.Note 6:This current is the active-mode current sourced from the backup supply/battery.Note 7: A temperature conversion lasts 122ms (typ) and occurs on power-up and then once every 64 seconds.AC TIMING CHARACTERISTICS(Over the operating range, unless otherwise specified.)PARAMETER SYMBOLCONDITIONSMINTYPMAXUNITSOutput Frequency f OUT32.768kHz0°C to +40°C -2.0 +2.0Frequency Stability vs. Temperature ∆f/f O-40°C to +85°C or0°C to +70°C-7.5 +7.5ppmDuty Cycle t W/t 45 50 55 % Cycle Time t CYC(Note 8) 30.518 μsHigh/Low Time t H/t L(Note8) 15.06 μsRise Time t R(Note 8) 200 nsFall Time t F(Note8) 60 ns Oscillator Startup Time t OSC(Note 8) 1 secondsFrequency Stability vs. Operating Voltage ∆f/VV CC = 5.0V orV BAT = 3.0V, V CC = 0V(Notes 4, 9)+2.5 ppm/VCrystal Aging (First Year) ∆f/f O(Notes 4, 10) ±1.0 ppmNote 8:These parameters are measured using a 15pF load.Note 9:Error is measured from the nominal supply voltage of whichever supply is powering the device.Note 10:After reflow.TYPICAL OPERATING CHARACTERISTICSPIN DESCRIPTIONPINSO BGA DIPNAME FUNCTION1 C4, C5, D4, D5 12 32kHz 32.768kHz Push-Pull Output2 C2, C3, D2, D3 13 V CC Primary Power Supply3–12, 15, 16 A7, A8, B7, B8,C7, C8, D7, D81, 6–11, 14 N.C. No Connection (Must be grounded)13 All remainingballs4 GNDGround14 A4, A5, B4, B5 5 V BAT +3V Nominal Supply Input. Used to operate the device when V CC is absent.Figure 2. Delta Time and Frequency vs. TemperatureFUNCTIONAL DESCRIPTIONThe DS32kHz is a temperature-compensated crystal oscillator (TCXO) that outputs a 32,768Hz square wave. While the DS32kHz is powered by either supply input, the device measures the temperature every 64 seconds and adjusts the output frequency. The device requires four pins for operation: V CC, GND, V BAT, and 32kHz. (See Figure 4 for connection schemes.) Power is applied through V CC and GND, while V BAT is used to maintain the 32kHz output in the absence of power. Once every 64 seconds, the DS32kHz measures the temperature and adjusts the output frequency. The output is accurate to ±2ppm (±1 min/yr) from 0°C to +40°C and to ±7.5ppm (±4 min/year) from -40°C to 0°C and from +40°C to +85°C.The DS32kHz is packaged in a 36-pin ball grid array (BGA). It also is available in a 16-pin 0.300” SO and a 14-pin encapsulated DIP (EDIP) module.The additional PC board space required to add the DS32kHz as an option for driving a RTC is negligible in many applications (see Figure 6) Therefore, adding the DS32kHz to new designs and future board revisions allows the use of the DS32kHz where applications require improved timekeeping accuracy.Figure 3. Block DiagramOPERATIONThe DS32kHz module contains a quartz tuning-fork crystal and an IC. When power is first applied, and when the device switches between supplies, the DS32kHz measures the temperature and adjusts the crystal load to compensate the frequency. The power supply must remain at a valid level whenever a temperature measurement is made, including when V CC is first applied. While powered, the DS32kHz measures the temperature once every 64 seconds and adjusts the crystal load.The DS32kHz is designed to operate in two modes. In the dual-supply mode, a comparator circuit, powered by V CC, monitors the relationship between the V CC and V BAT input levels. When V CC drops below a certain level compared to V BAT, the device switches over to V BAT (Figure 4A). This mode uses V CC to conserve the battery connected to V BAT while V CC is applied.In the single-supply mode, V CC is grounded and the unit is powered by V BAT. Current consumption is less than V CC, because the comparator circuit is unpowered (Figure 4B).Figure 4A shows how the DS32kHz should be connected when using two power supplies. V CC should be between 4.5V and 5.5V, and V BAT should be between 2.7V and 3.5V. Figure 4B shows how the DS32kHz can be used when only a single-supply system is available. V CC should be grounded and V BAT should then be held between 2.7V and 5.5V. The V BAT pin should be connected directly to a battery. Figure 4C shows a single-supply mode where V CC is held at +5V. See the frequency stability vs. operating voltage for information about frequency error vs. supply voltage.Figure 4. Power-Supply ConnectionsFigure 5 illustrates how a standard 32.768kHz crystal and the DS32kHz should be connected to address the interchangeable option. Using this connection scheme and the recommended layout provides a solution, which requires no hardware modifications. Only one device should be used at a time, and both layouts should be located very close together if the recommended layout is not used.The DS32kHz I CC and I BAT currents are specified with no output loads. Many RTC oscillator circuits use a quartz crystal or resonator. Driving the oscillator circuit with the rail-to-rail output of the DS32kHz can increase the I CC and I BAT currents significantly and increase the current consumption of the RTC as well. Figure 6 shows one circuit that can be used to reduce the current consumption of a DS32kHz and an RTC. The values of R1 and C1 may vary depending on the RTC used. However, values of 1.0MΩ and 100pF are recommended as a starting point. R2 is used to shift the input waveform to the proper level. The recommended value for R2 is 33kΩ.Figure 5. DS32kHz ConnectionsFigure 6. DS32kHz and RTC ConnectionsRELATED APPLICATION NOTES(Go to /RTCapps to find these application notes and more.)Application Note 58: Crystal Considerations with Dallas Real-Time ClocksApplication Note 701: Using the DS32kHz with Dallas RTCsHANDLING, PC BOARD LAYOUT, AND ASSEMBLYThese packages contain a quartz tuning-fork crystal. Pick-and-place equipment may be used, but precautions should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage to the crystal.Avoid running signal traces under the package, unless a ground plane is placed between the package and the signal line. All N.C. (no connect) pins must be connected to ground.The BGA package may be reflowed as long as the peak temperature does not exceed 240°C. Peak reflow temperature (≥230°C) duration should not exceed 10 seconds, and the total time above 200°C should not exceed 40 seconds (30 seconds nominal). For the SO package, refer to the IPC/JEDEC J-STD-020 specification for reflow profiles. Exposure to reflow is limited to 2 times maximum. The DIP package can be wave-soldered, provided that the internal crystal is not exposed to temperatures above 150°C.Moisture sensitive packages are shipped from the factory dry-packed. Handling instructions listed on the package label must be followed to prevent damage during reflow. Refer to IPC/JEDEC J-STD-020 standard for moisture-sensitive device (MSD) classifications.PACKAGE INFORMATION(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package information,o to /DallasPackInfo.)gPACKAGE TYPE DOCUMENT NUMBER THETA-J A(°C/W)THETA-J C(°C/W)14-pin Encapsulated DIP 56-G0001-00216-pin SO (300 mils) 56-G4009-00173 23 36-pin BGA 56-G6023-00143.9 18.48 of 8Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product. No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time. Maxim In tegrated P roducts, 120 S an Gabriel D rive, Sun nyvale, CA94086 408-737-7600。

74LCX32MTCX,74LCX32MX,74LCX32BQX, 规格书,Datasheet 资料

74LCX32MTCX,74LCX32MX,74LCX32BQX, 规格书,Datasheet 资料

74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant InputsFeatures■ 5V tolerant inputs■ 2.3V–3.6V V CC specifications provided ■ 5.5ns t PD max. (V CC = 3.3V), 10 µ A I CC max. ■ Power down high impedance inputs and outputs ■ ±24mA output drive (V CC = 3.0V)■ ■ Latch-up performance exceeds JEDEC 78 conditions ■ ESD performance:– Human body model > 2000V – Machine model > 150V ■ Leadless DQFN packageGeneral DescriptionThe LCX32 contains four 2-input OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.The 74LCX32 is fabricated with advanced CMOS tech-nology to achieve high speed operation while maintain-ing CMOS low power dissipation.Ordering InformationNote:1.DQFN package available in Tape and Reel only.Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.All packages are lead free per JEDEC: J-STD-020B standard.Order NumberPackage NumberPackage Description74LCX32M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX32SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide74LC32BQX (1)MLP14A 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm74LCX32MTCMTC1414-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WideImplements proprietary noise/EMI reduction circuitry Low Voltage Quad 2-Input OR Gate with 5V Tolerant Inputs74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant Inputs Pad Assignments for DQFN(Top View)Pin DescriptionPin Names DescriptionA n,B n InputsO n Outputs74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant InputsNote:2.I O Absolute Maximum Rating must be observed.Recommended Operating Conditions (3)The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings.Note:3.Unused inputs must be held HIGH or LOW. They may not float.V CC Supply Voltage –0.5V to +7.0V V I DC Input Voltage–0.5V to +7.0V V O DC Output Voltage, Output in HIGH or LOW State (2) –0.5V to V CC + 0.5VI IK DC Input Diode Current, V I < GND –50mA I OKDC Output Diode Current V O < GND –50mA V O > V CC+50mA I O DC Output Source/Sink Current ±50mA I CC DC Supply Current per Supply Pin ±100mA I GND DC Ground Current per Ground Pin ±100mAT STGStorage Temperature–65°C to +150°CSymbolParameter Min.Max.UnitsV CCSupply Voltage Operating 2.0 3.6V Data Retention1.5 3.6V I Input Voltage0 5.5V V O Output Voltage, HIGH or LOW State 0V CC V I OH / I OLOutput Current V CC = 3.0V–3.6V ±24mAV CC = 2.7V–3.0V ±12 V CC = 2.3V–2.7V±8T A Free-Air Operating Temperature–4085°C ∆ t / ∆ VInput Edge Rate, V IN = 0.8V–2.0V , V CC = 3.0V10ns /V74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant InputsAC Electrical CharacteristicsNote:4.Skew is defined as the absolute value of the difference between the actual propagation delay for any twoseparate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t OSHL ) or LOW-to-HIGH (t OSLH ).V IL LOW Level Input Voltage 2.3–2.70.7V 2.7–3.60.8V OHHIGH Level Output Voltage2.3–3.6I OH = –100µA V CC – 0.2V2.3I OH = –8mA 1.82.7I OH = –12mA 2.23.0I OH = –18mA 2.4I OH = –24mA 2.2V OLLOW Level Output Voltage 2.3–3.6I OL = 100µA 0.2V2.3I OL = 8mA 0.62.7I OL = 12mA 0.43.0I OL = 16mA 0.4I OL = 24mA 0.55I I Input Leakage Current 2.3–3.60 ≤ V I ≤ 5.5V ±5.0µA I OFF Power-Off Leakage Current 0V I or V O = 5.5V 10µA I CC Quiescent Supply Current 2.3–3.6V I = V CC or GND 10µA 3.6V ≤ V I ≤ 5.5V ±10∆I CCIncrease in I CC per Input2.3–3.6V IH = V CC – 0.6V500µASymbolParameterT A = –40°C to +85°C, R L = 500ΩUnitsV CC = 3.3V ± 0.3V,C L = 50pFV CC = 2.7V,C L = 50pF V CC = 2.5V ± 0.2V,C L = 30pF Min.Max.Min.Max.Min.Max.t PHL , t PLHPropagation Delay1.55.5 1.56.21.56.6ns t OSHL , t OSLH Output to Output Skew (4)1.0ns74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant InputsCapacitanceV OLVQuiet Output Dynamic Valley V OL3.3C L = 50pF , V IH = 3.3V , V IL = 0V –0.8V2.5C L = 30pF , V IH = 2.5V , V IL = 0V–0.6SymbolParameterConditionsTypicalUnitsC IN Input Capacitance V CC = Open, V I = 0V or V CC 7pF C OUT Output CapacitanceV CC = 3.3V , V I = 0V or V CC8pF C PDPower Dissipation CapacitanceV CC = 3.3V , V I = 0V or V CC , f = 10MHz25pFPropagation Delay. Pulse Width and t rec Waveforms 3-STATE Output High Enable andDisable Times for Logic Setup Time, Hold Time and Recovery Time for Logict rise and t fallSymbolV CC3.3V ± 0.3V 2.7V 2.5V ± 0.2VV mi 1.5V 1.5V V CC /2 V mo 1.5V 1.5V V CC /2Reel Dimensions inches (millimeters)Tape Size A B C D N W1W2 12mm13.0 (330.0)0.059 (1.50)0.512 (13.00)0.795 (20.20) 2.165 (55.00)0.488 (12.4)0.724 (18.4)Figure 3. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" NarrowPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, MS-012,VARIATION AB,ISSUE C,B)ALL DIMENSIONS ARE IN MILLIMETERS.C)DIMENSIONS DO NOT INCLUDE MOLDFLASH OR BURRS.D)LANDPATTERN STANDARD:SOIC127P600X145-14ME)DRAWING CONFORMS TO ASME Y14.5M-1994F)DRAWING FILE NAME:M14AREV138°0°SEATING PLANEDETAIL ASCALE:20:1GAGE PLANE X 45°(1.04)0.900.500.36R0.10R0.100.500.25Figure 4. 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,Figure 5. 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.0mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify orFigure 6. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm WidePackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.C.DIMENSIONS ARE EXCLUSIVE OF BURRS,MOLD FLASH,AND TIE BAR EXTRUSIONSF.DRAWING FILE NAME:MTC14REV61.00D.DIMENSIONING AND TOLERANCES PER ANSI Y14.5M,1982R0.09minNDPATTERN STANDARD:SOP65P640X110-14M A.CONFORMS TO JEDEC REGISTRATION MO-153,VARIATION AB,REF NOTE 6B.DIMENSIONS ARE IN MILLIMETERSsubsidiaries,and is not intended to be an exhaustive list of all such trademarks.ACEx®Build it Now™CorePLUS™CROSSVOLT™CTL™Current Transfer Logic™EcoSPARK®EZSWITCH™*™®Fairchild®Fairchild Semiconductor®FACT Quiet Series™FACT®FAST®FastvCore™FlashWriter®*FPS™FRFET®Global Power Resource SMGreen FPS™Green FPS™e-Series™GTO™i-Lo™IntelliMAX™ISOPLANAR™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MillerDrive™Motion-SPM™OPTOLOGIC®OPTOPLANAR®®PDP-SPM™Power220®POWEREDGE®Power-SPM™PowerTrench®Programmable Active Droop™QFET®QS™QT Optoelectronics™Quiet Series™RapidConfigure™SMART START™SPM®STEALTH™SuperFET™SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS™SyncFET™®The Power Franchise®TinyBoost™TinyBuck™TinyLogic®TINYOPTO™TinyPower™TinyPWM™TinyWire™µSerDes™UHC®Ultra FRFET™UniFET™VCX™*EZSWITCH™and FlashWriter®are trademarks of System General Corporation,used under license by Fairchild Semiconductor. DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY,FUNCTION,OR DESIGN.FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS,NOR THE RIGHTS OF OTHERS.THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,SPECIFICALLY THE WARRANTY THEREIN,WHICH COVERS THESE PRODUCTS.LIFE SUPPORT POLICYFAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systemswhich,(a)are intended for surgical implant into the body or(b)support or sustain life,and(c)whose failure to performwhen properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury of the user.2.A critical component in any component of a life support,device,or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.PRODUCT STATUS DEFINITIONSDefinition of TermsDatasheet Identification Product Status DefinitionAdvance Information Formative or In Design This datasheet contains the design specifications for product development.Specifications may change in any manner without notice.Preliminary First Production This datasheet contains preliminary data;supplementary data will bepublished at a later date.Fairchild Semiconductor reserves the right tomake changes at any time without notice to improve design. 74LCX32 — Low Voltage Quad 2-Input OR Gate with 5V Tolerant Inputs。

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