CDCLVP1216RGZT;CDCLVP1216RGZR;CDCLVP1216EVM;中文规格书,Datasheet资料
一种W波段测云雷达中频信号采集装置
专利名称：一种W波段测云雷达中频信号采集装置专利类型：实用新型专利
发明人：郭强,谢承华,罗继成
申请号：CN202122096037.7
申请日：20210901
公开号：CN215728782U
公开日：
20220201
专利内容由知识产权出版社提供
摘要：本实用新型涉及一种W波段测云雷达中频信号采集装置，它包括模数转换模块、直接数字频率合成模块、时钟发生模块、控制/信号处理模块、光纤收发模块、电源管理模块和电平转换模块；模数转换模块与所述控制/信号处理模块的输入端连接，控制/信号处理模块的输出端与直接数字频率合成模块的输入端连接；光纤收发模块、时钟发生模块和电平转换模块与控制/信号处理模块相互连接，电源管理模块的供电输出端与控制/信号处理模块的供电输入端连接。
本实用新型利用
ADS42LB69模数转换芯片的双通道采集保证了信号的通道平衡性，及高精度、高采样率的信号采集，提高了中频信号模数转换质量为后端信号处理和雷达产品生成提供更准确的数据源。
申请人：成都远望科技有限责任公司
地址：610041 四川省成都市高新区九兴大道6号高发大厦B幢219、419室
国籍：CN
代理机构：北京天奇智新知识产权代理有限公司
代理人：王大刚
更多信息请下载全文后查看。
CDCLVP1212RHAT;CDCLVP1212RHAR;CDCLVP1212EVM;中文规格书,Datasheet资料
VVV V V V VCDCLVP1212 SCAS886B–AUGUST2009–REVISED AUGUST2011 12LVPECL Output,High-Performance Clock BufferCheck for Samples:CDCLVP1212FEATURES DESCRIPTIONThe CDCLVP1212is a highly versatile,low additive •2:12Differential Bufferjitter buffer that can generate12copies of LVPECL •Selectable Clock Inputs Through Control Pin clock outputs from one of two selectable LVPECL,•Universal Inputs Accept LVPECL,LVDS,and LVDS,or LVCMOS inputs for a variety of LVCMOS/LVTTL communication applications.It has a maximum clockfrequency up to2GHz.The CDCLVP1212features •12LVPECL Outputsan on-chip multiplexer(MUX)for selecting one of two •Maximum Clock Frequency:2GHz inputs that can be easily configured solely through a•Maximum Core Current Consumption:88mA control pin.The overall additive jitter performance isless than0.1ps,RMS from10kHz to20MHz,and •Very Low Additive Jitter:<100fs,rms in10-kHzoverall output skew is as low as25ps,making the to20-MHz Offset Rangedevice a perfect choice for use in demanding • 2.375-V to3.6-V Device Power Supply applications.•Maximum Propagation Delay:550psThe CDCLVP1212clock buffer distributes one of two •Maximum Output Skew:25ps selectable clock inputs(IN0,IN1)to12pairs of •LVPECL Reference Voltage,V AC_REF,Available differential LVPECL clock outputs(OUT0,OUT11)with minimum skew for clock distribution.The for Capacitive-Coupled InputsCDCLVP1212can accept two clock sources into an •Industrial Temperature Range:–40°C to+85°Cinput multiplexer.The inputs can be LVPECL,LVDS,•ESD Protection Exceeds2kV(HBM)or LVCMOS/LVTTL.•Available in6-mm×6-mm QFN-40(RHA)The CDCLVP1212is specifically designed for driving Package50-Ωtransmission lines.When driving the inputs insingle-ended mode,the LVPECL bias voltage APPLICATIONS(VAC_REF)should be applied to the unused negativeinput pin.However,for high-speed performance up to •Wireless Communications2GHz,differential mode is strongly recommended.•Telecommunications/NetworkingThe CDCLVP1212is packaged in a small40-pin,•Medical Imaging6-mm x6-mm QFN package and is characterized for •Test and Measurement Equipment operation from–40°C to+85°C.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.PRODUCTION DATA information is current as of publication date.Copyright©2009–2011,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.CDCLVP1212SCAS886B–AUGUST2009–REVISED This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.AVAILABLE OPTIONS(1)T A PACKAGED DEVICES FEATURESCDCLVP1212RHAT40-pin QFN(RHA)package,small tape and reel –40°C to+85°CCDCLVP1212RHAR40-pin QFN(RHA)package,tape and reel(1)For the most current specifications and package information,see the Package Option Addendum located at the end of this data sheet orrefer to our web site at .ABSOLUTE MAXIMUM RATINGS(1)Over operating free-air temperature range(unless otherwise noted).CDCLVP1212UNITV CC Supply voltage range(2)–0.5to4.6VV IN Input voltage range(3)–0.5to V CC+0.5VV OUT Output voltage range(3)–0.5to V CC+0.5VI IN Input current20mAI OUT Output current50mAT A Specified free-air temperature range(no airflow)–40to+85°CT STG Storage temperature range–65to+150°CT J Maximum junction temperature+125°CESD Electrostatic discharge(HBM)2kV (1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated is not implied.Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.(2)All supply voltages must be supplied simultaneously.(3)The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed. RECOMMENDED OPERATING CONDITIONSOver operating free-air temperature range(unless otherwise noted).CDCLVP1212PARAMETER MIN TYP MAX UNITV CC Supply voltage 2.375 2.50/3.30 3.60VT A Ambient temperature–40+85°C PACKAGE DISSIPATION RATINGS(1)(2)VALUETEST4×4VIASPARAMETER CONDITIONS ON PAD UNIT0LFM36.1°C/WθJA Thermal resistance,junction-to-ambient150LFM30.2°C/W400LFM28.2°C/WθJP(3)Thermal resistance,junction-to-pad 3.58°C/W(1)The package thermal resistance is calculated in accordance with JESD51and JEDEC2S2P(high-K board).(2)Connected to GND with16thermal vias(0.3-mm diameter).(3)θJP(junction-to-pad)is used for the QFN package,because the primary heat flow is from the junction to the GND pad of the QFNpackage.2Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1212CDCLVP1212 SCAS886B–AUGUST2009–REVISED AUGUST2011ELECTRICAL CHARACTERISTICS:LVCMOS Input(1)At V CC=2.375V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1212PARAMETER TEST CONDITIONS MIN TYP MAX UNITf IN Input frequency200MHzExternal threshold voltage applied toV th Input threshold voltage 1.1 1.8Vcomplementary inputV IH Input high voltage V th+0.1V CC VV IL Input low voltage0V th–0.1VI IH Input high current V CC=3.6V,V IH=3.6V40μAI IL Input low current V CC=3.6V,V IL=0V–40μAΔV/ΔT Input edge rate20%to80% 1.5V/nsI CAP Input capacitance5pF(1)Figure3and Figure4show dc test setup.ELECTRICAL CHARACTERISTICS:Differential Input(1)At V CC=2.375V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1212PARAMETER TEST CONDITIONS MIN TYP MAX UNITf IN Input frequency Clock input2000MHzf IN≤1.5GHz0.1 1.5VV IN,DIFF,PP Differential input peak-peak voltage1.5GHz≤f IN≤2GHz0.2 1.5VV ICM Input common-mode level 1.0V CC–0.3VI IH Input high current V CC=3.6V,V IH=3.6V40μAI IL Input low current V CC=3.6V,V IL=0V–40μAΔV/ΔT Input edge rate20%to80% 1.5V/nsI CAP Input capacitance5pF(1)Figure5and Figure6show dc test setup.Figure7shows ac test setup.Copyright©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback3Product Folder Link(s):CDCLVP1212CDCLVP1212SCAS886B–AUGUST2009–REVISED ELECTRICAL CHARACTERISTICS:LVPECL Output(1)At V CC=2.375V to2.625V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1212PARAMETER TEST CONDITIONS MIN TYP MAX UNITV OH Output high voltage V CC–1.26V CC–0.9VV OL Output low voltage V CC–1.7V CC–1.3VV OUT,DIFF,PP Differential output peak-peak voltage f IN≤2GHz0.5 1.35VV AC_REF Input bias voltage(2)I AC_REF=2mA V CC–1.6V CC–1.1VV IN,DIFF,PP=0.1V550pst PD Propagation delayV IN,DIFF,PP=0.3V550pst SK,PP Part-to-part skew150pst SK,O Output skew25psCrossing-point-to-crossing-point distortion,t SK,P Pulse skew(with50%duty cycle input)–5050psf OUT=100MHzf OUT=100MHz,V IN,SE=V CC,V th=1.25V,0.11ps,RMS10kHz to20MHzf OUT=100MHz,V IN,SE=0.9V,0.128ps,RMSV th=1.1V,10kHz to20MHzRandom additive jitter(with50%duty f OUT=2GHz,V IN,DIFF,PP=0.2V,t RJIT0.053ps,RMS cycle input)V ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=0.15V,0.093ps,RMSV ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=1V,0.092ps,RMSV ICM=1V,10kHz to20MHzt R/t F Output rise/fall time20%to80%200psI EE Supply internal current Outputs unterminated88mAI CC Output and internal supply current All outputs terminated,50Ωto V CC–2468mA(1)Figure8and Figure9show dc and ac test setup.(2)Internally generated bias voltage(V AC_REF)is for3.3-V operation only.It is recommended to apply externally generated bias voltage forV CC<3.0V.4Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1212CDCLVP1212 SCAS886B–AUGUST2009–REVISED AUGUST2011ELECTRICAL CHARACTERISTICS:LVPECL Output(1)At V CC=3.0V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1212PARAMETER TEST CONDITIONS MIN TYP MAX UNITV OH Output high voltage V CC–1.26V CC–0.9VV OL Output low voltage V CC–1.7V CC–1.3VV OUT,DIFF,PP Differential output peak-peak voltage f IN≤2GHz0.65 1.35VV AC_REF Input bias voltage I AC_REF=2mA V CC–1.6V CC–1.1VV IN,DIFF,PP=0.1V550pst PD Propagation delayV IN,DIFF,PP=0.3V550pst SK,PP Part-to-part skew150pst SK,O Output skew25psCrossing-point-to-crossing-point distortion,t SK,P Pulse skew(with50%duty cycle input)–5050psf OUT=100MHzf OUT=100MHz,V IN,SE=V CC,V th=1.65V,0.101ps,RMS10kHz to20MHzf OUT=100MHz,V IN,SE=0.9V,0.130ps,RMSV th=1.1V,10kHz to20MHzRandom additive jitter(with50%duty f OUT=2GHz,V IN,DIFF,PP=0.2V,t RJIT0.069ps,RMS cycle input)V ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=0.15V,0.094ps,RMSV ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=1V,0.094ps,RMSV ICM=1V,10kHz to20MHzt R/t F Output rise/fall time20%to80%200psI EE Supply internal current Outputs unterminated88mAI CC Output and internal supply current All outputs terminated,50Ωto V CC–2468mA(1)Figure8and Figure9show dc and ac test setup.Copyright©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback5Product Folder Link(s):CDCLVP1212CDCLVP1212Thermal Pad(1)12345678910I N _S E LI N P 1I N N 1N CV C CV C CV A C _R E FI N N 0I N P 0OUTN3OUTP3OUTN2OUTP2OUTN1OUTP1OUTN0OUTP0V CCV CC 20191817161514131211O U T P 7O U T P 5G N DO U T P 6O U T P 4O U T N 6O U T N 4O U T N 7O U T N 5G N D 30292827262524232221V CC OUTP8OUTN8OUTP9OUTN9OUTP10OUTN10OUTP11OUTN11V CC31323334353637383940N C CDCLVP1212SCAS886B –AUGUST 2009–REVISED AUGUST 2011PIN CONFIGURATIONRHA PACKAGEQFN-40(TOP VIEW)(1)Thermal pad must be soldered to ground.6Submit Documentation FeedbackCopyright ©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1212CDCLVP1212 SCAS886B–AUGUST2009–REVISED AUGUST2011 PIN DESCRIPTIONSCDCLVP1212Pin DescriptionsTERMINAL TERMINAL PULL-UP/NAME NO.TYPE PULLDOWN DESCRIPTION5,6,11,20,V CC Power— 2.5-V/3.3-V supplies for the device31,40GND21,30Ground—Device groundsINP0,INN09,8Input—Differential input pair or single-ended input.Unused input pair can be left floating.Redundant differential input pair or single-ended input.Unused input pair can be INP1,INN12,3Input—left floating.OUTP11,38,39Output—Differential LVPECL output pair no.11.Unused output pair can be left floating.OUTN11OUTP10,36,37Output—Differential LVPECL output pair no.10.Unused output pair can be left floating.OUTN10OUTP9,34,35Output—Differential LVPECL output pair no.9.Unused output pair can be left floating.OUTN9OUTP8,32,33Output—Differential LVPECL output pair no.8.Unused output pair can be left floating.OUTN8OUTP7,28,29Output—Differential LVPECL output pair no.7.Unused output pair can be left floating.OUTN7OUTP6,26,27Output—Differential LVPECL output pair no.6.Unused output pair can be left floating.OUTN6OUTP5,24,25Output—Differential LVPECL output pair no.5.Unused output pair can be left floating.OUTN5OUTP4,22,23Output—Differential LVPECL output pair no.4.Unused output pair can be left floating.OUTN4OUTP3,18,19Output—Differential LVPECL output pair no.3.Unused output pair can be left floating.OUTN3OUTP2,16,17Output—Differential LVPECL output pair no.2.Unused output pair can be left floating.OUTN2OUTP1,14,15Output—Differential LVPECL output pair no.1.Unused output pair can be left floating.OUTN1OUTP012,13Output—Differential LVPECL output pair no.0.Unused output pair can be left floating.OUTN0PulldownIN_SEL1Input MUX select input for input choice(see Table2)(see Table1)Bias voltage output for capacitive coupled inputs.Do not use V AC_REF at V CC< V AC_REF7Output— 3.0V.If used,it is recommended to use a0.1-μF capacitor to GND on this pin.The output current is limited to2mA.NC4,10——Do not connectTable1.Pin CharacteristicsPARAMETER MIN TYP MAX UNITSR PULLDOWN Input pulldown resistor150kΩTable2.Input Selection TableIN_SEL ACTIVE CLOCK INPUT0INP0,INN01INP1,INN1Copyright©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback7Product Folder Link(s):CDCLVP12120.20.40.60.81.01.21.41.62.01.8Frequency (GHz)1.00.90.80.70.60.50.4D i f f e r e n t i a l O u t p u t P e a k -t o -P e a k V o l t a g e (V)0.20.40.60.81.01.21.41.62.01.8Frequency (GHz)1.11.21.31.00.90.80.70.60.50.4D i f f e r e n t i a l O u t p u t P e a k -t o -P e a k V o l t a g e (V )CDCLVP1212SCAS886B –AUGUST 2009–REVISED AUGUST 2011TYPICAL CHARACTERISTICSAt T A =–40°C to +85°C (unless otherwise noted).DIFFERENTIAL OUTPUT PEAK-TO-PEAK VOLTAGEvs FREQUENCYFigure 1.DIFFERENTIAL OUTPUT PEAK-TO-PEAK VOLTAGEvs FREQUENCYFigure 2.8Submit Documentation FeedbackCopyright ©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1212VV V thV IHmaxV ILmaxV IHminV ILminV IHV ILV th V V V GNDV CCV V CDCLVP1212SCAS886B –AUGUST 2009–REVISED AUGUST 2011TEST CONFIGURATIONSThis section describes the function of each block for the CDCLVP1212.Figure 3through Figure 9illustrate how the device should be set up for a variety of test configurations.Figure 3.DC-Coupled LVCMOS Input During Device TestFigure 4.V th Variation over LVCMOS LevelsFigure 5.DC-Coupled LVPECL Input During Device TestCopyright ©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback9Product Folder Link(s):CDCLVP1212CDCLVP1212SCAS886B–AUGUST2009–REVISED Figure6.DC-Coupled LVDS Input During Device TestV VFigure7.AC-Coupled Differential Input to DeviceFigure8.LVPECL Output DC Configuration During Device TestFigure9.LVPECL Output AC Configuration During Device Test10Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1212分销商库存信息:TICDCLVP1212RHAT CDCLVP1212RHAR CDCLVP1212EVM。
NCP1216ANCP1252做正激设计应用
NCP1216ANCP1252做正激设计应用正激设计应用是一种广泛应用于电源系统中的设计技术。
在正激设计中，NCP1216A和NCP1252是两款常用的控制器芯片，它们可以实现高效率、可靠性和稳定性的电源系统设计。
NCP1216A是一款可编程的固定频率电源因子校正、切换策略双输出PWM控制器。
该芯片配备了高性能的16位XVID (eXtreme Voltage Interface and Drive) 驱动引脚，可在宽范围的工作电压下实现高达700 VDC的耐压能力。
NCP1216A内置了多种保护功能，如过功率保护、过温保护和过电压保护，以确保电源系统的稳定和安全性。
此外，NCP1216A还具有休眠模式，可在轻载时降低功率消耗。
NCP1252是一款可编程高性能的固定频率电源因子校正PWM控制器。
与NCP1216A相比，NCP1252具有更高的集成度和更强大的功能。
它采用了嵌入I2C总线数字接口和极高的模拟内容，能够有效控制各种类型的电源因子校正。
该芯片还内置了完整的防护机制，如过温保护、过流保护和过电压保护，以确保电源系统的稳定性和可靠性。
在使用NCP1216A和NCP1252进行正激设计应用时，需要先确定电源系统的需求和规格。
这包括输入电压范围、输出电压和电流、负载特性等。
根据这些参数，可以选择合适的NCP1216A或NCP1252芯片，并进行相应的电路设计。
在设计中，需要考虑的几个关键因素包括电感、电容和开关管的选型。
选择适当的电感和电容可以确保电源系统具有良好的抗干扰性和稳定性。
选择合适的开关管可以提供高效率和可靠性。
设计电路时，需要根据NCP1216A或NCP1252的数据手册提供的应用指导和推荐电路来进行。
这些电路包括输入滤波器、电源因子校正电路、PWM控制电路等。
同时，电源系统的布局和连接也需要遵循一定的规范，以确保信号的可靠传输和电子部件的散热。
在设计完成后，需要进行严格的测试和验证。
16路隔离语音控制器说明书 V1.1 (型号：YMG16) 秦皇岛千目电子有限公司
16路隔离语音控制器说明书V1.1(型号：YMG16)秦皇岛千目电子有限公司电话：************传真：************/1.产品特性 (2)2.产品图片、接口介绍 (2)2.1产品外形和接口图片 (2)2.2接口介绍 (3)2.3产品尺寸图 (3)3.音频信息下载 (4)3.1准备音频文件 (4)3.1.1软件合成音频文件 (4)3.1.2音频文件转换MP3格式 (4)3.1.3文件夹操作 (4)3.1.4文件名操作 (4)3.2下载语音 (4)3.2.1USB口连接PC (5)3.2.2产生U盘 (5)3.2.3格式化U盘 (5)3.2.4复制文件夹 (5)3.2.5下载完成 (5)4.控制方式 (6)4.1开关控制-16路开关 (6)4.1.1接线方式 (6)4.1.2控制方式 (6)4.2通讯控制-RS485 (7)4.2.1普通指令格式 (7)4.2.2Modbus-RTU指令格式 (8)4.3无线控制-遥控或发射模块（需扩展） (8)5.参数设置 (9)5.1硬件连接 (9)5.2参数设置 (9)5.2.1统一设置 (9)5.2.2分路设置 (10)5.3放音测试 (10)6.技术支持及联系方式 (10)语音控制器说明书(型号：YMG16)YMG16语音控制器是我公司推出的一款新型语音产品。
具有稳定可靠、可重复录音、宽电源电压、外部音量调节、支持背景音乐播放功能等特点。
可广泛应用于工业控制、安防报警、语音提示等场合。
1.产品特性●16路光耦隔离输入控制信号，可以控制16路语音播放。
●带485通讯，可以通过指令控制最多128段语音播放。
●485通讯支持Modbus-RTU协议，方便与其他设备进行组网调试。
●MP3格式语音存储，可播放提示语音和音乐，音质更好。
●TF格式存储卡，最大支持16G存储。
机器自带128M存储卡。
●USB口直接下载语音信息，操作方便。
●板载标准3.5MM音频孔，立体声输出，可外接音箱、音柱等功放设备。
复位IC,电源管理IC系列,替代型号及参数
复位IC，电源管理IC系列，替代型号及参数复位ICPJ809 series(2.63/2.93/3.08/4.0/4.38/4.63V）PJ810 series(2.63/2.93/3.08/4.0/4.38/4.63V）PJ705/706/707/708/813EL Driver ICPJ6540C(驱动面积20-40 CM2)PJ6540S(驱动面积20-40 CM2)PJ6540TS(驱动面积20-40 CM2)PJ6543S/TS(驱动面积50-100 CM2)高电压检测ICPJ6101C/NXXXMR series(1.1-6.0V,每隔0.1有型号）LCD Driver ICSC1904(驱动点数19X4)SC1621(驱动点数32X4)SC1621(驱动点数32X4)SC1622(驱动点数32X8)SC1622(驱动点数32X8)SL4808(驱动点数48X8)SC1626(驱动点数48X16)SC1626(驱动点数48X16)SC6523(驱动点数52X3)PJ8566S(驱动点数32X4)小功率AB类音频放大ICPJ4890(1W)PJ4990(1.25W)PJ4871(1.5W)PJ4871(PP)(底部带散热片,1.5W)TDA2822(12V,2X1W)PJ2822(12V,2X1W)TDA2822(9V,2X1W)PJ2822(9V,2X1W)TDA2822(6V,2X1W)LM386中功率AB类音频放大ICPJ4888(2X2.1W,带3D混响功能和立体声耳机功能)PJ4818(2X2.2W,带立体声耳机功能)PJ4088(2X2.2W,带立体声耳机功能)PJ4863MTE(2X2.2W)PJ4863S/P(2X2.2W)CSC4863S(2X2.2W)TEA2025(12V,2X2.5W)TEA2025(9V,2X2.5W)PJ4836(2X2W,带重低音)PJ4836(2X2W,带重低音)TDA7496(2X2W)D1517P(2X4W)TA8227(2X3W)KA2206(2X2.3W)APA2068((2X2.6W,带音量控制,底部带散热片)大功率AB类音频放大ICTDA2030A(18W)LM1875T/L(20W)TDA7265(2X25W)YD7377(2X30W或4X6W)D类音频放大ICPJ2005(1.4W,单声道,D类音频放大)PJ2010(1.3W,单声道,D类音频放大)TPA2012D2(2X1.4W,立体声,D类音频放大)PJ2012(2X1.5W,立体声,D类音频放大)AX2012(2X1.4W,立体声,D类音频放大)PJ8008(2X1.5W,立体声,D类音频放大)耳机音频放大ICPJ4800(2X290mW,立体声耳机放大IC)PJ4808(2X105mW,立体声耳机放大IC)PJ4809(2X105mW,高电平关断,立体声耳机放大IC)PJ8608(2X105mW,立体声耳机放大IC)PJ4880(2X250mW,立体声耳机放大IC)PJ7000(2X40mW,立体声耳机放大IC)LM4853M(2X300mW立体声耳机放大或1.5W单声道耳机放大 IC)全差分AB类音频放大ICPJ4898(全差分,1W)PJA6211(全差分,1.25W)PJA6203(全差分,1.25W)音量音质处理ICCSC2313(三组立体声输入音质处理IC,6V-10V.)CSC2314(四组立体声输入音质处理IC,6V-10V.)D2322(6通道AV前置控制IC,5-12V.)D2323(6通道音响输入选择IC,4.5-12V.)CSC2256(双声道音量控制IC,2.5V-12V.)PT2258(六声道音量控制IC,5V-10V.)M62429(双声道音量控制IC,5V.)TC9153(音量控制IC,4.5-12V.)混响处理ICCD2399单片调频调幅收音ICCD9088(单片电调谐调频收音IC)CD1191(单片调频调幅收音IC)TA2003(单片调频调幅收音IC)YT2111(单片调频调幅立体声收音IC)YD2149(单片调频调幅收音IC/3V工作)并联白灯背光ICPJ7110(并3路白灯,每路20mA)PJ7111(并4路白灯,每路20mA)PJ5920(并3路白灯,每路20mA)PJ5921(并4路白灯,每路20mA)PJ9300(并4路白灯,每路20mA)PJ3200(并5路白灯,每路20mA)PJ2133(并4路白灯,每路可达30mA)PJ60230(并5路白灯,每路可达30mA)PJ9364(并4路白灯,每路可达20mA)PJ9362(并4路白灯,每路可达30mA)PJ9360(并4路白灯,每路可达30mA)PJ3114(并6路白灯,每路20mA)霍尔ICPJ90248S/TPJ177A/B/CPJ1881S/TPJ732S/TPJ211A/B/CTPJ41S/TPJ49ETPJ40APJ5881PJ3144RS232接口ICMAX232锂电保护ICPJ5426AB(4.3V过充保护电压)PJ5426BB(4.28V过充保护电压)PJ2188(4.3V过充保护电压,内置MOS的2合1锂电保护IC)锂电保护板所用MOS管PJ9926SPJ9926TPJ8205T(新版样品)PJ8205MR(新版样品)PJ5N20VPJ8810TPJ8810MRPJ8822TPJ8822MRPJ8818TPJ8818MRPJ8820MRPJ8208PJ6968PJ8209MR单节锂电充电ICPJ4054MR(800mA)PJ4054DR(800mA)PJ4054PR(1A)PJ4056MR(800mA,带双灯指示功能)PJ4060C(250mA,双灯指示功能,其中一个灯为七彩灯指示) PJ4060D(250mA,双灯指示功能)PJ4050S(500mA)PJ2051S(1A)PJ4100(1A)VM7205M/S(1A,须外接场效应管)PJ9501A/B(1A,须外接场效应管,B:4.2V,A:4.1V,一般推B版的)单节锂电/镍氢电池/铅酸电池线性充电ICPJ4062S(500mA,4.2V充满,充电电压可调,也可充镍氢/铅酸电池) PJ4066(1A,4.2V充满,充电电压可调,也可充镍氢/铅酸电池)单节磷酸铁锂电/镍氢电池/铅酸电池线性充电ICPJ4058S(500mA,3.6V充满,充电电压可调,也可充镍氢/铅酸电池) PJ4059(1A,3.6V充满,充电电压可调,也可充镍氢/铅酸电池)开关电源绿色模式PWM控制ICPJ6848M/PPJ6850M/P/SPJ6853M/PPJ6842M/P/SPJ6860(15W)PJ2530A(5W)PJ2603P(6W,内置700V三极管)PJ2604P(6W-8W,内置700V三极管)PJ2605S(3.8W-4.5W,内置700V三极管)PJ2607P(18W,须外加高压功率三极管)PJ8022P(20W以下,内置700VMOS管,输入电压9-38V,耐压50V) PJ8012P(13W以下,内置730VMOS管,输入电压10-39V,耐压50V) PJ1203(5-120W,输入电压耐压16V)I2C实时时钟/日历ICPJ8563S/P/T/MPJ1302S/PAM/FM 频率显示驱动ICSC3610SC3610D马达驱动ICD5898(PDVD 含双路DC-DC 4通道马达驱动IC)D5668(DVD 5通道马达驱动IC)D5868(DVD 5通道马达驱动IC)D5888(DVD 5通道马达驱动IC)D5954(DVD/PDVD/Car DVD/CD机 4通道马达驱动IC)D9258(DVD/PDVD/Car DVD/CD机 4通道马达驱动IC)D9259(DVD/PDVD/Car DVD/CD机 5通道马达驱动IC)YT5901(CD机4通道马达驱动IC)PJ6651AN6650(马达稳速IC)PJ7010R(马达正反转控制驱动IC,1-2A驱动电流)PJ9110(马达正反转控制驱动IC,0.8A驱动电流)PJ9120(马达正反转控制驱动IC,3A驱动电流,须加三级管扩流) PJ9130(直流马达正反转及加速驱动IC,3A驱动电流,须加三级管扩流)锁相环ICAT9256AT9257LC72131电阻式触摸屏控制ICPJ2046PJ2003电容式触摸按键ICTF601(6键输入,工作电压2.5-5.5V)TF401(4键输入,工作电压2.5-5.5V)TF201(2键输入,工作电压2.5-5.5V)TF101(1键输入,工作电压2.5-5.5V)通用运算放大器ICLM324S(四运放/32V)LM324P(四运放/32V)LM324S(四运放/18V)LM324P(四运放/18V)LM358S/P(双运放)JRC4558(双运放)低压运算放大器ICPJ3414(双运放)PJ4510(双运放)PJ2107(单运放)低压低功耗运算放大器ICS324(四运放)S358(双运放)低噪声低失真运算放大器ICPJ4580(双运放)PJ4560(双运放)PJ2568(双运放)大电流运算放大器ICPJ4556(双运放)高带宽高转换速率运算放大器ICPJ2137(双运放)低漂移高精度运算放大器ICOP07(单运放)中频接收ICMC3361通话免提ICMC34018PJ34118PJ34119通话话音网络ICTEA1062/A(A:低电平静噪)压扩电路ICTA31101F(语音压扩电路IC)SL5015(压扩电路IC)SL5020(低压压扩电路IC)DC DC变换ICPJ34063A(1.5A)MC34063B(0.8A)PJ34063(0.8A)三端可调正电源稳压ICLM317L(100mA)LM317T(1.5A)电流型PWM控制ICKA3842S/PKA3843S/P固定频率PWM控制ICKA7500PKA7500STL494PTL494SPJ9741电压比较器ICLM339S(4电压比较器)LM339P(4电压比较器)LM393S/P(双电压比较器)LED显示屏驱动ICPJ62726SS/SO/SP(16位恒流LED驱动IC,每路输出4-90mA) PJ6024(16位恒流LED驱动IC,每路输出3-45mA)LED数码管显示驱动IC(移位寄存器IC)PJ74HC164PJ74HC164PJ74HC595门电路ICPJ74HC244(8路3态缓冲驱动IC)PJ74HC04(六反相器IC)PJ74HC14(六反相施密特触发器IC)SC74HC245(总线驱动双向三态门电路IC)SC74HC138(3-8译码器IC)SC74HC27(四总线收发器IC)SC74HC373(八D锁存器IC)SC74HC393(双4位二进制计数器IC)TFT-LCD 时序控制ICPVI1004DTFT-LCD 信号处理ICD3031LCD视频切换开关ICPI5V330定时器ICNE555立体声D/A转换ICPJ433416位音频D/A转换ICPJ8211CCFL冷光阴极灯控制ICPJ3105恒流恒压控制ICPJ1051MR2A DDR 电源ICPJ9174七路达林顿驱动器阵列ULN2003(七路达林顿驱动器阵列,最大驱动电流可达500MA) ULN2003(七路达林顿驱动器阵列,最大驱动电流可达500MA)模拟开关ICPJ3157(高速单刀双掷模拟开关IC)电源开关ICPJ9701双卡控制ICPJ6188(SPI接口双卡控制IC)4路ESD保护ICPJ3205MRSOT23SOT23SOP8/DIP8 DiceSOP8TSSOP8SOP8/TSSOP8 SOT23DiceDiceSSOP48DiceQFP64DiceDiceQFP100QFP64/LQFP64 LQFP44 MSOP8SMD9(=CSP9) SOP8/DIP8 SOP8(PP)DIP8SOP8DIP8SOP8SOP8/DIP8 SOP8/DIP8 QFN24QFN24QFN16 TSSOP20(PP) SOP16/DIP16 SOP16WSOP16/DIP16 SOP16/DIP16 TSSOP28(PP) HSOP28DIP20/SOP20 DIP18FDIP12SOP16-PPHZIP5TO-220B-5/TO-220-5HZIP11ZIP15QFN8/MSOP8SMD9(=CSP9)/QFN8(=DFN8)QFN20/WCSP16QFN20/WCSP16SOP16WTSSOP20SOP8MSOP8MSOP8SOP8SOP8/DIP8SSOP10MSOP10MSOP10/SMD9(=CSP9)MSOP8/SMD9(=CSP9)SMD9(=CSP9)/QFN8(=DFN8)/MSOP8 SOP28/DIP28SOP28/DIP28SOP28/DIP28SOP28/DIP28SOP16/SOP16WDIP20SOP8/DIP8DIP16DIP16/SOP16SOP16SOP28DIP16/SSOP16SDIP24/SSOP24SDIP24/SSOP24SOT-26MSOP8MSOP8SOT-26SOT-26QFN16QFN16QFN16QFN16QFN16QFN16SOT-23/TO-92 SOT-23/TO-92 SOT-23/TO-92 SOT-23/TO-92 TO-94SOT-23/TO-92 TO-92TO-92/SOT-23 TO-92/SOT-23 TO-92/SOT-23SOP16/DIP16SOT-26SOT-26 TSSOP8SOP8TSOP8TSSOP8 TSSOP6(SOT26) TSSOP8 TSSOP8 TSSOP6(SOT26) TSSOP8 TSSOP6(SOT26) TSSOP8 TSSOP6(SOT26) TSSOP6(SOT26) TSSOP8 TSSOP8 TSSOP6(SOT26) SOT-25DFN10SOT-89-5SOT-26SOT-26SOT-26SOP8SOP8DFN10MSOP8/SOP8MSOP8SOP8DFN10SOP8DFN10SOT-26/DIP8SOT-26/DIP8/SOP8SOT-26/DIP8SOT-26/DIP8/SOP8TO-92TO-92DIP8DIP8SOP8DIP8DIP8DIP8SOP8SOP8/DIP8/TSSOP8/MSOP8 SOP8/DIP8DiceCOB(SOP36)HSOP34HSOP28HSOP28HSOP28HSOP28HSOP28HSOP28QFP44TO-126DIP8SOP8/DIP8SOP8/DIP8SOP8/DIP8DIP16SOP16/DIP16 SOP20/DIP20 DIP22/MFP22QFN16/TSSOP16 TSSOP16SSOP20SOP14SOP8SOP8SOP14DIP14SOP14DIP14SOP8/DIP8 SOP8/DIP8 SOP8/DIP8 SOP8/DIP8 SOT-25/SOP8SOP14/DIP14 SOP8/DIP8 SOP8/DIP8 SOP8/DIP8 SOP8/DIP8SOP8/DIP8SOP8/DIP8SOP8/DIP8SOP16/DIP16SOP28/DIP28 SOP28/DIP28 SOP8/DIP8DIP16SOP16SOP20/DIP20SOP14/DIP14SOP8/DIP8SOP8/DIP8DIP8TO-92TO-220SOP8/DIP8SOP8/DIP8DIP16SOP16DIP16SOP16SSOP16/SOP16SOP14DIP14SOP8/DIP8SSOP24/SOP24/SDIP24 SSOP24/SOP24/QFN24 DIP14（插片）SOP14（贴片）SOP16SOP20SOP14SOP14SOP20SOP16SOP14DIP20DIP14QFP64QFP48SSOP16SOP8/DIP8SOP8/DIP8 SOP8 SSOP20 SOT-26 SOP8DIP16 SOP16 SOT-26 SOT-25 QFN20 SOT-26MAX809/IMP809 seriesMAX810/IMP810 seriesMAX705/706/707/708/813/IMP705/706/707/708/813 series 兼容SM8141兼容SM8141兼容SM8141兼容SM8142XC6101FC(FN)/XC6101CC(CN) seriesHT1621/SL3204HT1621/SL3204HT1622/SL3208HT1622/SL3208HT1623HT1626/SL4816HT1626/SL4816PT6523/SC75823PCF8566LM4890/LM4889/APA0711/NCP2890/PT2366LM4890/LM4889/LM4990/NCP2990LM4871LM4871TDA2822/KA2209TDA2822/KA2209TDA2822/KA2209TDA2822/KA2209TDA2822/KA2209LM386LM4888LM4818/SN4188SN4088/LPA4911LM4863MTELM4863LM4863TEA2025TEA2025LM4836LM4836TDA1517APA2068/G1450TPA2005TPA2010/NCP2820/TS4962/EUA2010/A7013/LM4670/1/3/5/APA2010/PT2333 LM4674TPA2012TPA2012TMPA2155PSTDA1308/LM4800/PT2308/APA4800LM4808LM4809LM4808LM4880/HT82V735FAN7000LM4898/LM4894TPA6211/TPA6204TPA6203PT2313/SC7313PT2314/SC7314PT2322PT2323PT2256PT2258M62429TC9153PT2399TDA9088/TDA7088/TDA1088CXA1191TA2003TA2111TA2149AMC7110AMC7111G5920G5921RT9300LTC3200/AAT3110/RT9361/AAT1501/AIC1848CP2133/FAN5616TPS60230RT9364RT9362RT9360/SC604/CAT3406/PAM2701AAT3114MLX90248/A180/A3212/TLE4913/EW6672ATC177/ATS177US1881EW732/EW512/DN6851FTC211/FTS211SS41/SS400/US1881UA/UGN3175/77UA/UGN3075/77UA/A3132/33/34UA/HAL105/115/125 SS49E/AH41ESS40AUS5881A3144/UGN3140/2/UGS3140/2/A3141/2/3DW01+/CS213/R5426/DW01DW01+/CS213/R5426/DW01兼容CR6002CEM9926/APM9926/AP9926/AO8822/AO8810CEM9926/APM9926/AP9926/AO8822/AO8810CEM8205/APM8205/AP8205/AO8205CEM8205/APM8205/AP8205/AO82055N20VAO8810AO8810AO8822AO8822AO8818AO8818AO8820AO8208APM6968AO8209LTC4054ES5/MCP73831-2(SOT-25)/MCP73832-2(SOT-25)/OCP8020LTC4054ES5/MCP73831-2/MCP73832-2/OCP8020LTC4054ES5/MCP73831-2/MCP73832-2)/OCP8020LTC4054ES5/MCP73831-2(SOT-25)/MCP73832-2(SOT-25)/OCP8020VA7205/VA7202RT9501SG6848/LD7550/OB2262SG6850/LD7550/OB2262/SG5701/SG5848SG6851/LD7535/OB2263/SG6848/SG6849/SG5701/SG5848/LD7550/OB2262/OB2278/OB2279 SG6841/SG6842/LD7552/OB2268/OB2269ACT30/AP3700ACT30/AP3700THX202THX203THX208THX201Viper22Viper12NCP1203PCF8563/PT7C4337DS1302/HT1380/HT1381AM5898AM5668AM5868AM5888BA5954KA9258KA9259BA5901AN6651LG7010LG9110LG9130TC9256/PT9256TC9257/PT9257TSC2046/ADS7846/MT6301/AK4182/ADS7843 TSC2003LM4558/JRC4558NJM3414NJM4510NJM2107SGM324/LMV324SGM358/LMV358NJM4580NJM4560NJM2568NJM4556NJM2137OP07DBL5018/SL5018SC34018MC34118/SC34118MC34119/SC34119SL5015SL5020MC34063AMC34063BLM3842LM3843TL494TL494BA9741/TL1451/SP9741/A1250/AP2001/FP1451 TB62726/MBI5026MBI502474HC16474HC16474HC59574HC24474HC0474HC1474HC24574HC13874HC2774HC37374HC393IR3Y31CS4334PT8211/TDA1311/HT82V731BIT3105TSM1051/SL71051/BD6550G/NJM2336 RT9174ULN2003ULN2003SGM3157RT9701MT6302MAX3205/SRV05-4。
Victron MultiPlus 2 双功能储能适配器说明书
PV StringsPV Panels in seriesMain Switch BoardPV String Over current Protection DC isolationL1N EPV seriesPV seriesL1NEINAC1 OUTSolar Inverter Charger Victron Mulitplus2L1 MasterMPPT RS450-100DC OUTAC loads Dist boardInput and Outputs L1Solar SystemATS Switched DesignRD Electronics & ElectricalHouse LoadsRaspi GX ControllerCTs L1VictronxM C B 32 AGenset SignalATSL NLoad N = Normal Grid L = Load Supply E = Inverter supplyRemote start Genset OptionBatt 48v 21kWDC MCB 125AmpVE BusN1-A N2-AE2-BE1-BMain Supply Switch1 Phase Supply from GridEARTHL1NMEN 1 Phase Grid MeteringWh MeterMain Supply fuses 63AL NxSPDx125A MCB DC MCB 100AmpxxXX XXControlAuto or ManualControlxM C B 32 AL1NEAC1 OUTL1NEAC1 OUTFronius 3Kw Grid-tieHuawei 5Kw Grid-tieCTs L1I - OATS Control 520N2 4 6 81357GenSet 1phaseGenset optionN L1WShop Feed SubNL1E1-B = Emergency power supplyN1-A = Normal power supplyE2-B = Emergency power supply neutral N2-A = Normal power supply neutralLINK ?CTs L1FroniusInput and Outputs L1AC IsolatexMCB 20 AManualTransfer SWREV DESCRIPTION DATEPROJECTCLIENTDESIGN:CHECKED:DRAWING TITLEDRAWN:DRG DATE:PROJECT NUMBER:DRG No:SCALE:SHT No:NOTES:RD Electronics & ElectricalEngineering & Projects 11 Selwyn Rd, Rotorua, 3010New Zealand Ph 07 346043MOB 027*******APPROVED:SHEET:REVISION:COPYRIGHTRD Electronics & Electrical Ltd 2022UNITS:Rob Duthie RD11/04/2022Rev1.00NTS A4MMGENERAL SOLAR ATSRD ELECTRONICS & ELECTRICALVICTRON MULTIPLUSATS SWITCHED SYSTEM GRID APPLICATIONS1:Isolate AC1 output to input to house loads 2:Transfer switch in auto mode will transferpower to the Dist SWB when grid fails. and transfer back to the grid when grid is restored.3:Neutral can't be broken from MEN link tohouse loads NZ3000 Wiring Rules.4:With the Victron input wired to grid side incan still export power if required with a grid protect relay to comply with AS/NZS 4777.2.2020 to be added later on.5:Setup Grid-tie inverter to MG mode.6:AC1 is backup supply 7:AC2 non essential supply8:Send command to turn off the grid tieinverters if genset running.9: Supply power to Huawei CT neutral feed?10: Neutral to Huawei only to AC1 output 11: Link all neutrals in AC output12: Fronius genset shut down remote control。
VIAVI 4100-Series DWDM OTDR 模块（用于 T-BERD MTS-2000、
VIAVI Solutions Data SheetVIAVIDWDM OTDR Module (4100-Series)For T-BERD®/MTS-2000, -4000 V2, -5800, CellAdvisor 5Gand OneAdvisor-800 PlatformsAs xWDM technology adoption continues to grow in access networks for broadbandservices, technicians require comprehensive and lightweight xWDM test tools.Consisting of a single module, the VIAVI C-band DWDM OTDR solution enables cable,wireless, and telco operators to perform complete end-to-end link characterizationand troubleshooting of DWDM and hybrid CWDM/DWDM networks.Key Benefitsy Characterize fiber links with exactDWDM wavelengthsy Troubleshoot live networks with in-servicetesting capabilityy Verify end-to-end continuity through MUX/DEMUX and ROADMs using the continuouswave source functiony Automatically identify and test DWDM portchannel/link with patented Wavescany Avoid accidental transceiver damagewith SFP ProtectKey Featuresy C-Band (1528nm to 1568nm) tunableDWDM OTDR module at ITU-T G.694.1wavelengths (CH12 to CH62)y Integrated CW light source withmodulation capabilityy Instantaneous traffic detectiony Automatically identify Mux and Demuxcomponents with SmartLink MapperApplicationsy Metro & access rings, business to business,advanced C-RAN fronthauls & next genFTTH networksy Qualification of fronthaul access networksy Testing new DWDM wavelengthroutes without disrupting traffic onactive channelsy Pinpointing faults and their exactlocations while in serviceThe DWDM OTDR module’s optical performance, combinedwith the complete suite of T-BERD/MTS, CellAdvisor 5G andOneAdvisor-800 platform testing features, ensures thatcomprehensive testing is done right the first time.Standard testing features include:y Auto-setting of the acquisition parametersy Summary results table with pass/fail analysis per theinternational standardsy Comprehensive event diagnosisy FastReport onboard report generationT-BERD/MTS-2000One-slot handheldmodular platform forfiber network testingHandheld testinstrument for 10 GEthernet and fibernetworks testingTwo-slot handheldmodular platformfor fiber/copper andmultiple services testingT-BERD/MTS-4000 V2T-BERD/MTS-5800CellAdvisor 5GCell site test solutionOneAdvisor-800All-in-One Cell-siteInstallation andMaintenanceT est Solution2020 Broadband Technology Review ‒4.5 Diamond Award Winner2 VIAVI T-BERD/MTS 4100 Series DWDM OTDR ModuleSpecifications (typical at 25°C)2. The one-way difference between the extrapolated backscattering level at the start of the fiber and the RMS noise level, after 3 minutes averaging and using the largest pulsewidth.3. Measured at ±1.5 dB down from the peak of an unsaturated reflective event using the shortest pulsewidth.4. Measured at ±0.5 dB from the linear regression using a FC/PC reflectance and using the shortest pulsewidth.5. Subtract 3 dB when used in modulation mode (270/330/1/2 kHz).For more information on the VIAVI T-BERD/MTS-2000/-4000 V2/-5800, CellAdvisor 5G and OneAdvisor-800 test platforms, refer to their respective datasheets.Ordering Information4100 DWDM OTDR Modules Tunable DWDM OTDR Module - PCE41DWDMC-PC Tunable DWDM OTDR Module - APCE41DWDMC-APC Wavescan® SW option for DWDM OTDR Module EWAVESCAN SFP Protect SW option for DWDM OTDR Module ESFPPROTECT Optical Adapters Switchable AdaptersEUSCADS,EUSCADS-APC,EUFCADS,EULCADS, EULCADS-APC。
(仅供参考)电源管理IC原理
电源管理IC原理离线控制器NCP1216A、AZ7500PWM电流模式高功率控制器通用离线用品NCP1216，基于控制器的NCP1200的一个增强版本。
由于其高的驱动能力，NCP1216驱动大栅极电荷的MOSFET、IGBT，连同内部斜坡补偿和内置的频率抖动，缓解现代化的AC-DC适配器的设计。
其内部结构在不同的固定频率操作，控制器用品本身，避免了丛高电压轨需要一个辅助绕组。
自然，此功能简化了设计在某些特定的应用程序，例如某些电器。
电流模式控制提供了一个极好的音频输入易感性和固有的脉冲，脉冲控制。
内部斜坡补偿容易采取防止次谐波振荡放置在连续传导模式设计。
当电流给定值低于给定值，例如电力需求减少，IC自动进入所为的跳周期模式，在轻负载条件下提供岀色的效率。
发生这种情况，因为用户在可调的低峰值电流，没有噪声。
NCP1216具有高效的保护电路，这存在下的过电流状态关闭输岀脉冲，而设备进入安全突发模式，试图重新启动。
一旦默认已消失，器件自动恢复。
特点：1.无需辅助绕组操作2.电流模式控制，具有可调跳周期能力3.内部斜坡补偿4.只有50％的占空比（NCP1216A才有）5.内置1.0ms软启动6.内置的频率抖动更好的EMI签名7.自动恢复内部短路保护8.极低的待机功耗9. 500mA峰值电流能力10.固定频率为65KHZ、100KHZ、133KHZ11.直接光耦连接典型应用：1.高功率AC-DC转换器 2.所有的电源供应器图1NCP1216 NCP1216A图2NCP1216 NCP1216A概述：AZ7500是电压模式脉冲宽度调制开关稳压控制电路主要用于电源控制的设计。
AZ7500由基准电压电路的两个误差放大器，一个片上可调振荡器。
一个死区时间控制（DTC）比较器，脉冲转向控制触发器，以及输岀控制电路。
预置参考电压（VREF）5V输岀，被提高到±1.0％准确性。
这提供了一个更好的输岀电压调节。
DC1216A-A;DC1216A-B;DC1216A-C;中文规格书,Datasheet资料
QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1216HIGH SPEED ADC CLOCK SOURCEDESCRIPTIONDemonstration circuit 1216 is a low jitter, low noise clock source for demonstrating high speed ADCs. Each assembly includes a LDO regulator and a high precision VCXO.Functionally, this circuit uses a linear regulator to provide a clean 3.3 volts to a VCXO at a fixed fre-quency. This VCXO is capable of providing a signal which is clean enough to produce data sheet per-formance from high speed ADCs. It is designed tohave 50ohm output impedance, but has provision for other termination resistors if needed.This circuit also is a model for the clock source of ADCs. It shows how to properly implement a VCXO correctly to drive the clock of an ADC. It can be used with a DC1075 to produce lower clock fre-quencies.Design files for this circuit board are available. Call the LTC factory.LTC is a trademark of Linear Technology CorporationTable 1. DC1216A VariantsDC750 VARIANTS VCXO PART NUMBER OUTPUT FREQUENCY DC1216A-A Crystek 601964100MHz DC1216A-B Crystek 602017122.88MHzDC1216A-CCrystek 60201980MHzQUICK START PROCEDURESETUPThe DC1216 requires an external voltage of 5 volts. This voltage can be as high as 9V. The SMA con-nector should be connected to the ADC directly, or through a clock divider circuit such as the DC1075A. No external filter is required.QUICK START GUIDE FOR DEMONSTRATION CIRCUIT 1216HIGH SPEED ADC CLOCK SOURCE分销商库存信息:LINEAR-TECHNOLOGYDC1216A-A DC1216A-B DC1216A-C。
NCP1216A NCP1252做正激设计应用
离线控制器NCP1216APWM电流模式高功率控制器通用离线用品坐落在SOIC-8或PDIP-7封装，NCP1216代表基于控制器的NCP1200的一个增强版本。
由于其高的驱动能力，NCP1216驱动大栅极电荷的MOSFET，连同内部斜坡补偿和内置的频率抖动，缓解现代化的AC-DC适配器的设计。
其内部结构在不同的固定频率操作，控制器用品本身，避免了从高电压轨需要一个辅助绕组。
自然，此功能简化了设计在某些特定的应用程序，例如任务电池充电器或电视机。
电流模式控制提供了一个极好的音频输入易感性和固有的脉冲，脉冲控制。
内部斜坡补偿容易采取防止次谐波振荡放置在连续传导模式设计。
当电流给定值低于一个给定值，例如输出电力需求减少，IC自动进入所谓的跳周期模式，在轻负载条件下提供出色的效率。
发生这种情况，因为在用户可调的低峰值电流，没有声噪声。
的NCP1216具有高效的保护电路，这存在下的过电流状态关闭输出脉冲，而设备进入安全突发模式，试图重新启动。
一旦默认已消失，器件自动恢复。
特点•无需辅助绕组操作 •电流模式控制，具有可调跳周期能力•内部斜坡补偿 •有限公司50％的占空比（NCP1216A只有）•内置1.0 ms软启动（NCP1216A只有） •内置的频率抖动更好的EMI签名•自动恢复内部输出短路保护 •极低的空载待机功耗•500 mA峰值电流能力 •固定频率为65kHz的频率版本，100千赫，133千赫•内部温度关机 •直接光耦连接•SPICE模型可用于瞬态和AC分析 •引脚对引脚兼容与NCP1200系列•这些是无铅和无卤化物设备典型应用•高功率AC-DC转换器，用于电视，机顶盒等。
•离线适配器的笔记本电脑•电信DC-DC转换器•所有的电源供应器本文描述,將NCP1216A用於單端正激變換器的設計程序,用於通訊系統. 輸入電壓範圍:36~72V DC 輸出功率30W 12V 2.5A 效率要求 >85% 輸入輸出隔离電壓為1500V. NCP1216A是一個適合於此的合適的選擇,這是由於: 50%最大占容比工作. 正激式變換器通常都將占空比限制於50%,由於電壓復位值強制於等于輸入電壓.(1:1)因此不得超過50%,以防磁芯飽合. 無輔助繞組工作. 用Dss(動態自供電方式)允許NCP1216A直接從高壓線路供電,而不用Vcc.當然也可以選用輔助繞組. 500mA峰值電流驅動能力. NCP1216A可直接驅動功率MOSFET,可不用附加驅動級,如果選擇的MOSFET栅驅動超出Dss能力,則必須加輔助繞組供電. 電流型工作. 逐個周期的初級電流監視,以消除任何因二次側短路及過流造成的飽合 直接光耦反饋連接 應用中,輸入輸出之間隔离,加一光耦即可,省去好多元件.极低的空載功耗. 很易實現當今對綠色電源的空載功耗的要求. 短路保護. 用監視反饋端的激活與否,NCP1216A易如反掌地實現二次短路保護.耦合問題消除了對槽路的需求. 35W DC/DC 的技術規範. Vimin 36V Vmax >72V Vout 12V Iout 3A f = 100KHz No Load 48V <1.8mA 環繞0~70℃. 原理圖如圖1所標 變換器接線簡述 C1,C2,C3及L1為輸入濾波網絡.D3,C5及R5為初級吸收回路,與此同時,加了去磁繞組以极大地降低損耗.D1,R2,R3為電流互感器網路元件.這幾步使總效率在小功率情況下>85%.IC1為主控電路,二次側D4A及D4B為整流及回流二极管.電容C6提供共模電流回路(隔直電容),R7~R10,C12,TL431光耦.IC2組成隔離反饋網絡.保持輸出電壓穩定.吸收電路R6,C7,接電感L2兩端,此為防高頻振蕩.L2,C8,C9,C10為輸出濾波.L3及C11為再次濾波.以減少高頻噪聲. 各部分設計過程如下: 主變壓器設計 在正激變換器中,其磁芯要確保加輸入電壓到初級繞組.它建起磁通φ.它通過初次級繞組,用法拉弟定律.E=N.dφ/dt,此處E為N匝繞組感應電壓,以產生磁通φ.此外加上輸入電壓僅在ton時間,由此用伏秒积的方式:有: Ae 磁芯有效截面積. β 磁芯的磁通密度 這樣最高磁密Δβmax及初級峰值磁化電流Ipeax由初級電感L1及最高輸入電壓根據(2),(3)式給出.此處:Vin‐‐‐‐最大輸入電壓 L1‐‐‐‐初級繞組電感 Fop‐‐‐‐工作頻率 Dmax‐‐‐‐最大占空Np‐‐‐‐初級匝數 初級的磁化電流不參與能量傳輸,卻在初級繞組和開關中造成損耗,當開關關斷時,變压器磁芯必須復位.為讓其磁芯復位,要加一復位電路.磁化電流Imag要保持較小值,遠小於初級電流. 磁密Δβ選擇要與磁芯材料的飽合磁密βmax相適應.還要放虙磁滯效率.磁芯溫升帶來的變化.此外,磁密隨頻率的升高會下降,建議在高頻時(>100KHg),選在0.15~0.2T.如果選擇更高磁密,損耗會增加.初級繞組匝數按下式計算.:對EFD‐25,磁芯,其截面Ae=58mm2.Vin max=80V f=100KHz 選Δβmax=0.2T最大Dmax=0.5,於是求出Np=35. 復位繞組匝數取決於應力設計,復位繞組匝數低於主繞組時,主功率Mos漏极電壓會低於2*Vin max但是.這會限制最大占空比.使之少於50%.傳统上,復位繞組匝數若大於主繞組,最大占空比會增加,但MOSFET電壓應力將大於2*Vin max. 綜合上述,習慣上選擇復位繞組匝數與主繞組匝比為1:1,這一點很重要,即復位繞組要與主繞組繞制時緊密耦合.若兩繞組間漏感較大,則會影響整體轉換效率.而二次繞組匝數Ns由下式求出.Vout‐‐‐‐輸出電壓 Vf‐‐‐‐整流器正向壓降 Vin min‐‐‐‐最低輸入電壓 對於EFD‐25,可得出Ns=25. 初次級繞組必須注意防止趋膚效應(SKIN),可用幾種方法解決.一是多根導線並聯,對應頻率下的最大導線直徑由下式求出. 所選初次級導線整個截面積由整個輸出功率及允許的溫升決定,電流密度大於2~3.5A/mm2.若用風冷,電密可以到5~6A/mm2 復位繞組可用一根細導線繞出即可,給出的去磁電流很小. 在某些情況下,加入一小點氣隙在變壓器磁芯中,這可以大幅度減小磁芯的剩磁.Br.防止磁芯飽合,便會影響一點效率,會使磁化電流加大,此外會使Vcc繞組接成flybeck時產生穩定的Vcc. 輸出濾波電感設計. 輸出電感值的選擇取決於可接受的紋波電流的水平.要求小紋波時,可選大電感值,另一方面,電流紋波時.就必須用大的輸出電容.以減小紋波電壓.實際上限制紋波電流在10~20%.的平均電流,最大電流紋波ΔImax出現在50%占空比時,由下式給出.此處:Vsec max‐‐‐‐二次繞組電高電壓 L2‐‐‐‐ L2的電感量. 在NCP1216A中,用了100MH 電感,最大輸出紋波電流為ΔImax=2.0A,這相對較高,便可減小電感尺寸. 輸出電容值要選擇得在最大允許的輸出電壓時流過RMS電流產生最小的紋波電壓. 電流互感器的設計. 電流互感器.用於取代電流檢測電阻減小功耗.在此處大約減小了三瓦的功耗.采用電流互感器功耗大約只有0.05W.(50mw),其缺點是產生電流誤差.它由此互感器產生.會降低電流檢測的準確性. 互感器二次繞了38匝,用於NCP1216A,初級為1匝銅片.峰值電流I 2pk由下式求出此處 I 1pk為峰值電流(功率開關的) Ns為二次繞組匝數. Imag pk為磁化電流峰值. 圖2示出電流互感器的實用電路,峰值磁化電流由(9)式給出:此處:Vcs th max電流檢測輸入的最大電壓阈值. Ls‐‐‐‐二次繞組的電感值. 電流檢測電阻的阻值Rsonse由(10)式求出:NCP1216A前沿消隱電路(LEB)容許設計一個RC网絡在開關開啟時.抑制電感尖峰. 初級RCD 箝位電路及電感箝位網絡設計. 由於繞制工藝導致的初次級繞組間的漏感決不會為0.儲存在此漏感中的能量(在ton時)會在開關關斷時產生大的尖刺.為保護功率開關不被尖刺破壞,.加一個RCD网絡.這些元件值不僅取決於漏感值,還與反射電壓,PCB佈局的寄生參數及RCD電容直接相關.RCD箝制功耗由(11)式給出.此處:Lleak‐‐‐‐漏感值 Vclamp‐‐‐‐箝位電壓值 Vrefl‐‐‐‐反射電壓值(Vrefl=Vin max) 箝位元件值的選擇由下式給定:此處:Vipple為箝位電容上的紋波電壓. 一個RC吸收网絡,接到電感L2抑制寄生振蕩,此振蕩常發生在回流及整流二极管工作交替階段. 調整环的設計 采用TL431並聯式穩壓器作回饋.光耦提供好的隔离,輸出電壓設置由下式給出:流過光耦LED的最大電流由電阻R7決定,TLV431內部功耗很低.這樣不同旁路電阻給LED.電阻R8及C12用於反饋環的補償网絡.最佳數值可由反饋的響應網絡測量. .双开关正激转换器原理介绍及其应用设计更新于2012-07-16 04:17:51 文章出处:互联网双开关转换器原理单开关(或称单晶体管)正激转换器是一种最基本类型的基于变压器的隔离降压转换器，广泛用于需要大降压比的应用。
NCP1216-D
NCP1216PWM Current−Mode Controller for High−Power Universal Off−line Supplies Housed in a SO−8 or DIP7 package, the NCP1216 represents an enhanced version of NCP1200−based controllers. Due to its high drive capability, NCP1216 drives large gate−charge MOSFETs, which together with internal ramp compensation and built−in frequency jittering, ease the design of modern AC/DC adapters.With an internal structure operating at different fixed frequencies, the controller supplies itself from the high−voltage rail, avoiding the need of an auxiliary winding. This feature naturally eases the designer task in some particular applications, e.g. battery chargers or TV sets. Current−mode control also provides an excellent input audio−susceptibility and inherent pulse−by−pulse control. Internal ramp compensation easily prevents sub−harmonic oscillations from taking place in continuous conduction mode designs.When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the so−called skip cycle mode and provides excellent efficiency at light loads. Because this occurs at a user adjustable low peak current, no acoustic noise takes place.The NCP1216 features an efficient protective circuitry, which in presence of an over current condition disables the output pulses while the device enters a safe burst mode, trying to re−start. Once the default has gone, the device auto−recovers.Features•No Auxiliary Winding Operation•Current−Mode Control with Adjustable Skip−Cycle Capability •Internal Ramp Compensation•Built−In Frequency Jittering for Better EMI Signature•Auto−Recovery Internal Output Short−Circuit Protection •Extremely Low No−Load Stand−By Power•500 mA Peak Current Capability•Fixed Frequency Versions at 65 kHz, 100 kHz, 133 kHz •Internal Temperature Shutdown•Direct Optocoupler Connection•SPICE Models Available for TRANsient and AC Analysis •Pin−to−Pin Compatible with NCP1200 SeriesTypical Applications•High Power AC/DC Converters for TVs, Set−Top Boxes, etc.•Offline Adapters for Notebooks•Telecom DC−DC Converters•All Power SuppliesMINIATURE PWMCONTROLLER FOR HIGHPOWER AC/DC WALLADAPTERS AND OFFLINEBATTERY CHARGERSSee detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet.ORDERING INFORMATIONFigure 1. Typical Application ExampleHVDrvGND NCSenseAdj FB Figure 2. Internal Circuit ArchitectureV CCMAXIMUM RATINGSELECTRICAL CHARACTERISTICS (For typical values T J = 25°C, for min/max values T J = 0°C to +125°C, Maximum T J = 150°C, V CC = 11 V unless otherwise noted.)DYNAMIC SELF−SUPPLYINTERNAL START−UP CURRENT SOURCE (T J > 0°C)DRIVE OUTPUTCURRENT COMPARATOR (Pin 5 Unloaded)1.V CC OFF and V CC ON min−max always ensure an hysteresis of2.0 V.2.Maximum value at T J = 0°C.3.Minimum value for T J = 125°C.ELECTRICAL CHARACTERISTICS (continued)(For typical values T J = 25°C, for min/max values T J = 0°C to +125°C, Maximum T J = 150°C, V CC = 11 V unless otherwise noted.)INTERNAL OSCILLATOR (V CC = 11 V, Pin 5 Loaded by 1.0 k W)FEEDBACK SECTION (V CC = 11 V, Pin 5 Loaded by 1.0 k W)SKIP CYCLE GENERATIONINTERNAL RAMP COMPENSATIONTEMPERATURE (°C)Figure 3. High Voltage Pin Leakage Current vs.Temperature01020304050−250255075100125H V P I N L E A K A G E C U R R E N T @ 500 V (m A )Figure 4. VCC OFFvs. Temperature11.011.512.012.513.013.514.0−250255075100125TEMPERATURE (°C)V C C O F F (V )Figure 5. VCC ONvs. Temperature 9.09.510.010.511.011.512.0−25255075100125V C C O N (V )TEMPERATURE (°C)50060070080090010001100120013001400−250255075100125TEMPERATURE (°C)I C C 1 (m A )Figure 6. I CC1 (@ V CC = 11 V) vs. Temperature1.001.201.401.601.802.002.202.402.602.80−25255075100125TEMPERATURE (°C)I C C 2 (m A)Figure 7. I CC2 vs. Temperature507090110130150−25255075100125F O S C (k H z )TEMPERATURE (°C)Figure 8. Switching Frequency vs.TemperatureTYPICAL CHARACTERISTICS5.305.405.505.605.705.805.90−25255075100125TEMPERATURE (°C)V C C l a t c h (V )Figure 9. VCC latch vs. Temperature Figure 10. I CC3 vs. Temperature200250300350400−250255075100125TEMPERATURE (°C)I C C 3 (m A )−25255075100125D R I VE R R E S I S T A N C E (W )TEMPERATURE (°C)Figure 11. Drive Sink and Source Resistancevs. Temperature0.930.981.031.081.13−25255075100125TEMPERATURE (°C)C U R R E N T S E N S E L I M I T (V )Figure 12. Current Sense Limit vs. Temperature−252550751001251.001.051.101.151.20TEMPERATURE (°C)V s k i p (V )Figure 13. V skip vs. Temperature72.072.573.073.574.074.575.0−25255075100125TEMPERATURE (°C)D U T Y C Y C LE (%)Figure 14. Max Duty−Cycle vs. Temperature2.702.752.802.852.902.953.003.053.10−25255075100125TEMPERATURE (°C)V r a m p (V )Figure 15. V ramp vs. Temperature2468101214−250255075100125I C 1 (m A )TEMPERATURE (°C)Figure 16. High Voltage Current Source(@ V CC = 10 V) vs. TemperatureAPPLICATION INFORMATIONIntroductionThe NCP1216 implements a standard current mode architecture where the switch−off event is dictated by the peak current setpoint. This component represents the ideal candidate where low part−count is the key parameter, particularly in low−cost AC/DC adapters, TV power supplies etc. Due to its high−performance High−V oltage technology, the NCP1216 incorporates all the necessary components normally needed in UC384X based supplies: timing components, feedback devices, low−pass filter and self−supply. This later point emphasizes the fact that ON Semiconductor’s NCP1216 does NOT need an auxiliary winding to operate: the product is naturally supplied from the high−voltage rail and delivers a V CC to the IC. This system is called the Dynamic Self−Supply (DSS): Dynamic Self−Supply (DSS): Due to its Very High V oltage Integrated Circuit (VHVIC) technology, ON Semiconductor’s NCP1216 allows for a direct pin connection to the high−voltage DC rail. A dynamic current source charges up a capacitor and thus provides a fully independent V CC level to the NCP1216. As a result, there is no need for an auxiliary winding whose management is always a problem in variable output voltage designs (e.g. battery chargers).Adjustable Skip Cycle Level: By offering the ability to tailor the level at which the skip cycle takes place, the designer can make sure that the skip operation only occurs at low peak current. This point guarantees a noise−free operation with cheap transformers. Skip cycle offers a proven mean to reduce the standby power in no or light loads situations. Internal Frequency Dithering for Improved EMI Signature: By modulating the internal switching frequency with the DSS V CC ripple, natural energy spread appears and softens the controller’s EMI signature.Wide Switching − Frequency Offered with Different Options (65 kHz − 100 kHz − 133 kHz): Depending on the application, the designer can pick up the right device to help reducing magnetics or improve the EMI signature before reaching the 150 kHz starting point.Ramp Compensation: By inserting a resistor between the current−sense (CS) pin and the actual sense resistor, it becomes possible to inject a given amount of ramp compensation since the internal sawtooth clock is routed to the CS pin. Sub−harmonic oscillations in Continuous Conduction Mode (CCM) can thus be compensated via a single resistor.Over Current Protection (OCP): By continuously monitoring the FB line activity, NCP1216 enters burst mode as soon as the power supply undergoes an overload. The device enters a safe low power operation, which prevents from any lethal thermal runaway. As soon as the default disappears, the power supply resumes operation. Unlike other controllers, overload detection is performed independently of any auxiliary winding level. In presence of a bad coupling between both power and auxiliary windings, the short circuit detection can be severely affected. The DSS naturally shields you against these troubles.Wide Duty−Cycle Operation: Wide mains operation requires a large duty−cycle excursion. The NCP1216 can go up to 75% typically. For Continuous Conduction Mode (CCM) applications, the internal ramp compensation lets you fight against sub−harmonic oscillations.Low Stand−By−Power: If SMPS naturally exhibit a good efficiency at nominal load, they begin to be less efficient when the output power demand diminishes. By skipping unnecessary switching cycles, the NCP1216 drastically reduces the power wasted during light load conditions. In no−load conditions, the NPC1216 allows the total standby power to easily reach next International Energy Agency (IEA) recommendations.No Acoustic Noise While Operating: Instead of skipping cycles at high peak currents, the NCP1216 waits until the peak current demand falls below a user−adjustable 1/3rd of the maximum limit. As a result, cycle skipping can take place without having a singing transformer, one can thus select cheap magnetic components free of noise problems. External MOSFET Connection: By leaving the external MOSFET external to the IC, you can select avalanche proof devices, which in certain cases (e.g. low output powers), let you work without an active clamping network. Also, by controlling the MOSFET gate signal flow; you have an option to slow down the device commutation, therefore reducing the amount of ElectroMagnetic Interference (EMI).SPICE Model: A dedicated model to run transient cycle−by−cycle simulations is available but also an averaged version to help you closing the loop. Ready−to−use templates can be downloaded in OrCAD’s PSpice and INTUSOFT’s IsSpice from ON Semiconductor web site, in the NCP1216 related section.Dynamic Self−SupplyThe DSS principle is based on the charge/discharge of the V CC bulk capacitor from a low level up to a higher level. We can easily describe the current source operation with a bunch of simple logical equations:POWER−ON: If V CC < VCC OFF then the Current Source is ON, no output pulsesIf V CC decreasing > VCC ON then the Current Source is OFF, output is pulsingIf V CC increasing < VCC OFF then the Current Source is ON, output is pulsingTypical values are: VCC OFF = 12.2 V, VCC ON = 10 V To better understand the operational principle, Figure 17 offers the necessary light:Figure 17. The Charge/Discharge Cycle Over a10 m F V CC CapacitorThe DSS behavior actually depends on the internal IC consumption and the MOSFET’s gate charge Q g. If we select a 600 V 10 A MOSFET featuring a 30 nC Q g, then we can compute the resulting average consumption supported by the DSS which is:I total[F sw Q g)I CC1.(eq. 1) The total IC heat dissipation incurred by the DSS only is given by:I total V pin8.(eq. 2) Suppose that we select the NCP1216P065 with the above MOSFET, the total current is(30n65k))900m+2.9mA.(eq. 3) Supplied from a 350 VDC rail (250 V AC), the heat dissipated by the circuit would then be:350V 2.9mA+1W(eq. 4) As you can see, it exists a tradeoff where the dissipation capability of the NCP1216 fixes the maximum Q g that the circuit can drive, keeping its dissipation below a given target. Please see the “Power Dissipation” section for a complete design example and discover how a resistor can help to heal the NCP1216 heat equation.Application note AND8069/D details tricks to widen the NCP1216 driving implementation, in particular for large Q g MOSFETs. This document can be downloaded at /pub/Collateral/AND8069−D.PDF. Ramp CompensationRamp compensation is a known mean to cure sub−harmonic oscillations. These oscillations take place at half the switching frequency and occur only during Continuous Conduction Mode (CCM) with a duty−cycle greater than 50%. To lower the current loop gain, one usuallyinjects between 50% and 100% of the inductor down−slope. Figure 18 depicts how internally the ramp is generated:2.9VFigure 18. Inserting a Resistor in Series with the Current Sense Information brings RampCompensationR senseDC max = 75°CIn the NCP1216, the ramp features a swing of 2.9 V with a Duty cycle max at 75%. Over a 65 kHz frequency, it corresponds to a2.90.7565kHz+251mVńm s ramp.(eq. 5) In our FLYBACK design, let’s suppose that our primary inductance L p is 350 m H, delivering 12 V with a Np : Ns ratio of 1:0.1. The OFF time primary current slope is thus given by:V out)V fL pN pN s+371mAńm s or37mVńm s(eq. 6)when projected over an R sense of 0.1 W, for instance. If we select 75% of the down−slope as the required amount of ramp compensation, then we shall inject 27 mV/m s. Our internal compensation being of 251 mV/m s, the divider ratio (divratio) between R comp and the 19 k W is 0.107. A few lines of algebra to determine R comp:19k divratio1*divratio+2.37k W(eq. 7)Frequency JitteringFrequency jittering is a method used to soften the EMI signature by spreading the energy in the vicinity of the main switching component. NCP1216 offers a $4% deviation ofthe nominal switching frequency whose sweep is synchronized with the V CC ripple. For instance, with a 2.2 V peak−to−peak ripple, the NCP1216P065 frequency will equal 65 kHz in the middle of the ripple and will increase as V CC rises or decrease as V CC ramps down. Figure 19 portrays the behavior we have adopted:Figure 19. V CC Ripple is Used to Introduce aFrequency Jittering on the Internal OscillatorSawtoothSkipping Cycle ModeThe NCP1216 automatically skips switching cycles when the output power demand drops below a given level. This is accomplished by monitoring the FB pin. In normal operation, pin 2 imposes a peak current accordingly to the load value. If the load demand decreases, the internal loop asks for less peak current. When this setpoint reaches a determined level, the IC prevents the current from decreasing further down and starts to blank the output pulses: the IC enters the so−called skip cycle mode, also named controlled burst operation. The power transfer now depends upon the width of the pulse bunches (Figure 21). Suppose we have the following component values:L p, primary inductance = 350 m HF sw, switching frequency = 65 kHzI p skip = 600 mA (or 333 mV / R sense)The theoretical power transfer is therefore:1 2L p I p2F sw+4W.(eq. 8)If this IC enters skip cycle mode with a bunch length of 10 ms over a recurrent period of 100 ms, then the total power transfer is:40.1+400mW.(eq. 9) To better understand how this skip cycle mode takes place, a look at the operation mode versus the FB level immediately gives the necessary insight:Figure 20.B Pin Open FB1 VWhen FB is above the skip cycle threshold (1.0 V by default), the peak current cannot exceed 1.0 V/Rsense. When the IC enters the skip cycle mode, the peak current cannot go below Vpin1 / 3.3. The user still has the flexibility to alter this 1.0 V by either shunting pin 1 to ground through a resistor or raising it through a resistor up to the desired level. Grounding pin 1 permanently invalidates the skip cycle operation.Figure 21. Output Pulses at Various Power Levels(X = 5 m s/div) P1 < P2 < P3Power P1315.4U 882.7U 1.450M 2.017M 2.585M300200100Figure 22. The Skip Cycle Takes Place at Low Peak Currents which Guarantees Noise Free OperationNon−Latching ShutdownIn some cases, it might be desirable to shut off the part temporarily and authorize its re−start once the default has disappeared. This option can easily be accomplished through a single NPN bipolar transistor wired between FB and ground. By pulling FB below the Adj pin 1 level, the output pulses are disabled as long as FB is pulled below pin 1. As soon as FB is relaxed, the IC resumes its operation.Figure 23 depicts the application example:Figure 23. Another Way of Shutting Down the ICwithout a Definitive Latch−off StateA full latching shutdown, including over−temperature protection, is described in application note AND8069/D.Power DissipationThe NCP1216 is directly supplied from the DC rail through the internal DSS circuitry. The current flowing through the DSS is therefore the direct image of the NCP1216 current consumption. The total power dissipation can be evaluated using:(V HVDC *11V) I CC2(eq. 10)which is, as we saw, directly related to the MOSFET Q g . If we operate the device on a 90−250 V AC rail, the maximum rectified voltage can go up to 350 VDC. However, as the characterization curves show, the current consumption drops at a higher junction temperature, which quickly occursdue to the DSS operation. In our example, at T ambient = 50°C, I CC2 is measured to be 2.9 mA with a 10 A / 600 V MOSFET. As a result, the NCP1216 will dissipate from a 250 V AC network,350V 2.9mA@T A +50C +1W(eq. 11)°The PDIP7 package offers a junction−to−ambient thermal resistance R q J−A of 100°C/W. Adding some copper area around the PCB footprint will help decreasing this number:12 mm x 12 mm to drop R q J−A down to 75°C/W with 35 m copper thickness (1 oz.) or 6.5 mm x 6.5 mm with 70 m copper thickness (2 oz.). For a SO−8, the original 178°C/W will drop to 100°C/W with the same amount of copper. With this later PDIP7 number, we can compute the maximum power dissipation that the package accepts at an ambient of 50°C:P max +T Jmax *T AmaxR q J *A+1W(eq. 12)which barely matches our previous budget. Several solutions exist to help improving the situation:1− Insert a Resistor in Series with Pin 8: This resistor will take a part of the heat normally dissipated by the NCP1216.Calculations of this resistor imply that V pin8 does not drop below 50 V in the lowest mains conditions. Therefore, R drop can be selected with:R drop v V bulkmin*50V8mA(eq. 13)In our case, V bulk minimum is 120 VDC, which leads to a dropping resistor of 8.7 k W . With the above example in mind, the DSS will exhibit a duty−cycle of:2.9mA ń8mA +36%(eq. 14)By inserting the 8.7 k W resistor, we drop8.7k W *8mA +69.6V(eq. 15)during the DSS activation. The power dissipated by the NCP1216 is therefore:P instant *DSS duty *cycle +(eq. 16)(350*69)*8m *0.36+800mWWe can pass the limit and the resistor will dissipate(eq. 17)1W *800mW +200mWor(eq. 18)p drop +6928.7k*0.362− Select a MOSFET with a Lower Q g : Certain MOSFETs exhibit different total gate charges depending on the technology they use. Careful selection of this component can help to significantly decrease the dissipated heat.3− Implement Figure 3, from AN8069/D, Solution: This is another possible option to keep the DSS functionality (good short−circuit protection and EMI jittering) while driving any types of MOSFETs. This solution is recommended when the designer plans to use SO−8 controllers.4− Connect an Auxiliary Winding: If the mains conditions are such that you simply can’t match the maximum power dissipation, then you need to connect an auxiliary winding to permanently disconnect the start−up source.Overload OperationIn applications where the output current is purposely not controlled (e.g. wall adapters delivering raw DC level), it is interesting to implement a true short−circuit protection. A short−circuit actually forces the output voltage to be at a low level, preventing a bias current to circulate in the Optocoupler LED. As a result, the FB pin level is pulled up to 4.2 V , as internally imposed by the IC. The peak current setpoint goes to the maximum and the supply delivers a rather high power with all the associated effects. Please note that this can also happen in case of feedback loss, e.g. a broken Optocoupler. To account for this situation, NCP1216hosts a dedicated overload detection circuitry. Once activated, this circuitry imposes to deliver pulses in a burst manner with a low duty−cycle. The system auto−recovers when the fault condition disappears.During the start−up phase, the peak current is pushed to the maximum until the output voltage reaches its target and the feedback loop takes over. This period of time depends on normal output load conditions and the maximum peak current allowed by the system. The time−out used by this IC works with the V CC decoupling capacitor: as soon as the V CC decreases from the VCC OFF level (typically 12.2 V) the device internally watches for an overload current situation.If this condition is still present when the VCC ON level is reached, the controller stops the driving pulses, prevents the self−supply current source to restart and puts all the circuitry in standby, consuming as little as 350 m A typical (I CC3parameter). As a result, the V CC level slowly discharges toward 0 V . When this level crosses 5.6 V typical, the controller enters a new start−up phase by turning the current source on: V CC rises toward 12.2 V and again delivers output pulses at the VCC OFF crossing point. If the fault condition has been removed before VCC ON approaches,then the IC continues its normal operation. Otherwise, a new fault cycle takes place. Figure 24 shows the evolution of the signals in presence of a fault.Figure 24.TimeTimeTimeVCC OFF = 12.2 V VCC ON = 10 V VCC latch = 5.6 VIf the fault is relaxed during the V CC natural fall down sequence, the IC automatically resumes.If the fault still persists when V CC reached VCC ON , then the controller cuts everything off until recovery.Calculating the VCC CapacitorAs the above section describes, the fall down sequence depends upon the V CC level: how long does it take for the V CC line to go from 12.2 V to 10 V . The required time depends on the start−up sequence of your system, i.e. whenyou first apply the power to the IC. The corresponding transient fault duration due to the output capacitor charging must be less than the time needed to discharge from 12.2 V to 10 V , otherwise the supply will not properly start. The test consists in either simulating or measuring in the lab how much time the system takes to reach the regulation at full load. Let’s suppose that this time corresponds to 6ms.Therefore a V CC fall time of 10 ms could be well appropriated in order to not trigger the overload detection circuitry. If the corresponding IC consumption, includingthe MOSFET drive, establishes at 2.9 mA, we can calculate the required capacitor using the following formula:D t +D V·Ci(eq. 19)with D V = 2.2 V . Then for a wanted D t of 30 ms, C equals 39.5 m F or a 68 m F for a standard value (including ±20%dispersions). When an overload condition occurs, the IC blocks its internal circuitry and its consumption drops to 350 m A typical. This happens at V CC = 10 V and it remains stuck until V CC reaches 5.6 V: we are in latch−off phase.Again, using the selected 68 m F and 350 m A current consumption, this latch−off phase lasts: 780 ms.Protecting the Controller Against Negative SpikesAs with any controller built upon a CMOS technology, it is the designer’s duty to avoid the presence of negative spikes on sensitive pins. Negative signals have the bad habit to forward bias the controller substrate and induce erratic behaviors. Sometimes, the injection can be so strong thatinternal parasitic SCRs are triggered, engendering irremediable damages to the IC if a low impedance path is offered between V CC and GND. If the current sense pin is often the seat of such spurious signals, the high−voltage pin can also be the source of problems in certain circumstances.During the turn−off sequence, e.g. when the user unplugs the power supply, the controller is still fed by its V CC capacitor and keeps activating the MOSFET ON and OFF with a peak current limited by R sense . Unfortunately, if the quality coefficient Q of the resonating network formed by L p and C bulk is low (e.g. the MOSFET R dson + R sense are small),conditions are met to make the circuit resonate and thus negatively bias the controller. Since we are talking about ms pulses, the amount of injected charge, (Q = I * t),immediately latches the controller that brutally discharges its V CC capacitor. If this V CC capacitor is of sufficient value,its stored energy damages the controller. Figure 25 depicts a typical negative shot occurring on the HV pin where the brutal V CC discharge testifies for latch−up.Figure 25. A Negative Spike Takes Place on the Bulk Capacitor at the Switch−off SequenceV CC 5 V/DIV 10 ms/DIVV latch 1 V/DIVSimple and inexpensive cures exist to prevent from internal parasitic SCR activation. One of them consists in inserting a resistor in series with the high−voltage pin to keep the negative current to the lowest when the bulk becomes negative (Figure 26). Please note that the negative spike is clamped to (−2 * V f ) due to the diode bridge. Also,the power dissipation of this resistor is extremely small since it only heats up during the start−up sequence.Another option (Figure 27) consists in wiring a diode from V CC to the bulk capacitor to force V CC to reach VCC ON sooner and thus stops the switching activity before the bulk capacitor gets deeply discharged. For security reasons, two diodes can be connected in series.Figure 26.Figure 27.A simple resistor in series avoids any latch−up in the controlleror one diode forces V CC to reach VCC ON sooner.D31N4007CV CCCV CCbulk ORDERING INFORMATIONSO−8D SUFFIX CASE 751−07NOTES:1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A AND B DO NOT INCLUDE MOLDPROTRUSION.4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PERSIDE.5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.127 (0.005) TOTAL INEXCESS OF THE D DIMENSION AT MAXIMUMMATERIAL CONDITION.6.751−01 THRU 751−06 ARE OBSOLETE. NEWSTANDARD IS 751−07.DIMAMIN MAX MIN MAXINCHES4.805.000.1890.197MILLIMETERSB 3.80 4.000.1500.157C 1.35 1.750.0530.069D0.330.510.0130.020G 1.27 BSC0.050 BSCH0.100.250.0040.010J0.190.250.0070.010K0.40 1.270.0160.050M0 8 0 8N0.250.500.0100.020S 5.80 6.200.2280.244 YM0.25 (0.010)Z S X S____PDIP−7P SUFFIXCASE 626B−01ISSUE ANOTES:1.DIMENSIONS AND TOLERANCING PER Array ASME Y14.5M, 1994.2.DIMENSIONS IN MILLIMETERS.3.DIMENSION L TO CENTER OF LEADWHEN FORMED PARALLEL.4.PACKAGE CONTOUR OPTIONAL(ROUND OR SQUARE CORNERS).5.DIMENSIONS A AND B ARE DATUMS.MILLIMETERSDIM MIN MAXA9.4010.16B 6.10 6.60C 3.94 4.45D0.380.51F 1.02 1.78G 2.54 BSCH0.76 1.27J0.200.30K 2.92 3.43L7.62 BSCM−−−10°N0.76 1.01The product described herein (NCP1216), may be covered by the following U.S. patents: 6,385,060; 6,587,357. There may be other patents pending.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
ncp1216ap65g工作原理
ncp1216ap65g工作原理The NCP1216AP65G is an advanced integrated power managementIC designed for use in high-performance power applications. 这是一款专为高性能电源应用设计的先进集成电源管理IC。
It is commonly used in power supplies for industrial equipment as well as consumer electronics. 它通常用于工业设备和消费类电子产品的电源供应。
The NCP1216AP65G utilizes advanced techniques to provide high efficiency and reliable power delivery. NCP1216AP65G采用先进的技术，能够提供高效和可靠的电源传输。
One key aspect of the NCP1216AP65G's operation is its ability to regulate voltage levels with high precision. NCP1216AP65G运行的一个关键方面是它具有高精度调节电压水平的能力。
This is achieved through a combination of feedback control mechanisms and internal circuitry that constantly monitor and adjust the output voltage. 这是通过反馈控制机制和内部电路的结合来不断监测和调整输出电压来实现的。
This ensures that the power supplied to the load remains stable and within the specified range, even when external conditions change. 这确保了向负载供电保持稳定，在指定范围内，即使外部条件发生变化。
NCP1216A作单端正激电路的设计
NCP1216A作单端正激电路的设计单端正激电路是一种常见的电源电路，它能够将交流电转化为直流电并提供给负载使用。
在本文中，我将介绍NCP1216A芯片的单端正激电路的设计。
NCP1216A是一款高性能、在线反馈型开关电源控制器芯片。
它内部集成了一个PWM控制器、一个高压启动电路以及一个多模式工作电流源。
该芯片可广泛应用于笔记本电脑、台式电脑、LCD显示器、散热风扇等电源电路。
在进行电路设计之前，我们需要明确以下几个设计参数：输入电压范围、输出电压、输出电流需求以及负载性质。
假设我们的设计参数如下：输入电压范围为100V~240V，输出电压为12V，输出电流为2A，负载为电阻性负载。
1. 选择输入滤波电容：根据NCP1216A的设计参数，其工作频率为100kHz~130kHz。
我们可以选择适当的输入滤波电容，减小输入电源的纹波，提供稳定的电源电压。
一般来说，输入滤波电容的选择可以参考以下公式：C = I / (f * Vpp)，其中C为滤波电容，I为输出电流，f为工作频率，Vpp为输入电源纹波峰峰值。
根据我们的设计参数，可以选择合适的输入滤波电容。
2.选择变压器：变压器是开关电源电路中至关重要的部分，它能够将输入电压通过变压比转化为我们需要的输出电压。
根据输入电压范围和输出电压的要求，我们可以选择合适的变压器。
3.设计PWM控制回路：NCP1216A内部集成了PWM控制器，我们需要根据设计参数来设置PWM控制回路的一些参数。
可以通过计算得到输出电流采样电阻的合适值，然后设置反馈通道增益。
4.选择输出电容：在单端正激电路中，输出电容能够提供平滑的直流电压给负载使用。
根据输出电流的需求和负载要求，可以选择合适的输出电容。
5.设计过压保护、过流保护电路：在电源电路中，过压和过流是常见的故障情况，我们需要设计相应的保护电路以保护电路的安全。
可以选择合适的过压保护芯片和过流保护芯片，并将其与NCP1216A芯片相连。
Tripp Lite B126-004-INT 4-Port HDMI over Cat5 Cat6
4-Port HDMI over Cat5/6 Extender/Splitter, Box-Style Transmitter, Video/Audio, 1080/60p up to 150ft, Intl Power SupplyMODEL NUMBER:B126-004-INTWorks with Tripp Lite’s B126-Series receivers to split a single HDMI signal into 5 separate signals (one local and four remote), each on one cable, to 5 projectors, monitors or televisions up to 200 feet (61 m) away.DescriptionThe B126-004-INT 4-Port HDMI over Cat5/Cat6 Extender/Splitter works with Tripp Lite B126-Series remote receivers to split a single HDMI audio/video signal into five separate signals—one local and four remote. It’s ideal for digital signs, trade shows, presentations, retail settings and other applications where the video source is located farther than conventional cables allow or that require multiple displays connected to one source.The B126-004-INT uses HDMI cable (see Tripp Lite’s P568-Series) to connect to the source and the local monitor and Cat5e/6 cable to transmit to the remote monitors (for best results, use 24 AWG solid-wire Cat5e/6 cable, such as Tripp Lite’s N202-Series).When used with Tripp Lite’s B126-1A0 or B126-1A0-WP-1 active remote receivers, the B126-004-INT can extend a 1080i (60 Hz) signal up to 200 feet (61 m), a 1080p signal (60 Hz) up to 150 feet (45.7 m) and a 3D signal up to 125 feet (38.1 m). With a B126-1P0 or B126-1P0-WP-1 passive remote receiver, it can extend a 1080i (60 Hz) signal up to 100 feet (30.5 m) and a 1080p (60 Hz) signal up to 50 feet (15.2 m). By daisy-chaining up to three B126-004-INT units, one video source can transmit to as many as 13 monitors—one local and 12 remote. Add up to three B126-110 remote repeaters to each channel to fully extend the signal range or add more displays.Easy to set up with no software or drivers to install, the unit mounts to a wall, rack or pole using the included hardware.HighlightsPerfect for digital signs, tradeshows and classroomsqCan daisy-chain up to 3 units to extend signal to 13 monitorsqWorks with all operatingsystems and HDMI videosourcesqSupports stereo and 7.1-channel surround sound audio qPlug and play—no software ordrivers to installqPackage IncludesB126-004-INT 4-Port HDMI over Cat5/Cat6 Extender/SplitterqHDMI daisy-chain cable, 12 in.(30.5 cm)qExternal power supply w/CEE7/16 Schuko, BS1363 UK andAS2112 Australia plugs (Input:100–240V, 50/60 Hz, 0.5A;Output: 5V, 2A)qMounting hardwareqOwner’s manualqSpecificationsFeaturesExtends High-Definition SignalsExtends a 1080i (60 Hz) signal up to 175 ft. (53.3 m), a 1080p (60 Hz) signal up to 125 ft. (38.1 m) and a 3D signal up to 100 ft. (30.5 m) with each optional Tripp Lite B126-110 remote repeaterq Extends a 1080i (60 Hz) signal up to 200 ft. (61 m), a 1080p (60 Hz) signal up to 150 ft. (45.7 m) and a 3D signal up to 125 ft. (38.1 m) with Tripp Lite B126-1A0 or B126-1A0-WP-1 active remote receiver qExtends a 1080i (60 Hz) signal up to 100 ft. (30.5 m) and a 1080p (60 Hz) signal up to 50 ft. (15.2 m)with Tripp Lite B126-1P0 or B126-1P0-WP-1 passive remote receiver qAdd up to 3 remote repeaters on each channel for maximum signal rangeq Daisy-chain up to 3 units to extend the original signal to as many as 13 display monitors (1 local, 12remote)qConnects to next link in the chain with one Cat5e/6 cable (for best results, use 24 AWG solid-wire Cat5e/6 cable, such as Tripp Lite’s N202-Series)qSupports the Latest Video and Audio ResolutionsWorks with all operating systems and HDMI video sourcesq Supports HD resolutions up to 1080p (60 Hz)q Supports stereo and 7.1-channel surround sound (multi-channel or PCM) audio q Supports 24-bit True Color (8 bits per channel) and HDCPqEasy to Set Up and UsePlug and play—no software or drivers to download and installq Connects quickly to source and local monitor with HDMI cable, such as Tripp Lite’s P568-Series q LEDs indicate when the unit is receiving power and an HDMI signal from the source q Included mounting hardware lets you install the unit on a wall, rack or poleq Mount up to 3 units in 1U of rack space using a Tripp Lite B132-004-RB rack-mount bracket q International power supply with CEE 7/16 Schuko, BS1363 UK and AS2112 Australia plugsq© 2023 Eaton. All Rights Reserved. Eaton is a registered trademark. All other trademarks are the property of their respective owners.。
AB 1336 REGEN Converter Control Board Replacement
Instructions1336 REGEN-5.11 May, 19981336 REGENConverter Control BoardReplacement —All RatingsThis publication will guide you through the replacement of the ConverterControl Board for all 1336 REGEN Packages.Each 1336R-MCB-SP1A kit consists of:•(1) Converter Control Board (PN 74103-571-51)•(1) Static Discharge Wrist Strap (PN 133256)ATTENTION: This product and its associated equipmentcontains ESD (Electrostatic Discharge) sensitive parts andassemblies. Static control precautions are required wheninstalling, testing, servicing or repairing this assembly.Component damage may result if ESD control procedures arenot followed. If you are not familiar with static controlprocedures, reference publication 8000-4.5.2 " Guarding AgainstElectrostatic Damage " or any other applicable ESD protection handbook.!!ATTENTION: Only personnel familiar with the 1336 REGENLine Regen Package and associated equipment should plan orimplement the installation, start-up and subsequent maintenanceof the system. Failure to comply may result in personal injuryand/or equipment damage. ATTENTION: Electric Shock can cause injury or death. Removeall power before working on this product.For all 1336 REGEN Line Regeneration Packages, a separate 120VACuser power supply is required.Hazards of electrical shock exist if accidental contact is made with partscarrying bus voltage. Before proceeding with any installation ortroubleshooting activity, allow at least one minute after input power hasbeen removed for the bus circuit to discharge. Bus voltage should beverified by using a voltmeter to measure the voltage between the DC+and DC– Converter Output Terminals.Do not attempt any servicing until bus voltage has diminished to zero volts.!DriveTools and DriveTools32 are trademarks of Rockwell International.Replacement Procedure Important:If parameters were not previously uploaded, it isrecommended that they be uploaded now if possible.Uploading parameters will allow downloading after thenew board has been installed, preventing completereprogramming. Parameters may be uploaded to a HIMwith upload/download capability, or to a hard drive usingDriveTools or DriveTools32.1.Remove and lock-out all incoming power to the 1336 REGEN LineRegeneration Package.a.Remove the Precharge Unit front cover. Measure the voltage atinput power terminals R1–S1–T1 and terminal block TB1 with avoltmeter to ensure that no voltage is present.b.Remove the Converter front cover. Measure the voltage at inputpower terminals R2–S2–T2 with a voltmeter to ensure that novoltage is present.2.Unplug all connectors to the old board including the (2) Fast-OnConnectors J15 and J16.3.Remove the screws securing the Converter Control Board.4.Install the new Converter Control Board, reconnecting allconnectors. V erify that all jumpers are correctly set. Refer to the 1336REGEN User Manual for details.!ATTENTION: Replace any guards or shields previously removed before reapplying power to the 1336 REGEN LineRegeneration Package. Failure to replace guards or shieldsmay result in death or serious injury.5.Reapply power. If a fault occurs, "Reset Defaults". Downloadparameters if previously uploaded, or re-enter parameter settings aspreviously recorded.。
ncp1216电源电路工作原理
ncp1216电源电路工作原理NCP1216 is a power conversion IC that operates based on the principle of PWM (Pulse Width Modulation) control. It is designed to provide a regulated output voltage from unregulated input sources, such as an AC adapter or a DC input. The NCP1216 integrates a high-performance voltage error amplifier, precision reference, and an oscillator with a fixed frequency of operation. When the input voltage is applied, the internal error amplifier compares the feedback voltage from the output with the reference voltage and generates an error signal. This error signal is then fed into the PWM comparator, which compares it with the sawtooth waveform from the oscillator to generate a PWM signal. The duty cycle of this PWM signal is determined by the error signal, which in turn regulates the output voltage. The NCP1216 also includes overvoltage, overcurrent, and over-temperature protection features to ensure the safety and reliability of the power supply. Overall, the NCP1216 power circuit works by continuously comparing the output voltage with a reference voltage to generate a PWM signal that controls the duty cycle of the output voltage, and it incorporates various protection mechanisms to safeguard the power supply and the connected load.中文翻译:NCP1216是一种以PWM（脉冲宽度调制）控制为基础工作的功率转换IC。
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VCDCLVP1216 SCAS877C–MAY2009–REVISED AUGUST201116LVPECL Output,High-Performance Clock BufferCheck for Samples:CDCLVP1216FEATURES DESCRIPTIONThe CDCLVP1216is a highly versatile,low additive •2:16Differential Bufferjitter buffer that can generate16copies of LVPECL •Selectable Clock Inputs Through Control Pin clock outputs from one of two selectable LVPECL,•Universal Inputs Accept LVPECL,LVDS,and LVDS,or LVCMOS inputs for a variety of LVCMOS/LVTTL communication applications.It has a maximum clockfrequency up to2GHz.The CDCLVP1216features •16LVPECL Outputsan on-chip multiplexer(MUX)for selecting one of two •Maximum Clock Frequency:2GHz inputs that can be easily configured solely through a•Maximum Core Current Consumption:110mA control pin.The overall additive jitter performance isless than0.1ps,RMS from10kHz to20MHz,and •Very Low Additive Jitter:<100fs,rms in10-kHzoverall output skew is as low as30ps,making the to20-MHz Offset Rangedevice a perfect choice for use in demanding • 2.375V to3.6V Device Power Supply applications.•Maximum Propagation Delay:550psThe CDCLVP1216clock buffer distributes one of two •Maximum Output Skew:30ps selectable clock inputs(IN0,IN1)to16pairs of •LVPECL Reference Voltage,V AC_REF,Available differential LVPECL clock outputs(OUT0,OUT15)with minimum skew for clock distribution.The for Capacitive-Coupled InputsCDCLVP1216can accept two clock sources into an •Industrial Temperature Range:–40°C to+85°Cinput multiplexer.The inputs can be LVPECL,LVDS,•ESD Protection Exceeds2kV(HBM)or LVCMOS/LVTTL.•Available in7-mm×7-mm QFN-48(RGZ)The CDCLVP1216is specifically designed for driving Package50-Ωtransmission lines.When driving the inputs insingle-ended mode,the LVPECL bias voltage APPLICATIONS(VAC_REF)should be applied to the unused negativeinput pin.However,for high-speed performance up to •Wireless Communications2GHz,differential mode is strongly recommended.•Telecommunications/NetworkingThe CDCLVP1216is packaged in a small48-pin,•Medical Imaging7-mm x7-mm QFN package and is characterized for •Test and Measurement Equipment operation from–40°C to+85°C.Please be aware that an important notice concerning availability,standard warranty,and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.All trademarks are the property of their respective owners.PRODUCTION DATA information is current as of publication date.Copyright©2009–2011,Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty.Production processing does notnecessarily include testing of all parameters.CDCLVP1216SCAS877C–MAY2009–REVISED This integrated circuit can be damaged by ESD.Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.Table1.AVAILABLE OPTIONS(1)T A PACKAGED DEVICES FEATURESCDCLVP1216RGZT48-pin QFN(RGZ)package,small tape and reel –40°C to+85°CCDCLVP1216RGZR48-pin QFN(RGZ)package,tape and reel(1)For the most current specifications and package information,see the Package Option Addendum located at the end of this data sheet orrefer to our web site at .ABSOLUTE MAXIMUM RATINGSOver operating free-air temperature range(unless otherwise noted).(1)CDCLVP1216UNITV CC Supply voltage range(2)–0.5to4.6VV IN Input voltage range(3)–0.5to V CC+0.5VV OUT Output voltage range(3)–0.5to V CC+0.5VI IN Input current20mAI OUT Output current50mAT A Specified free-air temperature range(no airflow)–40to+85°CT STG Storage temperature range–65to+150°CT J Maximum junction temperature+125°CESD Electrostatic discharge(HBM)2kV (1)Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.These are stress ratingsonly,and functional operation of the device at these or any other conditions beyond those indicated is not implied.Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.(2)All supply voltages must be supplied simultaneously.(3)The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed. RECOMMENDED OPERATING CONDITIONSOver operating free-air temperature range(unless otherwise noted).CDCLVP1216PARAMETER MIN TYP MAX UNITV CC Supply voltage 2.375 2.50/3.30 3.60VT A Ambient temperature–40+85°C PACKAGE DISSIPATION RATINGS(1)(2)VALUETEST4×4VIASPARAMETER CONDITIONS ON PAD UNIT0LFM33.8°C/WθJA Thermal resistance,junction-to-ambient150LFM22.6°C/W400LFM19.2°C/WθJP(3)Thermal resistance,junction-to-pad 3.67°C/W(1)The package thermal resistance is calculated in accordance with JESD51and JEDEC2S2P(high-K board).(2)Connected to GND with16thermal vias(0.3-mm diameter).(3)θJP(junction-to-pad)is used for the QFN package,because the primary heat flow is from the junction to the GND pad of the QFNpackage.2Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1216CDCLVP1216 SCAS877C–MAY2009–REVISED AUGUST2011ELECTRICAL CHARACTERISTICS:LVCMOS Input(1)At V CC=2.375V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1216PARAMETER TEST CONDITIONS MIN TYP MAX UNITf IN Input frequency200MHzExternal threshold voltage applied toV th Input threshold voltage 1.1 1.8Vcomplementary inputV IH Input high voltage V th+0.1V CC VV IL Input low voltage0V th–0.1VI IH Input high current V CC=3.6V,V IH=3.6V40μAI IL Input low current V CC=3.6V,V IL=0V–40μAΔV/ΔT Input edge rate20%to80% 1.5V/nsI CAP Input capacitance5pF(1)Figure3and Figure4show dc test setup.ELECTRICAL CHARACTERISTICS:Differential Input(1)At V CC=2.375V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1216PARAMETER TEST CONDITIONS MIN TYP MAX UNITf IN Input frequency Clock input2000MHzf IN≤1.5GHz0.1 1.5VV IN,DIFF,PP Differential input peak-peak voltage1.5GHz≤f IN≤2GHz0.2 1.5VV ICM Input common-mode level 1.0V CC–0.3VI IH Input high current V CC=3.6V,V IH=3.6V40μAI IL Input low current V CC=3.6V,V IL=0V–40μAΔV/ΔT Input edge rate20%to80% 1.5V/nsI CAP Input capacitance5pF(1)Figure5and Figure6show dc test setup.Figure7shows ac test setup.ELECTRICAL CHARACTERISTICS:LVPECL Output(1)At V CC=2.375V to2.625V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1216PARAMETER TEST CONDITIONS MIN TYP MAX UNITV OH Output high voltage V CC–1.26V CC–0.9VV OL Output low voltage V CC–1.7V CC–1.3VV OUT,DIFF,PP Differential output peak-peak voltage f IN≤2GHz0.5 1.35VV AC_REF Input bias voltage(2)I AC_REF=2mA V CC–1.6V CC–1.1VV IN,DIFF,PP=0.1V550pst PD Propagation delayV IN,DIFF,PP=0.3V550pst SK,PP Part-to-part skew150pst SK,O Output skew30psCrossing-point-to-crossing-point distortion,t SK,P Pulse skew(with50%duty cycle input)–5050psf OUT=100MHzf OUT=100MHz,V IN,SE=V CC,V th=1.25V,0.11ps,RMS10kHz to20MHzf OUT=100MHz,V IN,SE=0.9V,0.128ps,RMSV th=1.1V,10kHz to20MHzRandom additive jitter(with50%duty f OUT=2GHz,V IN,DIFF,PP=0.2V,t RJIT0.053ps,RMS cycle input)V ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=0.15V,0.093ps,RMSV ICM=1V,10kHz to20MHz(1)Figure8and Figure9show dc and ac test setup.(2)Internally generated bias voltage(V AC_REF)is for3.3-V operation only.It is recommended to apply externally generated bias voltage forV SS<3.0V.Copyright©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback3Product Folder Link(s):CDCLVP1216CDCLVP1216SCAS877C–MAY2009–REVISED ELECTRICAL CHARACTERISTICS:LVPECL Output(1)(continued)At V CC=2.375V to2.625V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1216PARAMETER TEST CONDITIONS MIN TYP MAX UNITf OUT=100MHz,V IN,DIFF,PP=1V,0.092ps,RMSV ICM=1V,10kHz to20MHzt R/t F Output rise/fall time20%to80%200psI EE Supply internal current Outputs unterminated110mAI CC Output and internal supply current All outputs terminated,50Ωto V CC–2618mA ELECTRICAL CHARACTERISTICS:LVPECL Output(1)At V CC=3.0V to3.6V and T A=–40°C to+85°C(unless otherwise noted).CDCLVP1216PARAMETER TEST CONDITIONS MIN TYP MAX UNITV OH Output high voltage V CC–1.26V CC–0.9VV OL Output low voltage V CC–1.7V CC–1.3VV OUT,DIFF,PP Differential output peak-peak voltage f IN≤2GHz0.65 1.35VV AC_REF Input bias voltage I AC_REF=2mA V CC–1.6V CC–1.1VV IN,DIFF,PP=0.1V550pst PD Propagation delayV IN,DIFF,PP=0.3V550pst SK,PP Part-to-part skew150pst SK,O Output skew30psCrossing-point-to-crossing-point distortion,t SK,P Pulse skew(with50%duty cycle input)–5050psf OUT=100MHzf OUT=100MHz,V IN,SE=V CC,V th=1.65V,0.101ps,RMS10kHz to20MHzf OUT=100MHz,V IN,SE=0.9V,0.130ps,RMSV th=1.1V,10kHz to20MHzRandom additive jitter(with50%duty f OUT=2GHz,V IN,DIFF,PP=0.2V,t RJIT0.069ps,RMS cycle input)V ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=0.15V,0.094ps,RMSV ICM=1V,10kHz to20MHzf OUT=100MHz,V IN,DIFF,PP=1V,0.094ps,RMSV ICM=1V,10kHz to20MHzt R/t F Output rise/fall time20%to80%200psI EE Supply internal current Outputs unterminated110mAI CC Output and internal supply current All outputs terminated,50Ωto V CC–2618mA(1)Figure8and Figure9show dc and ac test setup.4Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1216CDCLVP1216V CC OUTP11O U T N 10O U T N 8O U T N 6O U T N 9O U T N 7O U T N 5OUTN11O U T P 10O U T P 8O U T P 6O U T P 9O U T P 7O U T P 5OUTP12OUTN12OUTP13OUTN13OUTP14OUTN14OUTP15OUTN15V CCV CC OUTN4OUTP4OUTN3OUTP3OUTN2OUTP2OUTN1OUTP1OUTN0OUTP0V CC123456789101112363534333231302928272625242322212019181716151413373839404142434445464748Thermal Pad(1)G N DI N _S E LI N P 1I N N 1N CV C CV C CV A C _R E FI N N 0I N P 0N CG N DCDCLVP1216SCAS877C –MAY 2009–REVISED AUGUST 2011RGZ PACKAGEQFN-48(TOP VIEW)(1)Thermal pad must be soldered to ground.Copyright ©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback5Product Folder Link(s):CDCLVP1216CDCLVP1216SCAS877C–MAY2009–REVISED PIN DESCRIPTIONSCDCLVP1216Pin DescriptionsTERMINAL TERMINAL PULL-UP/NAME NO.TYPE PULLDOWN DESCRIPTION6,7,13,24,37,V CC Power— 2.5-/3.3-V supplies for the device48GND1,12Ground—Device groundsINP0,INN010,9Input—Differential input pair or single-ended input.Unused input pair can be left floating.INP1,INN13,4Input—Redundant differential input pair or single-ended input.Unused input pair can be left floating.OUTP15,46,47Output—Differential LVPECL output pair no.15.Unused output pair can be left floating.OUTN15OUTP14,44,45Output—Differential LVPECL output pair no.14.Unused output pair can be left floating.OUTN14OUTP13,42,43Output—Differential LVPECL output pair no.13.Unused output pair can be left floating.OUTN13OUTP12,40,41Output—Differential LVPECL output pair no.12.Unused output pair can be left floating.OUTN12OUTP11,38,39Output—Differential LVPECL output pair no.11.Unused output pair can be left floating.OUTN11OUTP10,35,36Output—Differential LVPECL output pair no.10.Unused output pair can be left floating.OUTN10OUTP9,33,34Output—Differential LVPECL output pair no.9.Unused output pair can be left floating.OUTN9OUTP8,31,32Output—Differential LVPECL output pair no.8.Unused output pair can be left floating.OUTN8OUTP7,29,30Output—Differential LVPECL output pair no.7.Unused output pair can be left floating.OUTN7OUTP6,27,28Output—Differential LVPECL output pair no.6.Unused output pair can be left floating.OUTN6OUTP5,25,26Output—Differential LVPECL output pair no.5.Unused output pair can be left floating.OUTN5OUTP4,22,23Output—Differential LVPECL output pair no.4.Unused output pair can be left floating.OUTN4OUTP3,20,21Output—Differential LVPECL output pair no.3.Unused output pair can be left floating.OUTN3OUTP2,18,19Output—Differential LVPECL output pair no.2.Unused output pair can be left floating.OUTN2OUTP1,16,17Output—Differential LVPECL output pair no.1.Unused output pair can be left floating.OUTN1OUTP0OUTN014,15Output—Differential LVPECL output pair no.0.Unused output pair can be left floating.PulldownIN_SEL2Input MUX select input for input choice(see Table3)(see Table2)Bias voltage output for capacitive coupled inputs.Do not use V AC_REF at V CC<3.0V.If V AC_REF8Output—used,it is recommended to use a0.1-μF capacitor to GND on this pin.The output current islimited to2mA.NC5,11——Do not connectTable2.Pin CharacteristicsPARAMETER MIN TYP MAX UNITSR PULLDOWN Input pulldown resistor150kΩTable3.Input Selection TableIN_SEL ACTIVE CLOCK INPUT0INP0,INN01INP1,INN16Submit Documentation Feedback Copyright©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP12160.20.40.60.81.01.21.41.62.01.8Frequency (GHz)1.00.90.80.70.60.50.4D i f f e r e n t i a l O u t p u t P e a k -t o -P e a k V o l t a g e (V)0.20.40.60.81.01.21.41.62.01.8Frequency (GHz)1.11.21.31.00.90.80.70.60.50.4D i f f e r e n t i a l O u t p u t P e a k -t o -P e a k V o l t a g e (V )CDCLVP1216SCAS877C –MAY 2009–REVISED AUGUST 2011TYPICAL CHARACTERISTICSAt T A =–40°C to +85°C (unless otherwise noted).DIFFERENTIAL OUTPUT PEAK-TO-PEAK VOLTAGEvs FREQUENCYFigure 1.DIFFERENTIAL OUTPUT PEAK-TO-PEAK VOLTAGEvs FREQUENCYFigure 2.Copyright ©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback7Product Folder Link(s):CDCLVP1216VV V thV IHmaxV ILmaxV IHminV ILminV IHV ILV th V V V GNDV CCV V CDCLVP1216SCAS877C –MAY 2009–REVISED AUGUST 2011TEST CONFIGURATIONSThis section describes the function of each block for the CDCLVP1216.Figure 3through Figure 9illustrate how the device should be setup for a variety of test configurations.Figure 3.DC-Coupled LVCMOS Input During Device TestFigure 4.V th Variation over LVCMOS LevelsFigure 5.DC-Coupled LVPECL Input During Device Test8Submit Documentation FeedbackCopyright ©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1216V VCDCLVP1216 SCAS877C–MAY2009–REVISED AUGUST2011 Figure6.DC-Coupled LVDS Input During Device TestFigure7.AC-Coupled Differential Input to DeviceFigure8.LVPECL Output DC Configuration During Device TestFigure9.LVPECL Output AC Configuration During Device TestCopyright©2009–2011,Texas Instruments Incorporated Submit Documentation Feedback9Product Folder Link(s):CDCLVP1216OUTPxOUTNxV OHV OL VOD)´INPx INNx OUTP0OUTN0OUTP1OUTN1OUTP2OUTN2OUTP15OUTN15CDCLVP1216SCAS877C –MAY 2009–REVISED AUGUST 2011Figure 10shows the output voltage and rise/fall time.Output and part-to-part skew are shown in Figure 11.Figure 10.Output Voltage and Rise/Fall Time(1)Output skew is calculated as the greater of the following:As the difference between the fastest and the slowest t PLHn (n =0,1,2....15),or as the difference between the fastest and the slowest t PHLn (n =0,1,2....15).(2)Part-to-part skew is calculated as the greater of the following:As the difference between the fastest and the slowest t PLHn (n =0,1,2....15)across multiple devices,or the difference between the fastest and the slowest t PHLn (n =0,1,2....15)across multiple devices.Figure 11.Output and Part-to-Part Skew10Submit Documentation FeedbackCopyright ©2009–2011,Texas Instruments IncorporatedProduct Folder Link(s):CDCLVP1216分销商库存信息:TICDCLVP1216RGZT CDCLVP1216RGZR CDCLVP1216EVM。