2450BL14C200T;中文规格书,Datasheet资料

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LTC2450资料

2450faFeaturesapplicationsDescription16-Bit DS ADCThe L TC ®2450 is an ultra-tiny 16-bit analog-to-digital converter . The L TC2450 uses a single 2.7V to 5.5V supply, accepts a single-ended analog input voltage, and commu-nicates through an SPI interface. It includes an integrated oscillator that does not require any external components. It uses a delta-sigma modulator as a converter core and provides single-cycle settling time for multiplexed applica-tions. The converter is available in a 6-pin, 2mm × 2mm DFN package. The internal oscillator does not require any external components. The L TC2450 includes a proprietary input sampling scheme that reduces the average input sampling current several orders of magnitude.The L TC2450 is capable of up to 30 conversions per sec-ond and, due to the very large oversampling ratio, has extremely relaxed antialiasing requirements. The L TC2450 includes continuous internal offset and full-scale calibra-tion algorithms which are transparent to the user , ensuring accuracy over time and over the operating temperature range. The converter uses its power supply voltage as the reference voltage and the single-ended, rail-to-rail input voltage range extends from GND to V CC .Following a conversion, the L TC2450 can automatically enter a sleep mode and reduce its power to less than 200nA. If the user samples the ADC once a second, the L TC2450 consumes an average of less than 50µW from a 2.7V supply.typical application■GND to V CC Single-Ended Input Range ■ 0.02LSB RMS Noise■ 2LSB INL, No Missing Codes ■ 2LSB Offset Error ■ 4LSB Full-Scale Error■Single Conversion Settling Time for Multiplexed Applications■Single Cycle Operation with Auto Shutdown ■ 350µA Supply Current ■ 50nA Sleep Current■ 30 Conversions Per Second■Internal Oscillator—No External Components Required■Single Supply, 2.7V to 5.5V Operation ■SPI Interface■Ultra-Tiny 2mm × 2mm DFN Package■System Monitoring■ Environmental Monitoring■ Direct Temperature Measurements ■ Instrumentation■ Industrial Process Control ■ Data Acquisition■Embedded ADC Upgrades3-WIRE SPIINTERFACEµFAll other trademarks are the property of their respective owners.Integral Nonlinearity, V CC = 3VINPUT VOLTAGE (V)–3.0I N L (L S B )–2.0–1.001.03.00.52450 G022.0–2.5–1.5–0.50.52.51.5V CC = V REF = 3VT A = –45°C, 25°C, 90°CLTC24502450fapin conFiGurationelectrical characteristics absolute MaxiMuM ratinGsSupply Voltage (V CC ) ...................................–0.3V to 6V Analog Input Voltage (V IN ) ............–0.3V to (V CC + 0.3V)Digital Input Voltage ......................–0.3V to (V CC + 0.3V)Digital Output Voltage ...................–0.3V to (V CC + 0.3V)Operating Temperature RangeL TC2450C ................................................0°C to 70°C L TC2450I..............................................–40°C to 85°C Storage Temperature Range ...................–65°C to 150°C Lead Temperature (Soldering, 10sec) ...................300°C(Notes 1, 2)PARAMETERCONDITIONSMIN TYP MAX UNITS Resolution (No missing codes)(Note 3)●16Bits Integral Nonlinearity (Note 4)●210LSB Offset Error ●28LSB Offset Error Drift 0.02LSB/°C Gain Error ●0.010.02% of FS Gain Error Drift 0.02LSB/°C T ransition Noise1.4µV RMSPower Supply Rejection DC100Hz-100kHz 80dBThe ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 25°C. (Note 2)analoG inputSYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITSV IN Input Voltage Range ●V CCC ININ Sampling Capacitance 0.35pFI DC_LEAK (V IN )IN DC Leakage Current V IN = GND (Note 5) V IN = V CC (Note 5)● ●–10 –10 1 110 10nA nA I CONVInput Sampling Current (Note 9)50nAThe ● denotes the specifications which apply over the full operating temperature range,otherwise specifications are at T A = 25°C.Lead Free FinishTAPE AND REAL (MINI)TAPE AND REELPART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC2450CDC#TRMPBF L TC2450CDC#TRPBF LCTR 6-Lead (2mm × 2mm) Plastic DFN 0°C to 70°C L TC2450IDC#TRMPBFL TC2450IDC#TRPBFLCTR6-Lead (2mm × 2mm) Plastic DFN–40°C to 85°CConsult L TC Marketing for parts specified with wider operating temperature ranges. Consult L TC Marketing for information on non-standard lead based finish parts.For more information on lead free part marking, go to: http://www.linear .com/leadfree/For more information on tape and reel specifications, go to: http://www.linear .com/tapeandreel/orDer inForMationLTC24502450faNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: All voltage values are with respect to GND. V CC = 2.7V to 5.5V unless otherwise specified.Note 3: Guaranteed by design, not subject to test.Note 4: Integral nonlinearity is defined as the deviation of a code from a straight line passing through the actual endpoints of the transfer curve. The deviation is measured from the center of the quantization band. Guaranteed by design, test correlation and 3 point transfer curve measurement.DiGital inputs anD DiGital outputsSYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITSV CC Supply Voltage ● 2.75.5V I CCSupply Current Conversion SleepCS = GND (Note 6) CS = VCC (Note 6)● ●350 0.05600 0.5µA µAThe ● denotes the specifications which apply over the full operating temperature range,otherwise specifications are at T A = 25°C. (Note 2)power requireMentsSYMBOL PARAMETERCONDITIONSMINTYP MAX UNITSV IH High Level Input Voltage ●V CC – 0.3V V IL Low Level Input Voltage ●0.3V I IN Digital Input Current ●–1010µA C IN Digital Input Capacitance 10pF V OH High Level Output Voltage I O = –800m A ●V CC – 0.5VV OL Low Level Output Voltage I O = –1.6mA ●0.4V I OZHi-Z Output Leakage Current●–1010µAThe ● denotes the specifications which apply over the full operating temperature range,otherwise specifications are at T A = 25°C.tiMinG characteristics The ● denotes the specifications which apply over the full operating temperaturerange,otherwise specifications are at T A = 25°C.SYMBOL PARAMETER CONDITIONSMIN TYP MAX UNITS t CONV Conversion Time ●2933.342ms f SCK SCK Frequency Range ●2MHz t lSCK SCK Low Period ●250ns t hSCK SCK High Period●250nst 1CS Falling Edge to SDO Low Z (Notes 7, 8)●0100ns t 2CS Rising Edge to SDO High Z (Notes 7, 8)●0100ns t 3CS Falling Edge to SCK Falling Edge ●100ns t KQSCK Falling Edge to SDO Valid(Note 7)●100nsNote 5: CS = V CC . A positive current is flowing into the DUT pin.Note 6: SCK = V CC or GND. SDO is high impedance.Note 7: See Figure 3.Note 8: See Figure 4.Note 9: Input sampling current is the average input current drawn from the input sampling network while the L TC2450 is actively sampling the input.LTC24502450fatypical perForMance characteristicsIntegral Nonlinearity, V CC = 5VIntegral Nonlinearity, V CC = 3VMaximum INL vs TemperatureOffset Error vs TemperatureGain Error vs TemperatureTransition Noise vs TemperatureTransition Noise vs Output CodeConversion Mode Power Supply Current vs TemperatureTEMPERATURE (°C)I N L (L S B )2.05.02450 G031.00.54.03.01.54.503.52.5–25TEMPERATURE (°C)–50O FF S E T (L S B )2.05.025751002450 G041.00.54.03.01.54.503.52.5–2550TEMPERATURE (°C)–50G A I NE R R O R (L S B )2.05.025751002450 G051.00.54.03.01.54.503.52.5–2550TEMPERATURE (°C)–50 T R A N S I T I O N N O I S ER M S (µV )1.503.001070902450 G061.000.250.500.752.502.001.252.7502.251.75–30–103050OUTPUT CODE (NORMALIZED TO FULL SCALE)0 T R A N S I T I O N N O I S ER M S (µV )1.503.000.80 1.002450 G071.000.250.500.752.502.001.252.7502.251.750.200.400.60INPUT VOLTAGE (V)–3.0I N L (L S B )–2.0–1.001.03.02450 G012.0–2.5–1.5–0.50.52.51.5V CC = V REF = 5V T A = –45°C, 25°C, 90°CINPUT VOLTAGE (V)–3.0I N L (L S B )–2.0–1.001.03.02450 G022.0–2.5–1.5–0.50.52.51.5V CC = V REF = 3VT A = –45°C, 25°C, 90°CTEMPERATURE (°C)0C O N V E R S I O N C U R R E N T (µA )2005002450 G08100400300LTC24502450faSleep Mode Power Supply Current vs Temperaturetypical perForMance characteristicsPower Supply Rejection vs Frequency at V CCTEMPERATURE (°C)0S L E E P M O D E C U R R E N T (n A )1002502450 G0950200150FREQUENCY AT V CC (Hz)110–100R E J E C T I O N (d B )–6010010k 100k2450 G10–80–20–401k 1M 10MTEMPERATURE (°C)C O N V E R S I O N T I M E (m s )3840422450 G1136343230TEMPERATURE (°C)–5010A V E R A G E P O W E R D I S S I P A T I O N (µW )100100010000–25025502450 G1275100Conversion Period vs TemperatureAverage Power Dissipation vs Temperature, V CC = 3VLTC24502450fapin FunctionsV CC (Pin 1): Positive Supply Voltage and Converter Refer-ence Voltage. Bypass to GND (Pin 3) with a 10µF capacitor in parallel with a low series inductance 0.1µF capacitor located as close to the part as possible.V IN (Pin 2): Analog Input Voltage.GND (Pin 3): Ground. Connect to a ground plane through a low impedance connection.CS (Pin 4): Chip Select Active LOW Digital Input. A LOW on this pin enables the SDO digital output. A HIGH on this pin places the SDO output pin in a high impedance state.SDO (Pin 5): Three-State Serial Data Output. SDO is used for serial data output during the DATA OUTPUT state and can be used to monitor the conversion status.SCK (Pin 6): Serial Clock Input. SCK synchronizes the serial data output. While digital data is available (the ADC is not in CONVERT state) and CS is LOW (ADC is not in SLEEP state) a new data bit is produced at the SDO output pin following every falling edge applied to the SCK pin.Exposed Pad (Pin 7): Ground. The Exposed Pad must be soldered to the same point as Pin 3.Functional block DiaGraMGNDV IN V CC 2450 BDFigure 1. Functional Block DiagramLTC24502450faCONVERTER OPERATION Converter Operation CycleThe L TC2450 is a low power , delta-sigma analog-to-digital converter with a simple 3-wire interface (see Figure 1). Its operation is composed of three successive states: CONVERT , SLEEP and DATA OUTPUT . The operat-ing cycle begins with the CONVERT state, is followed by the SLEEP state and ends with the DATA OUTPUT state (see Figure 2). The 3-wire interface consists of serial data output (SDO), serial clock input (SCK) and the active low chip select input (CS ).The CONVERT state duration is determined by the L TC2450 conversion time (nominally 33.3 milliseconds). Once started, this operation can not be aborted except by a low power supply condition (V CC < 2.1V) which generates an internal power-on reset signal.After the completion of a conversion, the L TC2450 enters the SLEEP state and remains here until both the chip select and clock inputs are low (CS = SCK = LOW). Fol-lowing this condition the ADC transitions into the DATA OUTPUT state.Figure 2. LTC2450 State Transition Diagramapplications inForMationWhile in the SLEEP state, whenever the chip select input is pulled high (CS = HIGH), the L TC2450’s power supply current is reduced to less than 200nA. When the chip select input is pulled low (CS = LOW), and SCK is maintained at a HIGH logic level, the L TC2450 will return to a normal power consumption level. During the SLEEP state, the result of the last conversion is held indefinitely in a static register .Upon entering the DATA OUTPUT state, SDO outputs the most significant bit (D15) of the conversion result. During this state, the ADC shifts the conversion result serially through the SDO output pin under the control of the SCK input pin. There is no latency in generating this result and it corresponds to the last completed conversion. A new bit of data appears at the SDO pin following each falling edge detected at the SCK input pin. The user can reliably latch this data on every rising edge of the external serial clock signal driving the SCK pin (see Figure 3).The DATA OUTPUT state concludes in one of two dif-ferent ways. First, the DATA OUTPUT state operation is completed once all 16 data bits have been shifted out and the clock then goes low, which corresponds to the 16th falling edge of SCK. Second, the DATA OUTPUT state can be aborted at any time by a LOW-to-HIGH transition on the CS input. Following either one of these two actions, the L TC2450 will enter the CONVERT state and initiate a new conversion cycle.Power-Up SequenceWhen the power supply voltage V CC applied to the con-verter is below approximately 2.1V , the ADC performs a power-on reset. This feature guarantees the integrity of the conversion result.When V CC rises above this critical threshold, the converter generates an internal power-on reset (POR) signal for approximately 0.5ms. The POR signal clears all internal registers. Following the POR signal, the L TC2450 starts a conversion cycle and follows the succession of states described in Figure 2. The first conversion result fol-lowing POR is accurate within the specifications of the device if the power supply voltage V CC is restored within the operating range (2.7V to 5.5V) before the end of the POR time interval.LTC24502450faapplications inForMationthis range. Thus the converter resolution remains at 1LSB independent of the reference voltage. INL, offset, and full-scale errors vary with the reference voltage as indicated by the Typical Performance Characteristics graphs. These error terms will decrease with an increase in the reference voltage (as the LSB size in µV increases).Input Voltage RangeThe ADC is capable of digitizing true rail-to-rail input sig-nals. Ignoring offset and full-scale errors, the converter will theoretically output an “all zero” digital result when the input is at ground (a zero scale input) and an “all one” digital result when the input is at V CC (a full-scale input).The converter offset and gain error specifications ensure that all 65536 possible codes will be produced within this voltage range. In an under-range condition, for all input voltages less than the voltage corresponding to output code 0, the converter will generate the output code 0. In an over-range condition, for all input voltages greater than the voltage corresponding to output code 65535 the converter will generate the output code 65535.Output Data FormatThe L TC2450 generates a 16-bit direct binary encoded result. It is provided, MSB first, as a 16-bit serial stream through the SDO output pin under the control of the SCK input pin (see Figure 3).Ease of UseThe L TC2450 data output has no latency, filter settling delay or redundant results associated with the conversion cycle. There is a one-to-one correspondence between the conver-sion and the output data. Therefore, multiplexing multiple analog input voltages requires no special actions.The L TC2450 performs offset and full-scale calibrations every conversion. This calibration is transparent to the user and has no effect upon the cyclic operation described previously. The advantage of continuous calibration is extreme stability of the ADC performance with respect to time and temperature.The L TC2450 includes a proprietary input sampling scheme that reduces the average input current several orders of magnitude as compared to traditional delta sigma archi-tectures. This allows external filter networks to interface directly to the L TC2450. Since the average input sampling current is 50nA, an external RC lowpass filter using a 1k Ω and 0.1µF results in <1LSB error .Reference Voltage RangeThe converter uses the power supply voltage (V CC ) as the positive reference voltage (see Figure 1). Thus, the refer-ence range is the same as the power supply range, which extends from 2.7V to 5.5V . The L TC2450’s internal noise level is extremely low so the output peak-to-peak noise remains well below 1LSB for any reference voltage withinKQlSCKhSCKFigure 3. Data Output TimingLTC24502450faDuring the data output operation the CS input pin must be pulled low (CS = LOW). The data output process starts with the most significant bit of the result being present at the SDO output pin (SDO = D15) once CS goes low. A new data bit appears at the SDO output pin following every falling edge detected at the SCK input pin. The output data can be latched by the user using the rising edge of SCK. Conversion Status MonitorFor certain applications, the user may wish to monitor the L TC2450 conversion status. This can be achieved by holding SCK HIGH during the conversion cycle. In this condition, whenever the CS input pin is pulled low (CS = LOW), the SDO output pin will provide an indication of the conversion status. SDO = HIGH is an indication of a conversion cycle in progress while SDO = LOW is an indication of a completed conversion cycle. An example of such a sequence is shown in Figure 4.Conversion status monitoring, while possible, is not re-quired for L TC2450 as its conversion time is fixed and equal at approximately 33.3ms (42ms maximum). Therefore, external timing can be used to determine the completion of a conversion cycle. SERIAL INTERFACEThe L TC2450 transmits the conversion result and receives the start of conversion command through a synchronous 3-wire interface. This interface can be used during theapplications inForMationCONVERT and SLEEP states to assess the conversion status and during the DATA OUTPUT state to read the conversion result, and to trigger a new conversion.Serial Interface Operation ModesThe following are a few of the more common interface operation examples. Many more valid control and serial data output operation sequences can be constructed based upon the above description of the function of the three digital interface pins.The modes of operation can be summarized as follows:1) The L TC2450 functions with SCK idle high (commonly known as CPOL = 1) or idle low (commonly known as CPOL = 0).2) After the 16th bit is read, the user can choose one of two ways to begin a new conversion. First, one can pull CS high (CS = ↑). Second, one can use a high-low transition on SCK (SCK = ↓).3) In a similar vein, at any time during the Data Output state, pulling CS high (CS = ↑) causes the part to leave the I/O state, abort the output and begin a new conver-sion.4) When SCK = HIGH, it is possible to monitor the conver-sion status by pulling CS low and watching for SDO to go low. This feature is available only in the idle-high(CPOL = 1) mode.SDOSCK = HICSFigure 4. Conversion Status Monitoring ModeLTC24502450faapplications inForMationSerial Clock Idle-High (CPOL = 1) ExamplesIn Figure 5, following a conversion cycle the L TC2450 automatically enters the low power sleep mode. The user can monitor the conversion status at convenient intervals using CS and SDO.CS is pulled low to test whether or not the chip is in the CONVERT state. While in the CONVERT state, SDO is HIGH while CS is LOW . In the SLEEP state, SDO is LOW while CS is LOW . These tests are not required op-erational steps but may be useful for some applications.When the data is available, the user applies 16 clock cycles to transfer the result. The CS rising edge is then used to initiate a new conversion.The operation example of Figure 6 is identical to that of Figure 5, except the new conversion cycle is triggered bythe falling edge of the serial clock (SCK). A 17th clock pulse is used to trigger a new conversion cycle.Serial Clock Idle-Low (CPOL = 0) ExamplesIn Figure 7, following a conversion cycle the L TC2450 automatically enters the low power sleep state. The user determines data availability (and the end of conversion) based upon external timing. The user then pulls CS low (CS = ↓) and uses 16 clock cycles to transfer the result. Following the 16th rising edge of the clock, CS is pulled high (CS = ↑), which triggers a new conversion.The timing diagram in Figure 8 is identical to that of Figure 7, except in this case a new conversion is triggered by SCK. The 16th SCK falling edge triggers a new conversion cycle and the CS signal is subsequently pulled high.Figure 5. Idle-High (CPOL = 1) Serial Clock Operation Example. The Rising Edge of `C `S Starts a New ConversionFigure 6. Idle-High (CPOL = 1) Clock Operation Example. A 17th Clock Pulse is Used to Trigger a New Conversion CycleLTC24502450faExamples of Aborting Cycle using CSFor some applications the user may wish to abort the I/O cycle and begin a new conversion. If the L TC2450 is in the data output state, a CS rising edge clears the remaining data bits from memory, aborts the output cycle and triggers a new conversion. Figure 9 shows an example of aborting an I/O with idle-high (CPOL = 1) and Figure 10 shows an example of aborting an I/O with idle-low (CPOL = 0).A new conversion cycle can be triggered using the CS signal without having to generate any serial clock pulses as shown in Figure 11. If SCK is maintained at a LOW logic level, after the end of a conversion cycle, a newconversion operation can be triggered by pulling CS low and then high. When CS is pulled low (CS = LOW), SDO will output the most significant bit (D15) of the result of the just completed conversion. While a low logic level is maintained at SCK pin and CS is subsequently pulled high (CS = HIGH) the remaining 15 bits of the result (D14:D0) are discarded and a new conversion cycle starts.Following the aborted I/O, additional clock pulses in the CONVERT state are acceptable, but excessive signal tran-sitions on SCK can potentially create noise on the ADC during the conversion, and thus may negatively influence the conversion accuracy.applications inForMationFigure 8. Idle-Low (CPOL = 0) Clock. The 16th SCK Falling Edge Triggers a New ConversionFigure 7. Idle-Low (CPOL = 0) Clock. CS Triggers a New ConversionLTC2450applications inForMationFigure 9. Idle-High (CPOL = 1) Clock and Aborted I/O ExampleFigure 10. Idle-Low (CPOL = 0) Clock and Aborted I/O ExampleCSFigure 11. Idle-Low (CPOL = 0) Clock and Minimum Data Output Length Example2450faLTC24502450faapplications inForMationCS = LOW Figure 12. 2-Wire, Idle-High (CPOL = 1) Serial Clock, Operation ExampleFigure 13. 2-Wire, Idle-Low (CPOL = 0) Serial Clock Operation Example2-Wire OperationThe 2-wire operation modes, while reducing the number of required control signals, should be used only if the L TC2450 low power sleep capability is not required. In addition the option to abort serial data transfers is no longer available. Hardwire CS to GND for 2-wire operation.Figure 12 shows a 2-wire operation sequence which uses an idle-high (CPOL = 1) serial clock signal. The conversion status can be monitored at the SDO output. Following a conversion cycle, the ADC enters SLEEP state and the SDO output transitions from HIGH to LOW . Subsequently 16 clock pulses are applied to the SCK input in order to serially shift the 16 bit result. Finally, the 17th clock pulse is applied to the SCK input in order to trigger a new conversion cycle.Figure 13 shows a 2-wire operation sequence which uses an idle-low (CPOL = 0) serial clock signal. The conversion status cannot be monitored at the SDO output. Following a conversion cycle, the L TC2450 bypasses the SLEEP state and immediately enters the DATA OUTPUT state. At this moment the SDO pin outputs the most significant bit (D15) of the conversion result. The user must use external timing in order to determine the end of conversion and result availability. Subsequently 16 clock pulses are applied to SCK in order to serially shift the 16-bit result. The 16th clock falling edge triggers a new conversion cycle.PRESERVING THE CONVERTER ACCURACYThe L TC2450 is designed to reduce as much as possible the conversion result sensitivity to device decoupling, PCB layout, antialiasing circuits, line and frequency perturbations. Nevertheless, in order to preserve the very high accuracy capability of this part, some simple precautions are desirable.LTC24502450faapplications inForMationDigital Signal LevelsThe L TC2450’s digital interface is easy to use. Its digital inputs (SCK and CS ) accept standard CMOS logic levels and the internal hysteresis receivers can tolerate edge rates as slow as 100µs. However , some considerations are required to take advantage of the exceptional accuracy and low supply current of this converter .The digital output signal SDO is less of a concern because it is not active during the conversion cycle.While a digital input signal is in the range 0.5V to V CC –0.5V , the CMOS input receiver may draw additional current from the power supply. Due to the nature of CMOS logic, a slow transition within this voltage range may cause an increase in the power supply current drawn by the converter , particularly in the low power operation mode within the SLEEP state. Thus, for low power consumption it is highly desirable to provide relatively fast edges for the two digital input pins SCK and CS , and to keep the digital input logic levels at V CC or GND.At the same time, during the CONVERT state, undershoot and/or overshoot of fast digital signals connected to the L TC2450 pins may alter the conversion result. Under-shoot and overshoot can occur because of an impedance mismatch at the converter pin combined with very fast transition times. This problem becomes particularly difficult when shared control lines are used and multiple reflec-tions may occur . The solution is to carefully terminate all transmission lines close to their characteristic impedance. Parallel termination is seldom an acceptable option in low power systems so a series resistor between 27Ω and 56Ω placed near the driver may eliminate this problem. The actual resistor value depends upon the trace impedance and connection topology. An alternate solution is to reduce the edge rate of the control signals, keeping in mind the concerns regarding slow edges mentioned above.Particular attention should be given to configurations in which a continuous clock signal is applied to SCK pin during the CONVERT state. While L TC2450 will ignore this signal from a logic point of view the signal edges may create unexpected errors depending upon the relation between its frequency and the internal oscillator frequency. In such a situation it is beneficial to use edge rates of about 10nsand to limit potential undershoot to less than 0.3V below GND and overshoot to less than 0.3V above V CC .Noisy external circuitry can potentially impact the output under 2-wire operation. In particular , it is possible to get the L TC2450 into an unknown state if an SCK pulse is missed or noise triggers an extra SCK pulse. In this situ-ation, it is impossible to distinguish SDO = 1 (indicating conversion in progress) from valid “1” data bits. As such, CPOL = 1 is recommended for the 2-wire mode. The user should look for SDO = 0 before reading data, and look for SDO = 1 after reading data. If SDO does not return a “0” within the maximum conversion time (or return a “1” after a full data read), generate 16 SCK pulses to force a new conversion.Driving V CC and GNDThe V CC and GND pins of the L TC2450 converter are directly connected to the positive and negative reference voltages, respectively. A simplified equivalent circuit is shown in Figure 14.The power supply current passing through the parasitic layout resistance associated with these common pins will modify the ADC reference voltage and thus negatively affect the converter accuracy. It is thus important to keep the V CC and GND lines quiet, and to connect these supplies through very low impedance traces.In relation to the V CC and GND pins, the LTC2450 com-bines internal high frequency decoupling with dampingFigure 14. LTC2450 Analog Pins Equivalent CircuitR SW (TYP)C EQ (TYP)0.35pFINTERNAL SWITCHING FREQUENCY = 4 MHz。

AT24c04 的datasheet

1Features•Medium-voltage and Standard-voltage Operation –5.0 (V CC = 4.5V to 5.5V)–2.7 (V CC = 2.7V to 5.5V)•Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K),1024 x 8 (8K) or 2048 x 8 (16K)•Two-wire Serial Interface•Schmitt Trigger, Filtered Inputs for Noise Suppression •Bi-directional Data Transfer Protocol•100 kHz (2.7V) and 400 kHz (5V) Compatibility •Write Protect Pin for Hardware Data Protection•8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes •Partial Page Writes are Allowed •Self-timed Write Cycle (5 ms max)•High-reliability–Endurance: 1 Million Write Cycles –Data Retention: 100 Years•8-lead PDIP and 8-lead JEDEC SOIC PackagesDescriptionThe AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial elec-trically erasable and programmable read-only memory (EEPROM) organized as 128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many automotive applications where low-power and low-voltage operation are essential.The AT24C01A/02/04/08/16 is available in space-saving 8-lead PDIP and 8-lead JEDEC SOIC packages and is accessed via a two-wire serial interface. In addition,the entire family is available in 5.0V (4.5V to 5.5V) and 2.7V (2.7V to 5.5V) versions.Table 1. Pin ConfigurationPin Name Function A0 - A2Address Inputs SDA Serial Data SCL Serial Clock Input WP Write Protect NCNo Connect2AT24C01A/02/04/08/163256F–SEEPR–10/04Figure 1. Block DiagramPin DescriptionSERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices.DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section).The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin is a no connect.Absolute Maximum RatingsOperating Temperature ......................................−55°C to +125°C *NOTICE:Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam-age to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.Storage Temperature .........................................−65°C to +150°C Voltage on Any Pinwith Respect to Ground ........................................−1.0V to +7.0V Maximum Operating Voltage ..........................................6.25V DC Output Current........................................................5.0 mA3AT24C01A/02/04/08/163256F–SEEPR–10/04The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The A0 and A1 pins are no connects.The AT24C16 does not use the device address pins, which limits the number of devices on a single bus to one. The A0, A1 and A2 pins are no connects.WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to V CC , the write protection feature is enabled and operates as shown see Table 2.Table 2. Write ProtectNotes:1.This device is not recommended for new designs. Please refer to A T24C08A.2.This device is not recommended for new designs. Please refer to A T24C16A.Memory OrganizationAT24C01A, 1K SERIAL EEPROM: Internally organized with 16 pages of 8 bytes each,the 1K requires a 7-bit data word address for random word addressing.AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each,the 2K requires an 8-bit data word address for random word addressing.AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each,the 4K requires a 9-bit data word address for random word addressing.AT24C08, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each,the 8K requires a 10-bit data word address for random word addressing.AT24C16, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word address for random word addressing.WP Pin StatusPart of the Array Protected24C01A 24C0224C0424C08(1)24C16(2)At V CCFull (1K) ArrayFull (2K) ArrayFull (4K) ArrayNormal Read/Write OperationUpper Half (8K) ArrayAt GND Normal Read/Write Operations4AT24C01A/02/04/08/163256F–SEEPR–10/04Note:1.This parameter is characterized and is not 100% tested.Notes:1.V IL min and V IH max are reference only and are not tested.Table 3. Pin Capacitance (1)Applicable over recommended operating range from T A = 25°C, f = 1.0 MHz, V CC = +2.7V.Symbol Test ConditionMax Units Conditions C I/O Input/Output Capacitance (SDA)8pF V I/O = 0V C IN Input Capacitance (A 0, A 1, A 2, SCL)6pFV IN = 0VTable 4. DC CharacteristicsApplicable over recommended operating range from: T A = −40°C to +125°C, V CC = +2.7V to +5.5V (unless otherwise noted).Symbol Parameter Test ConditionMin TypMax Units V CC1Supply Voltage 2.7 5.5V V CC2Supply Voltage4.55.5V I CC Supply Current V CC = 5.0V READ at 100 kHz 0.4 1.0mA I CC Supply Current V CC = 5.0V WRITE at 100 kHz 2.0 3.0mA I SB1Standby Current V CC = 2.7V V IN = V CC or V SS 1.6 4.0µA I SB2Standby Current V CC = 5.0V V IN = V CC or V SS 8.018.0µA I LI Input Leakage Current V IN = V CC or V SS 0.10 3.0µA I LO Output Leakage Current V OUT = V CC or V SS0.05 3.0µA V IL Input Low Level (1)−0.6V CC x 0.3V V IH Input High Level (1)V CC x 0.7V CC + 0.5V V OL2Output Low Level V CC = 3.0V I OL = 2.1 mA 0.4V V OL1Output Low Level V CC = 1.8VI OL = 0.15 mA 0.2V5AT24C01A/02/04/08/163256F–SEEPR–10/04Notes:1.The A T24C01A/02/04/08 bearing the process letter “D” on the package (the mark is located in the lower right corner on thetopside of the package), guarantees 400 kHz (2.5V , 2.7V).2.This parameter is characterized and is not 100% tested (T A = 25°C).3.This parameter is characterized and is not 100% tested.Device OperationCLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-nal device. Data on the SDA pin may change only during SCL low time periods (see Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop condition as defined below.START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 5 on page 7).STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.After a read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 5 on page 7).ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.Table 5. AC CharacteristicsApplicable over recommended operating range from T A = −40°C to +125°C, V CC = +2.7V to +5.5V, CL = 1 TTL Gate and 100 pF (unless otherwise noted).Symbol ParameterAT24C01A/02/04/08,2.7VAT24C16, 2.7V AT24C01A/02/04/08/16,5.0V Units Min Max MinMax MinMax f SCL Clock Frequency, SCL 400(1)400400kHz t LOW Clock Pulse Width Low 1.2 1.2 1.2µs t HIGH Clock Pulse Width High 0.60.60.6µst I Noise Suppression Time (2)505050ns t AA Clock Low to Data Out Valid 0.10.90.10.90.10.9µs t BUF Time the bus must be free before a new transmission can start (3) 1.2 1.2 1.2µs t HD.STA Start Hold Time 0.60.60.6µs t SU.STA Start Set-up Time 0.60.60.6µs t HD.DAT Data In Hold Time 000µs t SU.DA T Data In Set-up Time 100100100nst R Inputs Rise Time (3)300300300ns t F Inputs Fall Time (3)300300300ns t SU.STO Stop Set-up Time 0.60.60.6µs t DH Data Out Hold Time 505050nst WRWrite Cycle Time 555ms Endurance5.0V , 25°C1M1M1MWrite Cycles6AT24C01A/02/04/08/163256F–SEEPR–10/04STANDBY MODE: The AT24C01A/02/04/08/16 features a low-power standby mode which is enabled: (a) upon power-up and (b) after the receipt of the Stop bit and the completion of any internal operations.MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps:1.Clock up to 9 cycles.2.Look for SDA high in each cycle while SCL is high.3.Create a start condition.Bus TimingFigure 2. SCL: Serial Clock, SDA: Serial Data I/OWrite Cycle TimingFigure 3. SCL: Serial Clock, SDA: Serial Data I/ONote:1.The write cycle time t WRis the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.7AT24C01A/02/04/08/163256F–SEEPR–10/04Figure 4. Data ValidityFigure 5. Start and Stop DefinitionFigure 6.Output Acknowledge8AT24C01A/02/04/08/163256F–SEEPR–10/04Device AddressingThe 1K, 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Figure 7on page 9).The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. This is common to all the EEPROM devices.The next 3 bits are the A2, A1 and A0 device address bits for the 1K/2K EEPROM.These 3 bits must compare to their corresponding hard-wired input pins.The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page address bit. The two device address bits must compare to their corre-sponding hard-wired input pins. The A0 pin is no connect.The 8K EEPROM only uses the A2 device address bit with the next 2 bits being for memory page addressing. The A2 bit must compare to its corresponding hard-wired input pin. The A1 and A0 pins are no connect.The 16K does not use any device address bits but instead the 3 bits are used for mem-ory page addressing. These page addressing bits on the 4K, 8K and 16K devices should be considered the most significant bits of the data word address which follows.The A0, A1 and A2 pins are no connect.The eighth bit of the device address is the read/write operation select bit. A read opera-tion is initiated if this bit is high and a write operation is initiated if this bit is low.Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the chip will return to a standby state.Write OperationsBYTE WRITE: A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condi-tion. At this time the EEPROM enters an internally timed write cycle, t WR , to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 8 on page 10).PAGE WRITE: The 1K/2K EEPROM is capable of an 8-byte page write, and the 4K, 8K and 16K devices are capable of 16-byte page writes.A page write is initiated the same as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to seven (1K/2K) or fifteen (4K, 8K, 16K) more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition (see Figure 9 on page 10).The data word address lower three (1K/2K) or four (4K, 8K, 16K) bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address,internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than eight (1K/2K) or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data word address will “roll over” and previ-ous data will be overwritten.ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-9AT24C01A/02/04/08/163256F–SEEPR–10/04ing a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero allowing the read or write sequence to continue.Read OperationsRead operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read.CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the cur-rent page to the first byte of the same page.Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out.The microcontroller does not respond with an input zero but does generate a following stop condition (see Figure 10 on page 10).RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition (see Figure 11 on page 11).SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequen-tial read will continue. The sequential read operation is terminated when the microcontroller does not respond with a zero but does generate a following stop condi-tion (see Figure 12 on page 11).Figure 7.Device Address10AT24C01A/02/04/08/163256F–SEEPR–10/04Figure 8. Byte WriteFigure 9. Page Write(* = DON’T CARE bit for 1K)Figure 10.Current Address Read11AT24C01A/02/04/08/163256F–SEEPR–10/04Figure 11. Random Read(* = DON’T CARE bit for 1K)Figure 12.Sequential Read12AT24C01A/02/04/08/163256F–SEEPR–10/04AT24C01A Ordering InformationOrdering Code Package Operation Range A T24C01A-10P A-5.0C A T24C01A-10SA-5.0C 8P38S1Automotive (−40°C to 125°C)A T24C01A-10P A-2.7C A T24C01A-10SA-2.7C8P38S1Automotive (−40°C to 125°C)Package Type8P38-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)8S18-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)Options−5.0Standard Operation (4.5V to 5.5V)−2.7Low-voltage (2.7V to 5.5V)13AT24C01A/02/04/08/163256F–SEEPR–10/04AT24C02 Ordering InformationOrdering Code Package Operation Range A T24C02-10P A-5.0C A T24C02N-10SA-5.0C 8P38S1Automotive (−40°C to 125°C)A T24C02-10P A-2.7C A T24C02N-10SA-2.7C8P38S1Automotive (−40°C to 125°C)Package Type8P38-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)8S18-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)Options−5.0Standard Operation (4.5V to 5.5V)−2.7Low-voltage (2.7V to 5.5V)14AT24C01A/02/04/08/163256F–SEEPR–10/04AT24C04 Ordering InformationOrdering Code Package Operation Range A T24C04-10P A-5.0C A T24C04N-10SA-5.0C 8P38S1Automotive (−40°C to 125°C)A T24C04-10P A-2.7C A T24C04N-10SA-2.7C8P38S1Automotive (−40°C to 125°C)Package Type8P38-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)8S18-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)Options−5.0Standard Operation (4.5V to 5.5V)−2.7Low-voltage (2.7V to 5.5V)15AT24C01A/02/04/08/163256F–SEEPR–10/04Note:1.This device is not recommended for new designs. Please refer to A T24C08A.AT24C08(1) Ordering InformationOrdering Code Package Operation Range A T24C08-10P A-5.0C A T24C08N-10SA-5.0C 8P38S1Automotive (−40°C to 125°C)A T24C08-10P A-2.7C A T24C08N-10SA-2.7C 8P38S1Automotive (−40°C to 125°C)Package Type8P38-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)8S18-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)Options−5.0Standard Operation (4.5V to 5.5V)−2.7Low-voltage (2.7V to 5.5V)16AT24C01A/02/04/08/163256F–SEEPR–10/04Note:1.This device is not recommended for new designs. Please refer to A T24C16A.AT24C16(1) Ordering InformationOrdering Code Package Operation Range A T24C16-10P A-5.0C A T24C16N-10SA-5.0C 8P38S1Automotive (−40°C to 125°C)A T24C16-10P A-2.7C A T24C16N-10SA-2.7C 8P38S1Automotive (−40°C to 125°C)Package Type8P38-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)8S18-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)Options−5.0Standard Operation (4.5V to 5.5V)−2.7Low-voltage (2.7V to 5.5V)17AT24C01A/02/04/08/163256F–SEEPR–10/04Packaging Information8P3 – PDIP18AT24C01A/02/04/08/163256F–SEEPR–10/048S1 – JEDEC SOIC3256F–SEEPR–10/04Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise,to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI-TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDEN-TAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABIL ITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBIL ITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.Atmel CorporationAtmel Operations2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311Fax: 1(408) 487-2600Regional HeadquartersEuropeAtmel SarlRoute des Arsenaux 41Case Postale 80CH-1705 Fribourg SwitzerlandTel: (41) 26-426-5555Fax: (41) 26-426-5500AsiaRoom 1219Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong KongTel: (852) 2721-9778Fax: (852) 2722-1369Japan9F, Tonetsu Shinkawa Bldg.1-24-8 ShinkawaChuo-ku, Tokyo 104-0033JapanTel: (81) 3-3523-3551Fax: (81) 3-3523-7581Memory2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311Fax: 1(408) 436-4314Microcontrollers2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311Fax: 1(408) 436-4314La Chantrerie BP 7060244306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18Fax: (33) 2-40-18-19-60ASIC/ASSP/Smart CardsZone Industrielle13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00Fax: (33) 4-42-53-60-011150 East Cheyenne Mtn. Blvd.Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300Fax: 1(719) 540-1759Scottish Enterprise Technology Park Maxwell BuildingEast Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000Fax: (44) 1355-242-743RF/AutomotiveTheresienstrasse 2Postfach 353574025 Heilbronn, Germany Tel: (49) 71-31-67-0Fax: (49) 71-31-67-23401150 East Cheyenne Mtn. Blvd.Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300Fax: 1(719) 540-1759Biometrics/Imaging/Hi-Rel MPU/High Speed Converters/RF DatacomAvenue de Rochepleine BP 12338521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00Fax: (33) 4-76-58-34-80Literature Requests/literature© Atmel Corporation 2004. All rights reserved. Atmel ®, logo and combinations thereof, are registered trademarks, and Everywhere You Are SM is the trademark of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.。

EL2450CN资料

Power Dissipation Storage Temperature Range Ambient Operating Temperature Range Operating Junction Temperature
See Curves -65°C to +150°C -40°C to +85°l Characteristics
VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, unless otherwise specified. Parameter AVOL Open Loop Gain Description Test Conditions VS = +12V, V OUT = +2V to +9V, RL = 1kΩ to GND VOUT = +1.5V to +3.5V, RL = 1kΩ to GND VOUT = +1.5V to +3.5V, RL = 150Ω to GND VOP Positive Output Voltage Swing VS = +12V, AV = +1, RL = 1kΩ to 0V VS = +12V, AV = +1, RL = 150Ω to 0V VS = ±5V, AV = +1, RL = 1kΩ to 0V VS = ±5V, AV = +1, RL = 150Ω to 0V VS = +3V, AV = +1, RL = 150Ω to 0V 3.4 1.8 9.6 Min 60 Typ 80 70 60 10.8 10.0 4.0 3.8 1.95 Max Unit dB dB dB V V V V V

NZX33B,133;NZX9V1C,133;NZX7V5C,133;NZX3V9B,133;NZX3V9A,133;中文规格书,Datasheet资料

4 of 13
/
NXP Semiconductors
NZX series
Single Zener diodes
Table 8. Characteristics per type; NZX2V1B to NZX18C …continued Tj = 25 C unless otherwise specified. NZXxxx Sel Working voltage VZ (V) IZ = 5 mA Min 7V5 A B C D X 8V2 A B C D 9V1 A B C D E 10 A B C D 11 A B C D 12 A B C D X 13 A B C 14 A B C 7.0 7.2 7.3 7.5 7.07 7.7 7.9 8.1 8.3 8.5 8.7 8.9 9.1 9.3 9.5 9.7 9.9 10.2 10.4 10.7 10.9 11.1 11.4 11.6 11.9 12.2 11.44 12.4 12.6 12.9 13.2 13.5 13.8 Max 7.3 7.6 7.7 7.9 7.45 8.1 8.3 8.5 8.7 8.9 9.1 9.3 9.5 9.7 9.9 10.1 10.3 10.6 10.8 11.1 11.3 11.6 11.9 12.1 12.4 12.7 12.03 12.9 13.1 13.4 13.7 14.0 14.3 35 0.05 9.8 35 0.1 8 35 0.1 8 25 0.1 8 25 0.2 7 20 0.5 6 20 0.7 5 Differential resistance rdif () IZ = 5 mA Max 15 Max 1 VR (V) 5 Reverse current IR (A)

C1419中文资料

Vectron International · v.2005-02-10 · page 1 of 3Vectron International Headquarters Vectron International LLC. 100 Watts StreetVectron international GmbH & Co. KG LandstrasseVectron Asia Pacific Sales OfficeUnit 3119 31st Floor, Jin Mao Tower, 88Typical ApplicationsFeaturesTelecommunication Standard 4-Pin DIP Package Universal Clock Enable FunctionPrevious Vectron Model NumbersMCO1XXX; AA;Frequency range1 MHz – 100 MHzFrequency stabilities 1ParameterMin Typ Max. Units Operating temprange Ordering Code 5Overall (vs. Initial, vs. operatingtemperature range vs. supply voltage change vs. load change vs. aging /1. Yea)r-100.0 -50.0 -25.0 -100.0 -50.0 -32.0+100.0 +50.0 +25.0 +100.0 +50.0 +32.0ppm ppm ppm ppm ppm ppm-0 … +70°C -0 … +70°C -0 … +70°C -40 … +85°C -40 … +85°C -40 … +85°CC104 C505 C255 F104 F505 F325Supply voltageParameterMin Typ Max. Units ConditionOrdering Code 5Supply voltage (Vs)4.755.0 5.25 VDCSV050Current consumption40 50 55 70 mA@ HCMOS fo < 24.0 MHz @ HCMOS fo < 50.0 MHz @ HCMOS fo < 70.0 MHz @ HCMOS fo < 100.0 MHz Supply voltage (Vs) 3.135 3.3 3.465 VDC SV033 Current consumption30 35 40 50mA@ HCMOS fo < 24.0 MHz @ HCMOS fo < 50.0 MHz @ HCMOS fo < 70.0 MHz @ HCMOS fo < 100.0 MHzRF outputParameter Min Typ Max.Units ConditionOrdering Code 5SignalHCMOSRFHLoad15.0 pFRise and Fall time 10 ns @ 15 pF 10 to 90 %Duty cycle4060%@ Vs/2Vectron International · v.2005-02-10 · page 2 of 3Vectron International Headquarters Vectron International LLC.100 Watts StreetVectron international GmbH & Co. KGLandstrasseVectron Asia Pacific Sales OfficeUnit 3119 31st Floor, Jin Mao Tower, 88EnclosuresAbsolute Maximum RatingsParameter Min Typ Max. Units Condition Supply voltage (Vs) 7 VOperable temperature range -30 +80 °CStorage temperature range -40 +90 °CVectron International · v.2005-02-10 · page 3 of 3Vectron International Headquarters Vectron International LLC.100 Watts StreetVectron international GmbH & Co. KGLandstrasseVectron Asia Pacific Sales OfficeUnit 3119 31st Floor, Jin Mao Tower, 88How to Order this Product:Step 1 Use this worksheet to forward the following information to your factory representative:Model Stability Code Supply Voltage Code RF Output Code Package Code C1419Example: C1419 C104 SV050 RFH A1Step 2 The factory representative will then respond with a Vectron Model Number in the following Configuration: Model Package Code Dash Dash NumberC1419 [Customer Specified Package Code]- [Factory Generated 4 digit number] Typical P/N = C1419A1-0001Notes:1 Contact factory for improved stabilities or additional product options. Not all options and codes are available at all frequencies.2 Unless otherwise stated all values are valid after warm-up time and refer to typical conditions for supply voltage, frequency controlvoltage, load, temperature (25°C)3 Phase noise degrades with increasing output frequency.4 Subject to technical modification.5 Contact factory for availability.。

BDC01DRL1G;中文规格书,Datasheet资料

BDC01DOne Watt Amplifier TransistorNPN SiliconFeatures•Pb−Free Package is Available*MAXIMUM RATINGSRating Symbol Value Unit Collector−Emitter Voltage V CEO100Vdc Collector−Base Voltage V CBO100Vdc Emitter−Base Voltage V EBO 5.0Vdc Collector Current − Continuous I C0.5AdcTotal Device Dissipation @ T A = 25°C Derate above 25°C P D 1.08.0WmW/°CTotal Device Dissipation @ T C = 25°C Derate above 25°C PD 2.520WmW/°COperating and Storage JunctionTemperature RangeT J, T stg−55 to +150°C THERMAL CHARACTERISTICSCharacteristicSymbol Max Unit Thermal Resistance, Junction−to−Ambient R q JA125°C/W Thermal Resistance, Junction−to−Case R q JC50°C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.Device Package ShippingORDERING INFORMATIONBDC01DRL1TO−922000 / Tape & ReelBDC01DRL1G TO−92(Pb−Free)5000 / Tape & ReelCOLLECTOR31EMITTERELECTRICAL CHARACTERISTICS (T A = 25°C unless otherwise noted)CharacteristicSymbolMinMaxUnitOFF CHARACTERISTICS Collector −Emitter Voltage(I C = 10 mA, I B = 0)V (BR)CEO 100−Vdc Collector Cutoff Current(V CB = 100 V, I E = 0)I CBO −0.1m Adc Emitter Cutoff Current(I C = 0, V EB = 5.0 V)I EBO−100nAdcON CHARACTERISTICSDC Current Gain(I C = 100 mA, V CE = 1.0 V)(I C = 500 mA, V CE = 2.0 V)h FE4025400−−Collector −Emitter Saturation Voltage (Note 1)(I C = 1000 mA, I B = 100 mA)V CE(sat)−0.7Vdc Collector −Emitter On Voltage (Note 1)(I C = 1000 mA, V CE = 1.0 V)V BE(on)−1.2VdcDYNAMIC CHARACTERISTICSCurrent Gain Bandwidth Product(I C = 200 mA, V CE = 5.0 V, f = 20 MHz)f T 50−MHz Output Capacitance(V CB = 10 V, I E = 0, f = 1.0 MHz)C ob−30pF1.Pulse Test: Pulse Width v 300 m s; Duty Cycle2.0%.Figure 1. DC Current GainI C , COLLECTOR CURRENT (mA)4000.50.7 1.0 2.0 3.0 5.07.01020305070100200200100806040h F E , D C C U R R E N T G A I N300500I B , BASE CURRENT (mA)Figure 2. Collector Saturation Region V C E , C O L L E C T O R −E M I T T E R V O L T A G E (V O L T S1.00.60.40.20I C , COLLECTOR CURRENT (mA)Figure 3. “On” VoltagesV , V O L T A G E (V O L T S )I C , COLLECTOR CURRENT (mA)Figure 4. Base−Emitter Temperature Coefficient −0.8−2.8−1.2−1.6−2.0−2.4V B , T E M P E R A T U R E C O E F F I C I E N T (m V /C )°θC , C A P A CI T A N CE (pF )Figure 5. CapacitanceV R , REVERSE VOLTAGE (VOLTS)80604020104.08.06.0Figure 6. Current−Gain — Bandwidth Product I C , COLLECTOR CURRENT (mA)300200100705030f , C U R R E N T −G A I N Ċ B A N D W I D T H P R O D U C T (M H z )T V CE , COLLECTOR−EMITTER VOLTAGE (VOLTS)2 k 1.0I C , C O L L E C T O R C U R R E N T (m A )2.0 5.0Figure 7. Active Region — Safe Operating Area500200100502010102060801001 kPACKAGE DIMENSIONSTO−92 (TO−226)CASE 29−10ISSUE ALNOTES:1.DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.2.CONTROLLING DIMENSION: INCH.3.CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED.4.DIMENSION F APPLIES BETWEEN P AND L.DIMENSIONS D AND J APPLY BETWEEN L AND K MIMIMUM. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM.DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.1750.205 4.44 5.21B 0.2900.3107.377.87C 0.1250.165 3.18 4.19D 0.0180.0210.4570.533F 0.0160.0190.4070.482G 0.0450.055 1.15 1.39H 0.0950.105 2.42 2.66J 0.0180.0240.460.61K 0.500−−−12.70−−−L 0.250−−− 6.35−−−N 0.0800.105 2.04 2.66P −−−0.100−−− 2.54R0.135−−−3.43−−−STYLE 14:PIN 1.EMITTER2.COLLECTOR3.BASEON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息: ONSEMIBDC01DRL1G。

FCL 系列产品说明书

Free Chlorine Amperometric SensorsProduct InstructionsParts covered by this product data sheet include:FCL502, FCL505, FCL510, FC72, FCLA-5015, FCLA-5016, FCLA-5017, FCLA-50182.0 pHFree Chlorine (FCL) exists as hypochlorous acid and hypochlorite anion. The acid-base dissociation of FCL has a pKa of approximately 7.5. The FCL sensor responds to hypochlorous acid and hypochlorite anion with different sensitivity. In combination, an increase in pH reduces themea-sured FCL and decrease in pH increases the measured FCL. For the most accurate free chlorine measurement, keep system pH at <6.5.2.1 Chemical InterferencesThe sensor should not be used in water containing surfactants. Monochloramine and ozone are interferences.2.2 FlowTo acheive reproducible measurements, the (FCL) free chlorine require a specified constant flow rate. To avoid complications (such as bubbles), it is best to operate the sensors at a flow rate of 0.2 - 0.6 gpm if using flow cell FC72 or FC70 (old version). Use of a flowmeter is recommended (FM001- See Section 4.1)2.3 PressurePressure is relieved via a small vent hole covered with a silicone sleeve (FIG1). DO NOT REMOVE THE SLEEVE, even when refilling the sensor.Section 1.0Theory of Operation1.0 Free Chlorine DefinedFree Chlorine or "freely active chlorine" is defined as the sum of molecu-lar chlorine (Cl 2), hypochlorous acid (HOCl) and hypochlorite ions (OCl -). Molecular chlorine occurs at pH values <pH4. Hypochlorus acid and hypochlorite ions are in pH dependent equilibrium with one another. Hypochlorous acid is a much stronger disinfecting agent (oxidizer) as compared to hypochlorite ions.1.1 Sensor Operating PrincipleOnly hypochlorous acid (HOCl) diffuses through the membrane be-tween the cathode and sample solution. At the applied potential, only hyphochlorous acid is electrochemically reduced. HOCl is reduced to chloride ion at the gold cathode. At the same time, the silver anode is oxidized to form silver chloride (AgCl). When the concentration of HOCl at the cathode is dramatically decreased by electrochemical reduction, hypochlorite ion will be transformed into hypochlorous acid, and to some extent, by proton transfer. The release of electrons at the cathode and acceptance at the anode creates a current flow, which under constant conditions, is proportional to the free chlorine concen-tration in the medium outside the sensor. The resulting low currentoutput is then conditioned to 4-20mA current or Modbus 485 output by the sensor's onboard electronic circuitry.Section 2.0Factors Influencing the SensorpH CorrectionIf your system is >6.5 pH compensation should be applied to the measured output as follows:K(pH) = a 1 *pH 4 + a 2 *pH 3 + a 3 *pH 2 + a 4 *pH + a 5Where a 1= 0.006817 a 2= -0.000764468 a 3= -2.406291a 4= -23.75 a 5= -63.0508i corrected = [i measured - 4.2mA/k(pH), FCL(ppm) = i corrected /slopeFC72 Flow cellEnsure flow cell is mounted at 45 deg or higher above horizon-tal as shown in FIG 2B.4.1 Flow MeterTo control flow to the flow cell, a flow meter is recommended.Sensorex supplies model FM001 for this purpose. The FM001provides flow control from 0.1 to 1.0 GPM (0.5 to 4.0 LPM) with94% accuracy.FIG. 3SECTION 5.0Sensor Installation5.0 Sensor Installation into Flow Cella)First install threaded fitting onto sensor body (remove fitting if pre-installed in flow cell) FIG 2d b)Install snap-ring into groove on sensor bodyc)Next, slide o-ring onto body of sensor until it reaches bottom of threaded fitting.d) Thread sensor assembly into top of flow cell as shown in FIG 2c.e) Turn on flow and verify the flow through the Flow Cell is at least 0.2 gpm (45 liters/hour and no more than 0.6gpm (135 liters/hour).6.0 Electrical InstallationThe sensor is supplied in 2 output types, 4-20mA or Modbus 485.Ou tput of 4 mA in air and 20 mA at the top range of free chlorine output (0-2ppm, 0-5ppm and 0-10ppm) or Modbus 485.NOTE: The supply voltage to the Sensor must be 12-24 V DC with minimum of 250 mA. Maximum load is 1 Watt. The sensor has 2 wires, red (+), black (-). Attach the red wire to the power supply positive ter-minal (+) and the black wire to the PLC or DVM positive (+) terminal. Connect a wire (customer supplied) from the power suppy negative (-) and the PLC or DVM (-). See FIG 3. See FIG3A for Modbus connections.SECTION 6.0Electrical InstallationSECTION 7.0Sensor Conditioning7.0 Sensor ConditioningThe sensor requires conditioning prior to generating stable values.a) For new Sensors, connect the sensor to power and allow to run overnight (at least 12 hours) before calibration.b) If the Sensor will be un-powered for two hours or more, run for two hours prior to use.c) If the Sensor's flow will be off for one hour or less, run the sensor for at least one hour prior to recalibration.d) After membrane/electrolyte replacement, allow the Sensor to run powered overnight (at least 12 hours) before calibration .4.1.1 Install the flow meter and flow cell as shown in FIG 2C.Follow the diagram so that the incoming water is attached to the bottom of the flow meter (where flow adjustment knob is located).FIG. 7FIG. 6c) Adjust span/slope at PLC/4-20mA devic e for 4-20mA models only.d) Repeat this slope calibration one day after sensor is initially installed.e) Repeat the slope calibration weekly.Section 9.0Sensor Storage9.0 StorageStore sensor at 5o C - 50o C only and maximum humidity of 95% non-condensing.a) Short Term Storage (one week or less): Store in Flow cell with water to prevent the probe from drying out.b) Intermediate Term (one week to one month): Store with cap on sen-sor in a beaker with water to keep membrane wet.c) Long Term (one month or longer): Remove Membrane Cap and store cap completely immersed in tap water. Remove fill solution and pour down drain.Note: Electrolyte shelf life is one year from date of mfg (see bottle).Section 10.0Sensor Maintenance10.0 Membrane Cap ReplacementIf membrane replacement is required, a new cap with preinstalled mem-brane must be used. Two caps and 2 bottles of refill solution are shipped with each sensor. Additional caps are ordered as FCLA-5016, and refill solution as FCLA-5015.To change membrane cap:a) Turn sensor upside down with cap facing upward.b) Rotate cap counter-clockwise to remove (SEE FIG 5).c) Place needle tip on syringe as shown in FIG 6d) Remove solution from bottle with needle and syringe (FIG 7)e) Fill sensor body with electrolyte using needle and bottle of refill solution until it flows out of the holes near the cathode(SEE FIG 8).f) Add a few drops of electrolyte to the membrane cap (FIG 9)g) Install new membrane cap by threading cap onto sensor rotating cap clockwise (Opposite of FIG 5).DO NOT TOUCH THE CATHODE DURING THIS PROCESS SINCE IT CAN BE DAMAGED.F C LA -7000F C L A -7000FIG. 3A3. Pressure fluctuation in sample lineFCLA-7000Free Chlorine /Chlorine Dioxide Colorimeter-eXact 7+, requires CLDA-7001 strips5.58"(142mm)3.82"(97mm)2.25"(57mm)2.25"(57mm)4.61"(117mm)10.19"(259mm)3.78"(96mm)GPM LPMstay this way – do not put a flat on the cathode.7))Check tbrighter and shinier than before (FIG. 5) the operation using the abrasive paper. 8))as the gold surface can be easily damaged.membrane pocket (FIG. 7)the sensor.cap with a towel.10.0DAMAGE TO THE GOLD ELECTRODE.* *。

雅特力 AT32F415系列数据手册说明书

基于ARM®32位的Cortex®-M4微控制器，带64 K字节至256 K字节闪存、sLib、USB OTG、11个定时器、1个ADC、2个比较器、12个通信接口功能⏹内核：ARM®32位的Cortex®-M4 CPU−最高150 MHz工作频率，带存储器保护单元(MPU)，内建单周期乘法和硬件除法−具有DSP指令集⏹存储器−从64 K字节至256 K字节的闪存程序/数据存储器− 18 K字节的系统存储器可作启动加载程序(Bootloader)用外，也可一次性配置成一般用户程序和数据区− 32 K字节的SRAM− sLib：将指定之主存储区设为执行代码安全库区，此区代码仅能调用无法读取⏹时钟、复位和电源管理− 2.6至3.6伏供电和I/O引脚−上电/断电复位(POR/PDR)、可编程电压监测器(PVD)− 4至25 MHz晶体振荡器−内嵌经出厂调校的48 MHz RC振荡器(25 °C达1 %精度，-40 °C至+105 °C达2.5 %精度)，带自动时钟校准功能(ACC)−内嵌带校准的40 kHz RC振荡器−带校准功能的32 kHz晶体振荡器⏹低功耗−睡眠、停机、和待机模式− V BAT为ERTC和20个32位的后备寄存器供电⏹1个12位A/D转换器，0.5 μs转换时间(多达16个输入通道)−转换范围：0至3.6 V−一组采样和保持功能−温度传感器⏹2个比较器⏹DMA：14通道DMA控制器−支持的外设：定时器、ADC、SDIO、I2S、SPI、I2C、和USART⏹调试模式−串行线调试(SWD)和JTAG接口⏹多达55个快速I/O端口− 27/39/55个多功能双向的I/O口，所有I/O口可以映像到16个外部中断；几乎所有I/O口可容忍5V输入信号−所有I/O口均为快速I/O，寄存器存取速度最高f AHB/2⏹多达11个定时器−多达5个16位定时器+2个32位定时器，每个定时器有多达4个用于输入捕获/输出比较/PWM或脉冲计数的通道和增量编码器输入− 1个16位带死区控制和紧急刹车，用于电机控制的PWM高级控制定时器− 2个看门狗定时器(独立的和窗口型的)−系统时间定时器：24位自减型计数器⏹ERTC：增强型RTC，具亚秒级精度及硬件日历⏹多达12个通信接口− 2个I2C接口(支持SMBus/PMBus)−多达5个USART接口(支持ISO7816，LIN，IrDA接口和调制解调控制)− 2个SPI接口(50M位/秒)，2个均可复用为I2S接口− CAN接口(2.0B主动)，内置256字节的专用SRAM− USB 2.0全速设备/主机/OTG控制器，内置1280字节的专用SRAM，设备模式时支持无晶振(Crystal-less)− SDIO接口⏹CRC计算单元⏹96位的芯片唯一代码⏹封装− LQFP64 10 x 10 mm− LQFP64 7 x 7 mm− LQFP48 7 x 7 mm− QFN48 6 x 6 mm− QFN32 4 x 4 mm目录1介绍 (9)2规格说明 (10)2.1器件一览 (11)2.2概述 (12)2.2.1ARM®Cortex®-M4，配有DSP指令 (12)2.2.2存储器保护单元(MPU) (14)2.2.3闪存存储器 (14)2.2.4循环冗余校验(CRC)计算单元 (14)2.2.5内置SRAM (14)2.2.6嵌套的向量式中断控制器(NVIC) (14)2.2.7外部中断/事件控制器(EXTI) (15)2.2.8时钟和启动 (15)2.2.9启动模式 (17)2.2.10供电方案 (17)2.2.11供电监控器 (17)2.2.12电压调压器 (17)2.2.13低功耗模式 (18)2.2.14直接存储器访问控制器(DMA) (18)2.2.15增强型实时时钟(ERTC)和后备份寄存器 (18)2.2.16定时器和看门狗 (19)2.2.17内部集成电路总线(I2C) (21)2.2.18通用同步/异步收发器(USART) (21)2.2.19串行外设接口(SPI) (21)2.2.20内部集成音频接口(I2S) (21)2.2.21安全数字输入/输出接口(SDIO) (21)2.2.22控制器区域网络(CAN) (21)2.2.23通用串行总线OTG全速(USB OTG FS) (22)2.2.24通用输入输出口(GPIO) (22)2.2.26模拟/数字转换器(ADC) (22)2.2.27温度传感器 (22)2.2.28比较器(COMP) (23)2.2.29串行线JTAG调试口(SWJ-DP) (23)3引脚定义 (24)4存储器映像 (30)5电气特性 (31)5.1测试条件 (31)5.1.1最小和最大数值 (31)5.1.2典型数值 (31)5.1.3典型曲线 (31)5.1.4负载电容 (31)5.1.5引脚输入电压 (31)5.1.6供电方案 (32)5.1.7电流消耗测量 (32)5.2绝对最大额定值 (33)5.3工作条件 (34)5.3.1通用工作条件 (34)5.3.2上电和掉电时的工作条件 (34)5.3.3内嵌复位和电源控制模块特性 (35)5.3.4内置的参照电压 (36)5.3.5供电电流特性 (36)5.3.6外部时钟源特性 (44)5.3.7内部时钟源特性 (48)5.3.8PLL特性 (50)5.3.9存储器特性 (50)5.3.10EMC特性 (51)5.3.11绝对最大值(电气敏感性) (52)5.3.13NRST引脚特性 (55)5.3.14TMR定时器特性 (55)5.3.15通信接口 (56)5.3.16CAN(控制器局域网络)接口 (64)5.3.1712位ADC特性 (64)5.3.18比较器特性 (68)5.3.19温度传感器特性 (69)6封装特性 (70)6.1LQFP64 – 10 x 10 mm封装数据 (70)6.2LQFP64 – 7 x 7 mm封装数据 (72)6.3LQFP48 – 7 x 7 mm封装数据 (74)6.4QFN48 – 6 x 6 mm封装数据 (76)6.5QFN32 – 4 x 4 mm封装数据 (78)6.6热特性 (80)7订货代码 (81)8版本历史 (82)表目录表1. 选型列表 (1)表2. AT32F415系列器件功能和配置 (11)表3. 启动加载程序(Bootloader)的管脚配置 (17)表4. 定时器功能比较 (19)表5. AT32F415系列引脚定义 (27)表6. 电压特性 (33)表7. 电流特性 (33)表8. 温度特性 (33)表9. 通用工作条件 (34)表10. 上电和掉电时的工作条件 (34)表11. 内嵌复位和电源控制模块特性 (35)表12. 内置的参照电压 (36)表13. 运行模式下的最大电流消耗 (37)表14. 睡眠模式下的最大电流消耗 (38)表15. 停机和待机模式下的典型和最大电流消耗 (38)表16. V BAT的典型和最大电流消耗（LSE和ERTC开启） (40)表17. 运行模式下的典型电流消耗 (41)表18. 睡眠模式下的典型电流消耗 (42)表19. 内置外设的电流消耗 (43)表20. 高速外部用户时钟特性 (44)表21. 低速外部用户时钟特性 (45)表22. HSE 4~25 MHz振荡器特性 (46)表23. LSE振荡器特性(f LSE = 32.768 kHz) (47)表24. HSI振荡器特性 (48)表25. LSI振荡器特性 (48)表26. 低功耗模式的唤醒时间 (49)表27. PLL特性 (50)表28. 闪存存储器特性 (50)表29. 闪存存储器寿命和数据保存期限 (50)表30. EMS特性 (51)表31. ESD绝对最大值 (52)表32. 电气敏感性 (52)表33. I/O静态特性 (53)表34. 输出电压特性 (54)表35. 输入交流特性 (54)表36. NRST引脚特性 (55)表37. TMRx特性 (55)表38. I2C接口特性 (56)表39. SCL频率(f PCLK1 = 36 MHz，V DD = 3.3 V) (57)表40. SPI特性 (58)表41. I2S特性 (60)表42. SD/MMC接口特性 (62)表43. USB OTG全速启动时间 (63)表44. USB OTG全速直流特性 (63)表45. USB OTG全速电气特性 (63)表46. ADC特性 (64)表47. f ADC = 14MHz时的最大R AIN (65)表48. f ADC = 28MHz时的最大R AIN (65)表49. ADC精度(V DDA = 3.0~3.6 V, T A = 25 °C) (66)表50. ADC精度(V DDA = 2.6~3.6 V, T A = -40~105 °C) (66)表51. 比较器特性 (68)表52. 温度传感器特性 (69)表53. LQFP64 – 10 x 10 mm 64脚薄型正方扁平封装机械数据 (71)表54. LQFP64 – 7 x 7 mm 64脚薄型正方扁平封装机械数据 (73)表55. LQFP48 – 7 x 7 mm 48脚薄型正方扁平封装机械数据 (75)表56. QFN48 – 6 x 6 mm 48脚正方扁平无引线封装机械数据 (77)表57. QFN32 – 4 x 4 mm 32脚正方扁平无引线封装机械数据 (79)表58. 封装的热特性 (80)表59. AT32F415系列订货代码信息图示 (81)表60. 文档版本历史 (82)图目录图1. AT32F415系列功能框图 (13)图2. 时钟树 (16)图3. AT32F415系列LQFP64引脚分布 (24)图4. AT32F415系列LQFP48引脚分布 (25)图5. AT32F413系列QFN48引脚分布 (25)图6. AT32F415系列QFN32引脚分布 (26)图7. 存储器图 (30)图8.引脚的负载条件 (31)图9. 引脚输入电压 (31)图10. 供电方案 (32)图11. 电流消耗测量方案 (32)图12. 上电复位和掉电复位波形图 (35)图13.调压器在运行模式时，停机模式下的典型电流消耗在不同的V DD时与温度的对比 (39)图14.调压器在低功耗模式时，停机模式下的典型电流消耗在不同的V DD时与温度的对比 (39)图15. 待机模式下的典型电流消耗在不同的V DD时与温度的对比 (40)图16. V BAT的典型电流消耗（LSE和ERTC开启）在不同的V BAT电压时与温度的对比 (40)图17. 外部高速时钟源的交流时序图 (44)图18. 外部低速时钟源的交流时序图 (45)图19. 使用8 MHz晶体的典型应用 (46)图20. 使用32.768 kHz晶体的典型应用 (47)图21. HSI振荡器精度与温度的对比 (48)图22. 建议的NRST引脚保护 (55)图23. I2C总线交流波形和测量电路 (57)图24. SPI时序图–从模式和CPHA = 0 (59)图25. SPI时序图–从模式和CPHA = 1 (59)图26. SPI时序图–主模式 (59)图27. I2S从模式时序图(Philips协议) (60)图28. I2S主模式时序图(Philips协议) (61)图29. SDIO高速模式 (62)图30. SD默认模式 (62)图31. USB OTG全速时序：数据信号上升和下降时间定义 (63)图32. ADC精度特性 (66)图33. 使用ADC典型的连接图 (67)图34. 供电电源和参考电源去藕线路 (67)图35. 比较器迟滞图 (68)图36. V SENSE对温度理想曲线图 (69)图37. LQFP64 – 10 x 10 mm 64脚薄型正方扁平封装图 (70)图38. LQFP64 – 10 x 10 mm标记(封装俯视图) (71)图39. LQFP64 – 7 x 7 mm 64脚薄型正方扁平封装图 (72)图40. LQFP64 – 7 x 7 mm标记(封装俯视图) (73)图41. LQFP48 – 7 x 7 mm 48脚薄型正方扁平封装图 (74)图42. LQFP48 – 7 x 7 mm标记(封装俯视图) (75)图43. QFN48 – 6 x 6 mm 48脚正方扁平无引线封装图 (76)图44. QFN48 – 6 x 6 mm标记(封装俯视图) (77)图45. QFN32 – 4 x 4 mm 32脚正方扁平无引线封装图 (78)图46. QFN32 – 4 x 4 mm标记(封装俯视图) (79)1 介绍本文给出了AT32F415系列产品的订购信息和器件的机械特性。

LC245A中文资料

GQN OR ZQN PACKAGE (TOP VIEW)
1234
A B C D E
TERMINAL ASSIGNMENTS
1
2
3
4
A
A1
DIR
VCC
OE
B
A3
B2
A2
B1

C
A5
A4
B4
B3
D
A7
B6
A6
B5
E
GND
A8
B8
B7
FUNCTION TABLE
INPUTS
OE DIR
L
L
L
H
H
X
OPERATION
QFN – RGY
Reel of 1000
SN74LVC245ARGYR
SOIC – DW
Tube of 25 Reel of 2000
SN74LVC245ADW SN74LVC245ADWR
SOP – NS
Reel of 2000
SN74LVC245ANSR
SSOP – DB
Reel of 2000
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DIR 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8 A8 9 GND 10

CM200DY-24H中文资料

Units °C °C Volts Volts Amperes Amperes Amperes Amperes Watts N·m N·m Grams Vrms
Static Electrical Characteristics, Tj = 25 °C unless otherwise specified
COLLECTOR-EMITTER SATURATION VOLTAGE CHARACTERISTICS (TYPICAL)
400
COLLECTOR CURRENT, IC, (AMPERES) COLLECTOR CURRENT, IC, (AMPERES)
400
COLLECTOR-EMITTER SATURATION VOLTAGE, VCE(sat), (VOLTS)
Sep.1998
元器件交易网
MITSUBISHI IGBT MODULES
CM200DY-24H
HIGH POWER SWITCHING USE INSULATED TYPE
OUTPUT CHARACTERISTICS (TYPICAL)
TRANSFER CHARACTERISTICS (TYPICAL)
7 5 3 2
Tj = 25°C
102
Cies
8
IC = 400A
101
Coes
6
FREE-WHEEL DIODE FORWARD CHARACTERISTICS (TYPICAL)
CAPACITANCE VS. VCE (TYPICAL)
10
COLLECTOR-EMITTER SATURATION VOLTAGE, VCE(sat), (VOLTS)
103

atc中文手册

当WP 脚连接到Vcc 所有内存变成写保护只能读当WP 引脚连接到Vss 或悬空允许器件进
行读/写操作
A0 A1 器件地址输入
这些管脚为硬连线或者不连接对于单总线系统最多可寻址4 个CAT24WC256 器件参阅器件寻
址当这些引脚没有连接时其默认值为0
I2C 总线协议
I2C 总线协议定义如下
1 只有在总线空闲时才允许启动数据传送
信号之前发送大于64 个字节地址计数器将自动翻转先前写入的数据被覆盖
当所有64 字节接收完毕主器件发送停止信号内部编程周期开始此时所有接收到的数据在单
个写周期内写入CAT24WC256
应答查询
可以利用内部写周期时禁止数据输入这一特性一旦主器件发送停止位指示主器件操作结束时
CAT24WC256 启动内部写周期应答查询立即启动包括发送一个起始信号和进行写操作的从器件地址
焊接温度(10 秒) 300
口输出短路电流100mA
功能描述
CAT24WC256 支持I2C 总线数据传送协议I2C 总线协议规定任何将数据传送到总线的器件作为
发送器任何从总线接收数据的器件为接收器数据传送是由产生串行时钟和所有起始停止信号的主器
件控制的CAT24WC256 是作为从器件被操作的主器件和从器件都可以作为发送器或接收器但由主
置在接收到第一个数据字节后不发送应答信号从而避免寄存器区域被编程改写
读操作
CAT24WC256 读操作的初始化方式和写操作时一样仅把R/W 位置为1 有三种不同的读操作方式
立即/当前地址读选择/随机读和连续读
立即/当前地址读
的地址计数器内容为最后操作字节的地址加1 也就是说如果上次读/写的操作地址为N 则立即
AT24C256中文资料

Nrf2401 datasheet 数据手册中文资料

3 在接收模式下当接收到与本机地址一致是通过 DR1 输出中断指示高有效单片机通过 DATA CLK1 接收数据
3 通道 2 接口通道 2 接口 CLK2 DOUT2 DR2 为三线数据接口在 PTR4000 模块中保留未使用
五 PTR4000 的配置 PTR4000 上电以后首先必须通过单片机对其进行配置单片机首先将按照模式控制真值表表 4
1 在配置模式下单片机通过通道 1 的 DATA CLK1 线配置 PTR4000 的工作参数 2 在发射模式下单片机通过通道 1 的 DATA CLK1 发送数据
COPYRIGHT ©2003 ALL RIGHTS RESERVED 迅通科技 TEL: 0451 86349363 E-mail: sales@ 2
六 PTR4000 的软件编程 1 配置编程
1 上电以后 MCU 首先配置 PTR4000 模块先将 CS CE 设为配置模式见表 4 1 MCU 通过 CLK1 DATA 将配置数据移入 PTR4000 模块 CLK1 由 MCU 提供 MSB 首先移入
2 全部配置 120 bit 配置数据均移入后由 MCU 将 CS CE 设为工作模式此时 PTR4000 将刷新内部配置并使得新配置立即生效在掉电和待机模式工作后配置内容仍然有效配置数据只有当电源撤除后才会丢失
1 编程配置接口
该接口由 CE CS PWR 组成控制 PTR4000 的四种工作模式配置模式发射/接收模式待机模
式 Power down 掉电模式配置数据由 DATA CLK1 输入各种模式的控制模式见下表 4 1
模式
PWR
CE
CS
工作模式发射/接收

FM24CL04B-GTR;FM24CL04B-G;中文规格书,Datasheet资料

FM24CL04B
4Kb Serial 3V F-RAM Memory Features
4K bit Ferroelectric Nonvolatile RAM Organized as 512 x 8 bits High Endurance 1014 Read/Writes 38 Year Data Retention NoDelay™ Writes Advanced High-Reliability Ferroelectric Process Fast Two-wire Serial Interface Up to 1 MHz maximum bus frequency Direct hardware replacement for EEPROM Supports legacy timing for 100 kHz & 400 kHz Low Power Operation 2.7V to 3.65V operation 100 A Active Current (100 kHz) 3 A (typ.) Standby Current Industry Standard Configuration Industrial Temperature -40 C to +85 C 8-pin “Green”/RoHS SOIC (-G)
Pin Configuration
NC A1 A2 VSS
ቤተ መጻሕፍቲ ባይዱ
1 2 3 4
8 7 6 5
VDD WP SCL SDA
Pin Names A1-A2 SDA SCL WP VSS VDD
Function Device Select Address 1 and 2 Serial Data/Address Serial Clock Write Protect Ground Supply Voltage

LM2450TB中文资料

LM2450220V Monolithic Triple Channel 7MHz DC Coupled CRT DTV DriverGeneral DescriptionThe LM2450is a triple channel high voltage DC coupled CRT driver circuit designed for use in DTV applications.The IC contains three high input impedance,wide band amplifi-ers which directly drive the RGB cathodes of a CRT.Each amplifier has a summing input where the DC level of the output is controlled by a low voltage DC input voltage.Nor-mally the DC input voltage is from a DAC.Each channel has its gain internally set to −54and can drive CRT capacitive loads as well as resistive loads present in other applications,limited only by the package’s power dissipation.The IC is packaged in a 15-lead TO-247molded plastic power package designed specifically to meet high voltage spacing requirements.See Thermal Considerations section.Featuresn 7MHz bandwidthn 100V black level adjustment range using 0V to 5V input n Current output for IK feedback systemsn Greater than 130V P-P output swing capability n 0V to 5V input voltage rangenStable with 0pF–20pF capacitive loads and inductive peaking networksn Convenient TO-247staggered thin lead package style Applicationsn DC coupled DTV applications using the 480p format as well as standard NTSC and PAL formats.Connection Diagram Schematic Diagram20144301FIGURE 1.Top View Order Number LM2450TB See NS Package Number TB15A20144302FIGURE 2.Simplified Schematic Diagram(One Channel)December 2005LM2450220V Monolithic Triple Channel 7MHz DC Coupled CRT DTV Driver©2005National Semiconductor Corporation Absolute Maximum Ratings(Notes 1,3)If Military/Aerospace specified devices are required,please contact the National Semiconductor Sales Office/Distributors for availability and specifications.Supply Voltage (V CC )+250V Bias Voltage (V BB )+16VInput Voltage (V IN )−0.5V to V BB +0.5V Storage Temperature Range (T STG )−65˚C to +150˚CLead Temperature (Soldering,<10sec.)300˚C ESD Tolerance,Human Body Model 2kV Machine Model200V Junction Temperature 150˚C θJC (typ)4.0˚C/WOperating Ratings (Note 2)V CC +100V to +230VV BB +7V to +13V V IN +0V to +5V V OUT+40V to +215VCase Temperature (10W max power)110˚CDo not operate the part without a heat sink and thermal grease.Heat sink must have a maximum thermal resistance 5.4˚C/W.(Note 7)Electrical Characteristics(See Figure 3for Test Circuit).Unless otherwise noted:V CC =+220V,V BB =+12V,V DAC =+0.5V,C L =10pF,T C =50˚C.DC Tests:V IN =+2.7V DC .AC Tests:Output =130V PP (60V –190V)at 1MHz.Symbol ParameterConditionsLM2450Units Min Typ Max I CC Supply Current No Input Signal,No Video Input,No Output Load101825mA I BB Bias Current 182634mA V OUT,1DC Output Voltage No AC Input Signal,V IN =2.7V DC 122127132V DC V OUT,2DC Output Voltage No AC Input Signal,V IN =1.2V DC 200205210V DC V OUT,3DC Output Voltage No AC Input Signal,V IN =1.2V DC ,V DAC =1.2V DC192198204V DC V OUT,4DC Output Voltage No AC Input Signal,V IN =1.2V DC ,V DAC =2.7V DC 154160166V DC A V DC Voltage GainNo AC Input Signal −51−54−57V/V A DAC DAC Input DC Voltage Gain No AC Input Signal−23−26−29V/V ∆A V Gain Matching (Note 4),No AC Input Signal 1.0dB LE Linearity Error (Notes 4,5),No AC Input Signal 8%t r Rise Time (Note 6),10%to 90%49ns +OS Overshoot 2%t f Fall Time (Note 6),90%to 10%52ns −OS Overshoot(Note 6)1%BW L Large Signal Bandwidth V OUT AC =130V P-P ,V OUT DC =125V 7MHz BW M Medium Signal Bandwidth V OUT AC =100V P-P ,V OUT DC=125V8MHz BW S Small Signal Bandwidth V OUTAC=60V P-P ,V OUTDC=125V9MHz Ik ERROR Current Output Error Output Current =0µA to 200µA −52052µA ∆Ik ERRORCurrent Output Difference Between ChannelsOutput Current =0µA to 200µANA32µANote 1:Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.Note 2:Operating ratings indicate conditions for which the device is functional,but do not guarantee specific performance limits.For guaranteed specifications and test conditions,see the Electrical Characteristics.Datasheet min/max specification limits are guaranteed by design,test,or statistical analysis.The guaranteed specifications apply only for the test conditions listed.Some performance characteristics may change when the device is not operated under the listed test conditions.Note 3:All voltages are measured with respect to GND,unless otherwise specified.Note 4:Calculated value from Voltage Gain test on each channel.Note 5:Linearity Error is the variation in DC gain from V IN =1.10V to V IN =4.30V.Note 6:Input from signal generator:t r ,t f <10ns.Note 7:Running the 1MHz to 30MHz test pattern at 1080i this part will dissipate approximately 9.2W.This is the commonly accepted test pattern that is representative of the worst case high frequency content for normal television viewing.This is the pattern used to estimate the worst case power dissipation of the LM2450in its normal application.It is recommended to use a heat sink with a thermal resistance of 5.4˚C/W or better.L M 2450 2AC Test CircuitFigure 3shows a typical test circuit for evaluation of the LM2450.This circuit is designed to allow testing of the LM2450in a 50Ωenvironment without the use of an expensive FET probe.The two 4990Ωresistors form a 400:1divider with the 50Ωresistor and the oscilloscope.A test point is included for easy use of an oscilloscope probe.The compensation capacitor is used to compensate the network to achieve flat frequency response.20144303Note:10pF load includes parasitic capacitance.FIGURE 3.Test Circuit (One Channel)LM24503Typical Performance Characteristics(V CC =+220V DC ,V BB =+12V DC ,C L =10pF,V OUT =130V PP(60V –190V),T C =50˚C,Test Circuit —Figure 3unless otherwise specified)20144304FIGURE 4.V OUT vs V IN20144305FIGURE 5.LM2450Pulse Response 20144306FIGURE 6.Bandwidth 20144307FIGURE 7.Speed vs Load Capacitance20144308FIGURE 8.Speed vs Offset20144309FIGURE 9.Speed vs Case TemperatureL M 2450 4Typical Performance Characteristics(V CC =+220V DC ,V BB =+12V DC ,C L =10pF,V OUT =130V PP(60V –190V),T C =50˚C,Test Circuit —Figure 3unless otherwise specified)20144310FIGURE 10.Power Dissipation vs Frequency 20144311FIGURE 11.Safe Operating Area20144312FIGURE 12.LM2450Cathode ResponseLM24505Theory of OperationThe LM2450is a high voltage monolithic three channel CRT driver suitable for DTV applications.The LM2450operates with 220V and 12V power supplies.The part is housed in a 15-lead TO-247molded plastic power package with thin leads for improved metal-to-metal spacing.The circuit diagram of the LM2450is shown in Figure 2.The PNP emitter follower,Q5,provides input buffering.Q1and Q2form a fixed gain cascode amplifier with resistors R1and R2setting the gain at −54.An additional cascode amplifier is formed by Q7and Q2.Gain of this stage is set to —25by resistors R1and R10.Q8provides the input buffering for this input.Q2now becomes the summing point for both V IN and V DAC .Emitter followers Q3and Q4isolate the high output impedance of the cascode stage from the capacitance of the CRT cathode,which decreases the sensitivity of the device to load capacitance.Q6provides biasing to the output emit-ter follower stage to reduce crossover distortion at low signal levels.Figure 3shows a typical test circuit for evaluation of the LM2450.This circuit is designed to allow testing of the LM2450in a 50Ωenvironment without the use of an expen-sive FET probe.In this test circuit,the two 4.99k Ωresistors form a 400:1wideband,low capacitance probe when con-nected to a 50Ωcoaxial cable and a 50Ωload (such as a 50Ωoscilloscope input).The input signal from the generator is AC coupled to the video inputs of the LM2450.Application HintsINTRODUCTIONNational Semiconductor (NSC)is committed to provide ap-plication information that assists our customers in obtaining the best performance possible from our products.The fol-lowing information is provided in order to support this com-mitment.The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC.Variations in performance can be realized due to physical changes in the printed circuit board and the application.Therefore,the designer should know that com-ponent value changes may be required in order to optimize performance in a given application.The values shown in this document can be used as a starting point for evaluation purposes.When working with high bandwidth circuits,good layout practices are also critical to achieving maximum per-formance.IMPORTANT INFORMATIONThe LM2450performance is targeted for the DTV market.The application circuits shown in this document to optimize performance and to protect against damage from CRT arc over are designed specifically for the LM2450.If another member of the LM245X family is used,please refer to its datasheet.POWER SUPPLY BYPASSSince the LM2450is a wide bandwidth amplifier,proper power supply bypassing is critical for optimum performance.Improper power supply bypassing can result in large over-shoot,ringing or oscillation.0.1µF capacitors should be connected from the supply pins,V CC and V BB ,to ground,as close to the LM2450as is practical.Additionally,a 22µF or larger electrolytic capacitor should be connected from both supply pins to ground reasonably close to the LM2450.ARC PROTECTIONDuring normal CRT operation,internal arcing may occasion-ally occur.This fast,high voltage,high-energy pulse can damage the LM2450output stage.The application circuit shown in Figure 13is designed to help clamp the voltage at the output of the LM2450to a safe level.The clamp diodes,D1and D2,should have a fast transient response,high peak current rating,low series impedance and low shunt capaci-tance.1SS83or equivalent diodes are recommended.D1and D2should have short,low impedance connections to V CC and ground respectively.The cathode of D1should be located very close to a separately decoupled bypass capaci-tor (C3in Figure 13).The ground connection of D2and the decoupling capacitor should be very close to the LM2450ground.This will significantly reduce the high frequency voltage transients that the LM2450would be subjected to during an arc over condition.Resistor R2limits the arc over current that is seen by the diodes while R1limits the current into the LM2450as well as the voltage stress at the outputs of the device.R2should be a 1⁄2W solid carbon type resistor.R1can be a 1⁄4W metal or carbon film type resistor.Having large value resistors for R1and R2would be desirable,but this has the effect of increasing rise and fall times.Inductor L1is critical to reduce the initial high frequency voltage levels that the LM2450would be subjected to before the clamp diodes have a chance to became activated.The inductor will not only help protect the device but it will also help minimize rise and fall times as well as minimize EMI.For proper arc protection,it is important to not omit any of the arc protection components shown in Figure 13.EFFECT OF LOAD CAPACITANCEFigure 7shows the effect of increased load capacitance on the speed of the device.Increasing the load capacitance from 10pF to 20pF will first speed up the rise time by about 5ns,then the rise time slows down by about 3ns as the capactor values come closer to 20pF.The change of ca-pacitor values has little affect on the fall time.Note that the power consumption of the driver will significantly increase with the larger capacitance.EFFECT OF OFFSETFigure 8shows the variation in rise and fall times when the black level of the device is varied from 180V to 200V DC .The rise time increases by less than 2ns as the offset is in-creased in voltage and the fall time decreases by about 5ns with the same offset adjustment.20144313FIGURE 13.One Channel of the LM2450with theRecommended Application Circuit L M 2450 6Application Hints(Continued)THERMAL CONSIDERATIONSFigure 9shows the performance of the LM2450in the test circuit shown in Figure 3as a function of case temperature.The figure shows that the rise and fall times of the LM2450increase by about 3ns as the case temperature increases from 30˚C to 110˚C.Over the same case temperature range the fall time increased by about 9ns.Figure 10shows the maximum power dissipation of the LM2450vs.Frequency when all three channels of the device are driving into a 10pF load with a 130V P-P alternating one pixel on,one pixel off.Note that the frequency given in Figure 10is half of the pixel frequency.The graph assumes an 80%active time (device operating at the specified fre-quency),which is typical in a TV application.The other 20%of the time the device is assumed to be sitting at the black level (190V in this case).A TV picture will not have frequency content over the whole picture exceeding 15MHz.It is important to establish the worst case condition under normal viewing to give a realistic worst-case power dissipation for the LM2450.One test is a 1to 30MHz sine wave sweep over the active line.This would give a slightly lower power than taking the average of the power between 1and 30MHz.This average is 9.4W.A sine wave will dissipate slightly less power,probably about 9.2W of power dissipation.All of this information is critical for the designer to establish the heat sink requirement for his application.The designer should note that if the load capacitance is increased the AC com-ponent of the total power dissipation will also increase.The LM2450case temperature must be maintained below 110˚C given the maximum power dissipation estimate of 9.2W.If the maximum expected ambient temperature is 60˚C and the maximum power dissipation is 9.2W then a maxi-mum heat sink thermal resistance can be calculated:This example assumes a capacitive load of 10pF and no resistive load.The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase.OPTIMIZING TRANSIENT RESPONSEReferring to Figure 13,there are three components (R1,R2and L1)that can be adjusted to optimize the transient re-sponse of the application circuit.Increasing the values of R1and R2will slow the circuit down while decreasing over-shoot.Increasing the value of L1will speed up the circuit as well as increase overshoot.It is very important to use induc-tors with very high self-resonant frequencies,preferably above 300MHz.Ferrite core inductors from ler Magnetics (part #78FR--K)were used for optimizing the performance of the device in the NSC application board.The values shown in Figure 13can be used as a good starting point for the evaluation of the ing a variable resistor for R1will simplify finding the value needed for optimum performance in a given application.Once the opti-mum value is determined the variable resistor can be re-placed with a fixed value.Due to arc over considerations it is recommended that the values shown in Figure 13not be changed by a large amount.Figure 12shows the typical cathode pulse response with an output swing of 130V PP inside a modified production TV set using the LM1237pre-amp.PC BOARD LAYOUT CONSIDERATIONSFor optimum performance,an adequate ground plane,iso-lation between channels,good supply bypassing and mini-mizing unwanted feedback are necessary.Also,the length of the signal traces from the signal inputs to the LM2450and from the LM2450to the CRT cathode should be as short as possible.The following references are recommended:Ott,Henry W.,“Noise Reduction Techniques in Electronic Systems”,John Wiley &Sons,New York,1976.“Video Amplifier Design for Computer Monitors”,National Semiconductor Application Note 1013.Pease,Robert A.,“Troubleshooting Analog Circuits”,Butterworth-Heinemann,1991.Because of its high small signal bandwidth,the part may oscillate in a TV if feedback occurs around the video channel through the chassis wiring.To prevent this,leads to the video amplifier input circuit should be shielded,and input circuit wiring should be spaced as far as possible from output circuit wiring.TYPICAL APPLICATIONA typical application of the LM2450is shown in Figure ed in conjunction with a pre-amp with a 1.2V black level output no buffer transistors are required to obtain the correct black level at the cathodes.If the pre-amp has a black level closer to 2V,then an NPN transistor should be used to drop the video black level voltage closer to 1.2V.When using only one NPN transistor as an emitter follower,a jumper needs to be added in each channel.In the red channel a jumper needs to be added between C7and R25.With just one transistor neither of these components would be installed.In addition to the video inputs are the DAC inputs.These inputs are used to vary the LM2450output black level by a DAC.in the past when a driver was used with a CMOS AVP there was not enough range on the video output to vary the black level.A clamp circuit had to be used in conjunction with the AVP and the driver.The DAC inputs of the LM2450are driven in the same way the clamp circuit had been driven,eliminating the need for a clamp circuit.Figure 4shows the variation in the black level as the DAC input voltage is changed.This is shown for both V IN =1.2V and V IN =2.1V.The neck board in Figure 14has two transistors in each channel enabling this board to work with pre-amps with a black level output as high as 2.5V.Each transistor stage has a gain of −1.This setup still gives the two diode drop at the driver input;however,now additional peaking can be done on the video signal before reaching the driver inputs.Some popular AVPs do have a black level of 2.5V.For lower black levels either one or both transistors would not be used.It is important that the TV designer use component values for the driver output stage close to the values shown in Figure 14.These values have been selected to protect the LM2450from arc over.Diodes D1,D8,D9,and D13–D15must also be used for proper arc over protection.The NSC demonstra-tion board can be used to evaluate the LM2450in a TV.LM24507Application Hints(Continued)NSC DEMONSTRATION BOARDFigure 15shows the routing and component placement on the NSC LM2450demonstration board.This board provides a good example of a layout that can be used as a guide for future layouts.Note the location of the following compo-nents:•C26—V CC bypass capacitor,located very close to pin 12and ground pins•C27—V BB bypass capacitor,located close to pin 7and ground•C28,C30,C33—V CC bypass capacitors,near LM2450and V CC clamp diodes.Very important for arc protection.The routing of the LM2450outputs to the CRT is very critical to achieving optimum performance.Figure 16shows the routing and component placement from pin 13(V OUT3)of the LM2450to the blue cathode.Note that the components are placed so that they almost line up from the output pin of the LM2450to the blue cathode pin of the CRT connector.This is done to minimize the length of the video path between these two components.Note also that D1,D8and R36are placed to minimize the size of the video nodes that they are attached to.This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the pro-tection diodes.The anode of protection diode D1is con-nected directly to a section of the ground plane that has a short and direct path to the heater ground and the LM2450ground pins.The cathode of D8is connected to V CC very close to decoupling capacitor C28which is connected to the same area of the ground trace as D1.The diode placement and routing is very important for minimizing the voltage stress on the LM2450during an arc over event.This demonstration board uses large PCB holes to accom-modate socket pins,which function to allow for multiple insertions of the LM2450in a convenient manner.To benefit from the enhanced LM2450package with thin leads,the device should be secured in small PCB holes to optimize the metal-to-metal spacing between the leads.CURRENT OUTPUT FOR IK FEEDBACK SYSTEMSThe LM2450can be used in DTV applications that use an IK feedback system.Figure 14shows an example of an inter-face circuit used to feed back the IK output of LM2450to a preamplifier with an ac coupled IK input.This feedback system consists of the preamp,LM2450,and interface circuit,forming a closed loop to automatically ad-just the black level of the drive signals to the cutoff point of the RGB cathodes.Following is a description of the interface circuit operation used for AVPs that have a voltage input for their IK sense input.The output at pin 8of the LM2450is filtered of high fre-quency noise by C14.D7is used to limit the peak voltage at pin 8.Without this clamp diode the voltage would easily exceed 12V during active video when the cathode currents are much greater than the small currents being detected during vertical blanking.Exceeding 12V could damage Q1and result in improper operation of the driver.R35is essential to convert the IK current to voltage.Choos-ing the value of R35sets the gain of the feedback voltage,and consequently,the operating point of the tube.Once a stable operating point is established,this point can be fine-tuned using the adjustment range of the feedback system or standard preamp controls.Changing the value of R35will change the cutoff voltage at the cathode.A smaller value of R35requires more IK current to maintain the feedback loop.The cutoff voltage set at the cathode will be lower to adjust to the higher IK current.This additional current must come from the cathode;therefore,the cathode voltage is set lower to meet higher current requirement.A higher value of R35will do the opposite,raising the cathode voltage because less IK current is needed to maintain the same voltage at R35.The emitter follower,Q7,isolates R35from the input imped-ance of the preamp.R21and R39bias the emitter of Q7to limit the maximum voltage to the preamp.These resistor values should be chosen to limit the maximum voltage at the emitter and protect the preamp from any large voltages that would otherwise occur during active video.C9is used to AC couple the IK signal to the preamp.The advantage of AC coupling is that any DC component (leakage current from the driver)of the IK signal is not detected by the IK sense input of the preamp.Some AVPs do have a direct current input for their IK sense input.For interfacing to these AVPs the only components to be used in the IK sense section are D7and R41.To com-plete the signal path a jumper must be used to replace R34,C9and the base-emitter junction of Q7.C14can still be used for high frequency filtering.L M 2450 8A p p l i c a t i o n H i n t s(C o n t i n u e d )20144314F IG U R E 14.L M 2450D T V A p p l i c a t i o n s C i r c u i tLM24509Application Hints(Continued)20144316FIGURE 15.LM2450DTV Demonstration Board LayoutL M 2450 10LM2450 Application Hints(Continued)20144317FIGURE16.Trace Routing and Component Placement for Blue Channel Output11Physical Dimensionsinches (millimeters)unless otherwise notedNOTE:Available only with lead free platingNS Package Number TB15A Order Number LM2450TBNational does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.For the most current product information visit us at .LIFE SUPPORT POLICYNATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION.As used herein:1.Life support devices or systems are devices or systems which,(a)are intended for surgical implant into the body,or (b)support or sustain life,and whose failure to perform when properly used in accordance with instructions for use provided in the labeling,can be reasonably expected to result in a significant injury to the user.2.A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system,or to affect its safety or effectiveness.BANNED SUBSTANCE COMPLIANCENational Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2)and the Banned Substances and Materials of Interest Specification (CSP-9-111S2)and contain no ‘‘Banned Substances’’as defined in CSP-9-111S2.Leadfree products are RoHS compliant.National Semiconductor Americas Customer Support CenterEmail:new.feedback@ Tel:1-800-272-9959National SemiconductorEurope Customer Support CenterFax:+49(0)180-5308586Email:europe.support@Deutsch Tel:+49(0)6995086208English Tel:+44(0)8702402171Français Tel:+33(0)141918790National Semiconductor Asia Pacific Customer Support CenterEmail:ap.support@National SemiconductorJapan Customer Support Center Fax:81-3-5639-7507Email:jpn.feedback@ Tel:81-3-5639-7560L M 2450220V M o n o l i t h i c T r i p l e C h a n n e l 7M H z D C C o u p l e d C R T D T V D r i v e r。

D4GL-2FFA-A;D4GL-2DFG-A;D4GL-4HFG-A;D4GL-4DFG-A;中文规格书,Datasheet资料

D4GL Door-mounting Accessory with Lockout Key to Prevent Workers from Becoming Trapped inside Hazardous Area•The vertical D4GL Guard Lock Safety-door Switch can be easily mounted on 40 × 40 mm aluminum frames. •The plastic material makes the Slide Key suitable for lightweight doors.ConfigurationD4GL-SK10-LKBe sure to read the “Safety Precautions” on page 5 and the “Precautions for All Safety Door Switches”.D4GL (sold separately)D4GL-SK10-LKFeaturesThe lockout key prevents workers from becoming trapped without using a padlock.Note:Using two-color LEDs enables confirming whether the door is open or closed and locked or unlocked.Example: D4GL-2DFA-A with mechanical lock and solenoid releaseClo s e door.Locked (power notsu pplied to s olenoid)The s lide h a ndle i s clo s ed.Clo s e door.Locked (power not su pplied to s olenoid)The s lide h a ndle i s clo s ed.The s lide h a ndle c a n b e p u lled.Open door.The s lide h a ndle i s open.When the s lide h a ndle i s open, the locko u t key c a n b e p u lled reg a rdle ss of whether power i s b eing su pplied to the s olenoid or not.Open door.The s lide h a ndle i s open.Left doorDoor Opening to the Left.The s lide h a ndle i s s ec u red a t the po s ition s hown in the fig u re.A worker holding the locko u t key will not b e tr a pped locked in s ide the h a z a rdo us a re a b y a nother per s on.Open door.The s lide h a ndle doe s not move.The s lide h a ndle i s open.If the locko u t key i s not mo u nted, the s lide h a ndle will not move a nd the door will not clo s e.Locko u t KeyDo not t u rn the key as in the fig u re ab ove if the s lide h a ndle i s clo s ed.The h a ndle-s h a ped fixt u re m a ke s it e as y to us e the Door S witch.Att a ch the su ppliedc au tion l ab el s for di s pl a y.Ordering InformationNote:1.The Door Switch is not included. Select the Door Switch depending on the necessary number of contacts and the conduit size.The contents are provided as a total set, individual contents cannot be ordered separately.2.Perform risk assessment for the equipment in question, configure relay units and other safety circuits, and use properly.Applicable Door SwitchesAppearanceSpecificationsContentsModelApplicable Door SwitchWeight: Approx. 0.6 kg Mechanical durability: 20,000 operations min.Slide Key: 1 (not yet mounted)D4GL mounting plate: 1Door Switch special mounting screws: 4D4DS-K1 (operation key): 1D4DS-K1 special mounting screws: 2Lockout keys: 2Lockout key strap: 1Caution labels (stickers): 2 sheets (Englishand Japanese)D4GL-SK10-LK D4GL•The two-color (orange/green) LED indicators enablechecking whether the door is locked and the key is inserted.•With gold-plated contacts used as standard, general loads and microloads are supported.Guard LockSafety-door SwitchD4GLList of ModelsRelease key typeSolenoid voltage and indicator typeLock and release typesContact configuration(door open/closed detection switch andlock monitor switch contacts)Conduit opening Model StandardSolenoid: 24 VDC Orange/green LED: 24 VDCMechanical lock, Solenoid release1NC/1NO+1NC/1NOPg13.5D4GL-1AFA-A G1/2D4GL-2AFA-A M20D4GL-4AFA-A 1NC/1NO+2NCPg13.5D4GL-1BFA-A G1/2D4GL-2BFA-A M20D4GL-4BFA-A 2NC+1NC/1NOPg13.5D4GL-1CFA-A G1/2D4GL-2CFA-A M20D4GL-4CFA-A 2NC+2NCPg13.5D4GL-1DFA-A G1/2D4GL-2DFA-A M20D4GL-4DFA-A 2NC/1NO+1NC/1NOPg13.5D4GL-1EFA-A G1/2D4GL-2EFA-A M20D4GL-4EFA-A 2NC/1NO+2NCPg13.5D4GL-1FFA-A G1/2D4GL-2FFA-A M20D4GL-4FFA-A 3NC+1NC/1NOPg13.5D4GL-1GFA-A G1/2D4GL-2GFA-A M20D4GL-4GFA-A 3NC+2NCPg13.5D4GL-1HFA-A G1/2D4GL-2HFA-A M20D4GL-4HFA-A Solenoid lock,Mechanical release1NC/1NO+1NC/1NOPg13.5D4GL-1AFG-A G1/2D4GL-2AFG-A M20D4GL-4AFG-A 1NC/1NO+2NCPg13.5D4GL-1BFG-A G1/2D4GL-2BFG-A M20D4GL-4BFG-A 2NC+1NC/1NOPg13.5D4GL-1CFG-A G1/2D4GL-2CFG-A M20D4GL-4CFG-A 2NC+2NCPg13.5D4GL-1DFG-A G1/2D4GL-2DFG-A M20D4GL-4DFG-A 2NC/1NO+1NC/1NOPg13.5D4GL-1EFG-A G1/2D4GL-2EFG-A M20D4GL-4EFG-A 2NC/1NO+2NCPg13.5D4GL-1FFG-A G1/2D4GL-2FFG-A M20D4GL-4FFG-A 3NC+1NC/1NOPg13.5D4GL-1GFG-A G1/2D4GL-2GFG-A M20D4GL-4GFG-A 3NC+2NCPg13.5D4GL-1HFG-A G1/2D4GL-2HFG-A M20D4GL-4HFG-ADimensions(Unit: mm)mounting holesD4GL-SK10-LK (Close door.)40 ×Safety PrecautionsRefer to the “Precautions for All Switches” and “Precautions for All Safety Door Switches”.•Do not drop the Product. Doing so may prevent the Product from functioning to full capacity.•Mount the Product securely to prevent it from falling. Otherwise, injury may occur.•Do not attempt to disassemble or modify the Switch. Doing so may cause the Switch to malfunction.•Make sure that the gap between the shot bolt and the guide is ±0.5 mm. Otherwise, excessive wear or damage may cause malfunction.•To ensure safety, do not operate the Switch with anything other than the Slide Key Unit.•Your hand may be injured by being pinched between the Operation Key and Switch when closing the door with your hand on the Product.•Be careful to avoid pinching your hand when operating the Slide Handle.•Do not impose a force of exceeding 1 N·m when operating the Lockout Key. Otherwise, the Product may be damaged and may not operate properly.To prevent damage, attach the supplied labels for display near the Product.•Do not force the slide handle to move when the lockout key is not inserted. Doing so may damage the product and make operation impossible.•Do not force the slide handle to move when the door is locked. •Do not close the door with the shot bolt removed. Doing so may damage the product and make operation impossible.•Turn the Lockout Key to the "SLIDE LOCK" position and remove it when opening the door to prevent a third party from operating the Slide Handle.•The durability of the Switch varies considerably depending on the switching conditions. Always confirm the usage conditions by using the Switch in an actual application, and use the Switch only for the number of switching operations given in the performance specifications.•The user must not maintain or repair equipment incorporating the Switch. Contact the manufacturer of the equipment for any maintenance or repairs required.•Refer to the D4GL Guard Lock Safety-door Switch Datasheet and Instruction Sheet about storage conditions, ambient conditions, Switch details, and handling methods.•Do not apply excessive force in the direction of the slide. This may damage the product and cause it to malfunction.•Do not force the switch or cable. Thismay damage the product. The cableshould be fixed at a point separatefrom the switch.•This product is for D4GL Guard Lock Safety-door Switch only. This product cannot be used with any other manufacturer's doorswitches.•Use the Slide Handle in the direction A or B in the following figure.•Loose screws may result in malfunction. Use washers and tighten the screws to the specified torques. Mount the Slide Base at four points with screws. Adding adhesive is recommended forpreventing the screws from loosening.Also, when mounting the Product to a door for disable-prevention purposes, purchase and use tamper-resistant screws. Appropriate Tightening TorqueTechnical Specifications•Do not store the Switch where corrosive gases (e.g., H2S, SO2,NH3, HNO3 or Cl2) or dust is present, or in locations subject to hightemperature or humidity.•Perform maintenance inspections periodically.•When the lockout key is attached to your wrist, be careful that thestrap does not get stuck in equipment.Do not use this product mounted so that it slidesvertically. This may cause malfunction, resulting inpersonal injury.Do not insert the operation key with the door open.Devices may start to operate, resulting in injury.Precautions for Safe UsePrecautions for Correct UseSlide Key mounting screw (M6) 6.0 to 7.0 N·mOperation key special mounting screw (screws supplied) 2.4 to 2.8 N·mSwitch special mounting screw (screws supplied) 1.3 to 1.5 N·mAmbient operating temperature−10 to 55°C (with no icing)Ambient operating humidity95% max.Mechanical durability20,000 operations min.WeightApprox. 0.6 kg (not including D4JL GuardLock Safety-door Switch)NomenclatureDifferences between Lockout Key and Trapped Key (Reference)•When mounting the operation key, line up the inside edges of the long operation key holeswith the outer edges of the slidehandle as in the following figure to ensure easy position adjustment.•Use the supplied special screws to mount the operation key and D4GL Guard Lock Safety-door Switch.To tighten the screws, use the tip of a flat-head screwdriver on the screw heads as shown in the following figure.•The special screws cannot be removed once they are tightened.Lockout keyTrapped key(Refer to information on theD4JL-@@@A-@7-@@)Closing the doorThe door cannot be closed unless the lockout key is inserted in the slide and turned.The door cannot be closed unless the trapped key is inserted in the Switch and turned.Opening the door The door can be opened bysupplying power to the Switch solenoid without operating thelockout switch.The door can never be opened without both supplying power to the Switch solenoid andoperating the trapped key.G L Note:designed so that they cannot be turnedcounter-clockwise using a flat-head screwdriver.Read and Understand This CatalogPlease read and understand this catalog before purchasing the products. Please consult your OMRON representative if you have any questions orcomments.WARRANTYOMRON's exclusive warranty is that the products are free from defects in materials and workmanship for a period of one year (or other period if specified) from date of sale by OMRON.OMRON MAKES NO WARRANTY OR REPRESENTATION, EXPRESS OR IMPLIED, REGARDING NON-INFRINGEMENT, MERCHANTABILITY, OR FITNESS FOR PARTICULAR PURPOSE OF THE PRODUCTS. ANY BUYER OR USER ACKNOWLEDGES THAT THE BUYER OR USER ALONE HAS DETERMINED THAT THE PRODUCTS WILL SUITABLY MEET THE REQUIREMENTS OF THEIR INTENDED USE. OMRON DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED.LIMITATIONS OF LIABILITYOMRON SHALL NOT BE RESPONSIBLE FOR SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES, LOSS OF PROFITS OR COMMERCIAL LOSS IN ANY WAY CONNECTED WITH THE PRODUCTS, WHETHER SUCH CLAIM IS BASED ON CONTRACT, WARRANTY, NEGLIGENCE, OR STRICT LIABILITY.In no event shall the responsibility of OMRON for any act exceed the individual price of the product on which liability is asserted.IN NO EVENT SHALL OMRON BE RESPONSIBLE FOR WARRANTY, REPAIR, OR OTHER CLAIMS REGARDING THE PRODUCTS UNLESSOMRON'S ANALYSIS CONFIRMS THAT THE PRODUCTS WERE PROPERLY HANDLED, STORED, INSTALLED, AND MAINTAINED AND NOTSUBJECT TO CONTAMINATION, ABUSE, MISUSE, OR INAPPROPRIATE MODIFICATION OR REPAIR.SUITABILITY FOR USEOMRON shall not be responsible for conformity with any standards, codes, or regulations that apply to the combination of products in the customer's application or use of the products.At the customer's request, OMRON will provide applicable third party certification documents identifying ratings and limitations of use that apply to the products. This information by itself is not sufficient for a complete determination of the suitability of the products in combination with the end product, machine, system, or other application or use.The following are some examples of applications for which particular attention must be given. This is not intended to be an exhaustive list of all possible uses of the products, nor is it intended to imply that the uses listed may be suitable for the products:•Outdoor use, uses involving potential chemical contamination or electrical interference, or conditions or uses not described in this catalog.•Nuclear energy control systems, combustion systems, railroad systems, aviation systems, medical equipment, amusement machines, vehicles, safety equipment, and installations subject to separate industry or government regulations.•Systems, machines, and equipment that could present a risk to life or property.Please know and observe all prohibitions of use applicable to the products.NEVER USE THE PRODUCTS FOR AN APPLICATION INVOLVING SERIOUS RISK TO LIFE OR PROPERTY WITHOUT ENSURING THAT THE SYSTEM AS A WHOLE HAS BEEN DESIGNED TO ADDRESS THE RISKS, AND THAT THE OMRON PRODUCTS ARE PROPERLY RATED AND INSTALLED FOR THE INTENDED USE WITHIN THE OVERALL EQUIPMENT OR SYSTEM.PROGRAMMABLE PRODUCTSOMRON shall not be responsible for the user's programming of a programmable product, or any consequence thereof.CHANGE IN SPECIFICATIONSProduct specifications and accessories may be changed at any time based on improvements and other reasons.It is our practice to change model numbers when published ratings or features are changed, or when significant construction changes are made.However, some specifications of the products may be changed without any notice. When in doubt, special model numbers may be assigned to fix or establish key specifications for your application on your request. Please consult with your OMRON representative at any time to confirm actualspecifications of purchased products.DIMENSIONS AND WEIGHTSDimensions and weights are nominal and are not to be used for manufacturing purposes, even when tolerances are shown.PERFORMANCE DATAPerformance data given in this catalog is provided as a guide for the user in determining suitability and does not constitute a warranty. It may represent the result of OMRON’s test conditions, and the users must correlate it to actual application requirements. Actual performance is subject to the OMRON Warranty and Limitations of Liability.ERRORS AND OMISSIONSThe information in this document has been carefully checked and is believed to be accurate; however, no responsibility is assumed for clerical,typographical, or proofreading errors, or omissions.2010.3In the interest of product improvement, specifications are subject to change without notice. OMRON CorporationIndustrial Automation Company/(c)Copyright OMRON Corporation 2010 All Right Reserved.分销商库存信息:OMROND4GL-2FFA-A D4GL-2DFG-A D4GL-4HFG-A D4GL-4DFG-A。

BL1608-05B2450规格书

Humidity Resistance
Soldering strength 1. 9.8N minimum (Push strength)
1. Solder specimen onto test jig. 2. Apply push force at 0.5mm/s until electrode pads are peeled off or ceramic are broken. Pushing force is applied to longitude direction 1. Solder specimen onto test jig (FR4, 0.8mm) using the recommend soldering profile. 2. Apply a bending force of 2mm deflection Pressure Rod
Advanced Ceramic X Corp.
16 Tzu Chiang Road, Hsinchu Industrial District Hsinchu Hsien 303, Taiwan TEL:886-3-5987008 FAX:886-3-5987001 E-mail: acx@
185-8843-5432 Kevin
BL 1608 Series
Multilayer Chip Baluns
Features
Monolithic SMD with small, low-profile and light-weight type.
Label
D:21.8 ± 0.8 178 ± 2.0 60 ± 0.5 D:13.0 ± 0.3 2.0 ± 0.5
Balanced Port1
Balanced Port2

常用EEPROM存储器

常用EEPROM存储器电路EEPROM存储器AT24C01低压和标准电压工作(Vcc=1.8V—5.5V)，128x8（1k）存储空间，2线串行总线，斯密特触发，噪声抑制滤波输入。

Bi方向传输协议，100kHz （1.8V,2.5V,2.7V）和400kHz（5V）兼容传输速率。

，硬件数据写保护引脚，8位页写模式，允许局部页写操作，器件内部写周期最大10ms，高可靠性，1万次的写周期，100年的保存时间。

8pinPDIP、8pinJEDEC SOIC、8pinMAP和8pinTSSOP等四种封装形式。

AT24C01数据手册[Datasheet]供此芯片，需要请联系我们EEPROM存储器AT24C02低压和标准电压工作(Vcc=1.8V—5.5V)，256x8（2k）存储空间，2线串行总线，斯密特触发，噪声抑制滤波输入。

Bi方向传输协议，100kHz （1.8V,2.5V,2.7V）和400kHz（5V）兼容传输速率。

，硬件数据写保护引脚，8位页写模式，允许局部页写操作，器件内部写周期最大10ms，高可靠性，1万次的写周期，100年的保存时间。

8pinPDIP、8pinJEDEC SOIC、8pinMAP和8pinTSSOP 等四种封装形式。

AT24C02数据手册[Datasheet]供此芯片，需要请联系我们EEPROM存储器AT24C04低压和标准电压工作(Vcc=1.8V—5.5V)，512x8（4k）存储空间，2线串行总线，斯密特触发，噪声抑制滤波输入。

Bi方向传输协议，100kHz （1.8V,2.5V,2.7V）和400kHz（5V）兼容传输速率。

，硬件数据写保护引脚，8位页写模式，允许局部页写操作，器件内部写周期最大10ms，高可靠性，1万次的写周期，100年的保存时间。

8pinPDIP、8pinJEDEC SOIC、8pinMAP和8pinTSSOP 等四种封装形式。

AT24C04数据手册[Datasheet]供此芯片，需要请联系我们EEPROM存储器AT24C08低压和标准电压工作(Vcc=1.8V—5.5V)，1024x8（8k）存储空间，2线串行总线，斯密特触发，噪声抑制滤波输入。

Tektronix 2450-EC电化学实验室系统说明书

S M U I N S T R U M E N T S• Lower cost alternative to potentiostats• Perform Cyclic, Squarewave, or Galvanic Voltammetry, Chronoamperometry, and Chronopotentiometry• Simplified user interface for faster test setup and analysis of results• Real-time plotting ofvoltammograms on the front The Keithley 2450-EC Electrochemistry Lab System: A Low Cost Alternative to the PotentiostatWhile potentiostats are excellent instruments for electrochemistry applications, they typically lack any front panel display and control knobs, often are 2-quadrant sys-tems only, and must be completely controlled by a computer with software that is not always open for users to customize tests beyond what the software can do. Keithley’s 2450-EC is a smart alternative as a DC/low frequency potentiostat. The 2450-EC has features that, in many cases, can perform as well as a potentiostat at lower cost including a wide range of voltages and currents for sourcing or measuring, nV / fA sensitivities, and high impedance sense leads with a typical input resistance of 50G ohms and only 1pA of input bias current, typically acceptable with a wide Electrochemical CellThe 2450-EC can be easily connected to a 3-electrode cell.2450-E C E l e c t r o c h e m i s t r y L a b S y s t e mLearn Faster; Work Smarter; Invent EasierUnlike traditional potentiostats that lack a user-interface front panel to interact with, the 2450-EC features a five-inch, full-color, high resolution touchscreen that facilitates ease of use, and optimizes overall speed and productivity. Built-in, context-sensitive help enables intuitive operation and minimizes the need to review a separate manual. These capa-bilities combined with its application versatility make the 2450-EC inherently easy to use for basic and advancedmeasurement applications, regardless of your experience level with electrochem-istry instruments.Convert Raw Data into InformationA full graphical plotting window converts raw data and displays it immediately asuseful information, such as cyclic voltam-mograms. The touch screen interface makes it easy to observe, interact with, and explore measurements with “zoom and pinch” simplicity. By using the built-in graphing cursors, you can immediately analyze your data without a computer. All graphic screens can be saved to a USB thumb drive for incorporation into reports and journals. Using the graphical sheet view, test data can also be displayed intabular form. The instrument supports exporting data to a spreadsheet for fur-ther analysis, dramatically improving productivity for research and development. Thiscombination of high performance and high ease of use offers unparalleled insight intoyour test results.Built-in real-time graphing, charting, scope-like cursors, and data display spreadsheet for exportsimplifies converting test results into useful information.2450-EC main home screen.View of 2450-EC menu.Graph view of results.2450S M U I N S T R U M E N T STest ApplicationsThe 2450-EC’s built-in open source scripting enables electro-chemists, chemists, and materials scientists to create libraries of reusable, customizable experimental software for running tests including cyclic voltammetry, chronoamperometry, chro-nopotentiometry, and more. The following electrochemistry test scripts are loaded in the internal memory of the 2450-EC. • Cyclic Voltammetry: Potential is swept at a user programmable scan rate between two to four defined vertices while current is measured.• Linear Sweep Voltammetry: Potential is swept at a user programmable scan rate between two defined points while current is measured.• Open Circuit Potential: Measures the cell potential difference between two electrodes with high input impedance as a function of time.• Potential Pulse and Square Wave with Current Measure: The 2450-EC sources potential at programmable peak and base levels while current is recorded at a user-defined position on the pulse peak level.• Current Pulse and Square Wave with Voltage Measure: The 2450-EC sources current at programmable peak and base levels while potential is recorded at a user-defined position on the pulse peak level.• Chronoamperometry: The potential is stepped to aprogrammed value while the resulting current is measured as a function of time.• Chronopotentiometry: The current is stepped to aprogrammed value while the resulting potential is measured as a function of time.In addition to pre-loaded test scripts, the built-in open source scripting language enables the user to create their own library of electrochemistry test scripts that can be modified as the test and measurements evolve.All-in-One InstrumentThe 2450-EC offers a highly flexible, four-quadrant voltage and current source/load coupled with precision voltage and cur-rent meters. When not used in potentiostat type applications, this all-in one instrument can be repurposed as a general lab instrument, including use as a:• Precision power supply with V and I readback • True current source• Digital multimeter (DCV, DCI, ohms, and power with 6½-digit resolution)• Precision electronic load • Trigger controllerTYPICAL APPLICATIONSIdeal for electrochemical research and development in a wide variety of applications studies, including:• Basic Analytical Research –Electrochemical cells –Electrode studies –Solid electrolytes • Materials Research–Electrode compositions –Electrolyte solutions–Ceramics, polymers, ferro/piezoelectrics–Organic semiconductors –Low-k dielectrics –Biomaterials –Nanomaterials –Electrodesposition • Energy Systems and Storage –Dye-sensitized solar cells –Batteries–Fuel cells, flow batteries –Supercapacitors • Sensors–Environmental monitoring –Industrial process control –Healthcare/medical2450-EC power envelope.2450-E C E l e c t r o c h e m i s t r y L a b S y s t e mEase of Use Beyond the TouchscreenIn addition to its five-inch, color touch-screen, the 2450-EC front panel has many features that supplement itsspeed, user-friendliness, and learnability, including a USB 2.0 memory I/O port, a HELP key, a rotary navigation/control knob, a front/rear input selector button, and banana jacks for basic bench appli-cations. The USB 2.0 memory port sup-ports easy data storing, saving instru-ment configurations, loading test scripts, and system upgrades. Plus, all front panel buttons are backlit to enhance vis-ibility in low-light environments.Comprehensive Built-in ConnectivityRear panel access to rear-input triax connectors, remote con-trol interfaces (GPIB, USB 2.0, and LXI/Ethernet), D-sub 9-pin digital I/O port (for internal/external trigger signals and handler control), instrument interlock control, and TSP-Link ® jacks enables easy configuration of multiple instrument test solu-tions and eliminates the need to invest in additional adapter accessories.Free Instrument Control Start-up SoftwareThe 2450-EC can be repurposed for applications beyond electrochemistry as a general purpose lab tool, e.g. I-V test-ing, leakage testing, battery charge/discharge profiling, etc. KickStart, Keithley’s instrument control non-programming start-up software, lets users start taking measurements in min-utes for typical current versus voltage applications. In most cases, users mere-ly need to make quick measurements, graph the data, and store the data to disk to perform analysis in software environments such as Excel.KickStart offers the following functionality:• Instrument configuration control to perform I-V characterization • Native X-Y graphing, panning, and zooming• Spreadsheet/tabular viewing of data • Saving and exporting data forfurther analysis• Saving of test setups• Screenshot capturing of graph • Annotation of tests• Command line dialog for sending and receiving data • HTML help• GPIB, USB 2.0, Ethernet compliantOnline HELP key USB 2.0memory I/OFront/rear input selectorRotarynavigation/control knob5˝ color graphical touchscreen displayModel 2450-EC front panel with high resolution, capacitive touchscreen.With KickStart start-up software, users are ready to take measurements in minutes.EthernetTriax inputsDigital I/O TSP-Link GPIBInterlockUSB Rear panel connections are optimized for signal integrity.2450Simplified Programming with Ready-to-Use Instrument Drivers For those who prefer to create their own customized application software,native National Instruments LabVIEW® drivers, as well as IVI-C and IVI-COM drivers are available at .Test Script SpecificationsCYCLIC VOLTAMMETRYPotential Range: ±5VVoltage Step Size During Ramping:100µV (0.1mV/s ≤ scan rate < 35mV/s)1mV (35mV/s ≤ scan rate < 350mV/s )10mV (350mV/s ≤ scan rate ≤ 3500mV/s)Scan Rate: 0.1mV/s to 3500mV/sCurrent Measurement Range (full scale): 100µA, 1mA, 10mA, 100mA, 1ANumber of Cycles: 1 to 100User Selectable Sampling Interval Units: Points/ Test, Points/Cycle, Seconds/Point, Points/Second, mV/Point, Points/mV, mA/Point, Points/mA Maximum number of readings: up to 100,000 OPEN CIRCUIT POTENTIALVrange: 0.02 V,0.2 V,2 V,20 VNumber of Samples: 1 ≤ n ≤ 100,000Measure Interval: 0.75s ≤ measurement interval ≤ 100s POTENTIAL PULSE AND SQUARE WAVE Peak Potential: Vpeak ≤ ±20 VBase Potential: Vbase ≤ ±20 VCurrent Ranges: 1 µA, 10 µA, 100 µA, 1 mA, 10 mA, 100 mA, 1APulse Period and Width:Irange = 1 µA200 ms ≤ period ≤ 3600 s100 ms≤ pulse width ≤ (0.99 × period)sIrange = 10 µA, 100 µA, 1 mA, 10 mA, 100 mA, 1 A4 ms ≤ period ≤ 3600 s2 ms ≤ pulse width ≤ (0.99 × period)s Number of Cycles: 1 ≤ n ≤ 100,000Program Time:10 ms ≤ program time ≤ (100,000 × period)s Sample Time: 0.01 PLC ≤ sample time ≤ 10 PLC & sample time ≤ (pulse width – 0.001)s CURRENT PULSE AND SQUARE WAVEPeak and Base Current: Ipeak ≤ ±1A, Ibase ≤ ±1APotential Ranges: 0.02 V, 0.2 V, 2 V, 20 VPulse Period and Width:Ipeak ≤ 1.05 µA200 ms ≤ period ≤ 3600 s100 ms ≤ pulse width ≤ (0.99 × period)s1.05 µA < Ipeak ≤ 1A4 ms ≤ period ≤ 3600 s2 ms ≤ pulse width ≤ (0.99 × period)sNumber of Cycles: 1 ≤ n ≤ 100,000Program Time:10 ms ≤ program time ≤ (100,000 × period)sSample Time: 0.01 PLC ≤ sample time ≤ 10 PLC &sample time ≤ (pulse width - 0.001)sCHRONOAMPEROMETRYStep Potential: Vstep ≤ ±20 VCurrent Ranges: 10 nA, 100 nA, 1 µA, 10 µA, 100 µA,1 mA, 10 mA, 100 mA, 1AStep Duration: 10 ms ≤ t ≤ 99,999 sMeasurement Interval:10 ms ≤ measurement interval ≤ 100 sSample Period: 0.01 PLC ≤ sample period ≤ 10 PLC &sample period ≤ (measurement interval – 0.005)s &sample period ≤ (t – 0.005)sCHRONOPOTENTIOMETRYStep Current: Istep ≤ ±1.05 APotential Ranges: 0.02 V, 0.2 V, 2 V, 20 VStep Duration: 10 ms ≤ t ≤ 99,999sMeasurement Interval:10 ms ≤ measurement interval ≤ 100sSample Period: 0.01 PLC ≤ sample period ≤ 10 PLC &sample period ≤ (measurement interval – 0.005)s &sample period ≤ (t – 0.005)sACCESSORIES AVAILABLETEST LEADS AND PROBES1754 2-wire Universal 10-Piece Test Lead Kit5804 Kelvin (4-Wire) Universal 10-Piece Test Lead Kit5805 Kelvin (4-Wire) Spring-Loaded Probes5806 Kelvin Clip Lead Set5808 Low Cost Single-pin Kelvin Probe Set5809 Low Cost Kelvin Clip Lead Set8605 High Performance Modular Test Leads8606 High Performance Modular Probe Kit8608 High Performance Clip Lead SetCABLES, CONNECTORS, ADAPTERS237-ALG-2 3-slot Male Triax Connector to 3 Alligator Clips237-BAN-3A Triax to Banana Plug2450-TRX-BAN Triax to Banana Adapter. Converts the 4 Triaxadapters on the rear panel to 5 banana jacks7078-TRX-* 3-slot, Low Noise Triax Cable7078-TRX-GND 3-slot Male Triax To BNC Adapter (guard removed)8607 2-wire, 1000V Banana Cables, 1m (3.3 ft)CA-18-1 Shielded Dual Banana Cable, 1.2m (4 ft)CAP-31 Protective Shield/Cap for 3-lug Triax ConnectorsCS-1546 Triax 3-lug Special Shorting Plug. Shorts centepin to outer shieldCS-1616-3 Safety Interlock Mating ConnectorCOMMUNICATION INTERFACES & CABLESKPCI-488LPA IEEE-488 Interface for PCI BusKUSB-488B IEEE-488 USB-to-GPIB Interface Adapter7007-1 Shielded GPIB Cable, 1m (3.3 ft)7007-2 Shielded GPIB Cable, 1m (6.6 ft)CA-180-3A CAT5 Crossover Cable for TSP-Link/EthernetUSB-B-1 USB Cable, Type A to Type B, 1m (3.3 ft)TRIGGERING AND CONTROL2450-TLINK DB-9 to Trigger Link Connector Adapter.8501-1 Trigger Link Cable, DIN-to-DIN, 1m (3.3 ft)8501-2 Trigger Link Cable, DIN-to-DIN, 2m (6.6 ft)RACK MOUNT KITS4299-8 Single Fixed Rack Mount Kit4299-9 Dual Fixed Rack Mount Kit4299-10 Dual Fixed Rack Mount Kit. Mount one 2450and one Series 26xxB4299-11 Dual Fixed Rack Mount Kit. Mount one 2450and one Series 2400, Series 2000, etc.2450-BenchKit Ears and Handle for 2450-NFP-RACKand 2450-RACK modelsSERVICES AVAILABLE2450-EC-3Y-EW 1 Year Factory Warranty extended to 3 years fromdate of shipment2450-EC-5Y-EW 1 Year Factory Warranty extended to 5 years fromdate of shipmentC/2450-3Y-17025 KeithleyCare® 3 Year ISO 17025 Calibration PlanC/2450-3Y-DATA KeithleyCare 3 Year Calibration w/Data PlanC/2450-3Y-STD KeithleyCare 3 Year Std. Calibration PlanC/2450-5Y-17025 KeithleyCare 5 Year ISO 17025 Calibration PlanC/2450-5Y-DATA KeithleyCare 5 Year Calibration w/Data PlanC/2450-5Y-STD KeithleyCare 5 Year Std. Calibration PlanC/New Data Calibration Data for New UnitsC/New Data ISO ISO-17025 Calibration Data for New Units245Voltage Specifications1,7SourceMeasure 2Accuracy (23° ±5°C)1 YearNoise (RMS) Input Accuracy (23° ±5°C)1 Year Current Specifications1,7SourceMeasure 2Accuracy (23° ±5°C)31 YearNoise (RMS) Voltage Accuracy (23° ±5°C)1 Year TEMPERATURE COEFFICIENT (0°–18°C and 28°–50°C): ±(0.15 × accuracy specification)/°C.1. Speed = 1 PLC.2. Accuracies apply to 2- and 4-wire mode when properly zeroed.3. For sink mode, 1µA to 100mA range accuracy is ±(0.15% + offset*4). For 1A range, accuracy is ±(1.5% + offset*8).4.Rear panel triax connections only.Resistance Measurement Accuracy (Local or Remote Sense)7Range Default Resolution Default Test CurrentNormal Accuracy (23°C ±5°C)1 Year, ±(% rdg. + ohms)Enhanced Accuracy 6(23°C ±5°C)1 Year, ±(% rdg. + ohms) < 2.000000 W 5 1 µW —Source I + Meas. V Meas. I + Meas. V TEMPERATURE COEFFICIENT (0°–18°C and 28°–50°C): ±(0.15 × accuracy specification)/°C.SOURCE CURRENT, MEASURE RESISTANCE MODE:Total uncertainty = I source accuracy + V measure accuracy (4-wire remote sense).SOURCE VOLTAGE, MEASURE RESISTANCE MODE:Total uncertainty = V source accuracy + I measure accuracy (4-wire remote sense).GUARD OUTPUT IMPEDANCE: 0.5W (DC) in ohms mode.5. Source Current, Measure Resistance or Source Voltage, Measure Resistance only.6. Source readback enabled. Offset compensation ON.7. All specifications are guaranteed with output ON.OPERATING CHARACTERISTICSMAX. OUTPUT POWER: 20W, four-quadrant source or sinkoperation.SOURCE/SINK LIMITS:Vsource: ±20V @ ±1.00A, ±200V @ ±100mA.Isource: ±1.00A @ ±20V, ±100mA @±200V.REGULATION:sVoltage: Line: 0.01% of range. Load: 0.01% of range + 100µV.Current: Line: 0.01% of range. Load: 0.01% of range + 100pA.SOURCE LIMITS:Voltage Source Current Limit: Bipolar current limit set with single value. Min. 10% of range.Current Source Voltage Limit: Bipolar voltage limit set with single value. Min. 10% of range.OVERSHOOT:Voltage Source: <0.1% typical (full scale step, resistive load, 20V range, 10mA I-Limit.Current Source:<0.1% typical (1mA step, R Load = 10k W , 20V range).VOLTAGE SOURCE:Noise 10Hz–1MHz (RMS): 2mV typical into a resistive load.OVER VOLTAGE PROTECTION: User selectable values, 5% tolerance. Factory default = none.OUTPUT SETTLING TIME: Time required to reach 0.1% of final value, 20V range, 100mA I-Limit: <200µs typical.MAXIMUM SLEW RATE: 0.2V/µs.V/I-LIMIT ACCURACY: Add 0.3% of setting and ±0.02% of reading to base specification.RANGE CHANGE OVERSHOOT: Overshoot into a fully resis-tive 100k W load, 10Hz to 1MHz BW, adjacent ranges: 100mV typical.2450S M U I N S T R U M E N T SSystem Measurement Speeds 8Reading rates (readings per second) typical for 60Hz (50Hz), (TSP ®) programmed9NPLC Trigger Origin Measure to Memory Measure to GPIB/USB/LAN Source Measure to Memory Source Measure to GPIB/USB/LAN 0.01 NPLC Internal 3050 (2800)2800 (2500)1700 (1600)1650 (1550)NPLCTrigger Origin Measure to MemoryMeasure to GPIB/USB/LAN Source Measure to Memory Source Measure to GPIB/USB/LAN 0.01 NPLC Internal 3000 (2800)3000 (2790)1700 (1600)1550 (1500)9. 2450 SCPI programming mode. Speeds do not apply to 2400 SCPI mode.2450-E C S p e c i f i c a t i o n sContact Information:ASEAN / Australia (65) 6356 3900Austria 00800 2255 4835 Balkans, Israel, South Africa and other ISE Countries +41 52 675 3777Belgium 00800 2255 4835Brazil +55 (11) 3759 7627Canada180****9200Central East Europe and the Baltics +41 52 675 3777Central Europe & Greece +41 52 675 3777Denmark +45 80 88 1401Finland +41 52 675 3777France 00800 2255 4835Germany 00800 2255 4835Hong Kong 400 820 5835India 000 800 650 1835Italy 00800 2255 4835Japan 81 (3) 6714 3010Luxembourg +41 52 675 3777 Mexico, Central/South America & Caribbean 52 (55) 56 04 50 90Middle East, Asia, and North Africa +41 52 675 3777The Netherlands 00800 2255 4835Norway 800 16098People’s Republic of China 400 820 5835Poland +41 52 675 3777Portugal 80 08 12370Republic of Korea 001 800 8255 2835Russia & CIS +7 (495) 6647564South Africa +41 52 675 3777Spain 00800 2255 4835Sweden 00800 2255 4835Switzerland 00800 2255 4835Taiwan 886 (2) 2656 6688United Kingdom & Ireland 00800 2255 4835USA 1 800 833 9200Rev 0415For Further InformationTektronix maintains a comprehensive,constantly expanding collection ofapplication notes, technical briefs andother resources to help engineers workingon the cutting edge of technology.V isit or .Copyright © 2015, Tektronix. All rightsreserved. Tektronix products are coveredby U.S. and foreign patents, issued andpending. Information in this publicationsupersedes that in all previously publishedmaterial. Specification and price changeprivileges reserved. TEKTRONIX and TEKare registered trademarks of Tektronix, Inc.All other trade names referenced are theservice marks, trademarks or registeredtrademarks of their respective companies.111315 KI 1KW-60118-1A Tektronix Company。

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