半导体器件原理第三章

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半导体器件物理第三章PN结作业解析

6.把一个硅二极管用做变容二极管，在结的两边的掺杂浓度分别为 ND=1015cm-3 ， NA ＝ 1019cm-3 ，求在反偏电压为 1V 和 5V 时的二极管势垒电容（忽略二极管截面积的影响）。
7.一理想硅p-n结二极管，NA=1016cm-3， ND=1018cm-3，p0= n0= 10-6 s，ni=9.65×109cm-3， Dn=30 cm2/s， Dp=2 cm2/s，器件面积为2×10-4 cm2，计算室温下饱和电流的理论值及±0.7V时的正向和反向电流值。 8.采用载流子扩散与漂移的观点分析PN结空间电荷区的形成。
qV p( xn ) pn 0 exp kห้องสมุดไป่ตู้
4.推导杂质分布公式：
2 1 N (W ) [ ] 2 q s d (1 / C j ) / dV
5.长PN结二极管处于反偏压状态，求解下列问题：（ 1 ）解扩散方程求少子分布 np （ x ）和 pn （ x ），并画出他们的分布示意图。（2）计算扩散区内少子存储电荷。
9.采用载流子扩散与漂移的观点分析PN结的单向导电性。
第二章作业答案
n
dn J qnn E x qDn 0 dx
Dn
kT n q
kT dn E x qn dx akT E x q
n ND N0 exp ax
• 超量载流子注入一厚度为W的薄n型硅晶的一个表面上，并于另一个表面上取出，而其pn(W)=pno,在0<x<W的区域里没有电场。
第三章作业题
1.推导PN结空间电荷区内建电势差公式：
kT N A N D Vbi n p ln( ) 2 q ni

半导体器件物理_Chapter3_pn结及金属半导体接触

xn
pn结直流特性
PN结的特性单向导电性：
• 正向偏置
正向导通电压Vbi～0.7V(Si)
• 反向偏置反向击穿电压VB
• 正向导通，多数载流子扩散电流；反向截止，少数载流子漂移电流。
三 pn结的击穿特性
• 击穿机理：热击穿、雪崩击穿和隧道击穿。后两种属于电击穿。
• 热击穿：当pn结外加反向偏压增加时，对应于反向电流所损耗的功率增大，产生的热量也增加，从而引起结温上升，而结温的升高又导致反向电流增大。如果产生的热量不能及时散发出去，结温上升和反向电流的增加将会交替进行下去，最后使反向电流无限增长，如果没有保护措施，pn结将被烧毁而永久失效。这种击穿是由热效应引起的，所以称热击穿。
2、平衡pn结
（1）扩散流等于漂移流。（2）pn结的内建电势VD (N型 kqTlnNnANi2 D
接触电势差，由pn结两边的掺杂浓度决定，与半导体材料的特性相关。
平衡pn结能带图
P区能带相对于n区能带上移的原因：能带图是按电子的能量高低来画的。由于内建电场，使P区的电子能量在原来能级的基础，迭加上一个由电场引起的附加势能。能带上移的高度即为接触电势差。
在sd时间内，过剩载流子被抽取。
直到过剩载流子抽取完，二极管的偏压才由正偏变为负偏。
• 电荷贮存效应
贮存时间sd • 下降时间t • 反向恢复时间 sd＋t
–决定因素：
• 少子寿命p
• 正向注入电流If • 反向抽取电流Ir
由于If 、Ir常受到电路中其他条件的限制，所以，减小载流子寿命比较可行。
• PN结扩散电容来源于扩散区积累的过剩载流子电荷随外加电压的变化。过剩载流子随外加电压变化的同时，空间电荷区两侧的扩散区电荷也有变化。扩散区是中性的，积累过剩载流子的同时，在同一区也必然积累等量的过剩多子。

半导体物理学-第三章-半导体中载流子统计分布

当 E-EF>>k0T时,
fB E e x E p k E F T e x E kF p T e x k E p T
费米和玻耳兹曼分布函数
三、空穴的分布函数
空穴的费米分布函数和波尔兹曼分布函数
当 EF-E>>k0T时,
1 fE e x E F p E e x E F p e x E
整个价带的空穴浓度为
p0 NVexpEFk 0TEV NV称为价带的有效状态密度.
价带空穴浓度可理解为:全部空穴集中在价带顶EV上，其上空穴占据的状态数为NV个.
对于三种主要的半导体材料,在室温(300K)状况下,它们的有效状态密度的数值列于下表中.
导带和价带有效状态密度(300K)〔见课本P77〕
一、费米〔Fermi〕分布函数与费米能级
1.费米分布函数
电子遵循费米-狄拉克〔Fermi-Dirac〕统计分布规律。能量为E的一个独立的电子态被一个电子占据的几率为
K0玻尔兹曼常数，T确定温度，EF费米能级
费米能级的物理意义：化学势
EF (N F)T
当系统处于热平衡状态，也不对外界做功的状况下，系统中增加一个电子所引起的系统的自由能的变化等于系统的化学势也即为系统的费米能级
在导带中，E-EF>>k0T，则导带中的电子听从波尔兹曼分布，且随着E的增大，概率快速削减，所以导带中绝大多数电子分布在导带底四周
在价带中，EF-E>>k0T，则空穴听从波尔兹曼分布，且随着E的增大，概率快速增加，所以价带中绝大多数空穴分布在价带顶四周。
听从Boltzmann分布的电子系统非简并系统
§3.1 状态密度
假设在能带中能量E与E+dE之间的能量间隔dE内有量子态dZ个，则定义状态密度g 〔E〕为：

第三章双极型晶体管

ICn
电子电流电子流
上式等号右边第一项称为
发射效率，是入射空穴电
流与总发射极电流的比，
即：
I E•
I Ep IE
I Ep I Ep＋I En
第二项称为基区输运系数，
是到达集电极的空穴电流量
与由发射极入射的空穴电流
量的比，即
T
I Cp I Ep
所以 0＝T
发射区 (P )
}I EP
I En
基区 (n) I BB
(d)n-p-n双级型集体管的电路符号
图 4.2
+
VEC
-
E+
发射区基区集电区
P
n
P
+C
VEB
-B-
VCB
(a)理想一维p-n-p双级型集体管
IE E
+
+ VEC - IC - C
VEB
VBC
- + IB
B
(b)p-n-p双级型集体管的电路符号
-
VCE
+
E
发射区基区集电区
P
n
P
C
VBE
++ B
I En I BB
I B I E IC I En (I EpICp ) ICn
晶体管中有一项重要的参数
，称为共基电流增益，定义
为
0
I Cp IE
IB
空穴电流和空穴流
图4.5
因此，得到
＝
0
I
I Cp Ep＋I
En
＝
I Ep I Ep＋I En
I Cp I Ep
}
集电区(P)

半导体物理与器件第3章3

E EF exp( ) 1 k0T
所以：
E EF E EF 1 exp( ) exp( ) k0T k0T
则：
E EF f F ( E ) f B ( E ) exp( ) k0T
f B ( E ) 称为电子的玻尔兹曼分布函数
相应的，空穴的玻尔兹曼分布函数为 EF E 1 f B ( E ) exp( ) k0T
半导体器件原理与应用
Donald A. Neamen, Semiconductor Physics & Devices (4th) 第三章（下）

我们最终想要得到的是对半导体器件电流-电压特性的描述。由于电流是由电荷的定向运动产生导带的，所以确定半导体中用于导电的电子和空穴的数量（即载流子浓度）就显得相当重要。
1 两个球壳之间的体积为 4 k 2dk 8
kz

dZ 2 8
电子自旋
体积为a3的晶体中，E~(E+dE)之间量子态数即为： 1 4 k 2 k 2dk

3
dk
a
3
a3
ky
kx
半导体能带的状态密度

k2 单位体积的量子态密度即为： dZ 3 dk
3/2

价带顶中空穴的有效状态密度为
gv ( E ) 4 2m p h
3
Ev E
状态密度特征
gc ( E ) 4 2m h
3 3/2 n

E Ec
gv ( E )
4 2m h
3
3/2 p

Ev E

与能量E有抛物线关系，导带底附近，电子能量越大，状态密度越大；价带顶附近，空穴能量越大，状态密度越小。还与有效质量有关，有效质量大的能带中的状态密度大。

半导体物理第三章02

2/51
所谓本征半导体就是一块没有杂质和缺陷的半导体. 质和缺陷的半导体.在热力学温度零度时,价带中的全部量子态都被零度时, 电子占据, 电子占据,而导带中的量子态都是空的,也就是说, 空的,也就是说,半导体中共价键是饱和的,完整的. 是饱和的,完整的.
第三章02 第三章
3/51
当半导体的温度 T>0K时,就有电 T>0K时子从价带激发到导带去, 子从价带激发到导带去,同时价带中产生了空穴, 中产生了空穴,这就是所谓的本征激发.由于电子和空穴成对产生, 激发.由于电子和空穴成对产生, 导带中的电子浓度 n0应等于价带中的空穴浓度 p0,即n0= p0
当
ED EF >> k0T
nD ≈ 0并且nD ≈ N D
第三章02 第三章 26/51
即EF远在ED之下时,施主杂质全部电离远在E 之下时,
同理,对于受主杂质来说,如果费米能级同理,对于受主杂质来说, 远大于受主能级,则受主几乎全部电离. 远大于受主能级,则受主几乎全部电离.
NA pA = N A f A ( E ) = EF E A 1 1+ exp gA k0T NA p = N A p A = N A [1 f A ( E ) ] = EF E A 1 + g A exp kT
0.37m0 1.05×1019 5.7×1018 1.05× 5.7× 0.59m0 2.8×1019 2.8× 4.5×1017 4.5× 1.1×1019 1.1× 8.1×1018 8.1×
0.068m0 0.47m0
在一定温度下,要使载流子主要来源于本征激发, 在一定温度下,要使载流子主要来源于本征激发, 杂质含量不能超过一定限度.如室温下, 低于杂质含量不能超过一定限度.如室温下,Ge低于 10-9,Si低于 -12,GaAs低于 -15 低于10 低于10 低于低于

第三章-均匀半导体

对于自由电子，群速度为
v
1
dE dK
晶体中的群速度也具有同样的形式。也就是说，晶体中电子的速
度等于群速度，为
v
vg
1
dE dk
群速度正比于E-K关系曲线的斜率。因为动能是与运动相关的能量，因此可以推断，在处的动能。电子的总能量是动能和势能的和，所以，在导带底部的电子的总能量等于势能。也就是说，
有效质量反比于E-K关系曲线的斜率。
光电材料与半导体器件
❖ 下面考察作用在电子上的力。根据经典力学 F dEP dx
❖ 在准经典力学中，对于带底附近的电子，势能 EP 等于EC
,并且F dEC
dx
图3.2一个外部电场施加在半导体棒上（a）物理图像,(b)能带图。导带的电子被电场向右加速，在两次碰撞之间，保持恒定的能量运动
光电材料与半导体器件
图3.5 在热产生过程中，一个价带电子需要获得额外的能量，跃迁到导带。（a）
实际图像或化学键图示。（b）能带图。在复合过程（c）中，导带的一个电子
落到价带的空穴中，导带电子和价带空穴同时消失。电子还可以通过和其他粒
子碰撞（（c）图右边）而损失一部分能量
光电材料与半导体器件
3.5 非本征半导体
❖ 4、三维情况下，电子的（群）速度为
v
1 E (i K x
K j
K y
k
E
)
K z
❖ 5、对于每一个主要晶向，在K=0 处和简约布里渊区的边界都存在相对极值。
❖ 6、对于三维晶体，关系是很难画出来的。
❖ 7、在一个能带的相对极值附近，可以定义有效质量 m，* 以便应用牛顿
定律。在极小值附近，有效质量是正的；在极大值附近，有效质量是负的。

半导体物理第3章课件

9
第三章半导体中载流子的统计分布思考题
16、某含有一些施主的p型半导体在极低温度下（即T→0时）电子在各种能级上的分布情况如何？定性说明随温度升高分布将如何改变？ 17、什么叫载流子的简并化？试说明其产生的原因。有一重掺杂半导体，当温度升高到某一值时，导带中电子开始进入简并。当温度继续升高时简并能否解除？
14
第三章半导体中载流子的统计分布思考题
25、已知温度为500K时，硅ni= 4×1014cm-3 ，如电子浓度为2×1016cm-3，空穴浓度为 2×1014cm-3，该半导体是否处于热平衡状态？
15
第三章半导体中载流子的统计分布思考题
26、定性说明下图对应的半导体极性和掺杂状况
16
1
第三章半导体中载流子的统计分布思考题
2、什么叫统计分布函数？费米分布和玻尔兹曼分布的函数形式有何区别？在怎样的条件下前者可以过渡为后者？为什么半导体中载流子分布可以用波尔兹曼分布描述？ 3、说明费米能级EF的物理意义。根据EF位置如何计算半导体中电子和空穴浓度？如何理解费米能级EF是掺杂类型和掺杂程度的标志？
13
第三章半导体中载流子的统计分布思考题
23、定性讨论如下掺杂硅单晶费米能级位置相对于纯单晶硅材料的改变，及随温度变化时如何改变：（1）含有1016cm-3的硼；（2）含有1016cm-3的硼和9×1015cm-3的P；（3）含有1015cm-3的硼和9×1015cm-3的P； 24、说明两种测定施主和受主杂质浓度的实验方法的原理？
10
第三章半导体中载流子的统计分布思考题
18、有四块含有不同施主浓度的Ge样品。在室温下分别为：（1）高电导n-Ge；（2）低电导n-G；（3）高电导p-Ge；（4）低电导p-Ge；比较四块样品EF的位置的相对高低。分别说明它们达到全部杂质电离或本征导电时的温度的高低？杂质浓度愈高，全部电离时的温度将愈高；相应达到本征激发为主的温度也愈高。

功率半导体器件基本原理03章击穿电压最基础的章节

Chapter 3Breakdown VoltageThe most unique feature of power semiconductor devices is their ability to withstand high voltages. In transistors designed for microprocessors and semiconductor memories, the pressure to reduce their size to integrate more devices on a monolithic chip has resulted in a reduction in their operating voltage. In contrast, the desire to control larger power levels in motor drive and power distribution systems has encouraged the development of power devices with larger breakdown voltages. Typical applications for power devices were illustrated in Fig. 1.2. Depending upon the application, the breakdown voltage of devices can range from 20 to 30 V for voltage regulator modules (power supplies) used to deliver power to microprocessors in personal computers and servers to over 5,000 V for devices used in power transmission networks.In a semiconductor, the ability to support high voltages without the onset of significant current flow is limited by the avalanche breakdown phenomenon, which is dependent on the electric field distribution within the structure. High electric fields can be created within the interior of power devices as well as at their edges. The design optimization of power devices must be performed to meet the breakdown voltage requirements for the application while minimizing the on-state voltage drop, so that the power dissipation is reduced.Power devices are designed to support high voltages within a depletion layer formed across either a P–N junction, a metal–semiconductor (Schottky barrier) contact, or a metal–oxide–semiconductor (MOS) interface. Any electrons or holes – that enter the depletion layer either due to the space-charge generation phenomenon or by diffusion from adjacent quasineutral regions – are swept out by the electric field produced in the region by the applied voltage. As the applied voltage is increased, the electric field in the depletion region increases, resulting in acceleration of the mobile carriers to higher velocities. In the case of silicon, the mobile carriers attain a saturated drift velocity of 1 × 107 cm s−1 when the electric B.J. Baliga, Fundamentals of Power Semiconductor Devices, doi: 10.1007/978-0-387-47314-7_3,© Springer Science + Business Media, LLC 200892 FUNDAMENTALS OF POWER SEMICONDUCTOR DEVICESfield exceeds 1 × 105 V cm −1 as discussed in Chap. 2. With further increase in the electric field, the mobile carriers gain sufficient kinetic energy from the electric field, so that their interaction with the lattice atoms produces the excitation of electrons from the valence band into the conduction band. The generation of electron–hole pairs due to energy acquired from the electric field in the semiconductor is referred to as the impact ionization . Since the electron–hole pairs created by impact ionization also undergo acceleration by the electric field in the depletion region, they participate in the creation of further pairs of electrons and holes. Consequently, impact ionization is a multiplicative phenomenon, which produces a cascade of mobile carriers being transported through the depletion region leading to a signi-ficant current flow through it. Since the device is unable to sustain the application of higher voltages due to a rapid increase in the current, it is considered to undergo avalanche breakdown . Thus, avalanche breakdown limits the maximum operating voltage for power devices. In this chapter, the physics of avalanche breakdown is analyzed in relation to the properties of the semiconductor region that is supporting the voltage. After treating the one-dimensional junction, the edge terminations for power devices are described. Power devices require special edge terminations due to their finite area. The electric field at the edges usually becomes larger than in the middle of the device leading to a reduction of the breakdown voltage. Significant effort has been undertaken to develop a good understanding of the electric field enhancement at the edges, and methods have been proposed to mitigate the increase in the electric field. Various edge termination approaches are discussed in detail in this chapter because of their importance to maximizing the performance of power devices.3.1 Avalanche BreakdownThe maximum voltage that can be supported by a power device before the onset of significant current flow is limited by the avalanche breakdown phenomenon. In power devices, the voltage is supported across depletion regions. As discussed in Chap. 2, mobile carriers are accelerated in the presence of a high electric field until they gain sufficient energy to create hole–electron pairs upon collision with the lattice atoms. This impact ionization process determines the current flowing through the depletion region in the presence of a large electric field. An impact ionization coefficient was defined in Chap. 2 as the number of electron–hole pairs created by a mobile carrier traversing 1 cm through the depletion region along the direction of the electric field. The impact ionization coefficients for electrons and holes are a strong function of the magnitude of the electric field as shown in Fig. 2.10.3.1.1 Power Law Approximations for the Impact Ionization CoefficientsIt is convenient to use a power law, referred to as the Fulop’s approximation 1:357F (Si) 1.810E α−=×(3.1)Breakdown Voltage93for the impact ionization coefficients even though they actually increase exponentially with increasing electric field, when performing analytical derivations pertinent to the performance of silicon power devices. The impact ionization coefficient obtained by using this approximation is shown in Fig. 3.1 by the dashed line together with the impact ionization coefficient for electrons in silicon as governed by the Chynoweth’s law (shown by the solid line). In the same manner, it is convenient to use the Baliga’s power law approximation 2 for the impact ionization coefficients for 4H-SiC for analytical derivations:427B (4H-SiC) 3.910.E α−=×(3.2)The impact ionization coefficient obtained by using this approximation is also shown in Fig. 3.1 by the dashed line together with the impact ionization coefficient for holes in 4H-SiC as governed by the Chynoweth’s law (shown by a solid line).various edge terminations on the breakdown voltage. These analytical solutions the design of improved device structures.provide insight into the physics determining the breakdown phenomenon, enabling94 FUNDAMENTALS OF POWER SEMICONDUCTOR DEVICES3.1.2 Multiplication CoefficientThe avalanche breakdown condition is defined by the impact ionization rate becoming infinite. To analyze this, consider a one-dimensional reverse-biased N +/P junction with a depletion region extending primarily in the P-region. If an electron–hole pair is generated at a distance x from the junction, the hole will be swept toward the contact to the P-region, while the electron is simultaneously swept toward the junction with the N + region. If the electric field in the depletion region is large, these carriers will be accelerated until they gain sufficient energy to create electron–hole pairs during collisions with the lattice atoms. Based upon the definitions for the impact ionization coefficients, the hole will create [αp d x ] electron–hole pairs when traversing a distance d x through the depletion region. Simultaneously, the electron will create [αn d x ] electron–hole pairs when traversing a distance d x through the depletion region. The total number of electron–hole pairs created in the depletion region due to a single electron–hole pair initially generated at a distance x from the junction is given by 3,4n p 0()1()d ()d ,x WxM x M x x M x x αα=++∫∫(3.3)where W is the width of the depletion layer. A solution for this equation is given byn p 0()(0)exp ()d ,xM x M x αα⎡⎤=−⎢⎥⎣⎦∫ (3.4)where M (0) is the total number of electron–hole pairs at the edge of the depletionregion. Using this expression in (3.3) with x = 0 provides a solution for M (0):{}1p n p 00(0)1exp ()d d .Wx M x xααα−⎡⎤=−−⎢⎥⎣⎦∫∫ (3.5)Using this expression in (3.4) givesn p 0p n p 00exp ()d ().1exp ()d d xW xx M x x x ααααα⎡⎤−⎢⎥⎣⎦=⎡⎤−−⎢⎥⎣⎦∫∫∫ (3.6)This expression for M (x ), referred to as the multiplication coefficient , allowscalculation of the total number of electron–holes pairs created as a result of the generation of a single electron–hole pair at a distance x from the junction if the electric field distribution along the impact ionization path is known. The avalanche breakdown condition, defined to occur when the total number of electron–hole pairs generated within the depletion region approaches infinity, corresponds to M becoming equal to infinity. This condition is attained by setting the denominator of (3.6) to zero:Breakdown Voltage95{}p n p 0exp ()d d 1.Wxx x ααα⎡⎤−=⎢⎥⎣⎦∫∫(3.7)The expression on the left-hand side of (3.7) is known as the ionization integral .During the analysis of avalanche breakdown in power devices, it is common practice to find the voltage at which the ionization integral becomes equal to unity. If the impact ionization coefficients for electrons and holes are assumed to be equal, the avalanche breakdown condition can be written asd 1.Wx α=∫(3.8)This approach to the determination of the breakdown voltage is valid for power rectifiers and MOSFETs where the current flowing through the depletion region is not amplified. In devices, such as thyristors and IGBTs, the current flowing through the depletion region becomes amplified by the gain of the internal transistors. In these cases, it becomes necessary to solve for the multiplication coefficient instead of using the ionization integral. The multiplication coefficient for a high-voltage P +/N diode is given by 5p 61,1(/BV)M V =− (3.9)where V is the applied reverse bias voltage and BV is the breakdown voltage, while that for an N +/P diode is given byn 41.1(/BV)M V =−(3.10)Thus, the reverse current for a P +/N diode approaches infinity at a faster rate with increasing voltage than for an N +/P diode. This has been related to the diffusion current due to holes from the N-region in the P +/N diode.3.2 Abrupt One-Dimensional DiodePower devices are designed to support high voltages across a depletion layer formed at either a P–N junction, a metal–semiconductor (Schottky barrier) contact, or a metal–oxide–semiconductor (MOS) interface. The onset of the avalanche breakdown condition can be analyzed for all these cases, by assuming that the voltage is supported across only one side of the structure. This holds true for an abrupt P–N junction with a very high doping concentration on one side when compared with the other side. In junctions formed with a shallow depth and a high surface concentration with a lightly doped underlying region of opposite conductivity type, the depletion region extends primarily in the lightly doped region allowing their treatment as abrupt junctions.96 FUNDAMENTALS OF POWER SEMICONDUCTOR DEVICESThe analysis of a one-dimensional abrupt junction can be used to understand the design of the drift region within power devices. The case of a P +/N junction is illustrated in Fig. 3.2 where the P + side is assumed to be very highly doped, so that the electric field supported within it can be neglected. When this junction is reverse biased by the application of a positive bias to the N-region, a depletion region is formed in the N-region together with the generation of a strong electric field within it that supports the voltage. The Poisson’s equation for the N-region is then given by2D 2S Sd d (),d d V EQ x qN x x εε=−=−=−(3.11)where Q (x ) is the charge within the depletion region due to the presence of ionizeddonors, εS is the dielectric constant for the semiconductor, q is the electron charge, and N D is the donor concentration in the uniformly doped N-region.Integration of (3.11) with the boundary condition that the electric field must go to zero at the edge of the depletion region (i.e., at x = W D ) provides the electric field distribution:DD S()().qN E x W x ε=−−(3.12)Breakdown Voltage97The electric field has a maximum value of E m at the P +/N junction (x = 0) and decreases linearly to zero at x = W D . Integration of the electric field distribution through the depletion region provides the potential distribution:2D D S ().2qN x V x W x ε⎛⎞=−⎜⎟⎝⎠(3.13)This equation is obtained by using the boundary condition that the potential is zeroat x = 0 within the P + region. The potential varies quadratically as illustrated in the figure. The thickness of the depletion region (W D ) can be related to the applied reverse bias (V a ) by using the boundary condition:D a (),V W V =(3.14) D W =(3.15)Using these equations, the maximum electric field at the junction can be obtained:m E =(3.16)When the applied bias increases, the maximum electric field approaches values at which significant impact ionization begins to occur. The breakdown voltage is determined by the ionization integral becoming equal to unity:d 1,Wx α=∫(3.17)where α is the impact ionization coefficient discussed in Chap. 2. To obtain a closed-form solution for the breakdown voltage, it is convenient to use the power law for the impact ionization coefficient in place of Chynoweth’s law. Substituting the Fulop’s power law into (3.17) with the electric field distribution given by (3.12), analytical solutions for the breakdown voltage and the corresponding maximum depletion layer width can be derived for silicon:133/4PP DBV (Si) 5.3410N −=× (3.18) and107/8PP D (Si) 2.6710.W N −=×(3.19)In a similar manner, substituting the Baliga’s power law into (3.17) with theelectric field distribution given by (3.12), analytical solutions for the breakdown voltage and the corresponding maximum depletion layer width can be derived for 4H-SiC:98 FUNDAMENTALS OF POWER SEMICONDUCTOR DEVICES153/4PP DBV (4H-SiC) 3.010N −=× (3.20)and117/8PP D (4H-SiC) 1.8210.W N −=×(3.21)The breakdown voltage is plotted in Fig. 3.3 as a function of the doping concentration on the lightly doped side of the junction. It can be seen that the breakdown voltage decreases with increasing doping concentration. It is worth pointing out that it is possible to support a much larger voltage in 4H-SiC when compared with silicon for any given doping concentration. The ratio of the breakdown voltage in 4H-SiC to that in silicon for the same doping concentration is found to be 56.2. It is also obvious from this figure that for a given breakdown voltage, it is possible to use a much higher doping concentration in the drift region for 4H-SiC devices when compared with silicon devices. The ratio of the doping concentration in the drift region for a 4H-SiC device to that for a silicon device with the same breakdown voltage is found to be 200. The maximum depletion width reached at the onset of breakdown is shown in Fig. 3.4 for silicon and 4H-SiC. It can be seen that the thickness of the lightly doped side of the junction must be increased to support larger voltages. For the same doping concentration, the maximum depletion width in 4H-SiC is 6.8 times larger than that in silicon because it can sustain a much larger electric field. However, for a given breakdown voltage, the depletion width in 4H-SiC is smaller than for a silicon device because of the much larger doping concentration in the drift region. This smaller depletion width, in conjunction with the far larger dopingBreakdown Voltage 99 concentration, results in an enormous reduction in the specific on-resistance of the drift region in 4H-SiC when compared with silicon.The onset of the avalanche breakdown for an abrupt parallel-plane junction, as defined by the above equations, is accompanied by a maximum electric field at the junction referred to as the critical electric field for breakdown.100 FUNDAMENTALS OF POWER SEMICONDUCTOR DEVICESCombining (3.16) and (3.18), the critical electric field for breakdown in silicon is given by1/8C D (Si)4010,E N =(3.22)while that for 4H-SiC is given by41/8C D (4H-SiC) 3.310.E N =× (3.23)The critical electric field for 4H-SiC can be compared with that for silicon inFig. 3.5. In both cases, the critical electric field is a weak function of the doping concentration. For the same doping concentration, the critical electric field in 4H-SiC is 8.2 times larger than in silicon. The larger critical electric field in 4H-SiC results in a much larger Baliga’s Figure of Merit (see Chap. 1). The critical electric field is a useful parameter for identifying the onset of avalanche breakdown in power device structures. Due to the very strong dependence of the impact ionization coefficients on the electric field strength, avalanche breakdown can be usually assumed to occur when the electric field within any local region of a power device approaches the critical electric field. However, it is important to note that this provides only an indication of the onset of breakdown and the exact breakdown voltage must be determined by extracting the ionization integral. This is particularly true for devices where the electric field deviates from the triangular shape pertinent to an abrupt parallel-plane junction.3.3 Ideal Specific On-ResistanceThe specific on-resistance of the drift region is related to the breakdown voltage by (1.11) which is repeated here for discussion:2on,sp3S n C4BV .R E εµ= (3.24)An accurate modeling of the specific on-resistance requires taking into account the dependence of the critical electric field and mobility on the doping concentration, which varies as the breakdown voltage is changed. It is possible to do this by computing the doping concentration for achieving a given breakdown voltage and then using the equations for the depletion width and mobility as a function of doping concentration to obtain the specific on-resistance:PPon,sp n D.W R q N µ=(3.25)The specific on-resistance projected for the drift region in 4H-SiC devices by using the above method is compared with that for silicon devices in Fig. 3.6. The values for 4H-SiC are about 2,000 times smaller than for silicon devices for the samebreakdown voltage. This has encouraged the development of unipolar power devices,2 such as Schottky rectifiers and MOSFETs, from 4H-SiC.3.4 Abrupt Punch-Through DiodeIn the case of some power devices, such as P-i-N rectifiers, the resistance of the drift region is greatly reduced during on-state current flow by the injection of a large concentration of minority carriers. In these cases, the doping concentration of the drift region does not determine the resistance to the on-state current flow. Consequently, it is preferable to use a thinner depletion region with a reduceddoping concentration to support the voltage. This configuration for the drift region is called the punch-through design .The electric field distribution for the punch-through design is shown in Fig. 3.7. In comparison with the triangular electric field distribution shown in Fig. 3.2, the electric field for the punch-through design takes a trapezoidal shape. The electric field varies more gradually through the drift region due to its lower doping concentration and then very rapidly with distance within the N + end region due to its very high doping concentration. The electric field at the interface between the drift region and the N + end region is given byDP1m P S ,qN E E W ε=− (3.26)where E m is the maximum electric field at the junction, N DP is the doping concentration in the N-type drift region, and W P is the width of the N-type drift region.The voltage supported by the punch-through diode is given bym 1PT P 2E E V W +⎛⎞=⎜⎟⎝⎠ (3.27)if the small voltage supported within the N + end region is neglected. The punch-through diode undergoes avalanche breakdown when the maximum electric field (E m ) becomes equal to the critical electric field (E C ) for breakdown. Using this condition in (3.27) together with the field distribution in (3.26), the breakdown voltage for the punch-through diode is given by2DP P PT C P S BV .2qN W E W ε=− (3.28)The breakdown voltages calculated using this relationship are shown in Fig. 3.8 for silicon punch-through diodes with various thicknesses for the drift region. In performing these calculations, the change in the critical electric field with doping concentration was taken into account. For any doping concentration for the drift region, the breakdown voltage for the punch-through diode is reduced due to the truncation of the electric field at the N + end region. The breakdown voltage becomes smaller as the thickness of the drift region is reduced. From the point of view of designing the drift region for a P-i-N rectifier, it is possible to obtain a breakdown voltage of 1,000 V with a drift region thickness of about 50 µm. In contrast, a drift region thickness of 80 µm would be required in the nonpunch-through case. This reduced drift region thickness with the punch-through design is beneficial not only for reducing the on-state voltage drop but also for reducing the stored charge and consequently the reverse recovery power loss as discussed later in the book.A similar analysis for the breakdown voltages can be performed for punch-through diodes fabricated from 4H-SiC with various thicknesses for the drift region (Fig. 3.9). In performing these calculations, the change in the critical electric field with doping concentration, as described by (3.23), must be taken into account. In comparison with silicon punch-through diodes, a much higher (∼10 times) doping concentration can be used in the drift region for 4H-SiC to achievethe punch-through design with a given thickness for the drift region. From the point of view of designing the drift region for a P-i-N rectifier, it is possible to obtain a breakdown voltage of 10,000 V with a drift region thickness of about 50 µm in 4H-SiC. In contrast, a drift region thickness of 80 µm would be required in the nonpunch-through case. This reduced drift region thickness with the punch-through design is beneficial for reducing the on-state voltage drop. However, the minority carrier lifetime in 4H-SiC has been found to be low resulting in poor conductivity modulation of the drift region. It is therefore advisable to maintain a high doping concentration in the drift region for P-i-N rectifiers fabricated from 4H-SiC.3.5 Linearly Graded Junction DiodePower devices fabricated using junctions with high surface doping concentration and shallow thickness tend to behave like the abrupt junction diodes that were discussed in the previous sections. Power devices, such as thyristors, that are designed to support very high voltages (above 2,000 V) rely upon junctions with low surface concentration and large depth to enhance the blocking voltage capability. In addition, power devices with low (<50 V) blocking voltages, such as low-voltage power MOSFETs, require drift regions with relatively high doping concentrations that are comparable with the doping level on the diffused side of thejunction. A significant fraction of the reverse bias voltage is supported within the diffused side of the junction in this case as well.These types of junctions can be analyzed by assuming a linearly graded doping profile in the vicinity of the junction. A typical doping profile for a diffused junction diode is illustrated in Fig. 3.10. For diffused junctions, it is customary to plot the profile with the doping concentration displayed using a logarithmic scale as shown in the upper part of the figure. Due to the compensation of the N-region by the P-type dopant in the vicinity of the junction, the profile has a linear net doping distribution as illustrated in the lower portion of the figure. The diffused junction can therefore be treated as a combination of a linearly graded junction and a uniformly doped junction.If the linear doping grading is sufficiently steep, the maximum electric field at the junction can reach the critical electric field with the depletion region confined to this portion of the doping profile. The linearly graded junction is illustrated in Fig. 3.11 together with the electric field and potential distributions. Note that the depletion region extends to both side of the metallurgical junction by a distance W. With a positive voltage applied to the N-region, the junction becomes reverse biased with a net negative charge on the P-side due to the ionized acceptors having a greater concentration than the donors, while a net positive charge develops on the N-side due to the ionized donors having a greater concentration than the acceptors. The concentration of the net charge varies linearly with distance with a grade constant G.The breakdown voltage of this linearly graded junction can be analyzed by using the following charge distribution profile in Poisson’s equation:().Q x qGx = (3.29) Applying this charge distribution to the Poisson’s equation gives2S S d d ().d d V E Q x qGx x x εε−=−=−= (3.30)Integration of this equation with the boundary condition that the electric field must be zero at the edge of the depletion region (x = W ) provides the electric field distribution:22S()().2qG E x x W ε=− (3.31) The electric field varies parabolically with distance with its maximum value at the junction given by2m S .2qGW E ε= (3.32)Integration of the electric field distribution through the depletion region with the boundary conditions that the potential is zero at x = −W on the P-side of the junction yields323S ().326qG W W x x V x ε⎛⎞=+−⎜⎟⎝⎠ (3.33)This voltage distribution is shown at the bottom of Fig. 3.11. The depletion layer width (W ) on both sides of the junction can be obtained by using the boundary condition that the voltage on the N-side of the junction is equal to the applied bias (V a ):1/3S a 3.V W qG ε⎛⎞=⎜⎟⎝⎠ (3.34)In the case of devices, such as power MOSFETs, the extension of the depletion layer on the diffused side of the junction can lead to reach-thorough breakdown at well below the avalanche breakdown voltage. The depletion width calculated by using (3.34), based upon approximation of the diffused junction by a linearly graded junction, provides an analytical approach to designing the width of the P-base region.A closed-form analytical solution for the breakdown voltage of the linearly graded junction can be obtained by determination of the voltage at which theimpact ionization integral becomes equal to unity. Using the ionization integral given by (3.17) with Fulop’s approximation for the impact ionization coefficients and the electric field distribution given by (3.31),73522S 1.810()d 1.2W W qG x W x ε−−⎡⎤×−=⎢⎥⎣⎦∫ (3.35)The solution for this equation provides the depletion width at the point of breakdown for the linearly graded junction:57/15CL 9.110.W G −=× (3.36)Using this depletion width in (3.34), the breakdown voltage for the linearly graded junction is found to be given by92/5L BV 9.210.G −=× (3.37)As illustrated by the electric field distribution in Fig. 3.10, the diffused junction diode usually behaves as a combination of a linearly graded junction and an abrupt junction with uniform doping on the lightly doped side. The extension of the depletion region into the diffused side of the junction enhances the breakdown voltage to above that derived earlier for the abrupt parallel-plane junction because of the additional voltage that is supported on the diffused side of the junction. This can be taken advantage of during the design of low-voltage (<30 V) power MOSFETs.3.6 Edge TerminationsAll semiconductor devices have a finite size, which is achieved by sawing through the wafers to produce the chips that go into packages. The sawing of wafers, performed by using diamond-coated blades, produces severe damage to the crystal. In the case of power devices, if the sawing is performed through the junction that must support a high voltage, the crystal damage creates a high leakage current that degrades the breakdown voltage and its stability with respect to time. This problem can be addressed by using special junction terminations around the edges of the power devices, so that the depletion regions of the high-voltage junctions do not intersect with the saw lanes where the damage is located. Another approach that can be used to control and preserve a high breakdown voltage is by shaping the surface of the edges of the device. The earliest method for shaping the edges was by mesa etching. Subsequently, the beveling of the edges of wafers was found to be very effective in preserving the breakdown voltage of high-voltage power rectifiers and thyristors. With the widespread availability of ion implantation for the fabrication of power devices in the 1980s, the use of a lightly doped zone at the edges of junctions has been found to be effective in achieving high breakdown。

半导体器件物理(第三章半导体的表面特性)

O
xd max
x
同理，对N-Si衬底，有
VT (4 ε S qN D φ FN )1/ 2 COX
kT N D ln q ni
2 φ FN
φ FP
kT N A ln q ni
φ FN
3.3 MOS结构的阈值电压
3.3.2 实际MOS结构的阈值电压
1. 金属与半导体的功函数W 定义：功函数W是指一个能量位于费米能级 EF 处的电子从金属或半导体内部逸出到真空中所需要给予它的最小能量。
3.2 表面空间电荷区与表面势
d. VG>>0V 反型或强反型状态
电子反型层
( x)
Qm
耗尽层
VG 0
Ec
EFS EV
P Si
EF M
Metal
Ei
xd max
O
QSC
x
O
xd max
x
SiO2
P Si
电荷分布
当栅极电压 VG 进一步提高并使得表面势 φS 满足 φS>2φFP ，半导体表面吸引了更多数量的电子并形成电子反型层，空间电荷区厚度达到最大值 Xdmax,表面处能带弯曲如图所示。
可以得到如下表达式
φS φ(0)
qN A 2 xd 2 εS
3.2 表面空间电荷区与表面势
另外，表面空间电荷区的电场和电势分布如图所示，它们的表达式分别为：
E ( x)
qN A E ( x) ( xd x) εS
O
xd max
x
qN A φ( x) ( x xd )2 2 εS
3.3 MOS结构的阈值电压

半导体器件物理第三章总结

40
a
金字塔形角锥体的表面积S0等于四个边长为 a正三角形S之和 S0 = 4S = 4×a×a = a2 由此可见有绒面的受光面积比光面提高了倍即1.732倍。
41
图（15） 15）
当一束强度为E0的光投射到图中的A点，产生反射光Φ1 和进入硅中的折射光Φ2。反射光Φ1可以继续投射到另一方锥的B点，产生二次反射光Φ3和进入半导体的折射光Φ4 ；而对光面电池就不产生这第二次的入射。经计算可知还有 11%的二次反射光可能进行第三次反射和折射，由此可算得绒面的反射率为9.04%。 42
E = hf
当光子到达太阳电池表面，当光子到达太阳电池表面，一部分光子被反射掉了，分光子被反射掉了，但不是所有的光子都被反射掉，的光子都被反射掉，有一部分被 P-N结吸收或转化。结吸收或转化。结吸收或转化
15
当光子被吸收后，当光子被吸收后，光子的能量被转换交给晶格中的电子，这就是光生伏特效应（photovoltaic effect）。）。太阳电池由半导体材料制成，典型如：料制成，典型如：硅（Silicon））
图（16） 16）
20多年来单晶硅太阳电池商品化过程中，为提高太阳电池效率和降低制造成本优化绒面工艺一直没有停止过。以致出现了晶片绒面化的材料供应商。尚德太阳能电力有限公司在制绒过程中，对传统制绒工艺进行改革，有所创新，所制绒面颜色均匀一致无花篮印、白边、雨 43 点印迹，反射率曲线。
3.4.4 太阳电池的成本问题
19
• 光生伏特效应：
hγ≥ Eg，在P、N区产生电子空穴对光生载流子扩散至空间电荷区进入电荷区的电子和空穴被电场分别扫向N、P区 N P N区电子累积，P区空穴累积产生光生电势，同时对外部呈现光生电场，即开路电压

半导体器件原理-MOSFET的基本特性

3.2.3 影响 VT 的因素
6. 衬底偏置效应 (衬偏效应，Body effect) (3) VT(VBS) 衬偏效应下的转移特性
第三章 MOSFET的基本特性 33/121
3.1 MOSFET的结构和工作原理 3.2 MOSFET的阈值电压 3.3 MOSFET的直流特性 3.4 MOSFET的频率特性 3.5 MOSFET的开关特性 3.6 MOSFET的功率特性
3.2.3 影响 VT 的因素
6. 衬底偏置效应 (衬偏效应，Body effect)
(2) MOSFET 的 VT
0
VGS
n+
n+
p-Si
−|VBS|
EC
EC
EV
EV VGS = VFB, VBS = 0
EC 2qVB
EC
EV
VGS = VT, VBS = 0
EV
q |VBS| q |VBS|
q(2VB+|VBS|) EC EECV
耗尽型
p
n+
电子
+
D →S
S→D
+
−
D
D
G
BG
B
S
S
PMOS
增强型
耗尽型
n
p+
空穴
−
S→D
S→D
−
+
D
D
G
B
G
B
S
S
3.1 MOSFET的结构和工作原理79/121
3.1.5 MOSFET 的输出特性和转移特性
1. 输出特性
G
输入 S
D 输出
S
饱和区线性区
击穿区

第三半导体讲解

半导体物理与器件
上次课讲了能带理论。关于这个理论，不要求大家对能带理论的计算过程进行推导，而只需要记住这样几个重要的问题：
原子在相互靠近时，原子的波函数交叠导致能级分裂。分裂的能级数目和原胞数目、原胞内的原子数、以及原始能级的简并度有关。具体为N（原胞数） ×原胞内原子数×能级简并度。近似计算的结果表明：晶体中电子的波函数为一个类似于自由电子的平面波被一个和晶格势场同周期的函数所调幅的布洛赫波函数。由于周期性的边界条件。布洛赫波函数的波矢k只能取分立的值。k是描述半导体晶体电子共有化的波矢。它的物理意义是表示电子波函数位相的不同。每一个k对应着一个本征值（能量E）。而在特定的k值附近由于周期性晶格势场的简并微扰，使能带发生分裂，形成一系列的允带和禁带。由于En(k)具有周期性，因而可在同一个周期内表示出E~k曲线。这就是以能带分裂时的k值为边界的布里渊区。每个布里渊区内有N个k值，对应于一个准连续的能带。将所有的E~k通过平移操作置于最简单的布里渊区内，该布里渊区称为简约布里渊区，相应的波矢k称作简约波矢。
第三章固体量子理论初步
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半导体物理与器件
§3.3 硅和砷化镓的能带图
三维扩展电子在晶体中不同的方向上运动的时候遇到的势场是不同的，因而E-k关系是k空间方向上的函数
第三章
固体量子理论初步
24
半导体物理与器件
对于一维模型来说，关于k坐标对称，因而一个方向画出一半就可以表示另一半的曲线
第三章固体量子理论初步 21
半导体物理与器件
用能带理论解释导体、半导体、绝缘体的导电性：
0<Eg<6eV
Eg>6eV
金属
半导体

化合物半导体器件第三章半导体异质结全解

图3.3 晶格失配形成位错缺陷（张）应变Si示意图
Dai Xianying
化合物半导体器件
3.1 异质结及其能带图
3.1.2 异质结的能带图
图3 半导体能带边沿图
Dai Xianying
图4 孤立的n型和p型半导体能带图
化合物半导体器件
3.1 异质结及其能带图
3.1.2 异质结的能带图
（以突变异质结为例）
2、考虑界面态时的能带图
3）降低界面态 4）界面态的类型 5）巴丁极限
Dai Xianying
化合物半导体器件
3.1 异质结及其能带图
2、考虑界面态时的能带图
6）考虑界面态影响的异质结能带示意图
Dai Xianying
化合物半导体器件
3.1 异质结及其能带图
3.1.2 异质结的能带图
3、渐变异质结能带图
Dai Xianying
化合物半导体器件
第三章
• • • • •
半导体异质结
异质结及其能带图异质结的电学特性量子阱与二维电子气多量子阱与超晶格半导体应变异质结
Dai Xianying
化合物半导体器件
3.2 异质结的电学特性
3.2.1 突变异质结的I-V特性
突变异质结的I-V模型：扩散模型、发射模型、发射-复合模型、隧道模型、隧道复合模型。
两种势垒尖峰：（a）低势垒尖峰负反向势垒（b）高势垒尖峰正反向势垒
Dai Xianying
(a) (b) 图3.8 异型异质结的两种势垒示意图（a）负反向势垒；（b）正反向势垒
化合物半导体器件
3.2 异质结的电学特性
1、低势垒尖峰（负反向势垒异质结）的I-V特性
特征：势垒尖峰低于p区的EC

电力电子半导体器件3(SCR)

（三）特征参数 ①伏安特征
②换向特征：
两个反并旳晶闸管导通、关断相互影响——换向问题。
换向能力是晶闸管旳一种特有参数，用换向电流临界下降率
来表达(di/dt)c，为可靠运营，要求双向晶闸管有很强旳换向能力。原则将(di/dt)c分为0.2、0.5、1、2四个等级。如：200A旳器件， 0.2级为(di/dt)c=200× 0.2%= 0.4A/us ③额定通态方均根电流：I T(RMS)
４．触发脉冲宽度与陡度 ①触发脉冲宽度应确保SCR阳极电流在脉冲消失前到达擎住电流。
——最小宽度。脉冲宽度与负载性质及主电路形式有关如：单相整流，电阻性负载，宽度不小于10us
电感性负载，宽度不小于100us 三相全控桥式电路，单脉冲触发时，脉宽600—1200
双脉冲触发时，脉宽100左右。 ②前沿越陡，有利于开通，对并联、串联SCR同步触发越有利。
因为双向晶闸管工作在交流回路中，用方均根（有效值）来表征额定电流。定义：在原则散热条件下，导通角不不大于1700，允许流过器件旳最大交流正弦电流旳方均根值。
方均根电流与与一般SCR平均值电流之间换算关系：
国产双向晶闸管：KS系列
三、逆导晶闸管
前面旳SCR为逆阻型器件，反向高阻特征，正向可控导通。
2．正向电流越大，关断时间toff越长；外加反向电压越高，反向电流越大，关断时间可缩短；结温越高，关断时间越长。
3．关断时，过早施加正向电压，会引起误导通。
三、参数
（一）电压参数
1．断态不反复峰值电压VDSM 门极开路，加在SCR阳极正向电压上升到正向伏安特征曲线
急剧弯曲处所相应旳电压值。不能反复，每次连续时间不不小于10ms旳脉冲电压。（转折电压，不不小于VBO) ２．断态反复峰值电压VDRM

第三章半导体超晶格

第3章半导体超晶格3.1 半导体超晶格基本结构3.2 超晶格的应用举例3.1 半导体超晶格基本结构所谓的超晶格，是由几种成分不同或掺杂不同的超薄层周期性地堆叠起来而构成地一种特殊晶体。

超薄层堆叠地周期（称为超晶格地周期）要小于电子的平均自由程，各超薄层的宽度要与电子的德布罗意波长相当。

其特点为在晶体原来的周期性势场之上又附加了一个可以人为控制的超晶格周期势场，是一种新型的人造晶体。

超晶格的分类（一）复合超晶格利用异质结构，重复单元是由组分不同的半导体薄膜形成的超晶格称为复合超晶格，又称为组分超晶格。

按照能带不连续结构的特点可将这个类型超晶格分为四类：第Ⅰ类超晶格、第Ⅱ类错开超晶格、第Ⅱ类倒转型超晶格和第Ⅲ类超晶格。

（1）第Ⅰ类超晶格(GaAs/AlGaAs)GaAs 材料的见地完全包含在AlGaAs 的能隙之中，电子和空穴都位于窄带隙材料的势阱中v c g E E E ∆+∆=∆x 247.1E g ＝∆，与Al 的组分x 成正比。

（2）第Ⅱ类 —— 错开型超晶格（GaSbAs/InGaAs ）两个带隙互相错开，一个价带底在另一个价带底的下面。

电子和空穴分别处于两个不同的材料中形成了真实空间的间接带隙半导体（3）第Ⅱ类 —— 倒转型超晶格（InAs/GaSb ）一个导带底下降到另一个价带底之下。

电子和空穴可能并存于同一个能区中，形成电子－空穴系统Ec1与Ec2能量相差一个Es ，前者的导带与后者的价带部分重叠，从而可能发生从半导体到金属的转变（4）第Ⅲ类超晶格(HgTe/CdTe)宽带隙半导体CdTe 和零带隙半导体HgTe 构成的超晶格。

只有当超晶格的周期小于某一定值时才具有半导体特性，否则具有半金属特性。

超晶格能隙差由最低导带子能带和价带子能带的间距决定，价带能量不连续值近似为零，导带能量不连续值近似等于两种材料能隙之差。

（二）掺杂超晶格利用超薄层材料外延技术（MBE 或MOCVD ）生长具有量子尺寸效应的同一种半导体材料时，交替地改变掺杂类型的方法（即一层掺入N 型杂质，一层掺入P 型杂质），即可得到掺杂超晶格，又称为调制惨杂超晶格。

半导体器件原理Chapter3

NPN晶体管电流组成
I
EB n
emitter
current
injected
into
the
base
I
BE p
base
current
injected
into
the
emitter
I
BE R
recombination
in
the
base
current
region
I
CB p
reverse
biased
current
Semiconductor Devices
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中国科学技术大学物理系微电子专业
3、晶体管端电流的组成
工作在放大状态下pnp晶体管的各个电流分量为：
• IEP：从发射区注入的空穴电流， • IEN：从基区注入到发射区的电子电流， • I基CN区：形集成电的区电－流基，区结附近的热电子漂移到
• ICP：集电区－基区结的空穴注入电流。 • I合BR而＝必IEP须－补IC充P，的基电区子内电电流子。与空穴电流的复
pB (x)
pB0
pB0
qVE B
(e kT
1) sinh(WB
LpB
sinh(WB LpB )
x)
pB0
qVB C
(e kT
1) sinh(
x LpB )
sinh(WB LpB )
• 基区少子分布遵循双曲函数规律变化。它之所以不再是单个P-N结那样的简单指数分布函数，原因就在于离发射结很近的地方有集电结存在，从而改变了边界条件。
(a)均匀基区晶体管，传输机构以扩散为主，如合金管和全离子注入管。传输以扩散为主。