BZ-2RW82725551-A2;中文规格书,Datasheet资料
AON5820;中文规格书,Datasheet资料
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
VGS=0V, VDS=10V, f=1MHz VGS=0V, VDS=0V, f=1MHz
1000 1255 1510 pF
150 220 290 pF
100 168 235 pF
2.5
KΩ
SWITCHING PARAMETERS
Qrr
Body Diode Reverse Recovery Charge IF=10A, dI/dt=500A/µs
12
15
18
nC
A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design.
VDS=VGS, ID=250µA
0.3 0.65 1.0
V
ID(ON)
On state drain current
VGS=4.5V, VDS=5V
85
A
VGS=4.5V, ID=10A
5.5 7.4 9.5 mΩ
TJ=125°C 8
LWK-06-W250B-350;中文规格书,Datasheet资料
Special Use Sensors - Weldable Strain GagesStandard Weldable PatternsMicro-Measurements For technical questions, contact: micro-measurements@Document Number: 11519Micro-Measurements Standard Weldable Strain Gages and Temperature Sensors are specially designed for spot welding to structures and components. They are ideal for applications where test or environmental conditions preclude clamping and curing an adhesively bonded gage installation.These gages are equally advantageous when strain measurements must be made at an elevated temperature,but the nature of the test object does not permit the use of an elevated-temperature-curing adhesive.Surface preparation requirements are minimal; only an appropriate solvent cleaning and abrasion of the test part surface with silicon-carbide paper or a small, hand-held grinder is needed. Spot welding is accomplished with a portable stored-energy hand-probe spot welder, such as the Model 700. Environmental protection is as easily applied to a welded gage installation as to an adhesively bonded gage.Refer to Instruction Bulletin B-131 and Catalog A-110 for further information on installation and protective coatings,and to Bulletin 302 for specifications on the Model 700Welding/Soldering Unit.DESCRIPTION AND PERFORMANCEGeneral — All sensors are laboratory-prebonded, with a high-performance adhesive, to thin (0.005 in [0.13 mm])metal carriers. Sensor grids are fully encapsulated for protection against handling and installation damage.Standard weldable strain gages are offered in two series to meet differing performance requirements. Both series are available in either 06 or 09 self-temperature compensation.Strain gages with 06 S-T-C have Inconel carriers, while S-T-C 09 gages and temperature sensors are mounted on 300-series stainless steel.CEA-Series Welda le Strain Gage —Polyimide-encapsulated constantan foil grid, with large, rugged,copper-coated tabs. In most cases, the carrier can be contoured to a radius as small as 1/2in [13mm]. The CEASeries is ideal for direct leadwire attachment, before or after installation.Strain range is ±5000µin/in [±5000µm/m], and normal operating temperature range is –100° to +200°F [–75° to +95°C]. Short-term maximum temperature is +300°F [+150°C].LWK-Series Weldab le Strain Gage — Nickel-chromium alloy grid, encapsulated in fiberglass-reinforced epoxy phenolic. The LWK gage is provided with a three-wire lead system with 10 in [250 mm] of Teflon ®-insulated leadwire.This construction simplifies leadwire temperature compensation and provides for easy connection of the lead system to the instrumentation cable. Minimum installation radius is generally limited to 2in [50 mm].Strain range is ±5000µin/in [±5000µm/m], and normal operating temperature range is –320° to +500°F [–195° to +260°C]. Short-term maximum temperature is +550°F [+290°C].WWT-Series Temperature Sensor — High-purity nickel foil grid encapsulated in fiberglass-reinforced epoxy-phenolic,and equipped with integral three-tab terminal to facilitate leadwire attachment. The temperature sensor is normally installed on a flat surface of the workpiece, but, in any case,should always be oriented with the gridlines in the direction of minimum strain to avoid strain-induced errors (see Micro-Measurements Tech Note TN-506, Bondable Resistance Temperature Sensors and Associated Circuitry).With an appropriate LST Matching Network, the temperature response characteristic of the nickel can be linearized and scaled for direct readout (in degrees) with any strain indicator.Teflon is a Registered Trademark of DuPont.MEASUREMENT CONSIDERATIONSIt is important to note that operating characteristics of weldable strain gages (gage factor, transverse sensitivity,and thermal output) are specified for the basic strain gage itself — without the metal carrier. Thus, the properties are measured by bonding a conventional strain gage directly to an appropriate calibration specimen, following standard methods specified for all Micro-Measurements strain gages. This procedure assures the most accurate results,independent of the variables introduced by welding. In particular, the user should be aware that the gage factor specified on the engineering data sheet accompanying the gage applies only to the basic strain gage, without the shim. The effective gage factor of the weldable assembly (after welding to the test member) is commonly 5 to 10%lower than this, due primarily to the stiffness of the shim.The reduction in gage factor is not subject to quantitative generalization, because it depends on the cross-sectional properties of the test specimen, and on the mode of loading (e.g., bending versus direct stress). It has been demonstrated, however, that for a group of like specimens, loaded in the same manner, the weldable gages exhibit very good repeatability and uniformity of response. Therefore, when test requirements dictate greatest accuracy, the weldable gages should be calibrated on a specimen of the same material and cross section as the test part, and under the same mode of loading.Special Use Sensors - Weldable Strain GagesStandard Weldable PatternsMicro-MeasurementsDocument Number: 11519For technical questions, contact: micro-measurements@Note 1: Products with designations and options shown in bold are not RoHS compliant.GAGE PATTERN AND DESIGNATIONInsert Desired S-T-C No. in Spaces Marked XX.See Note 1RES.IN OHMS.DIMENSIONSCARRIERACTIVE GRID MATRIX Length Width Thick Length Width Length Width CEA-XX-W250A-120CEA-XX-W250A-350120 ± 0.4%350 ± 0.4%0.630.340.0050.2300.1250.440.1716.08.60.135.843.1811.24.3Most flexible and conformable pattern. T ype 326-DFV and 330-DFV flat three-conductor cable typically used to solder directly to copper-coated tabs.CEA-XX-W250C-120CEA-XX-W250C-350120 ± 0.4%350 ± 0.4%0.900.900.0050.2300.1250.440.1722.922.90.135.843.1811.24.3Tee rosette, used in biaxial stress states where directions of principal stresses are known. See W250A pattern for typical leadwire recom-mendations.LWK-XX-W250B-350350 ± 0.4%0.880.320.0050.2500.1250.620.1722.48.10.136.353.1815.74.3Wide-temperature-range linear pattern with 10 in [250 mm] pre-attached leads. Teflon insulation is pretreated for best bond to protective coatings.LWK-XX-W250D-350350 ± 0.4%1.15 1.150.0050.2500.1250.620.1729.229.20.136.353.1815.74.3Tee rosette, used in biaxial stress states where directions of principal stresses are known and a wide operating temperature range is required.WWT -TG-W200B-05050 ± 0.4% @ +75°F [+24°C]0.710.430.0050.2000.2000.520.2618.010.90.135.085.0813.16.6Easy-to-use temperature sensor that can be welded or adhesively bonded to the test structure. For standard bondable temperature sensors, see Document Number 11522, “T emperature Sensors and LST Networks.”Vishay Precision GroupDisclaimerALL PRODUCTS, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE.Vishay Precision Group, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay Precision Group”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product.The product specifications do not expand or otherwise modify Vishay Precision Group’s terms and conditions of purchase, including but not limited to, the warranty expressed therein.Vishay Precision Group makes no warranty, representation or guarantee other than as set forth in the terms and conditions of purchase. To the maximum extent permitted by applicable law, Vishay Precision Group disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability.Information provided in datasheets and/or specifications may vary from actual results in different applications and performance may vary over time. Statements regarding the suitability of products for certain types of applications are based on Vishay Precision Group’s knowledge of typical requirements that are often placed on Vishay Precision Group products. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application.No license, express, implied, or otherwise, to any intellectual property rights is granted by this document, or by any conduct of Vishay Precision Group.The products shown herein are not designed for use in life-saving or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay Precision Group products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay Precision Group for any damages arising or resulting from such use or sale. Please contact authorized Vishay Precision Group personnel to obtain written terms and conditions regarding products designed for such applications.Product names and markings noted herein may be trademarks of their respective owners.分销商库存信息: VISHAYLWK-06-W250B-350。
MEMORY存储芯片KMPC8275CVRMIBA中文规格书
MPC866/MPC859 Hardware Specifications, Rev. 28Freescale Semiconductor Maximum Tolerated Ratings3Maximum Tolerated RatingsThis section provides the maximum tolerated voltage and temperature ranges for the MPC866/859. Table 2 shows the maximum tolerated ratings, and Table 3 shows the operating temperatures.Table 3. Operating TemperaturesThis device contains circuitry protecting against damage due to high-static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for example, either GND or V DD ).Table 2. Maximum Tolerated RatingsRatingSymbol Value Unit Supply voltage 11 The power supply of the device must start its ramp from 0.0 V .VDDH–0.3 to 4.0V VDDL–0.3 to 2.0V VDDSYN–0.3 to 2.0V Difference between VDDL to VDDSYN100mV Input voltage 22 Functional operating conditions are provided with the DC electrical specifications in T able 6. Absolute maximumratings are stress ratings only; functional operation at the maxima is not guaranteed. Stress beyond those listed mayaffect device reliability or cause permanent damage to the device. See page 15.Caution : All inputs that tolerate 5 V cannot be more than 2.5 V greater than VDDH. This restriction applies topower-up and normal operation (that is, if the MPC866/859 is unpowered, a voltage greater than 2.5 V must not beapplied to its inputs).V in GND – 0.3 to VDDH V Storage temperature range T stg –55 to +150°C RatingSymbol Value Unit Temperature 1 (standard)1 Minimum temperatures are guaranteed as ambient temperature, T A. Maximum temperatures are guaranteed as junction temperature, T j .T A(min)0°C T j(max)95°C Temperature (extended)T A(min)–40°C T j(max)100°CMPC866/MPC859 Hardware Specifications, Rev. 2Freescale Semiconductor 9Thermal Characteristics4Thermal CharacteristicsTable 4 shows the thermal characteristics for the MPC866/859.Table 4. MPC866/859 Thermal Resistance Data RatingEnvironment Symbol Value Unit Junction-to-ambient 1 1 Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, airflow, power dissipation of other components on the board, and board thermal resistance.Natural Convection Single-layer board (1s)R θJA 22Per SEMI G38-87 and JEDEC JESD51-2 with the single-layer board horizontal.37°C/WFour-layer board (2s2p)R θJMA 33Per JEDEC JESD51-6 with the board horizontal.23Airflow (200 ft/min)Single-layer board (1s)R θJMA 330Four-layer board (2s2p)R θJMA 319Junction-to-board 44Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board near the package.R θJB 13Junction-to-case 55Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed pad packages where the pad would be expected to be soldered, junction-to-case thermal resistance is a simulated value from the junction to the exposed pad without contact resistance.R θJC 6Junction-to-package top 66 Thermal characterization parameter indicating the temperature difference between package top and junction temperature per JEDEC JESD51-2.Natural ConvectionΨJT 2Airflow (200 ft/min)ΨJT 2。
AA028P2-A2中文资料
25–31 GHz Surface Mount AmplifierFeaturess Surface Mount Package s 13 dB Gains +16 dBm Output Power s Single Voltage Operation s 100% RF and DC TestingAA028P2-A2Patent PendingDescriptionThe AA028P2-A2 is a broadband millimeterwave driver amplifier in a rugged surface mount package which is compatible with high volume solder installation.The amplifier is designed for use in millimeterwave communication and sensor systems as a gain stage in the receiver, transmitter, or LO chain when high gain and linearity are required.The robust ceramic surface mount package provides excellent electrical performance and a high degree of environmental protection for long-term reliability. A single supply voltage simplifies bias requirements.All amplifiers are screened at the operating frequencies prior to shipment for guaranteed performance.Amplifier is targeted for high volume millimeterwave applications such as point-to-point and point-to-multipoint wireless communications systems.Electrical Specifications at 25°C (V D = 5.5 V)ParameterSymbol Min.Typ.Max.Unit Drain CurrentI D70110mADCRFPin OutRF InIndicated by Missing CastellationsCharacteristicValue Operating T emperature (T C )-55°C to +90°C Storage Temperature (T ST )-65°C to +150°CBias Voltage (V D1)7V DC Power In (P IN )13 dBmAbsolute Maximum RatingsFrequency (GHz)Gain vs. FrequencyG a i n (d B )0510152020253035Frequency (GHz)Output Power vs. Frequency P 1 d B (d B m )10121416182025272931-15-10-520253035S 22S11Frequency (GHz)Return Loss vs. FrequencyR e t u r n Lo s s (d B )Frequency (GHz)Gain vs. FrequencyG a i n (d B )0510152025272931+85˚C-55˚C+25˚CTypical Performance Data (V D = 5.5 V)Outline0.2410.040 0.1940.0560.251(3.28 mm)2X 0.085Typical S-Parameters at 25°C (V D= 5.5 V)S11S21S12S22 Frequency(GHz)Mag.(dB)Ang.(Deg.)Mag.(dB)Ang.(Deg.)Mag.(dB)Ang.(Deg.)Mag.(dB)Ang.(Deg.) 1-1.8891-125.3600-43.2540164.3700-58.670-88.492-1.12620-126.7000 3-2.4345175.9900-35.784090.2530-53.792-88.848-3.10970154.1000 5-2.877199.7540-29.3650-42.4260-66.95560.394-3.45190-165.7400 7-3.239227.9020-25.1380-138.9600-45.067-77.408-5.02160128.2200 9-3.5435-34.6070-45.021028.5080-46.099-69.5740.1185555.1550 11-3.7858-83.1640-44.3000-80.0050-41.912-87.216-0.33998-9.6574 13-4.0416-122.2800-42.2600-73.9500-46.329-78.549-1.22410-58.8080 15-4.6036-159.9000-32.2730-110.7900-43.375-51.890-1.80850-96.3240 17-6.7582150.4900-18.7250171.5900-42.826-60.249-1.97470-127.2700 18-10.4750109.0100-11.1660129.3600-41.750-24.941-1.96860-142.4000 19-16.902018.9510-4.486077.5880-37.305-29.700-1.81710-158.8000 20-11.8620-131.09000.848244.5160-40.473-57.605-1.7880084.9140 21-10.0930142.74008.3172-45.1180-36.456-119.280-4.3170038.4980 22-8.793597.36209.4482-120.5400-35.487165.880-6.84150 3.4238 23-6.444048.86109.9504178.0300-35.753105.470-9.76340-40.7050 24-5.5792-1.699810.7623121.8400-35.55942.297-19.81200-92.3350 25-5.6318-51.024011.796066.6550-35.363-19.760-14.9100027.3380 26-6.2769-100.330012.1690 4.0189-34.294-71.223-7.86290-34.2280 27-8.1182-152.010013.1640-52.5350-33.817-128.310-7.12030-95.0830 28-12.4100161.540012.0730-115.5400-32.020178.760-10.03700-142.3600 29-17.1150147.260012.4960-170.9200-31.971121.260-13.45400-158.0600 30-15.6470120.750012.3430128.7300-32.15369.648-12.44600-174.4100 31-16.956037.126013.383062.0720-30.99512.728-14.62300156.8700 32-10.9470-164.390013.4400-40.9440-30.749-79.782-7.19450-176.2900 33-7.825888.1560 3.2386-136.7100-38.601-171.040-2.69680111.5000 34-7.353728.4740-7.9820168.9300-41.455151.590-1.8954056.9890 35-6.5525-19.3420-15.7300129.1800-38.99695.603-1.47920 6.1703 36-5.6230-65.3560-25.130097.3710-38.48756.350-1.16540-44.0600 38-3.7803-160.9200-31.5360 4.8599-33.430-18.492-0.98473-148.8900 40-2.235996.8240-25.9250-110.9000-28.181-125.890-1.47240101.8500“Alpha Two” Surface Mount Package Handling and MountingMillimeterwave components require careful mounting design to maintain optimal performance.The Alpha T wo surface mount package (patent pending) provides a rugged and repeatable electrical connection using standard solder techniques.HandlingThe Alpha T wo surface mount package is very rugged.However, due to ceramic ’s brittle nature, one should exercise care when handling with metal tools.Do not apply heavy pressure to the lid.Vacuum tools may be used to pick and place this part.Only personnel trained in both ESD precautions and handling precautions should be allowed to handle these packages.Package ConstructionThe Alpha T wo surface mount package consists of a base and a lid.The package base is ceramic with filled vias and plated castellations.The package lid is unplated alumina.The lid seal is epoxy.Mounting DesignThe Alpha T wo surface mount package is installed on top of a printed circuit board on a specially designed footprint.Mounting footprint geometry will be supplied by Alpha Industries in electronic formats or paper drawing.Mounting the PackageThe Alpha T wo surface mount package is compatible with high-volume surface mount installation using solder.RF and DC connections are accomplished with metallized edge castellations that hold solder fillets.Ground connections are accomplished by both metallized edge castellations and filled vias to the bottom of the package.Care should be taken to ensure that there are no voids or gaps in the solder so that a good RF , DC, and ground contact is maintained.Alpha Two Surface Mount Package InstallationPrinted Ccircuit BoardRogers 40030.008" (0.20 mm) ThickElectrically & Thermally Conductive Ground PlaneRF InRF OutDC LinesSolder FilletsFootprint Geometry for Alpha TwoSurface Mount PackageRF In RF OutDC ConnectionsDC Connections64 Via Holes。
AOZ8025DI;中文规格书,Datasheet资料
General DescriptionThe AOZ8025 is a 6-line device integrating EMI filtering with ESD protection for each line. It is designed to suppress unwanted EMI/RFI signals and provide electrostatic discharge (ESD) protection in portableelectronic equipment. This state-of-the-art device utilizes AOS leading edge Trench Vertical Structure [TVS]2 ™ technology for superior clamping performance and filter attenuation over the full operating display range. The AOZ8025 has been optimized for protection of color LCD displays and CCD camera lines in cellular phones and other portable consumer electronic devices.The AOZ8025 consists of six identical circuitscomprised of TVS diodes for ESD protection, and a resistor–capacitor network for EMI/RFI filtering. A series resistor value of 100Ω and a capacitance value of 9pF are used to achieve -20dB minimum attenuation from 1.0GHz to 3.0GHz. The TVS diodes provide effective suppression of ESD voltages in excess of ±20kV (contact discharge) and ±20kV (air discharge). This exceeds IEC 61000-4-2, level 4 ESD immunity test.The AOZ8025 comes in an RoHS compliant,3.0mm x 1.35mm DFN package and is rated over a -40°C to +85°C ambient temperature range.Featuresz 6 lines for EMI filtering and ESD protection:– Exceeds IEC 61000-4-2, level 4 (ESD) immunity test – ±20kV (contact discharge) and ±20kV (air discharge)z Trench Vertical Structure [TVS]2 ™ based technologyused to achieve excellent ESD clamping and filter performance over the full operating display rangez Filter performance: -20db attenuation from 1.0GHz to3.0GHzz Low operating voltage: 5.0Vz Capacitance stability over wide range of voltages andtemperaturesz DFN package: 3.0mm x1.35mm z Pb-Free deviceApplicationsz EMI filtering and ESD protection for data lines z LCD displays, camera interface, I/O interface z Portable handheld devices, cell phones,PDA phonesElectrical SchematicFigure 1.Ordering InformationAOS Green Products use reduced levels of Halogens, and are also RoHS compliant.Please visit /web/quality/rohs_compliant.jsp for additional information.Pin ConfigurationPin DescriptionPart NumberAmbient Temperature Range Package EnvironmentalAOZ8025DI-40°C to +85°C DFN-12RoHS Compliant Green ProductPin NumberPin NamePin Function1,12CH 1Channel 1 Connections 2, 11CH 2Channel 2 Connections 3, 10CH 3Channel 3 Connections 4, 9CH 4Channel 4 Connections 5, 8CH 5Channel 5 Connections 6, 7CH 6Channel 6 Connections Exposed PadGNDCommon Ground ConnectionAbsolute Maximum RatingsExceeding the Absolute Maximum ratings may damage the device.Notes:1. IEC 61000-4-2 discharge with C Discharge = 150pF, R Discharge = 330Ω.2. Human Body Discharge per MIL-STD-883, Method 3015 C Discharge = 100pF, R Discharge = 1.5k Ω.Electrical CharacteristicsT A = 25°C unless otherwise specified.Notes:3. The working peak reverse voltage, V RWM , should be equal to or greater than the DC or continuous peak operating voltage level.4. V BR is measured at the pulse test current I T .5. Measurements performed using a 100ns Transmission Line Pulse (TLP) system.6. Total capacitance is equal to 2 x C CH .7. Measured at 25°C, V R = 2.5V, f = 1.0MHz.8. Guaranteed by design.ParameterRatingStorage Temperature (T S )-65°C to +150°C ESD Rating per IEC61000-4-2, contact (1)±20kV ESD Rating per IEC61000-4-2, air (1)±20kV ESD Rating per Human Body Model (2)±30kVSymbolParameterConditionsMin.Typ.Max.UnitsV RWM Reverse Working Voltage (3)5.0V V BR Reverse Breakdown Voltage I T = 1mA (4)678V I R Reverse Leakage Current V RWM = 3.3V0.1µA V CLSignal Clamp VoltageI LOAD = 1A, positive clamp (5)(8)I LOAD = 1A, negative clamp (5)(8)7.0-3.0VI LOAD = 5A, positive clamp (5)(8)I LOAD = 5A, negative clamp (5)(8)8.0-8.0I LOAD = 12A, positive clamp (5)(8)I LOAD = 12A, negative clamp (5)(8)10.0-10.0R CH Total Series Resistance I R = 20mA90100110ΩC CH Channel Capacitance Input to Ground (6)(7)(8)8910pF f CCut-off Frequency Measured with 50Ω source and 50Ω load termination250MHz Attenuation from 1.0GHz to 3.0GHzV R = 0V Measured with 50Ω source and 50Ω load termination-20dBTypical Performance CharacteristicsPackage MarkingRevision HistoryRevision Revised Item Rev. 1.0Initial releaseAs used herein:1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.Alpha & Omega Semiconductor reserves the right to make changes to this data sheet at any time without notice.LIFE SUPPORT POLICYALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.分销商库存信息: AOSAOZ8025DI。
MP28275,DCDC降压芯片
TYPICAL APPLICATION （FOR NOTEBOOK）
Efficiency
VOUT=1.2V
1 IN BST 6
100
C4 0.1uF
90
EFFICIENCY (%)
L1 1.2uH
V IN=5V
C1 22uF 2, 3 SW 4, 5
80
VOUT 1.2V@5A R1 5K
70 60 50 40 30 20 10 0 0
1
MP28275 – 5A, 7V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
ORDERING INFORMATION
Part Number* MP28275EL Package 3x4 QFN14 Top Marking MP28275 Free Air Temperature (TA) -20C to +85C
IN SW SW SW SW BST EN/SYNC EXPOSED PAD ON BACKSIDE
GND GND GND VCC NC PG FB
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VIN ......................................... 9V VSW ..........................-0.3V (-5V for<10ns) to 10V VBS ....................................................... VSW + 6V All Other Pins ..................................-0.3V to +6V Operating Temperature.............. -20C to +85C Continuous Power Dissipation (TA = +25°C) (2) ……………………………………………......2.6W Junction Temperature ...............................150C Lead Temperature ....................................260C Storage Temperature............... -65C to +15ommended Operating Conditions
半导体传感器ADUM2402BRWZ中文规格书
Data SheetADuM1400/ADuM1401/ADuM1402 Rev. L | Page 19 of 31PACKAGE CHARACTERISTICS Table 8.ParameterSymbol Min Typ Max Unit Test Conditions Resistance (Input to Output)1R I-O 1012 Ω Capacitance (Input to Output)1C I-O 2.2 pF f = 1 MHz Input Capacitance 2C I 4.0 pF IC Junction to Case Thermal Resistance, Side 1θJCI 33 °C/W Thermocouple located at center of package underside IC Junction to Case Thermal Resistance, Side 2θJCO 28 °C/W 1 Device is considered a 2-terminal device; Pin 1, Pin 2, Pin 3, Pin 4, Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together and Pin 9, Pin 10, Pin 11, Pin 12, Pin 13, Pin 14, Pin 15, and Pin 16 are shorted together.2 Input capacitance is from any input data pin to ground.REGULATORY INFORMATIONThe ADuM1400/ADuM1401/ADuM1402 are approved by the organizations listed in Table 9. Refer to Table 14 and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels. Table 9.ULCSA VDE CQC TÜV Recognized Under UL 1577 Component RecognitionProgram 1 Approved under CSA Component Acceptance Notice 5A Certified according to DIN V VDE V 0884-10 (VDE V 0884-10):2006-122 Approved under CQC11-471543-2012 Approved according to IEC 61010-1:2001 (2nd Edition), EN 61010-1:2001 (2nd Edition),UL 61010-1:2004, andCSA C22.2.61010.1:2005Single Protection, 2500 V rms Isolation Voltage Basic insulation per CSA 60950-1-03 and IEC 60950-1, 780 V rms (1103 V peak) maximumworking voltageReinforced insulation, 560 V peak Basic Insulation per GB4943.1-2011, 415 V rms (588 V peak) maximum working voltage, tropical climate, altitude ≤ 5000 m Reinforced insulation, 400 V rmsmaximum working voltage Reinforced insulation per CSA 60950-1-03 andIEC 60950-1, 390 V rms(551 V peak) maximumworking voltageFile E214100 File 205078 File 2471900-4880-0001File CQC14001114900 Certificate U8V 05 06 56232 002 1 In accordance with UL 1577, each ADuM1400/ADuM1401/ADuM1402 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec (current leakage detection limit = 5 µA).2 In accordance with DIN V VDE V 0884-10, each ADuM1400/ADuM1401/ADuM1402 is proof tested by applying an insulation test voltage ≥1050 V peak for 1 sec (partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.INSULATION AND SAFETY RELATED SPECIFICATIONSTable 10.ParameterSymbol Value Unit Conditions Rated Dielectric Insulation Voltage2500 V rms 1-minute duration Minimum External Air Gap (Clearance)L(I01) 7.8 min mm Measured from input terminals to output terminals, shortest distance through air Minimum External Tracking (Creepage)L(I02) 7.8 min mm Measured from input terminals to output terminals, shortest distance path along body Minimum Clearance in the Plane of the PrintedCircuit Board (PCB Clearance)L(PCB) 8.3 min mm Measured from input terminals to output terminals, shortest distance through air, and line of sight, in the PCB mounting plane Minimum Internal Gap (Internal Clearance)0.017 min mm Insulation distance through insulation Tracking Resistance (Comparative Tracking Index)CTI>400V DIN IEC 112/VDE 0303 Part 1 Isolation Group II Material Group (DIN VDE 0110, 1/89, Table 1)ADuM1400/ADuM1401/ADuM1402Data Sheet Rev. L | Page 22 of 31PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONSV DD1*GND 1V IA V IB V DD2GND 2*V OA V OB V IC V OC V ID V OD NC V E2*GND 1GND 2*NC = NO CONNECT03786-005*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND 1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND 2 IS RECOMMENDED.Figure 5. ADuM1400 Pin Configuration Table 16. ADuM1400 Pin Function DescriptionsPin No.Mnemonic Description 1V DD1 Supply Voltage for Isolator Side 1. 2GND 1Ground 1. Ground reference for Isolator Side 1. 3V IA Logic Input A. 4V IB Logic Input B. 5V IC Logic Input C. 6V ID Logic Input D. 7NC No Connect. 8GND 1 Ground 1. Ground reference for Isolator Side 1. 9GND 2 Ground 2. Ground reference for Isolator Side 2. 10V E2 Output Enable 2. Active high logic input. V OA , V OB , V OC , and V OD outputs are enabled when V E2 is high or disconnected. V OA , V OB , V OC , and V OD outputs are disabled when V E2 is low. In noisy environments, connecting V E2 to an external logic high or low is recommended. 11V OD Logic Output D. 12V OC Logic Output C. 13V OB Logic Output B. 14V OA Logic Output A. 15GND 2Ground 2. Ground reference for Isolator Side 2. 16 V DD2 Supply Voltage for Isolator Side 2.。
AD8253ARMZ-R7,AD8253ARMZ-R7,AD8253ARMZ-R7,AD8253ARMZ-RL,AD8253ARMZ, 规格书,Datasheet 资料
10 MHz, 20 V/μs, G = 1, 10, 100, 1000 i CMOSProgrammable Gain Instrumentation AmplifierAD8253 Rev. AInformation furnished by Analog Devices is believed to be accurate and reliable. However, noresponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. T rademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, M A 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.FEATURESSmall package: 10-lead MSOPProgrammable gains: 1, 10, 100, 1000Digital or pin-programmable gain settingWide supply: ±5 V to ±15 VExcellent dc performanceHigh CMRR: 100 dB (minimum), G = 100Low gain drift: 10 ppm/°C (maximum)Low offset drift: 1.2 μV/°C (maximum), G = 1000 Excellent ac performanceFast settling time: 780 ns to 0.001% (maximum)High slew rate: 20 V/μs (minimum)Low distortion: −110 dB THD at 1 kHz,10 V swingHigh CMRR over frequency: 100 dB to 20 kHz (minimum) Low noise: 10 nV/√Hz, G = 1000 (maximum)Low power: 4 mAAPPLICATIONSData acquisitionBiomedical analysisTest and measurementGENERAL DESCRIPTIONThe AD8253 is an instrumentation amplifier with digitally programmable gains that has gigaohm (GΩ) input impedance, low output noise, and low distortion, making it suitable for interfacing with sensors and driving high sample rate analog-to-digital converters (ADCs).It has a high bandwidth of 10 MHz, low THD of −110 dB, and fast settling time of 780 ns (maximum) to 0.001%. Offset drift and gain drift are guaranteed to 1.2 μV/°C and 10 ppm/°C, respectively, for G = 1000. In addition to its wide input common voltage range, it boasts a high common-mode rejection of 100 dB at G = 1000 from dc to 20 kHz. The combination of precision dc performance coupled with high speed capabilities makes the AD8253 an excellent candidate for data acquisition. Furthermore, this monolithic solution simplifies design and manufacturing and boosts performance of instrumentation by maintaining a tight match of internal resistors and amplifiers.The AD8253 user interface consists of a parallel port that allows users to set the gain in one of two different ways (see Figure 1 for the functional block diagram). A 2-bit word sent via a bus can be latched using the WR input. An alternative is to use transparent gain mode, where the state of logic levels at the gain port determines the gain.FUNCTIONAL BLOCK DIAGRAMS S+IN6983-1Figure 1.8070605040302010–10–201k10k100k1M10M100MFREQUENCY (Hz)GAIN(dB)6983-23Figure 2. Gain vs. FrequencyTable 1. Instrumentation Amplifiers by CategoryGeneralPurposeZeroDriftMilGradeLowPowerHigh SpeedPGAAD82201AD82311AD620AD6271AD8250AD8221AD85531AD621AD6231AD8251AD8222AD85551AD524AD82231AD8253AD82241AD85561AD526AD8228AD85571AD6241 Rail-to-rail output.The AD8253 is available in a 10-lead MSOP package and is specified over the −40°C to +85°C temperature range, making it an excellent solution for applications where size and packing density are important considerations.AD8253Rev. A | Page 2 of 24TABLE OF CONTENTSFeatures .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings ............................................................ 6 Maximum Power Dissipation ..................................................... 6 ESD Caution .................................................................................. 6 Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ............................................. 8 Theory of Operation ...................................................................... 16 Gain Selection ............................................................................. 16 Power Supply Regulation and Bypassing ................................ 18 Input Bias Current Return Path ............................................... 18 Input Protection ......................................................................... 18 Reference Terminal .................................................................... 19 Common-Mode Input Voltage Range ..................................... 19 Layout .......................................................................................... 19 RF Interference ........................................................................... 19 Driving an Analog-to-Digital Converter ................................ 20 Applications Information .............................................................. 21 Differential Output .................................................................... 21 Setting Gains with a Microcontroller ...................................... 21 Data Acquisition ......................................................................... 22 Outline Dimensions ....................................................................... 23 Ordering Guide .. (23)REVISION HISTORY8/08—Rev. 0 to Rev. AChanges to Ordering Guide (23)7/08—Revision 0: Initial VersionAD8253SPECIFICATIONS+V S = +15 V, −V S = −15 V, V REF = 0 V @ T A = 25°C, G = 1, R L = 2 kΩ, unless otherwise noted.Table 2.Parameter Conditions Min Typ Max Unit COMMON-MODE REJECTION RATIO (CMRR)CMRR to 60 Hz with 1 kΩ Source Imbalance +IN = −IN = −10 V to +10 VG = 1 80 100 dBG = 10 96 120 dBG = 100 100 120 dBG = 1000 100 120 dB CMRR to 20 kHz1+IN = −IN = −10 V to +10 VG = 1 80 dBG = 10 96 dBG = 100 100 dBG = 1000 100 dB NOISEVoltage Noise, 1 kHz, RTIG = 1 45 nV/√HzG = 10 12 nV/√HzG = 100 11 nV/√HzG = 1000 10 nV/√Hz0.1 Hz to 10 Hz, RTIG = 1 2.5 μV p-pG = 10 1 μV p-pG = 100 0.5 μV p-pG = 1000 0.5 μV p-p Current Noise, 1 kHz 5 pA/√Hz Current Noise, 0.1 Hz to 10 Hz 60 pA p-p VOLTAGE OFFSETOffset RTI V OS G = 1, 10, 100, 1000 ±150 + 900/G μV Over Temperature T = −40°C to +85°C ±210 + 900/G μV Average TC T = −40°C to +85°C ±1.2 + 5/G μV/°C Offset Referred to the Input vs. Supply (PSR) V S = ±5 V to ±15 V ±5 + 25/G μV/V INPUT CURRENTInput Bias Current 5 50 nA Over Temperature2T = −40°C to +85°C 40 60 nA Average TC T = −40°C to +85°C 400 pA/°C Input Offset Current 5 40 nA Over Temperature T = −40°C to +85°C 40 nA Average TC T = −40°C to +85°C 160 pA/°C DYNAMIC RESPONSESmall-Signal −3 dB BandwidthG = 1 10 MHzG = 10 4 MHzG = 100 550 kHzG = 1000 60 kHz Settling Time 0.01% ΔOUT = 10 V stepG = 1 700 nsG = 10 680 nsG = 100 1.5 μsG = 1000 14 μsRev. A | Page 3 of 24AD8253Rev. A | Page 4 of 24AD8253Rev. A | Page 5 of 24Parameter Conditions Min Typ Max UnitPOWER SUPPLY Operating Range±5 ±15 V Quiescent Current, +I S 4.6 5.3 mA Quiescent Current, −I S 4.5 5.3mA Over Temperature T = −40°C to +85°C 6 mA TEMPERATURE RANGE Specified Performance−40 +85 °C1 See Figure 20 for CMRR vs. frequency for more information on typical performance over frequency.2Input bias current over temperature: minimum at hot and maximum at cold. 3See Figure 30 for input voltage limit vs. supply voltage and temperature. 4See Figure 32, Figure 33, and Figure 34 for output voltage swing vs. supply voltage and temperature for various loads. 5Add time for the output to slew and settle to calculate the total time for a gain change.TIMING DIAGRAMA0, A1WR06983-003Figure 3. Timing Diagram for Latched Gain Mode (See the Timing for Latched Gain Mode Section)AD8253Rev. A | Page 6 of 24ABSOLUTE MAXIMUM RATINGSTable 3.Parameter RatingSupply Voltage ±17 VPower Dissipation See Figure 4Output Short-Circuit CurrentIndefinite 1 Common-Mode Input Voltage ±V S Differential Input Voltage ±V S Digital Logic Inputs±V SStorage Temperature Range –65°C to +125°C Operating Temperature Range 2–40°C to +85°C Lead Temperature (Soldering 10 sec) 300°C Junction Temperature140°C θJA (4-Layer JEDEC Standard Board) 112°C/W Package Glass Transition Temperature140°C1 Assumes the load is referenced to midsupply.2Temperature for specified performance is −40°C to +85°C. For performance to +125°C, see the Typical Performance Characteristics section.Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.MAXIMUM POWER DISSIPATIONThe maximum safe power dissipation in the AD8253 package is limited by the associated rise in junction temperature (T J ) on the die. The plastic encapsulating the die locally reaches the junction temperature. At approximately 140°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8253. Exceeding a junction temperature of 140°C for an extended period can result in changes in silicon devices, potentially causing failure. The still-air thermal properties of the package and PCB (θJA ), the ambient temperature (T A ), and the total power dissipated in the package (P D ) determine the junction temperature of the die. The junction temperature is calculated as()JA D A J θP T T ×+=The power dissipated in the package (P D ) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (V S ) times the quiescent current (I S ). Assuming the load (R L ) is referenced tomidsupply, the total drive power is V S /2 × I OUT , some of which isdissipated in the package and some of which is dissipated in theload (V OUT × I OUT ). The difference between the total drive power and the load power is the drive power dissipated in the package.P D = Quiescent Power + (Total Drive Power − Load Power )()L 2OUT L OUTS S S D R V –R V2V I V P ⎟⎟⎠⎞⎜⎜⎝⎛×+×= In single-supply operation with R L referenced to −V S , the worstcase is V OUT = V S /2.Airflow increases heat dissipation, effectively reducing θJA . In addition, more metal directly in contact with the package leads from metal traces through holes, ground, and power planes reduces the θJA .Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature on a 4-layer JEDEC standard board.2.001.751.501.251.000.750.500.250–40–20120100806040200M A X I M U M P O W E R D I S S I P A T I O N (W )AMBIENT TEMPERATURE (°C)06983-004Figure 4. Maximum Power Dissipation vs. Ambient TemperatureESD CAUTIONAD8253Rev. A | Page 7 of 24PIN CONFIGURATION AND FUNCTION DESCRIPTIONS–IN DGND –V S A0A1+INREF+V S OUT WRAD8253TOP VIEW(Not to Scale)1234510987606983-005Figure 5. 10-Lead MSOP (RM-10) Pin ConfigurationAD8253Rev. A | Page 8 of 24TYPICAL PERFORMANCE CHARACTERISTICST A @ 25°C, +V S = +15 V , −V S = −15 V , R L = 10 kΩ, unless otherwise noted.CMRR (µV/V)21006983-006N U M B E R O F U N I T S180150120906030–60–40–20020INPUT OFFSET CURRENT (nA)240120180601502109030604020006983-009N U M B E R O F U N I T S–60–20–40Figure 6. Typical Distribution of CMRR, G = 1 Figure 9. Typical Distribution of Input Offset CurrentINPUT OFFSET VOLTAGE, V OSI , RTI (µV)180120150200100006983-007N U M B E R O F U N I T S–200–10006983-0101100kFREQUENCY (Hz)N O I S E (n V /√H z )101001k10k8070605040302010Figure 10. Voltage Spectral Density Noise vs. FrequencyFigure 7. Typical Distribution of Offset Voltage, V OSI 06983-011INPUT BIAS CURRENT (nA)30020025015010050906030006983-008N U M B E R O F U N I T S–90–30–60Figure 11. 0.1 Hz to 10 Hz RTI Voltage Noise, G = 1Figure 8. Typical Distribution of Input Bias CurrentAD8253Rev. A | Page 9 of 2406983-012Figure 12. 0.1 Hz to 10 Hz RTI Voltage Noise, G = 1000 06983-01318011FREQUENCY (Hz)N O I S E (p A /√H z )00k 101001k 10k 161412108642Figure 13. Current Noise Spectral Density vs. Frequency 06983-014Figure 14. 0.1 Hz to 10 Hz Current Noise 201816141210864200.010.1110WARM-UP TIME (Minutes)C H A N G E I N I N P U T O F F S E T V O L T A G E (µV )06983-015Figure 15. Change in Input Offset Voltage vs. Warm-Up Time, G = 10001401201008040600101M06983-016FREQUENCY (Hz)P S R R (d B )1001k 10k 100k 20Figure 16. Positive PSRR vs. Frequency, RTI1401201008040600101M06983-017FREQUENCY (Hz)P S R R (d B )1001k 10k 100k 20Figure 17. Negative PSRR vs. Frequency, RTIAD8253Rev. A | Page 10 of 2420100–10–20–30–40–50–6012.0I B +10.59.07.56.04.53.01.50–15–10–5051015COMMON-MODE VOLTAGE (V)I N P U T B I A S C U R R E N T (n A )I N P U T O F F S E T C U R R E N T (n A )06983-018I B –I OSFigure 18. Input Bias Current and Offset Current vs. Common-Mode Voltage 302520151050–10–5–60–40–20020406080100120140TEMPERATURE (°C)I N P U T B I A S C U R R E N T A N D O F F S E T C U R R E N T (n A )06983-019I B +I B –I OS Figure 19. Input Bias Current and Offset Current vs. Temperature 012010080604020106983-020FREQUENCY (Hz)C M R R (d B )1001k 10k 100k 1MFigure 20. CMRR vs. Frequency120100806040201006983-021FREQUENCY (Hz)C M R R (d B)1001k 10k 100k 1MFigure 21. CMRR vs. Frequency, 1 kΩ Source Imbalance–15–5013006983-022TEMPERATURE (°C)C M R R (µV /V )10155–5–10–30–101030507090110Figure 22. CMRR vs. Temperature, G = 180706050403020100–10–201k10k100k 1M 10M 100MFREQUENCY (Hz)G A I N (d B )006983-023Figure 23. Gain vs. Frequency40302010–10–300–20–40–10–8–6–4–2024681006983-024N O N L I N E A R I T Y (10p p m /D I V )OUTPUT VOLTAGE (V)Figure 24. Gain Nonlinearity, G = 1, R L = 10 kΩ, 2 kΩ, 600 Ω 40302010–10–300–20–40–10–8–6–4–2024681006983-025N O N L I N E A R I T Y (10p p m /D I V )OUTPUT VOLTAGE (V)Figure 25. Gain Nonlinearity, G = 10, R L = 10 kΩ, 2 kΩ, 600 Ω 80604020–20–600–40–80–10–8–6–4–2024681006983-026N O N L I N E A R I T Y (10p p m /D I V )OUTPUT VOLTAGE (V)Figure 26. Gain Nonlinearity, G = 100, R L = 10 kΩ, 2 kΩ, 600 Ω400300200100–100–3000–200–400–10–8–6–4–2024681006983-027N O N L I N E A R I T Y (10 p p m /D I V )OUTPUT VOLTAGE (V)Figure 27. Gain Nonlinearity, G = 1000, R L = 10 kΩ, 2 kΩ, 600 Ω16–1606983-028OUTPUT VOLTAGE (V)I N P U T C O M M O N -M O D E V O L T A G E (V )1284–4–8–12–12–8–44812Figure 28. Input Common-Mode Voltage Range vs. Output Voltage, G = 116–16–161606983-029OUTPUT VOLTAGE (V)I N P U T C O M M O N -M O D E V O L T A G E (V )1284–4–8–12–12–8–44812Figure 29. Input Common-Mode Voltage Range vs. Output Voltage, G = 1000+V S –V S4106983-030SUPPLY VOLTAGE (±V S )I N P U T V O L T A G E (V )R E F E R R E D T O S U P P L Y V O L T A G E S6–1–2+2+168101214Figure 30. Input Voltage Limit vs. Supply Voltage, G = 1, V REF = 0 V, R L = 10 kΩ–1––100m–10–1–100µ–10µ10DIFFERENTIAL INPUT VOLTAGE (V)C U R R E N T (m A )06983-0311001101001Figure 31. Fault Current Draw vs. Input Voltage, G = 1000, R L = 10 kΩ +V S –V S4106983-032SUPPLY VOLTAGE (±V S )OU T P U T V O L T A G E S W I N G (V )R E F E R R E D T O S U P P L Y V O L T A G E S668101214–0.2–0.4–0.6–0.8–1.0–1.2+1.0+1.2+0.8+0.6+0.4+0.2Figure 32. Output Voltage Swing vs. Supply Voltage, G = 1000, R L = 2 kΩ +V S –V S4106983-033SUPPLY VOLTAGE (±V S )O U T P U T V O L T A G E S W I N G (V )R E F E R R E D T O S U P P L Y V O L T A G E S668101214–0.2–0.4–0.6–0.8–1.0+1.0+0.8+0.6+0.4+0.2Figure 33. Output Voltage Swing vs. Supply Voltage, G =1000, R L = 10 kΩ15–1510010k06983-034LOAD RESISTANCE (Ω)1k105–5–10O U T P U T V O L T A G E S W I N G (V )Figure 34. Output Voltage Swing vs. Load Resistance+V S –V S4106983-035OUTPUT CURRENT (mA)668101214–0.4–0.8–1.2–1.6–2.0+2.0+1.6+1.2+0.8+0.4O U T P U T V O L T A G E S W I N G (V )R E F E R R E D T O S U P P L Y V O L T A G E SFigure 35. Output Voltage Swing vs. Output Current06983-036Figure 36. Small-Signal Pulse Response for Various Capacitive Loads, G = 1069TIME (µs)Figure 37. Large-Signal Pulse Response and Settling Time, G = 1, R L= 10 kΩ06983-038TIME (µs)Figure 38. Large-Signal Pulse Response and Settling Time,G = 10, R L= 10 kΩ06983-039TIME (µs)Figure 39. Large-Signal Pulse Response and Settling Time,G = 100, R L= 10 kΩ06983-040TIME (µs)Figure 40. Large-Signal Pulse Response and Settling Time,G = 1000, R L= 10 kΩ06983-041Figure 41. Small-Signal Response,G = 1, R L = 2 kΩ, C L = 10006983-042Figure 42. Small-Signal Response, G = 10, R L = 2 kΩ, C L = 100 pF06983-043Figure 43. Small-Signal Response, G = 100, R L = 2 kΩ, C L = 100 pF06983-044Figure 44. Small-Signal Response, G = 1000, R L = 2 kΩ, C L = 100 pF 06983-045120014000STEP SIZE (V)T I M E (n s )10008006004002004681012141618Figure 45. Settling Time vs. Step Size, G = 1, R L = 10 kΩ06983-04612001400STEP SIZE (V)T I M E (n s )10008006004002004681012141618Figure 46. Settling Time vs. Step Size, G = 10, R L = 10 kΩ06983-04722STEP SIZE (V)T I M E (n s )10008006001800160014004002004681012141618Figure 47. Settling Time vs. Step Size, G = 100, R L = 10 kΩ06983-048STEP SIZE (V)T I M E (µs )1086181614424681012141618Figure 48. Settling Time vs. Step Size, G = 1000, R L = 10 kΩ0–10–20–30–40–50–60–70–80–90–120–110–100101M06983-049FREQUENCY (Hz)T H D + N (d B )1001k 10k 100k Figure 49. Total Harmonic Distortion vs. Frequency,10 Hz to 22 kHz Band-Pass Filter, 2 kΩ Load0–10–20–30–40–50–60–70–80–90–120–110–100101M06983-050FREQUENCY (Hz)T H D + N (d B )1001k 10k 100k Figure 50. Total Harmonic Distortion vs. Frequency, 10 Hz to 500 kHz Band-Pass Filter, 2 kΩ LoadTHEORY OF OPERATIONREFOUTSS 06983-061Figure 51. Simplified SchematicTransparent Gain ModeThe AD8253 is a monolithic instrumentation amplifier based on the classic 3-op-amp topology, as shown in Figure 51. It is fabricated on the Analog Devices, Inc., proprietary i CMOS® process that provides precision linear performance and a robust digital interface. A parallel interface allows users to digitally program gains of 1, 10, 100, and 1000. Gain control is achieved by switching resistors in an internal precision resistor array (as shown in Figure 51).The easiest way to set the gain is to program it directly via a logic high or logic low voltage applied to A0 and A1. Figure 52 shows an example of this gain setting method, referred to through-out the data sheet as transparent gain mode. Tie WR to the negative supply to engage transparent gain mode. In this mode, any change in voltage applied to A0 and A1 from logic low to logic high, or vice versa, immediately results in a gain change. is the truth table for transparent gain mode, and shows the AD8253 configured in transparent gain mode.Table 5Figure 52All internal amplifiers employ distortion cancellation circuitry and achieve high linearity and ultralow THD. Laser-trimmed resistors allow for a maximum gain error of less than 0.03% for G = 1 and a minimum CMRR of 100 dB for G = 1000. A pinout optimized for high CMRR over frequency enables the AD8253 to offer a guaranteed minimum CMRR over frequency of 80 dB at 20 kHz (G = 1). The balanced input reduces the parasitics that in the past had adversely affected CMRR performance.NOTE:1. IN TRANSPARENT GAIN MODE, WR IS TIED TO −V S .THE VOLTAGE LEVELS ON A0 AND A1 DETERMINE THE GAIN. IN THIS EXAMPLE, BOTH A0 AND A1 ARE SET TO LOGIC HIGH, RESULTING IN A GAIN OF 1000.06983-051GAIN SELECTIONThis section describes how to configure the AD8253 for basic operation. Logic low and logic high voltage limits are listed in the Specifications section. Typically, logic low is 0 V and logic high is 5 V; both voltages are measured with respect to DGND. Refer to the specifications table (Table 2) for the permissible voltage range of DGND. The gain of the AD8253 can be set using two methods: transparent gain mode and latched gain mode. Regardless of the mode, pull-up or pull-down resistors should be used to provide a well-defined voltage at the A0 and A1 pins.Figure 52. Transparent Gain Mode, A0 and A1 = High, G = 1000Latched Gain ModeSome applications have multiple programmable devices such as multiplexers or other programmable gain instrumentation amplifiers on the same PCB. In such cases, devices can share a data bus. The gain of the AD8253 can be set using WR as a latch, allowing other devices to share A0 and A1. shows a schematic using this method, known as latched gain mode. The AD8253 is in this mode when Figure 53WR is held at logic high or logic low, typically 5 V and 0 V , respectively. The voltages on A0 and A1 are read on the downward edge of the WR signal as it transitions from logic high to logic low. This latches in the logic levels on A0 and A1, resulting in a gain change. See the truth table listing in for more on these gain changes.Table 6NOTE:FROM LOGIC HIGH TO LOGIC LOW, THE VOLTAGES ON A0AND A1 ARE READ AND LATCHED IN, RESULTING IN AGAIN CHANGE. IN THIS EXAMPLE, THE GAIN SWITCHES TO G = 1000.06983-052Figure 53. Latched Gain Mode, G = 10001X = don’t care.On power-up, the AD8253 defaults to a gain of 1 when inlatched gain mode. In contrast, if the AD8253 is configured in transparent gain mode, it starts at the gain indicated by the voltage levels on A0 and A1 on power-up.Timing for Latched Gain ModeIn latched gain mode, logic levels at A0 and A1 must be held for a minimum setup time, t SU , before the downward edge of WR latches in the gain. Similarly, they must be held for a minimum hold time, t HD , after the downward edge of WR to ensure that the gain is latched in correctly. After t HD , A0 and A1 may change logic levels, but the gain does not change until the next downward edge of WR . The minimum duration that WR can be held high is t -HIGH , and t -LOW is the minimum duration that WR can be held low. Digital timing specifications are listed in The time required for a gain change is dominated by the settling time of the amplifier. A timing diagram is shown in . Table 2.Figure 54When sharing a data bus with other devices, logic levels applied to those devices can potentially feed through to the output of the AD8253. Feedthrough can be minimized by decreasing the edge rate of the logic signals. Furthermore, careful layout of the PCB also reduces coupling between the digital and analog portions of the board.A0, A106983-053Figure 54. Timing Diagram for Latched Gain ModePOWER SUPPLY REGULATION AND BYPASSINGThe AD8253 has high PSRR. However, for optimal performance, a stable dc voltage should be used to power the instrumentation amplifier. Noise on the supply pins can adversely affect per-formance. As in all linear circuits, bypass capacitors must be used to decouple the amplifier.Place a 0.1 μF capacitor close to each supply pin. A 10 μF tantalum capacitor can be used farther away from the part (see Figure 55) and, in most cases, it can be shared by other precision integrated circuits.06983-054Figure 55. Supply Decoupling, REF, and Output Referred to GroundINPUT BIAS CURRENT RETURN PATHThe AD8253 input bias current must have a return path to its local analog ground. When the source, such as a thermocouple, cannot provide a return current path, one should be created (see Figure 56).THERMOCOUPLE+V –V SCAPACITIVELY COUPLED +V SREFCC–V SAD8253TRANSFORMER+V SREF–V SAD8253INCORRECTCAPACITIVELY COUPLEDf HIGH-PASS THERMOCOUPLE+V TRANSFORMER–V SCORRECT06983-055Figure 56. Creating an I BIAS PathINPUT PROTECTIONAll terminals of the AD8253 are protected against ESD. An external resistor should be used in series with each of the inputs to limit current for voltages greater than 0.5 V beyond either supply rail. In such a case, the AD8253 safely handles a continuous 6 mA current at room temperature. For applications where the AD8253 encounters extreme overload voltages, external series resistors and low leakage diode clamps such as BAV199Ls, FJH1100s, or SP720s should be used.REFERENCE TERMINALThe reference terminal, REF, is at one end of a 10 kΩ resistor (see Figure 51). The instrumentation amplifier output is referenced to the voltage on the REF terminal; this is useful when the output signal needs to be offset to voltages other than its local analog ground. For example, a voltage source can be tied to the REF pin to level shift the output so that the AD8253 can interface with a single-supply ADC. The allowable reference voltage range is a function of the gain, common-mode input, and supply voltages. The REF pin should not exceed either +V S or −V S by more than 0.5 V .For best performance, especially in cases where the output is not measured with respect to the REF terminal, source imped-ance to the REF terminal should be kept low because parasiticresistance can adversely affect CMRR and gain accuracy.INCORRECTCORRECT06983-056Figure 57. Driving the Reference PinCOMMON-MODE INPUT VOLTAGE RANGEThe 3-op-amp architecture of the AD8253 applies gain and then removes the common-mode voltage. Therefore, internal nodes in the AD8253 experience a combination of both the gained signal and the common-mode signal. This combined signal can be limited by the voltage supplies even when the individual input and output signals are not. Figure 28 and Figure 29 show the allowable common-mode input voltage ranges for various output voltages, supply voltages, and gains.LAYOUTGroundingIn mixed-signal circuits, low level analog signals need to be isolated from the noisy digital environment. Designing with the AD8253 is no exception. Its supply voltages are referenced to an analog ground. Its digital circuit is referenced to a digital ground. Although it is convenient to tie both grounds to a single ground plane, the current traveling through the ground wires and PC board can cause an error. Therefore, use separate analog and digital ground planes. Only at one point, star ground, should analog and digital ground meet.The output voltage of the AD8253 develops with respect to the potential on the reference terminal. Take care to tie REF to the appropriate local analog ground or to connect it to a voltage that is referenced to the local analog ground.Coupling NoiseTo prevent coupling noise onto the AD8253, follow these guidelines: • Do not run digital lines under the device.• Run the analog ground plane under the AD8253.•Shield fast-switching signals with digital ground to avoid radiating noise to other sections of the board, and never run them near analog signal paths.• Avoid crossover of digital and analog signals.• Connect digital and analog ground at one point only (typically under the ADC).•Power supply lines should use large traces to ensure a low impedance path. Decoupling is necessary; follow the guidelines listed in the Power Supply Regulation and Bypassing section.Common-Mode RejectionThe AD8253 has high CMRR over frequency, giving it greater immunity to disturbances, such as line noise and its associated harmonics, in contrast to typical in amps whose CMRR falls off around 200 Hz. They often need common-mode filters at the inputs to compensate for this shortcoming. The AD8253 is able to reject CMRR over a greater frequency range, reducing the need for input common-mode filtering.Careful board layout maximizes system performance. T o maintain high CMRR over frequency, lay out the input traces symmetrically. Ensure that the traces maintain resistive and capacitive balance; this holds for additional PCB metal layers under the input pins and traces. Source resistance and capacitance should be placed as close to the inputs as possible. Should a trace cross the inputs (from another layer), it should be routed perpendicular to the input traces.RF INTERFERENCERF rectification is often a problem when amplifiers are used in applications where there are strong RF signals. The disturbance can appear as a small dc offset voltage. High frequency signals can be filtered with a low-pass RC network placed at the input of the instrumentation amplifier, as shown in Figure 58. The filter limits the input signal bandwidth according to the following relationship:)C C (R 1FilterFreq C D DIFF +=2π2CCM RC 1FilterFreq π2=where C D ≥ 10 C C .。
AD827JNZ,AD827JRZ-16,AD827SQ,AD827JR-16,AD827JN,AD827AQ, 规格书,Datasheet 资料
CONNECTION DIAGRAMSaHigh Speed, Low PowerDual Op Amp AD827FEATURES High Speed50 MHz Unity Gain Stable Operation 300 V/ms Slew Rate 120 ns Settling TimeDrives Unlimited Capacitive Loads Excellent Video Performance0.04% Differential Gain @ 4.4 MHz 0.198 Differential Phase @ 4.4 MHz Good DC Performance2 mV max Input Offset Voltage15 mV/8C Input Offset Voltage DriftAvailable in Tape and Reel in Accordance with EIA-481A Standard Low PowerOnly 10 mA Total Supply Current for Both Amplifiers ؎5 V to ؎15 V SuppliesPRODUCT DESCRIPTIONThe AD827 is a dual version of Analog Devices’ industry-standard AD847 op amp. Like the AD847, it provides highspeed, low power performance at low cost. The AD827 achieves a 300 V/µs slew rate and 50 MHz unity-gain bandwidth while consuming only 100 mW when operating from ±5 volt power supplies. Performance is specified for operation using ±5 V to ±15 V power supplies.The AD827 offers an open-loop gain of 3,500 V/V into 500 Ωloads. It also features a low input voltage noise of 15 nV/√Hz ,and a low input offset voltage of 2 mV maximum. Common-mode rejection ratio is a minimum of 80 dB. Power supply rejection ratio is maintained at better than 20 dB with input frequencies as high as 1 MHz, thus minimizing noise feedthrough from switching power supplies.The AD827 is also ideal for use in demanding video applica-tions, driving coaxial cables with less than 0.04% differential gain and 0.19° differential phase errors for 643 mV p-p into a 75 Ω reverse terminated cable.The AD827 is also useful in multichannel, high speed data conversion systems where its fast (120 ns to 0.1%) settling time is of importance. In such applications, the AD827 serves as an input buffer for 8-bit to 10-bit A/D converters and as an output amplifier for high speed D/A converters.APPLICATION HIGHLIGHTS1. Performance is fully specified for operation using ±5 V to ±15 V supplies.2. A 0.04% differential gain and 0.19° differential phase error at the 4.4 MHz color subcarrier frequency, together with its low cost, make it ideal for many video applications.3. The AD827 can drive unlimited capacitive loads, while its 30 mA output current allows 50 Ω and 75 Ω reverse-terminated loads to be driven.4. The AD827’s 50 MHz unity-gain bandwidth makes it an ideal candidate for multistage active filters.5. The AD827 is available in 8-lead plastic mini-DIP and cerdip,20-lead LCC, and 16-lead SOIC packages. Chips and MIL-STD-883B processing are also available.8-Lead Plastic (N) and Cerdip(Q) Packages16-Lead Small Outline(R) PackageREV. CInformation furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781/329-4700 Fax: 781/326-8703© Analog Devices, Inc., 2002芯天下--/REV. C–2–AD827–SPECIFICATIONS (@ T A= +25؇C, unless otherwise noted.)AD827JAD827A/S ModelConditionsV S Min Typ MaxMin Typ MaxUnit DC PERFORMANCE Input Offset Voltage 1±5 V 0.520.32mV T MIN to T MAX 3.54mV ±15 V 44mV T MIN to T MAX66mV Offset Voltage Drift ±5 V to ±15 V 1515µV/°C Input Bias Current±5 V to ±15 V3.37 3.37µA T MIN to T MAX8.29.5µA Input Offset Current±5 V to ±15 V 5030050300nA T MIN to T MAX 400400nA Offset Current Drift±5 V to ±15 V 0.50.5nA/°C Common-Mode Rejection Ratio V CM = ±2.5 V ±5 V 78958095dB V CM = ±12 V ±15 V78958095dB T MIN to T MAX±5 V to ±15 V 7575dB Power Supply Rejection Ratio ±5 V to ±15 V 75867586dB T MIN to T MAX 7272dB Open-Loop GainV O = ±2.5 V ±5 VR LOAD = 500 Ω2 3.52 3.5V/mV T MIN to T MAX 11V/mV R LOAD = 150 Ω 1.61.6V/mV V OUT = ±10 V ±15 VR LOAD = 1 k Ω3 5.53 5.5V/mV T MIN to T MAX1.51.5V/mV MATCHING CHARACTERISTICS Input Offset Voltage ±5 V 0.40.2mV Crosstalkf = 5 MHz±5 V 8585dB DYNAMIC PERFORMANCE Unity-Gain Bandwidth ±5 V 3535MHz ±15 V 5050MHz Full Power Bandwidth 2V O = 5 V p-p,R LOAD = 500 Ω±5 V 12.712.7MHz V O = 20 V p-p,R LOAD = 1 k Ω±15 V 4.7 4.7MHz Slew Rate3R LOAD = 500 Ω±5 V 200200V/µs R LOAD = 1 k Ω±15 V 300300V/µs Settling Time to 0.1%A V = –1–2.5 V to +2.5 V ±5 V 6565ns –5 V to +5 V ±15 V 120120ns Phase MarginC LOAD = 10 pF ±15 V R LOAD = 1 k Ω5050Degrees Differential Gain Error f = 4.4 MHz ±15 V 0.040.04%Differential Phase Error f = 4.4 MHz ±15 V 0.190.19Degrees Input Voltage Noise f = 10 kHz ±15 V 1515nV/√Hz Input Current Noise f = 10 kHz ±15 V 1.5 1.5pA/√Hz Input Common-Mode Voltage Range±5 V +4.3+4.3V –3.4–3.4V ±15 V+14.3+14.3V –13.4–13.4V Output Voltage SwingR LOAD = 500 Ω±5 V 3.0 3.6 3.0 3.6±V R LOAD = 150 Ω±5 V 2.5 3.0 2.5 3.0±V R LOAD = 1 k Ω±15 V 1213.31213.3±V R LOAD = 500 Ω±15 V1012.21012.2±V Short-Circuit Current Limit ±5 V to ±15 V3232mA INPUT CHARACTERISTICS Input Resistance 300300k ΩInput Capacitance1.51.5pF 芯天下--/AD827J AD827A/SModel Conditions V S Min Typ Max Min Typ Max Unit OUTPUT RESISTANCE Open Loop1515ΩPOWER SUPPLYOperating Range±4.5±18±4.5±18V Quiescent Current±5 V10131013mAT MIN to T MAX1616.5/17.5mA±15 V10.513.510.513.5mAT MIN to T MAX16.517/18mA TRANSISTOR COUNT9292NOTES1Offset voltage for the AD827 is guaranteed after power is applied and the device is fully warmed up. All other specifications are measured using high speed test equipment, approximately 1 second after power is applied.2Full Power Bandwidth = Slew Rate/2 π VPEAK .3Gain = +1, rising edge.All min and max specifications are guaranteed. Specifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS1Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18 V Internal Power Dissipation2Plastic (N) Package (Derate at 10 mW/°C) . . . . . . . .1.5 W Cerdip (Q) Package (Derate at 8.7 mW/°C) . . . . . . .1.3 W Small Outline (R) Package (Derate at 10 mW/°C) . . .1.5 W LCC (E) Package (Derate at 6.7 mW/°C) . . . . . . . . .1.0 W Input Common-Mode Voltage . . . . . . . . . . . . . . . . . . . . .±V S Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . .6 V Output Short Circuit Duration3 . . . . . . . . . . . . . . . .Indefinite Storage Temperature Range (N, R) . . . . . . .–65°C to +125°C Storage Temperature Range (Q) . . . . . . . . .–65°C to +150°C Operating Temperature RangeAD827J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0°C to 70°C AD827A . . . . . . . . . . . . . . . . . . . . . . . . . . .–40°C to +85°C AD827S . . . . . . . . . . . . . . . . . . . . . . . . . .–55°C to +125°C Lead Temperature Range(Soldering to 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .300°C NOTES1Stresses above those listed under Absolute Maximum Ratings may cause perma-nent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.2Maximum internal power dissipation is specified so that TJdoes not exceed 175°C at an ambient temperature of 25°C.Thermal Characteristics:MiniDIP: θJA = 100°C/W; θJC = 33°C/ WCerdip: θJA = 110°C/W; θJC = 30°C/W16-Lead Small Outline Package: θJA = 100°C/W20-Lead LCC: θJA = 150°C/W; θJC = 35°C/W3Indefinite short circuit duration is only permissible as long as the absolute maximum power rating is not exceeded.ORDERING GUIDETemperature Package Package Model Range Description Option AD827JN0°C to +70°C8-Lead Plastic DIP N-8AD827JR0°C to +70°C16-Lead Plastic SO R-16AD827AQ–40°C to +85°C8-Lead Cerdip Q-8AD827SQ–55°C to +125°C8-Lead Cerdip Q-8AD827SQ/883B–55°C to +125°C8-Lead Cerdip Q-8 5962-9211701MPA–55°C to +125°C8-Lead Cerdip Q-8AD827SE/883B–55°C to +125°C20-Lead LCC E-20A 5962-9211701M2A–55°C to +125°C20-Lead LCC E-20A AD827JR-REEL0°C to +70°C Tape & ReelAD827JChips0°C to +70°C DieAD827SChips–55°C to +125°C DieMETALLIZATION PHOTOGRAPHContact factory for latest dimensions.Dimensions shown in inches and (mm).Substrate is connected to V+.AD827REV. C–3–芯天下--/AD827REV. C–4–2015105005101520SUPPLY VOLTAGE ± VoltsI N P U T C O M M O N -M O D E R A N G E – V o l t sFigure1.InputCommon-Mode Range vs. Supply Voltage1412108–60040100140TEMPERATURE – °CQ U I E S C E N T C U R R E N T – m A–40–20206080120Figure 7.Quiescent Current vs. Temperature–Typical Performance Characteristics(@ +25؇C & ؎15 V, unless otherwise noted)2015105005101520SUPPLY VOLTAGE ± VoltsO U T P U T V O L T A G E S W I N G – V o l t sFigure 2.Output Voltage Swing vs. Supply VoltageFigure 5.Input Bias Current vs. TemperatureFigure 6.Closed-Loop Output Impedance vs. Frequency,Gain = +1芯天下--/AD827REV. C–5–Figure mon-ModeRejection Ratio vs. FrequencyFigure 11.Open-Loop Gainvs. Load Resistance400350300250200150100–60–40–20020406080100120140TEMPERATURE – °CS L E W R A T E – V o l t s /µsFigure 18.Slew Rate vs.Temperature芯天下--/AD827REV. C–6–Figure 19.Crosstalk vs. FrequencyFigure 22c.Inverter SmallSignal Pulse ResponseFigure 21b.Follower LargeSignal Pulse ResponseFigure 22b.Inverter LargeSignal Pulse ResponseFigure 21a.Follower ConnectionFor high performance circuits, it is recommended that a second resistor (R B in Figures 21a and 22a) be used to reduce bias-current errors by matching the impedance at each input. This resistor reduces the error caused by offset voltages by more than an order of magnitude.芯天下--/AD827REV. C–7–VIDEO LINE DRIVERThe AD827 functions very well as a low cost, high speed line driver for either terminated or unterminated cables. Figure 23shows the AD827 driving a doubly terminated cable in a follower configuration.+V V OUTFigure 23.A Video Line DriverThe termination resistor, R T , (when equal to the cable’scharacteristic impedance) minimizes reflections from the far end of the cable. While operating from ±5 V supplies, the AD827maintains a typical slew rate of 200 V/µs, which means it can drive a ±1 V, 30 MHz signal into a terminated cable.Table I.Video Line Driver Performance SummaryOver-V IN *V SUPPLY C C –3 dB B W shoot 0 dB or ±500 mV Step ±1520 pF 23 MHz 4%0 dB or ±500 mV Step ±1515 pF 21 MHz 0%0 dB or ±500 mV Step ±150 pF 13 MHz 0%0 dB or ±500 mV Step ±520 pF 18 MHz 2%0 dB or ±500 mV Step ±515 pF 16 MHz 0%0 dB or ±500 mV Step±50pF11 MHz0%*–3 dB bandwidth numbers are for the 0 dBm signal input. Overshoot numbers are the percent overshoot of the 1 V step input.A back-termination resistor (R BT , also equal to the characteristic impedance of the cable) may be placed between the AD827output and the cable input, in order to damp any reflected signals caused by a mismatch between R T and the cable’scharacteristic impedance. This will result in a flatter frequency response, although this requires that the op amp supply ±2 V to the output in order to achieve a ±1 V swing at resistor R T .A HIGH SPEED THREE OP AMP INSTRUMENTATION AMPLIFIER CIRCUITThe instrumentation amplifier circuit shown in Figure 24 can provide a range of gains. Table II details performance.+V Figure 24.A High Bandwidth Three Op Amp Instrumentation AmplifierTable II.Performance Specifications for the Three Op Amp Instrumentation AmplifierSmall Signal BandwidthGain R G @ 1 V p-p Output 1Open 16.1 MHz 2 2 k 14.7 MHz 10226 Ω 4.9 MHz 10020 Ω660 kHz芯天下--/AD827REV. C–8–multipliers connected in series. They could also be placed in parallel with an increase in bandwidth and a reduction in gain.The gain of the circuit is controlled by V X , which can range from 0 to 3 V dc. Measurements show that this circuit easily supplies 2 V p-p into a 100 Ω load while operating from ±5 V supplies. The overall bandwidth of the circuit is approximately 7 MHz with 0.5 dB of peaking.Each half of the AD827 serves as an I/V converter and converts the output current of one of the two multipliers in the AD539into an output voltage. Each of the AD539’s two multipliers contains two internal 6 k Ω feedback resistors; one is connectedbetween the CH1 output and Z1, the other between the CH1output and W1. Likewise, in the CH2 multiplier, one of the feedback resistors is connected between CH2 and Z2 and the other is connected between CH2 and Z2. In Figure 25, Z1 and W1 are tied together, as are Z2 and W2, providing a 3 k Ωfeedback resistor for the op amp. The 2 pF capacitors connected between the AD539’s W1 and CH1 and W2 and CH2 pins are in parallel with the feedback resistors and thus reduce peaking in the VCA’s frequency response. Increasing the values of C3and C4 can further reduce the peaking at the expense ofreduced bandwidth. The 1.25 mA full-scale output current of the AD539 and the 3 k Ω feedback resistor set the full-scale output voltage of each multiplier at 3.25 V p-p.Current limiting in the AD827 (typically 30 mA) limits the out-put voltage in this application to about 3 V p-p across a 100Ωload. Driving a 50 Ω reverse-terminated load divides this value by two, limiting the maximum signal delivered to a 50Ω load to about 1.5 V p-p, which suffices for video signal levels. The dynamic range of this circuit is approximately 55dB and is primarily limited by feedthrough at low input levels and by the maximum output voltage at high levels.Guidelines for Grounding and BypassingWhen designing practical high frequency circuits using the AD827,some special precautions are in order. Both short interconnection leads and a large ground plane are needed whenever possible to provide low resistance, low inductance circuit paths. One should remember to minimize the effects of capacitive couplingbetween circuits. Furthermore, IC sockets should be avoided.Feedback resistors should be of a low enough value that the time constant formed with stray circuit capacitances at the amplifier summing junction will not limit circuit performance.As a rule of thumb, use feedback resistor values that are less than 5 k Ω. If a larger resistor value is necessary, a small (<10pF)feedback capacitor in parallel with the feedback resistor may be used. The use of 0.1 µF ceramic disc capacitors is recommended for bypassing the op amp’s power supply leads.A TWO-CHIP VOLTAGE-CONTROLLED AMPLIFIER (VCA) WITH EXPONENTIAL RESPONSEVoltage-controlled amplifiers are often used as building blocks in automatic gain control systems. Figure 25 shows a two-chip VCA built using the AD827 and the AD539, a dual, current-output multiplier. As configured, the circuit has its twoFigure 25.A Wide Range Voltage-Controlled Amplifier Circuit芯天下--/AD827REV. C–9–OUTLINE DIMENSIONS8-Lead Plastic Dual-in-Line Package [PDIP](N-8)Dimensions shown in millimeters and (inches)CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN16-Lead Standard Small Outline Package [SOIC]Wide Body (R-16)Dimensions shown in millimeters and (inches)CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN COMPLIANT TO JEDEC STANDARDS MS-013AA8-Lead Ceramic DIP-Glass Hermetic Seal Package [CERDIP](Q-8)Dimensions shown in millimeters and (inches)0.13 (0.0051)1.40 (0.0551)CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN20-Terminal Ceramic Leadless Chip Carrier [LCC](E-20A)Dimensions shown in millimeters and (inches)CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN芯天下--/AD827REV. C–10–Revision HistoryLocationPage8/02—Data Sheet changed from REV. B to REV. C.Updated Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9芯天下--/–11–芯天下--/C 00878–0–8/02(C )P R I N T ED I N U .S .A .–12–芯天下--/。
BZ产品指南-MPPT500、MPPT250、BZ7、BZ240、M20+、M25、X8、X16和L
BZ Products specification guide for models MPPT500, MPPT250, BZ 7, BZ240, M20+, M25, X8, X16 and LPM10u.MPPT 500 SOLAR CONTROL SPECIFICATIONS:Charge current 12 volts 42 amps max Charge current 24 volts 21amps max Charge current 48 volts 11 amps max Surge current 48 amps @12 volts Output voltage range 12. 24 or 48 volts Surge current 28 amps @24 volts Float voltage 14.1, 28.2 or 56.4 volts Surge current 15 amps @48 volts Digital meter 1/2” LCD display DC volts range 0-99.9 volts ±.5% Array voltage open circuit 100 volts open circuit DC amps range 0-99.9 amps ±.75% Max PV input power 500 watts Temp. comp. -18mV/° C nominal PV input voltage Auto ranging PV input 12 to 48 volts nominal Min battery voltage 10 volts Efficiency >95% @ 35 amps Operating temp. -20 to + 60° C Storage temp. -30 to + 70° CFloat voltage range 12.5 to 15.5 volts Weight 3 poundsStandby current .025 amps nominal Float regulation ± .05 volts nominal Wire size # 2 max AWG Mounting # 6 screwsBattery size 200 AH minimum Reverse current . 01 amps nominal Float voltage 14.1, 28.1, 56.2 volts Size 8.6 X 6 2.5” Lightning protection MOV 1000watt Finish Beige powder coat Wiring 1”conduit Battery sensor 5 ‘ sensor cable MPPT 250 SOLAR CONTROL SPECIFICATIONS:PV charge current 25 amps continuous Digital meter 1/2” LCD display Surge current 35 amps 10 min. DC volts range 0-99.9 volts ±.5% Array voltage open circuit 50 volts open circuit DC amps range 0-99.9 amps ±.75% Max input power 250 watts Temp. comp. -18mV/° C nominal PV input voltage Auto ranging PV input 12 or 24 volts nominal Min battery voltage 10 volts Efficiency >95% @ 20 amps Operating temp. -20 to + 60° C Storage temp. -30 to + 70° CFloat voltage range 12.5 to 15.5 volts Weight 2 poundsOperating current .15 amps nominal Float regulation ± .05 volts nominal Wire size # 12 max AWG Mounting # 6 screwsBattery size 100 AH minimum Reverse current . 01 amps nominal Float voltage 14.1 volts Aux batt charger 13.8 volts .1 amp max. Lightning protection MOV 1000watt Finish Black powder coat Size 7.8”X5.1”X2.5” LVD current 15 amps maxLVD disconnect 12.0 volts LVD reconnect 12.6 voltsBZ 7 SOLAR CONTROL SPECIFICATIONS:PV charge current 7 amps continuous Surge current 12 amps 15 minArray voltage 12 Volts 30 volts open circuit Control PWM shunt control Array voltage 24 Volts 60 volts open circuit Voltage drop < 0.5 volts @ 7 amps Array voltage 36 Volts 80 volts open circuit Temp. Comp. -18mV/° CArray voltage 48 Volts 100 volts open circuit Battery size 120 amp hour min Float voltage range 12 to 15 volts Float voltage 14.1 VDC (12 volt nom) Float voltage range 25 to 31 volts Float voltage 28.2 VDC (24 volt nom) Float voltage range 37 to 45 volts Float voltage 42.3 VDC (36 volt nom) Float voltage range 50 to 65 volts Float voltage 56.4 VDC (48 volt nom) Operating current . 02 amps nominal Float regulation ± .1 volts nominalWire size # 16 AWG Wire length 18” strandedReverse current .01 amps nominal Size 2” X 4” X 1” Operating temp. -30 to + 60° C Storage temp. -30 to + 80° C Lightning Protection 10MM MOV Weight 8 ouncesBZ 240 SOLAR CONTROL SPECIFICATIONS:PV charge current 14 amps continuous Surge current 20 amps 15 minArray voltage 30 volts open circuit Control PWM shunt control Surge voltage MOV clamp 33 VDC Temp. Comp. -18mV/° C nominalMin battery voltage Zero volts Voltage drop <.6 volts @ 14 amps Operating temp. -20 to + 50° C Storage temp. -30 to + 70°Float voltage range 12.5 to 15.5 volts Weight 1 poundOperating current .02 amps nominal Float regulation ± .05 volts nominalWire size # 12 AWG max Battery size 120 amp hour min Reverse current .01 amps nominal Float voltage 14.1 volts DCWire access 1/2” conduit Size 4.7” X 4.7” X 1.5” Lightning protection 10MM MOV Mounting flush/surface #6 screws Red Led on > 11.7 VDC Yellow Led on > 12.7 VDCGreen Led on >13.5 VDC Finish Black powder coatM20+ SOLAR CONTROL SPECIFICATIONS:Note for 24 volt systems voltages doublePV charge current 25 amps continuous Digital Meter .5” LCD displaySurge current 40 amps 10 min DC volts range 0-99.9 volts ± .5% Array voltage 30 volts (60) DC amps range 0-99.9 amps± .75% Surge voltage MOV clamp Temp. Comp. -18mV/° C nominalMin battery voltage Zero volts Voltage drop <.6 volts @ 20 amps Operating temp. -20 to + 60° C Storage temp. -30 to + 70°Float voltage range 12.5 to 15.5 volts Weight 1 poundOperating current .02 amps nominal Float regulation ± .05 volts nominalWire size #14 to #2 AWG Mounting 4 ea # 6 screwsPV fuse 40 amp AGC max Battery fuse 40 amp AGC max Battery size 120 A/H minimum Reverse current .01 amps nominalWire access 1/2” conduit Size 4.7” X 6.4” X 1.5” Lightning protection 10MM MOV Float voltage 14.1 (28.2) factory setting M25 SOLAR CONTROL SPECIFICATIONS:Note for 24 volt systems Battery and LED meter voltages double.PV charge current 25 amps continuous Digital Meter .5” LCD displaySurge current 40 amps 10 min. DC volts range 0-99.9 volts ± .5% Array voltage open circuit 60 volts DC amps range 0-99.9 amps ± .75% Surge voltage 75 volts Temp. comp. -18mV/° C nominalMin Battery voltage Zero volts Voltage drop <.6 volts @ 25 amps Operating temp. -20 to + 60° C Storage temp. -30 to + 80° CFloat voltage range 12.5 to 15.5 volts Weight 2 poundsOperating current . 05 amps nominal Float regulation ± .05 volts nominalWire size # 2 max AWG Mounting # 6 screwsBattery size 120 AH minimum Reverse current .01 amps nominalWire access 1/2” conduit holes Float voltage 14.1 (28.2) volts Lightning protection MOV 1000 watt Size (meter) 5 3/4” X 3 1/4” Auxiliary Charger 13.8 volts .1 amp (fixed) Size (control) 6” X 7” X 1 1/2”Meter cable 25’ Finish Black powder coatLED battery gage Red = 12.2 volts, Yellow = 12.7 volts, # 2 Green = 13.2 volts # 1 Green = 13.7 voltsX8/X16 VOLTAGE CONVERTER SPECIFICATIONS:Enclosure NEMA 3R 8”X 8”X 4” Knock outs 1/2” & 3/4”Input Voltage 100 VDC Max Output voltage 13.8 and 27.6 VDC Output current X8 8 amps 14 amp surge Output noise < 100mv @ 6 amps Output current X16 16 amps 22 amp surge Output noise < 100mv @ 14 amps Shut off voltage 24 VDC 20 VDC ± 1 VDC Shutoff voltage 48 VDC 44 VDC ± 2 VDCTurn on voltage 24 VDC 22 VDC ± 1VDC Turn on voltage 48 VDC 48 VDC ± 1VDC Control switch on/remote/off Remote logic open=on closed= off Standby current .05 amps nominal Efficiency >95% @ 75% full load Output fuse X8 10 amp ATO type Output fuse x16 20 amp ATO type Input indicator Red led lights when battery voltage is presentOutput indicator Yellow led lights when output voltage is presentLPM10u LED BATTTERY METER SPECIFICATIONS:Led Display 100% >12.8, 25.6, 51.2 VDC ±5%50% = 11.8, 23.6, 47.2 VDC ±5%10% = 11.0, 22.0, 44.0 VDC ±5%Current drain .01 amps typical Temp range -10° C to + 50° CSize 2”X4”X1” Wire 18” #22 strandedReverse polarity protected Not water proof。
A8L-21-11N2;A8L-21-11N1;A8L-11-13N1;A8L-21-14N2;A8L-21-15N1;中文规格书,Datasheet资料
Miniature Rocker Switch A8L1Rocker Switch for High Current Switching•Withstands inrush currents up to 100 A due to a unique switching mechanism.•Soft touch with firm switching action.•Easy to mount by snap fitting.•Contact gap of 3 mm minimum.•UL and cUL standards approved. Conforms to EN standards.Ordering InformationSpecifications■RatingsNote:1.The non-inductive lamp load has an impulse current ten times the normal current.2.The inductive load has a power factor of 0.7 minimum (AC).3.The motor load has an impulse current 6 times the normal current.4.The ratings values apply under the following test conditions: Ambient temperature: 20±2°C, Ambient humidity: 65±5%, Operating frequency: 7 times/min■Approved Safety StandardsNote:Consult your OMRON representative for details of performance characteristics with respect to individual standards.Rated load Resistive loadLamp load Inductive loadInductive motor load125 VAC 10 A 10 A 8 A 8 A 250 VAC10 A10 A8 A8 AUL, cUL(File No. E41515)10 A, 125 VAC; 10 A, 250 VAC EN61058-1(TÜV certificate no. J50021820)10 (8) A, 250 V~/2Miniature Rocker Switch A8L■CharacteristicsDimensionsNote:Unless otherwise specified, all units are in millimeters.■Panel CutoutsFor Straight Terminals(A8L-@@-@1@@, A8L-@@-@2@@), A8L-@@-@5@@)Note:Recommended panel material: SPCCBe sure that play R is the operation side.For Angled PCB Terminals(A8L-@@-@3@@, A8L-@@-@4@@)■Dimensions and Operating CharacteristicsSolder TerminalsOperating frequency Mechanical: 20 operations/min max.Electrical: 7 operations/min max.Insulation resistance 100 M Ω min. (500 VDC)Dielectric strength 2,000 VAC, 50/60 Hz, for 1 min between terminals of the same polarity and different polarity 4,000 VAC, 50/60 Hz, for 1 min between charged metal parts and the ground terminal Vibration resistance Malfunction: 10 to 55 Hz, 1.5-mm double amplitude (malfunction time of 1 ms max.)Shock resistance Malfunction: 300 m/s 2 (malfunction time of 1 ms max.)Destruction: 500 m/s 2Life expectancy Mechanical: 50,000 operations min.Electrical: 10,000 operations min.Ambient temperature Storage: –25 to 60°C (with no icing or condensation)Operating: –20 to 55°C (with no icing or condensation)Ambient humidity Storage: 45% to 85%Operating: 45% to 85%Inrush current100 A max. (8.3 ms max.)Panel thickness (mm)X (mm)Y (mm)0.75 to 1.25 1.26 to 2.519.20−0.112.9+0.1019.4+0.1−0.312.9+0.1Panel thickness (mm)X (mm)0.75 to 1.251.26 to 2.519.2−0.1019.4−0.3+0.1/Miniature Rocker Switch A8L3PCB TerminalsRight-angled PCB TerminalsLeft-angled PCB TerminalsQuick-connect Terminals #187No. of poles 12OF (operating force)220 ± 120 gf400 ± 250 gf/4Miniature Rocker Switch A8LPrecautions■Correct UseMountingT urn OFF the power supply before mounting, removing or wiring the Switch, or before performing maintenance inspections. Failure to do so may result in electric shock.Do not use panels other than ones with the designated thickness and dimensions. Remove all burrs from the cutout before installing the Switch. Otherwise, the Switch may malfunction.Do not impose excessive force on the Switch at the time of panel-mounting.There are two small divots in the flange part of the case marking ON and OFF as shown in the following diagram. Use these marks as guides when mounting.WiringWhen soldering terminals manually, perform soldering within 3 s using a 60-W soldering iron (temperature at the tip of the soldering iron: 420°C max.). Do not apply excessive force to the terminals dur-ing soldering.When soldering using a soldering tub, perform soldering within 5 s in a soldering fluid at 270°C, or within 3 s in a soldering fluid at 350°C.Be sure that the wires are thick enough for the load (current) to be applied.Only A8L -@@-@5@@ models are equipped with (6.3×0.8) mm flat-quick connections for use with #187 fasten receptacles.The terminals of A8L -@@-@1@@ are not in compliance with IEC standards for flat-quick connections. Suitable for use as solder con-nection only.Using MicroloadsThe performance of the Switch may be affected if the Switch is used for switching micro loads. T est the Switch under the actual operating conditions.Operating EnvironmentDo not use the Switch in places with sulfide gas, corrosive gas, sea breeze, oil spray, or direct sunlight. Otherwise, the Switch may mal-function.Do not use the Switch in places that are visibly dusty. Otherwise, the contacts may fail to operate correctly.■CautionsT o increase the reliability of operation, test the Switch before actual operation.Be sure that there is an enough insulation distance between any Switch terminal and metal part.HandlingDo not drop the Switch. Otherwise, the Switch may malfunction.Do not impose excessive force on the Switch. Otherwise, the Switch may deform.The recommended panel material is SPCC. The Switch may fall off if the material is soft and cannot securely hold the Switch. When using a soft material, test the Switch with it before using the Switch in actual operation.Do not wire the Switch or touch any terminal of the Switch While power is being supplied. Doing so may result in electric shock./MEMO5Miniature Rocker Switch A8L/6Miniature Rocker Switch A8LOMRON ON-LINEGlobal - USA - Cat. No.A114-E-04aPrinted in USAOMRON ELECTRONIC COMPONENTS LLC55 E. Commerce Drive, Suite B Schaumburg, IL 60173847-882-228811/10 Specifications subject to change without noticeAll sales are subject to Omron Electronic Components LLC standard terms and conditions of sale, which can be found at /components/web/webfiles.nsf/sales_terms.html ALL DIMENSIONS SHOWN ARE IN MILLIMETERS.T o convert millimeters into inches, multiply by 0.03937. T o convert grams into ounces, multiply by 0.03527./分销商库存信息:OMRONA8L-21-11N2A8L-21-11N1A8L-11-13N1 A8L-21-14N2A8L-21-15N1A8L-11-15N2 A8L-21-12N2A8L-21-15N2A8L-11-11N2。
BQ25601D Datasheet说明书
BQ25601D 具备 USB 充电器检测功能、用于高输入电压和窄电压直流 (NVDC) 电源路径管理的 I2C 控制型 3A 单节电池充电器1 特性•高效 1.5MHz 同步开关模式降压充电器–在 2A 电流（5V 输入）下具有 92% 的充电效率–针对 USB 电压输入 (5V) 进行了优化–用于轻负载运行的可选低功耗脉冲频率调制 (PFM) 模式•支持 USB On-The-Go (OTG)–具有高达 1.2A 输出的升压转换器–在 1A 输出下具有 92% 的升压效率–精确的恒定电流 (CC) 限制–高达 500µF 容性负载的软启动–输出短路保护–用于轻负载运行的可选低功耗 PFM 模式•单个输入，支持 USB 输入和高电压适配器–支持 3.9V 至 13.5V 输入电压范围，绝对最大输入电压额定值为 22V–可编程输入电流限制（100mA 至 3.2A，分辨率为 100mA），支持 USB 2.0、USB 3.0 标准和高电压适配器 (IINDPM)–通过高达 5.4V 的输入电压限制 (VINDPM) 进行最大功率跟踪–VINDPM 阈值自动跟踪电池电压–自动检测 USB BC1.2、SDP、CDP、DCP 以及非标准适配器•高电池放电效率，电池放电 MOSFET 为 19.5mΩ•窄 VDC (NVDC) 电源路径管理–无需电池或深度放电的电池即可瞬时启动–电池充电模式下实现理想的二极管运行•BATFET 控制，支持运输模式、唤醒和完全系统复位•灵活的自主和 I2C 模式，可实现出色的系统性能•高集成度包括所有 MOSFET、电流感测和环路补偿•17µA 低电池泄漏电流•高精度–±0.5% 充电电压调节–±5% 1.5A 充电电流调节–±10% 0.9A 输入电流调节•安全相关认证：–TUV IEC 62368 认证2 应用•智能手机•便携式互联网设备和附件3 说明BQ25601D 器件是一款适用于单节锂离子和锂聚合物电池的高度集成型 3A 开关模式电池充电管理和系统电源路径管理器件。
NB2305AI1DR2G;NB2305AI1DTR2G;NB2305AI1HDR2G;NB2305AI1HDTR2G;NB2305AI1DTG;中文规格书,Datasheet资料
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
Semiconductor Components Industries, LLC
CLK4
Figure 1. Block Diagram
Figure 2. Pin Configuration
Table 1. PIN DESCRIPTION
Pin # Pin Name Description
1 2 3 4 5 6 7 8
REF (Note1) CLK2 (Note 2) CLK1 (Note 2) GND CLK3 (Note 2) VDD CLK4 (Note 2) CLKOUT (Note 2)
1. Weak pulldown. 2. Weak pulldown on all outputs.
2
/
NB2305A
Table 2. MAXIMUM RATINGS
Parameter Supply Voltage to Ground Potential DC Input Voltage (Except REF) DC Input Voltage (REF) Storage Temperature Maximum Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (per MIL--STD--883, Method 3015) Min --0.5 --0.5 --0.5 --65 Max +7.0 VDD + 0.5 7.0 +150 260 150 >2000 Unit V V V C C C V
HAZ4825S高频开关电源用户手册
目 录1. 概述 (1)2. 技术指标 (2)3.组成原理 (2)3.1 模块工作原理 (2)3.2 电池管理 (3)3.3 电源自动保护功能 (3)4. 安装及操作 (3)4.1 开箱检查 (3)4.2 外型及说明 (4)4.2.1. 后面板 (4)4.2.2.前面板 (4)4.2.3 通讯接口定义 (5)4.2.4 RS485插座引脚定义 (6)4.3 操作说明 (6)4.4 使用环境 (7)5. 告警与维护 (7)5.1 告警内容与故障判断 (7)5.2 电源工作失常的判断与简单应急处理 (7)1. 概述HAZ4825S型单机电源系统是专为小型程控交换机和无线接入设备生产的一次电源。
电源采用了国际上最流行的零电压开关技术，具有干扰小、效率高、安全可靠等特点。
单机配接一组容量不超过100AH电池后可组成不间断直流供电系统，电源内部设有电池管理系统，可对电池进行智能充电和保护。
可通过并机扩容，并具有通讯功能。
2. 技术指标输入电压单相220Vac（185Vac～264Vac、45Hz～55Hz，）；输出充电电流： 5A(出厂定值,面板可调)；均充电压： 56.4V(出厂定值,面板可调)；浮充电压： 52.8V(出厂定值,面板可调)；最大电流 ：25.5A；最大输出功率： 1500W；整机效率 ≥90%；源效应： –0.2%～+0.2%；负载效应： –0.1%～+0.1%；稳压精度： ±0.4%；电话衡量杂音 ≤1.5mV (DZW-11型杂音测试仪)；峰一峰纹波 ＜100mV (20M示波器)；绝缘强度 电源输入对机壳、输入对输出1500Vac 1min漏电流小于30mA；电源输出对机壳500Vdc 1min漏电流小于30mA；冷却方式 ：温控强制风冷；机壳外型尺寸： 482mm×225mm×88mm。
3.组成原理3.1 模块工作原理交流电经面板上的开关进入由LC组成的无源功率因数较正电路、EMI滤波器、经整流桥,输出300V左右的直流电压,再经过全桥零电压软开关转换、整流、滤波转换成-52.8V直流电压输出，一路经电池开关给电池充电,最大充电电流可达10A,剩余电流经输出端子提供给负载。
XZMYK55W-A2 3.2 x 1.6 mm SMD Chip LED Lamp Package
Part Number Emitting Color Emitting MaterialLens-colorWavelength CIE127-2007* nm λPViewing Angle 2θ 1/2Luminous Intensity CIE127-2007* (I F =20mA) mcd *Luminous intensity value and wavelength are in accordance with CIE127-2007 standards.ATTENTIONOBSERVE PRECAUTIONSFOR HANDLING ELECTROSTATIC DISCHARGE SENSITIVE DEVICESFeatures● Ideal for indication light on hand held products ● Long life and robust package ● Standard Package: 2,000pcs/ Reel ● MSL (Moisture Sensitivity Level): 3 ● Halogen-free ● RoHS compliantA Relative Humidity between 40% and 60% is recommended inESD-protected work areas to reduce static build up during assembly process (Reference JEDEC/JESD625-A and JEDEC/J-STD-033)LED is recommended for reflow soldering and soldering profile is shown below.Derating CurveThe device has a single mounting surface. The device must be mounted according to the specifications.Reel Dimension (Units : mm)Recommended Soldering Pattern (Units : mm; Tolerance: ± 0.1)Tape Specification (Units : mm)Remarks:If special sorting is required (e.g. binning based on forward voltage, Luminous intensity / luminous flux, or wavelength), the typical accuracy of the sorting process is as follows: 1. Wavelength: +/-1nm2. Luminous intensity / luminous flux: +/-15%3. Forward Voltage: +/-0.1VNote: Accuracy may depend on the sorting parameters.PACKING & LABEL SPECIFICATIONSTERMS OF USE1. Data presented in this document reflect statistical figures and should be treated as technical reference only.2. Contents within this document are subject to improvement and enhancement changes without notice.3. The product(s) in this document are designed to be operated within the electrical and environmental specifications indicated on the datasheet. User accepts full risk and responsibility when operating the product(s) beyond their intended specifications.4. The product(s) described in this document are intended for electronic applications in which a person’s life is not reliant upon the LED. Pleaseconsult with a SunLED representative for special applications where the LED may have a direct impact on a person’s life.5. The contents within this document may not be altered without prior consent by SunLED.6. Additional technical notes are available at https:///TechnicalNotes.asp。
半导体传感器AD725ARZ中文规格书
ADuM1400/ADuM1401/ADuM1402Data SheetRev. L | Page 20 of 31DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS These isolators are suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by protective circuits. The asterisk (*) marking on packages denotes DIN V VDE V 0884-10 approval. Table 11.DescriptionConditions Symbol Characteristic Unit Installation Classification per DIN VDE 0110For Rated Mains Voltage ≤ 150 V rmsI to IV For Rated Mains Voltage ≤ 300 V rmsI to III For Rated Mains Voltage ≤ 400 V rmsI to II Climatic Classification 40/105/21 Pollution Degree per DIN VDE 0110, Table 12 Maximum Working Insulation VoltageV IORM 560 V peak Input to Output Test Voltage, Method B1V IORM × 1.875 = V PR , 100% production test, t m = 1 sec, partial discharge < 5 pC V PR 1050 V peak Input to Output Test Voltage, Method AV IORM × 1.6 = V PR , t m = 60 sec, partial discharge < 5 pC V PR After Environmental Tests Subgroup 1896 V peak After Input and/or Safety Test Subgroup 2and Subgroup 3V IORM × 1.2 = V PR , t m = 60 sec, partial discharge < 5 pC 672 V peak Highest Allowable OvervoltageTransient overvoltage, t TR = 10 seconds V TR 4000 V peak Safety Limiting ValuesMaximum value allowed in the event of a failure (see Figure 4) Case TemperatureT S 150 °C Side 1 CurrentI S1 265 mA Side 2 CurrentI S2 335 mA Insulation Resistance at T SV IO = 500 V R S >109Ω CASE TEMPERATURE (°C)S A F E T Y -L I M I T I N G C U R R E N T (m A )003503002502001501005050100150200SIDE #1SIDE #203786-004Figure 4. Thermal Derating Curve, Dependence of Safety Limiting Values with Case Temperature per DIN V VDE V 0884-10 RECOMMENDED OPERATING CONDITIONS Table 12.Parameter Rating Operating Temperature (T A )1 −40°C to +105°C Operating Temperature (T A )2 −40°C to +125°C Supply Voltages (V DD1, V DD2)1, 3 2.7 V to 5.5 V Supply Voltages (V DD1, V DD2)2, 3 3.0 V to 5.5 V Input Signal Rise and Fall Times 1.0 ms 1 Does not apply to ADuM1400W , ADuM1401W , and ADuM1402W automotive grade versions. 2 Applies to ADuM1400W , ADuM1401W , and ADuM1402W automotive grade versions. 3 All voltages are relative to their respective ground. See the DC Correctness and Magnetic Field Immunity section for information on immunity to external magnetic fields.ADuM1400/ADuM1401/ADuM1402Data Sheet Rev. L | Page 22 of 31PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONSV DD1*GND 1V IA V IB V DD2GND 2*V OA V OB V IC V OC V ID V OD NC V E2*GND 1GND 2*NC = NO CONNECT03786-005*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND 1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY CONNECTED, AND CONNECTING BOTH TO GND 2 IS RECOMMENDED.Figure 5. ADuM1400 Pin Configuration Table 16. ADuM1400 Pin Function DescriptionsPin No.Mnemonic Description 1V DD1 Supply Voltage for Isolator Side 1. 2GND 1Ground 1. Ground reference for Isolator Side 1. 3V IA Logic Input A. 4V IB Logic Input B. 5V IC Logic Input C. 6V ID Logic Input D. 7NC No Connect. 8GND 1 Ground 1. Ground reference for Isolator Side 1. 9GND 2 Ground 2. Ground reference for Isolator Side 2. 10V E2 Output Enable 2. Active high logic input. V OA , V OB , V OC , and V OD outputs are enabled when V E2 is high or disconnected. V OA , V OB , V OC , and V OD outputs are disabled when V E2 is low. In noisy environments, connecting V E2 to an external logic high or low is recommended. 11V OD Logic Output D. 12V OC Logic Output C. 13V OB Logic Output B. 14V OA Logic Output A. 15GND 2Ground 2. Ground reference for Isolator Side 2. 16 V DD2 Supply Voltage for Isolator Side 2.。