Signal analysis and synthetic filter bank
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申请人：松下電器産業株式会社 地址：大阪府門真市大字門真1006番地 国籍：JP 代理人：小鍜治 明 (外2名) 更பைடு நூலகம்信息请下载全文后查看
专利内容由知识产权出版社提供
专利名称：Signal analysis and synthetic filter bank 发明人：永井 清隆,宇佐見 陽,中嶋 康志 申请号：J P 特願平3-234 4 94 申请日：19910913 公开号：J P 特公平7-70954 B 2 公开日：19950731
摘要：PURPOSE:To reduce power consumption and to make the size small by solving a problem that quantity of calculation and memory capacity have been large for realizing the filter bank with respect to the signal analysis and synthesis filter bank used for subband coding of an audio signal or a picture signal. CONSTITUTION:This signal analysis filter bank is provided with a 1st arithmetic operation section 11 to calculate a 1st intermediate signal and a 2nd arithmetic operation section 12 to calculate a sub-band signal, and the signal synthesis filter bank is provided with a 3rd arithmetic operation section to calculate a 2nd intermediate signal and a 4th arithmetic operation section to calculate a full-band signal. The quantity of calculation and memory capacity are reduced by implementing efficient calculation through the use of the 1st and 2nd intermediate signals.
专利内容由知识产权出版社提供
专利名称：Signal analysis and synthetic filter bank 发明人：永井 清隆,宇佐見 陽,中嶋 康志 申请号：J P 特願平3-234 4 94 申请日：19910913 公开号：J P 特公平7-70954 B 2 公开日：19950731
摘要：PURPOSE:To reduce power consumption and to make the size small by solving a problem that quantity of calculation and memory capacity have been large for realizing the filter bank with respect to the signal analysis and synthesis filter bank used for subband coding of an audio signal or a picture signal. CONSTITUTION:This signal analysis filter bank is provided with a 1st arithmetic operation section 11 to calculate a 1st intermediate signal and a 2nd arithmetic operation section 12 to calculate a sub-band signal, and the signal synthesis filter bank is provided with a 3rd arithmetic operation section to calculate a 2nd intermediate signal and a 4th arithmetic operation section to calculate a full-band signal. The quantity of calculation and memory capacity are reduced by implementing efficient calculation through the use of the 1st and 2nd intermediate signals.