B148.001XC5C中文资料
CASE G148 与 G148B CA-148-E 4 15 2007 引擎说明文件说明书
APPLICATION: (Pan wo/Ears) Crawlers: 310D, 310F, 310G, 420B, 420C; Skid Loaders: 1737, 1737S, 1835, 1835B;(Pan wo/Ears) Tractors: 430, 440, 441, 445, 470; Wheel Tractors: 430 CK;(Steel Pan w/Ears) Wheel Tractors: 480 CK Thru ESN 2639789;(Cast Pan w/Ears) Wheel Tractors: 480 CK After ESN 2639789; 480B;QTY ITEM # DESCRIPTION LETTERED ITEMSINCLUDED IN KIT1 924121 In-Frame Kit (Pan wo/Ears) I 1 924122 In-Frame Kit (Steel Pan w/Ears) I 1 924123 In-Frame Kit (Cast Pan w/Ears) I1 925121 Out-of-Frame Kit (Pan wo/Ears) O1 925122 Out-of-Frame Kit (Steel Pan w/Ears) O 1 925123 Out-of-Frame Kit (Cast Pan w/Ears) O4 121111 Sleeve & Piston Assembly O O O I I I 4 121238 Piston Assembly 4 121239 Cylinder Liner (Includes O-Rings) 4 121232 Cylinder Liner O-Ring Package1 121241 Piston Ring Set (3-3/32 1-1/4) 4 221186 STD Rod Bearing O O O I I I 4 221187 .002 Rod Bearing 4 221188 .010 Rod Bearing4 221189 .020 Rod Bearing 4 221191 .030 Rod Bearing 1 221111 STD Main Bearing Set O O O I I I 1 221212 .010 Main Bearing Set 1 221213 .020 Main Bearing Set1 221214 .030 Main Bearing Set 1 221215 .040 Main Bearing Set1 321265 Head Gasket Set O O O I I I1 321249 Head Gasket2 321226 Positive Valve Seal Set, Optional (Not in Gasket Sets) 1 321318 Manifold Gasket 1 321251 Valve Cover Gasket1 321253 Lower Gasket Set w/Seals (Pan wo/Ears) O1 321252 Lower Gasket Set w/Seals (Steel Pan w/Ears) O1 321266 Lower Gasket Set w/Seals (Cast Pan w/Ears) O1 321254 Timing Cover Gasket1 321258 Pan Gasket Set (Pan wo/Ears) I1 321257 Pan Gasket Set (Steel Pan w/Ears)I1 321267 Pan Gasket Set (Cast Pan w/Ears) I 1 321236 Front Crank Seal 1 321237 Front Wear Sleeve, Optional (Not in Gasket Sets)1 321238 Rear Crank Seal1 321239 Rear Wear Sleeve, Optional (Not in Gasket Sets)4 221217 Pin Bushing 1 221216 Cam Bearing Set8 721154 Rod Bolt8 721135 Rod Nut1 721158 Head Stud Kit w/Nuts & WashersAPPLICATION: (Pan wo/Ears) Crawlers: 310D, 310F, 310G, 420B, 420C; Skid Loaders: 1737, 1737S, 1835, 1835B;(Pan wo/Ears) Tractors: 430, 440, 441, 445, 470; Wheel Tractors: 430 CK;(Steel Pan w/Ears) Wheel Tractors: 480 CK Thru ESN 2639789;(Cast Pan w/Ears) Wheel Tractors: 480 CK After ESN 2639789; 480B;QTY ITEM # DESCRIPTION LETTERED ITEMSINCLUDED IN KIT1 929511 Cam Kit C1 929115 Valve Train Kit, Small Valves (Head Casting # G1148) V1 929116 Valve Train Kit, Large Valves (Head Casting # G2088) V1 929315 Basic Valve Kit, Small Valves (Head Casting # G1148) B1 929316 Basic Valve Kit, Large Valves (Head Casting # G2088) B1 521148 Camshaft C 1 521133 Cam Thrust Plate1 521134 Cam Key1 521135 Cam Gear Lock Washer8 521145 Tappet C 4 4 4 4 421193 421177 421194 421178 Exhaust Valve, 1.203" Head Dia (Head Casting # G1148) Exhaust Valve, 1.270" Head Dia (Head Casting # G2088) Intake Valve, 1.328" Head Dia (Head Casting # G 1148) Intake Valve, 1.420" Head Dia (Head Casting # G2088) B B B B V VVV8 421179 Ex & In Valve Guide, 2.688" OAL (Head Casting # G1148) B V 4 421179 Exhaust Valve Guide, 2.688" OAL (Head Casting # G2088) B V4 421181 Intake Valve Guide, 2.438" OAL (Head Casting # G2088) B V4 421175 Exhaust Valve Spring B B V V4 421159 Intake Valve Spring B B V V4 421176 Rotocap Assembly (Rotator & Spring) V V16 421161 Valve Keeper (Half) B B V V4 421164 Valve Spring Retainer4 421182 Exhaust Valve Seat, Head Casting # G2088 4 401144 Intake Valve Seat, Hd Cast# G2088 (1.250" x 1.500" x .219")4 421184 Rocker Arm, Right Hand4 421185 Rocker Arm, Left Hand2 421186 Rocker Arm Shaft1 521146 Cam Timing Gear 1 521143 Crank Timing Gear, Early (1.062" Wide) Use w/Spacer1 521138 Crank Timing Gear, Late (1.156" Wide) Crank wo/Spacer8 521149 Push Rod1 621137 New Oil Pump 1 621132 Oil Pump Shim (.002") 1 621133 Oil Pump Shim (.005")1 721159 Crankshaft, Early Engine w/Pilot Bushing1 721157 Crankshaft, Late Engine w/Internal Drive Spline1 721141 Plug, Cam (2 1/8")2 721139 Plug, Head External Top, Late Engines (1")1 721156 Plug, Head External Rear (1 1/8")1 821147 New Water Pump: Except Below1 821148 New Water Pump: 470; Early 480 CK; 1835, 1835B1 821157 New Water Pump: 1737, 1737S1 821149 Thermostat: Except Below1 821145 Thermostat: 430 CK, 480 CK, 480B, 1737, 1737S1 821119 Thermostat: 1835 & 1835B Skid Loader1 821141 Block Heater。
B250C1500-G中文资料
B* $ $ & $ % $ +, -# $. / & / & 0 $" 1 . " # $. / & 0 $" 2 . " 0 $" 0 0 0 3 ' 4 0 5 0 $" /6360 7& $" / 8 9: ; 5 7 : </ & # $. * $ ! " 6 3 ! " $ < $& $ $ 9=>2> ? ;5 7 * $ 0 $" 9 ; 5 7 0 0 # $. / & 7 /$ 2 . " 0 $" 5@7 8 $ " $ /$ " < A ! $" $ /$ "< A: B $ $ $ $ $ + $ $ $ $ 4 $元器件交易网0.010.11.0100.20.6 1.0 1.4I ,I N S T A N T A N E O U S F O R W A R D C U R R E N T (A )F V ,INSTANTANEOUS FORWARD VOLTAGE (V)Fig.2Typical Forward Characteristics , per elementF 01020304050110100I ,P E A K F O R W A R D S U R G E C U R R E N T (A )F S M NUMBER OF CYCLES AT 60Hz Fig.3Max Non-Repetitive SurgeCurrent110100110100C ,J U N C T I O N C A P A C I T A N C E (p F )j V ,REVERSE VOLTAGE (V)Fig.4Typical Junction CapacitanceR 00.51.01.50255010012515075I ,A V E R A G E F O R W A R D C U R R E N T (A )F T ,AMBIENT TEMPERATURE (°C)Fig.1Forward Current Derating CurveAB元器件交易网DISCLAIMER :1- The information given herein, including the specifications and dimensions, is subject to change without prior not ice to improveproduct characteristics. Before ordering, purchasers are advised to contact the Sensitron Semiconductor sales department for the latest version of the datasheet(s).2- In cases where extremely high reliability is required (such as use in nuclear power control, aerospace and aviation, traffic equipment, medical equipment , and safety equipment) , safety should be ensured by using semiconductor devices that feature assured safety or by means of users’ fail-safe precautions or other arrangement .3- In no event shall Sensitron Semiconductor be liable for any damages that may result from an accident or any other cause during operation of the user’s units according to the datasheet(s). Sensitron Semiconductor assumes no responsibility for any intellectualproperty claims or any other problems that may result from applications of information, products or circuits described in the datasheets. 4- In no event shall Sensitron Semiconductor be liable for any failure in a semiconductor device or any secondary damage resulting from use at a value exceeding the absolute maximum rating.5- No license is granted by the datasheet(s) under any patents or other rights of any third party or Sensitron Semiconductor.6- The datasheet(s) may not be reproduced or duplicated, in any form, in whole or part, without the expressed written permission of Sensitron Semiconductor.7- The products (technologies) described in the datasheet(s) are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety nor are they to be applied to that purpose by their direct purchasers or any third party. When exporting these products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations.SENSITRON SEMICONDUCTOR• ! ! !! "#$ • • % & ' (& ) *+,,---. & ./ 0 • 1 2 &% # % 3 & ./ 0 •B元器件交易网。
PCSC SIM Series Controller 控制器型号指南
SIM Series ControllerA/E Guide SpecificationRevision 2.0PCSC makes no representations or warranties with respect to the contents herein, and disclaims any implied warranties of operation for any particular purpose. Further, PCSC may modify this document without obligation to notify any person of any such changes or revisions.Third Party Trademarks: All other trademarks, trade names, or company names referenced herein are used for identification only and are the property of their respective owners.PCSC3541 Challenger St.Torrance, California 90503Phone: (310) 638-0400; Fax: (310) 638-6204E-Mail:***************1. System Characteristics1.1 Logical Processing Controller (LPC)1.1.A The Logical Processing Controller is used as the sub-component to the SecurityManagement System for the purpose of initiating all decision making criteria as itrelates to the cardholders, readers, and associated hardware connected.Decisions made by the LPC are uploaded to the host computer as historicalevents. Each LPC shall:1.1.B The LPC shall be listed for Underwriters Laboratory (UL):1.1.B.1 UL294 (Access Control System)1.1.B.2 UL1076 (Proprietary Alarm Monitoring System)1.1.B.3 CE Mark1.1.C Support year 2000 compliance without the need for future software orhardware updates.1.1.D Operate without the need for the host to be on-line. No decisions shall bereliable on the host.1.1.E Utilize RS485 multi-point communications to the host for communicationsintegrity. Any system that cannot maintain communications integrity when one ormore LPC is off-line shall not be accepted.1.1.F Have the ability of supporting a minimum of 4 individual readers within a singleenclosure with the ability of expanding to 8 readers while consuming only oneterminal address.1.1.G Have a minimum of 32 inputs and 4 outputs expandable to 66 input points and28 output relays and 8 voltage outputs.1.1.H Include a request-to-exit and door status contact input for each reader withoutthe need for additional modules.1.1.I Detect “forced entry” and “door left open”. A separate action is required foreach.1.1.J Allow mapping of readers to any output address within the same controller.1.1.K Support up to 64 time periods1.1.K.1 A total of 7 start/7 stop intervals, per time period, shall be included.1.1.L Support up to 999 authorization groups1.1.L.1 Each authorization group shall include one (1) time period.1.1.L.2 Each cardholder shall support four (4) authorization groups.1.1.L.3 Each authorization group shall have an alphanumeric description.1.1.M Support up to 365 user selected holidays.1.1.N Allow all unused door logic, such as door strike relays, request-to-exit inputs,and door status inputs to be assigned as general-purpose points.1.1.O Support optional modules for additional customization of inputs and outputs.The following modules shall be available:1.1.O.1 Output Point Module. A minimum of 16 additional output pointsshall be provided1.1.O.2 Combination Module. Where inputs and outputs are necessarywithin the same enclosure, a combination of 16 inputs and 16outputs shall be provided.1.1.P Support a minimum of 8,000 and expandable to 20,000 cardholderassignments.1.1.Q Support a minimum of 4,000 historical transactions in the event communicationsto the host is disrupted.1.1.Q.1 Each LPC transaction shall be time-stamped with the following:1.1.Q.1.a Date (Month, Day, Year)1.1.Q.1.b Time (Hours, Minutes)1.1.Q.1.c Message Text1.1.R Support the downloading of cardholder names in addition to the cardholdernumber.1.1.S Support “reader detection” in the event the reader has been removed or cut.No additional wires or switches shall be used. An alarm condition shall beannunciated.1.1.T Backup programmed data for a minimum of five (5) years without AC power.1.1.U Maintain historical information for a minimum of five (5) years without ACpower.1.1.V Support direct or voice grade 3002 phone line connection1.1.W Automatically adjusts for daylight savings time and leap year independent of thehost system.1.1.X Be supplied with battery backup for a period of four (4) hours.1.1.Y Support a variety of reader technologies. Only non-proprietary readers shall beapproved. Include manufacturer, model number and cut sheet with proposal.1.1.Y.1 Readers shall be provided with the ability of showing a red andgreen LED.1.1.Y.2 The LPC shall show the following characteristics using the bi-colorLED’s:1.1.Y.2.a Power LED (constant red LED)1.1.Y.2.b Card data being processed (fast blink red and greenLEDs)1.1.Y.2.c Access authorized (solid green LED)1.1.Y.2.d Denied access (constant red after card data processing)1.1.Y.2.e Escort authorized (Slow blink red and green LED’s)1.1.Y.2.f Two man rule (slow blink red/green LED’s)1.1.Y.3 Card read errors of four (4) or more within one minute shall bereported to the host.1.1.Z Support the following card/reader technologies as a minimum:1.1.Z.1 Magnetic Stripe1.1.Z.2 Proximity1.1.Z.3 Biometrics1.1.Z.4 Wiegand1.1.Z.5 Protech Barium Ferrite1.1.Z.6 Vehicle Identification1.1.Z.7 Bar Code1.1.Z.8 Keypad1.1.AA Support multiple technologies simultaneously.1.1.BB Support card plus pin, card, or pin only type readers Support a minimum of three (3) “Card Classes” which can be utilized withUser Programmable Logic to interact with external devices or functions, suchas lights, sirens, or HVAC.1.1.DD Integrate each physical input independent of its polarity.1.1.EE Maintain the expiration date for each cardholder. Once the date is reachedthe card will automatically be disabled. No access shall be authorized.1.1.FF Maintain a second expiration date for each cardholder. This date shall beused to prevent access to a unique group of readers, such as parking lots orrecreational facilities. Once the date has expired the card shall be disabledonly for this group of readers.1.1.GG Maintain three (3) access times for each door location; Standard, Long, andEgress.1.1.GG.1 STANDARD access time shall be used for the majority of thecardholders and shall support a range from 0-254 seconds.1.1.GG.2 LONG access time shall be assigned to cardholders who requireextra time to enter/exit a location, such a delivery persons, or tomeet American with Disabilities Act (ADA) requirements. The Longaccess time shall support from 0-254 seconds. A Long shunt timeshall also be required to prevent a door held open alarm exceedingthe standard shunt time. The time shall not require additionalhardware nor be dependent on the host for the decision.1.1.GG.3 EGRESS time shall be used for request to exit devices and support atime between 0 - 254 seconds.1.1.HH Have the ability to maintain an automatic door unlock during specific hoursand days.1.1.II Be required to activate the automatic unlock only after the first valid cardaccess at that location within a pre-defined period of time.1.1.JJ Support three (3) “zones” of Anti-Passback; Building, Department, Parking.1.1.KK Support three (3) “levels” of Anti-Passback; Strict, Soft, and Lenient.1.1.KK.1 STRICT Anti-Passback prevents access after the first attempt andforwards a message to the host. An exit reader shall be used to exitthe door location.1.1.KK.2 SOFT Anti-Passback authorizes access with the use of the card thesecond time using an “in” reader. An event message shall beforwarded to the host indicating entry/exit out of sequence.1.1.KK.3 LENIENT Anti-Passback uses the Entry/Exit criteria, but allowsautomatic sequencing between Department and Building Status if notin proper sequence.1.1.LL Utilize User Programmable Logic (UPL) for the manipulation of inputs, cardstatus, outputs, and elevators.1.1.LL.1 Each LPC shall allow the following inputs to trigger UPL:1.1.LL.1.a Card Access / Card Denied1.1.LL.1.b P hysical Input Point1.1.LL.1.c Time periods1.1.LL.2 Each LPC shall support the following computations for UPL:1.1.LL.2.a Increment Count (range 0-65000)1.1.LL.2.b D ecrement Count (range 0-65000)1.1.LL.2.c Increment by Seconds or Minutes (0-65000)1.1.LL.2.d D ecrement by Seconds or Minutes (0-65000)1.1.LL.2.e Clear1.1.LL.2.f Reset1.1.LL.2.g Flip/Flop (Flip output toggle)1.1.LL.3 Each LPC shall support the following results from UPL:1.1.LL.3.a Activate / De-Activate1.1.LL.3.b S hunt / Un-Shunt1.1.LL.3.c Pause / Resume (suspend/restore)1.1.LL.3.d O verride for 1 Cycle1.1.LL.4 Escort/Visitor Control1.1.LL.4.a Maintain the assignment of access cards for VisitorControl. Each visitor shall be assigned an “EscortRequired” status requiring an employee or “EscortCapable” cardholder to grant a valid entry. The decisionshall not be dependent on the host.1.1.LL.4.b A ll visitor badges shall expire automatically at midnight ofthe date issued without operator intervention. Based uponprogrammed expiration date.1.1.LL.5 Two-Person Minimum Occupancy Rule (TPMOR) for high securityapplications.1.1.LL.5.a The TPMOR feature requires the first two- (2) people tobadge into an area at the same time before access isgranted. An exit reader shall be used for decrementingthe count.2 Execution2.1 The supplier shall install all system components and appurtenances in accordance withthe manufacturer’s instructions, and shall furnish all necessary interconnections, services,and adjustments required for a complete and operable system as specified and shown.Control signal, communications, and data transmission lines grounding shall be installedas necessary to preclude ground loops, noise, and surges from adversely affectingsystem operation. Provide mounting hardware as required. .2.2 All low voltage wiring outside the control console, cabinets, boxes and similarenclosures, shall be plenum rated where required by code. Cable not pulled throughconduits or placed in raceways, outlet boxes, junction boxes, or similar fittings withother building wiring.2.3 The supplier shall perform system testing to ensure it is operable to the manufacturer’sspecifications. The test report shall be submitted to the customer for approval and sign-off.3 Warranty3.1 The access control system shall be warranted for a period of one (1) year from the dateof acceptance.3.2 The supplier shall provide all services required to maintain the system in an operationalstate as specified by the manufacturer for a period of one (1) year after acceptance.3.3 The system supplier shall include a line item bill of materials included in the project andthe warranty associated with each.3.4 The system supplier shall maintain equipment stock for any high-usage equipment.。
BZX84C16LT1G中文资料
BZX84B4V7LT1,BZX84C2V4LT1 Series Zener Voltage Regulators225 mW SOT−23 Surface MountThis series of Zener diodes is offered in the convenient, surface mount plastic SOT−23 package. These devices are designed to provide voltage regulation with minimum space requirement. They are well suited for applications such as cellular phones, hand held portables,and high density PC boards.Features•Pb−Free Packages are Available•225 mW Rating on FR−4 or FR−5 Board•Zener Breakdown V oltage Range − 2.4 V to 75 V•Package Designed for Optimal Automated Board Assembly •Small Package Size for High Density Applications•ESD Rating of Class 3 (>16 KV) per Human Body Model •Tight Tolerance Series Available (See Page 4)Mechanical CharacteristicsCASE: V oid-free, transfer-molded, thermosetting plastic case FINISH: Corrosion resistant finish, easily SolderableMAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES:260°C for 10 SecondsPOLARITY: Cathode indicated by polarity band FLAMMABILITY RATING: UL 94 V−0MAXIMUM RATINGSMaximum ratings are those values beyond which device damage can occur.Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.1.FR−5 = 1.0 X 0.75 X 0.62 in.2.Alumina = 0.4 X 0.3 X 0.024 in., 99.5% alumina.See specific marking information in the device marking column of the Electrical Characteristics table on page 3 of this data sheet.DEVICE MARKING INFORMATION(Pinout: 1-Anode, 2-No Connection, 3-Cathode)(T A = 25°Cunless otherwise noted, V F = 0.95 V Max. @ I F = 10 mA)ELECTRICAL CHARACTERISTICS − BZX84CxxxLT1 SERIES (STANDARD TOLERANCE) (Pinout: 1-Anode, 2-No Connection, 3-Cathode)(T A = 25°C unless otherwise noted, V F = 0.90 V Max. @ I F = 10 mA) (Devices listed in bold, italic are ON Semiconductor Preferred devices.)Z*The “G” suffix indicates Pb−Free package available.ELECTRICAL CHARACTERISTICS − BZX84BxxxL (Tight Tolerance Series)(Pinout: 1-Anode, 2-No Connection, 3-Cathode)(T A = 25°C unless otherwise noted, V F = 0.90 V Max. @ I F = 10 mA)Z*The “G” suffix indicates Pb−Free package available.V Z , T E M P E R A T U R E C O E F F I C I E N T (m V /C )°θV Z , NOMINAL ZENER VOLTAGE (V)− 3− 2012345678Figure 1. Temperature Coefficients (Temperature Range −55°C to +150°C)V Z , T E M P E R A T U R E C O E F F I C I E N T (m V /C )°θ100101V Z , NOMINAL ZENER VOLTAGE (V)Figure 2. Temperature Coefficients (Temperature Range −55°C to +150°C)V Z , NOMINAL ZENER VOLTAGEFigure 3. Effect of Zener Voltage onZener ImpedanceZ Z T , D Y N A M I C I M P E D A N C E ()Ω1000100101V F , FORWARD VOLTAGE (V)Figure 4. Typical Forward VoltageI F , F O R W A R D C U R R E N T (m A )1000100101C , C A P A C I T A N C E (p F )V Z , NOMINAL ZENER VOLTAGE (V)Figure 5. Typical Capacitance 1000100101V Z , ZENER VOLTAGE (V)1001010.10.01I Z , Z E N ER C U R R E N T (m A )V Z , ZENER VOLTAGE (V)1001010.10.01I R , L E A K A G E C U R R E N T (A )µV Z , NOMINAL ZENER VOLTAGE (V)Figure 6. Typical Leakage Current10001001010.10.010.0010.00010.00001I Z , Z E N E R C U R R E N T (m A )Figure 7. Zener Voltage versus Zener Current(V Z Up to 12 V)Figure 8. Zener Voltage versus Zener Current(12 V to 91 V)PACKAGE DIMENSIONSSOT−23TO−236AB CASE 318−09ISSUE AK*For additional information on our Pb−Free strategy and solderingdetails, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.SOLDERING FOOTPRINT*ǒmm inchesǓSCALE 10:1ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION。
B148中文资料
Time and hours meters electromechanicS u b j e c t t o m o d i fi c a t i o n i n t e c h n i c a n d d e s i g n . E r r o r s a n d o m i s s i o n s e x c e p t e d .008B 148 for ACFeaturesTime and hour counter –AC voltage–7-digit number wheel counter –Measuring range 99999.99 h –Without reset–Technical data - electrical ratings Voltage supply 24 VAC, 110 VAC,220..240 VAC (50/60 Hz)Nominal frequency 50 / 60 Hz Power consumption 1 VAGear precision Synchronous to mains ApprovalCE conformB 148Technical data - mechanical design DisplayWhite numbers on black Number of digits 7-digits Digit height 4 mm Measuring range 99 999.99 h Reading accuracy AC: 1/100 h = 36 s Operating temperature -10...+50 °C Storing temperature -20...+70 °CRelative humidity 80 % non-condensing Protection DIN EN 60529IP 20Housing type Built-in housingSurface mount housing E-connection Screw terminal connector MountingClip frame Dimensions W x H x L 48 x 48 x 43 mm Cutout dimensions 45 x 45 mm Installation depth 33 mm Weight approx.60 gMaterialHousing: plasticHour counters with DIN dimensions Display 7-digits, VAC triggerBaumer IVO hour counters are applied anywhere to make costs become evident, to observe maintenance intervals, to define warranty periods or to record operation hours.DescriptionTime and hours meters electromechanicS u b j e c t t o m o d i fi c a t i o n i n t e c h n i c a n d d e s i g n . E r r o r s a n d o m i s s i o n s e x c e p t e d .008B 148Part number B 148.0XCVoltage 524 VAC 8110 VAC9220...240 VACFrequency C 50 Hz D 60 HzModel / front dimensions01Built-in mounting 45 x 45 mm, screw terminals48 x 48 mm02Built-in mounting ø50 mm, screw terminals55 x 55 mm07Surface mount, snap-on base for DIN railEN 50022Hour counters with DIN dimensionsDisplay 7-digits, VAC triggerDimensions Built-in counterFor surface mount, snap-in base with terminal covermax. 10 mm504573348For surface mount, snap-in base w/o terminal coverFor surface mount, snap-in base (EN 50022)。
汽车行车电脑板ECU编号参考
XH100531（0261204791）富康爱丽舍电脑板BOSCH
XH100532（0261204791）富康爱丽舍电脑板
XH100541（0261204792）富康爱丽舍电脑板BOSCH
XH100542（0261204792）富康爱丽舍电脑板
Audi A4 1.8T 110kw BOSCH 0261207936 8E0909518AC
120kw BOSCH 0261208229 8E0909518AM
BOSCH 0261208512 8EA909518BA
BOSCH 0261208524 8E0909518AQ
BOSCH 0261208525 8E0909518AR
XH100401（0261207237）吉利豪情华普
XH100402（0261207237）吉利豪情华普
XH100411（0261207238）吉利美日
7238XH100412（0261207238）吉利美日
XH100421（0261206675）哈飞民意BOSCH
XH100422（0261206675）哈飞民意
SF30142A03 LAW6371客车柳州五菱LJ465Q-1AE3 MOTO
XH100261（A06）福田皮卡电脑板战旗MOTO
XH100262（A06）福田皮卡电脑板战旗MOTO
EF10041A03（卡）北汽福田MOTO
EF10041A03（客）北汽福田BJ491EQI MOTO
XH100271（A09）五菱465 MOTO
XH100171（09393079）五菱哈飞昌河电脑板462-4
09393079五菱哈飞佳宝昌河电脑板462-4
XCS05XL-4BG100I中文资料
© 2001 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at /legal.htm .All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.IntroductionThe Spartan ™ and the Spartan-XL families are a high-vol-ume production FPGA solution that delivers all the key requirements for ASIC replacement up to 40,000 gates.These requirements include high performance, on-chip RAM, core solutions and prices that, in high volume,approach and in many cases are equivalent to mask pro-grammed ASIC devices.The Spartan series is the result of more than 14 years of FPGA design experience and feedback from thousands of customers. By streamlining the Spartan series feature set,leveraging advanced process technologies and focusing on total cost management, the Spartan series delivers the key features required by ASIC and other high-volume logic users while avoiding the initial cost, long development cycles and inherent risk of conventional ASICs. The Spar-tan and Spartan-XL families in the Spartan series have ten members, as shown in T able 1.Spartan and Spartan-XL FeaturesNote: The Spartan series devices described in this data sheet include the 5V Spartan family and the 3.3V Spartan-XL family. See the separate data sheet for the 2.5V Spartan-II family.•First ASIC replacement FPGA for high-volume production with on-chip RAM•Density up to 1862 logic cells or 40,000 system gates •Streamlined feature set based on XC4000 architecture •System performance beyond 80MHz•Broad set of AllianceCORE ™ and LogiCORE ™ predefined solutions available •Unlimited reprogrammability •Low cost•System level features-Available in both 5V and 3.3V versions -On-chip SelectRAM ™ memory -Fully PCI compliant-Full readback capability for program verificationand internal node observability -Dedicated high-speed carry logic -Internal 3-state bus capability-Eight global low-skew clock or signal networks -IEEE 1149.1-compatible Boundary Scan logic -Low cost plastic packages available in all densities -Footprint compatibility in common packages•Fully supported by powerful Xilinx development system -Foundation Series: Integrated, shrink-wrapsoftware-Alliance Series: Dozens of PC and workstationthird party development systems supported-Fully automatic mapping, placement and routing Additional Spartan-XL Features• 3.3V supply for low power with 5V tolerant I/Os •Power down input •Higher performance •Faster carry logic•More flexible high-speed clock network•Latch capability in Configurable Logic Blocks •Input fast capture latch•Optional mux or 2-input function generator on outputs •12 mA or 24 mA output drive •5V and 3.3V PCI compliant •Enhanced Boundary Scan •Express Mode configuration •Chip scale packagingSpartan and Spartan-XL Families Field Programmable Gate ArraysDS060 (v1.6) September 19, 2001Product Specification T able 1: Spartan and Spartan-XL Field Programmable Gate Arrays1.Max values of Typical Gate Range include 20-30% of CLBs used as RAM.2DS060 (v1.6) September 19, 2001General OverviewSpartan series FPGAs are implemented with a regular, flex-ible, programmable architecture of Configurable Logic Blocks (CLBs), interconnected by a powerful hierarchy of versatile routing resources (routing channels), and sur-rounded by a perimeter of programmable Input/Output Blocks (IOBs), as seen in Figure 1. They have generous routing resources to accommodate the most complex inter-connect patterns.The devices are customized by loading configuration data into internal static memory cells. Re-programming is possi-ble an unlimited number of times. The values stored in thesememory cells determine the logic functions and intercon-nections implemented in the FPGA. The FPGA can either actively read its configuration data from an external serial PROM (Master Serial mode), or the configuration data can be written into the FPGA from an external device (Slave Serial mode).Spartan series FPGAs can be used where hardware must be adapted to different user applications. FPGAs are ideal for shortening design and development cycles, and also offer a cost-effective solution for production rates well beyond 50,000 systems per month.Figure 1: Basic FPGA Block DiagramSpartan series devices achieve high-performance, low-cost operation through the use of an advanced architecture and semiconductor technology. Spartan and Spartan-XL devices provide system clock rates exceeding 80MHz and internal performance in excess of150MHz. In contrast to other FPGA devices, the Spartan series offers the most cost-effective solution while maintaining leading-edge per-formance. In addition to the conventional benefit of high vol-ume programmable logic solutions, Spartan series FPGAs also offer on-chip edge-triggered single-port and dual-port RAM, clock enables on all flip-flops, fast carry logic, and many other features.The Spartan/XL families leverage the highly successful XC4000 architecture with many of that family’s features and benefits. T echnology advancements have been derived from the XC4000XLA process developments.Logic Functional DescriptionThe Spartan series uses a standard FPGA structure as shown in Figure1, page2. The FPGA consists of an array of configurable logic blocks (CLBs) placed in a matrix of routing channels. The input and output of signals is achieved through a set of input/output blocks (IOBs) forming a ring around the CLBs and routing channels.•CLBs provide the functional elements for implementing the user’s logic.•IOBs provide the interface between the package pins and internal signal lines.•Routing channels provide paths to interconnect the inputs and outputs of the CLBs and IOBs.The functionality of each circuit block is customized during configuration by programming internal static memory cells. The values stored in these memory cells determine the logic functions and interconnections implemented in the FPGA.Configurable Logic Blocks (CLBs)The CLBs are used to implement most of the logic in an FPGA. The principal CLB elements are shown in the simpli-fied block diagram in Figure2. There are three look-up tables (LUT) which are used as logic function generators, two flip-flops and two groups of signal steering multiplexers. There are also some more advanced features provided by the CLB which will be covered in the Advanced Features Description, page13.Function GeneratorsTwo 16x1 memory look-up tables (F-LUT and G-LUT) are used to implement 4-input function generators, each offer-ing unrestricted logic implementation of any Boolean func-tion of up to four independent input signals (F1 to F4 or G1 to G4). Using memory look-up tables the propagation delay is independent of the function implemented.A third 3-input function generator (H-LUT) can implement any Boolean function of its three inputs. Two of these inputs are controlled by programmable multiplexers (see box "A" of Figure2). These inputs can come from the F-LUT or G-LUT outputs or from CLB inputs. The third input always comes from a CLB input. The CLB can, therefore, implement cer-tain functions of up to nine inputs, like parity checking. The three LUTs in the CLB can also be combined to do any arbi-trarily defined Boolean function of five inputs.4DS060 (v1.6) September 19, 2001A CLB can implement any of the following functions:•Any function of up to four variables, plus any second function of up to four unrelated variables, plus any third function of up to three unrelated variablesNote: When three separate functions are generated, one of the function outputs must be captured in a flip-flop internal to the CLB. Only two unregistered function generator outputs are available from the CLB.•Any single function of five variables•Any function of four variables together with some functions of six variables•Some functions of up to nine variables.Implementing wide functions in a single block reduces both the number of blocks required and the delay in the signal path, achieving both increased capacity and speed. The versatility of the CLB function generators significantly improves system speed. In addition, the design-software tools can deal with each function generator independently.This flexibility improves cell usage.Flip-FlopsEach CLB contains two flip-flops that can be used to regis-ter (store) the function generator outputs. The flip-flops and function generators can also be used independently (see Figure 2). The CLB input DIN can be used as a direct input to either of the two flip-flops. H1 can also drive either flip-flop via the H-LUT with a slight additional delay.The two flip-flops have common clock (CK), clock enable (EC) and set/reset (SR) inputs. Internally both flip-flops are also controlled by a global initialization signal (GSR) which is described in detail in Global Signals: GSR and GTS ,page 20.Latches (Spartan-XL only)The Spartan-XL CLB storage elements can also be config-ured as latches. The two latches have common clock (K)and clock enable (EC) inputs. Functionality of the storage element is described in Table 2.Figure 2: Spartan/XL Simplified CLB Logic Diagram (some features not shown)Clock InputEach flip-flop can be triggered on either the rising or falling clock edge. The CLB clock line is shared by both flip-flops.However, the clock is individually invertible for each flip-flop (see CK path in Figure 3). Any inverter placed on the clock line in the design is automatically absorbed into the CLB. Clock EnableThe clock enable line (EC) is active High. The EC line is shared by both flip-flops in a CLB. If either one is left discon-nected, the clock enable for that flip-flop defaults to the active state. EC is not invertible within the CLB. The clock enable is synchronous to the clock and must satisfy the setup and hold timing specified for the device.Set/ResetThe set/reset line (SR) is an asynchronous active High con-trol of the flip-flop. SR can be configured as either set or reset at each flip-flop. This configuration option determines the state in which each flip-flop becomes operational after configuration. It also determines the effect of a GSR pulse during normal operation, and the effect of a pulse on the SR line of the CLB. The SR line is shared by both flip-flops. If SR is not specified for a flip-flop the set/reset for that flip-flop defaults to the inactive state. SR is not invertible within the CLB.CLB Signal Flow ControlIn addition to the H-LUT input control multiplexers (shown in box "A" of Figure 2, page 4) there are signal flow control multiplexers (shown in box "B" of Figure 2) which select the signals which drive the flip-flop inputs and the combinatorial CLB outputs (X and Y).Each flip-flop input is driven from a 4:1 multiplexer which selects among the three LUT outputs and DIN as the data source.Each combinatorial output is driven from a 2:1 multiplexer which selects between two of the LUT outputs. The X output can be driven from the F-LUT or H-LUT, the Y output from G-LUT or H-LUT .Control SignalsThere are four signal control multiplexers on the input of the CLB. These multiplexers allow the internal CLB control sig-nals (H1, DIN, SR, and EC in Figure 2 and Figure 4) to be driven from any of the four general control inputs (C1-C4 in Figure 4) into the CLB. Any of these inputs can drive any of the four internal control signals.T able 2: CLB Storage Element FunctionalityLegend:XDon ’t careRising edge (clock not inverted).SR Set or Reset value. Reset is default.0*Input is Low or unconnected (default value)1*Input is High or unconnected (default value)Figure 3: CLB Flip-Flop Functional Block Diagram6DS060 (v1.6) September 19, 2001The four internal control signals are:•EC: Enable Clock•SR: Asynchronous Set/Reset or H function generator Input 0•DIN: Direct In or H function generator Input 2•H1: H function generator Input 1.Input/Output Blocks (IOBs)User-configurable input/output blocks (IOBs) provide the interface between external package pins and the internal logic. Each IOB controls one package pin and can be con-figured for input, output, or bidirectional signals. Figure 6shows a simplified functional block diagram of the Spar-tan/XL IOB.IOB Input Signal PathThe input signal to the IOB can be configured to either go directly to the routing channels (via I1 and I2 in Figure 6) or to the input register. The input register can be programmed as either an edge-triggered flip-flop or a level-sensitive latch. The functionality of this register is shown in Table 3,and a simplified block diagram of the register can be seen in Figure 5.Figure 4: CLB Control Signal InterfaceFigure 5: IOB Flip-Flop/Latch Functional BlockDiagramTable 3: Input Register FunctionalityX Don ’t care.Rising edge (clock not inverted).SR Set or Reset value. Reset is default.0*Input is Low or unconnected (default value)1*Input is High or unconnected (default value)The register choice is made by placing the appropriate library symbol. For example, IFD is the basic input flip-flop (rising edge triggered), and ILD is the basic input latch (transparent-High). Variations with inverted clocks are also available. The clock signal inverter is also shown in Figure5 on the CK line.The Spartan IOB data input path has a one-tap delay ele-ment: either the delay is inserted (default), or it is not. The Spartan-XL IOB data input path has a two-tap delay ele-ment, with choices of a full delay, a partial delay, or no delay. The added delay guarantees a zero hold time with respect to clocks routed through the global clock buffers. (See Glo-bal Nets and Buffers, page12 for a description of the glo-bal clock buffers in the Spartan/XL families.) For a shorter input register setup time, with positive hold-time, attach a NODELAY attribute or property to the flip-flop.The output of the input register goes to the routing channels (via I1 and I2 in Figure6). The I1 and I2 signals that exit the IOB can each carry either the direct or registered input signal.The 5V Spartan input buffers can be globally configured for either TTL (1.2V) or CMOS (VCC/2) thresholds, using an option in the bitstream generation software. The Spartan output levels are also configurable; the two global adjust-ments of input threshold and output level are independent. The inputs of Spartan devices can be driven by the outputs of any 3.3V device, if the Spartan inputs are in TTL mode. Input and output thresholds are TTL on all configuration pins until the configuration has been loaded into the device and specifies how they are to be used. Spartan-XL inputs are TTL compatible and 3.3V CMOS compatible. Supported sources for Spartan/XL device inputs are shown in Table4.Spartan-XL I/Os are fully 5V tolerant even though the V CC is 3.3V. This allows 5V signals to directly connect to the Spar-tan-XL inputs without damage, as shown in Table4. In addi-tion, the 3.3V V CC can be applied before or after 5V signals are applied to the I/Os. This makes the Spartan-XL devices immune to power supply sequencing problems.Figure 6: Simplified Spartan/XL IOB Block Diagram8DS060 (v1.6) September 19, 2001Spartan-XL V CC ClampingSpartan-XL FPGAs have an optional clamping diode con-nected from each I/O to V CC . When enabled they clamp ringing transients back to the 3.3V supply rail. This clamping action is required in 3.3V PCI applications. V CC clamping is a global option affecting all I/O pins.Spartan-XL devices are fully 5V TTL I/O compatible if V CC clamping is not enabled. With V CC clamping enabled, the Spartan-XL devices will begin to clamp input voltages to one diode voltage drop above V CC . If enabled, TTL I/O com-patibility is maintained but full 5V I/O tolerance is sacrificed.The user may select either 5V tolerance (default) or 3.3V PCI compatibility. In both cases negative voltage is clamped to one diode voltage drop below ground.Spartan-XL devices are compatible with TTL, LVTTL, PCI 3V, PCI 5V and LVCMOS signalling. The various standards are illustrated in Table 5.Additional Fast Capture Input Latch (Spartan-XL only)The Spartan-XL IOB has an additional optional latch on the input. This latch is clocked by the clock used for the output flip-flop rather than the input clock. Therefore, two different clocks can be used to clock the two input storage elements.This additional latch allows the fast capture of input data,which is then synchronized to the internal clock by the IOB flip-flop or latch.T o place the Fast Capture latch in a design, use one of the special library symbols, ILFFX or ILFLX. ILFFX is a trans-parent-Low Fast Capture latch followed by an active High input flip-flop. ILFLX is a transparent Low Fast Capture latch followed by a transparent High input latch. Any of the clock inputs can be inverted before driving the library element,and the inverter is absorbed into the IOB.IOB Output Signal PathOutput signals can be optionally inverted within the IOB,and can pass directly to the output buffer or be stored in an edge-triggered flip-flop and then to the output buffer. The functionality of this flip-flop is shown in T able 6.T able 4: Supported Sources for Spartan/XL InputsT able 5: I/O Standards Supported by Spartan-XL FPGAsTable 6: Output Flip-Flop Functionality X Don ’t careRising edge (clock not inverted). SR Set or Reset value. Reset is default.0*Input is Low or unconnected (default value)1*Input is High or unconnected (default value)Z3-stateOutput Multiplexer/2-Input Function Generator (Spartan-XL only)The output path in the Spartan-XL IOB contains an addi-tional multiplexer not available in the Spartan IOB. The mul-tiplexer can also be configured as a 2-input function generator, implementing a pass gate, AND gate, OR gate, or XOR gate, with 0, 1, or 2 inverted inputs.When configured as a multiplexer, this feature allows two output signals to time-share the same output pad, effec-tively doubling the number of device outputs without requir-ing a larger, more expensive package. The select input is the pin used for the output flip-flop clock, OK.When the multiplexer is configured as a 2-input function generator, logic can be implemented within the IOB itself. Combined with a Global buffer, this arrangement allows very high-speed gating of a single signal. For example, a wide decoder can be implemented in CLBs, and its output gated with a Read or Write Strobe driven by a global buffer. The user can specify that the IOB function generator be used by placing special library symbols beginning with the letter "O." For example, a 2-input AND gate in the IOB func-tion generator is called OAND2. Use the symbol input pin labeled "F" for the signal on the critical path. This signal is placed on the OK pin — the IOB input with the shortest delay to the function generator. Two examples are shown in Figure7.Output BufferAn active High 3-state signal can be used to place the out-put buffer in a high-impedance state, implementing 3-state outputs or bidirectional I/O. Under configuration control, the output (O) and output 3-state (T) signals can be inverted. The polarity of these signals is independently configured for each IOB (see Figure6, page7). An output can be config-ured as open-drain (open-collector) by tying the 3-state pin (T) to the output signal, and the input pin (I) to Ground.By default, a 5V Spartan device output buffer pull-up struc-ture is configured as a TTL-like totem-pole. The High driver is an n-channel pull-up transistor, pulling to a voltage one transistor threshold below V CC. Alternatively, the outputs can be globally configured as CMOS drivers, with additional p-channel pull-up transistors pulling to V CC. This option, applied using the bitstream generation software, applies to all outputs on the device. It is not individually programma-ble.All Spartan-XL device outputs are configured as CMOS drivers, therefore driving rail-to-rail. The Spartan-XL outputs are individually programmable for 12mA or 24mA output drive.Any 5V Spartan device with its outputs configured in TTL mode can drive the inputs of any typical 3.3V device. Sup-ported destinations for Spartan/XL device outputs are shown in Table7.Three-State Register (Spartan-XL Only)Spartan-XL devices incorporate an optional register control-ling the three-state enable in the IOBs. The use of the three-state control register can significantly improve output enable and disable time.Output Slew RateThe slew rate of each output buffer is, by default, reduced, to minimize power bus transients when switching non-criti-cal signals. For critical signals, attach a FAST attribute or property to the output buffer or flip-flop.Spartan/XL devices have a feature called "Soft Start-up," designed to reduce ground bounce when all outputs are turned on simultaneously at the end of configuration. When the configuration process is finished and the device starts up, the first activation of the outputs is automatically slew-rate limited. Immediately following the initial activation of the I/O, the slew rate of the individual outputs is deter-mined by the individual configuration option for each IOB. Pull-up and Pull-down NetworkProgrammable pull-up and pull-down resistors are used fortying unused pins to V CC or Ground to minimize power con-sumption and reduce noise sensitivity. The configurablepull-up resistor is a p-channel transistor that pulls to V CC.The configurable pull-down resistor is an n-channel transis-tor that pulls to Ground. The value of these resistors is typi-cally 20KΩ − 100KΩ (See "Spartan DC Characteristics Figure 7: AND and MUX Symbols in Spartan-XL IOB10DS060 (v1.6) September 19, 2001Over Operating Conditions" on page 43.). This high value makes them unsuitable as wired-AND pull-up resistors.After configuration, voltage levels of unused pads, bonded or unbonded, must be valid logic levels, to reduce noise sensitivity and avoid excess current. Therefore, by default,unused pads are configured with the internal pull-up resistor active. Alternatively, they can be individually configured with the pull-down resistor, or as a driven output, or to be driven by an external source. To activate the internal pull-up, attach the PULLUP library component to the net attached to the pad. To activate the internal pull-down, attach the PULL-DOWN library component to the net attached to the pad.Set/ResetAs with the CLB registers, the GSR signal can be used to set or clear the input and output registers, depending on the value of the INIT attribute or property. The two flip-flops can be individually configured to set or clear on reset and after configuration. Other than the global GSR net, no user-con-trolled set/reset signal is available to the I/O flip-flops (Figure 5). The choice of set or reset applies to both the ini-tial state of the flip-flop and the response to the GSR pulse.Independent ClocksSeparate clock signals are provided for the input (IK) and output (OK) flip-flops. The clock can be independently inverted for each flip-flop within the IOB, generating eitherfalling-edge or rising-edge triggered flip-flops. The clock inputs for each IOB are mon Clock EnablesThe input and output flip-flops in each IOB have a common clock enable input (see EC signal in Figure 5), which through configuration, can be activated individually for the input or output flip-flop, or both. This clock enable operates exactly like the EC signal on the Spartan/XL CLB. It cannot be inverted within the IOB.Routing Channel DescriptionAll internal routing channels are composed of metal seg-ments with programmable switching points and switching matrices to implement the desired routing. A structured,hierarchical matrix of routing channels is provided to achieve efficient automated routing.This section describes the routing channels available in Spartan/XL devices. Figure 8 shows a general block dia-gram of the CLB routing channels. The implementation soft-ware automatically assigns the appropriate resources based on the density and timing requirements of the design.The following description of the routing channels is for infor-mation only and is simplified with some minor details omit-ted. For an exact interconnect description the designer should open a design in the FPGA Editor and review the actual connections in this tool.The routing channels will be discussed as follows;•CLB routing channels which run along each row and column of the CLB array.•IOB routing channels which form a ring (called a VersaRing) around the outside of the CLB array. It connects the I/O with the CLB routing channels.•Global routing consists of dedicated networks primarily designed to distribute clocks throughout the device with minimum delay and skew. Global routing can also be used for other high-fanout signals.CLB Routing ChannelsThe routing channels around the CLB are derived from three types of interconnects; single-length, double-length,and longlines. At the intersection of each vertical and hori-zontal routing channel is a signal steering matrix called a Programmable Switch Matrix (PSM). Figure 8 shows the basic routing channel configuration showing single-length lines, double-length lines and longlines as well as the CLBs and PSMs. The CLB to routing channel interface is shown as well as how the PSMs interface at the channel intersec-tions.T able 7: Supported Destinations for Spartan/XL OutputsNotes:1.Only if destination device has 5V tolerant inputs.CLB InterfaceA block diagram of the CLB interface signals is shown in Figure9. The input signals to the CLB are distributed evenly on all four sides providing maximum routing flexibility. In general, the entire architecture is symmetrical and regular. It is well suited to established placement and routing algo-rithms. Inputs, outputs, and function generators can freely swap positions within a CLB to avoid routing congestion during the placement and routing operation. The exceptions are the clock (K) input and CIN/COUT signals. The K input is routed to dedicated global vertical lines as well as four single-length lines and is on the left side of the CLB. The CIN/COUT signals are routed through dedicated intercon-nects which do not interfere with the general routing struc-ture. The output signals from the CLB are available to drive both vertical and horizontal channels.Programmable Switch MatricesThe horizontal and vertical single- and double-length lines intersect at a box called a programmable switch matrix (PSM). Each PSM consists of programmable pass transis-tors used to establish connections between the lines (see Figure10).For example, a single-length signal entering on the right side of the switch matrix can be routed to a single-length line on the top, left, or bottom sides, or any combination thereof, if multiple branches are required. Similarly, a dou-ble-length signal can be routed to a double-length line on any or all of the other three edges of the programmable switch matrix.Single-Length LinesSingle-length lines provide the greatest interconnect flexibil-ity and offer fast routing between adjacent blocks. There are eight vertical and eight horizontal single-length lines associ-ated with each CLB. These lines connect the switching matrices that are located in every row and column of CLBs. Single-length lines are connected by way of the program-mable switch matrices, as shown in Figure10. Routing con-nectivity is shown in Figure8.Single-length lines incur a delay whenever they go through a PSM. Therefore, they are not suitable for routing signals for long distances. They are normally used to conduct sig-nals within a localized area and to provide the branching for nets with fanout greater than one.Figure 8: Spartan/XL CLB Routing Channels and Interface Block DiagramFigure 9: CLB Interconnect Signals。
微芯片型号为AT28C010的电容程序存储器参考表说明书
5962-88634 02 XA 5962-88634 02 ZA 5962-88634 02 YA 5962-88634 02 UA
5962-88634 04 XA 5962-88634 04 ZA 5962-88634 04 YA 5962-88634 04 UA
AT28C256-25LM/883 AT28C256-25LM/883-815
AT28C256-25UM/883 AT28C256-25UM/883-815
5962-88525 06 XA 5962-88525 06 ZA 5962-88525 06 YA 5962-88525 06 UA 5962-88525 04 XA 5962-88525 04 ZA 5962-88525 04 YA 5962-88525 04 UA 5962-88525 03 XA 5962-88525 03 ZA 5962-88525 03 YA 5962-88525 03 UA
AT28C256-15LM/883 AT28C256-15LM/883-815
AT28C256-15UM/883 AT28C256-15UM/883-815
AT28C256-20DM/883 AT28C256-20DM/883-815
AT28C256-20FM/883 AT28C256-20FM/883-815
Catalog Numbey Drawing Number (SMD#) Dual marked packages (2)
5962-88525 16 XA 5962-88525 16 ZA 5962-88525 16 YA 5962-88525 16 UA
BPC1136E功能说明V31
8002 8003 0000
备注
当进行设置操 作时，输入命令 码和厂商专用 密码后，将显 示 ”8” 和 三 位 剩余呼叫次数， 可用于查询。
2
命令代码 *000 **00 **01
**02 **03 **04 **05 **06 **07 **08 **09 **10
**11
**12 **13 **15 **16 **17 **18 **19 **21 **40 **41
表 4.1 万能编码对照表 ........................................................................................................................... 5 4.3 万能编码表的编辑步骤 .......................................................................................................................... 5 4.4 万能编码表的编辑举例 .......................................................................................................................... 6
表 4.6.1 预置房号和分机地址对照表（每层 12 户，起始房号尾数为 01）.................................. 7 表 4.6.2 预置房号和分机地址对照表（每层 4 户，起始房号尾数为 05）.................................... 7 5. 房号带有字母的显示说明 ................................................................................................................................. 7 6. 其他特别说明 ..................................................................................................................................................... 8 6.1 初始化 ...................................................................................................................................................... 8 6.2 用户开锁密码 .......................................................................................................................................... 8
HD14052B中文资料
Hitachi CodeJEDECEIAJWeight (reference value)DP-16 Conforms Conforms 1.07 gHitachi Code JEDEC EIAJWeight (reference value)FP-16DA —Conforms 0.24 g*Dimension including the plating thicknessBase material dimension° – 8°Hitachi CodeJEDECEIAJWeight (reference value)FP-16DNConformsConforms0.15 gUnit: mm*Dimension including the plating thickness Base material dimension° – 8°元器件交易网Cautions1.Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,copyright, trademark, or other intellectual property rights for information contained in this document.Hitachi bears no responsibility for problems that may arise with third party’s rights, includingintellectual property rights, in connection with use of the information contained in this document.2.Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use.3.Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,contact Hitachi’s sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,traffic, safety equipment or medical equipment for life support.4.Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installationconditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product.5.This product is not designed to be radiation resistant.6.No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi.7.Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products.Hitachi, Ltd.Semiconductor & Integrated Circuits.Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.Hitachi Asia Pte. Ltd.16 Collyer Quay #20-00Hitachi TowerSingapore 049318Tel: 535-2100Fax: 535-1533URLNorthAmerica : http:/Europe : /hel/ecg Asia (Singapore): .sg/grp3/sicd/index.htm Asia (Taiwan): /E/Product/SICD_Frame.htm Asia (HongKong): /eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htmHitachi Asia Ltd.Taipei Branch Office3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105)Tel: <886> (2) 2718-3666Fax: <886> (2) 2718-8180Hitachi Asia (Hong Kong) Ltd.Group III (Electronic Components)7/F., North Tower, World Finance Centre,Harbour City, Canton Road, Tsim Sha Tsui,Kowloon, Hong Kong Tel: <852> (2) 735 9218Fax: <852> (2) 730 0281 Telex: 40815 HITEC HXHitachi Europe Ltd.Electronic Components Group.Whitebrook ParkLower Cookham Road MaidenheadBerkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000Fax: <44> (1628) 778322Hitachi Europe GmbHElectronic components Group Dornacher Stra§e 3D-85622 Feldkirchen, Munich GermanyTel: <49> (89) 9 9180-0Fax: <49> (89) 9 29 30 00Hitachi Semiconductor (America) Inc.179 East Tasman Drive,San Jose,CA 95134 Tel: <1> (408) 433-1990Fax: <1>(408) 433-0223For further information write to:。
TURCK 产品说明书：BI1.5-EG08-Y1 脉冲感应型无接触开关
TURCK Inc. | 3000 Campus Drive Minneapolis, MN 55441-2656 | Phone: 763-553-7300 | Application Support: 1-800-544-7769 | Fax 763-553-0708 | 1|4B I 1.5-E G 08-Y 1 | 12/03/2020 04-26 | t e c h n i c a l c h a n g e s r e s e r v e dBI1.5-EG08-Y1Inductive SensorTechnical dataBI1.5-EG08-Y11003500Rated switching distance 1.5 mm FlushSecured operating distance ≤ (0.81 × Sn) mmSt37 = 1; Al = 0.3; stainless steel = 0.7; Ms = 0.4≤ 2 % of full scale ≤ ± 10 %1…10 %-25…+70 °C 2-wire, NAMUR 5 kHz Nom. 8.2 VDC Non-actuated current consumption ≥ 2.1 mA Actuated current consumption ≤ 1.2 mAKEMA 02 ATEX 1090X )/inductance (L i )150 nF/150 µHÉ II 1 G Ex ia IIC T6 Ga/II 1 D Ex ia IIIC T95 °C Da(max. U i = 20 V, I i = 60 mA, P Threaded barrel, M8 × 142 mmStainless steel, 1.4427 SO Plastic, PA12-GF30Features■Threaded barrel, M8 x 1■Stainless steel, 1.4427 SO ■DC 2-wire, nom. 8.2 VDC■Output acc. to DIN EN 60947-5-6 (NAMUR)■Cable connection■ATEX category II 1 G, Ex zone 0■ATEX category II 1 D, Ex zone 20■SIL2 (Low Demand Mode) acc. to IEC 61508,PL c acc. to ISO 13849-1 at HFT0■SIL3 (All Demand Mode) acc. to IEC 61508,PL e acc. to ISO 13849-1 with redundant configuration HFT1Wiring diagramFunctional principleInductive sensors detect metal objectscontactless and wear-free. For this, they use a high-frequency electromagnetic AC field that interacts with the target. Inductive sensors generate this field via an RLC circuit with a ferrite coil.Technical dataMounting instructions22/3/21|1Y-8GE-5.1IB TURCK Inc. | 3000 Campus Drive Minneapolis, MN 55441-2656 | Phone: 763-553-7300 | Application Support: 1-800-544-7769 | Fax 763-553-0708 | 2|4TURCK Inc. | 3000 Campus Drive Minneapolis, MN 55441-2656 | Phone: 763-553-7300 | Application Support: 1-800-544-7769 | Fax 763-553-0708 | 3|4B I 1.5-E G 08-Y 1 | 12/03/2020 04-26 | t e c h n i c a l c h a n g e s r e s e r v e dAccessoriesQM-086945100Quick-mount bracket with dead-stop, chrome-plated brass, male thread M12 x 1. Note: The switching distance of proximity switches may be reduced through the use of quick-mount brackets.BST-08B6947210Mounting clamp for threaded barrel sensors, with dead-stop; material:PA6MW-086945008Mounting bracket for threaded barrel sensors; material: Stainless steel A21.4301 (AISI 304)BSS-086901322Mounting clamp for smooth and threaded barrel sensors; material:PolypropyleneMBS8069479Mounting clamp for smooth barrel sensors; mounting block material:Anodized aluminumTURCK Inc. | 3000 Campus Drive Minneapolis, MN 55441-2656 | Phone: 763-553-7300 | Application Support: 1-800-544-7769 | Fax 763-553-0708 | 4|4B I 1.5-E G 08-Y 1 | 12/03/2020 04-26 | t e c h n i c a l c h a n g e s r e s e r v e dOperating InstructionsIntended useThis device fulfills the directive 2014/34/EC and is suited for use in explosion hazardous areas according to EN60079-0:2012 + A11 and EN 60079-11:2012.Further it is suited for use in safety-related systems, including SIL2 as per IEC 61508.In order to ensure correct operation to the intended purpose it is required to observe the national regulations and directives.For use in explosion hazardous areas conform to classificationII 1 G and II 1 D (Group II, Category 1 G, electrical equipment for gaseous atmospheres and category 1 D, electrical equipment for dust atmospheres).Marking (see device or technical data sheet)É II 1 G and Ex ia IIC T6 Ga and É II 1 D Ex ia IIIC T95 °C Da acc. to EN 60079-0, -11Local admissible ambient temperature -25…+70 °CInstallation/CommissioningThese devices may only be installed, connected and operated by trained and qualified staff. Qualified staff must have knowledge of protection classes, directives and regulations concerning electrical equipment designed for use in explosion hazardous areas.Please verify that the classification and the marking on the device comply with the actual application conditions.This device is only suited for connection to approved Exi circuits according to EN 60079-0 and EN 60079-11. Please observe the maximum admissible electrical values.After connection to other circuits the sensor may no longer beused in Exi installations. When interconnected to (associated) electrical equipment, it is required to perform the "Proof of intrinsic safety" (EN60079-14).Attention! When used in safety systems, all content of the security manual must be observed.Installation and mounting instructionsAvoid static charging of cables and plastic devices. Please only clean the device with a damp cloth. Do not install the device in a dust flow and avoid build-up of dust deposits on the device.If the devices and the cable could be subject to mechanical damage, they must be protected accordingly. They must also be shielded against strong electro-magnetic fields.The pin configuration and the electrical specifications can be taken from the device marking or the technical data sheet.Service/MaintenanceRepairs are not possible. The approval expires if the device is repaired or modified by a person other than the manufacturer. The most important data from the approval are listed.。
萨奥丹佛斯柱塞泵手册
AA
© 2007 Sauer-Danfoss. All rights reserved. Printed in U.S.A. Sauer-Danfoss accepts no responsibility for possible errors in catalogs, brochures and other printed material. Sauer-Danfoss reserves the right to alter its products without prior notice. This also applies to products already ordered provided that such alterations aren’t in conflict with agreed specifications. All trademarks in this material are properties of their respective owners. Sauer-Danfoss and the Sauer-Danfoss logotype are trademarks of the Sauer-Danfoss Group.
萨奥丹佛斯柱塞泵手册萨奥柱塞泵萨奥丹佛斯官网萨奥丹佛斯上海萨奥丹佛斯萨奥丹佛斯液压泵萨奥丹佛斯中国丹佛斯柱塞泵济宁萨奥机械有限公司萨奥液压泵
42系列 轴向柱塞闭式泵 服务手册
42系列轴向柱塞闭式泵 服务手册 版本
版本信息 修改信息表
日期 页码 修改项 Rev.
2008年7月
-
ቤተ መጻሕፍቲ ባይዱ
第一版，基于英文版520L0638，Rev BA
功能描述
概述及剖视图...................................................................................................................................................................10 系统回路图........................................................................................................................................................................11 泵特征..................................................................................................................................................................................11 基本闭式回路.............................................................................................................................................................11 壳体回油及散热器. ..................................................................................................................................................11 补油泵. ..........................................................................................................................................................................11 补油溢流阀..................................................................................................................................................................12 回路冲洗阀..................................................................................................................................................................12 过滤方式选项...................................................................................................................................................................13 排量限制器........................................................................................................................................................................14 单向补油/高压溢流阀..................................................................................................................................................14 旁通阀..................................................................................................................................................................................14 辅助安装法兰盘. .............................................................................................................................................................15
3GPP 5G基站(BS)R16版本一致性测试英文原版(3GPP TS 38.141-1)
4.2.2
BS type 1-H.................................................................................................................................................. 26
4.3
Base station classes............................................................................................................................................27
1 Scope.......................................................................................................................................................13
All rights reserved. UMTS™ is a Trade Mark of ETSI registered for the benefit of its members 3GPP™ is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational Partners LTE™ is a Trade Mark of ETSI registered for the benefit of its Members and of the 3GPP Organizational Partners GSM® and the GSM logo are registered and owned by the GSM Association
XC4型号中级 高级电流接线器说明书
XC4DIN Medium/High-Current Connectors1Medium/High-Current Connectors Conform to International Standards.■DIN 41612 compliance ensures full inter-changeability.■Sufficient creepage distance for medium/high-current and high-voltage circuit appli-cations.■Mounts in XC5-series Racks.■The product line also includes M-type (Mixed) DIN Connectors.■The XC4 conforms to UL standards (No. E103202). (Some models are not included)■Ratings and Characteristics■Materials and FinishNote:1.The XC4L-1541 is made of fiber-glass reinforced PBT resin (UL94 V-0).2.Connector materials and finishes.■Applicable Wrap Post Wire SizesAWG26, AWG24, AWG22, or AWG20 (Solid wire: 0.40 to 0.80 mm dia.)■Wrap Post Length3 wiresRoHS Compliant2 to34 to56 to 78 to 9**Some models are not included.ModelItemXC4A/B XC4E/F XC4G/H XC4K/L XC4M/N RemarksRated current 6 A15 A2 ARated voltage380 VAC 500 VAC300 VAC Contact resistance 15 m Ω max.8 m Ω max.20 m Ω max.At 20 mV, 100 mA max.Insulation resistance 106M Ω min.At 100 VDCDielectric strength 1,550 VAC 3,100 VAC 1,000 VAC1 min (leakage current: 1 mA max.)Total insertion force 74 N 1.23 N per contact 39 N 88 N0.93 N per contact Max. valueRemoval force 0.20 N 0.15 N 0.20 N0.15 NMin. value with a test gauge Insertion durability400 times Ambient operating tem-perature−55 to 125°CWith no icing at low temperatureItemXC4A/BXC4E/FXC4G/HXC4K/LXC4M/N (See note 2.)Housings Plugs Fiber-glass reinforced PC resin (UL94 V-1)/grayFiber-glass reinforced PBT resin (UL94 V-0)/gray PC resin with glass (UL94 V-1)/gray (See note 1.)Fiber-glass reinforced PBT res-in (UL94 V-0)/gray Sockets Contacts MatingendPlugs Brass/nickel base, gold platingBrass/nickel base, silver plating Brass/nickel base, gold plating SocketsPhosphor bronze inlay/nickel base, gold plating Phosphor bronze/nickel base, silver platingPhosphor bronze/nickel base, gold platingTerminal PlugsBrass/nickel base, tin platingBrass/nickel base, silver plating Brass/nickel base, tin plating SocketsPhosphor bronze/nickel base, tin platingPhosphor bronze/nickel base, tin platingPhosphor bronze/nickel base, tin plating2DIN Medium/High-Current Connectors XC4XC4A DIN F-type Plugs■Dimensions(unit: mm)■Ordering InformationAppear-anceNo. ofcontacts Terminal type Model 48Right-angle DIP terminalsXC4A-4812T wo, 2.5 dia.Mounting holes (bottom view)48, 1 dia.0T wo, 2.8 dia.XC4A-4812(With right-angle DIP terminals)DIN Medium/High-Current Connectors XC43XC4B DIN F-type Sockets■Dimensions(unit: mm)■Ordering InformationAppear-anceNo. ofcontacts Terminal type Model 48Straight DIP terminals XC4B-4811Straight wrap terminalsXC4B-4813Panel dimensions15.0 min.Mo u nting holes (bottom vie w )T w o, 2.8 dia.0T w o, 2.8 dia.048, 1.0 dia. (DIP terminals)048, 1.5 dia. (Wrap terminals)0XC4B-4813(With straight wrap terminals)(With straight DIP terminals)4DIN Medium/High-Current Connectors XC4XC4E DIN E-type Plugs■Dimensions(unit: mm)■Ordering Information*Has no center row (row b).Appear-anceNo. of contacts Terminal type Model 48Right-angle DIP terminals XC4E-481232*Right-angle DIP terminalsXC4E-3212Mo u nting holes (b ottom v ie w )T w o, 2.8 dia.1.0 dia.0Note: The mo u nting holes in the a b o v e diagrams are for the 48-contact Pl u g.The 32-contact Pl u g does not ha v e the center ro w (C in the a b o v e diagrams).T w o, 2.5 dia.XC4E-4812 XC4E-3212(With right-angle DIP terminals)DIN Medium/High-Current Connectors XC45XC4F DIN E-type Sockets■Dimensions(unit: mm)■Ordering Information*Has no center row (row b).Appear-anceNo. ofcontacts Terminal type Model 48Straight wrap terminals XC4F-481332*Straight wrap terminalsXC4F-3213Mo u nting holes (b ottom vie w )T w o, 2.8 dia.1.5 dia.0Note: The mo u nting holes in the a b ove diagrams are for the 48-contact Pl u g. The 32-contact Pl u g does not have the center ro w (C in the a b ove diagrams).XC4F-4813XC4G DIN D-type Plugs■Dimensions(unit: mm)■Ordering InformationAppear-anceNo. ofcontactsTerminal type Model 32Right-angle terminals XC4G-3212T w o, 2.5 dia.0.6×0.6 Mo u nting holes (b ottom v ie w)32, 1 dia.T w o, 2.8 dia.XC4G-3212(With right-angle terminals)6DIN Medium/High-Current Connectors XC4DIN Medium/High-Current Connectors XC47XC4H DIN D-type Sockets■Dimensions(unit: mm)■Ordering InformationModel Straight wrap terminalsXC4H-321362a281c246882030122412161422395 5.086.311.6202.845.08 2.9(5.63)10.68.531908576.2Mo u nting holes (bottom vie w )T w o, 2.8 dia.32, 1.5 dia.0Panel dimensions10.8 min.T w o, 2.8 dia.1 × 1T w o, 2.8 dia.0XC4K DIN H-type Plugs■Dimensions(unit: mm)■Ordering InformationTerminal type ModelRight-angle DIP terminals XC4K-1542Mo u nting holes (b ottom v ie w)15, 1.5 dia.T w o, 2.8 dia.XC4K-15428DIN Medium/High-Current Connectors XC4DIN Medium/High-Current Connectors XC49XC4L DIN H-type Sockets, Faston Tab Terminals■Dimensions(unit: mm)■Ordering InformationNote:The applicable contact is a #250 Faston receptacle.No. ofcontacts Terminal typeModel 15Faston tab terminals (See note.)XC4L-1546Two, 2.8 dia.Panel dimensions15 min.2.8 dia. or M2.505.5 min.XC4L-1546(With Faston tab terminals)XC4L DIN H-type Sockets, Straight DIP Terminals■Dimensions(unit: mm)■Ordering Information No. ofcontactsTerminal type Model 15Straight DIP terminals XC4L-1541T w o, 2.8 dia.Mo u nting holes (b ottom v ie w)15, 1.5 dia.T w o, 2.8 dia.10DIN Medium/High-Current Connectors XC4DIN Medium/High-Current Connectors XC411XC4M DIN M-type Plugs■Dimensions(unit: mm)■Ordering InformationNote:The numbers shown are the number of slots/number of signal circuit contacts.No. of contacts (See note.)Terminal typeModel 2/78Right-angle DIP terminalsXC4M-02124/60XC4M-04126/42XC4M-06125.35 dia.T wo, 2.5 dia.4.8 dia.Mounting holes (bottom view)T wo, 2.8 dia.1 dia.XC4M-0212 (2 slots)XC4M-0412 (4 slots)XC4M-0612 (6 slots)(With right-angle DIP terminals)DimensionsNo. of contacts No. of slots No. of signal circuit contacts A (mm) B (mm)2/7827863.50---4/6046048.267.626/4264233.0215.2412DIN Medium/High-Current Connectors XC4XC4N DIN M-type Sockets■Dimensions(unit: mm)Ordering InformationNote:The numbers shown are the number of slots/number of signal circuit contacts.Mo u nting holes (b ottom vie w )1 dia.0Panel dimensions10.8 min.12.5 min.2.8 dia. or M2.505.5 min.T w o, 2.8 dia.06 dia.3231303212.54±0.052.54±0.052.54±0.0573.66±0.17.62±0.190±0.1A ±0.1B ±0.10.3DimensionsNo. of contacts No. of slots No. of signal circuit contacts A (mm)B (mm)2/7827863.50---4/6046048.267.626/4264233.0215.24No. of contacts(See note.)Terminal typeModel 2/78Straight wrap terminalsXC4N-02134/60XC4N-04136/42XC4N-0613DIN Medium/High-Current Connectors XC413XC4W High-current Contacts for XC4M and XC4N■Dimensions(unit: mm)■Ordering Information■High-current Contact CharacteristicsClassification Allowable current Terminal typeModelPlugs40 A Solder-cup terminals XC4W-041120 A XC4W-021110 A XC4W-011140 ARight-angle solder-DIP terminals XC4W-0412Receptacles40 A Solder-cup terminals XC4W-141120 A XC4W-121110 AXC4W-11115.6 dia.B dia.A dia.3.6 dia.3.35 dia.5.6 dia.B dia.A dia.C 7.811.922.45XC4W-0@11Plugs with Solder-cup TerminalsXC4W-1@11Receptacle with Solder-cup TerminalsXC4W-0412Plugs with Right-angle Solder-Dimensions (mm)ModelA B C XC4W-0411 4.8 5.6 5.2XC4W-0211 2.8 3.7 4.0XC4W-0111 1.7 2.6 3.0XC4W-1411 4.8 5.6 5.2XC4W-1211 2.8 3.7 4.0XC4W-11111.72.63.0C u r r e n t (A )40-A contact20-A contact10-A contactT emperature (°C)14DIN Medium/High-Current Connectors XC4XC4W Coaxial Contacts for XC4M and XC4N■Dimensions(unit: mm)■Ordering InformationNote:The coaxial contact was designed for a 50-Ω cable, but a 75-Ωcable may be used at some frequencies.■Applicable Coaxial Cables■Coaxial Cable Characteristics5.7 dia.A dia.Sleeve4.05 dia.5.25 dia.4.8 dia.5.7 dia. Sleeve5.25 dia.4.75 dia. SleeveA dia.5.7 dia.XC4W-2111 (2.2 dia.)XC4W-2211 (3.2 dia.)Plug Side with Straight Cable-connecting ContactXC4W-3111 (2.2 dia.)XC4W-3211 (3.2 dia.)Socket Side with Straight Cable-connecting Contact XC4W-2014Plug Side with Right-angle Solder-DIP connecting ContactContact formSleeve diameter(mm)Model PlugStraight cable-connect-ing contacts (solder and crimping)2.2 dia.XC4W-21113.2 dia.XC4W-2211Right-angle solder DIP contacts---XC4W-2014Socket Straight cable-connect-ing contacts (solder and crimping)2.2 dia.XC4W-31113.2 dia.XC4W-3211Right-angle cable-con-necting contacts (solder and crimping)2.2 dia.XC4W-31123.2 dia.XC4W-3212Sleeve diameter (mm)Model Characteristic impedance 50 Ω75 Ω2.2 dia.XC4W-2111XC4W-3111XC4W-3112RG178B/U RG196A/U 3.2 dia.XC4W-2211XC4W-3211XC4W-3212RG188A/U RG316U RG174A/URG179B/U RG187A/U50-Ω coaxial cable 75-Ω coaxial cable Frequency (GHz)Reflection factor (max.)Frequency (MHz)Reflection factor (max.)Up to 10.05Up to 1000.0151 to 40.07100 to 2000.024 to 100.10200 to 3000.03DIN Medium/High-Current Connectors XC415■Mounting the XC4W to the XC4/XC4N■XC4M/XC4N ToolsThe C-shaped Spring supplied with the XC4W Contacts is needed to mount the XC4W to the XC4/XC4N Housing. It does not lock the Contacts securely to the housing, but is used for self-alignment to keep the contact terminals from bending when mating. The Contacts may bend slightly after they are connected if lateral force is applied to them. Make sure the Contacts are not bent prior to wiring.Crimping Tool and Die SetXY2D-0011(Crimping Tool)XY2D-0012(Die set for 2.2 mm dia. sleeve)XY2D-0013(Die set for 3.2 mm dia. sleeve)•The crimping T ool connects a coaxial cable to a coaxial contact.•Place the sleeve over the terminal end of the coaxial cable and insert the contact.solder the core of the coaxial cable.•Slide the sleeve in place and press fitting it with the crimping Tool.•Right-angle ContactsSolder the core and press fitting the sleeve as you would a straight contact. Insert the insulator and cover it with a metal cap.Do not solder the cap to the contact.Cable DimensionsUnit: mmContact Removal Tool(unit: mm)XY2D-0014•High-current Contacts and Coaxial Con-tacts can be inserted into the Contact Housing manually by pushing them in from the back of the Connector.•U se the special tool shown above to remove Contacts.•Pull out the Removal T ool lance. Align the four ridges on the end of the T ool with the four ridges on the Contact Housing. Push the lance in firmly.•The Contact can then be easily removed by pushing in the lance.•Perform these steps from the mating side of the Connector.Model XY2D-0011XY2D-0012XY2D-0013Braided shieldSolderSleeveCoaxial CableSleeveCoaxial Contactab c Straight cable-connect-ing con-tacts9.5 +0/−0.37 +0/−0.34 ±0.3Right-an-gle cable-connect-ing con-tacts11.5 +0/−0.510 +0/−0.5 5.5 ±0.5SolderMetal capInsulator Braided shieldSleeve Coaxial CableBraided shieldCoreModelXY2D-001416DIN Medium/High-Current Connectors XC4■Mating Diagrams(unit: mm)■PrecautionsCorrect UseModelXC4A/B XC4E/F XC4G/H DIN connector typeF typeE typeD typeMating dia-gramsModelXC4K/L XC4M/N DIN connector typeH typeM typeMating dia-gramsPlugXC4A-4812Socket XC4B-4811PlugXC4E-@@12SocketXC4F-@@13PlugXC4G-3212Socket XC4H-3213PlugXC4K-1542Socket XC4L-1541Plug XC4MSocket XC4NAutomated Soldering•Use tape to mask Right-angle Connectors before automated soldering.•PC resin is used to make the XC4A/B,XC4K, and XC4L -1546 Housing more rugged. Only use freon TF , freon TE, or an alcohol-based cleaning solution to wash the Housing, and keep washing time as short as possible.Automated Soldering Conditions (Jet Flow)1.Soldering temperature: 250 ±5°C2.Continuous soldering time: Within 5±1 sMasking tape。
XC61CC1202MH资料
1/19XC61C ETR0201_004■GENERAL DESCRIPTIONThe XC61C series are highly precise, low power consumption voltage detectors, manufactured using CMOS and laser trimming technologies.Detect voltage is extremely accurate with minimal temperature drift.Both CMOS and N-channel open drain outputconfigurations are available.■APPLICATIONS●Microprocessor reset circuitry ●Memory battery back-up circuits ●Power-on reset circuits ●Power failure detection●System battery life and charge voltage monitors■TYPICAL PERFORMANCE CHARACTERISTICS■FEATURESHighly Accurate : ± 2% (Low Voltage VD: 0.8V~1.5V) (Standard Voltage VD: 1.6V~6.0V) ± 1% (Standard Voltage VD: 2.6V~5.0V) Low Power Consumption : 0.7μA (TYP .) [V IN =1.5V] Detect Voltage Range :0.8V ~ 6.0V in 100mV increments Operating Voltage Range :0.7V ~ 6.0V (Low Voltage)0.7V ～10.0V (Standard Voltage) Detect Voltage Temperature Characteristics: ±100ppm/℃ (TYP .) @Ta=25 O C Output Configuration : N-channel open drain or CMOS Ultra Small Packages : SSOT-24 (150mW)SOT-23 (250mW) SOT-25 (250mW) SOT-89 (500mW) TO-92 (300mW) USP-6B (100mW) USP-6C (100mW)USP-4 (120mW)◆CMOS◆Highly Accurate:±1% (V DF =2.6V~5.0V) ±2% (V DF =0.8V~6.0V) ◆Low Power Consumption: 0.7μA(V IN =1.5V)■TYPICAL APPLICATION CIRCUITS2/19XC61C Series1 V SS2 NC3 V OUTNC 6VIN5NC 4PIN NUMBERSSOT-24 SOT-23 SOT-25 SOT-89 TO-92 (T)TO-92 (L)USP-6B USP-6CUSP-4PIN NAMEFUNCTION2 3 2 2 2 1 5 5 4 V INSupply Voltage t I t4 2 3 3 3 2 1 1 2 V SS Ground 1 1 1 1 1 3 3 3 1 V OUT Output 3 - 4,5 - - - 2,4,6 2,4,6 3 NC No ConnectionDESIGNATORDESCRIPTIONSYMBOLDESCRIPTIONC: CMOS output① Output ConfigurationN: N-ch open drain output : e.g.0.9V → ②0, ③9② ③Detect Voltage08 ~ 60: e.g.1.5V → ②1, ③5④ Output Delay 0 : No delay1 : Within ±1%⑤ Detect Accuracy2 : Within ±2% N : SSOT-24 (SC-82) M : SOT-23 P : SOT-89 S : SOT-25T : TO-92 (Standard) L : TO-92 (Custom pin configuration) D : USP-6B E : USP-6C ⑥ PackageG : USP-4 R : Embossed tape, standard feed L : Embossed tape, reverse feedH : Paper type (TO-92) ⑦ Device OrientationB : Bag (TO-92)■PIN CONFIGURATION■PIN ASSIGNMENT■PRODUCT CLASSIFICATION●Ordering InformationXC61C ①②③④⑤⑥⑦ *Please use the circuit without connectingthe heat dissipation pad. If the pad needs to be connected to other pins, it should be connected to the V IN pin.USP-6C (BOTTOM VIEW)INV SS V OUT USP-4（BOTTOM VIEW ） SOT-25 (TOP VIEW)3/19XC61CSeries■PACKAGING INFORMATION●SSOT-24 (SC-82)●SOT-23●SOT-254/19XC61C Series●SOT-89●TO-92■PACKAGING INFORMATION (Continued)5/19XC61CSeries●USP-6C■PACKAGING INFORMATION (Continued)●USP-4* Soldering fillet surface is not formed because the sides of the pins are plated.6/19XC61C SeriesMARK CONFIGURATION VOLTAGE (V)A CMOS 0.XB CMOS 1.XC CMOS 2.XD CMOS 3.XE CMOS 4.XF CMOS 5.X H CMOS 6.XMARK CONFIGURATION VOLTAGE (V)K N-ch 0.X L N-ch 1.X M N-ch 2.X N N-ch 3.X P N-ch 4.X R N-ch 5.X S N-ch 6.XMARK VOLTAGE (V)MARK VOLTAGE (V)0 X.0 5 X.5 1 X.1 6 X.6 2 X.2 7 X.7 3 X.3 8 X.8 4 X.4 9 X.9MARKDELAY TIMEPRODUCT SERIES3 No Delay Time XC61Cxxx0xxx① Represents integer of detect voltage and CMOS Output (XC61CC series)■MARKING RULE● SSOT-24, SOT-23, SOT-25,SOT-89, USP-4①②④1234①②③④123④③②①123N-Channel Open Drain Output (XC61CN series)②Represents decimal number of detect voltage③Represents delay time (Except for SSOT-24)④Represents production lot numberBased on the internal standard. (G, I, J, O, Q, W excepted)USP-4 (TOP VIEW)①②③④12354SOT-25(TOP VIEW)7/19XC61CSeriesMARK② ③VOLTAGE (V)3 3 3.3 5 05.0MARKOUTPUTCONFIGURATIONC CMOS N N-chMARK DELAY TIME0 No delayMARK DETECT VOLTAGE ACCURACY 1 Within ± 1% (Semi-custom)2Within ± 2%MARKPRODUCTION YEAR5 20056 2006MARK ①②PRODUCT SERIES 1 CXC61Cxxx0xDxMARKOUTPUT CONFIGURATION PRODUCT SERIESC CMOS XC61CCxx0xDxN N-ch XC61CNxx0xDxMARK ④⑤VOLTAGE (V)PRODUCT SERIES 3 33.3 XC61Cx330xDx 5 05.0XC61Cx500xDx●USP-6B, USP-6C■MARKING RULE (Continued)⑥Represents a least significant digit of production year●TO-92⑦Represents production lot number0 to 9, A to Z repeated. (G, I, J, O, Q, W excepted) * No character inversion used. ①Represents output configuration②, ③Represents detect voltage (ex.)④Represents delay time⑤Represents detect voltage accuracy①, ②Represents product series③Represents output configuration④, ⑤Represents detect voltage(ex.)⑥Represents production lot number0 to 9, A to Z repeated (G, I, J, O, Q, W excepted) Note: No character inversion used.USP-6C (TOP VIEW)USP-6B (TOP VIEW)8/19XC61CSeries*1: Low voltage: V DF(T)=0.8V~1.5V*2: Standard voltage: V DF(T)=1.6V~6.0VPARAMETERSYMBOL RATINGS UNITS *1 9.0 Input Voltage*2 V IN 12.0 VOutput CurrentI OUT 50 mACMOS V SS -0.3 ~ V IN +0.3N-ch Open Drain Output *1V SS -0.3 ~ 9.0Output VoltageN-ch Open Drain Output *2V OUTV SS -0.3 ~ 12.0 VSSOT-24 150SOT-23 250SOT-25 250SOT-89 500TO-92 300USP-6B 100USP-6C 100 Power Dissipation USP-4 Pd 120 mWOperating Temperature Range Topr -40～+85 OC Storage Temperature Range Tstg -40～+125 OC ■BLOCK DIAGRAMS■ABSOLUTE MAXIMUM RATINGSTa = 25O C (1) CMOS Output(2) N-ch Open Drain Output9/19XC61CSeriesPARAMETER SYMBOLCONDITIONSMIN.TYP . MAX. UNITS CIRCUITSV DF(T)=0.8V~1.5V *1 V DF(T)=1.6V~6.0V *2V DF(T)x 0.98V DF(T)V DF(T) x 1.02 V 1 Detect Voltage V DFV DF(T)=2.6V~5.0V *2 V DF(T)x 0.99V DF(T)V DF(T)x 1.01 V 1 Hysteresis Range V HYS V DF x 0.02V DF x 0.05 V DFx 0.08V 1V IN = 1.5V - 0.7 2.3 V IN = 2.0V - 0.8 2.7V IN = 3.0V - 0.9 3.0V IN = 4.0V - 1.0 3.2 Supply Current I SS V IN = 5.0V - 1.1 3.6μA 2 Operating Voltage *1 V DF(T) = 0.8V to 1.5V 0.7 - 6.0Operating Voltage *2 V IN V DF(T) = 1.6V to 6.0V 0.7 - 10.0V 1V IN = 0.7V 0.100.80 -N-ch V DS = 0.5V V IN = 1.0V 0.85 2.70 -3Output Current *1 CMOS, P-ch V DS = 2.1VV IN = 6.0V - -7.5 -1.5 4 V IN = 1.0V 1.0 2.2 -V IN = 2.0V 3.0 7.7 -V IN = 3.0V 5.0 10.1 -V IN = 4.0V 6.0 11.5 -N-ch V DS = 0.5V V IN = 5.0V 7.0 13.0 - 3 Output Current *2I OUT CMOS, P-ch V DS = 2.1V V IN = 8.0V - -10.0 -2.0 mA 4CMOS - 10 -Leak Current I leakV IN =6.0V, V OUT =6.0V*1 V IN =10.0V, V OUT =10.0V*2N-ch Open Drain - 10 100nA 3 Temperature Characteristics ΔV DFΔTopr ･V DF -40℃ ≦ Topr ≦ 85℃ - ±100- ppm/℃ - Delay Time(V DR →V OUT inversion)tDLY Inverts from V DR to V OUT - 0.03 0.20 ms 5■ELECTRICAL CHARACTERISTICSV DF (T) = 0.8V to 6.0V ± 2% V DF (T) = 2.6V to 5.0V ± 1%NOTE:*1: Low Voltage: V DF(T)=0.8V~1.5V*2: Standard Voltage: V DF(T)=1.6V~6.0V V DF (T): Setting detect voltageRelease Voltage: V DR = V DF + V HYSTa=25℃10/19XC61C Series■OPERATIONAL EXPLANATION(Especially prepared for CMOS output products)① When input voltage (V IN ) rises above detect voltage (V DF ), output voltage (V OUT ) will be equal to V IN .(A condition of high impedance exists with N-ch open drain output configurations.)② When input voltage (V IN ) falls below detect voltage (V DF ), output voltage (V OUT ) will be equal to the ground voltage(V SS ) level.③ When input voltage (V IN ) falls to a level below that of the minimum operating voltage (V MIN ), output will becomeunstable. In this condition, V IN will equal the pulled-up output (should output be pulled-up.)④ When input voltage (V IN ) rises above the ground voltage (V SS ) level, output will be unstable at levels below theminimum operating voltage (V MIN ). Between the V MIN and detect release voltage (V DR ) levels, the ground voltage (V SS ) level will be maintained.⑤ When input voltage (V IN ) rises above detect release voltage (V DR ), output voltage (V OUT ) will be equal to V IN .(A condition of high impedance exists with N-ch open drain output configurations.) ⑥ The difference between V DR and V DF represents the hysteresis range.●Timing Chart11/19■NOTES ON USE1. Please use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanentdamage to the device.2. When a resistor is connected between the V IN pin and the input with CMOS output configurations, oscillation may occuras a result of voltage drops at R IN if load current (I OUT ) exists. (refer to the Oscillation Description (1) below)3. When a resistor is connected between the V IN pin and the input with CMOS output configurations, irrespective of N-choutput configurations, oscillation may occur as a result of through current at the time of voltage release even if load current (I OUT ) does not exist. (refer to the Oscillation Description (2) below )4. With a resistor connected between the V IN pin and the input, detect and release voltage will rise as a result of the IC'ssupply current flowing through the V IN pin.5. In order to stabilize the IC's operations, please ensure that V IN pin's input frequency's rise and fall times are more thanseveral µ sec / V.6. Please use N-ch open drains configuration, when a resistor R IN is connected between the V IN pin and power source.In such cases, please ensure that R IN is less than 10k Ω and that C is more than 0.1µF.●Oscillation Description(1) Output current oscillation with the CMOS output configurationWhen the voltage applied at IN rises, release operations commence and the detector's output voltage increases. Load current (I OUT ) will flow at R L . Because a voltage drop (R IN x I OUT ) is produced at the R IN resistor, located between the input (IN) and the V IN pin, the load current will flow via the IC's V IN pin. The voltage drop will also lead to a fall in the voltage level at the V IN pin. When the V IN pin voltage level falls below the detect voltage level, detect operations will commence. Following detect operations, load current flow will cease and since voltage drop at R IN will disappear, the voltage level at the V IN pin will rise and release operations will begin over again.Oscillation may occur with this " release - detect - release " repetition.Further, this condition will also appear via means of a similar mechanism during detect operations.(2) Oscillation as a result of through currentSince the XC61C series are CMOS IC S , through current will flow when the IC's internal circuit switching operates (during release and detect operations). Consequently, oscillation is liable to occur as a result of drops in voltage at the throughcurrent's resistor (R IN ) during release voltage operations. (refer to Figure 3) Since hysteresis exists during detect operations, oscillation is unlikely to occur.100kΩ* 12/1913/19■TYPICAL PERFORMANCE CHARACTERISTICS●Low Voltage14/19■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)●Low Voltage (Continued)(4) N-ch Driver Output Current vs. V DS0.20.40.60.8 1.0V DS (V)00.20.40.60.8 1.0V DS (V)0.20.40.60.8 1.0V DS (V)000.20.40.60.8 1.0 1.2 1.4V DS (V)ＸＣ６１ＣＣ０９０２(０.９Ｖ)O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )ＸＣ６１ＣＣ１１０２(１.１Ｖ)ＸＣ６１ＣＣ１５０２(１.５Ｖ)ＸＣ６１ＣＣ１５０２(１.５Ｖ)(5) N-ch Driver Output Current vs. InputVoltage0.51.01.52.02.51.02.03.04.05.0246810ＸＣ６１ＣＣ０９０２(０.９Ｖ)ＸＣ６１ＣＣ１１０２(１.１Ｖ)ＸＣ６１ＣＣ１５０２(１.５Ｖ)O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )Input Voltage:V IN (V)Input Voltage: V IN (V)Input Voltage: V IN (V)(6) P-ch Driver Output Current vs. Input Voltage 02468012345602468101201234560246810120123456ＸＣ６１ＣＣ０９０２(０.９Ｖ)ＸＣ６１ＣＣ１１０２ (１.１Ｖ)Input Voltage:V IN (V)Input Voltage:V IN (V)Input Voltage:V IN (V)O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )ＸＣ６１ＣＣ１５０２(１.５Ｖ)000.20.40.60.81.0V DS (V)O u t p u t C u r r e n t : I O U T (m A )ＸＣ６１ＣＣ１１０２(１.１Ｖ)15/19■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)●Standard Voltage00.51.01.52.02.53.03.500.51.01.52.02.53.03.500.51.01.52.02.53.03.52468100.51.01.52.02.53.03.50246810ＸＣ６１ＣＣ１８０２(１.８Ｖ）ＸＣ６１ＣＣ２７０２(２.７Ｖ)ＸＣ６１ＣＣ３６０２(３.６Ｖ)ＸＣ６１ＣＣ４５０２(４.５Ｖ)Input Voltage: V IN (V)Input Voltage: V IN (V)S u p p l y C u r r e n t : I S S (μA )S u p p l y C u r r e n t : I S S (μA )Input Voltage: V IN (V)Input Voltage: V IN (V)S u p p l y C u r r e n t : I S S (μA )S u p p l y C u r r e n t : I S S (μA )(2) Detect, Release Voltage vs. Ambient Temperature-50-250255075100Ambient Temperature :Ta (℃)-50-250255075100Ambient Temperature :Ta (℃)-50-250255075100Ambient Temperature :Ta (℃)4.44.54.64.7-50-250255075100Ambient Temperature :Ta (℃)ＸＣ６１ＣＣ１８０２(１.８Ｖ)ＸＣ６１ＣＣ２７０２(２.７Ｖ)ＸＣ６１ＣＣ４５０２(４.５Ｖ)ＸＣ６１ＣＣ３６０２(３.６Ｖ)D e t e c t ,R e l e a s e V o l t a g e :V D F ,V D R (V )D e t e c t ,R e l e a s e V o l t a g e :V D F ,V D R (V )D e t e c t ,R e l e a s e V o l t a g e :V D F ,V D R (V )D e t e c t ,R e l e a s e V o l t a g e :V D F ,V D R (V )(1) Supply Current vs. Input Voltage16/19■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)●Standard Voltage (Continued)(3) Output Voltage vs. Input VoltageNote : The N-channel open drain pull up resistance value is 100k Ω.012301231234012341234501234512012ＸＣ６１ＣＮ１８０２（１.８V)ＸＣ６１ＣＮ２７０２（２.７Ｖ)Input Voltage: V IN (V)Input Voltage: V IN (V)O u t p u t V o l t a g e : V O U T (V )O u t p u t V o l t a g e : V O U T (V )O u t p u t V o l t a g e : V O U T (V )O u t p u t V o l t a g e : V O U T (V )ＸＣ６１ＣＮ４５０２(４.５V)ＸＣ６１ＣＮ３６０２(３.６V)Input Voltage: V IN (V)Input Voltage: V IN (V)(4) N-ch Driver Output Current vs. V DS24681000.5 1.0 1.5 2.0V DS (V)00.51.01.52.02.53.0V DS (V)0102030400.51.01.52.02.53.0V DS (V)ＸＣ６１ＣＣ１８０２(１.８Ｖ)ＸＣ６１ＣＣ２７０２(２.７V)ＸＣ６１ＣＣ３６０２(３.６Ｖ)O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )Note : The N-channel open drain pull up resistance value is 100k Ω.17/19■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)●Standard Voltage (Continued)(4) N-ch Driver Output Current vs. V DS200400600800100000.20.40.60.8 1.0V DS (V)200400600800100000.20.40.60.8 1.0V DS(V)200400600800100000.20.40.60.8 1.0V DS(V)200400600800100000.20.40.60.8 1.0V DS (V)O u t p u t C u r r e n t : I O U T (μA )O u t p u t C u r r e n t : I O U T (μA )O u t p u t C u r r e n t : I O U T (μA )O u t p u t C u r r e n t : I O U T (μA )ＸＣ６１ＣＣ１８０２(１.８V)ＸＣ６１ＣＣ２７０２（２.７V)ＸＣ６１ＣＣ３６０２(３.６V)ＸＣ６１ＣＣ４５０２(４.５V)(5) N-ch Driver Output Current vs. Input Voltage510155101520255101520253010203040ＸＣ６１ＣＣ１８０２(１.８V)ＸＣ６１ＣＣ２７０２(２.７V)O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t :I O U T (m A )O u t p u t C u r r e n t :I O U T (m A )Input Voltage: V IN (V)ＸＣ６１ＣＣ３６０２(３.６V)ＸＣ６１ＣＣ４５０２(４.５V)18/19■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)●Standard Voltage (Continued)(6) P-ch Driver Output Current vs. Input Voltage051015051015246810051015246810051015246810ＸＣ６１ＣＣ１８０２(１.８V)ＸＣ６１ＣＣ２７０２(２.７V)ＸＣ６１ＣＣ４５０２(４.５V)Input Voltage:V IN (V)Input Voltage: V IN (V)Input Voltage: V IN (V)O u t p u t C u r r e n t :I O U T (m A )O u t p u t C u r r e n t :I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )O u t p u t C u r r e n t : I O U T (m A )19/19。
MC14106B中文资料
MC14106B 中文资料目录元件的最大额定值 (1)MC14106B功能介绍 (1)电气特性 (3)芯片转换特性 (4)芯片应用举例 (4)应用1 按键防抖 (4)应用2 积分电路 (5)MC14106B封装信息 (6)PDIP-14封装 (6)SOIC-14封装 (7)TSSOP-14封装 (8)元件的最大额定值条件之上进行功能操作。
长期暴露在高于推荐工作条件的环境下可能会影响器件的可靠性。
表中的电压值均为对地电压。
MC14106B功能介绍MC14106B共14个引脚，其中14号引脚为VDD（+），7号引脚为VSS （-），其余引脚为输入输出引脚，1,3,5,9,11,13号引脚为输入引脚，2,4,6,8,10,12号引脚为输出引脚。
内部逻辑如图1如所示，从图1中我们可以看出，MC14106B内部共有6组相同功能施密特触发器，每组施密特触发器的逻辑如图2所示。
图1图2下面通过图3所示施密特触发器讲解其工作过程。
其工作时序如图4所示。
当输入端输入低电平（VSS）时，输出端输出高电平（V OH）。
当输入端电平变为高电平（VDD）时，输出端电平经过一小段时间后也会发生变化，变为低电平（V OL）。
当输入端电平由VDD变为VSS后，一小段时间后，输出端电平变为高电平（V OH）。
施密特触发器最重要的是以下几个参数：从输入端电平由低到高变化到50%时，至输出端电平由高到低变化变化至50%时的时间记做t PHL；从输入端电平由高到低变化到50%时，至输出端电平由低到高变化变化至50%时的时间记做t PLH。
当输出端产生下调沿时，电平从90%变化至10%所用的时间t f；当输出端产生上跳沿时，电平从10%变化至90%所用的时间t r。
这些参数主要与VDD有关，可以通过下面提供的电气特性表格查出典型值。
图3图4通过图5进一步讲解施密特触发器的工作流程。
当输入端的电平达到V T+之后，输出端电平才会发生负跳变，当输入端平超过V T+之后，即使略低于该值，输出端不会发生负跳变，直到当输入端电平低于V T-，输出端才会发生正跳变。
拷贝学习型遥控说明书
拷贝学习型遥控阐明书技术阐明:本对拷型(也叫自拷型, 自学习型, 万能型)遥控器使一般买家增配遥控器变得非常简朴, 不需要过多旳专业知识, 不用对遥控器进行编码设置, 轻松几步就能迅速复制品种繁多旳同频率旳固定码遥控器, 也可将二个或多种芯片兼容, 频率一致遥控器旳部分功能合并在一种遥控器上使用, 可拷贝市面上绝大多数旳无线遥控器(家用防盗遥控器、汽车后加装旳防盗遥控器、摩托车防盗遥控器、电动车防盗遥控器、卷闸门遥控器、车库门遥控器、电动门遥控器等等), 不适合汽车原装遥控和双向遥控器, 不适合滚动码遥控器。
可拷贝旳芯片型号有:PT2260、PT2262.PT2264.PT2240、SC2260、SC2262.CS5211.HX2260、HX2262.HS2262.EV1527、HS1527、HX1527、SMC918、AX5026.SMC926等, 不一样厂家旳芯片型号前缀也许不一样, 只需对数字部份。
发射频率有采用声表稳频旳315M、433M和可调频率(范围250~450MHZ)。
其中315M、433M旳采用声表稳频, 频率是固定旳, 因此性能很稳定;可调频率合用于多种频率, 在频率不确定或非原则频率旳时候选用, 请按需选择如下图片为常用遥控器旳频率与芯片位置, 可供各位参照:有关参数:1.工作电压:DC12V(27A电池一粒)2.工作电流:?8mA3.工作频率:315MHz4.调制方式:ASK(调幅)5.发射功率:?100mW6.发射距离:50,100m(空旷地)7、编码类型:自拷贝8、工作温度:-10?,+50?9、用途:遥控电动门、窗、开关、安防等遥控领域使用环节与措施:1.清空---2.对码---3.使用清空 (数量不超过10个时发货前已清空, 请直接进入下一步)同步按下并长按第一种键和第四个键旳两个键, 按下旳瞬间灯会闪一下, 转为灭, 再转为快闪时松开成功清空后, 按下按键旳瞬间会闪一下, 按住按键时灯灭对码左手按住原遥控器要被学习旳按键不放, 右手旳对拷遥控器紧靠原遥控器, 按下准备学习旳按键。
JCB Access电动剪刀快速入门指南说明书
Quick Start Guide JCB AccessElectric Scissors1Operation Transporting the MachineAX – X axis distance Y – Y axis distanceourmeterlatform Raise / Lower Toggle Switchmergency Stopround Controls / Off / Platform Controls Key Switch Please see operator manual for full details./ R Steeringrigger Switch to enable operation attery Level / Fault Code Display latform / Drive Mode Buttonspeed Selectmergency Stoprake Release Lockrake Release PumpHow to Release BrakesEnsure machine can be controlled before releasing brakesPush in brake release lockPump brake release until feels solidCaution – machine is now un-brakedTo reapply pull the brake release lock back out or operate any control on the joystick4Switch Key Left Toggle SwitchTurn the key switch left to enable the ground controls. Use the toggle switch to raise or lower the platform as required.Note: If the platform raise/lower fails to operate, ensure the key switch is in the correct position and all of the emergency stops have been pulled to release.457Trigger & JoystickCradle Release Mode SelectOperate Machine Pull the trigger on the back of the joystick to enable operation.The cradle can be released from the platform by removing the bolt.If CH is shown on the platform controller, the key switch is in the wrong position. The switch must be on platform controls to use them. The machine will Choose from either lift/lower or drive mode. Do not attempt to operate prior to charge status being shown.Pressure SensorsPothole Protection SwitchLimit SwitchesOnly use the original charger installed to the machine with the original batteries. Charge the battery in a well ventilated place. Use an appropriate grounded industrial power supply with correct AC (alternating current) input voltage to charge.If at any time a fault occurs when charging, three battery charge LEDs will blink at the same time. Refer to the operators handbook immediately.AC harge Point C harger Viewing WindowThe flashing LED indicates the charge level. When all three LEDs are solid, the machine is fully charged.Code Description Reaction Instructions 01System intialisation fault Disables all motion Restart the machine 02System communication fault Disables all motion Restart the machine 03Invalid option setting fault Disables all motion Restart the machine 04Load sensing data faultWarning only Contact the dealer 12Chassis up or down switch ON at power-up faultDisable chassis control Contact the dealer 18Pothole guard fault Check pothole protection 31Pressure sensor 1 fault 32Angle sensor fault 36Limp mode42Platform left turn switch ON atpower-up message 43Platform right turn switch on atpower-up message 46Platform joystick enable switch on atpower-up fault 47Platform joystick not in neutral at power-upDiagnostic codes are shown on both the platform controller and through a viewing window on the hydraulic tray door.JCB Sales Limited, Rocester, Staffordshire, United Kingdom ST14 5JP Tel:+441889590312Email:***************** Download the very latest information on this product range at: All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any other means, electronic, mechanical, photocopying or otherwise, without prior permission from JCB Sales. All references in this publication to operating weights, sizes, capacities and other performance measurements are provided for guidance only and may vary dependant upon the exact specification of the machine. They should not therefore be relied upon in relation to suitability for a particular application.Guidance and advice should always be sought from your JCB Dealer’. JCB reserves the right to change specifications without notice. Illustrations and specifications shown mayinclude optional equipment and accessories.9818/3000。
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Time and hours meters electromechanic
S u b j e c t t o m o d i fi c a t i o n i n t e c h n i c a n d d e s i g n . E r r o r s a n d o m i s s i o n s e x c e p t e d .008
B 148 for AC
Features
Time and hour counter –AC voltage
–7-digit number wheel counter –Measuring range 99999.99 h –Without reset
–Technical data - electrical ratings Voltage supply 24 VAC, 110 VAC,
220..240 VAC (50/60 Hz)Nominal frequency 50 / 60 Hz Power consumption 1 VA
Gear precision Synchronous to mains Approval
CE conform
B 148
Technical data - mechanical design Display
White numbers on black Number of digits 7-digits Digit height 4 mm Measuring range 99 999.99 h Reading accuracy AC: 1/100 h = 36 s Operating temperature -10...+50 °C Storing temperature -20...+70 °C
Relative humidity 80 % non-condensing Protection DIN EN 60529IP 20
Housing type Built-in housing
Surface mount housing E-connection Screw terminal connector Mounting
Clip frame Dimensions W x H x L 48 x 48 x 43 mm Cutout dimensions 45 x 45 mm Installation depth 33 mm Weight approx.60 g
Material
Housing: plastic
Hour counters with DIN dimensions Display 7-digits, VAC trigger
Baumer IVO hour counters are applied anywhere to make costs become evident, to observe maintenance intervals, to define warranty periods or to record operation hours.Description
Time and hours meters electromechanic
S u b j e c t t o m o d i fi c a t i o n i n t e c h n i c a n d d e s i g n . E r r o r s a n d o m i s s i o n s e x c e p t e d .008
B 148
Part number B 148.0
X
C
Voltage 524 VAC 8110 VAC
9220...240 VAC
Frequency C 50 Hz D 60 Hz
Model / front dimensions
01Built-in mounting 45 x 45 mm, screw terminals
48 x 48 mm
02Built-in mounting ø50 mm, screw terminals
55 x 55 mm
07Surface mount, snap-on base for DIN rail
EN 50022
Hour counters with DIN dimensions
Display 7-digits, VAC trigger
Dimensions Built-in counter
For surface mount, snap-in base with terminal cover
max. 10 mm
50
45733
48
For surface mount, snap-in base w/o terminal cover
For surface mount, snap-in base (EN 50022)。