SMK1260F规格书

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18 G3VM-62C1 F1 MOS FET 开关电路器件说明书

G3VM-62C1/F1 MOS FET RelaysAnalog-switching MOS FET Relays forHigh Switching Currents, with DielectricStrength of 2.5 kVAC between I/O.•New 2-channel model included in the 60-V load voltageseries.•Switches minute analog signals.•Dielectric strength of 2,500 Vrms between I/O.•Surface-mounting models included in series.RoHS compliant!■Application Examples•Measurement devices•Security systemsNote:The actual product is marked differently from the imageshown here.■List of Models■DimensionsNote:All units are in millimeters unless otherwise indicated.■■PCB Dimensions (Bottom View)Contact form Terminals Load voltage (peak value)Model Number per stick Number per tape DPST-NO PCB terminals60 VAC G3VM-62C150---Surface-mountingterminalsG3VM-62F1G3VM-62F1(TR)---1,500G3VM-62C1G3VM-62F1Note:ly from the imageshown here.Note:The actual productis marked different-ly from the imageshown here.G3VM-62C1G3VM-62C1G3VM-62C1/F1G3VM-62C1/F1■Absolute Maximum Ratings (Ta = 25°C)■Electrical Characteristics (Ta = 25°C)■Recommended Operating ConditionsUse the G3VM under the following conditions so that the Relay will operate properly.■Engineering DataLoad Current vs. Ambient TemperatureG3VM-62C1(F1)■Safety PrecautionsRefer to “Common Precautions” for all G3VM models.ItemSymbol Rating Unit Measurement ConditionsInputLED forward currentI F 50mARepetitive peak LED forward currentI FP 1A 100 µs pulses, 100 pps LED forward current reduction rate∆ I F /°C −0.5mA/°C Ta ≥ 25°CLED reverse voltageV R 5V Connection temperatureT j 125°C OutputOutput dielectric strength V OFF 60V Continuous load current I O 500mA ON current reduction rate ∆ I ON /°C −5.0mA/°C Ta ≥ 25°CConnection temperatureT j 125°C Dielectric strength between input and output (See note 1.)V I-O 2,500Vrms AC for 1 minOperating temperature T a −40 to +85°C With no icing or condensation Storage temperature T stg −55 to +125°CWith no icing or condensation Soldering temperature (10 s)---260°C10 s Note:1.The dielectric strength between the input andoutput was checked by applying voltage be-tween all pins as a group on the LED side and all pins as a group on the light-receiving side.ItemSymbol Mini-mum Typical Maxi-mum UnitMeasurement conditions InputLED forward voltage V F 1.0 1.15 1.3V I F = 10 mA Reverse currentI R ------10µA V R = 5 V Capacity between terminals C T ---30---pF V = 0, f = 1 MHz Trigger LED forward currentI FT --- 1.63mA I O = 500 mA OutputMaximum resistance with output ON R ON --- 1.0 2.0ΩI F = 5 mA, I O = 500 mA Current leakage when the relay is openI LEAK ------ 1.0µA V OFF = 60 V Capacity between I/O terminals C I-O ---0.8---pF f = 1 MHz, Vs = 0 V Insulation resistance R I-O 1,000------M ΩV I-O = 500 VDC, RoH ≤ 60%Turn-ON time tON ---0.8 2.0ms I F = 5 mA, R L = 200 Ω, V DD = 20 V (See note 2.)Turn-OFF timetOFF---0.10.5ms Note:2.Turn-ON and Turn-OFFTimesItemSymbol MinimumTypicalMaximumUnitOutput dielectric strength V DD------48V Operating LED forward current I F 57.525mA Continuous load current I O ------500mA Operating temperatureT a− 20 ---65°CCommon Precautions!WARNINGBe sure to turn OFF the power when wiring the Relay, other-wise an electric shock may be received.!WARNINGDo not touch the charged terminals of the SSR, otherwise an electric shock may be received.!CautionDo not apply overvoltage or overcurrent to the I/O circuits of the SSR, otherwise the SSR may malfunction or burn.!CautionBe sure to wire and solder the Relay under the proper soldering conditions, otherwise the Relay in operation may generate ex-cessive heat and the Relay may burn.Typical Relay Driving Circuit ExamplesUse the following formula to obtain the LED current limiting resis-tance value to assure that the relay operates accurately.Use the following formula to obtain the LED forward voltage value to assure that the relay releases accurately.Protection from Surge Voltage on the Input TerminalsIf any reversed surge voltage is imposed on the input terminals, insert a diode in parallel to the input terminals as shown in the fol-lowing circuit diagram and do not impose a reversed voltage value of 3V or more.Surge Voltage Protection Circuit ExampleProtection from Spike Voltage on the Output TerminalsIf a spike voltage exceeding the absolute maximum rated value isgenerated between the output terminals, insert a C-R snubber or clamping diode in parallel to the load as shown in the following circuit diagram to limit the spike voltage.Spike Voltage Protection Circuit ExampleUnused Terminals (6-pin models only)Terminal 3 is connected to the internal circuit. Do not connect anything to terminal 3 externally.Pin Strength for Automatic Mountingn order to maintain the characteristics of the relay, the force imposed on any pin of the relay for automatic mounting must not exceed the following.In direction A: 1.96 NIn direction B: 1.96 NLoadTransistor10 to 100 kΩLoadR1 =V CC− V OL− V F (ON) 5 to 20 mAV F (OFF) = V CC− V OH < 0.8 VLoad ConnectionDo not short-circuit the input and output terminals while the relay is operating or the relay may malfunction.Solder MountingPerform solder mounting under the following recommended con-ditions to prevent the temperature of the Relays from rising.<Flow Soldering>Through-hole Mounting (Once Only)Note:We recommend that the suitability of solder mounting be verified under actual conditions.<Reflow Soldering>Surface Mounting DIP or SOP Packages (Twice Max.) Surface Mounting SSOP Packages (Twice Max.)Note: 1.We recommend that the suitability of solder mounting be verified under actual conditions.2.Tape cut SSOPs are packaged without humidity resis-tance. Use manual soldering to mount them.Manual Soldering (Once Only)Manually solder at 350°C for 3 s or less or at 260°C for 10 s or less.SSOP Handling Precautions<Humidity-resistant Packaging>Component packages can crack if surface-mounted components that have absorbed moisture are subjected to thermal stress when mounting. To prevent this, observe the following precau-tions.1.Unopened components can be stored in the packaging at 5to 30°C and a humidity of 90% max., but they should be used within 12 months.2.After the packaging has been opened, components can bestored at 5 to 30°C and a humidity of 60% max., but they should be mounted within 168 hours.3.If, after opening the packaging, the humidity indicator turnspink to the 30% mark or the expiration data is exceeded, bake the components while they are still on the taping reel, and use them within 72 hours. Do not bake the same com-ponents more than once.Baking conditions: 60±5°C, 64 to 72 hExpiration date: 12 months from the seal date(given on the label)4. f the same components are baked repeatedly, the tapedetachment strength will change, causing problems when mounting. When mounting using dehumidifying measures, always take countermeasures against component damage from static electricity.5.Do not throw or drop components. If the laminated packag-ing material is damaged, airtightness will be lost.6.Tape cut SSOPs are packaged without humidity resistance.Use manual soldering to mount them.AC ConnectionDC Single Connection DC Parallel Connection LoadLoadLoadLoadSolder type Preheating SolderingLead solderSnPb150°C60 to 120 s230 to 260°C10 s max.Lead-free solderSnAgCu150°C60 to 120 s245 to 260°C10 s max.Solder type Preheating SolderingLead solderSnPb140→160°C60 to 120 s210°C30 s max.Peak240°C max.Lead-free solderSnAgCu180→190°C60 to 120 s230°C30 to 50 sPeak260°C max.Solder type Preheating SolderingLead solderSnPb140→160°C60 to 120 s210°C30 s max.Peak240°C max.Lead-free solderSnAgCu150→180°C120 s max.230°C30 s max.Peak250°C max.。

摩克12英寸无风扇面板计算机产品说明书

MPC-2120Series12-inch industrial fanless panel computers with Zone2certificationsFeatures and Benefits•12-inch panel computer•Intel Atom®processor:E38451.91GHz or E38261.46GHz•-40to70°C wide-temperature design,no fan or heater•1000-nit sunlight-readable LCD•Class1Division2,ATEX Zone2,and IECEx certified•Wide-range10to36VDC power input•DNV certified for marine applicationsCertificationsIntroductionThe MPC-212012-inch panel computers with E3800Series Intel Atom®processor deliver a reliable,durable,and versatile platform for use in industrial environments.With two software selectable RS-232/422/485serial ports and two Gigabit Ethernet ports,the MPC-2120panel computers support a wide variety of serial interfaces as well as high-speed IT communications,all with native network redundancy.The MPC-2120Series panel computers are designed with a wide,-40to70°C temperature range,and come with a fanless,streamlined enclosure designed for highly efficient heat dissipation,making this one of the most reliable industrial platforms available for harsh,hot,outdoor environments like oil and gas fields and drilling platforms.The MPC-2120also features a1000-nit LCD panel offering a sunlight-readable, projected-capacitive,multi-touch screen,providing an excellent user experience for outdoor applications.AppearanceSpecificationsComputerCPU MPC-2120-E2-T:Intel Atom®Processor E3826(1M Cache,1.46GHz)MPC-2120-E4-T:Intel Atom®Processor E3845(2M Cache,1.91GHz)Graphics Controller Intel®HD GraphicsSystem Memory Pre-installed4GB DDR3LSystem Memory Slot SODIMM DDR3/DDR3L slot x1Pre-installed OS MPC-2120-E2-T-W7E/MPC-2120-E4-T-W7E/MPC-2120-E2-T-LB-W7E/MPC-2120-E4-LB-T-W7E:Windows Embedded Standard7(WS7P)64-bitSupported OS Windows10Pro64-bitWindows10Embedded IoT Ent2016LTSB Entry64-bitWindows7Pro for Embedded SystemsWindows Embedded Standard7(WS7P)64-bitLinux Debian9Storage Slot CFast slot x1SD slots x1,SD3.0(SDHC/SDXC)socketStorage Pre-installed MPC-2120-E2-T-W7E/MPC-2120-E4-T-W7E/MPC-2120-E2-LB-T-W7E/MPC-2120-E4-LB-T-W7E:32GB CFast CardComputer InterfaceEthernet Ports Auto-sensing10/100/1000Mbps ports(RJ45connector)x2Serial Ports RS-232/422/485ports x2,software selectable(DB9male)USB2.0USB2.0hosts x2,type-A connectorsDigital Input DIs x4Digital Output DOs x4LED IndicatorsSystem Power x1LAN2per port(10/100/1000Mbps)DisplayLight Intensity(Brightness)MPC-2120-E2-T:1000cd/m2MPC-2120-E4-T:1000cd/m2MPC-2120-E2-T-W7E:1000cd/m2MPC-2120-E4-T-W7E:1000cd/m2MPC-2120-E2-LB-T:500cd/m2MPC-2120-E2-LB-T-W7E:500cd/m2MPC-2120-E4-LB-T:500cd/m2MPC-2120-E4-LB-T-W7E:500cd/m2Active Display Area245.76(H)x184.32(V)mmAspect Ratio4:3Contrast Ratio700:1Max.No.of Colors16.2M(8-bit/color)Panel Size12-inch viewable imagePanel Type TNPixel Pitch(RGB)0.240(H)x0.240(V)mmPixels1024x768Response Time5ms(gray to gray)Viewing Angles160°/140°Touch FunctionTouch Type Capacitive Touch(PCAP)Touch Support Points4pointsGlove Support YesSerial InterfaceBaudrate50bps to115.2kbpsData Bits5,6,7,8Flow Control RTS/CTS,XON/XOFF,ADDC®(automatic data direction control)for RS-485,RTSToggle(RS-232only)Parity None,Even,Odd,Space,MarkStop Bits1,1.5,2Serial SignalsRS-232TxD,RxD,RTS,CTS,DTR,DSR,DCD,GNDRS-422Tx+,Tx-,Rx+,Rx-,GNDRS-485-2w Data+,Data-,GNDRS-485-4w Tx+,Tx-,Rx+,Rx-,GNDPower ParametersInput Voltage10to36VDCPower Consumption40W(max.)Physical CharacteristicsHousing MetalIP Rating IP66,frontIP20,rearDimensions306x245x64mm(12x9.6x2.5in)Weight2,640g(5.82lb)Environmental LimitsOperating Temperature-40to70°C(-40to158°F)Storage Temperature(package included)-40to70°C(-40to158°F)Ambient Relative Humidity5to95%(non-condensing)Standards and CertificationsEMC EN55032/24EMI CISPR32,FCC Part15B Class AEMS IEC61000-4-2ESD:Contact:4kV;Air:8kVIEC61000-4-3RS:80MHz to1GHz:10V/mIEC61000-4-4EFT:Power:1kV;Signal:0.5kVIEC61000-4-5Surge:Power:2kV;Signal:1kVIEC61000-4-6CS:10VIEC61000-4-8PFMFEnvironmental Testing IEC60068-2-1,DNV-CG-0339IEC60068-2-2,DNV-CG-0339IEC60068-2-2,IEC60945IEC60068-2-30,IEC60945Hazardous Locations ATEXClass I Division2IECExMaritime DNVMechanical Protection Rating IEC60529,IP codeSafety EN60950-1IEC60950-1UL60950-1Shock IEC60068-2-27Vibration IEC60068-2-6IEC60068-2-6,IEC60945IEC60068-2-64,DNV-CG-0339DeclarationGreen Product RoHS,CRoHS,WEEEWarrantyWarranty Period LCD:1yearSystem:3yearsDetails See /warrantyPackage ContentsDevice1x MPC-2120Series computerInstallation Kit8x screw,for panel-mounting1x terminal block,2-pin(for DC power input)1x terminal block,10-pin(for DIO)1x terminal block,2-pinfor remote power switchDocumentation1x quick installation guide1x warranty cardDimensionsOrdering InformationMPC-2120-E2-T 12"(4:3)1,000nitsIntelAtom®E38264GB–Capacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E2-LB-T 12"(4:3)500nitsIntelAtom®E38264GB–Capacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E4-T 12"(4:3)1,000nitsIntelAtom®E38454GB–Capacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E4-LB-T 12"(4:3)500nitsIntelAtom®E38454GB–Capacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E2-T-W7E 12"(4:3)1,000nitsIntelAtom®E38264GBW7E32GB CFastCapacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E2-LB-T-W7E 12"(4:3)500nitsIntelAtom®E38264GBW7E32GB CFastCapacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E4-T-W7E 12"(4:3)1,000nitsIntelAtom®E38454GBW7E32GB CFastCapacitive224/412/24VDCIP66(front),IP20(rear)-40to70°CMPC-2120-E4-LB-T-W7E 12"(4:3)500nitsIntelAtom®E38454GBW7E32GB CFastCapacitive224/412/24VDCIP66(front),IP20(rear)-40to70°C©Moxa Inc.All rights reserved.Updated Jul07,2023.This document and any portion thereof may not be reproduced or used in any manner whatsoever without the express written permission of Moxa Inc.Product specifications subject to change without notice.Visit our website for the most up-to-date product information.。

2 KEYS电容式触摸按键规格书说明书

TTY6753 2 KEYS 电容式触摸按键规格书 Ver1.0●产品描述 (2)●产品特色 (2)●产品应用 (2)●封装脚位图 (3)●脚位定义 (4)●AC／DC Characteristics (5)1Absolute maximum ratings (5)2 D.C. Characteristics (5)3 A.C. Characteristics (5)●输出指示 (6)●注意事项： (7)●应用线路图 (8)●封装说明 (9)●订购信息 (9)●修订记录 (9)●产品描述提供2个触摸感应按键，一对一直接输出，提供低功耗模式，可使用于电池应用的产品。

对于防水和抗干扰方面有很优异的表现。

●产品特色工作电压范围：2.7V - 5.5V工作电流： 1.8mA (正常模式)；10 uA (休眠模式) @3.3V2个触摸感应按键持续无按键4秒(根据不同产品应用可由FuncEdit修改参数)，进入休眠模式提供一对一的直接输出，未按键为高电平输出可以经由调整CAP脚的外接电容，调整灵敏度，电容越大灵敏度越高具有防水及水漫成片水珠覆盖在触摸按键面板，按键仍可有效判别●产品应用各种大小家电、娱乐产品。

封装脚位图●脚位定义接脚类型●I COMS输入●O COMS输出●P 电源AC ／DC Characteristics2 D.C. Characteristics（Condition : Ta= 25 ± 3 ℃，RH ≦ 65 %，VDD =＋ 5V ，VSS=0V ）3 A.C. CharacteristicsParameterSymbol Test ConditionsMin Typ Max Unit Operating voltage VDD 2.7 5 5.5 V Operating current I OPR1 VDD=5V- 3 - mA Input low voltage for input and I/O portV IL1 0 - 0.3VDD V Input high voltage for input and I/O portV IH10.7VDD- VDD V Output port source current I OH1 V OH =0.9VDD, @5V - 4 - mA Output port sink currentI OL1V OL =0.1VDD, @5V-8-mAParameterSymbol Test Conditions Min Typ Max Unit System clock f SYS1 OSC @5v- 4 - MHz Low Voltage ResetV lvr2.02.22.4V输出指示一提供2 keys 电容触摸按键，输出是采用一对一直接输出。

Kinetis全系列选型手册-14

SPI
I2C
I2S
CA
线
口接口 T
N
USB QTG(1)
2 41
2 51
2 51
2 41
2 51
2 51
18/16/2
3 5211
20/16/4
4 5211
32/32/6
5 6211
18/16/2
3 5211
20/16/4
4 5211
21/16/5
5 6211
32/32/6
5 6211
18/16/2
4 521
FS
5 6 3 1 1 FS
6 6 3 1 1 FS
32/32/6 8位 32/32/6 8位 32/32/6 8位
6 6 3 1 1 FS 5 6 3 1 1 FS 6 6 3 1 1 FS
32/32/6 8位
6 6 3 1 1 FS
以太网
定时器
模拟能
电机控带正 AD ADC ADC
22√
66
32/32/6
4 621
FS￠
2*8 2*2 2 4 38
22√
81
18/16/2
3 5 3 1 1 FS
2*8 2*2 2 2 22
13√
40(38)
20/16/2 4位
4 5 3 1 1 FS
2*8 2*2 2 3 27
13√
52(52)
21/16/5 4位
5 6 3 1 1 FS
2*8 2*2 2 5 33
USB QTG(1)
FS￠ FS￠ FS￠ FS￠ FS￠ FS￠ FS￠ FS￠
以太网
定时器
模拟能

SVF12N60T F S K 600V N沟道增强型场效应管说明书

版本号：2.2 共 10 页第 6 页
封装外形图
TO-263-2L
10.15±0.30
SVF12N60T/F/S/K 说明书
1.27±0.10
4.57±0.10
单位：毫米
15.25±0.25 8.70±0.20
TO-262-3L
5.28±0.20
1.27±0.10
1.5±0.20
2.54TYP 4.98～5.18
3. 基本上不受工作温度的影响。
典型值 ----
530 4.8
最大值 12 48 1.3 ---
单位
A V ns µC
典型特性曲线
杭州士兰微电子股份有限公司
http: //
版本号：2.2 共 10 页第 3 页
典型特性曲线（续）
SVF12N60T/F/S/K 说明书
版本号：2.2 共 10 页第 5 页
典型测试电路
SVF12N60T/F/S/K 说明书
栅极电荷量测试电路及波形图
与待测器件
VGS
参数一致
Qg
50KΩ
10V
VDS
12V
200nF
300nF
Qgs
Qgd
VGS
3mA
待测器件
电荷量
VDS VGS RG
10V
开关时间测试电路及波形图
RL VDD
待测器件
工作结温范围
贮存温度范围
符号 VDS VGS
ID IDM PD EAS TJ Tstg
SVF12N60T
225 1.8
参数范围
SVF12N60F SVF12N60S
600
±30
12
7.6

LNK364PN开关电源芯片应用方案-奥伟斯科技

●内容导航：LNK362PN/LNK362GN/LNK362DNLNK363PN/LNK363GN/LNK363DNLNK364PN/LNK364GN/LNK364DN●公司简介●LNK364PN产品规格书●产品图片●优势产品简介●公司简介深圳市奥伟斯科技有限公司是一家专注触摸芯片,单片机,电源管理芯片,语音芯片,场效应管,显示驱动芯片,网络接收芯片,运算放大器,红外线接收头及其它半导体产品的研发,代理销售推广的高新技术企业.奥伟斯科技自成立以来一直致力于新半导体产品在国内的推广与销售,年销售额超过壹亿人民币是一家具有综合竞争优势的专业电子元器件代理商.本公司代理推广的一系列优秀触摸芯片及语音芯片，现以大批量应用到智能电子锁、饮水机、电饭煲、LED 台灯等控制器为顾客提供最佳解决方案，受到广大客户的一致赞誉。

奥伟斯科技优势行业集中在家用电器和汽车电子领域，包括：智能电子锁、饮水机、抽烟机、空调、洗衣机、冰箱、洗碗机、电饭煲、电磁炉、微波炉、电动自行车、汽车仪表、汽车音响、汽车空调等。

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奥伟斯科技已为众多世界著名企业提供服务如：美的、小米、云米、长虹、创维、三星、LG、飞利浦、TCL、海尔、美菱、沁园、等众多中国一流品牌电家厂商奥伟斯科技提供专业的智能电子锁触摸解决方案,并提供电子锁整套的芯片配套:低功耗触摸芯片低功耗单片机马达驱动芯片显示驱动芯片刷卡芯片时针芯片存储芯片语音芯片低压MOS管 TVS二极管OWEIS触摸芯片 OWEIS接口芯片 OWEIS电源芯片 OWEIS语音芯片 OWEIS场效应管一.电容式触摸芯片ADSEMI触摸芯片代理芯邦科技触控芯片万代科技触摸按键芯片博晶微触摸控制芯片海栎创触摸感应芯片启攀微触摸IC 融和微触摸感应IC 合泰触摸按键IC 通泰触摸芯片二.汽车电子/电源管理/接口芯片/逻辑芯片:IKSEMICON一级代理 ILN2003ADT IK62783DT IL2596 IL2576 ILX485 ILX3485 ILX232 ILX3232 三.功率器件/接收头/光电开关:KODENSHI AUK SMK系列MOS管SMK0260F SMK0460F SMK0760F SMK1260F SMK1820F SMK18T50F四. LED显示驱动芯片:中微爱芯AIP系列 AIP1668 AIP1628 AIP1629 AIP1616天微电子TM系列 TM1628 TM1668 TM1621 五.电源管理芯片:Power Integrations LNK364PN LNK564PN 芯朋微PN8012 PN8015 AP5054 AP5056 力生美晶源微友达天钰电子FR9886 FR9888六.语音芯片:APLUS巨华电子AP23085 AP23170 AP23341 AP23682 AP89085 AP89170 AP89341 AP89341K AP89682七.运算放大器:3PEAK运算放大器聚洵运算放大器圣邦微运算放大器八.发光二极管:OSRAM欧司朗发光二极管 Lite-On光宝发光二极管 Everlight亿光发光二极管 Kingbright今台发光二极管九. CAN收发器:NXP恩智浦CAN收发器 Microchip微芯CAN收发器十.分销产品线:ONSEMI安森美 TI德州仪器 ADI TOSHIBA东芝 AVAGO安华高十一 MCU单片机ABOV现代单片机MC96F系列 Microchip微芯单片机PIC12F PIC16F PIC18F系列 FUJITSU富仕通单片机MB95F系列 STM单片机STM32F STM32L系列 CKS中科芯单片机CKS32F系列 TI单片机MSP430系列 TMS320F系列 NXP单片机LPC系列LNK362-364®Off-Line Switcher ICProduct HighlightsOptimized for Lowest System Cost•Proprietary IC trimming and transformer construction techniques enable Clampless™ designs with LNK362for lower system cost, component count and higherefficiency•Fully integrated auto-restart for short circuit and open loop protection•Self-biased supply – saves transformer auxiliary winding and associated bias supply components•Frequency jittering greatly reduces EMI•Meets HV creepage requirements between DRAIN and all other pins both on the PCB and at the package •Lowest component count switcher solutionFeatures Superior to Linear/RCC•Accurate hysteretic thermal shutdown protection –automatic recovery improves field reliability •Universal input range allows worldwide operation •Simple ON/OFF control, no loop compensation needed •Eliminates bias winding – simpler, lower cost transformer•Very low component count – higher reliability and single side printed circuit board•Auto-restart reduces delivered power by 95% during short circuit and open loop fault conditions•High bandwidth provides fast turn-on with no overshoot and excellent transient load responseEcoSmart®– Extremely Energy-Efficient•Easily meets all global energy efficiency regulations with no added components•No-load consumption <300 mW without bias winding at 265 VAC input (<50 mW with bias winding)•ON/OFF control provides constant efficiency to very light loads – ideal for mandatory CEC regulations Applications•Chargers/adapters for cell/cordless phones, PDAs, digital cameras, MP3/portable audio players, and shavers •Supplies for appliances, industrial systems, and metering DescriptionLinkSwitch-XT incorporates a 700 V p ower MOSFET, oscillator, simple O N/OFF c ontrol s cheme, a h igh-voltage s witched c urrent source, frequency jittering, cycle-by-cycle current limit and thermal shutdown circuitry onto a monolithic IC. The startup Figure 1. Typical Application with LinkSwitch-XT.Table 1. Output Power Table.Notes:1. Minimum continuous power in a typical non-ventilated enclosedadapter measured at 50 °C ambient.2. Minimum practical continuous power in an open frame designwith adequate heat sinking, measured at 50 °C ambient.3. Packages: P: DIP-8B, G: SMD-8B, D: SO-8C. Please see PartOrdering Information.4. See K ey A pplication C onsiderations s ection f or c omplete d escriptionof assumptions.and operating power are derived directly from the DRAIN pin, eliminating the need for a bias winding and associated circuitry.Figure 2. Functional Block Diagram.Pin Functional DescriptionDRAIN (D) Pin:Power MOSFET drain connection. Provides internal operatingcurrent for both startup and steady-state operation.BYPASS (BP) Pin:Connection point for a 0.1 μF external bypass capacitor for theinternally generated 5.8 V supply. If an external bias winding isused, the current into the BP pin must not exceed 1 mA.FEEDBACK (FB) Pin:During normal operation, switching of the power MOSFET iscontrolled by this pin. MOSFET switching is disabled when acurrent greater than 49 μA is delivered into this pin.Figure 3. Pin Configuration. SOURCE (S) Pin:This pin is the power MOSFET source connection. It is also theground reference for the BYPASS and FEEDBACK pins.LinkSwitch-XTFunctional DescriptionLinkSwitch-XT combines a high-voltage power MOSFET switch with a power supply controller in one device. Unlike conventional PWM (pulse width modulator) controllers, a simple ON/OFF control regulates the output voltage. The controller consists of an oscillator, feedback (sense and logic) circuit, 5.8 V regulator, BYPASS pin undervoltage circuit, over-temperature protection, frequency jittering, current limit circuit, and leading edge blanking integrated with a 700 V power MOSFET. The LinkSwitch-XT incorporates additional circuitry for auto-restart.OscillatorThe typical oscillator frequency is internally set to an average of 132 kHz. Two signals are generated from the oscillator: the maximum duty cycle signal (DC MAX ) and the clock signal that indicates the beginning of each cycle.The oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 9 kHz peak-to-peak, to minimize EMI emission. The modulation rate of the frequency jitter is set to 1.5 kHz to optimize EMI reduction for both average and quasi-peak emissions. The frequency jitter should be measured with the oscilloscope triggered at the falling edge of the DRAIN waveform. The waveform in Figure 4 illustrates the frequency jitter.Feedback Input CircuitThe feedback input circuit at the FB pin consists of a low impedance source follower output set at 1.65 V for LNK362 and 1.63 V for LNK363/364. When the current delivered into this pin exceeds 49 μA, a low logic level (disable) is generated at the output of the feedback circuit. This output is sampled at the beginning of each cycle on the rising edge of the clock signal. If high, the power MOSFET is turned on for that cycle (enabled), o therwise t he p ower M OSFET r emains o ff (disabled). Since the sampling is done only at the beginning of each cycle, subsequent changes in the FB pin voltage or current during the remainder of the cycle are ignored.5.8 V Regulator and6.3 V Shunt Voltage ClampThe 5.8 V regulator charges the bypass capacitor connected to the BYPASS pin to 5.8 V by drawing a current from the voltage on the DRAIN, whenever the MOSFET is off. The BYPASS pin is the internal supply voltage node. When the MOSFET is on, the LinkSwitch-XT r uns off of the e nergy stored in the b ypass capacitor. Extremely low power consumption of the internal circuitry allows the device to operate continuously from the current drawn from the DRAIN pin. A bypass capacitor value of 0.1 μF is sufficient for both high frequency decoupling and energy storage.In addition, there is a 6.3 V shunt regulator clamping the BYPASS pin at 6.3 V when current is provided to the BYPASS pin through an external resistor. This facilitates powering of the device externally through a bias winding to decrease the no-load consumption to less than 50 mW.BYPASS Pin UndervoltageThe BYPASS pin undervoltage circuitry disables the power MOSFET when the BYPASS pin voltage drops below 4.8 V. Once the BYPASS pin voltage drops below 4.8 V, it must rise back to 5.8 V to enable (turn-on) the power MOSFET.Over-Temperature ProtectionThe thermal shutdown circuitry senses the die temperature. The threshold is set at 142 ︒C typical with a 75 ︒C hysteresis. When the die temperature rises above this threshold (142 ︒C) the power MOSFET is disabled and remains disabled until the die temperature falls by 75 ︒C, at which point it is re-enabled.Current LimitThe current limit circuit senses the current in the power MOSFET. When this current exceeds the internal threshold (I LIMIT ), the power MOSFET is turned off for the remainder of that cycle. The leading edge blanking circuit inhibits the current limit comparator for a short time (t LEB ) after the power MOSFET is turned on. This leading edge blanking time has been set so that current spikes caused by capacitance and rectifier reverse recovery time will not cause premature termination of the switching pulse.Auto-RestartIn the event of a fault condition such as output overload, output short circuit, or an open loop condition, LinkSwitch-XT enters into auto-restart operation. An internal counter clocked by the oscillator gets reset every time the FB pin is pulled high. If the FB pin is not pulled high for approximately 40 ms, the power MOSFET switching is disabled for 800 ms. The auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is removed.600500400300200100510Time (μs)Figure 4. Frequency Jitter.P I -4047-110205Figure 5. 2 W Universal Input CV Adapter Using LNK362.Applications ExampleA 2 W CV AdapterThe schematic shown in Figure 5 is a typical implementation of a universal input, 6.2 V ±7%, 322 mA adapter using LNK362. This circuit makes use of the Clampless technique to eliminate the primary clamp components and reduce the cost and complexity of the circuit.The EcoSmart features built into the LinkSwitch-XT family allow this design to easily meet all current and proposed energy e fficiency s tandards, i ncluding t he m andatory C alifornia Energy Commission (CEC) requirement for average operating efficiency.The AC input is rectified by D1 to D4 and filtered by the bulk storage capacitors C1 and C2. Resistor RF1 is a flameproof, fusible, wire wound type and functions as a fuse, inrush current limiter and, together with the π filter formed by C1, C2, L1 and L2, differential mode noise attenuator. Resistor R1 damps ringing caused by L1 and L2.This simple input stage, together with the frequency jittering of LinkSwitch-XT, a low value Y1 capacitor and PI’s E-Shield™ windings within T1, allow the design to meet both conducted and radiated EMI limits with >10 dBμV margin. The low value of CY1 is important to meet the requirement for a very low touch current (the line frequency current that flows through CY1) often specified for adapters, in this case <10 μA.The rectified and filtered input voltage is applied to the primary winding of T1. The other side of the primary is driven by the integrated MOSFET in U1. No primary clamp is required as the low value and tight tolerance of the LNK362 internal current limit allows the transformer primary winding capacitance to provide adequate clamping of the leakage inductance drain voltage spike.The secondary of the flyback transformer T1 is rectified by D5, a low cost, fast recovery diode, and filtered by C4, a low ESR capacitor. The combined voltage drop across VR1, R2 and the LED of U2 determines the output voltage. When the output voltage exceeds this level, current will flow through the LED of U2. As the LED current increases, the current fed into the FEEDBACK pin of U1 increases until the turnoff threshold current (~49 μA) is reached, disabling further switching cycles of U1. At full load, almost all switching cycles will be enabled, and at very light loads, almost all the switching cycles will be disabled, giving a low effective frequency and providing high light load efficiency and low no-load consumption. Resistor R3 provides 1 mA through VR1 to bias the Zener closer to its test current. Resistor R2 allows the output voltage to be adjusted to compensate for designs where the value of the Zener may not be ideal, as they are only available in discrete voltage ratings. For higher output accuracy, the Zener may be replaced with a reference IC such as the TL431.O POOR The L inkSwitch-XT i s c ompletely s elf-powered f rom t he D RAIN 2. For designs where P O ≤ 2 W, a two-layer primary should be pin, requiring only a small ceramic capacitor C3 connected to the BYPASS pin. No auxiliary winding on the transformer is used to ensure adequate primary intra-winding capacitance in the range of 25 pF to 50 pF.required.3. For designs where 2 < P ≤ 2.5 W, a bias winding should beKey Application ConsiderationsLinkSwitch-XT Design ConsiderationsOutput Power TableThe data sheet maximum output p ower table (Table 1) represents the maximum practical continuous output power level that can be obtained under the following assumed conditions:1. The minimum DC input voltage is 90 V or higher for 85 VAC input, or 240 V or higher for 230 VAC input or 115 VAC with a voltage doubler. The value of the input capacitance should be large enough to meet these criteria for AC input designs.2. Secondary output of 6 V with a fast PN rectifier diode.3. Assumed efficiency of 70%.4. Voltage only output (no secondary-side constant current circuit).5. Discontinuous mode operation (K >1).6. A primary clamp (RCD or Zener) is used.7. The part is board mounted with SOURCE pins soldered to a sufficient area of copper to keep the SOURCE pin temperature at or below 100 °C. 8. Ambient temperature of 50 °C for open frame designs and an internal enclosure temperature of 60 °C for adapter designs.Below a value of 1, K P is the ratio of ripple to peak primary current. Above a value of 1, K P is the ratio of primary MOSFET OFF time to the secondary diode conduction time. Due to the flux density requirements described below, typically a LinkSwitch-XT design will be discontinuous, which also has the benefits of allowing lower cost fast (instead of ultra-fast) output diodes and reducing EMI.Clampless DesignsClampless designs rely solely on the drain node capacitance to limit the leakage inductance induced peak drain-to-source voltage. Therefore, the maximum AC input line voltage, the value of V OR , the leakage inductance energy, a function of leakage inductance and peak primary current, and the primary winding capacitance determine the peak drain voltage. With no significant dissipative element present, as is the case with an external clamp, the longer duration of the leakage inductance ringing can increase EMI.The following requirements are recommended for a universal input or 230 VAC only Clampless design:1. A Clampless design should only be used for P ≤2.5 W, using the LNK362†and a V ** ≤ 90 V. added to the transformer using a standard recovery rectifier diode to act as a clamp. This bias winding may also be used to externally power the device by connecting a resistor from the bias-winding capacitor to the BYPASS pin. This inhibits the internal high-voltage current source, reducing device dissipation and no-load consumption.4. For designs where P O > 2.5 W Clampless designs are not practical and an external RCD or Zener clamp should be used.5. Ensure that worst-case high line, peak drain voltage is below the BV DSS specification of the internal MOSFET and ideally ≤ 650 V to allow margin for design variation.†For 110 VAC only input designs it may be possible to extend the power range of Clampless designs to include the LNK363. However, the increased leakage ringing may degrade EMI performance.**V OR is the secondary output plus output diode forward voltage drop that is reflected to the primary via the turns ratio of the transformer during the diode conduction time. The V OR adds to the DC bus voltage and the leakage spike to determine the peak drain voltage.Audible NoiseThe cycle skipping mode of operation used in LinkSwitch-XT can generate audio frequency components in the transformer. To limit this audible noise generation, the transformer should be designed such that the peak core flux density is below 1500 Gauss (150 mT). Following this guideline and using the standard transformer production technique of dip varnishing practically eliminates audible noise. Vacuum impregnation of the transformer should not be used due to the high primary capacitance a nd i ncreased l osses t hat r esult. H igher f lux d ensities are possible, however careful evaluation of the audible noise performance should be made using production transformer samples before approving the design.Ceramic capacitors that use dielectrics, such as Z5U, when used in clamp circuits may also generate audio noise. If this is the case, try replacing them with a capacitor having a different dielectric or construction, for example a film type.LinkSwitch-XT Layout ConsiderationsSee Figure 6 for a recommended circuit board layout for LinkSwitch-XT (P & G package).Single Point GroundingUse a single point ground connection from the input filter capacitor to the area of copper connected to the SOURCE p ins.Figure 6. Recommended Printed Circuit Layout for LinkSwitch-XT using P Package in a Flyback Converter Configuration.Bypass Capacitor C BPThe BYPASS pin capacitor should be located as near as possible to the BYPASS and SOURCE pins.Primary Loop AreaThe area of the primary loop that connects the input filter capacitor, transformer primary and LinkSwitch-XT together should be kept as small as possible.Primary Clamp CircuitA clamp is used to limit peak voltage on the DRAIN pin at turn-off. This can be achieved by using an RCD clamp or a Zener (~200 V) and diode clamp across the primary winding. In all cases, to minimize EMI, care should be taken to minimize the circuit path from the clamp components to the transformer and LinkSwitch-XT .Thermal ConsiderationsThe copper area underneath the LinkSwitch-XT acts not only as a single point ground, but also as a heatsink. As this area is connected to the quiet source node, it should be maximized for good heat sinking of LinkSwitch-XT . The same applies to the cathode of the output diode.Y-CapacitorThe placement of the Y-type cap should be directly from the primary input filter capacitor positive terminal to the common/ return terminal of the transformer secondary. Such a placement will route high magnitude common-mode surge currents away from the LinkSwitch-XT device. Note that if an input pi (C, L, C) EMI filter is used, then the inductor in the filter should be placed between the negative terminals of the input filter capacitors.OptocouplerPlace the optocoupler physically close to the LinkSwitch-XT to minimize the primary-side trace lengths. Keep the high current, high-voltage drain and clamp traces away from the optocoupler to prevent noise pick up.Output DiodeFor best performance, the area of the loop connecting the secondary winding, the output diode and the output filterTL i n k S w i t c h -X TFigure 7. Recommended Printed Circuit Layout for LinkSwitch-XT using D Package in a Flyback Converter Configuration. capacitor should be minimized. In addition, sufficient copperarea should be provided at the anode and cathode terminalsof the diode for heat sinking. A larger area is preferred at thequiet cathode terminal. A large anode area can increase highfrequency radiated EMI.Quick Design ChecklistAs with any power supply design, all LinkSwitch-XT designsshould be verified on the bench to make sure that componentspecifications a re n ot e xceeded u nder w orst-case c onditions. T hefollowing minimum set of tests is strongly recommended:1.Maximum drain voltage – Verify that VDS does not exceed650 V at the highest input voltage and peak (overload) outputpower. The 50 V margin to the 700 V BVDSS specificationgives margin for design variation, especially in Clampless designs.2.Maximum d rain c urrent –At m aximum a mbient t emperature,maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformersaturation and excessive leading-edge current spikes at startup.Repeat under steady state conditions and verify that the leading- edge current spike event is below ILIMIT(MIN)at the end of the tLEB(MIN). Under all conditions, the maximum drain current should be below the specified absolute maximum r atings. 3.Thermal Check –At specified maximum output power,minimum i nput v oltage a nd maximum a mbient t emperature, verify that the temperature specifications are not exceeded for LinkSwitch-XT, transformer, output diode and output capacitors. Enough thermal margin should be allowed for part-to-part variation of the RDS(ON)of LinkSwitch-XT as specified in the data sheet. Under low line, maximum power,a maximum LinkSwitch-XT SOURCE pin temperature of105 °C is recommended to allow for these variations. Design ToolsUp-to-date information on design tools can be found at the Power Integrations web site: .TLinkSwitch-XTNotes:DRAIN Voltage ............................................................ V to 700 V Peak DRAIN Current: LNK362. .............. 200 mA (375 mA)(2)Notes:1.All voltages referenced to SOURCE, TA= 25 ︒C.LNK363/364. ....... 400 mA (750 mA)(2) FEEDBACK Voltage ....................................................... V to 9 V FEEDBACK Current ................................................... 100 mA BYPASS Voltage. ............................................................. V to 9 V Storage Temperature .....................................-65 ︒C to 150 ︒C Operating Junction Temperature(3) ................-40 ︒C to 150 ︒C Lead Temperature(4) ................................................................................................. 260 ︒C 2.The higher peak DRAIN current is allowed while theDRAIN voltage is simultaneously less than 400 V.3.Normally limited by internal circuitry.4.1/16 in. from case for 5 seconds.5.Maximum ratings specified may be applied, one at a time,without causing permanent damage to the product.Exposure to Absolute Maximum Rating conditions forextended periods of time may affect product reliability.NOTES:A. Total current consumption is the sum of IS1 and IDSSwhen FEEDBACK pin voltage is ≥2 V (MOSFET notswitching) and the sum of IS2 and IDSSwhen FEEDBACK pin is shorted to SOURCE (MOSFET switching).B Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at theDRAIN. An alternative is to measure the BYPASS pin current at 6 V.C. See Typical Performance Characteristics section Figure 15 for BYPASS pin startup charging waveform.D. This current is only intended to supply an optional optocoupler connected between the BYPASS and FEEDBACKpins and not any other external circuitry.E. For current limit at other di/dt values, refer to Figure 14.F. This parameter is guaranteed by design.G. This parameter is derived from characterization.H. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage upto but not exceeding minimum BVDSS.I. Auto-restart on time has the same temperature characteristics as the oscillator (inversely proportional tofrequency).Figure 8. LinkSwitch-XT General Test Circuit.Figure 9. LinkSwitch-XT Duty Cycle Measurement. Figure 10. LinkSwitch-XT Output Enable Timing.P I -2240-012301D R A I N C u r r e n t (m A )Typical Performance Characteristics1.21.00.80.6 0.40.2-50 -25 0 25 50 75 100 125 150Junction Temperature (︒C)-50 -250 25 50 75 100 125Junction Temperature (︒C)Figure 11. Breakdown vs. Temperature.Figure 12. Frequency vs. Temperature.-5050100150Temperature (︒C)1.41.21.0 0.8 0.6 0.40.20 12345Normalized di/dtFigure 13. Current Limit vs. Temperature. Figure 14. Current Limit vs. di/dt.7400 6 3505 300 4 250 3 200 2 150 1 100500.20.40.60.81.00 24 68 10 12 14 16 18 20Time (ms)Figure 15. BYPASS Pin Startup Waveform.DRAIN Voltage (V)Figure 16. Output Characteristics.C u r r e n t L i m i t (N o r m a l i z e d t o 25 ︒C )B r e a k d o w n V o l t a g e (N o r m a l i z e d t o 25 ︒C )B Y P A S S P i n V o l t a g e (V )P I -2213-012301O u t p u t F r e q u e n c y (N o r m a l i z e d t o 25 ︒C )N o r m a l i z e d C u r r e n t L i m i tP I -4093-081605P I -4092-081505P I -2680-012301Typical Performance Characteristics (cont.)1000100101 0100200300400500600Drain Voltage (V)Figure 17. C OSS vs. Drain Voltage.D r a i n C a p a c i t a n c e (p F )P I -4094-081605Pin-E-.240 (6.10) .260 (6.60).137 (3.48)MINIMUM.367 (9.32)DIP-8BNotes:1. Package dimensions conform to JEDEC specification MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP) package with .300 inch row spacing.2. Controlling dimensions are inches. Millimeter sizes are shown in parentheses.3. Dimensions shown do not include mold flash or other protrusions. Mold flash or protrusions shall not exceed .006 (.15) on any side.4. Pin locations start with Pin 1, and continue counter-clock- wise to Pin 8 when viewed from the top. The notch and/or dimple are aids in locating Pin 1. Pin 6 is omitted.5. Minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm).6. Lead width measured at package body..125 (3.18) .145 (3.68).387 (9.83).057 (1.45) .068 (1.73) (NOTE 6).015 (.38) MINIMUM7. Lead spacing measured with the leads constrained to be perpendicular to plane T..100 (2.54) BSC.014 (.36).120 (3.05) .140 (3.56).048 (1.22)E D S .010 (.25) M .008 (.20) .015 (.38).300 (7.62) BSC (NOTE 7).300 (7.62).390 (9.91)P08BPI-2551-121504.367 (9.32) SEATING PLANE -T- -D-1.004 (.10)D S ⊕For the latest updates, visit our website: Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent InformationThe products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at . Power Integrations grants its customers a license under certain patent rights as set forth at /ip.htm.Life Support PolicyPOWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein:1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii)whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signiﬁcant injury or death to the user.2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to causethe failure of the life support device or system, or to affect its safety or e ffectiveness.The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective c ompanies.©2007, Power Integrations, Inc.。

摩克斯 V464 系列芯片计算机产品介绍说明书

The V464 embedded computers are based on the AMD x86 processor, and feature 4 serial ports, quad LAN ports, 4 USB 2.0 hosts, and CompactFlash. A VGA interface is also included, making the V464 computers particularly well-suited for industrial applications such as SCADA and factory automation.The V464 computers’ 4 serial ports can be used to connect a wide range of serial devices, and the quad 10/100 Mbps Ethernet ports offer a reliable solution for network redundancy, promising continuousFront Viewoperation for data communication and management. In addition, the CompactFlash and USB sockets provide the V464 computers with the reliability needed for industrial applications that require data buffering and storage expansion.The V464 computers come with the WinCE 6.0 or WinXP Embedded operating system already installed. WinCE 6.0 and WinXP Embedded provide programmers with a friendly environment for developingsophisticated, bug-free application software at a lower cost.OverviewAppearanceRear View10/100 Mbps SocketSerial Ports x 2Serial Ports x 2 9-36 VDCComputerCPU:******************************************,500 MHzOS (pre-installed): Windows CE 6.0 or Windows XP Embedded System Chipset: AMD CS5536BIOS: 4 Mbit Flash BIOS, supporting Plug & Play, APM 1.2, ACPI 1.0 SRAM: 256 KB, battery backupFSB: 400 MHzSystem Memory: 200-pin SO-DIMM socket with built-in 256 MB (CE) or 512 MB (XPe) DDR, supporting DDR400 up to 1 GB Expansion Bus: PC/104-Plus onboardUSB: USB 2.0 compliant hosts x 4, type A connector, supports system boot upStorageBuilt-in: 256 MB (CE) or 1 GB (XPe) industrial DOM for OS Storage Expansion: CompactFlash socketOther PeripheralsKB/MS: 1 PS/2 interface supporting standard PS/2 keyboard and mouse through Y-type cableAudio: AC97 audio, with line-out interfaceDisplayGraphics Controller: CPU integrated 2D graphicsDisplay Interface: CRT interface for VGA outputEthernet InterfaceLAN: 4 10/100 Mbps, auto-sensing (RJ45) portsController: Realtek RTL8100CLMagnetic Isolation Protection: 1.5 KV built-inSerial InterfaceSerial Standards:• 2 RS-232 ports (DB9 male)• 2 RS-232/422/485 ports, software selectable (DB9 male)ESD Protection: 15 KV for all signalsSerial Communication ParametersData Bits: 5, 6, 7, 8Stop Bits: 1, 1.5, 2Parity: None, Even, Odd, Space, MarkFlow Control: RTS/CTS, XON/XOFF, ADDC® (automatic data direction control) for RS-485Baudrate: 50 bps to 921.6 Kbps (non-standard baudrates supported; see user’s manual for details)Serial SignalsRS-232: TxD, RxD, DTR, DSR, RTS, CTS, DCD, GNDRS-422: TxD+, TxD-, RxD+, RxD-, GND RS-485-4w: TxD+, TxD-, RxD+, RxD-, GNDRS-485-2w: Data+, Data-, GNDLEDsSystem: Power, Battery, StorageLAN: 10M/Link x 2, 100M/Link x 2 (on connector)Switches and ButtonsPower Switch: on/offReset Button: For warm rebootPhysical CharacteristicsHousing: AluminumWeight: 1.32 kgDimensions:Without ears: 223 x 121 x 57 mm (8.78 x 4.76 x 2.24 in)With ears: 248 x 140 x 70 mm (9.76 x 5.51 x 2.76 in)Mounting: DIN-Rail, wallEnvironmental LimitsOperating Temperature: -10 to 60°C (14 to 140°F)Operating Humidity: 5 to 95% RHStorage Temperature: -20 to 80°C (-4 to 176°F)Anti-vibration: 5 g rms @ IEC-68-2-34, random wave, 5-500 Hz, 1 hr per axisAnti-shock: 50 g @ IEC-68-2-27, half sine wave, 11 msPower RequirementsInput Voltage: 9 to 36 VDC (3-pin terminal block for V+, V-, SG) Power Consumption: 26 W• 730 mA @ 36 VDC• 1080 mA @ 24 VDC• 2820 mA @ 9 VDCRegulatory ApprovalsEMC: CE (EN55022 Class A, EN61000-3-2 Class A, EN61000-3-3, EN55024), FCC (Part 15 Subpart B, CISPR 22 Class A), CCC (GB9254, GB 17625.1)Safety: UL/cUL (UL60950-1, CSA C22.2 No. 60950-1-03), LVD, CCC (GB4943)Green Product: RoHS, cRoHS, WEEEReliabilityAlert Tools: Built-in buzzer and RTC (real-time clock) with battery backupAutomatic Reboot Trigger: Built-in WDT (watchdog timer) supporting 1-255 level time interval system reset, software programmable WarrantyWarranty Period: 3 yearsDetails: See /warrantyHardware SpecificationsWindows Embedded CE 6.0System Utilities: Windows command shell, telnet, ftpFile System: FAT (on-board flash)Protocol Stack: TCP, UDP, IPv4, SNMP V2, ICMP, IGMP, ARP, HTTP, CHAP, PAP, SSL, DHCP, SNTP, SMTP, Telnet, FTP, PPP Telnet Server: Allows remote administration through a standard telnet client.FTP Server: Used for transferring files to and from remote computer systems over a network.File Server: Enables clients to access files and other resources over the network (Microsoft® Wincows® CE).Web Server (httpd): Includes ASP, ISAPI Secure Socket Layer support, SSL 2, SSL 3, and Transport Layer Security (TLS/SSL 3.1) public key-based protocols, and Web Administration ISAPI Extensions.Dial-up Networking Service: RAS client API and PPP, supporting Extensible Authentication Protocol (EAP) and RAS scripting. Watchdog Service: CPU Hardware function to reset CPU in a user specified time interval (triggered by calling a MOXA library function).Application Development Software:• Moxa WinCE 6.0 SDK• C Libraries and Run-times• Component Services (COM and DCOM)• Microsoft® .NET Compact Framework 2.0 SP2• XML, including DOM, XQL, XPATH, XSLT, SAX, SAX2• SOAP Toolkit Client• Winsock 2.2Software SpecificationsWindows XP EmbeddedSystem Utilities: Windows command shell, Telnet, ftp, Wireless Zero Configuration File System: NTFSProtocol Stack: DHCP, IPv4, DNS, IPsec, HTTP, TCP, UDP, ICMP, IGMP, ARP, TAPI, TSP, SNMP V2, NTP, ICS, PPP, CHAP, EAP, SNTP, Telnet, SNTP, FTP, SMTP, PPPoE, PPTP, NetBIOSTelnet Server: Allows users to connect to Telnet servers from remote computers.IIS Web Server: Allows you to create and manage Web sites.Terminal Server: Microsoft Terminal Server client application (mstsc.exe).COM+ Services: The next evolution of Microsoft Component Object Model (COM) and Microsoft Transaction Server (MTS).Computer Browser Service: Computer browsing functionalityexposed by Windows through Microsoft Networking. Allows a client machine to browse its network neighborhood for available computers exposing file and print sharing services.Disk Management Services: Support for disk and volumemanagement operations. The component implements a Component Object Model (COM) interface that can be used to query and configure disks and volumes, both basic and dynamic. The component also monitors disk arrivals and removals and other changes in the storage subsystem.Remote Registry Service: Enables remote users to modify registry settings on this computer.Application Development Software:• Microsoft .Net Framework 2.0 with service pack 2 (CLR and the .NET Framework class library)• Active Directory Service Interface (ADSI) Core • Active Template Library (ATL), 2.0• Certificate Request Client & Certificate Autoenrollment (CLR and the .NET Framework class library) • COM APIs• Common Control Libraries • Common File Dialogs• Direct3D, DirectPlay, DirectShow and Direct show filters • Distributed Transaction Coordinator (MSDTC)• Enhanced Write Filter (Redirect disk write operations to volatile (RAM) or non-volatile (disk) storage) • Event Log, Internet Explorer • Mapi32 Libraries• Message Queuing (MSMQ) Core• Microsoft Visual C++ Run Time Libraries • Power Management dynamic-link library • Registry Editor • RPC• Smart Card Cryptographic Service Providers• USB 2.0 core drivers compliant with The USB .95 or 1.0 • Windows API, Media Player 10, Script Engines, and WMIV464 computer• Ethernet cable: RJ45 to RJ45 cross-over • cable, 100 cmDIN-rail Mounting Kit• PS2 to KB/MS Y-type Cable• Document and Software CD or DVD • Quick Installation Guide (printed)• Product Warranty Statement (printed)• Package ChecklistAvailable ModelsV464-CE: x86 embedded computer with 4 serial ports, quad LANs, VGA, CompactFlash, USB, and WinCE 6.0 OSV464-XPE: x86 embedded computer with 4 serial ports, quad LANs, VGA, CompactFlash, USB, and Windows XP Embedded OSOptional Accessories (can be purchased separately)PWR-24250-DT-S1: Power adaptorPWC-C7US-2B-183: Power cord with 2-pin connector, USA plug PWC-C7EU-2B-183: Power cord with 2-pin connector, Euro plug PWC-C7UK-2B-183: Power cord with 2-pin connector, British plug PWC-C7AU-2B-183: Power cord with 2-pin connector, Australia plug PWC-C7CN-2B-183: Power cord with 2-pin connector, China plugOrdering Information。

FOXBORO I A Series HARDWARE产品规格说明书

FOXBORO ®The FBM214 HART ® Communication Input Interface Module provides eight input channels, each accepting a 4 to 20mA analog signal or a digital HART signal superimposed on a 4 to 20 mA analog input signal.FEATURESKey features of the FBM214 module are:Eight analog input channels, each accepting oneof the following inputs:•Standard 4 to 20 mA analog sensor signal •Digital HART Frequency Shift Keying (FSK) signal superimposed on a 4 to 20 mA analog input signal.FSK modem dedicated to each input channel forbi-directional digital communications with a HART field deviceAnalog to digital conversion of each of the 4to20mA input signals from the HART devicesSupport for the HART universal commandsnecessary to interface the field device with the I/A Series ® system databaseGalvanic isolation of the group of 8 inputchannels from ground and module logicCompact, rugged design suitable for enclosure inClass G3 (harsh) environmentsHigh accuracy achieved by sigma-delta dataconversions for each channelTermination Assemblies (TAs) for locally orremotely connecting field wiring to the FBM214Termination Assemblies for per channel internallyand/or externally loop powered transmitters.PSS 21H-2Z14 B4 Page 2OVERVIEWThe FBM214 HART Communication Input Interface Module contains eight 4to20mA group isolated analog input channels. The FBM214 supports any mix of standard 4to20mA devices and HART devices.The FBM214 serves as a HART communications field device host, enabling the I/A Series system to request and receive two digital messages per second from the field device. The message pass-through capability can be used to support HART universal, common practice, and device-specific commands, but not the burst communication mode. These commands are implemented using the Intelligent Field Device Configurator (IFDC — refer toPSS 21S-8A3 B3 for details).The FBM214 provides a common isolated power supply to power all eight channels. Optionally, the channels can be powered by an external power supply. However, when a common external power supply is used with two or more channels, a Cable Balun module is required to prevent channel cross talk.COMPACT DESIGNThe FBM214 has a compact design, with a rugged extruded aluminum exterior for physical protection of the circuits. Enclosures specially designed for mounting the FBMs provide various levels of environmental protection, up to harsh environments per ISA Standard S71.04.HIGH ACCURACYFor high accuracy, the module incorporates a Sigma-Delta converter which can provide new analog input values for each channel every 100 milliseconds.VISUAL INDICATORSLight-emitting diodes (LEDs) incorporated into the front of the module provide visual indication of the module’s operational status, and communication activity on the channels.EASY REMOVAL/REPLACEMENTThe module can be removed/replaced without removing field device termination cabling, power, or communications cabling.FIELDBUS COMMUNICATIONA Fieldbus Communication Module or a Control Processor interfaces the redundant 2 Mbps module Fieldbus used by the FBMs. The FBM214 module accepts communication from either path (A or B) of the redundant 2 Mbps fieldbus – should one path fail or be switched at the system level, the module continues communication over the active path.The use of an external power supply common to two or more loops requires a Cable Balun Module to maintain communication signal line balance.MODULAR BASEPLATE MOUNTINGThe module mounts on a modular baseplate which accommodates up to four or eight FBMs. The modular baseplate is either DIN rail mounted or rack mounted, and includes signal connectors for redundant fieldbus, redundant independent dc power, and termination cables.TERMINATION ASSEMBLIESField input signals connect to the FBM subsystem via DIN rail mounted TAs. The TAs used with theFBM214 are described in “TERMINATION ASSEMBLIES AND CABLES” on page8.PSS 21H-2Z14 B4Page 3CABLE BALUN MODULEThe Cable Balun module is used to maintain digital communication line balance for HART Transmitter to FBM loops that are powered from a common external power supply. This powering effectively connects one line of each loop together. Without the Baluns, in each loop so powered, the common connection at the external power supply, would cause near end crosstalk at the system end of the loop wiring cable. Loops using FBM internal power source do not require Baluns.The Cable Balun module contains multiple Baluns. One Balun segment is interconnected in each loop powered from an external power supply per the diagram above. There is one Cable Balun module.Figure 1. Cable Balun Module Cable Balun ModuleModule Model ModulePart No.No. of Balunsin the ModuleCBM-4P0903SV4PSS 21H-2Z14 B4Page 4FUNCTIONAL SPECIFICATIONSField Device ChannelsVERSION SUPPORTEDHART Protocol v6INTERFACE8 group-isolated channelsCOMMUNICATION TO THE DEVICEPoint-to-point, master/slave, asynchronous, half-duplex, at 1200 baud.ERROR CHECKINGParity on each byte, and one CRC check byte.SPEED2 messages per secondFASTEST ALLOWED ECB BLOCK PERIOD500 msecMAXIMUM DISTANCE (FBM214 TO FIELDDEVICE)Meets HART FSK physical layer specificationHCF_SPEC-54, Revision 8.1 [up to 3030 m(10000ft)](1).COMPLIANCE VOLTAGE18 V dc minimum at 20.5 mACURRENT INPUTSSense Resistor61.9 Ω nominalTotal Input Resistance280 Ω minimumAccuracy (Includes Nonlinearity)±0.03% of full scaleTemperature Coefficient50 ppm/ºCResolution15 bitsUpdate Rate100 msIntegration Time500 msCommon Mode Rejection>100 db at 50 or 60 HzNormal Mode Rejection>35 db at 50 or 60 HzMAXIMUM LOOP RESISTANCE280 Ω (not including the field device)(2)LOOP POWER SUPPLY PROTECTIONEach channel is galvanically group isolated,current limited and voltage regulated. All inputsare limited by their design to less than 30 mA. Ifthe current limit circuit shorts out, the current islimited to about 85 mA.FBM INPUT IMPEDANCE280 Ω minimumFBM INTERNAL POWER FOR FIELD DEVICE24 V dc ±10% common power supply for allchannels. Loop load limited to one device perchannel.ISOLATIONThe channels are not galvanically isolated fromeach other, but are galvanically isolated (bothoptical and transformer isolation) as a group from ground and module logic. Inputs use an internal FBM isolated power supply for field power. Themodule withstands, without damage, a potential of 600 V ac applied for one minute between the group-isolated channels and earth (ground).CAUTIONThis does not imply that these channels areintended for permanent connection tovoltages of these levels. Exceeding the limitsfor input voltages, as stated elsewhere in thisspecification, violates electrical safety codesand may expose users to electric shock. Fieldbus CommunicationCommunicates with its associated FCM or FCP via the redundant 2 Mbps module FieldbusHEAT DISSIPATION4 W (maximum)(1)The maximum allowable distance decreases when the loop is operated through an intrinsic safety barrier. The maximum distance ofthe field device from the FBM is a function of compliance voltage, wire gauge and voltage drop at the device.(2)In an intrinsic safety application, if a zener barrier is used between the FBM and the field device, the power supply must be set at24V dc +5%, -1%. There are no specific constraints with the use of galvanic barriers.PSS 21H-2Z14 B4Page 5 FUNCTIONAL SPECIFICATIONS (CONTINUED)Power RequirementsINPUT VOLTAGE RANGE (REDUNDANT)24V dc ±5%CONSUMPTION7 W (maximum)Regulatory ComplianceELECTROMAGNETIC COMPATIBILITY (EMC) European EMC Directive 89/336/EECMeets:EN 50081-2 Emission standardEN 50082-2 Immunity standardEN 61326 Annex A (Industrial Levels) CISPR 11, Industrial Scientific and Medical(ISM) Radio-frequency Equipment -Electromagnetic Disturbance Characteristics- Limits and Methods of MeasurementMeets Class A LimitsIEC 61000-4-2 ESD ImmunityContact 4 kV, air 8 kVIEC 61000-4-3 Radiated Field Immunity10 V/m at 80 to 1000 MHzIEC 61000-4-4 Electrical FastTransient/Burst Immunity2 kV on I/O, dc power and communicationlinesIEC 61000-4-5 Surge Immunity2kV on ac and dc power lines; 1kV on I/Oand communications linesIEC 61000-4-6 Immunity to ConductedDisturbances Induced by Radio frequencyFields10 V (rms) at 150 kHz to 80 MHz on I/O,dc power and communication linesIEC 61000-4-8 Power Frequency MagneticField Immunity30 A/m at 50 and 60 HzPRODUCT SAFETY (FBM AND CABLE BALUN) Underwriters Laboratories (UL) for U.S. andCanadaUL/UL-C listed as suitable for use inUL/UL-C listed Class I, Groups A-D;Division 2; temperature code T4 enclosurebased systems. These modules are also ULand UL-C listed as associated apparatus forsupplying non-incendive communicationcircuits for Class I, Groups A-D hazardouslocations when connected to specifiedI/A Series® processor modules as describedin the I/A Series DIN Rail MountedSubsystem User’s Guide (B0400FA). Wherepower is supplied by the FBM,communications circuits also meet therequirements for Class2 as defined inArticle725 of the National Electrical Code(NFPA No.70) and Section 16 of theCanadian Electrical Code (CSA C22.1).Conditions for use are as specified in theI/A Series DIN Rail Mounted SubsystemUser’s Guide (B0400FA).European Low Voltage Directive 73/23/EECand Explosive Atmospheres (ATEX) directive94/9/ECCENELEC (DEMKO) certified as EEx nA IICT4 for use in CENELEC certified Zone 2enclosure certified as associated apparatusfor supplying non-incendive field circuits forZone 2, Group IIC, potentially explosiveatmospheres when connected to specifiedI/A Series processor modules as describedin the I/A Series DIN Rail MountedSubsystem User’s Guide (B0400FA). Also,see Table1 on page9.Calibration RequirementsCalibration of the module or termination assembly is not required.PSS 21H-2Z14 B4Page 6ENVIRONMENTAL SPECIFICATIONS(3)OperatingTEMPERATUREModule-20 to +70°C (-4 to +158°F)Termination AssemblyPVC-20 to +50°C (-4 to +122°F)PA-20 to +70°C (-4 to +158°F) RELATIVE HUMIDITY5 to 95% (noncondensing)ALTITUDE-300 to +3,000m (-1,000 to +10,000ft)StorageTEMPERATURE-40 to +70°C (-40 to +158°F)RELATIVE HUMIDITY5 to 95% (noncondensing)ALTITUDE-300 to +12,000m (-1,000 to +40,000ft) ContaminationSuitable for use in Class G3 (Harsh) environments as defined in ISA Standard S71.04, based on exposure testing according to EIA Standard 364-65, Class III. Vibration7.5 m/S2 (0.75 g) from 5 to 500 Hz(3)The environmental limits of this module may be enhanced by the type of enclosure containing the module. Refer to the applicableProduct Specification Sheet (PSS) which describes the specific type of enclosure that is to be used.PSS 21H-2Z14 B4Page 7 PHYSICAL SPECIFICATIONSMountingMODULEFBM214 mounts on a modular baseplate. Thebaseplate can be mounted on a DIN rail(horizontally or vertically), or horizontally on a19-inch rack using a mounting kit. Refer toPSS21H-2W6B4 for details.TERMINATION ASSEMBLYThe TA mounts on a DIN rail and accommodates multiple DIN rail styles including 32mm (1.26in) and 35mm 1.38in).MassMODULE284 g (10 oz) approximateTERMINATION ASSEMBLYCompression181 g (0.40 lb) approximateRing Lug249 g (0.55 lb) approximateDimensions – ModuleHEIGHT102 mm (4 in)114 mm (4.5 in) including mounting lugsWIDTH45 mm (1.75 in)DEPTH104 mm (4.11 in)Dimensions – Termination AssemblySee page10.Part NumbersFBM214 MODULEP0922VTTERMINATION ASSEMBLIESSee “FUNCTIONAL SPECIFICATIONS –TERMINATION ASSEMBLIES” on page8. Termination CablesCABLE LENGTHSUp to 30 m (98 ft)CABLE MATERIALSPolyurethane or Hypalon®/XLPTERMINATION CABLE TYPEType 1 – See Table2 on page9.CABLE CONNECTION – TA25-pin male D-subminiatureConstruction – Termination AssemblyMATERIALPolyvinyl Chloride (PVC), compressionPolyamide (PA), compressionPVC, ring lugFAMILY GROUP COLORGreen – communicationTERMINAL BLOCKS3 tiers, 8 positionsField Termination ConnectionsCOMPRESSION-TYPE ACCEPTED WIRINGSIZESSolid/Stranded/AWG0.2 to 4 mm2/0.2 to 2.5 mm2/24 to 12 AWGStranded with Ferrules0.2 to 2.5 mm2 with or without plastic collarRING-LUG TYPE ACCEPTED WIRING SIZES#6 size connectors (0.375 in (9.5 mm))0.5 to 4 mm2/22 AWG to 12 AWGPSS 21H-2Z14 B4Page 8TERMINATION ASSEMBLIES AND CABLESField input signals connect to the FBM subsystem via DIN rail mounted Termination Assemblies, which are electrically passive.TAs for the FBM214 are available in the following forms: Compression screw type using Polyvinyl Chloride(PVC) materialCompression screw type using Polyamide (PA) material Ring lug type using PVC material.See the following “FUNCTIONAL SPECIFICATIONS –TERMINATION ASSEMBLIES” for a list of TAs used with the FBM214.The FBM214 provides sufficient loop resistance to allow use of the HART Hand-Held Terminal, or PC20 Intelligent Field Device Configurator (PSS 2A-1Z3 E).A removable termination cable connects the DIN railmounted TA to the FBM via a field connector on the baseplate in which the FBM is installed. Termination cables are available in the following materials: PolyurethaneHypalon XLP .Termination cables are available in a variety of lengths, up to 30 meters (98feet), allowing the Termination Assembly to be mounted in either theenclosure or in an adjacent enclosure. See Table 2 for a list of termination cables used with the TAs forthe FBM214.FUNCTIONAL SPECIFICATIONS – TERMINATION ASSEMBLIESFBM Type Input SignalTA Part NumberTermination TA Cable TACertification PVC (a)(a)PVC is polyvinyl chloride rated from -20 to +50°C (-4 to +122°F).PA is Polyamide rated from -20 to +70°C (-4 to +158°F).PA (a)Type (b)(b) C = TA with compression terminals; RL = TA with ring lug terminals.Type (c)(c)See Table 2 for cable part numbers and specifications.Type (d)(d)See Table 1 for Termination Assembly certification definitions.FBM2148 input channels, 4 to 20mA analog signal, alone or with HART signal superimposedP0916BX P0926EA P0926TD CRL11, 2PSS 21H-2Z14 B4Page 9Table 1. Certification for Termination AssembliesType Certification (a)(a)All TAs are UL/UL-C listed to comply with applicable ordinary location safety standards for fire and shock hazards. Hazardous locationtypes comply with ATEX directive for II 3 G use. They also comply with the requirements of the European Low Voltage Directive. All listings/certifications require installation and use within the constraints specified in DIN Rail Mounted Subsystem User’s Guide (B0400FA) and the conditions stated in UL and DEMKO reports.Type 1TAs are UL/UL-C listed as suitable for use in Class I; Groups A-D; Division 2 temperature code T4 hazardous locations. They are CENELEC (DEMKO) certified EEx nA IIC T4 for use in Zone 2 potentially explosive atmospheres.Type 2TAs are UL/UL-C listed as associated apparatus for supplying non-incendive field circuits Class I; Groups A-D; Division 2 hazardous locations when connected to specified DIN rail mounted FBMs and field circuits meeting entity parameter constraints specified in DIN Rail Mounted Subsystem User’s Guide (B0400FA). They are also CENELEC (DEMKO) certified as associated apparatus for supplying field circuits for Group IIC, Zone 2 potentially explosive atmospheres. Field circuits are also Class 2 limited energy (60 V dc, 30 V ac, 100 VA or less) if customer-supplied equipment meets Class 2 limits.Table 2. Cables Types and Part NumbersCable Lengthm (ft) Type 1P/PVC (a)Type 1H/XLPE (b)Cable Lengthm (ft) Type 1P/PVC (a)Type 1H/XLPE (b)0.5 (1.6)P0916DA P0916VA 10.0 (32.8) P0916DE P0916VE 1.0 (3.2) P0916DB P0916VB 15.0 (49.2) P0916DF P0916VF 2.0 (6.6)P0931RM P0931RR 20.0 (65.6) P0916DG P0916VG 3.0 (9.8) P0916DC P0916VC 25.0 (82.0) P0916DH P0916VH 5.0 (16.4)P0916DDP0916VD30.0 (98.4)P0916DJP0916VJ(a)P/PVC is polyurethane outer jacket and semi-rigid PVC primary conductor insulation.(b)H/XLPE is Hypalon outer jacket and XLPE (cross-linked polyethylene) primary conductor insulation.PSS 21H-2Z14 B4Page 10DIMENSIONS – NOMINALRELATED PRODUCT SPECIFICATION SHEETSCompression Termination AssemblyRing Lug Termination Assembly(a) Overall width – for determining DIN rail loading.(b) Height above DIN rail (add to DIN rail height for total).PSS NumberDescriptionPSS 21H-2W1 B3DIN Rail Mounted FBM Subsystem OverviewPSS 21H-2W2 B3DIN Rail Mounted FBM Equipment, Agency CertificationsPSS 21H-2Z14 B4Page 11PSS 21H-2Z14 B4 Page 12IPS Corporate Headquarters 5601 Granite Parkway Suite 1000 Plano, TX 75024United States of AmericaFoxboro Global Client Support Inside U.S.: 1-866-746-6477 Outside U.S.: 1-508-549-2424 or contact your local Foxboro representative.Facsimile: 1-508-549-4999Invensys, Foxboro, I/A Series and the IPS Logo are trademarks of Invensys plc, its subsidiaries, and affiliates. All other brand names may be trademarks of their respective owners.Copyright 2002-2010 Invensys Systems, Inc.All rights reservedMB 21A Printed in U.S.A. 0210。

ESP-12F WiFi模块规格书说明书

ESP-12F WiFi模块免责申明和版权公告本文中的信息，包括供参考的URL地址，如有变更，恕不另行通知。

文档“按现状”提供，不负任何担保责任，包括对适销性、适用于特定用途或非侵权性的任何担保，和任何提案、规格或样品在他处提到的任何担保。

本文档不负任何责任，包括使用本文档内信息产生的侵犯任何专利权行为的责任。

本文档在此未以禁止反言或其他方式授予任何知识产权使⽤许可，不管是明示许可还是暗示许可。

Wi-Fi联盟成员标志归Wi-Fi联盟所有。

文中提到的所有商标名称、商标和注册商标均属其各自所有者的财产，特此声明。

注意由于产品版本升级或其他原因，本手册内容有可能变更。

深圳市安信可科技有限公司保留在没有任何通知或者提示的情况下对本手册的内容进行修改的权利。

本手册仅作为使用指导，深圳市安信可科技有限公司尽全力在本手册中提供准确的信息，但是深圳市安信可科技有限公司并不确保手册内容完全没有错误，本手册中的所有陈述、信息和建议也不构成任何明示或暗示的担保。

1.产品概述ESP-12F WiFi模块是由安信可科技开发的，该模块核心处理器ESP8266在较小尺寸封装中集成了业界领先的Tensilica L106超低功耗32位微型MCU，带有16位精简模式，主频支持80MHz和160MHz，支持RTOS，集成Wi-Fi MAC/BB/RF/PA/LNA，板载天线。

该模块支持标准的IEEE802.11b/g/n协议，完整的TCP/IP协议栈。

用户可以使用该模块为现有的设备添加联网功能，也可以构建独立的网络控制器。

ESP8266是高性能无线SOC，以最低成本提供最大实用性，为WiFi功能嵌入其他系统提供无限可能。

图1ESP8266EX结构图ESP8266EX是一个完整且自成体系的WiFi网络解决方案，能够独立运行，也可以作为从机搭载于其他主机MCU运行。

ESP8266EX在搭载应用并作为设备中唯⼀的应⽤处理器时，能够直接从外接闪存中启动。

VF-Ti60F225-T产品手册说明书

《VF-Ti60F225-T产品手册》易灵思钛金16nm 60K FPGA开发板芯片介绍参数描述功能介绍尺寸介绍Demo介绍资料介绍套餐介绍实物演示u联系我们手册目录FPGA主芯片系列介绍Trion系列FPGA40nm钛金系列FPGA16nm易灵思FPGAT20T35T55T85T120无DDR IP无MIPI CSI无DDR IP有MIPI CSI有DDR IP有MIPI CSI有DDR IP有MIPI CSI/DSI Ti35Ti60硬核DDR IP硬核MIPI IP Ti180Ti60F225I3 FPGA介绍供应商奥唯思科技核心板型号VF-Ti60F225-CFPGA厂家易灵思（国产FPGA）钛金（Titanium）系列FPGA型号Ti60F225I3FPGA资源60K 逻辑单元，集成DDR3/MIPI软核，160个DSP DDR3存储4G 16bit DDR3：K4B4G1646E PCBA尺寸40mm *40mmPCB工艺6层 1.6mm 沉金绿色/亚黑板载FLASH 64Mbit SPI FLASH ：W25Q64JWSSIQ 核心板外设1个USB供电口，8个测试LED2个用户按键，1个硬复位按键其他接口板载ZH1.25-6 JTAG下载口B2B接口2个0.5mm双排80P山谷道B2B接插件（母座*2）供电集成USB Mini供电口 | B2B接插件输入5V DC发烧设计，极致尺寸；工匠品质，为FPGA而生。

40m m40m mTi60F255I3易灵思FPGADCDC 电源模块8bit LED0.5mm双排80P 山谷道B2B接插件DDR3 16bit 4GbZH1.25-6JTAG下载口USB-Mini口仅供电24MHz晶振25MHz晶振2位用户按键64Mbit SPI-FLASH W25Q64JWSSIQ 1bit硬件复位按键【4*4cm极小尺寸】开供应商奥唯思科技开发板型号VF-Ti60F225-TFPGA厂家易灵思（国产FPGA）钛金（Titanium）系列FPGA型号Ti60F225I3FPGA资源60K 逻辑单元，集成DDR3/MIPI软核，160个DSP PCBA尺寸长 110mm * 宽 80mmPCB工艺4层 1.6mm 黑色沉金工艺核心板外设1）8个LED灯2）2个独立按键 + 1个硬复位按键3）1个ZH1.25-6 JTAG下载口底板外设1）1个USB串口（CH340N）2）DC3-40 40P 用户接口3）1路HDMI 1.4显示接口（FPGA驱动）4）1路LVDS LCD接口（1024*600显示屏）5）1路DVP相机接口（兼容奥唯思科技所有DVP模组）6）1路MIPI RX接口（CSI/DSI 1.5Gbps)7）1路MIPI TX接口（CSI/DSI 1.5Gbps）备注MIPI RX+TX需要转接板16nm工艺，高速低功耗小尺寸FPGA u 集成DDR3/MIPI软核IPu 主打 MIPI CSI 1.5G 相机采集解决方案；u 主打 MIPI DSI 1.5G LCD显示解决方案；110mm80m mDVP摄像头接口（兼容奥唯思科技所有DVP相机）DCDC 电源模块1024x600LVDS LCD接口HDMI1.4接口4位用户独立按键USB串口(CH340N)IDC3-10JTAG下载口5V DC500供电接口电源开关DC3-40P用户接口(3.3V)8bit用户LED灯74HC595串转并驱动VF-Ti60F225-C 易灵思FPGA核心板MIPI TX/RX接口CSI/DSI 1.5GbpsFPGA开发板尺寸/3D视图介绍FPGA开发板基础Demo介绍分类工程名称FPGA工程介绍基础工程01_LED_8bit_Test LED流水灯测试实验（核心板）02_KEY_2bit_Test独立按键测试实验（核心板）03_FPGA_UART_Test_Bottom UART串口测试实验（底板）04_RGBLCD_Test_800480UART串口测试实验（底板）05_LVDS_LCD_Test_1024600800*480 RGB LCD屏幕显示实验05_MIPI_LCD_Test_10246001024*600 MIPI DSI屏幕显示实验07_Ti60_HDMI_1080P_Lvds_Test1920*1080@60 HDMI屏幕显示实验FPGA开发板图像Demo介绍分类工程名称FPGA工程介绍图像工程01_Ti60_AR0135_HDMI_1280720基于AR0135 DVP相机的HDMI屏720P实时成像案例02_Ti60_AR0135_LCD-RGB_800480基于AR0135 DVP相机的RGB屏(800*480)实时成像案例03_Ti60_AR0135_LCD-LVDS_1024600基于AR0135 DVP相机的LVDS屏(1024*600)实时成像案例04_Ti60_AR0135_LCD-DSI_1024600基于AR0135 DVP相机的MIPI DSI屏(1024*600)实时成像案例05_Ti60_SC130GS_MIPIx4_HDMI_1280720基于SC130S MIPI 4lane相机的HDMI屏720P实时成像案例06_Ti60_SC130GS_MIPIx4_LCD-RGB_800480基于SC130S MIPI 4lane相机的RGB屏(800*480)实时成像案例07_Ti60_SC130GS_MIPIx4_LCD-LVDS_1024600基于SC130S MIPI 4lane相机的LVDS屏(1024*600)实时成像案例08_Ti60_SC130GS_MIPIx4_LCD-DSI_1024600基于SC130S MIPI 4lane相机的MIPI DSI屏(1024*600)实时成像案例完整的 MIPI CSI/DSI 解决方案，成熟的案例及量产经验！VF-Ti60F225易灵思FPGA主板FPGA下载器可选多种DVP模组SC130GS 彩色/黑白130万1/3寸1024*600 MIPI DSI液晶屏1024*600 LVDS液晶屏SC200AI 彩色200万1/3寸可选多种MIPI模组FPGA开发板 DVP/MIPI采集显示解决方案奥唯思FPGA官微奥唯思技术支持官方网站：资料下载：官方淘宝： “奥唯思FPGA ” 店铺FPGA论坛： 851598171奥唯思FPGA交流群1。

迈瑞欧恒温恒湿电子防潮箱（低温加热型）选型手册与技术参数说明书

恒温恒湿电子防潮箱（低温加热型）选型手册与技术参数（控湿范围:20%-60%，10%-20%，1%-10%RH三选一；控温范围：10~40℃）100L165L246L325L435L546L720L878L1440L（四门）1440L（六门）非防静电型号防静电型号外形尺寸(W*D*H)内部尺寸(W*D*H)平均功率(W)最大功率(W)层板数量容积(L)MC108T MC108TF448*400*688mm446*372*598mm13911100 MC168T MC168TF448*450*1010mm446*422*848mm181263165 MC268T MC268TF598*400*1310mm596*372*1148mm181263246 MC328T MC328TF900*450*1010mm898*422*848mm201403325 MC468T MC468TF900*600*1010mm898*572*848mm201403435 MC568T MC568TF598*710*1465mm596*682*1298mm201403546 MC718T MC718TF598*710*1910mm596*682*1723mm201405720 MC878T MC878TF900*600*1890mm898*572*1698mm201405878 MC1368T MC1368TF1200*710*1910mm1198*682*1723mm4028051440 MC1369T MC1369TF1200*710*1910mm1198*682*1723mm4028051440 *白色为非防静电系列；黑色为防静电系列，型号后带有F。

产品特性：1.加热器采用德国进口的DBK加热器，该加热器通过德国TUV，欧洲CE，美国UL 认证，符合ROHS环保。

质量好，温升效率高，使用寿命长。

70度时平均无故障时间（MTTF）为65000小时。

微小电子图像处理器产品指南说明书

UG0646User Guide Image Enhancement IPMicrosemi HeadquartersOne Enterprise, Aliso Viejo,CA 92656 USAWithin the USA: +1 (800) 713-4113 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136Fax: +1 (949) 215-4996Email: *************************** ©2023 Microchip, a wholly owned subsidiary of Microchip Technology Inc. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners. Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.About MicrosemiMicrosemi, a wholly owned subsidiary of Microchip Technology Inc. (Nasdaq: MCHP), offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world's standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power-over-Ethernet ICs andmidspans; as well as custom design capabilities and services. Learn more at .Contents1Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11.1Revision 6.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2Revision 5.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3Revision 4.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.4Revision 3.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.5Revision2.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.6Revision 1.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22.1Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.2Supported Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Hardware Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43.1Design Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43.2Inputs and Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53.3Configuration Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.4IP Configurator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94.1License . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94.1.1Encrypted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94.1.2RTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105.1Simulation Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6Resource Utilization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13Figure 1Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2Image Enhancement IP Configurator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 3Image Enhancement Output from Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 4Opening New SmartDesign Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 5Creating a SmartDesign Testbench . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 6Image Enhancement Core in Libero SoC Catalog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 7Image Enhancement Core on SmartDesign Testbench Canvas . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 8Promote to Top-Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9Generating Image Enhancement Component with Ports Promoted to Top Level . . . . . . . . . . . . . 12Figure 10ModelSim Simulation Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Table 1Input and Output ports for 1 pixel Native Video Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2Input and Output Ports for 4-pixel Native Video Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3Input and Output Ports for AXI4 Stream Video Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4Register Map and Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 5Configuration Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6Resource Utilization on PolarFire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Table 7Resource Utilization on SmartFusion2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Revision History1Revision HistoryThe revision history describes the changes that were implemented in the document. The changes arelisted by revision, starting with the most current publication.1.1Revision 6.0The following is a summary of changes made in this revision.•Updated Figure1, page4•Added a new IP Configurator, page8•Updated Figure, page9 and Figure3, page9•Added a new Testbench, page10 section1.2Revision 5.0The following is a summary of the changes in this revision.•Updated Figure1, page4•Updated Table1, page5 and Table2, page61.3Revision 4.0The following is a summary of the changes in this revision.•Added Key Features, page3 and Supported Families, page3.•Added Table2, page6, Table3, page6, and Table4, page8.•Updated Table5, page8.•Added License, page9, Encrypted, page9, and RTL, page9.1.4Revision 3.0The resource utilization reports were updated. For more information, see Resource Utilization, page13.1.5Revision2.0The following is a summary of changes made in this revision.•Updated Figure1, page4 and Table1, page5. For more information, see Figure1, page4.1.6Revision 1.0The first publication of this document.2IntroductionImage Enhancement IP enables you to adjust the brightness, contrast, and color balance of a final video Image according to personal preferences. These calculations are done in the RGB domain.The inputs to Image Enhancement IP in terms of brightness and contrast are as follows:where,R gain , G gain , and B gain are the red, green, and blue gain values.The output RGB values are calculated from the above inputs based on the following equations:Where,R in , G in , and B in are the red, green and blue values of input data.R out , G out , and B out are the red, green and blue values of output data.R CONST I R gain contrast factor ×()10⁄=G CONST I G gain contrast factor ×()10⁄=B CONST I B gain contrast factor ×()10⁄=COMMON CONST I 128brightness 128(contrast factor ×()10⁄)–()×=contrast factor 325contrast 128+()×387contrast –()32×--------------------------------------------------------=R out COMMON CONST I R CONST I R in×+=G out COMMON CONST I G CONST I G in×+=B out COMMON CONST I B CONST I B in×+=2.1Key Features•Supports image enhancement in terms of brightness, contrast, saturation, and hue•Supports data width of 8,10 and 12•Supports Native and AXI4 Stream Video Interface for video data transfer•Supports Native and AXI4-Lite Configuration Interface for parameter modification 2.2Supported Families•PolarFire® SoC•PolarFire®•RTG4™•IGLOO®2•SmartFusion®23Hardware ImplementationThis section describes the design description and inputs and outputs of the Image Enhancement IP. 3.1Design DescriptionThe following figure shows the block diagram of the Image Enhancement IP.Figure 1 • Block Diagramcomputed from the inputs according to the formula given in the introduction section. The output RGBdata (R_O, G_O, and B_O) is valid when DATA_VALID_O (which is equivalent to DATA_VALID_I withtwo clock cycle delay) goes high.3.2Inputs and OutputsThe following table lists the input and output ports of the Image Enhancement IP.Table 1 • Input and Output ports for 1 pixel Native Video InterfacePort Name Direction Width DescriptionRESETN_I Input 1 bit Active low asynchronous reset signal todesignSYS_CLK_I Input 1 bit System clockDATA_VALID_I Input 1 bit Input data valid signalThis signal is asserted high when thedata is validENABLE_I Input 1 bit Enable signalShould be '1' to enable imageenhancement operationR_I Input G_PIXEL_WIDTH bits R_I [G_PIXEL_WIDTH -1] represents theR component input dataG_I Input G_PIXEL_WIDTH bits G_I [G_PIXEL_WIDTH -1] represents theG component input dataB_I Input G_PIXEL_WIDTH bits B_I [G_PIXEL_WIDTH -1] represents theB component input dataR_CONST_I Input10 bits Input constant to multiply with R dataG_CONST_I Input10 bits Input constant to multiply with G dataB_CONST_I Input10 bits Input constant to multiply with B data COMMON_CONST_I Input20 bits Input constant with brightness andcontrastDATA_VALID_O Output 1 bit Output data valid signalThis signal is asserted high when thedata is validR_O Output G_PIXEL_WIDTH bits R_O [G_PIXEL_WIDTH -1] representsthe R component output dataG_O Output G_PIXEL_WIDTH bits G_O [G_PIXEL_WIDTH -1] representsthe G component output dataB_O Output G_PIXEL_WIDTH bits B_O [G_PIXEL_WIDTH -1] representsthe B component output dataTable 2 • Input and Output Ports for 4-pixel Native Video InterfacePort Name Type Width DescriptionRESETN_I Input 1 bit Active low asynchronous reset signal todesignSYS_CLK_I Input 1 bit System clockDATA_VALID_I Input 1 bit Asserted high when input data is valid ENABLE_I Input 1 bit Input Enable signal should be 'high' toenable image enhancement operationR_I Input G_PIXELS*G_PIXEL_WIDTH bits R_I [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the R component input dataG_I Input G_PIXELS*G_PIXEL_WIDTH bits G_I [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the G component input dataB_I Input G_PIXELS*G_PIXEL_WIDTH bits B_I [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the B component input dataR_CONST_I Input10 bits Input constant to multiply with R dataG_CONST_I Input10 bits Input constant to multiply with G dataB_CONST_I Input10 bits Input constant to multiply with B data COMMON_CONST_I Input20 bits Input constant with brightness and contrast DATA_VALID_O Output 1 bit Asserted high when output data is validR_O Output G_PIXELS*G_DATA_WIDTH bits R_O [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the R component output dataG_O Output G_PIXELS*G_DATA_WIDTH bits G_O [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the G component output dataB_O Output G_PIXELS*G_DATA_WIDTH bits B_O [G_PIXELS*G_PIXEL_WIDTH -1:0]represents the B component output dataTable 3 • Input and Output Ports for AXI4 Stream Video InterfacePort Name Type Width DescriptionRESETN_I Input 1 bit Active low asynchronous reset signal to design SYS_CLK_I Input 1 bit System clockTREADY_O Output 1 bit Output target readyTDATA_I Input3*G_PIXELS*G_PIXEL_WIDTH bit Input Video DataTVALID_I Input 1 bit Input Video ValidTUSER_I Input 4 bits Bit 0 = frame endBit 1 = unusedBit 2 = unusedBit 3 = unusedTDATA_O Output 3*G_PIXELS*G_PIXEL_WIDTH bit Output Video DataTVALID_O Output 1 bit Output Video Valid TUSER_OOutput4 bitsBit 0 = frame end Bit 1 = unused Bit 2 = unused Bit 3 = unusedTLAST_O Output 1 bitOutput Video End of Frame TSTRB_O Output G_DATA_WIDTH/8Output Video Data strobe TKEEP_OOutputG_DATA_WIDTH/8Output Video Data KeepTable 3 • Input and Output Ports for AXI4 Stream Video InterfacePort Name Type Width DescriptionIP has four specific register through that user can dynamically control the operation of IP .3.3Configuration ParametersThe following table lists the configuration parameters used in the hardware implementation of the Image Enhancement. These parameters are generic and can be varied based on the application requirement. 3.4IP ConfiguratorThe IP configurator is shown in the following figure.Figure 2 •Image Enhancement IP ConfiguratorTable 4 •Register Map and DescriptionAddress (hex)Register name Type Description0x004R_CONST_ADDR Read/Write Input constant to multiply with R data 0x008G_CONST_ADDR Read/Write Input constant to multiply with G data 0x00C B_CONST_ADDR Read/Write Input constant to multiply with B data 0x010SECOND_CONST_ADDRRead/WriteInput constant with brightness and contrastTable 5 •Configuration ParametersParameter Name DescriptionNumber of Pixels Number of pixels per clock 1 and Number of pixels per clock 4Pixel Width Bit width of each pixelVideo Interface Native Video Interface and AXI4 Stream Video InterfaceConfiguration InterfaceNative Configuration Interface and AXI4-Lite Configuration InterfaceTiming Diagrams4Timing DiagramsThe following figure shows the timing diagram of the Image Enhancement IP.Figure 3 • Image Enhancement Output from Testbench4.1LicenseImage Enhancement clear RTL is license locked, and the encrypted RTL is available for free.4.1.1EncryptedComplete RTL code is provided for the core, allowing it to be instantiated with the SmartDesign tool.Simulation, synthesis, and layout can be performed within Libero® System-on-Chip (SoC). The RTL codeis encrypted for the core.4.1.2RTLComplete RTL source code is provided for the core.5TestbenchA test bench is provided to check the functionality of Image Enhancement IP when ImageEnhancement_C0 is instantiated. This test bench works only with Native Video Interface and NativeConfiguration Interface for a data width of 8 in 1 pixel mode of operation.5.1Simulation StepsThe following steps describe how to simulate the core using the testbench:1.On Libero SoC Design Flow, expand Create Design and open Create SmartDesign Testbench asshown in the following figure.Figure 4 • Opening New SmartDesign Testbench2.Enter a name for the SmartDesign testbench and click OK as shown in Figure6, page11. TheSmartDesign testbench is created, and a canvas appears to the right of the Design Flow pane. Figure 5 • Creating a SmartDesign Testbench3.Go to Libero SoC Catalog > View > Windows > Catalog, and then expand Solutions-Video.Figure 6 • Image Enhancement Core in Libero SoC Catalog4.Drag and drop the Image Enhancement IP core in to the new SmartDesign testbench canvas. TheIP appears, as shown in the following figure.Figure 7 • Image Enhancement Core on SmartDesign Testbench Canvas5.Select all of the ports and promote them to top level, as shown in the following figure.Figure 8 • Promote to Top-Level6.To generate the testbench component, select Generate Component from the SmartDesign toolbar,as highlighted in the following figure.Figure 9 • Generating Image Enhancement Component with Ports Promoted to Top Level7.Go to the Stimulus Hierarchy tab and select Image_Enhancement (Image_Enhancement_tb.vhd) >Simulate Pre-Synth Design > Open Interactively. The IP is simulated for one frame.8.ModelSim opens with the testbench file as shown in the following figure.Figure 10 • ModelSim Simulation WindowResource Utilization6Resource UtilizationThe Image Enhancement IP is implemented on SmartFusion ®2 System-on-Chip (SoC) Field Programmable Gate Array (FPGA) device (M2S150T-1152 FC package) and PolarFire ® FPGA (MPF300TS-1FCG1152E package).Table 6 • Resource Utilization on PolarFire 11.For G_PIXEL_WIDTH = 8.Resource Usage DFFs 1734-input LUTs 139MACC 3RAM1Kx180RAM64x18Table 7 • Resource Utilization on SmartFusion211.For G_PIXEL_WIDTH = 8.Resource Usage DFFs 1734-input LUTs 141MACC 3RAM1Kx180RAM64x18。

三星 SMC-212F 152F 说明书

4 路输入/1 路输出，VCR 输入，RCA 型插座
MENU （项目）（对比度，亮度，色调 (NTSC)，色度，清晰度，自动切换时间，自动跳跃，摄像机菜单，预设）
主电源范围AC ：90V~260V 或参照机身后面的指示范围
90W
490mm ×444mm ×482mm （不带包装）
约31kg （带包装）
500 线
NTS围：±500HZ
行同步保持范围：±500HZ
引入范围：±4HZ
保持范围：±4HZ
引入范围：±400HZ
保持范围：±400HZ
1.5W
小于0.4mm （中心）
10%
0 — + 40 ℃
10 —90%（不凝结）
前面板部件及控制开关
SMC-152F
SMC-212F c-10
比度），Brightness （亮度），Sharpness （清晰度）,Color(色度)，
c-7
Tint(色调)（NTSC ），Auto time （自动切换时间），Auto skip （自动
跳跃），Camera OSD （摄像机菜单），Preset(预设) 〉。
稳压电源供应可以使设备在线电压上下波动时仍能保持优良性能。
注意事项电击危险，请勿打开。注意事项：为减少电击事故，请勿拿掉外壳（或后盖）。内部没有用户可维修的部件。请将维修工作委托给专业维修人员。
图形符号说明
等边三角形内带箭头的闪电符号，用于提醒用户注意该产品外壳内有非绝缘的“危险电压”，可能使人触电。
c-3 等边三角形内的惊叹号，用于提醒用户注意使用设备所附资料中重要的操作和维护(维修)说明。
c-4
失CATV转换器的授权代码，则不可出于清洁或其他目的拔掉插头。

SMK1260WF TO-220F-3L 规格书AUK推荐

SMK1260WFAdvanced N-Ch Power MOSFETPIN ConnectionDSTO-220F-3LGSWITCHING REGULATOR APPLICATIONS Features∙ High Voltage : BV DSS =600V(Min.)∙ Low C rss : C rss =14.6pF(Typ.)∙ Low gate charge : Qg=41nC(Typ.) ∙ Low R DS(on) : R DS(on)=0.65Ω(Max.)Ordering Information* SMK1260WF : Pb Free Product* SMK1260WF (HF) : Halogen Free ProductMarking DiagramAbsolute maximum ratings (T C =25︒C unless otherwise noted)Characteristic Symbol Rating UnitDrain-source voltage V DSS 600 V Gate-source voltage V GSS ±30 VDrain current (DC) * I DT C =25︒C 12AT C =100︒C7.1 ADrain current (Pulsed) * I DM 48 APower dissipationP D 45 W Avalanche current (Single) ② I AS 12 ASingle pulsed avalanche energy ② E AS 549 mJ Avalanche current (Repetitive) ① I AR 12 ARepetitive avalanche energy ① E AR 11.6 mJ Junction temperature T J 150︒CStorage temperature rangeT stg -55~150* Limited by maximum junction temperatureCharacteristic Symbol Typ. Max. UnitThermal resistance Junction-case R th(J-C) -2.7 ︒C/WJunction-ambient R th(J-A) - 62.5Type No.MarkingPackage CodeSMK1260WF (HF) SMK1260 TO-220F-3LSMK1260WFElectrical Characteristics (T C =25︒C unless otherwise noted)Characteristic SymbolTest Condition Min. Typ. Max.UnitDrain-source breakdown voltage BV DSS I D =250uA, V GS =0V 600- - V Gate threshold voltage V GS(th) I D =250uA, V DS =V GS 2.0 - 4.0 V Drain-source cut-off current I DSS V DS =600V , V GS =0V - - 1 uA Gate leakage currentI GSS V DS =0V , V GS =±30V- -±100 nADrain-source on-resistance ④ R DS(on) V GS =10V , I D = 6.0A - 0.55 0.65Ω Forward transfer conductance ④ g fs V DS =10V , I D = 6.0A - 10 - SInput capacitance C issV GS =0V , V DS =25Vf=1 MHz- 2162 2882pFOutput capacitanceC oss - 183 244 Reverse transfer capacitance C rss - 14.6 19.4 Turn-on delay time t d(on)V DD =300V , I D =12A R G =25Ω ③④ - 30 -nsRise timet r - 85 -Turn-off delay time t d(off) - 140 - Fall timet f - 90 -Total gate charge Q gV DS =480V , V GS =10V I D =12A ③④- 41 63nC Gate-source charge Q gs - 13 - Gate-drain chargeQ gd - 10.5 -Source-Drain Diode Ratings and Characteristics (T C =25︒C unless otherwise noted)Characteristic SymbolTest Condition Min. Typ. Max.UnitSource current (DC)I SIntegral reverse diodein the MOSFET - - 12 ASource current (Pulsed) ① I SM - - 48 Forward voltage ④ V SD V GS =0V , I S =12A - - 1.4 V Reverse recovery time t rrI S =12A, V GS =0V dI F /dt=100A/us - 510 - ns Reverse recovery chargeQ rr - 4.3 - uCNote ;① Repetitive rating : Pulse width limited by maximum junction temperature ② L=7mH, I AS =12A, V DD =50V , R G =25Ω, Starting T J =25︒C ③ Pulse Test : Pulse width ≤300us, Duty cycle ≤2% ④ Essentially independent of operating temperatureElectrical Characteristic CurvesElectrical Characteristic CurvesSMK1260WFFig. 11 Gate Charge Test Circuit & WaveformFig. 12 Resistive Switching Test Circuit & WaveformFig. 13 E AS Test Circuit & WaveformFig. 14 Diode Reverse Recovery Time Test Circuit & WaveformOutline Dimensionunit: mmThe AUK Corp. products are intended for the use as components in general electronic equipment (Office and communication equipment, measuring equipment, home appliance, etc.).Please make sure that you consult with us before you use these AUK Corp. products in equipments which require high quality and / or reliability, and in equipments which could have major impact to the welfare of human life(atomic energy control, airplane, spaceship, transportation, combustion control, all types of safety device, etc.). AUK Corp. cannot accept liability to any damage which may occur in case these AUK Corp. products were used in the mentioned equipments without prior consultation with AUK Corp..Specifications mentioned in this publication are subject to change without notice.。

博晶微十二按键触摸芯片SC12A应用方案-奥伟斯

SC12A 是带自校正的容性触摸感应器，可以检测 12 个感应盘是否被触摸。

它可以通过任何非导电介质（如玻璃和塑料）来感应电容变化。

这种电容感应的开关可以应用在很多电子产品上，提高产品的附加值。

SC12A特征◇12 个完全独立的触摸感应按键◇保持自动校正，无需外部干预◇按键输出经过完全消抖处理◇多接口– I2C 串行接口/ BCD 码输出◇所有按键共用一个灵敏度电容◇感应线长度不同不会导致灵敏度不同◇ 2.5V ~ 6.0V 工作电压◇符合 RoHS 指令的环保 SOP24封装深圳市奥伟斯科技有限公司是一家专注触摸芯片,单片机,电源管理芯片,语音芯片,场效应管,显示驱动芯片,网络接收芯片,运算放大器,红外线接收头及其它半导体产品的研发,代理销售推广的高新技术企业。

自成立以来一直致力于新半导体产品在国内的推广与销售,年销售额超过壹亿人民币，是一家具有综合竞争优势的专业电子元器件代理商。

主要品牌产品:一、OWEIS-TECH：OWEIS 触摸芯片、 OWEIS 接口芯片、 OWEIS 电源芯片、 OWEIS 语音芯片、 OWEIS 场效应管一、电容式触摸芯片、ADSEMI 触摸芯片代理、芯邦科技触控芯片、万代科技触摸按键芯片、博晶微触摸控制芯片、海栎创触摸感应芯片、启攀微触摸、 IC 融和微触摸感应、IC 合泰触摸按键、IC 通泰触摸芯片二、汽车电子/电源管理/接口芯片/逻辑芯片:IKSEMICON 一级代理、 ILN2003ADT、IK62783DT、 IL2596、IL2576 、ILX485、 ILX3485、 ILX232 、ILX3232三、功率器件/接收头/光电开关:KODENSHI、 AUK、 SMK系列、 MOS管、SMK0260F、 SMK0460F、SMK0760F、 SMK1260F、 SMK1820F、 SMK18T50F四、LED 显示驱动芯片:中微爱芯 AIP 系列： AIP1668、 AIP1628 、AIP1629 、AIP1616 、天微电子 TM 系列： TM1628 TM1668 TM1621五、电源管理芯片:Power Integrations LNK364PN LNK564PN 芯朋微 PN8012 PN8015 AP5054 AP5056 力生美晶源微友达天钰电子FR9886 FR9888六、语音芯片:APLUS 巨华电子AP23085 AP23170 AP23341 AP23682 AP89085 AP89170 AP89341 AP89341K AP89682七、运算放大器:3PEAK 运算放大器、聚洵运算放大器、圣邦微运算放大器八八、发光二极管:OSRAM 欧司朗发光二极管、Lite-On 光宝发光二极管、Everlight 亿光发光二极管、 Kingbright 今台发光二极管九、CAN收发器:NXP恩智浦CAN收发器、Microchip微芯CAN收发器十、分销产品线:ONSEMI安森美 TI德州仪器 ADI TOSHIBA东芝 AVAGO安华高十一、 MCU单片机ABOV现代单片机MC96F系列、 Microchip微芯单片机PIC12F PIC16F PIC18F系列、 FUJITSU富仕通单片机MB95F系列、STM单片机STM32F STM32L系列、 CKS中科芯单片机CKS32F系列、TI单片机 MSP430系列、TMS320F系列、 NXP单片机LPC系列下面，奥伟斯主要给大家详细介绍晶尊微十二按键触摸芯片SC12A的相关产品信息：1.3 应用◇替代机械开关◇家庭应用(电视机, 显示器键盘)◇玩具和互动游戏的人机接口◇门禁按键◇灯控开关◇密封键盘面板1.4封装1.5 管脚列表1.6 管脚说明VDD, GND电源正负输入端。

FPM-2120G 2150G 2170G系列12英寸XGA 15英寸XGA 17英寸SXGA工业L

User ManualFPM-2120G/2150G/2170G Series12"XGA/15" XGA/17" SXGAIndustrial LED Monitor withResistive Touchscreen, VGADisplay Port and DC12 V Input顯示器CopyrightThe documentation and the software included with this product are copyrighted 2013 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable. How-ever, Advantech Co., Ltd. assumes no responsibility for its use, nor for any infringe-ments of the rights of third parties, which may result from its use. AcknowledgementsIntel and Pentium are trademarks of Intel Corporation.Microsoft Windows® are registered trademarks of Microsoft Corp.All other product names or trademarks are properties of their respective owners.This manual includes the following products:FPM-2170G-R3BE;FPM-2150G-R3BE;FPM-2120G-R3BE;FPM-2170GR3B1601-T;FPM-2170GR3B1701-T;FPM-2170GR3B1801-T;FPM-2170GR3B1602-T;FPM-2170GR3B1702-T;FPM-2170GR3B1802-T;FPM-2170GR3B1603-T;FPM-2170GR3B1703-T;FPM-2170GR3B1803-T;FPM-2170GR3B1604-T;FPM-2170GR3B1704-T;FPM-2170GR3B1804-T;FPM-2150GR3B1601-T;FPM-2150GR3B1701-T;FPM-2150GR3B1801-T;FPM-2150GR3B1602-T;FPM-2150GR3B1702-T;FPM-2150GR3B1802-T;FPM-2150GR3B1603-T;FPM-2150GR3B1703-T;FPM-2150GR3B1803-T;FPM-2150GR3B1604-T;FPM-2150GR3B1704-T;FPM-2150GR3B1804-T;FPM-2120GR3B1601-T;FPM-2120GR3B1701-T;FPM-2120GR3B1801-T;FPM-2120GR3B1602-T;FPM-2120GR3B1702-T;FPM-2120GR3B1802-T;FPM-2120GR3B1603-T;FPM-2120GR3B1703-T;FPM-2120GR3B1803-T;FPM-2120GR3B1604-T; FPM-2120GR3B1704-T; FPM-2120GR3B1804-TPart No. 2003215050Edition 2Printed in China January 2016FPM-2120G/2150G/2170G Series User Manual iiProduct Warranty (2 years)Advantech warrants to you, the original purchaser, that each of its products will be free from defects in materials and workmanship for two years from the date of pur-chase.This warranty does not apply to any products which have been repaired or altered by persons other than repair personnel authorized by Advantech, or which have been subject to misuse, abuse, accident or improper installation. Advantech assumes no liability under the terms of this warranty as a consequence of such events.Because of Advantech’s high quality-control standards and rigorous testing, most of our customers never need to use our repair service. If an Advantech product is defec-tive, it will be repaired or replaced at no charge during the warranty period. For out-of-warranty repairs, you will be billed according to the cost of replacement materials, service time and freight. Please consult your dealer for more details.If you think you have a defective product, follow these steps:1.Collect all the information about the problem encountered. (For example, CPUspeed, Advantech products used, other hardware and software used, etc.) Noteanything abnormal and list any onscreen messages you get when the problemoccurs.2.Call your dealer and describe the problem. Please have your manual, product,and any helpful information readily available.3.If your product is diagnosed as defective, obtain an RMA (return merchandizeauthorization) number from your dealer. This allows us to process your returnmore quickly.4.Carefully pack the defective product, a fully-completed Repair and ReplacementOrder Card and a photocopy proof of purchase date (such as your sales receipt)in a shippable container. A product returned without proof of the purchase dateis not eligible for warranty service.5.Write the RMA number visibly on the outside of the package and ship it prepaidto your dealer.[警告使用者：這是甲類資訊產品，在居住的環境中使用時，可能會造成射頻干擾，在這種情況下，使用者會被要求採取某些適當對策。

Macro 系列 R1 - 4K - DS R1 - 5K - DS R1 - 6K - DS 用户

R1 - 4K - DS R1 - 5K - DS R1 - 6K - DS用户手册R1 - 8K - DS R1 - 10K - DS目录1. 产品简介..........................................................1. 1 简介.............................................................. 1. 2 符号释义...........................................................1. 3 重要安全信息.......................................................1. 4 系统容量...........................................................2. 逆变器技术说明....................................................2. 1 外观设计...........................................................2. 2 电气系统设计.......................................................2. 3 技术数据...........................................................2. 4 安规代码...........................................................3. 安装与启动.........................................................3. 1 包装信息...........................................................3. 2 安装环境...........................................................3. 3 安装方向...........................................................3. 4 安装步骤...........................................................3. 5 电气连接...........................................................3. 5. 1 连接电网(交流输出).................................................3. 5. 2 连接光伏组串 (直流输入).............................................3. 5. 3 通信............................................................. 3. 6 运行逆变器.........................................................4. 操作界面...........................................................4. 1 指示灯与按键.......................................................4. 2 显示屏............................................................. 4. 3 恢复出厂设置.......................................................4. 4 设置语言...........................................................4. 5 设置通讯地址.......................................................4. 6 设置并网功率 (CT)...................................................5. 质保............................................................... 5. 1 质保申请步骤.......................................................5. 2 质保期满后服务.....................................................6. 故障排查与维护....................................................6. 1 故障排查..........................................................6. 2 维护.............................................................. 6. 2. 1 日常维护 (2)2233445691111111213141415161818181919202020202021212122231. 2 符号释义1. 产品简介本手册介绍以下光伏逆变器：R1-4K-DS / R1-5K-DS / R1-6K-DS / R1-8K-DS / R1-10K-DS。