MAX AND MIN FUNCTIONS USING MULTIPLE-VALUED RECHARGED SEMI-FLOATING GATE CIRCUITS

MAX AND MIN FUNCTIONS USING MULTIPLE-V ALUED RECHARGED

SEMI-FLOATING GATE CIRCUITS

H.Gundersen and Y.Berg

Department of Informatics,University of Oslo,Blindern,N-0316Oslo,Norway

henningg@ifi.uio.no

ABSTRACT

In this paper we present a new proposal for implementing

a voltage-mode Multiple-Valued(MV)maximum or min-imum function.The circuit has been implemented using Recharged Semi Floating-Gate(SFG)transistors.The ben-

efit with this design is,the proposed circuits can easily be fabricated using a conventional CMOS process.The cir-

cuit is suitable for a low power design,V dd<2volt.It has high noise margin and good linearity.The simulation results for the proposed circuit are evaluated using AMS0.35µm

CMOS device parameters.

1.INTRODUCTION

Multiple-valued logic has in the last few decades been pro-

posed as a possible alternative to binary logic.Whereas bi-nary logic is limited to only two states,”true”and”false”, multiple-valued logic(MVL)replaces these withfinitely or infinitely numbers of values.A MVL system is defined as a system operating on a higher radix than two[1].A radix-n set has n elements,{0,1,....,n-1}.The feasibility of MVL depends on the availability of the devices constructed for MVL operations[2].The devices should be able to switch between the different logical levels,and preferably be less complex than the binary counterparts.

The multiple-input FG transistors can be used to sim-

plify the design of multiple-valued logic[3].The ini-tial charge on thefloating-gates may vary significantly and therefore impose a very severe inaccuracy unless we apply some form of initialization.Some work onfloating-gate re-set strategies have been presented[4][5].

By recharging of the semi-floating-gate(SFG)we do not

only avoid the problems linked to programming or initial-izing of thefloating gates,but we convert the non-volatile floating gates to semi-floating-gates.The control of the ac-tualfloating gate charges in terms of predictable long term charge restoration becomes easier.The SFG is not influ-enced by a random FG charge distortion due to a periodic or frequent charge restoration or reset.The recharge of the SFGs is accomplished by a local recharge transistor or a pass gate temporarily connecting the output to thefloating gate of a gate.

One of the most fundamental function in all digital logic is the inverter or the NOT function.The Recharged SFG bi-nary inverter and the SFG MVL inverter will briefly be pre-sented in section2.Section3covers an important function in Multiple-valued Logic,the Down-Literal Circuit.In sec-tion4we look closer on the Pass Gate circuit.Section5will look upon realization of the voltage mode MAX and MIN functions using SFG Recharged Logic.

2.RECHARGED SFG INVERTERS

2.1.The SFG Recharged Binary Inverter

Clk

Vin

Vsfg

Vout

Vout

Ne

Pe

Vsfg

Vin

Ci Ci

Clk

Fig.1.SFG binary inverter.The transistor sizes are P e(w= 3.0µm and l=0.35µm)and N e(w=0.6µm and l=0.35µm). The capacitor C i is equal to7.7fF

The inverter is truly a fundamental gate in all digi-tal logic.The simple Recharged single input SFG Binary Inverter[5]is shown in Figure1.The SFG Binary Inverter acts just like an ordinary inverter,except it has a recharge Clk signal,the transfer characteristics is given in Figure7, output signal labeled Bin Inverter.As we can see the output signal is“0”or“1”in the validation period of the recharged signal and V dd/2in the recharge period.

2.2.The SFG Recharged MVL Inverter

The analog inverter is very useful for realization of the NOT function in multi-valued logic[6].In order to make a voltage

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