V29C51002T-90P资料

+5.0 V
IN3064 or Equivalent
2.7 kΩ
6.2 kΩ
IN3064 or Equivalent IN3064 or Equivalent
IN3064 or Equivalent
Units pF pF pF
Unit V V mA
51002-08
V29C51002T/V29C51002B Rev. 2.1 October 2000
DC Electrical Characteristics (over the commercial operating range)
Parameter Name
VIL VIH IIL IOL VOL VOH ICC1
Parameter Input LOW Voltage Input HIGH Voltage Input Leakage Current Output Leakage Current Output LOW Voltage Output HIGH Voltage Read Current
The V29C51002T/V29C51002B features a sector erase operation which allows each sector to be erased and reprogrammed without affecting data stored in other sectors. The device also supports full chip erase.
10
A15
11
A12
12
A7
13
A6
14
A5
15
A4
16
32-Pin TSOP I Standard Pinout
Top View
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
51002-04
OE A10
CE I/O7 I/O6 I/O5
I/O4 I/O3 GND
24 OE
A2 10
23 A10
A1 11
22 CE
A0 12
21 I/O7
I/O0 13
20 I/O6
I/O1 14
19 I/O5
I/O2 15
18 I/O4
GND 16
17 I/O3
51002-02
I/O1
I/O2
I/O3
4 3 2 1 32 31 30
A7 5
29 A14
A6 6
28 A13
A5 7
0 to +70
°C
200 (Max.)
mA
NOTE: 1. Stress greater than those listed unders “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
CIN
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
NOTE: 1. Capacitance is sampled and not 100% tested. 2. TA = 25°C, VCC = 5V ± 10%, f = 1 MHz.
Package Outline
P
T
J
•
•
•
Access Time (ns)
55
90
•
•
Temperature Mark
Blank
V29C51002T/V29C51002B Rev. 2.1 October 2000
1
元器件交易网
MOSEL VITELIC
V29C51002T/V29C51002B
51002-01
Pin Configurations
A17
WE
VCC
NC
A16
A15
A12
N/C 1
32 VCC
A16 2
31 WE
A15 3
30 A17
A12 4
29 A14
A7 5
28 A13
A6 6
27 A8
A5 7 32-Pin PDIP 26 A9
A4 8 Top View 25 A11
A3 9
Address Inputs Data Input/Output Chip Enable Output Enable Write Enable 5V ± 10% Power Supply Ground No Connect
GND
A11
1
A9
2
A8
3
A13
4
A14
5
A17
6
WE
7
VCC
8
N/C
9
A16
V 29 C 51 002 T –
OPERATING VOLTAGE 51: 5V
DEVICE
BOOT BLOCK LOCATION T: TOP
B: BOTTOM
SPEED
PKG. TEMP.
55: 55ns 90: 90ns
P = PDIP T = TSOP-I
J = PLCC
BLANK (0°C TO 70°C)
V
Vቤተ መጻሕፍቲ ባይዱN
Input Voltage (A9 pin, OE)
-2 to +13
V
VCC
Power Supply Voltage
-0.5 to +5.5
V
TSTG
Storage Temerpature (Plastic)
-65 to +125
°C
TOPR IOUT
Operating Temperature Short Circuit Current(2)
2,097,152 Bit Memory Cell Array
A0–A17
Address buffer & latches
Y-Decoder
CE
OE
Control Logic
WE
I/O Buffer & Data Latches
I/O0–I/O7
51002-07
Capacitance (1,2)
Symbol Parameter
VCC Current NOTE: 1. Includes all pins except VCC. Test conditions: VCC = 5V, one pin at a time.
-1 -1 -100
+13 VCC + 1
+100
AC Test Load
Device Under Test CL = 100 pF
Latch Up Characteristics(1)
Test Setup VIN = 0 VOUT = 0 VIN = 0
Typ. 6 8 8
Max. 8 12 10
Parameter
Min.
Max.
Input Voltage with Respect to GND on A9, OE Input Voltage with Respect to GND on I/O, address or control pins
The V29C51002T/V29C51002B is ideal for applications that require updatable code and data storage.
Device Usage Chart
Operating Temperature
Range
0°C to 70°C
元器件交易网
MOSEL VITELIC
V29C51002T/V29C51002B 2 MEGABIT (262,144 x 8 BIT) 5 VOLT CMOS FLASH MEMORY
PRELIMINARY
Features
s 256Kx8-bit Organization s Address Access Time: 55, 90 ns s Single 5V ± 10% Power Supply s Sector Erase Mode Operation s 16KB Boot Block (lockable) s 512 bytes per Sector, 512 Sectors
– Sector-Erase Cycle Time: 10ms (Max) – Byte-Write Cycle Time: 20µs (Max) s Minimum 10,000 Erase-Program Cycles s Low power dissipation – Active Read Current: 20mA (Typ) – Active Program Current: 30mA (Typ) – Standby Current: 100µA (Max) s Hardware Data Protection s Low VCC Program Inhibit Below 3.5V s Self-timed write/erase operations with end-of-cycle detection – DATA Polling – Toggle Bit s CMOS and TTL Interface s Available in two versions – V29C51002T (Top Boot Block) – V29C51002B (Bottom Boot Block) s Packages: – 32-pin Plastic DIP – 32-pin TSOP-I – 32-pin PLCC
Description
The V29C51002T/V29C51002B is a high speed 262,144 x 8 bit CMOS flash memory. Writing or erasing the device is done with a single 5 Volt power supply. The device has separate chip enable CE, write enable WE, and output enable OE controls to eliminate bus contention.
3
元器件交易网
MOSEL VITELIC
V29C51002T/V29C51002B
Absolute Maximum Ratings(1)
Symbol
Parameter
Commercial
Unit
VIN
Input Voltage (input or I/O pins)
-2 to +7
Boot block architecture enables the device to boot from a protected sector located either at the top (V29C51002T) or the bottom (V29C51002B). All inputs and outputs are CMOS and TTL compatible.
The V29C51002T/V29C51002B offers a combination of: Boot Block with Sector Erase/Write Mode. The end of write/erase cycle is detected by DATA Polling of I/O7 or by the Toggle Bit I/O6.
I/O2
I/O1 I/O0 A0 A1 A2 A3
V29C51002T/V29C51002B Rev. 2.1 October 2000
2
元器件交易网
MOSEL VITELIC
Functional Block Diagram
X-Decoder
V29C51002T/V29C51002B
27 A8
A4 8 A3 9 A2 10
32 Pin PLCC Top View
26 A9 25 A11 24 OE
A1 11
23 A10
A0 12
22 CE
I/O0 13
21 I/O7
14 15 16 17 18 19 20
51002-03
I/O4
I/O5
I/O6
Pin Names
A0–A17 I/O0–I/O7 CE OE WE VCC GND NC
rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. No more than one output maybe shorted at a time and not exceeding one second long.