EMI4182MTTAG;中文规格书,Datasheet资料

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IRFTS9342TRPBF;中文规格书,Datasheet资料

IRFTS9342TRPBF;中文规格书,Datasheet资料

IRFTS9342PbFHEXFET ® Power MOSFETNotes through are on page 2Applicationsl Battery operated DC motor inverter MOSFET lSystem/Load SwitchFeatures and Benefitsresults in ⇒PD - 96411AIRFTS9342PbFNotes:Repetitive rating; pulse width limited by max. junction temperature. Pulse width ≤ 400μs; duty cycle ≤ 2%.When mounted on 1 inch square copper board.Static @ T = 25°C (unless otherwise specified)IRFTS9342PbFFig 4. Normalized On-Resistance vs. TemperatureFig 2. Typical Output CharacteristicsFig 1. Typical Output CharacteristicsFig 6. Typical Gate Charge vs.Gate-to-Source VoltageFig 5. Typical Capacitance vs.Drain-to-Source Voltage T J , Junction Temperature (°C)R D S (o n ) , D r a i n -t o -S o u r c e O n R e s i s t a n c e 110100-V DS , Drain-to-Source Voltage (V)10100100010000C , C a p a c i t a n c e (p F )0246810121416Q G Total Gate Charge (nC)0.02.04.06.08.010.012.014.0-V G S , G a t e -t o -S o u r c e V o l t a g e (V )DS -V DS , Drain-to-Source Voltage (V)0.1110100-I D , D r a i n -t o -S o u r c e C u r r e n t (A )IRFTS9342PbFFig 11. Maximum Effective Transient Thermal Impedance, Junction-to-CaseFig 8. Maximum Safe Operating AreaFig 9. Maximum Drain Current vs.Case TemperatureFig 7. Typical Source-Drain Diode Forward VoltageFig 10. Threshold Voltage vs. Temperature255075100125150T A , Ambient Temperature (°C)0123456-I D , D r a i n C u r r e n t (A)0.010.1110100V DS , Drain-to-Source Voltage (V)0.010.11101001000I D , D r a i n -t o -S o u r c e C u r r e n t (A)0.1110100-I S D , R e v e r s e D r a i n C u r r e n t (A )T J , Temperature ( °C )-V G S (t h ), G a t e t h r e s h o l d V o l t a g e (V )IRFTS9342PbFFig 12. On-Resistance vs. Gate VoltageFig 14. Maximum Avalanche Energy vs. Drain Current Fig 15. Typical Power vs. Time* Reverse Polarity of D.U.T for P-Channel* V GS = 5V for Logic Level Devices®2468101214161820-V GS, Gate -to -Source Voltage (V)255075100125150Starting T J , Junction Temperature (°C)020406080100120E A S , S i n g l e P u l s e A v a l a n c h e E n e r g y (m J )Time (sec)P o w e r (W )IRFTS9342PbFFig 17a. Gate Charge Test CircuitFig 17b. Gate Charge WaveformFig 18b. Unclamped Inductive WaveformsFig 18a. Unclamped Inductive Test CircuitFig 19b. Switching Time WaveformsFig 19a. Switching Time Test CircuitIdQgs1Qgs2Qgd QgodrV DDR DV DDI ASV DSV GSt t t tNote: For the most current drawing please refer to IR website at: /package/WW = (27-52) IF PRECEDED BY A LETTERYEA R Y Z52W WORK WEEK 26ZF = IRF5801(a s show n here) indica tes Lead-F ree.Note: A line above the w ork w eek G = IRF5803D = IRF5851E = IRF5852I = IRF 5805C = IRF5850N = IRF 5802K = IRF5810J = IRF5806H = IRF 5804S = Not a pplicable R = IRFTS 9342TRPBF T = IRLT S2242TRPBFIRFTS9342PbFTSOP-6 Tape and Reel Information† Qualification standards can be found at International Rectifier’s web site /product-info/reliability†† Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: /whoto-call/salesrep/†††Applicable version of JEDEC standard at the time of product release.IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105TAC Fax: (310) 252-7903Visit us at for sales contact information . 02/2012Data and specifications subject to change without notice.8mmFEED DIRECTION4mmNOTES :1. OUTLINE CONFORMS TO EIA-481 & EIA-541.9.90 ( .390 )8.40 ( .331 )178.00( 7.008 ) MAX.NOTES:1. CONTROLLING DIMENSION : MILLIMETER.2. OUTLINE CONFORMS TO EIA-481 & EIA-541.Qualification information †分销商库存信息: IRIRFTS9342TRPBF。

EML17T2R;中文规格书,Datasheet资料

EML17T2R;中文规格书,Datasheet资料

Transistors1/3General purpose transistor (isolated transistor and diode)EML17DTA144E and a RB520G-30 are housed independently in a EMT package.z ApplicationsDC / DC converter Motor driverz Features1) Tr : Degital Transistor Di : Low V F 2) Small packagez StructureSilicon epitaxial planar degital transistor Schottky barrier diodez External dimensions (Unit : mm)z Equivalent circuitz Packaging specificationsType EML17EMT5L17T2R 8000Package Marking CodeBasic ordering unit (pieces)Transistors 2/3z Absolute maximum ratings (T a=25°C) Tr2Parameter Symbol V CC V IN I O I C(MAX)TjLimits −50−40 to +10−30−100150Unit V V mA °CSupply voltage Input voltage Output current Junction temperaturePd 120mW Power dissipationDi1, Tr2Parameter SymbolPd Tstg Limits150−55 to +125Unit mW ∗∗ Each terminal mounted on a recommended land.°CPower dissipationRange of storage temperaturez Electrical characteristics (T a=25°C) Di1ParameterSymbol Min.Typ.Max.Unit Conditions−0.45V F −V I F =10mA V R =10VForward voltage I R−−0.5µAReverse current∗ Please pay attention to static electricity when handling.Tr2ParameterSymbol Min.Typ.Max.Unit ConditionsV CE = −10V, I E =5mA, f =100MHz∗∗ Transition frequency of the deviceResistance ratio R 2/R 10.81 1.2−−V I(off)−−−0.5I C = −5V, I O = −100µA Input voltage V I(on)−3.0−−V V O = −0.3V, I O = −2mA V O(on)−−0.1−0.3V I O /I I = −10mA/ −0.5mA Output voltage I I −−−0.18mA V I = −5VInput current I O(off)−−−0.5µA V CC = −50V, V I =0V Output current G 168−−−V O = −5V, I O = −5mADC current gain R 132.94761.1k Ω−Input resistance f T −250−MHz Transition frequencyTransistors 3/3z Electrical characteristic curves Di1R E V E R S E C U R R E N T : I R (n A )REVERSE VOLTAGE : V R (V)Fig.2 Reverse characteristicsF O R W A R D C U R R E N T : I F (m A )FORWARD VOLTAGE : V F (mV)Fig.1 Forward characteristics101525520110100REVERSE VOLTAGE : V R (V)C A P A C I T A N C E B E T W E E N T E R M I N A L S : C T (p F )Fig. 3 Capacitance between terminals characteristics30Tr2I N P U T V O L T A G E : V I (o n ) (V )OUTPUT CURRENT : I O (A)−−−−−−−−−−−Fig.4 Input voltage vs. output current (ON characteristics)−−1−−−−200−500−100−20−50−10−2−5INPUT VOLTAGE : V I(off) (V)O U T P U T C U R R E N T : I o (A )Fig.5 Output current vs. Input voltage (OFF characteristics)−D C C U R R E N T G A I N : G IOUTPUT CURRENT : I O (A)Fig.6 DC current gain vs. output current−−−−−−−−−−−OUTPUT CURRENT : I O (A)O U T P U T V O L T A G E : V O (o n ) (V )Fig.7 Output voltage vs. output currentAppendixAbout Export Control Order in JapanProducts described herein are the objects of controlled goods in Annex 1 (Item 16) of Export T rade ControlOrder in Japan.In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause)on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.Appendix1-Rev1.1分销商库存信息: ROHMEML17T2R。

MEMORY存储芯片MT48LC16M16A2FG-75 ITD中文规格书

MEMORY存储芯片MT48LC16M16A2FG-75 ITD中文规格书

DDR3L SDRAMMT41K1G4 – 128 Meg x 4 x 8 banksMT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banksDescriptionDDR3L SDRAM (1.35V) is a low voltage version of the DDR3 (1.5V) SDRAM. Refer to DDR3 (1.5V) SDRAM (Die Rev :E) data sheet specifications when running in 1.5V compatible mode.Features•V DD = V DDQ = 1.35V (1.283–1.45V)•Backward compatible to V DD = V DDQ = 1.5V ±0.075V –Supports DDR3L devices to be backward com-patible in 1.5V applications•Differential bidirectional data strobe•8n-bit prefetch architecture•Differential clock inputs (CK, CK#)•8 internal banks•Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals •Programmable CAS (READ) latency (CL)•Programmable posted CAS additive latency (AL)•Programmable CAS (WRITE) latency (CWL)•Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS])•Selectable BC4 or BL8 on-the-fly (OTF)•Self refresh mode•T C of 105°C–64ms, 8192-cycle refresh up to 85°C–32ms, 8192-cycle refresh at >85°C to 95°C–16ms, 8192-cycle refresh at >95°C to 105°C •Self refresh temperature (SRT)•Automatic self refresh (ASR)•Write leveling•Multipurpose register•Output driver calibrationOptions Marking •Configuration– 1 Gig x 41G4–512 Meg x 8512M8–256 Meg x 16256M16•FBGA package (Pb-free) – x4, x8–78-ball (9mm x 10.5mm) Rev. E RH–78-ball (7.5mm x 10.6mm) Rev. N RG–78-ball (8mm x 10.5mm) Rev. P DA •FBGA package (Pb-free) – x16–96-ball (9mm x 14mm) Rev. E HA–96-ball (7.5mm x 13.5mm) Rev. N LY–96-ball (8mm x 14mm) Rev. P TW •Timing – cycle time–938ps @ CL = 14 (DDR3-2133)-093– 1.07ns @ CL = 13 (DDR3-1866)-107– 1.25ns @ CL = 11 (DDR3-1600)-125•Operating temperature–Commercial (0°C T C +95°C)None–Industrial (–40°C T C +95°C)IT–Automotive (–40°C T C +105°C)AT •Revision:E/:N/:PTable 1: Key Timing ParametersNotes: 1.Backward compatible to 1600, CL = 11 (-125).2.Backward compatible to 1866, CL = 13 (-107).State DiagramFigure 2: Simplified State DiagramSRX = Self refresh exit WRITE = WR, WRS4, WRS8WRITE AP = WRAP , WRAPS4, WRAPS8ZQCL = ZQ LONG CALIBRATION ZQCS = ZQ SHORT CALIBRATIONCommand sequenceACT = ACTIVATEMPR = Multipurpose register MRS = Mode register set PDE = Power-down entry PDX = Power-down exit PRE = PRECHARGE PREA = PRECHARGE ALL READ = RD, RDS4, RDS8READ AP = RDAP , RDAPS4, RDAPS8REF = REFRESHRESET = START RESET PROCEDURE SRE = Self refresh entryFunctional Block DiagramsDDR3 SDRAM is a high-speed, CMOS dynamic random access memory. It is internallyconfigured as an 8-bank DRAM.Figure 3: 1 Gig x 4 Functional Block DiagramFigure 4: 512 Meg x 8 Functional Block DiagramFigure 5: 256 Meg x 16 Functional Block DiagramTable 19: I DD7 Measurement Loop (Continued)4Gb: x4, x8, x16 DDR3L SDRAMElectrical Specifications – I DD Specifications and Conditions。

ESR18EZPF1541中文资料(rohm)中文数据手册「EasyDatasheet - 矽搜」

ESR18EZPF1541中文资料(rohm)中文数据手册「EasyDatasheet - 矽搜」
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*
和规格如有更改恕不另行通知.
仔细检查使用或订购之前随产品提供规格表.
型号说明
极大 超载ቤተ መጻሕፍቲ ባይዱ电压
(V) 100
200
200
400
400
耐温性 系数容差电阻范围
(ppm / °C) (%)
±200
J(±5%)
±100
F(±1%)
±200
J(±5%)
±100
F(±1%)
±100
D(±0.5%)
±200
J(±5%)
产品列表
Size
额定功率限制元素
型号
(70°C)
电压
(毫米)(英寸)
(W)
(V)
ESR01 1005 0402 0.2
50
ESR03 1608 0603 0.25
150
ESR10 2012 0805 0.4
150
ESR18 3216 1206 0.33
200
ESR25 3225 1210 0.5
200
(mm)
(inch)
1005
0402
1608
0603
2012
0805
3216
1206
3225
1210
L 1.0±0.05 1.6±0.1 2.0±0.1 3.2±0.15 3.2±0.15
W 0.5±0.05 0.8±0.1 1.25±0.1 1.6±0.15 2.5±0.15
t 0.35±0.05 0.45±0.1 0.55±0.1 0.55±0.1 0.55±0.1

2KAX原厂中文规格书

2KAX原厂中文规格书

Rev. 1.1
■ 功能框图
SP4054
■ 电学特性参数
输入电压
参数
输入电流
输出控制电压
BAT端电流
涓流充电电流
标号 Vcc Icc Vfloat
Ibat
Itrikl
条件
Charge mode,Rprog=10K Standby mode Shutdown mode(Rprog not connected,Vcc<Vbat or Vcc<Vuv) 0℃<TA<85℃, IBAT = 40mA Rprog=10k,Current mode Rprog=2k,Current mode Standby mode,Vbat=4.2V Shutdown mode Battery reverse mode, VBAT=-4V Sleep mode,Vcc=0V Vbat<Vtrikl,Rprog=2k
■ 封装
SOT-23-5L
5
4
PROG
VCC
SOT-89-5L
CHRG GND BAT
12 3
SOT-23-5L (Top View)
5
4
PROG PROG
VCC
CHRG GND BAT
1 23 1 SOT-829-5L 3
(Top View)
SP4054 ①②③④⑤⑥
标号 ① ②③ ④
描述 类型
Rev. 1.1
涓流充电极限电压 涓流充电迟滞电压 电源低电闭锁阈值电压 电源低电阈值电压迟滞电压 手动关闭阈值电压
Vcc-Vbat停止工作阈值电压
C/10 终端阈值电流 PROG端电压 CHRG端弱下拉电流 CHRG端最小输出电压 电池再充电迟滞电压

MEMORY存储芯片MT48LC16M16A2P-6A ITG中文规格书

MEMORY存储芯片MT48LC16M16A2P-6A ITG中文规格书

Table 50: DDR3L Differential Output Driver Characteristics V OX(AC)Notes:1.RZQ of 240˖ ±1% with RZQ/7 enabled (default 34˖ driver) and is applicable after prop-er ZQ calibration has been performed at a stable temperature and voltage (V DDQ = V DD ;V SSQ = V SS ).2.See Figure 31 (page 75) for the test load configuration.3.See Figure 30 (page 74) for an example of a differential output signal.4.For a differential slew rate between the list values, the V OX(AC) value may be obtainedby linear interpolation.Figure 30: Differential Output SignalV OHMIN outputMAX outputV OLV OX(AC)maxV OX(AC)minReference Output LoadFigure 31 (page 75) represents the effective reference load of 25ȍ used in defining the relevant device AC timing parameters (except ODT reference timing) as well as the out-put slew rate measurements. It is not intended to be a precise representation of a partic-ular system environment or a depiction of the actual load presented by a production tester. System designers should use IBIS or other simulation tools to correlate the tim-ing reference load to a system environment.Figure 31: Reference Output Load for AC Timing and Output Slew RateV TT = V DDQ /2V SSSlew Rate Definitions for Single-Ended Output SignalsThe single-ended output driver is summarized in Table 48 (page 72). With the reference load for timing measurements, the output slew rate for falling and rising edges is de-fined and measured between V OL(AC) and V OH(AC) for single-ended signals.Table 51: Single-Ended Output Slew Rate Definition4Gb: x4, x8, x16 DDR3L SDRAMOutput Characteristics and Operating Conditionsleast once every 70.3μs. When T C is greater than 85°C, but less the 95°C, the refresh peri-od is 32ms. When T C is greater than 95°C, but less the 105°C, the refresh period is 16ms.37.Although CKE is allowed to be registered LOW after a REFRESH command whent REFPDEN (MIN) is satisfied, there are cases where additional time such as t XPDLL (MIN) is required.38.ODT turn-on time MIN is when the device leaves High-Z and ODT resistance begins toturn on. ODT turn-on time maximum is when the ODT resistance is fully on. The ODT reference load is shown in Figure 24 (page 63). This output load is used for ODT timings (see Figure 31 (page 75)).Designs that were created prior to JEDEC tightening the maxi-mum limit from 9ns to 8.5ns will be allowed to have a 9ns maximum.39.Half-clock output parameters must be derated by the actual t ERR10per and t JITdty wheninput clock jitter is present. This results in each parameter becoming larger. The parame-ters t ADC (MIN) and t AOF (MIN) are each required to be derated by subtracting both t ERR10per (MAX) and t JITdty (MAX). The parameters t ADC (MAX) and t AOF (MAX) are required to be derated by subtracting both t ERR10per (MAX) and t JITdty (MAX).4Gb: x4, x8, x16 DDR3L SDRAMElectrical Characteristics and AC Operating Conditions。

MSP430F249MPMEP;中文规格书,Datasheet资料

MSP430F249MPMEP;中文规格书,Datasheet资料

Less Than 1 μsD 16-Bit RISC Architecture, 62.5-ns Instruction Cycle TimeDBasic Clock Module Configurations:− Internal Frequencies up to 16 MHz − Internal Very Low Power LF Oscillator − 32-kHz Crystal (−405C to 1055C only)− Internal Frequencies up to 16 MHz With Four Calibrated Frequencies to +1%− Resonator− External Digital Clock Source − External ResistorD 12-Bit Analog-to-Digital (A/D) Converter With Internal Reference, Sample-and-Hold,and Autoscan Feature D 16-Bit Timer_A With Three Capture/Compare Registers D16-Bit Timer_B With SevenCapture/Compare-With-Shadow Registers†The MSP430F24x1 devices are identical to the MSP430F24x devices, with the exception that the ADC12 module is not implemented.− Synchronous SPI − USCI_B0 and USCI_B1− I 2C t− Synchronous SPI D On-Chip ComparatorD Supply Voltage Supervisor/Monitor With Programmable Level Detection D Brownout Detector D Bootstrap LoaderDSerial Onboard Programming,No External Programming Voltage Needed,Programmable Code Protection by Security FuseD Family Members Include:− MSP430F24960KB+256B Flash Memory, 2KB RAM D Available in 64-Pin QFP Package (See Available Options)DFor Complete Module Descriptions, See MSP430x2xx Family User’s Guide ,Literature Number SLAU144descriptionThe T exas Instruments MSP430 family of ultra-low power microcontrollers consists of several devices featuring different sets of peripherals targeted for various applications. The architecture, combined with five low-power modes, is optimized to achieve extended battery life in portable measurement applications. The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code efficiency. The calibrated digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 1 μs.Copyright © 2008, Texas Instruments IncorporatedPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.2008description (continued)The MSP430F249 series are microcontroller configurations with two built-in 16-bit timers, a fast 12-bit A/D converter, a comparator, four universal serial communication interface (USCI) modules, and up to 48 I/O pins.Typical applications include sensor systems, industrial control applications, hand-held meters, etc.AVAILABLE OPTIONSPACKAGET A PLASTIC 64-PIN QFP(PM)−55°C to 125°C MSP430F249MPMEP2008 pin designationMSP430F24x2008functional block diagram2008Terminal FunctionsTERMINALNAME NO.I/O DESCRIPTIONAV CC64Analog supply voltage, positive terminal. Supplies only the analog portion of ADC12.AV SS62Analog supply voltage, negative terminal. Supplies only the analog portion of ADC12.DV CC1Digital supply voltage, positive terminal. Supplies all digital parts.DV SS63Digital supply voltage, negative terminal. Supplies all digital parts.P1.0/TACLK/CAOUT12I/O General-purpose digital I/O / Timer_A, clock signal TACLK input/Comparator_A outputP1.1/TA013I/O General-purpose digital I/O / Timer_A, capture: CCI0A input, compare: Out0 output/BSL transmitP1.2/TA114I/O General-purpose digital I/O / Timer_A, capture: CCI1A input, compare: Out1 outputP1.3/TA215I/O General-purpose digital I/O / Timer_A, capture: CCI2A input, compare: Out2 outputP1.4/SMCLK16I/O General-purpose digital I/O / SMCLK signal outputP1.5/TA017I/O General-purpose digital I/O / Timer_A, compare: Out0 outputP1.6/TA118I/O General-purpose digital I/O / Timer_A, compare: Out1 outputP1.7/TA219I/O General-purpose digital I/O / Timer_A, compare: Out2 outputP2.0/ACLK/CA220I/O General-purpose digital I/O / ACLK output/Comparator_A inputP2.1/TAINCLK/CA321I/O General-purpose digital I/O / Timer_A, clock signal at INCLKP2.2/CAOUT/TA0/CA422I/O General-purpose digital I/O / Timer_A, capture: CCI0B input / Comparator_A output/BSL receive/Comparator_A inputP2.3/CA0/TA123I/O General-purpose digital I/O / Timer_A, compare: Out1 output / Comparator_A input P2.4/CA1/TA224I/O General-purpose digital I/O / Timer_A, compare: Out2 output / Comparator_A inputP2.5/R OSC/CA525I/O General-purpose digital I/O / Input for external resistor defining the DCO nominal frequency / Comparator_A inputP2.6/ADC12CLK/CA626I/O General-purpose digital I/O / Conversion clock – 12-bit ADC / Comparator_A inputP2.7/TA0/CA727I/O General-purpose digital I/O / Timer_A, compare: Out0 output / Comparator_A inputP3.0/UCB0STE/UCA0CLK28I/O General-purpose digital I/O / USCI B0 slave transmit enable / USCI A0 clock input/outputP3.1/UCB0SIMO/UCB0SDA29I/O General-purpose digital I/O / USCI B0 slave in/master out in SPI mode, SDA I2C data in I2C mode P3.2/UCB0SOMI/UCB0SCL30I/O General-purpose digital I/O / USCI B0 slave out/master in in SPI mode, SCL I2C clock in I2C mode P3.3/UCB0CLK/UCA0STE31I/O General-purpose digital I/O / USCI B0 clock input/output, USCI A0 slave transmit enableP3.4/UCA0TXD/UCA0SIMO32I/O General-purpose digital I/O / USCIA transmit data output in UART mode, slave data in/master out in SPI modeP3.5/UCA0RXD/UCA0SOMI33I/O General-purpose digital I/O / USCI A0 receive data input in UART mode, slave data out/master in in SPI modeP3.6/UCA1TXD/UCA1SIMO34I/O General-purpose digital I/O / USCI A1 transmit data output in UART mode, slave data in/master out in SPI modeP3.7/UCA1RXD/UCA1SOMI35I/O General-purpose digital I/O / USCIA1 receive data input in UART mode, slave data out/master in in SPI modeP4.0/TB036I/O General-purpose digital I/O / Timer_B, capture: CCI0A/B input, compare: Out0 output P4.1/TB137I/O General-purpose digital I/O / Timer_B, capture: CCI1A/B input, compare: Out1 output2008Terminal Functions (Continued)TERMINALNAME NO.I/O DESCRIPTIONP4.2/TB238I/O General-purpose digital I/O / Timer_B, capture: CCI2A/B input, compare: Out2 outputP4.3/TB339I/O General-purpose digital I/O / Timer_B, capture: CCI3A/B input, compare: Out3 outputP4.4/TB440I/O General-purpose digital I/O / Timer_B, capture: CCI4A/B input, compare: Out4 outputP4.5/TB541I/O General-purpose digital I/O / Timer_B, capture: CCI5A/B input, compare: Out5 outputP4.6/TB642I/O General-purpose digital I/O / Timer_B, capture: CCI6A input, compare: Out6 outputP4.7/TBCLK43I/O General-purpose digital I/O / Timer_B, clock signal TBCLK inputP5.0/UCB1STE/UCA1CLK44I/O General-purpose digital I/O / USCI B1 slave transmit enable / USCI A1 clock input/outputP5.1/UCB1SIMO/UCB1SDA45I/O General-purpose digital I/O / USCI B1slave in/master out in SPI mode, SDA I2C data in I2C mode P5.2/UCB1SOMI/UCB1SCL46I/O General-purpose digital I/O / USCI B1slave out/master in in SPI mode, SCL I2C clock in I2C mode P5.3/UCB1CLK/UCA1STE47I/O General-purpose digital I/O / USCI B1 clock input/output, USCI A1 slave transmit enableP5.4/MCLK48I/O General-purpose digital I/O / main system clock MCLK outputP5.5/SMCLK49I/O General-purpose digital I/O / submain system clock SMCLK outputP5.6/ACLK50I/O General-purpose digital I/O / auxiliary clock ACLK outputP5.7/TBOUTH/SVSOUT51I/O General-purpose digital I/O / switch all PWM digital output ports to high impedance − Timer_B TB0 to TB6/SVS comparator outputP6.0/A059I/O General-purpose digital I/O / analog input A0 – 12-bit ADCP6.1/A160I/O General-purpose digital I/O / analog input A1 – 12-bit ADCP6.2/A261I/O General-purpose digital I/O / analog input A2 – 12-bit ADCP6.3/A32I/O General-purpose digital I/O / analog input A3 – 12-bit ADCP6.4/A43I/O General-purpose digital I/O / analog input A4 – 12-bit ADCP6.5/A54I/O General-purpose digital I/O / analog input A5 – 12-bit ADCP6.6/A65I/O General-purpose digital I/O / analog input A6 – 12-bit ADCP6.7/A7/SVSIN6I/O General-purpose digital I/O / analog input A7 – 12-bit ADC/SVS inputXT2OUT52O Output of crystal oscillator XT2XT2IN53I Input for crystal oscillator XT2RST/NMI58I Reset input, nonmaskable interrupt input port, or bootstrap loader start (in flash devices).TCK57I Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start TDI/TCLK55I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.TDO/TDI54I/O Test data output. TDO/TDI data output or programming data input terminalTMS56I Test mode select. TMS is used as an input port for device programming and test.Ve REF+10I Input for an external reference voltageV REF+7O Output of positive of the reference voltage in the ADC12V REF−/Ve REF−11I Negativefor the reference voltage for both sources, the internal reference voltage, or an external applied reference voltageXIN8I Input for crystal oscillator XT1. Standard or watch crystals can be connected. XOUT9O Output for crystal oscillator XT1. Standard or watch crystals can be connected. QFN Pad NA NA QFN package pad connection to DV SS recommended (RTD package only)General-Purpose Register Program Counter Stack Pointer Status Register Constant Generator General-Purpose Register General-Purpose Register General-Purpose Register PC/R0SP/R1SR/CG1/R2CG2/R3R4R5R12R13General-Purpose Register General-Purpose Register R6R7General-Purpose Register General-Purpose Register R8R9General-Purpose Register General-Purpose Register R10R11General-Purpose Register General-Purpose RegisterR14R152008short-form descriptionCPUThe MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions,are performed as register operations in conjunction with seven addressing modes for source operand and four addressing modes for destination operand.The CPU is integrated with 16 registers that provide reduced instruction execution time. The register-to-register operation execution time is one cycle of the CPU clock.Four of the registers, R0 to R3, are dedicated as program counter, stack pointer, status register,and constant generator, respectively. The remaining registers are general-purpose registers.Peripherals are connected to the CPU using data,address, and control buses, and can be handled with all instructions.instruction setThe instruction set consists of 51 instructions with three formats and seven address modes. Each instruction can operate on word and byte data.Table 1 shows examples of the three types of instruction formats; the address modes are listed in Table 2.Table 1. Instruction Word FormatsDual operands, source-destination e.g., ADD R4,R5R4 + R5 −−−> R5Single operands, destination only e.g., CALL R8PC −−>(TOS), R8−−> PC Relative jump, un/conditionale.g., JNEJump-on-equal bit = 0Table 2. Address Mode DescriptionsADDRESS MODES DSYNTAX EXAMPLE OPERATION Register D D MOV Rs,Rd MOV R10,R11R10 −−> R11IndexedD D MOV X(Rn),Y(Rm)MOV 2(R5),6(R6)M(2+R5)−−> M(6+R6)Symbolic (PC relative)D D MOV EDE,TONI M(EDE) −−> M(TONI)Absolute D DMOV &MEM,&TCDAT M(MEM) −−> M(TCDAT)Indirect D MOV @Rn,Y(Rm)MOV @R10,Tab(R6)M(R10) −−> M(Tab+R6)Indirect autoincrement D MOV @Rn+,Rm MOV @R10+,R11M(R10) −−> R11R10 + 2−−> R10ImmediateDMOV #X,TONIMOV #45,TONI #45 −−> M(TONI)NOTE:S = source, D = destination2008operating modesThe MSP430 has one active mode and five software-selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request, and restore back to the low-power mode on return from the interrupt program.The following six operating modes can be configured by software:D Active mode (AM)−All clocks are activeD Low-power mode 0 (LPM0)−CPU is disabledACLK and SMCLK remain active, MCLK is disabledD Low-power mode 1 (LPM1)−CPU is disabledACLK and SMCLK remain active, MCLK is disabledDCO’s dc-generator is disabled if DCO not used in active modeD Low-power mode 2 (LPM2)−CPU is disabledMCLK and SMCLK are disabledDCO’s dc-generator remains enabledACLK remains activeD Low-power mode 3 (LPM3)−CPU is disabledMCLK and SMCLK are disabledDCO’s dc-generator is disabledACLK remains activeD Low-power mode 4 (LPM4)−CPU is disabledACLK is disabledMCLK and SMCLK are disabledDCO’s dc-generator is disabledCrystal oscillator is stopped2008 interrupt vector addressesThe interrupt vectors and the power-up starting address are located in the address range 0xFFFF to 0xFFC0.The vector contains the 16-bit address of the appropriate interrupt-handler instruction sequence. If the reset vector (0xFFFE) contains 0xFFFF (e.g., flash is not programmed) the CPU enters LPM4 after power-up.INTERRUPT SOURCE INTERRUPT FLAG SYSTEM INTERRUPT WORD ADDRESS PRIORITYPower-upExternal resetWatchdogFlash key violationPC out of range (see Note 1)PORIFGWDTIFGRSTIFGKEYV(see Note 2)Reset0xFFFE31, highestNMIOscillator faultFlash memory access violationNMIIFGOFIFGACCVIFG (see Notes 2 and 7)(Non)maskable(Non)maskable(Non)maskable0xFFFC30Timer_B7 (see Note 3)TBCCR0 CCIFG(see Note 4)Maskable0xFFFA29Timer_B7 (see Note 3)TBCCR1 to TBCCR6 CCIFGs,TBIFG (see Notes 2 and 4)Maskable0xFFF828Comparator_A+CAIFG Maskable0xFFF627 Watchdog timer+WDTIFG Maskable0xFFF426 Timer_A3TACCR0 CCIFG (see Note 4)Maskable0xFFF225 Timer_A3TACCR1 CCIFGTACCR2 CCIFGTAIFG (see Note 2 and 4)Maskable0xFFF024USCI_A0/USCI_B0 receive USCI_B0 I2C status UCA0RXIFG, UCB0RXIFG(see Note 2 and 5)Maskable0xFFEE23USCI_A0/USCI_B0 transmit USCI_B0 I2C receive / transmit UCA0TXIFG, UCB0TXIFG(see Note 2 and 6)Maskable0xFFEC22ADC12 (see Note 8)ADC12IFG(see Notes 2 and 4)Maskable0xFFEA210xFFE820 I/O port P2 (eight flags)P2IFG.0 to P2IFG.7(see Notes 2 and 4)Maskable0xFFE619I/O port P1 (eight flags)P1IFG.0 to P1IFG.7(see Notes 2 and 4)Maskable0xFFE418USCI A1/B1 receive UCA1RXIFG, UCB1RXIFG(see Note 2)Maskable0xFFE217USCI A1/B1 transmit UCA1TXIFG, UCB1TXIFG(see Note 2)Maskable0xFFE01615 to 0 lowestReserved (see Notes 9 and 10)Reserved0xFFDE to 0xFFC015 to 0, lowest NOTES: 1. A reset is executed if the CPU tries to fetch instructions from within the module register memory address range (0x0000 −0x01FF) or from within unused address ranges.2.Multiple source flags.3.Timer_B7 in MSP430F24x(1), MSP430F2410 family has 7 CCRs, Timer_B3 in MSP430F23x family has three CCRs. In Timer_B3,there are only interrupt flags TBCCR0, 1, and 2 CCIFGs, and the interrupt enable bits TBCCTL0, 1, and 2 CCIE.4.Interrupt flags are located in the module.5.In SPI mode: UCB0RXIFG. In I2C mode: UCALIFG, UCNACKIFG, ICSTTIFG, UCSTPIFG.6.In UART/SPI mode: UCB0TXIFG. In I2C mode: UCB0RXIFG, UCB0TXIFG.7.(Non)maskable: the individual interrupt-enable bit can disable an interrupt event, but the general-interrupt enable cannot.8.ADC12 is not implemented in the MSP430F24x1 family.9.The address 0xFFDE is used as bootstrap loader security key (BSLSKEY).A 0xAA55 at this location disables the BSL completely.A zero disables the erasure of the flash if an invalid password is supplied.10.The interrupt vectors at addresses 0xFFDE to 0xFFC0 are not used in this device and can be used for regular program code ifnecessary.2008special function registersMost interrupt enable bits are collected in the lowest address space. Special-function register bits not allocated to a functional purpose are not physically present in the device. This arrangement provides simple software access.interrupt enable 1 and 2Interrupt Enable register 1WDTIE Watchdog timer interrupt enable. Inactive if watchdog mode is selected.Active if watchdog timer is configured as general-purpose timer.OFIE Oscillator-fault-interrupt enableNMIIE Nonmaskable-interrupt enableACCVIE Flash memory access violation interrupt enableInterrupt Enable register 2UCA0RXIE USCI_A0 receive-interrupt enableUCA0TXIE USCI_A0 transmit-interrupt enableUCB0RXIE USCI_B0 receive-interrupt enableUCB0TXIE USCI_B0 transmit-interrupt enable分销商库存信息: TIMSP430F249MPMEP。

2SD2568中文资料(rohm)中文数据手册「EasyDatasheet - 矽搜」

2SD2568中文资料(rohm)中文数据手册「EasyDatasheet - 矽搜」

0.5 (A)
1
0.5 (A)
1
0.02 BASE SATURATION VOLTAGE : V 0.01 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 COLLECTOR CURRENT : I
C
0.5 (A)
1
COLLECTOR CURRENT : I
图4 DC电流增益 - 集电极电流(
1/2
芯片中文手册,看全文,戳
2SD2568
晶体管电气特Biblioteka 曲线200 (mA) 160
C
Ta=25 C
mA 3.0m A 2.5m A 2.0m A 1.5m A
1 (A)
C
V CE =3V
FE
1000 500 200 100
Ta=25 C
0.5 0.2 0.1 0.05
25°C
FE
2SD2568 CPT3 PQ TL 2500
电气特性
Parameter Collector-base breakdown voltage Collector-emitter breakdown voltage Emitter-base breakdown voltage Collector cutoff current Emitter cutoff current Collector-emitter saturation voltage Base-emitter saturation voltage DC current transfer ratio Transition frequency Output capacitance
(V) 2
BE(sat)
200 100 50 20

STK4182中文资料

STK4182中文资料
THD = 0.4%, f = 20Hz to 20kHz
20
40
100
45
PO (2)
VCC = ±30.5V, THD = 1.0%, RL = 4Ω, f = 1kHz
50
THD
PO = 1.0W, f = 1kHz
fL, fH
PO
=
1.0W,
+0 –3
dB
0.3 20 to 50k
ri
PO = 1.0W, f = 1kHz
C14 C7 R3, R4 R1, R2 R5, R9 (R6, R10) R11, R13 (R12, R14) R21 R18 R19, R20 R15, R16
Input filter capacitors • A filter formed with R3 or R4 can be used to reduce noise at high frequencies.
元器件交易网
Ordering number: EN2205B
Thick Film Hybrid IC
STK4182 II
AF Power Amplifier (Split Power Supply) (45W + 45W min, THD = 0.4%)
Features
• The STK4102II series (STK4182II) and STK4101V series (high-grade type) are pin-compatible in the output range of 6W to 50W and enable easy design.
Resistors for input filter
Quiescent current, Icco - mA

LA4182资料

LA4182资料
Easy to design radiator fin.
Package Dimensions
unit : mm
3022A-DIP12F
[LA4182]
SANYO : DIP12F
Specifications
Note) In general applications, heat generated in this package can be radiated through the Cu-foiled area of the printed circuit board, but since power dissipation Pd may be increased depending on the supply voltage and load conditions, it is recommended to use a fin additionally.
Unit (resistance: Ω)
No.742 -2/9
元器件交易网
Sample Application Circuit 1 : Stereo
LA4182
(Mylar)
(Mylar)
Unit (capacitance: F)
Stereo Bridge
Unit (capacitance: F) Example of printed pattern (bottom view) for use in stereo, bridge amplifier applications : 60 × 80 mm2
Operating Characteristics at Ta = 25°C, VCC = 9 V, f = 1 kHz, RL = 4 Ω, Rg = 600 Ω, ( ): 8 Ω, See specified Test Circuit.

DA227TL;中文规格书,Datasheet资料

DA227TL;中文规格书,Datasheet资料

Ta=25℃ VR=6V IF=5mA RL=50Ω n=10pcs
4 3 2 1 0 1
Ifsm 8.3ms 8.3ms 1cyc
10
5 AVE:3.50A 0 IFSM DISRESION MAP
trr DISPERSION MAP
10 NUMBER OF CYCLES IFSM-CYCLE CHARACTERISTICS
0.6
1.25±0.1
2.1±0.1
Features 1) Small mold type. (UMD4) 2) High reliability.
(3)
0~0.1 (4) 0.65 0.65 0.7 0.9±0.1 (1)
1.3
UMD4
Construction Silicon epitaxial planar
Data Sheet
Switching Diode
DA227
Applications Ultra high speed switching Dimensions (Unit : mm) Land size figure (Unit : mm) 0.7
2.0±0.2 各リードとも 0.25± 0.1 0.05 Each lead has same dimension 同寸法 0.15±0.05
Min. -
Typ. -
Max. 1.2 0.1 3.5 4
Unit V μA pF ns IF=100mA VR=70V
Conditions
VR=6V , f=1MHz VR=6V , IF=5mA , RL=50Ω
© 2011 ROHM Co., Ltd. All rights reserved.

AOD4184A规格书

AOD4184A规格书

General DescriptionSymbol Symbolt ≤ 10s Steady-State Steady-StateR θJCMaximum Junction-to-Case°C/W°C/W Maximum Junction-to-Ambient A D2.4553Absolute Maximum Ratings T A =25°C unless otherwise notedUnits Maximum Junction-to-AmbientA°C/W R θJA 184422Thermal Characteristics ParameterTyp Max GS DGSDSymbolMin Typ Max Units BV DSS 40VV DS =40V, V GS =0V1T J =55°C5I GSS ±100nA V GS(th)Gate Threshold Voltage 1.7 2.12.6V I D(ON)120A 5.87T J =125°C9.6127.69.5m Ωg FS 37S V SD 0.71V I S20A C iss 120015001800pF C oss 150215280pF C rss 80135190pF R g2 3.55ΩQ g (10V)212733nC Q g (4.5V)101417nC Q gs 356nC Q gd 369nC t D(on)6ns t r 17ns t D(off)30ns t f 17ns t rr 202938nsQ rr182634nCTHIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE.Body Diode Reverse Recovery TimeDrain-Source Breakdown Voltage On state drain currentI D =250µA, V GS =0V V GS =10V, V DS =5V V GS =10V, I D =20AReverse Transfer Capacitance I F =20A, dI/dt=100A/µsV GS =0V, V DS =20V, f=1MHz SWITCHING PARAMETERS Electrical Characteristics (T J =25°C unless otherwise noted)STATIC PARAMETERS ParameterConditions I DSS µA V DS =V GS I D =250µA V DS =0V, V GS = ±20V Zero Gate Voltage Drain Current Gate-Body leakage current Forward TransconductanceDiode Forward Voltage R DS(ON)Static Drain-Source On-Resistancem ΩI S =1A,V GS =0V V DS =5V, I D =5AV GS =4.5V, I D =15AV GS =10V, V DS =20V, R L =1Ω, R GEN =3ΩGate resistanceV GS =0V, V DS =0V, f=1MHzTurn-Off Fall TimeTotal Gate Charge V GS =10V, V DS =20V, I D =20AGate Source Charge Gate Drain Charge Total Gate Charge Body Diode Reverse Recovery Charge I F =20A, dI/dt=100A/µsMaximum Body-Diode Continuous CurrentInput Capacitance Output Capacitance Turn-On DelayTime DYNAMIC PARAMETERS Turn-On Rise Time Turn-Off DelayTime A. The value of R θJA is measured with the device mounted on 1in 2FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. ThePower dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature of 175°C may be used if the PCB allows it.B. The power dissipation P D is based on T J(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used.C. Repetitive rating, pulse width limited by junction temperature T J(MAX)=175°C. Ratings are based on low frequency and duty cycles to keep initial T J =25°C.D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max.F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of T J(MAX)=175°C. The SOA curve provides a single pulse rating.G. The maximum current rating is package limited.H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C.TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS22.533.544.5V GS (Volts)Figure 2: Transfer Characteristics (Note E)020*********12345V DS (Volts)Fig 1: On-Region Characteristics (Note E)I D (A )TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS024681051015202530Q g (nC)V G S (V o l t s )500100015002000250010203040V DS (Volts)C a p a c i t a n c e (p F )AOD4184AVdsChargeGate Charge Test Circuit & WaveformResistive Switching Test Circuit & WaveformsVddVdsIdVgsBV I Unclamped Inductive Switching (UIS) Test Circuit & WaveformsARDSS2E = 1/2 LI VddAR AR。

IRMCK311TR;中文规格书,Datasheet资料

IRMCK311TR;中文规格书,Datasheet资料

Data Sheet No. PD60338IRMCK311 Dual Channel Sensorless Motor Control IC forAppliancesFeaturesMCE TM (Motion Control Engine) - Hardware based computation engine for high efficiency sinusoidal sensorless control of permanent magnet AC motor Integrated Power Factor Correction controlSupports both interior and surface permanent magnet motorsBuilt-in hardware peripheral for single shunt current feedback reconstructionNo external current or voltage sensing operational amplifier requiredDual channel three/two-phase Space Vector PWM Three-channel analog output (PWM)Embedded 8-bit high speed microcontroller (8051) for flexible I/O and man-machine controlJTAG programming port for emulation/debugger Two serial communication interface (UART)I2C/SPI serial interfaceWatchdog timer with independent analog clockThree general purpose timers/countersTwo special timers: periodic timer, capture timer Internal ‘One-Time Programmable’ (OTP) memory and internal RAM for final production usagePin compatible with IRMCF311 RAM version1.8V/3.3V CMOS Product SummaryMaximum crystal frequency 60 MHz Maximum internal clock (SYSCLK) frequency 128 MHz Maximum 8051 clock frequency 33 MHz Sensorless control computation time 11 μsec typ MCE TM computation data range 16 bit signed 8051 OTP Program memory 56K bytes MCE program and Data RAM 8K bytes GateKill latency (digital filtered) 2 μsec PWM carrier frequency counter 16 bits/ SYSCLK A/D input channels 6 A/D converter resolution 12 bits A/D converter conversion speed 2 μsec 8051 instruction execution speed 2 SYSCLK Analog output (PWM) resolution 8 bits UART baud rate (typ) 57.6K bps Number of I/O (max) 14 Package (lead-free) QFP64 Operating temperature -40°C ~ 85°CDescriptionIRMCK311 is a high performance OTP based motion control IC designed primarily for appliance applications. IRMCK311 is designed to achieve low cost and high performance control solutions for advanced inverterized appliance motor control. IRMCK311 contains two computation engines. One is Motion Control Engine (MCE TM) for sensorless control of permanent magnet motors; the other is an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one monolithic chip. The MCE TM contains a collection of control elements such as Proportional plus Integral, Vector rotator, Angle estimator, Multiply/Divide, Low loss SVPWM, Single Shunt IFB. The user can program a motion control algorithm by connecting these control elements using a graphic compiler. Key components of the sensorless control algorithms, such as the Angle Estimator, are provided as complete pre-defined control blocks implemented in hardware. A unique analog/digital circuit and algorithm to fully support single shunt current reconstruction is also provided. The 8051 microcontroller performs 2-cycle instruction execution (16MIPS at 33MHz). The MCE and 8051 microcontroller are connected via dual port RAM to process signal monitoring and command input. An advanced graphic compiler for the MCE TM is seamlessly integrated into the MATLAB/Simulink environment, while third party JTAG based emulator tools are supported for 8051 developments. IRMCK311 comes with a small QFP64 pin lead-free package.TABLE OF CONTENTS1 Overview (5)2 IRMCK311 Block Diagram and Main Functions (6)3 Pinout (8)4 Input/Output of IRMCK311 (9)4.1 8051 Peripheral Interface Group (10)4.2 Motion Peripheral Interface Group (10)4.3 Analog Interface Group (11)4.4 Power Interface Group (11)4.5 Test Interface (12)5 Application Connections (13)6 DC Characteristics (14)6.1 Absolute Maximum Ratings (14)6.2 System Clock Frequency and Power Consumption (14)6.3 Digital I/O DC Characteristics (15)6.4 PLL and Oscillator DC Characteristics (15)6.5 Analog I/O DC Characteristics (16)6.6 Under Voltage Lockout DC Characteristics (17)6.7 AREF Characteristics (17)7 AC Characteristics (18)7.1 PLL AC Characteristics (18)7.2 Analog to Digital Converter AC Characteristics (19)7.3 Op Amp AC Characteristics (19)7.4 SYNC to SVPWM and A/D Conversion AC Timing (20)7.5 GATEKILL to SVPWM AC Timing (21)7.6 Interrupt AC Timing (21)7.7 I2C AC Timing (22)7.8 SPI AC Timing (23)7.8.1 SPI Write AC timing (23)7.8.2 SPI Read AC Timing (24)7.9 UART AC Timing (25)7.10 CAPTURE Input AC Timing (26)7.11 JTAG AC Timing (27)7.12 OTP Programming Timing (28)8 I/O Structure (29)9 Pin List (32)Dimensions (35)10 Package11 Part Marking Information (36)Information (36)12 OrderingTABLE OF FIGURESFigure 1. Typical Application Block Diagram Using IRMCK311 (5)Figure 2. IRMCK311 Internal Block Diagram (6)Figure 3. IRMCK311 Pin Configuration (8)Figure 4. Input/Output of IRMCK311 (9)Figure 5. Application Connection of IRMCK311 (13)Figure 6. Clock Frequency vs. Power Consumption (14)Figure 7 Crystal oscillator circuit (18)Figure 8 Voltage droop of sample and hold (19)Figure 9 SYNC to SVPWM and A/D conversion AC Timing (20)Figure 10 GATEKILL to SVPWM AC Timing (21)Figure 11 Interrupt AC Timing (21)Figure 12 I2C AC Timing (22)Figure 13 SPI AC Timing (23)Figure 14 SPI Read AC Timing (24)Figure 15 UART AC Timing (25)Figure 16 CAPTURE Input AC Timing (26)Figure 17 JTAG AC Timing (27)Figure 18 OTP Programming Timing (28)Figure 19 All digital I/O except motor PWM output (29)Figure 20 RESET, GATEKILL I/O (29)Figure 21 Analog input (30)Figure 22 Analog operational amplifier output and AREF I/O structure (30)Figure 23 VPP programming pin I/O structure (30)Figure 24 VSS and AVSS pin structure (31)Figure 25 VDD1 and VDDCAP pin structure (31)Figure 26 XTAL0/XTAL1 pins structure (31)TABLE OF TABLESTable 1. Absolute Maximum Ratings (14)Table 2. System Clock Frequency (14)Table 3. Digital I/O DC Characteristics (15)Table 4. PLL DC Characteristics (15)Table 5. Analog I/O DC Characteristics (16)Table 6. UVcc DC Characteristics (17)Table 7. AREF DC Characteristics (17)Table 8. PLL AC Characteristics (18)Table 9. A/D Converter AC Characteristics (19)Table 10. Current Sensing OP Amp AC Characteristics (19)Table 11. SYNC AC Characteristics (20)Table 12. GATEKILL to SVPWM AC Timing (21)Table 13. Interrupt AC Timing (21)Table 14. I2C AC Timing (22)Table 15. SPI Write AC Timing (23)Table 16. SPI Read AC Timing (24)Table 17. UART AC Timing (25)Table 18. CAPTURE AC Timing (26)Table 19. JTAG AC Timing (27)Table 20. OTP Programming Timing (28)Table 21. Pin List (32)1 OverviewIRMCK311 is a new International Rectifier integrated circuit device primarily designed as a one-chip solution for complete inverter controlled appliance dual motor control applications. Unlike a traditional microcontroller or DSP, the IRMCK311 provides a built-in closed loop sensorless control algorithm using the unique Motion Control Engine (MCE TM) for permanent magnet motors. The MCE TM consists of a collection of control elements, motion peripherals, a dedicated motion control sequencer and dual port RAM to map internal signal nodes. IRMCK311 also employs a unique single shunt current reconstruction circuit to eliminate additional analog/digital circuitry and enables a direct shunt resistor interface to the IC. The sensorless control is the same for both motors with a single shunt current sensing capability. Motion control programming is achieved using a dedicated graphical compiler integrated into the MATLAB/Simulink TM development environment. Sequencing, user interface, host communication, and upper layer control tasks can be implemented in the 8051 high-speed 8-bit microcontroller. The 8051 microcontroller is equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1 shows a typical application schematic using IRMCK311.IRMCK311 is intended for volume production purpose and contains 64K bytes of OTP (One Time Programming) ROM, which can be programmed through a JTAG port. For a development purpose use, IRMCF311 contains a 48k byte of RAM in place of program OTP to facilitate an application development work. Both IRMCF311 and IRMCK311 come in the same 64-pin QFP package with identical pin configuration to facilitate PC board layout and transition to mass productionFigure 1. Typical Application Block Diagram Using IRMCK3112 IRMCK311 Block Diagram and Main FunctionsM o t i o n C o n t r o l B u sFigure 2. IRMCK311 Internal Block DiagramIRMCK311 contains the following functions for sensorless AC motor control applications:• Motion Control Engine (MCE TM )o Proportional plus Integral block o Low pass filtero Differentiator and lag (high pass filter) o Ramp o Limito Angle estimate (sensorless control) o Inverse Clark transformation o Vector rotator o Bit latch o Peak detect o Transitiono Multiply-divide (signed and unsigned)o Divide (signed and unsigned)o Addero Subtractoro Comparatoro Countero Accumulatoro Switcho Shifto ATAN (arc tangent)o Function block (any curve fitting, nonlinear function)o16-bit wide Logic operations (AND, OR, XOR, NOT, NEGATE)o MCE TM program and data memory (6K byte). Note 1o MCE TM control sequencer• 8051 microcontrollero Three 16-bit timer/counterso16-bit periodic timero16-bit analog watchdog timero16-bit capture timero Up to 36 discrete I/Oso Eleven-channel 12-bit A/DFive buffered channels (0 – 1.2V input)One unbuffered channel (0 – 1.2V input)o JTAG port (4 pins)o Up to three channels of analog output (8-bit PWM)o Two UARTo I2C/SPI porto 64K byte Note 1program One-Time Programmable memoryo2K byte data RAM. Note 2Note 1: Total size of OTP memory is 64K byte, however MCE program occupiesmaximum 8K byte which will be loaded into internal RAM at a powerup/bootprocess. Therefore only 56K byte OTP memory area is usable for 8051microcontroller.Note 2: Total size of RAM is 8K byte including MCE program, MCE data, and 8051data. Different sizes can be allocated depending on applications.3 PinoutXTAL0XTAL1P1.1/RXD P1.2/TXDVDD1VSS VDD2P1.3/SYNC/SCKP1.4/CAPP 3.6/R X D 1P 3.7/T X D 1FPWMVL FPWMUL V S SV D D 2A V D DA V S SA I N 0A R E FP 2.7/A O P W M 1P 2.6/A O P W M 0CPWMUH CPWMVH CPWMWH CPWMUL CPWMVL CPWMWL CGATEKILL VDD1VSS I F B C OI F B C +I F B C -P L L V S SP L L V D DR E S E TN CT C KP 5.3/T D IP 5.2/T D OP 5.1/T M SS D A /C S 0S C L /S O -S I /V P PP 5.0/P F C G K I L LP F C P W M V S SFGATEKILL FPWMWL VAC-VAC+VACO IPFCO IPFC+IPFC-I F B F OI F B F +I F B F -P3.0/INT2/CS1C M E X TFPWMVH FPWMUHFPWMWH A I N 1P 3.2/I N T 0Figure 3. IRMCK311 Pin Configuration4 Input/Output of IRMCK311All I/O signals of IRMCK311 are shown in Figure 4. All I/O pins are 3.3V logic interface except A/D interface pins.Figure 4. Input/Output of IRMCK3114.1 8051 Peripheral Interface GroupUART InterfaceP1.1/RXD Input, Receive data to IRMCK311, can be configured as P1.1P1.2/TXD Output, Transmit data from IRMCK311, can be configured as P1.22nd channel Receive data to IRMCK311, can be configured as P3.6 P3.6/RXD1 Input,P3.7/TXD1 Output,2nd channel Transmit data from IRMCK311, can be configured as P3.7Discrete I/O InterfaceP1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock P1.4/CAP Input/output port 1.4, can be configured as Capture Timer inputP3.0/INT2/CS1 Input/output port 3.0, can be configured as external interrupt 2 or SPIchip select 1P3.2/INT0 Input/output port 3.2, can be configured as external interrupt 0Analog Output InterfaceP2.6/AOPWM0 Input/output, can be configured as 8-bit PWM output 0 withprogrammable carrier frequencyP2.7/AOPWM1 Input/output, can be configured as 8-bit PWM output 1 withprogrammable carrier frequencyCrystal InterfaceXTAL0 Input, connected to crystalXTAL1 Output, connected to crystalReset InterfaceRESET Inout, system reset, needs to be pulled up to VDD1 but doesn’t requireexternal RC time constantI2C/SPI InterfaceSCL/SO-SI/VPP Output, I2C clock output, SPI SO-SII2C Data line, Chip Select 0 of SPISDA/CS0 Input/output,P3.0/INT2/CS1 Input/output port 3.0, can be configured as external interrupt 2 or SPIchip select 1P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock 4.2 Motion Peripheral Interface GroupPWMCPWMUH Output, motor 1 PWM phase U high side gate signalCPWMUL Output, motor 1 PWM phase U low side gate signalCPWMVH Output, motor 1 PWM phase V high side gate signalCPWMVL Output, motor 1 PWM phase V low side gate signalCPWMWH Output, motor 1 PWM phase W high side gate signalCPWMWL Output, motor 1 PWM phase W low side gate signalFPWMUH Output, motor 2 PWM phase U high side gate signalFPWMUL Output, motor 2 PWM phase U low side gate signal分销商库存信息: IRIRMCK311TR。

IRLML6402TRPBF;中文规格书,Datasheet资料

IRLML6402TRPBF;中文规格书,Datasheet资料

ParameterTyp.Max.UnitsR θJAMaximum Junction-to-Ambient75100°C/WThese P-Channel MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET ®power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in battery and load management.A thermally enhanced large pad leadframe has been incorporated into the standard SOT-23 package to produce a HEXFET Power MOSFET with the industry's smallest footprint. This package,dubbed the Micro3™, is ideal for applications where printed circuit board space is at a premium. The low profile (<1.1mm)of the Micro3 allows it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards.The thermal resistance and power dissipation are the best available.Thermal ResistancelUltra Low On-Resistance l P-Channel MOSFET l SOT-23 Footprint l Low Profile (<1.1mm)l Available in Tape and Reel l Fast Switching l Lead-Free l Halogen-FreeDescription12/14/11 1ParameterMax.UnitsV DSDrain- Source Voltage-20V I D @ T A = 25°C Continuous Drain Current, V GS @ -4.5V -3.7I D @ T A = 70°C Continuous Drain Current, V GS @ -4.5V -2.2A I DMPulsed Drain Current -22P D @T A = 25°C Power Dissipation 1.3P D @T A = 70°C Power Dissipation 0.8Linear Derating Factor0.01W/°C E AS Single Pulse Avalanche Energy 11mJ V GSGate-to-Source Voltage± 12V T J, T STGJunction and Storage Temperature Range-55 to + 150°CAbsolute Maximum RatingsW Micro3™IRLML6402PbFRepetitive rating; pulse width limited by max. junction temperature.Notes:Pulse width ≤ 400μs; duty cycle ≤ 2%.Source-Drain Ratings and Characteristics** For recommended footprint and soldering techniques refer to application note #AN-994.Surface mounted on 1" square single layer 1oz. copper FR4 board,steady state.Starting T J = 25°C, L = 1.65mHR G = 25Ω, I AS = -3.7A.ParameterMin.Typ.Max.Units Conditions V (BR)DSSDrain-to-Source Breakdown Voltage -20––––––V V GS = 0V, I D = -250μAΔV (BR)DSS /ΔT JBreakdown Voltage Temp. Coefficient –––-0.009–––V/°C Reference to 25°C, I D = -1mA –––0.0500.065V GS = -4.5V, I D = -3.7A–––0.0800.135V GS = -2.5V, I D = -3.1A V GS(th)Gate Threshold Voltage -0.40-0.55-1.2V V DS = V GS , I D = -250μA g fs Forward Transconductance 6.0––––––S V DS = -10V, I D = -3.7A ––––––-1.0V DS = -20V, V GS = 0V––––––-25V DS = -20V, V GS = 0V, T J = 70°C Gate-to-Source Forward Leakage ––––––-100V GS = -12VGate-to-Source Reverse Leakage ––––––100V GS = 12V Q g Total Gate Charge–––8.012I D = -3.7A Q gs Gate-to-Source Charge––– 1.2 1.8nC V DS = -10V Q gd Gate-to-Drain ("Miller") Charge ––– 2.8 4.2V GS = -5.0V t d(on)Turn-On Delay Time –––350–––V DD = -10V t r Rise Time–––48–––I D = -3.7At d(off)Turn-Off Delay Time –––588–––R G = 89Ωt f Fall Time–––381–––R D = 2.7ΩC iss Input Capacitance –––633–––V GS = 0V C oss Output Capacitance–––145–––pF V DS = -10V C rssReverse Transfer Capacitance–––110–––ƒ = 1.0MHzElectrical Characteristics @ T J = 25°C (unless otherwise specified)I GSS µAΩR DS(on)Static Drain-to-Source On-Resistance I DSS Drain-to-Source Leakage Current nAnsIRLML6402PbF 3Vs. TemperatureIRLML6402PbFGate-to-Source VoltageFig 5. Typical Capacitance Vs.Drain-to-Source Voltage Forward Voltage110100V DS , Drain-to-Source Voltage (V)02004006008001000C , C a p a c i t a n c e (p F )IRLML6402PbF 5Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-AmbientCase TemperatureVs. Drain CurrentIRLML6402PbFFig 13. Typical On-Resistance Vs.Drain CurrentFig 12. Typical On-Resistance Vs.Gate Voltage 2.03.04.05.06.07.0-V GS, Gate -to -Source Voltage ( V )0.020.040.060.080.100.120.14R D S (o n ) , D r a i n -t o -S o u r c e V o l t a g e ( Ω)51015202530-I D , Drain Current ( A )0.000.040.080.120.160.20R D S ( o n ) , D r a i n -t o -S o u r c e O n R e s i s t a n c e ( Ω )IRLML6402PbF 7Micro3 (SOT-23/TO-236AB) Part Marking InformationMicro3 (SOT-23) Package OutlineDimensions are shown in millimeters (inches)Note: For the most current drawing please refer to IR website at: /package/1. DIMENSIONING & TOLERANCING PER ANSI Y14.5M-19942. DIMEN SION S ARE SHOWN IN MILLIMETERS [INCHES].3. CONTROLLING D IMENSION: MILLIMETER.4. DATUM PLAN E H IS LOCATED AT THE MOLD PARTING LIN E.5. DATUM A AND B TO BE DETERMIN ED AT DATUM PLANE H.6. D IMENSIO NS D AND E1 ARE MEASUR ED AT DATUM PLANE H. DIMENSION S D OES NO T INCLUDE MOLD PR OTRUSIO NS O R IN TER LEAD FLASH. MOLD PROTRUSIO NS O R INTERLEAD FLASH SHALL NOT EXCEED 0.25 MM [0.010 INCH] PER SIDE.7. DIMENSION L IS THE LEAD LENGTH FOR SOLDERING TO A SUBSTRATE.8. OUTLINE CON FO RMS TO JEDEC O UTLINE TO-236 AB.0.89 1.12SYMBOLMAXMINA1b 0.010.10c 0.300.50D 0.080.20E 2.80 3.04E1 2.10 2.64e 1.20 1.40A 0.95BSC L 0.400.6008MILLIMETERS A20.88 1.02e1 1.90BSC REF 0.54L1BSC 0.25L2BSC ! REF 7T8Ã &$ # "$INCHES 80 !# %7T8 "& $$ #& # '" ! ' " ! ! #0.0004MINMAX## "$DIMENSIONSRecommended FootprintF = IRLM L6401A 2001A 27Notes: T his pa rt ma rking informa tion a pplies to de vic e s p roduce d a fte r 02/26/2001ODELEA D FREEDA TE C E = IRLML6402X = PA RT NUM BER CODE REFERENCE:D = IRLML5103C = IRLML6302B = IRLML2803A = IRLM L2402W = (1-26) IF PRECEDED BY LA ST DIG IT OF C A LENDA R YEA RW = (27-52) IF PRECEDED BY A LETTERY 820083*********YEA R 2002252005200442007200676201020099YEA R Y C 03WORK WEEK 0102A W B 04D242625ZY WORK WEEK W H = IRLM L5203G = IRLM L2502KH G F E D C B 200620032002200520042008200720102009J 292830C B D50I = IRLML0030J = IRLM L2030L = IRLML0060M = IRLML0040K = IRLML0100N = IRLM L2060P = IRLML9301R = IRLML9303Cu W IREHA LOG PAIRLML6402PbFMicro3™(SOT-23/TO-263AB) T ape & Reel InformationDimensions are shown in millimeters(inches)2.05 ( .080 )1.95 ( .077 )TRFEED DIRECTION4.1 ( .161 )3.9 ( .154 )1.6 ( .062 )1.5 ( .060 )1.85 ( .072 )1.65 ( .065 )3.55 ( .139 )3.45 ( .136 )1.1 ( .043 )0.9 ( .036 )4.1 ( .161 )3.9 ( .154 )0.35 ( .013 )0.25 ( .010 )8.3 ( .326 )7.9 ( .312 )1.32 ( .051 )1.12 ( .045 )9.90 ( .390 )8.40 ( .331 )178.00( 7.008 ) MAX.NOTES:1. CONTROLLING DIMENSION : MILLIMETER.2. OUTLINE CONFORMS TO EIA-481 & EIA-541.Data and specifications subject to change without notice.IR WORLD HEADQUARTERS: 101N.Sepulveda Blvd, El Segundo, California 90245, USA Tel: (310) 252-7105TAC Fax: (310) 252-7903Visit us at for sales contact information . 12/2011分销商库存信息: IRIRLML6402TRPBF。

TEA1721ATN1,118;中文规格书,Datasheet资料

TEA1721ATN1,118;中文规格书,Datasheet资料
1.1 General description
The TEA1721 is a small and low cost module Switched Mode Power Supply (SMPS) controller IC for low power applications (up to 5 W) and operates directly from the rectified universal mains input. The device includes a high voltage power switch (700 V) and has been optimized for flyback converter topologies to provide high-efficiency over the entire load range with ultra-low power consumption in the no-load condition. It provides a circuit for start-up directly from the rectified mains voltage without any external bleeder circuits.
/
NXP Semiconductors
TEA1721AT
HV start-up flyback controller with integrated MOSFET for 5 W
Green features:
Enables no-load power consumption below < 10 mW Very low supply current in no-load condition with energy saver mode Incorporates a high voltage start-up circuit with zero current consumption under

罗弗公司2010年版低功耗高电压负压电子传输器2SB1182和2SB1240产品说明书

罗弗公司2010年版低功耗高电压负压电子传输器2SB1182和2SB1240产品说明书

Medium power transistor (-32V, -2A)2SB1182 / 2SB1240●Features1) Low V CE(sat).V CE(sat) = -0.5V (Typ.) (I C /I B = -2A / -0.2A)2) Complements 2SD1758 / 2SD1862.●StructureEpitaxial planar type PNP silicon transistor●Absolute maximum ratings (Ta=25︒C)∗1 Single pulse, Pw =100ms∗2 Printed circuit board, 1.7mm thick, collector copper plating 100mm 2or larger.ParameterV CBO V CEO V EBO P C Tj Tstg−40V V V A(DC)W (Tc =25°C )W°C °C−32−5−2I CA (Pulse)−3101∗1∗22SB11822SB1240150−55 to 150Symbol Limits Unit Collector-base voltage Collector-emitter voltage Emitter-base voltage Collector currentCollector power dissipationJunction temperature Storage temperature●Electrical characteristics (Ta=25︒C)∗ Measured using pulse current.ParameterSymbol BV CBO BV CEO BV EBO I CBO I EBO h FE V CE(sat)f T CobMin.−40−32−5−−120−−−−−−−−10050−−−−1−1390−0.8∗∗−−V I C = −50μA I C = −1mA I E = −50μA V CB = −20V V EB = −4V I C /I B = −2A/ −0.2A V CE = −5V, I E =0.5A, f =100MHz V CB = −10V, I E =0A, f =1MHzV VμA μA −−V CE = −3V, I C = −0.5AV MHz pFTyp.Max.Unit Conditions−0.5Collector-base breakdown voltage Collector-emitter breakdown voltage Emitter-base breakdown voltage Collector cutoff current Emitter cutoff currentCollector-emitter saturation voltage DC current transfer ratio Transition frequency Output capacitance●Packaging specifications and h FEPackage CodeBasic ordering unit (pieces)TapingTL 2500h FE QR 2SB1182−TV22500−QR2SB1240Typeh FE values are classified as follows :Item h FEQ 120 to 270R 180 to 390●Electrical characteristic curvesFig.1 Grounded emitter propagationcharacteristicsBASE TO EMITTER VOLTAGE : V BE (V)C O L L E C T O R C U R R E N T : I C (m A )−−−−−−−−−−Fig.2 Grounded emitter outputcharacteristics−−−−−C O L LE C T O R C U R R E N T : I C (A )COLLECTOR TO EMITTER VOLTAGE : V CE (V)Fig.3 DC current gain vs.collector curren ( )D C C U R RE N T G A I N : hF ECOLLECTOR CURRENT : I C (mA)Fig.4 DC current gain vs.collector current ( )D C C U R RE N T G A I N : hF ECOLLECTOR CURRENT : I C (mA)Fig.5 Collector-emitter saturationvoltage vs. collector current ( )C O L L E C T O R S A T U R A T I O N V O L T A G E : V C E (s a t ) (m V )−−−−Fig.6 Collector-emitter saturationvoltage vs. collector current ( )−−−−−C O L L E C T O R S A T U R A T I O N V O L T A G E : V C E (s a t ) (m V )COLLECTOR CURRENT : I C (mA)Fig.7 Base-emitter saturation voltagevs. collector currentCOLLETOR CURRENT : I C (mA)B A S E S A T U R A T I O N V O L T A G E : V B E (s a t )(V )−−−−−Fig.8 Gain bandwidth product vs.emitter currentEMITTER CURRENT : I E (mA)T R A N S I T I O N F R E Q U E N C Y : f T (M H z )Fig.9 Collector output capacitance vs.collector-base voltageEmitter input capacitance vs. emitter-base voltageCOLLECTOR TO BASE VOLTAGE : V CB (V)EMITTER TO BASE VOLTAGE : V EB (V)C O L L E C T O R O U T P U T C A P AC I T A N C E : C o b (p F )E M I T T E R I N P U T C A P A C I T A N C E : C i b (p F )Fig.10 Safe operation area(2SB1182)−−−−−−−−−−C O L L E C T O R C U R R E N T : I C (A )COLLECTOR TO EMITTER VOLTAGE : V CE (V)NoticeN o t e sNo copying or reprod uction of this d ocument, in part or in whole, is permitted without theconsent of ROHM Co.,Ltd.The content specified herein is subject to change for improvement without notice.The content specified herein is for the purpose of introd ucing ROHM's prod ucts (hereinafter"Products"). If you wish to use any such Product, please be sure to refer to the specifications,which can be obtained from ROHM upon request.Examples of application circuits, circuit constants and any other information contained hereinillustrate the standard usage and operations of the Products. The peripheral conditions mustbe taken into account when designing circuits for mass production.Great care was taken in ensuring the accuracy of the information specified in this document.However, should you incur any d amage arising from any inaccuracy or misprint of suchinformation, ROHM shall bear no responsibility for such damage.The technical information specified herein is intended only to show the typical functions of andexamples of application circuits for the Prod ucts. ROHM d oes not grant you, explicitly orimplicitly, any license to use or exercise intellectual property or other rights held by ROHM andother parties. ROHM shall bear no responsibility whatsoever for any dispute arising from theuse of such technical information.The Products specified in this document are intended to be used with general-use electronicequipment or devices (such as audio visual equipment, office-automation equipment, commu-nication devices, electronic appliances and amusement devices).The Products specified in this document are not designed to be radiation tolerant.While ROHM always makes efforts to enhance the quality and reliability of its Prod ucts, aProduct may fail or malfunction for a variety of reasons.Please be sure to implement in your equipment using the Products safety measures to guardagainst the possibility of physical injury, fire or any other damage caused in the event of thefailure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHMshall bear no responsibility whatsoever for your use of any Product outside of the prescribedscope or not in accordance with the instruction manual.The Prod ucts are not d esigned or manufactured to be used with any equipment, d evice orsystem which requires an extremely high level of reliability the failure or malfunction of whichmay result in a direct threat to human life or create a risk of human injury (such as a medicalinstrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of anyof the Prod ucts for the above special purposes. If a Prod uct is intend ed to be used for anysuch special purpose, please contact a ROHM sales representative before purchasing.If you intend to export or ship overseas any Product or technology specified herein that maybe controlled under the Foreign Exchange and the Foreign Trade Law, you will be required toobtain a license or permit under the Law.Thank you for your accessing to ROHM product informations.More detail product informations and catalogs are available, please contact us.ROHM Customer Support System/contact/。

7427155;中文规格书,Datasheet资料

7427155;中文规格书,Datasheet资料

6.1 6.0 5.02012-06-272012-04-302007-01-25SStSStSMuSStSMu-Würth Elektronik eiSos GmbH & Co. KGEMC & Inductive SolutionsMax-Eyth-Str. 174638 WaldenburgGermanyTel. +49 (0) 79 42 945 - 0A Dimensions: [mm]Additional FeaturesSafety key to lock/ unkock74271D2 General Properties:Ferrite core Ferrite core Ferrite core Plastic housing Plastic housing Test cable Test cablePropertiesMaterial Initial permeability Curie temperatureColourFlammability ClassificationApplicable cable Applicable cable lengthµi T CValue 4 W 620620150Grey UL94-V0AWG26120Unit°Cmm Tol.typ.typ.F Typical Impedance Characteristics:I Cautions and Warnings:The following conditions apply to all goods within the product series of WE-STAR RINGof Würth Elektronik eiSos GmbH & Co. KG:General:All recommendations according to the general technical specifications of the data sheet have to be complied with.The disposal and operation of the product within ambient conditions which probably alloy or harm the component surface has to be avoided.The packaging of the product is to encase the needed humidity of the plastic housing. To ensure the humidity level, the products have to be stored in this delivered packaging. If not, the products are losing their humidity. In this case you can re-condition the components according to the internal standard WE1883 to ensure the necessary humidity in the plastic.To ensure the operating mode of the product, the ambient temperature at processing (when the part will be mounted on the cable) has to be in the range of 15 to 25 °C.Before mounting, the part should be stored for one hour in this condition.The responsibility for the applicability of customer specific products and the use in a particular customer design is always within the authority of the customer. All technical specifications for standard products do also apply for customer specific products.Direct mechanical impact to the product and the forcible closing of this shall be prevented as the ferrite material of the ferrite body or the pla-stic housing could flake or in the worst case it could break.Product specific:Follow all instructions mentioned in the datasheet, especially:•The cable diameter must be pointed out, otherwise no warranty will be sustained.•Violation of the technical product specifications such as exceeding the nominal rated current will result in the loss of warranty.1. General Customer ResponsibilitySome goods within the product range of Würth Elektronik eiSos GmbH & Co. KG contain statements regarding general suitability for certain application areas. These statements about suitability are based on our knowledge and experience of typical requirements concerning the are-as, serve as general guidance and cannot be estimated as binding statements about the suitability for a customer application. The responsibi-lity for the applicability and use in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate, where appropriate to investigate and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not.2. Customer Responsibility related to Specific, in particular Safety-Relevant ApplicationsIt has to be clearly pointed out that the possibility of a malfunction of electronic components or failure before the end of the usual lifetime can-not be completely eliminated in the current state of the art, even if the products are operated within the range of the specifications.In certain customer applications requiring a very high level of safety and especially in customer applications in which the malfunction or failure of an electronic component could endanger human life or health it must be ensured by most advanced technological aid of suitable design of the customer application that no injury or damage is caused to third parties in the event of malfunction or failure of an electronic component.3. Best Care and AttentionAny product-specific notes, warnings and cautions must be strictly observed.4. Customer Support for Product SpecificationsSome products within the product range may contain substances which are subject to restrictions in certain jurisdictions in order to serve spe-cific technical requirements. Necessary information is available on request. In this case the field sales engineer or the internal sales person in charge should be contacted who will be happy to support in this matter.5. Product R&DDue to constant product improvement product specifications may change from time to time. As a standard reporting procedure of the Product Change Notification (PCN) according to the JEDEC-Standard inform about minor and major changes. In case of further queries regarding the PCN, the field sales engineer or the internal sales person in charge should be contacted. The basic responsibility of the customer as per Secti-on 1 and 2 remains unaffected.6. Product Life CycleDue to technical progress and economical evaluation we also reserve the right to discontinue production and delivery of products. As a stan-dard reporting procedure of the Product Termination Notification (PTN) according to the JEDEC-Standard we will inform at an early stage about inevitable product discontinuance. According to this we cannot guarantee that all products within our product range will always be available. Therefore it needs to be verified with the field sales engineer or the internal sales person in charge about the current product availability ex-pectancy before or when the product for application design-in disposal is considered.The approach named above does not apply in the case of individual agreements deviating from the foregoing for customer-specific products.7. Property RightsAll the rights for contractual products produced by Würth Elektronik eiSos GmbH & Co. KG on the basis of ideas, development contracts as well as models or templates that are subject to copyright, patent or commercial protection supplied to the customer will remain with Würth Elektronik eiSos GmbH & Co. KG.8. General Terms and ConditionsUnless otherwise agreed in individual contracts, all orders are subject to the current version of the “General Terms and Conditions of Würth Elektronik eiSos Group”, last version available at .J Important Notes:The following conditions apply to all goods within the product range of Würth Elektronik eiSos GmbH & Co. KG:分销商库存信息: WURTH-ELECTRONICS 7427155。

6448H;中文规格书,Datasheet资料

6448H;中文规格书,Datasheet资料

ebm-papst St.Georgen GmbH&Co.KGHermann-Papst-Straße1D-78112St.GeorgenPhone+49772481-0Fax+49772481-1309info2@Nominal dataType6448HNominal voltage VDC48Nominal voltage range VDC28..60Speed min-14000Power input W26.0Min.ambient temperature°C-20Max.ambient temperature°C55Air flow m3/h480Sound power level B7.1Sound pressure level dB(A)63ml=max.load·me=max.efficiency·fa=running at free air·cs=customer specs·cu=customer unitSubject to alterationsTechnical featuresGeneral description Particular design features:Optional Vario-Pro:Highly flexible software configuration for the fan ensures an easily customisablesolution to meet the individual requirements of your application.General features:Housing made of aluminium,impeller made of fibreglass-reinforced PA;housing with grounding lugfor M4x8screw(Torx).48V version incl.screws.Electronic commutation completely integrated.Protected against reverse polarity and locking.Electrical connection to flat plugs,3x0.5mm.Air exhaust over bars.Direction of rotation counter-clockwise seen on rotor.Mass:760g.Mass0.760kgDimensions172x150x51mmMaterial of impeller Fiberglass-reinforced PA plasticHousing material Aluminum.Housing with grounding lug for screw M4x8(TORX).Direction of air flow Air exhaust over barsDirection of rotation Left,looking at rotorBearing Ball bearingsLifetime L10at40°C70000h50000hLifetime L10at maximumtemperatureConnection line Flat plugs3.0x0.5mm.Motor protection Protected against reverse polarity and locking.Locked-rotor protection Electronic blocking protection,with electronic motor current limit in the startup phase and when therotor is blocked.Approval VDE,CSA,UL,CEProduct drawing LuCharts:Air flow分销商库存信息: EBM-PAPST6448H。

AM-TX1-418资料

AM-TX1-418资料

FEATURES•MINIATURE MODULE (7.5 x 11.5 X 4.5mm)•SAW CONTROLLED FREQUENCY STABILITY •NO ADJUSTABLE COMPONENTS.•TRANSMITTING RANGE UP TO 30 METRES.•CMOS/TTL COMPATIBLE INPUT.•CURRENT CONSUMPTION 2.5mA (typ).•SINGLE SUPPLY VOLTAGE 2.5 -12V.•COMPATIBLE WITH R.F. SOLUTIONS AM RECEIVER.•MPT1340 LICENCE EXEMPT.•AVAILABLE AS EITHER 418MHz OR 433MHz. APPLICATIONS•CAR ALARM KEYFOBS •REMOTE TRANSMITTER ENCODERS •GARAGE DOOR OPENERS •REMOTE GATE SYSTEMSDESCRIPTIONThe R.F. Solutions AM Transmitter module offers a miniature hybrid modular RF transmitter providing on-off keyed modulation, which can be used to transmit data from any standard CMOS/TTL source up to 1200 baud.The module is very simple to operate, requiring only two connections (see application circuit below). The module is also very efficient, using only 2.3mA (typ) which means that it may be driven directly from an encoder I/C or microcontroller. The output impedance has been designed to give optimum performance when coupled with a small antenna such as a tuned loop or short whip.The modules are compatible with the AM Receiver modules (AM -HRRn-XXX or AM-RRS2-XXX).The transmitter module is type approved to MPT1340 for use in general telemetry and telecommunications products, when used with the antenna as listed overleaf.APPLICATION CIRCUITOperationThe application circuit shows how to drive the module. The module may be driven from either a current source or current sink. In both cases the dropper resistor is required to set the drive current. The maximum and minimum drive voltage for various dropper resistor values is shown below. For other voltages between 2.5 - 13.1V the values may be calculated using the following formulaMin Rd = ( Max drive Voltage - 3 ) / 0.0046The minimum drive voltage for a given resistor value may then be calculated as;Min drive Voltage = 2.2 + .003 * RdExample: The max drive voltage is 5.5V. The min Rd is therefore 543 Ω. The nearest preferred value above this is 560 Ω. The min drive voltage with 560 Ω is 3.86V.ANTENNASTwo types of antenna may be used, a tuned loop, or a short whip. The tuned loop should be driven directly from the module. The whip should be driven via the specified tuning network. The module is not type approved for use with a 1/4 wave or helical type antenna.MECHANICAL DETAILSWidth = 7mm, Height = 11.5mm, thickness: 4.5mm.Lead Pitch 5.08mm.+ve connection is shown by marking on body sideTECHNICAL SPECIFICATIONAbsolute MaximumsVoltage + ve to -v e -2.5 to 8.5V Storage Temp-40 to +85o CAmbient temperature 20deg CELECTRICAL CHARACTERISTICS MIN TYPICAL MAX DIMENSIONModule Voltage (@ max drive) 3.0VModule Voltage (@ min drive) 2.2VDrive Current (@ max drive) 4.6mADrive Current (@ min drive) 3.0mAWorking Frequency417.925418.000418.075MHzWorking Frequency433.92MHzData Throughput1200baudTuning Tolerance+/-75KHzRadiated Power (ERP) (@ max drive V)-6.0dBmModulation ON-OFFModulation Pulse width0.8mSecsOperating Temperature-10+40°CDRIVE VOLTAGE RESISTOR VALUE (R D)MIN MAX UNITΩ8.813.1V2K26.79.9V1K55.27.6V1K4.2 6.1V6803.6 5.2V4703.24.5V3302.8 4.0V2202.53.5V100-10.5V‘off voltage’LICENCE EXEMPTIONThis range of Radio transmitters is approved by the Department of Trade & Industry (D.T.I. Specification MPT1340) in the U.K., andtherefore the user requires no radio operating licence in the U.K. Please note however the following requirements to comply withMPT1340;1. All transmitters shall use integral antennas only. Receivers may use an external or integral antenna. An integral antenna isdefined as one which is designed to be connected permanently to the transmitter or receiver without the use of an externalfeeder. The antenna shall be a tuned loop not exceeding 700mm2 enclosed area, or a whip not exceeding 90mm in length.2. The equipment in which the module is used must carry an inspection mark located on the outside of the equipment which isclearly visible. It shall state “MPT1340 W.T. Licence Exempt”. The minimum dimensions of the mark shall be 10 x 15mm and thefigure height shall be not less than 2mm.PART No DESCRIPTIONAM-TX1-418Transmitter Module 418MHzAM-TX1-433Transmitter Module 433MHz Should you require further assistance, please call;R. F. Solutions Ltd.,Unit 21, Cliffe Industrial Estate,South Street,Lewes,E Sussex, BN8 6JL. England.Tel +44 (0)1273 898 000. Fax +44 (0)1273 480 661.Email sales@ RF Solutions is a member of the Low Power Radio Association.Information contained in this document is believed to be accurate , however no representation or warranty is given and no liability is assumed by R.F. Solutions Ltd. with respect to the accuracy of such information. Use of R.F.Solutions as critical components in life support systems is not authorised except with express written approval from R.F.Solutions Ltd.。

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EMI4182Common Mode Filter with ESD ProtectionFunctional DescriptionThe EMI4182 is an integrated common mode filter providing both ESD protection and EMI filtering for high speed digital serial interfaces such as HDMI or MIPI D-PHY .The EMI4182 provides protection for two differential data line pairs in a small RoHS-compliant WDFN10 package.Features•Highly Integrated Common Mode Filter (CMF) with ESD Protection provides protection and EMI reduction for systems using High Speed Serial Data Lines with cost and space savings over discrete solutions •Large Differential Mode Bandwidth with Cutoff Frequency > 2 GHz •High Common Mode Stop Band Attenuation: >25 dB at 700 MHz,>30 dB at 800 MHz•Provides ESD Protection to IEC61000-4-2 Level 4, ±15 kV Contact Discharge•Low Channel Input Capacitance Provides Superior Impedance Matching Performance•Low Profile Package with Small Footprint in WDFN10 2 x 2.5 mm Pb −Free Package•These Devices are Pb −Free, Halogen Free/BFR Free and are RoHS CompliantApplications•HDMI/DVI Display in Mobile Phones•MIPI D-PHY (CSI-2, DSI, etc) in Mobile Phones and Digital StillCameras(Connector)(ASIC)Figure 1. EMI4182 Electrical SchematicExternal Internal WDFN10CASE 511BMMARKING DIAGRAMS42M G G42= Specific Device Code M = Date Code G = Pb −Free Package(Note: Microdot may be in either location)In_1+In_1−Out_1+Out_1−In_2+In_2−Out_2+Out_2−GND GND PIN CONNECTIONSDevice Package Shipping †ORDERING INFORMATION†For information on tape and reel specifications,including part orientation and tape sizes, please refer to our T ape and Reel Packaging Specifications Brochure, BRD8011/D.EMI4182MTTAGWDFN10(Pb −Free)3000/T ape & Reel(Top View)PIN FUNCTION DESCRIPTIONPin Name Pin No.Type DescriptionIn_1+1I/O CMF Channel 1+ to Connector (External)In_1−2I/O CMF Channel 1− to Connector (External)Out_1+10I/O CMF Channel 1+ to ASIC (Internal)Out_1−9I/O CMF Channel 1− to ASIC (Internal)In_2+4I/O CMF Channel 2+ to Connector (External)In_2−5I/O CMF Channel 2− to Connector (External)Out_2+7I/O CMF Channel 2+ to ASIC (Internal)Out_2−6I/O CMF Channel 2− to ASIC (Internal)V N3, 8GND GroundABSOLUTE MAXIMUM RATINGS (T A= 25°C unless otherwise noted)Parameter Symbol Value Unit Operating Temperature Range T OP−40 to +85°C Storage Temperature Range T STG−65 to +150°C Maximum Lead Temperature for Soldering Purposes(1/8” from Case for 10 seconds)T L260°C DC Current per Line I LINE100mAStresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.ELECTRICAL CHARACTERISTICS (T A= 25°C unless otherwise noted)Symbol Parameter Test Conditions Min Typ Max UnitI LEAK Channel Leakage Current T A = 25°C, V IN = 5 V, GND = 0 V 1.0m AV F Channel Negative Voltage T A = 25°C, I F= 10 mA0.1 1.5VC IN Channel Input Capacitance to Ground(Pins 1, 2, 4, 5 to Pins 3, 8)T A = 25°C, At 1 MHz, GND = 0 V,V IN = 1.65 V0.8 1.3pFR CH Channel Resistance(Pins 1−10, 2−9, 4−7 and 5−6)8.0W f3dB Differential Mode Cut−off Frequency50 W Source and Load Termination 2.0GHz F atten Common Mode Stop Band Attenuation@ 800 MHz30dBV ESD In−system ESD Withstand Voltagea) Contact discharge per IEC 61000−4−2standard, Level 4 (External Pins)b) Contact discharge per IEC 61000−4−2standard, Level 1 (Internal Pins)(Notes 1 and 2)±15±2kVV CL TLP Clamping Voltage(See Figure 12)Forward I PP= 8 AForward I PP= 16 AForward I PP= −8 AForward I PP= −16 A1218−6−12VVVVR DYN Dynamic ResistancePositive TransientsNegative Transients T A = 25°C, I PP= 1 A, t P = 8/20 m sAny I/O pin to Ground;Notes 1 and 31.360.6V RWM Reverse Working Voltage(Note 3) 5.0V V BR Breakdown Voltage I T = 1 mA; (Note 4) 5.69.0V 1.Standard IEC61000−4−2 with C Discharge = 150 pF, R Discharge = 330, GND grounded.2.These measurements performed with no external capacitor.S devices are normally selected according to the working peak reverse voltage (V RWM), which should be equal to or greater than the DCor continuous peak operating voltage level.4.V BR is measured at pulse test current I T.TYPICAL CHARACTERISTICSFigure 2. Differential Mode Attenuation vs.Frequency (Zdiff = 100 W )Figure 3. Common Mode Attenuation vs.Frequency (Zcomm = 50 W )Figure 4. Differential Return Loss vs. Frequency(Zdiff=100 W )Figure 5. Differential Inter −Lane Cross −CouplingFigure 6. Common Mode Inter −Lane Cross −Coupling1E61E71E81E91E56E9−35−30−25−20−15−10−5−400Frequency, Hzd B (S C C 21)1E61E71E81E91E56E9−35−30−25−20−15−10−5−400Frequency, Hzd B (S D D 11)d B (S D D 22)1E61E71E81E91E56E9−7−6−5−4−3−2−1−90Frequency, Hzd B (S C C 21)−8Figure 7. MIPI D −PHY LP Mode Test SetupFigure 8. EMI4182 MIPI D −PHY LP Mode Measured ResultsFigure 9. EMI4182 Eye Diagram Test SetupFigure 10. EMI4182 Measured Eye Diagram @ 3.4Gbps (EVB through on left, EVB with EMI4182 on right)Transmission Line Pulse (TLP) MeasurementsTransmission Line Pulse (TLP) provides current versus voltage (I-V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 11. TLP I-V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10 s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 12 where an 8 kV IEC61000-4-2 current waveform is compared with TLP current pulses at 8 and 16 A. A TLP curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. Typical TLP I-V curves for the EMI4182 are shown in Figure 13.Figure 11. Simplified Schematic of a Typical TLP SystemFigure 12. Comparison Between 8 kV IEC61000−4−2 and 8 A and 16 A TLP WaveformsFigure 13. Positive and Negative TLP WaveformsESD Voltage ClampingFor sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to On Semiconductor Application Notes AND8307/D and AND8308/D.IEC61000−4−2 Spec.Level Test Voltage (kV)First Peak Current (A)Current at 30 ns (A)Current at 60 ns (A)127.5422415843622.51264830168IEC61000−4−2 WaveformFigure 15. 8 x 20 ms Pulse Waveform1009080706050403020100t, TIME (m s)% O F P E A K P U L S E C U R R E N TFigure 16. ESD Clamping Voltage +8 kV per IEC6100−4−2 (external to internal pin)Figure 17. ESD Clamping Voltage −8 kV per IEC6100−4−2 (external to internal pin)Black =Top layer Red =other layerHDMI Type −A ConnectorFigure 18. EMI4182 HDMI Type – A Connector Application DiagramHDMI Type −D Figure 19. EMI4182 HDMI Type − D Connector Application Diagram(Bottom View)PACKAGE DIMENSIONSWDFN10 2.5x2, 0.5P CASE 511BM −01ISSUE ODIM MIN MAX MILLIMETERS A A10.000.05A3b 0.150.25D 2.50 BSC E 2.00 BSC e 0.50 BSC NOTES:1.DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.2.CONTROLLING DIMENSION: MILLIMETERS.3.DIMENSIONS b APPLIES TO PLATEDTERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 MM FROM TERMINAL TIP .4.COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.0.20 REF 0.700.80L 0.700.90DIMENSIONS: MILLIMETERSMOUNTING FOOTPRINTRECOMMENDED 0.10L10.050.15MIN8XL1DETAIL AL ALTERNATE TERMINAL CONSTRUCTIONSDETAIL BALTERNATE CONSTRUCTIONS*For additional information on our Pb −Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.PUBLICATION ORDERING INFORMATION分销商库存信息: ONSEMIEMI4182MTTAG。

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